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11942254 | DETAILED DESCRIPTION OF EMBODIMENTS Hereinafter, the principle and spirit of the present disclosure will be described with reference to the illustrative embodiments. It should be understood, all these embodiments are given merely for the skilled in the art to better understand and further practice the present disclosure, but not for limiting the scope of the present disclosure. For example, features illustrated or described as part of one embodiment may be used with another embodiment to yield still a further embodiment. In the interest of clarity, not all features of an actual implementation are described in this specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions should be made to achieve the developers specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure. The disclosed subject matter will now be described with reference to the attached figures. Various structures, systems and devices are schematically depicted in the drawings for purposes of explanation only and so as to not obscure the description with details that are well known to those skilled in the art. Nevertheless, the attached drawings are included to describe and explain illustrative examples of the disclosed subject matter. The words and phrases used herein should be understood and interpreted to have a meaning consistent with the understanding of those words and phrases by those skilled in the relevant art. No special definition of a term or phrase, i.e. a definition that is different from the ordinary and customary meaning as understood by those skilled in the art, is intended to be implied by consistent usage of the term or phrase herein. To the extent that a term or phrase is intended to have a special meaning, i.e. a meaning other than that understood by skilled artisans, such a special definition will be expressly set forth in the specification in a definitional manner that directly and unequivocally provides the special definition for the term or phrase. In particular a coil can also be designated as coil arrangement. A coil may comprise one or more windings. Available transformer coils are generally built with an insulation that is arranged outside the coils to cover high-voltage (HV) windings. This insulation may be configured to take the whole test voltage. During assembly of the active parts of the transformer, additional insulation may be placed between coils and core is placed to close mechanical gaps. One of the aspects of the present disclosure may be a reduction of “coil cover” insulation between coils and between coil and core to enable e.g. a reduction of material cost. FIG.1shows a three-phase transformer according to embodiments of the present application. A core100of the transformer is a five-limb core i.e. a shell-form core for a three-phase transformer as can be also seen inFIG.2(core shown without the coils). The five limbs110a,b,cand115are substantially arranged in a plane. On their ends, the limbs110a, b, cand side limbs115are connected via “yokes”200to form a closed magnetic circuit. The yokes200are the areas inFIG.2, encircled with a dashed line. The “inner” three limbs110a,110b,110cof the core are the main limbs since on these main limbs the coil arrangements120a,120b,120care arranged. Each of the coil arrangements120a,120b,120con one of the main limbs110a,110b,110cis assigned to one of the three phases of a three-phase distribution net. Each of the coil arrangements may comprise high voltage and low voltage windings. Low voltage windings may be arranged on the limb as inner windings. High-voltage windings may be arranged as outer windings, surrounding the inner low-voltage windings. The outer high-voltage windings on a coil arrangement120a,120b,120ccan generate a high electric field strength with respect to its surrounding region. The closer the distance to the respective coil/high voltage winding, the higher the field strength and the higher the possibility for a flashover. A field strength gradient depends on the transformation ratio NH/NL(NL=number of windings on the low voltage side; NH=number of windings on the high voltage side) and the insulation used to insulate the coils/windings. The core100may comprise a metallic core material. The core100is connected to ground GND. Within core and coil assembly in transformers, insulation can be divided into two fundamental groups: minor insulation and major insulation. Minor insulation may be used between parts of individual coils or windings depending on construction. Major insulation separates the high-and low-voltage windings, and the windings to core100. This does mostly concern the two coil arrangements120a,120c, arranged on limbs110aand110c, which are the limbs adjacent the middle main limb110b. To avoid a flashover between the coils120a,120cand the conducting material of grounded core100, in particular between the side limbs115of the shell-form five-limb transformer core100which are close to the high voltage windings of coils/coil arrangements120a,120con limbs110aand110c, the coils120a,120care equipped with a coil insulation material130which may be referred to as “coil cover” or “inter-coil” insulation to mitigate an electric field strength between the grounded core material and the windings of the coils120a,120c. However, in currently available transformers, all three coils120a, b, cmay be equipped with such a coil insulation130. The inter-coil insulation130however has a certain material volume (thickness), dependent on the supported voltages of the transformer and the characteristics of the used materials. The insulation130itself does not directly contribute to the electrical characteristics of the transformer. However, the volume of the insulation material may enlarge the volume of coil arrangement120. That is, the coil120, together with its coil insulation130has a specific volume and the core100has to be designed to take the coils and its insulation130. In other words, the insulation may indirectly influence the geometrical measures (size) of core100. On the other hand, the geometrical measures of a transformer core100are another characteristic of a transformer with respect to cost end effectivity. In a transformer, for sufficient effectivity, it is generally of interest to make the magnetic resistance Rm=l/(μ0μrA) (1) of core100as small as possible to have a high magnetic flux. In equation (1), “l” represents the length of the magnetic circuit in meters; μ0represents the permeability of vacuum; μrrepresents the relative magnetic permeability of the core material and “A” represents the cross-sectional area of the circuit in square meters (m2). That is, in a transformer it may be of high interest to minimize the magnetic circuit length “l” to limit no-load current that represents energy required for circuit magnetization and power losses in the circuit. In an effort to improve the current transformer design and to increase an effectivity of a transformer and advantageously lowering costs, it is proposed to only equip coil arrangements120aand120con core limbs110aand110c(seeFIG.1) with coil insulation130. In other words, the coil arrangements which are in direct proximity to the side limbs115of grounded core100are equipped with coil cover/intercoil-insulation material130to mitigate the electrical field strength between outer HV windings of the coil arrangements120a,120cand the grounded limbs115to avoid flashovers. The coil arrangement120bon the middle main limb110bof the five limbs comes only with an insulation of the windings or a solid insulation against the neighboring coils120a,120c, since the transformer is built into an oil-filled grounded metal housing105for cooling and shielding. Therefore, the lack of coil-cover/inter-coil insulation130on the coil arrangement120b, arranged on the middle main limb110bdoes not pose a risk of hazard to the environment. The coil arrangement120bon the middle main limb110bmay have a smaller construction volume without the insulation material130than the coil arrangements120a,120con the limbs110a,110c. FIG.3Ashows an available construction. The proportion seen in theFIGS.3A and3Bare only for a better overview and do not show the proportions in a real transformer. Core120(this is in particular the coil arrangement120bon the middle main limb110b) is surrounded by coil cover insulation130. L1symbolizes the width of the coil arrangement. Below, inFIG.3B, coil arrangement120is shown without coil cover. “L2” therefore symbolizes the width of the coil without insulation130. As can be seen, L2is smaller than L1. The magnetic length of the core may therefore be reduced by the difference L1−L2 Advantageously with this modification, the core100can be adapted to the size-reduced coil arrangement120bon middle main limb110b. The magnetic length l of the circuit can be designed shorter. This reduced magnetic length may result in a slightly reduced magnetic resistance (see equation (1)) and therefore in a higher effectivity and less thermal power loss which otherwise would have to be distributed/cooled. Waiving the inner coil insulation130partially, at least on the coil arrangement120bon the main-middle limb110bmoreover saves cost and effort in manufacturing since only two coil arrangements have to be equipped with insulation130. A possible result of such modifications may be outlined by the following exemplary consideration: A reduction of core steel may results in cost reduction of transformer, reduction of steel consumption with all environmental aspect of the reduction and may also be translated to a reduction of power loss, in particular NLL=“no load loss reduction” No load losses include hysteresis and eddy current losses which may depend on: Voltage (increase with voltage, as flux density reaches saturation), Frequency, Magnetic core design (steel properties, lamination thickness of the core metal sheets, mass). Typically a transformer is continuously energized with various load. Load losses are a variable part, however the no-load loses may be constant. Hence, “no-load-losses” may be generated the whole year. In an exemplary consideration, an installed transformer unit has about 3150 kVA. Further it is considered that this transformer may have “no-load-losses” of approximately 2.5 kW (NLL2500) which may be dependent on the manufacturer and its size. A reduction of 1% of this NLL means about 25 W=0.025 kW. In one year (assumed with 8760 hours), the reduction is 0.025 kW×8760 h=219 kWh. A typical installation time for a transformer may be about 30 . . . 40 years. In 30 years, the energy savings are about 30*219=6570 kWh=6.57 GWh. This is however an exemplary consideration for only one single installed unit. The figures may be different for other installed units. The amount of installed transformers in the network brings correct scale. Therefore, in sum, the waiving of the inter-coil insulation may save material cost, manufacturing cost, costs for core material (since the core size can be reduced) and, by improved magnetic behavior, effectiveness and loss behavior are improved. A construction of a transformer taking into account the previously explained measures, in particular reduction of insulation between coils120and between coil120and core100may enable material cost reduction in a range of 1% of active part material cost. Additionally, the reduction of coil cover130may improve the thermal behavior since, in an oil-cooled transformer construction, the coil arrangements120a, b, cmay be cooled more effectively by the oil. Therefore, in an embodiment of the present disclosure, a three-phase transformer is provided, taking into account the previously identified improvements. The transformer may comprise a housing (e.g., housing105). The housing may further be filled with a fluid (e.g. transformer oil) as cooling or insulation medium. The transformer may further comprise a shell-form five-limb transformer core100. In “Shell-form” transformers, the coils/windings are surrounded by the core100(seeFIG.1). The five limbs of the transformer core100can be divided into two groups of limbs: three main limbs110a,110b,110cand two side limbs115. The main limbs110a,110b,110cmay comprise two outer main limbs110a,110cand a middle/inner main limb110b. The transformer may further comprise three coil arrangements120a,120b,120c. The three coil arrangements120a,120b,120cmay comprise two outer coil arrangements120a,120c, each of them arranged around a respective one of the outer main limbs110a,110c, and a middle coil arrangement120barranged on/around the middle/inner main limb110b. The outer coil arrangements120a,120cmay be provided with a coil-cover/inter-coil insulation130. The coil cover130may be configured to electrically insulate the coil arrangements120a,120cfrom the transformer housing and from the respective other ones of the coil arrangements120b. The coil cover130may in particular be configured to insulate the HV side (HV-windings) of coil arrangements120aand120cfrom the grounded core100, in particular to insulate the side limbs115from the high-voltage windings on coil arrangements120a,120c. The coil arrangement120bon the middle main limb110bis not provided with coil-cover/inter-coil insulation130. This measure may decrease the construction volume of the coil arrangement120band may therefore enable to reduce the size (magnetical length) of the core100. In a further embodiment of the present disclosure, the coil arrangements120a,120b,120cmay each comprise at least one primary coil and one or more secondary coils. The primary coil may be the low voltage (LV) coil and the secondary coil may be the high-voltage (HV) coil. The high-voltage coil may substantially be arranged on the outside of coil arrangement120a,120b,120c. In yet a further embodiment of the present disclosure, a solid insulation material, e.g. in form of sheets, may be arranged in a free space between the coil arrangements120a, b, cand/or between the coil arrangements120and the side limbs115. When mechanical material is arranged between coils120a, b, cand/or between coils120a, b, cand core100, coil cover may be further reduced or may be completely removed. In particular, insulation material may be provided only in the area where high-field strengths may cause flashovers. This may further provide possibilities of coil cover reduction. For example, in critical area between limbs115of grounded core100and coil arrangements120a, c, only sheet insulation material may be provided so that coil cover on these coil arrangements may be completely omitted or may be at least reduced in its amount. This may also provide further possibility to reduce core size and core-losses. In summary of the previous disclosure, a three-phase transformer, in particular a transformer for high-power, in shell-design with five limbs is provided. To improve electrical and thermal behavior, the core size may be reduced by decreasing the volume of the coil arrangement120which is arranged on the middle limb. The core100can be built smaller which results in using less core material and reduces the magnetic length. This results in higher efficiency of the transformer and lower power losses in the core, specifically the “No Load Losses” (NLL). | 15,671 |
11942255 | DETAILED DESCRIPTION Hereafter, inductor components according to aspects of the present disclosure will be described in detail by referring to illustrated embodiments. Note that the drawings may contain schematic parts and may not reflect the actual dimensions and proportions. First Embodiment Configuration FIG.1Ais a see-through plan view illustrating an inductor component according to a first embodiment.FIG.1Bis a sectional view taken along line A-A inFIG.1A. An inductor component1is for example a component that is mounted in an electronic appliance such as a personal computer, a DVD player, a digital camera, a TV, a mobile phone, or an in-car electronic appliance and has a substantially rectangular parallelepiped shape on the whole. However, the shape of the inductor component1is not particularly limited and the inductor component1may instead substantially have a cylindrical or polygonal columnar shape, a truncated cone shape, or a polygonal truncated pyramid shape. As illustrated inFIGS.1A and1B, the inductor component1includes an element body10, a first coil wiring line21and a second coil wiring line22that are arranged inside the element body10, an insulating coating film15that covers the first coil wiring line21and the second coil wiring line22, a first columnar wiring line31, a second columnar wiring line32, a third columnar wiring line33, and a fourth columnar wiring line34that are buried inside the element body10so that end surfaces thereof are exposed from a first main surface10aof the element body10, a first outer terminal41, a second outer terminal42, a third outer terminal43, and a fourth outer terminal44that are provided on the first main surface10aof the element body10, and an insulating film50that is provided on the first main surface10aof the element body10. In the figures, the thickness direction of the inductor component1is illustrated as a Z direction with the positive Z direction being the direction toward the upper side and the negative Z direction being the direction toward the lower side. In a plane of the inductor component1perpendicular to the Z direction, the length direction of the inductor component1is illustrated as an X direction and the width direction of the inductor component1is illustrated as a Y direction. The element body10includes an insulating layer61, a first magnetic layer11that is arranged on a lower surface61aof the insulating layer61, and a second magnetic layer12that is arranged on an upper surface61bof the insulating layer61. The first main surface10aof the element body10corresponds to the upper surface of the second magnetic layer12. Although the element body10has a three-layer structure consisting of the insulating layer61, the first magnetic layer11, and the second magnetic layer12, the element body10may instead having a one-layer structure consisting of just a magnetic layer or may have a two-layer structure and so forth. The insulating layer61has a substantially layer-like shape with the main surfaces thereof having substantially rectangular shapes, and the thickness of the insulating layer61substantially lies in a range from 10 μm to 100 μm, for example. The insulating layer61is for example preferably an insulating resin layer such as an epoxy resin or polyimide resin layer that does not contain a base material such as glass cloth from the viewpoint of realizing a low profile, but the insulating layer61may instead be for example a sintered body such as a magnetic layer such as a NiZn or MnZn ferrite layer or a non-magnetic layer such as an alumina or glass layer, or may be a resin layer including a base material such as glass epoxy. Furthermore, when the insulating layer61is a sintered body, it is possible to ensure that the insulating layer61is strong and flat and the workability of a material stacked on the insulating layer61is improved. In addition, when the insulating layer61is a sintered body, it is preferable that the insulating layer61be subjected to a grinding process from the viewpoint of realizing a low profile, and it is particularly preferable that the insulating layer61be ground down from the lower side on which nothing is stacked. The first magnetic layer11and the second magnetic layer12are magnetic resin layers composed of a resin containing a metal magnetic powder. The resin is for example an organic insulating material consisting of an epoxy resin, bismaleimide, a liquid crystal polymer, polyimide, or the like. The average particle diameter of the metal magnetic powder substantially lies in a range from 0.1 μm to 5 μm, for example. When manufacturing the inductor component1, the average particle size of the metal magnetic powder can be calculated as a particle size equivalent to an integrated value of 50% in a particle size distribution obtained by laser diffraction and scattering. The metal magnetic powder is for example an FeSi alloy such as FeSiCr, an FeCo alloy, an Fe alloy such as NiFe, or an amorphous alloy of these alloys. The content of the metal magnetic powder preferably substantially lies in a range from 20 to 70 Vol % of the entire magnetic layer. In the case where the average particle diameter of the metal magnetic powder is less than or equal to 5 μm, the direct current superposition characteristic is improved and iron loss at radio frequencies can be reduced by the fine powder. Note that a ferrite magnetic powder such as a NiZn ferrite powder or a MnZn ferrite powder may be used instead of a metal magnetic powder. The first coil wiring line21and the second coil wiring line22are arranged so as to be parallel to the first main surface10aof the element body10. In this way, the first coil wiring line21and the second coil wiring line22can be formed in a direction parallel to the first main surface10aand a low profile can be realized for the inductor component1. The first coil wiring line21and the second coil wiring line22are arranged on the same plane inside the element body10. More specifically, the first coil wiring line21and the second coil wiring line22are only formed on the upper side of the insulating layer61, i.e., the upper surface61bof the insulating layer61, and are covered by the second magnetic layer12. The first and second coil wiring lines21and22are wound in substantially planar shapes. More specifically, the first and second coil wiring lines21and22have substantially semi-elliptical arc-like shapes when viewed in the Z direction. In other words, the first and second coil wiring lines21and22are curved wiring lines that are each wound through approximately half a turn. In addition, the first and second coil wiring lines21and22each include a straight portion in the middle thereof. The thicknesses of the first and second coil wiring lines21and22preferably substantially lie in a range from 40 μm to 120 μm, for example. As an example of the first and second coil wiring lines21and22, the first and second coil wiring lines21and22may have a thickness of 45 μm, a wiring line width of 40 μm, and an inter-wiring-line spacing of 10 μm. The inter-wiring-line spacing preferably substantially lies in a range from 3 μm to 20 μm. The first and second coil wiring lines21and22are composed of a conductive material, and for example are composed of a metal material having a low electrical resistance such as Cu, Ag, or Au. In this embodiment, the inductor component1only includes one layer of the first and second coil wiring lines21and22and a low profile can be realized for the inductor component1. A first end and a second end of the first coil wiring line21are respectively electrically connected to the first columnar wiring line31and the second columnar wiring line32, which are positioned toward the outside. The first coil wiring line21has a substantially curved shape that draws an arc from the first columnar wiring line31and the second columnar wiring line32toward the center of the inductor component1. In other words, the first coil wiring line21has pad portions at both ends thereof, the pad portions having a larger line width than the spiral-shaped portion of the first coil wiring line21. The first coil wiring line21is directly connected to the first and second columnar wiring lines31and32at these pad portions. A first end and a second end of the second coil wiring line22are respectively electrically connected to the third columnar wiring line33and the fourth columnar wiring line34, which are positioned toward the outside. The second coil wiring line22has a substantially curved shape that draws an arc from the third columnar wiring line33and the fourth columnar wiring line34toward the center of the inductor component1. In this case, in each of the first and second coil wiring lines21and22, the area enclosed by the curve drawn by the first or second coil wiring line21or22and a straight line connecting the two ends of the first or second coil wiring line21or22is referred to as the inner diameter part. Here, the inner diameter parts of the first and second coil wiring lines21and22do not overlap when looking in the Z direction. In addition, the first and second coil wiring lines21and22are separated from each other at their respective arc-shaped portions. The wiring lines further extend from the positions where first and second coil wiring lines21and22are connected to the first to fourth columnar wiring lines31to34toward the outside of the chip and these wiring lines are exposed outside the chip. In other words, the first and second coil wiring lines21and22have exposed portions200that are exposed to the outside from the side surfaces of the inductor component1which are parallel to the stacking direction of layers of the inductor component1. These wiring lines are wiring lines that are connected to power supply wiring lines when additional electrolytic plating is performed after forming the shapes of the first and second coil wiring lines21and22in the process of manufacturing the inductor component1. These power supply wiring lines allow the additional electrolytic plating to be easily performed on the inductor substrate at a stage before the individual inductor components1are separated from each other and enable the distance between the wiring lines to be reduced. In addition, the magnetic coupling between the first and second coil wiring lines21and22can be increased by decreasing the distance between the wiring lines of the first and second coil wiring lines21and22by performing the additional electrolytic plating. Furthermore, since the first and second coil wiring lines21and22have the exposed portions200, it is possible to ensure resistance to electrostatic breakdown while the inductor substrate is being processed. The thicknesses of exposed surfaces200aof the exposed portions200of the coil wiring lines21and22preferably substantially lie in a range from 45 μm up to the thicknesses of the coil wiring lines21and22. With this configuration, the thicknesses of the exposed surfaces200aare less than or equal to the thicknesses of the coil wiring lines21and22and as a result the relative proportions of the magnetic layers11and12can be increased and the inductance can be improved. Furthermore, the thicknesses of the exposed surfaces200aare greater than or equal to 45 μm and as a result the occurrence of disconnections can be reduced. The exposed surfaces200aare preferably composed of oxide films. Thus, the occurrence of short circuits between the inductor component1and adjacent components can be suppressed. The insulating coating film15separately covers the first coil wiring line21and the second coil wiring line22. The insulating coating film15ensures that the adjacent first and second coil wiring lines21and22are insulated from each other. The insulating coating film15is composed of an insulating material that does not contain a magnetic material and for example is composed of a resin material containing at least one from among an epoxy resin, a polyimide resin, a phenol resin, and a vinyl ether resin. The insulating coating film15is formed by electro-deposition. Furthermore, the insulating coating film15may include a non-magnetic filler such as silica, and in this case, the strength, workability, and electrical characteristics of the insulating coating film15can be improved. The first to fourth columnar wiring lines31to34extend in the Z direction from the coil wiring lines21and22and penetrate through the inside of the second magnetic layer12. The first columnar wiring line31extends upward from the upper surface of one end of the first coil wiring line21and the end surface of the first columnar wiring line31is exposed from the first main surface10aof the element body10. The second columnar wiring line32extends upward from the upper surface of the other end of the first coil wiring line21and the end surface of the second columnar wiring line32is exposed from the first main surface10aof the element body10. The third columnar wiring line33extends upward from the upper surface of one end of the second coil wiring line22and the end surface of the third columnar wiring line33is exposed from the first main surface10aof the element body10. The fourth columnar wiring line34extends upward from the upper surface of the other end of the second coil wiring line22and the end surface of the fourth columnar wiring line34is exposed from the first main surface10aof the element body10. The first columnar wiring line31is located closer to the third columnar wiring line33than to the fourth columnar wiring line34. Therefore, the first columnar wiring line31, the second columnar wiring line32, the third columnar wiring line33, and the fourth columnar wiring line34extend in straight lines from the first coil wiring line21and the second coil wiring line22to the end surfaces thereof that are exposed from the first main surface10ain a direction perpendicular to the end surfaces. This enables the first outer terminal41, the second outer terminal42, the third outer terminal43, and the fourth outer terminal44and the first coil wiring line21and the second coil wiring line22to be connected to each other across shorter distances and as a result a lower resistance and a higher inductance can be realized for the inductor component1. The first to fourth columnar wiring lines31to34are composed of an electrically conductive material and for example are composed of the same material as the coil wiring lines21and22. The first to fourth outer terminals41to44are provided on the first main surface10aof the element body10(upper surface of second magnetic layer12). The first to fourth outer terminals41to44are composed of electrically conductive materials and for example have a three-layer structure consisting of Cu which has low electrical resistance and excellent stress resistance, Ni which has excellent corrosion resistance, and Au which has excellent solder wettability and reliability stacked in this order in a direction toward the outside. The first outer terminal41contacts the end surface of the first columnar wiring line31that is exposed from the first main surface10aof the element body10, and is electrically connected to the first columnar wiring line31. Thus, the first outer terminal41is electrically connected to one end of the first coil wiring line21. The second outer terminal42contacts the end surface of the second columnar wiring line32that is exposed from the first main surface10aof the element body10, and is electrically connected to the second columnar wiring line32. Thus, the second outer terminal42is electrically connected to the other end of the first coil wiring line21. Similarly, the third outer terminal43contacts an end surface of the third columnar wiring line33, is electrically connected to the third columnar wiring line33, and is thus electrically connected to one end of the second coil wiring line22. The fourth outer terminal44contacts an end surface of the fourth columnar wiring line34, is electrically connected to the fourth columnar wiring line34, and is thus electrically connected to the other end of the second coil wiring line22. The first outer terminal41is located closer to the third outer terminal43than to the fourth outer terminal44. In the inductor component1, the first main surface10ahas a first end edge103and a second end edge104that extend in straight lines corresponding to sides of a rectangular shape. The first end edge103and the second end edge104are the end edges of the first main surface10athat adjoin a first side surface10band a second side surface10cof the element body10. The first outer terminal41and the third outer terminal43are arranged along the first end edge103which is on the side of the element body10near the first side surface10band the second outer terminal42and the fourth outer terminal44are arranged along the second end edge104which is on the side of the element body10near the second side surface10c. Note that the first side surface10band the second side surface10cof the element body10are surfaces of the element body10that extend along the Y direction and coincide with the first end edge103and the second end edge104when looking in a direction perpendicular to the first main surface10aof the element body10. The direction in which the first outer terminal41and the third outer terminal43are arranged is a direction that connects the center of the first outer terminal41and the center of the third outer terminal43and the direction in which the second outer terminal42and the fourth outer terminal44are arranged is a direction that connects the center of the second outer terminal42and the center of the fourth outer terminal44. The insulating film50is provided on the parts of the first main surface10aof the element body10where the first to fourth outer terminals41to44are not provided. However, the insulating film50may overlap the first to fourth outer terminals41to44with the edges of the first to fourth outer terminals41to44being raised on top of the insulating film50. The insulating film50is for example composed of a resin material having a high electrical insulating property such as an acrylic resin, an epoxy resin, or polyimide. Thus, the degree of insulation between the first to fourth outer terminals41to44can be improved. Furthermore, the insulating film50takes the place of a mask used when forming the patterns of the first to fourth outer terminals41to44and manufacturing efficiency is improved. In addition, when the metal magnetic powder is exposed from the resin, the insulating film50can prevent the metal magnetic powder from being exposed to the outside by covering the exposed metal magnetic powder. Note that the insulating film50may contain a filler composed of an insulating material. FIG.1Cis a sectional view taken along line B-B inFIG.1A. As illustrated inFIG.1C, in a cross section that is perpendicular to the direction in which the first coil wiring line21extends, the first coil wiring line21has a top surface211, a bottom surface212that faces the top surface211, left and right side surfaces213that are interposed between the top surface211and the bottom surface212, and corners214interposed between the top surface211and the side surfaces213. The top surface211is positioned in the positive Z direction. The corners214are substantially shaped like ridge lines. In the cross section that is perpendicular to the direction in which the first coil wiring line21extends, a top surface thickness T1of the part of the insulating coating film15that covers the top surface211of the first coil wiring line21and a side surface thickness T3of the parts of the insulating coating film15that cover the side surfaces213of the first coil wiring line21are less than or equal to 10 μm, and a corner thickness T4of the parts of the insulating coating film15that cover the corners214interposed between the top surface211and the side surfaces213of the first coil wiring line21is greater than or equal to half of at least one out of the top surface thickness T1and the side surface thickness T3. The thicknesses T1, T3, and T4each represent the minimum thickness. As a method of measuring the thicknesses, the thicknesses are measured in a cross section that passes through the center of the inductor component1, that is, a YZ cross section in the center of the inductor component1in the X direction in this embodiment. Note that the insulating coating film15that covers the second coil wiring line22has the same configuration and therefore description thereof is omitted. Thus, the top surface thickness T1and the side surface thickness T3of the insulating coating film15are less than or equal to 10 μm, and therefore the thickness of the insulating coating film15can be reduced, and consequently, the inductor component1can be reduced in size or the inductance can be improved by increasing the size of the region occupied by the magnetic layer12. Furthermore, since the corner thickness T4of the insulating coating film15is greater than or equal to half of at least one out of the top surface thickness T1and the side surface thickness T3, the difference between the corner thickness T4and at least one out of the top surface thickness T1and the side surface thickness T3can be reduced, and as a result, the situation in which the parts of the insulating coating film15covering the corners214of the first coil wiring line21become thinner due to the surface tension generated during heat curing shrinkage and the corners214of the first coil wiring line21end up becoming exposed from the insulating coating film15can be suppressed. In short, the inventors of the present application were successful in forming the thickness of the part of the insulating resin layer covering the top surface of the coil wiring line so as to be less than 10 μm in the inductor component of the related art, but discovered that there is a risk of the coil wiring line becoming exposed from the insulating resin layer in this case. With further investigations, the inventors of the present application found that the corners of the first coil wiring line become exposed from the insulating coating film. Accordingly, the inventors of the present application focused on the thickness of the parts of the insulating coating film that cover the corners of the first coil wiring line and were able to prevent the corners of the first coil wiring line from becoming exposed from the insulating coating film by making the corner thickness T4be greater than or equal to half of at least one out of the top surface thickness T1and the side surface thickness T3. Note that the top surface thickness T1and the side surface thickness T3may be identical to each other, which makes it is easier to control the thicknesses. Alternatively, the top surface thickness T1and the side surface thickness T3may be different from each other and the thicknesses can be adjusted in accordance with the function of the device. The corner thickness T4may be identical to the top surface thickness T1and the side surface thickness T3, which makes it is easier to control the thickness. Alternatively, the corner thickness T4may be smaller than the top surface thickness T1and the side surface thickness T3, which makes it possible to further decrease the size (thickness) of the inductor component1. Alternatively, the corner thickness T4may be larger than the top surface thickness T1and the side surface thickness T3, which makes it possible to even more reliably prevent a situation in which the corners214of the first coil wiring line21become exposed from the insulating coating film15. The corner thickness T4is preferably greater than or equal to half of the smaller thickness out of the top surface thickness T1and the side surface thickness T3. As a result, the thickness of the insulating coating film15can be made even smaller. The corner thickness T4is preferably smaller than the larger thickness out of the top surface thickness T1and the side surface thickness T3. As a result, there is no need to make the corner thickness T4excessively large and the inductor component1can be efficiently manufactured. The top surface thickness T1, the side surface thickness T3, and the corner thickness T4are preferably each greater than or equal to 2 μm. As a result, the insulating property can be more reliably guaranteed. In this embodiment, the cross-sectional shape of the first coil wiring line is a substantially square shape and the shape of each corner214is that of an intersection where the top surface211and the corresponding side surface213intersect at around 90° and therefore the corner thickness T4tends to be comparatively small. As an example, the top surface thickness T1may be 4 μm, the side surface thickness T3may be 4 μm, and the corner thickness T4may be 2 μm. Manufacturing Method Next, a method of manufacturing the inductor component1will be described. First, a seed layer is formed on the top surface61bof the insulating layer61by performing sputtering, electroless plating, or the like. Next, a resist in which through holes have been formed at the places where the coil wiring lines21and22are to be located on the seed layer is arranged on the seed layer and the wiring lines are formed in the through holes of the resist by performing electrolytic plating. Formation of the coil wiring lines21and22is completed by removing the resist and the unwanted parts of the seed layer. Then, the insulating coating film15is formed on the coil wiring lines21and22using an insulation electrodeposition method. The thickness of the insulating coating film15can be made to be less than or equal to 10 μm by forming the insulating coating film15using electrodeposition in this way. At this time, the insulating coating film15is formed so that the corner thickness T4of the parts of the insulating coating film15that cover the corners214located between the top surface211and the side surfaces213of the coil wiring lines21and22is greater than or equal to half of at least one out of the top surface thickness T1and the side surface thickness T3. Thus, a situation in which the coil wiring lines21and22are exposed from the insulating coating film15can be suppressed. In addition, openings are formed at parts of the insulating coating film15above the coil wiring lines21and22using etching or a laser, and then the columnar wiring lines31to34that extend upward from the coil wiring lines21and22are formed. After that, the second magnetic layer12is formed on the insulating layer61so as to cover the coil wiring lines21and22and the columnar wiring lines31to34by pressure bonding a magnetic sheet composed of a magnetic material on the upper surface61bof the insulating layer61. The end surfaces of the columnar wiring lines31to34are exposed by subjecting the second magnetic layer12to grinding. After that, the insulating film50is formed on the upper surface of the second magnetic layer12. Through holes through which the end surfaces of the columnar wiring lines31to34and the second magnetic layer12are exposed are formed in regions of the insulating film50where the outer terminals will be formed. After that, part of the insulating layer61is removed by performing grinding. At this time, the insulating layer61is not completely removed, and part of the insulating layer61is left intact. The first magnetic layer11is formed by pressure bonding a magnetic sheet composed of a magnetic material to the lower surface61aon the ground down side of the insulating layer61and then grinding down the magnetic sheet to a suitable thickness. After that, the outer terminals41to44are formed by forming metal films that grow from the columnar wiring lines31to34inside the through holes of the insulating film50by performing electroless plating. Second Embodiment FIG.2is a sectional view illustrating an inductor component according to a second embodiment. The second embodiment differs from the first embodiment with respect to the shape of corners of the coil wiring lines. This difference will be described below. The rest of the configuration is the same as in the first embodiment, and parts that are the same as in the first embodiment are denoted by the same symbols and description thereof is omitted. As illustrated inFIG.2, in an inductor component of the second embodiment, the corners214A of a first coil wiring line21A are each substantially shaped like a chamfered surface. The term “chamfered surface” used in the present specification does not include a convexly-curved surface. Specifically, corners214A having substantially tapered shapes are located between the top surface211and the side surfaces213of the first coil wiring line21A. As a result, it is easy to realize a structure in which the corner thickness T4is greater than or equal to half of at least one out of the top surface thickness T1and the side surface thickness T3. Note that the corners of the second coil wiring line have the same configuration and therefore description thereof is omitted. In particular, in this embodiment, since the corners214A are each substantially shaped like a chamfered surface, the top surface thickness T1and side surface thickness T3and the corner thickness T4can be made close to each other. Therefore, as an example, the top surface thickness T1may be 2 μm, the side surface thickness T3may be 2 μm, and the corner thickness T4may be 2 μm. Therefore, the top surface thickness T1and the side surface thickness T3can be made smaller compared with the example of the first embodiment. Next, a method of manufacturing the first coil wiring line21A will be described. As illustrated inFIG.3A, a first resist101is provided on a seed layer100, the first resist101is patterned using photolithography to form a through hole101a, and a metal film110is formed on the seed layer100inside the through hole101ausing a plating process. As illustrated inFIG.3B, a second resist102is provided on the metal film110and the second resist102is patterned using photolithography so as to expose end portions110aof the upper surface of the metal film110from the second resist102. As illustrated inFIG.3C, corners110bof the metal film110are formed into substantially chamfered shaped surfaces by removing parts of the end portions110aof the metal film110by performing etching. Thus, the first coil wiring line21A having substantially chamfered surface shaped corners214A can be manufactured. In this case, it is also possible to make the corners214A be substantially shaped like concave surfaces, as illustrated inFIG.3C, by adjusting the etching process time and so forth, and this also makes it easier to secure the corner thickness T4of the insulating coating film15. Third Embodiment FIG.4is a sectional view illustrating an inductor component according to a third embodiment. The third embodiment differs from the first embodiment with respect to the shape of corners of the coil wiring lines. This difference will be described below. The rest of the configuration is the same as in the first embodiment, and parts that are the same as in the first embodiment are denoted by the same symbols and description thereof is omitted. As illustrated inFIG.4, in an inductor component of the third embodiment, corners214B of a first coil wiring line21B are substantially shaped like convexly-curved surfaces. Specifically, substantially curved corners214B are located between the top surface211and the side surfaces213of the first coil wiring line21B. As a result, it is easy to realize a structure in which the corner thickness T4is greater than or equal to half of at least one out of the top surface thickness T1and the side surface thickness T3. Note that the corners of the second coil wiring line have the same configuration and therefore description thereof is omitted. In this embodiment, since the corners214B are substantially shaped like convexly-curved surfaces, the top surface thickness T1and the side surface thickness T3and the corner thickness T4can be made close to each other. Therefore, as an example, the top surface thickness T1may be 2 μm, the side surface thickness T3may be 2 μm, and the corner thickness T4may be 2 μm. Therefore, the top surface thickness T1and the side surface thickness T3can be made smaller compared with the example of the first embodiment. Next, a method of manufacturing the first coil wiring line21B will be described. As illustrated inFIG.5A, a first resist101is provided on a seed layer100, the first resist101is patterned using photolithography to form a through hole101a, and a first metal film111is formed on the seed layer100inside the through hole101ausing a plating process. As illustrated inFIG.5B, the first resist101is removed so as to expose the first metal film111, and as illustrated inFIG.5C, the first metal film111subjected to further plating (extra plating processing) to form a second metal film112. At this time, corners112bof the metal film112are formed so as to be substantially shaped like convexly-curved surfaces. Thus, the first coil wiring line21B that has substantially convexly-curved-surface-shaped corners214B can be manufactured. The present disclosure is not limited to the above-described embodiments and design changes can be made within a range that does not depart from the gist of the present disclosure. For example, the characteristic features of the first to third embodiments may be combined with each other in various ways. In the above-described embodiments, two coil wiring lines, namely, the first coil wiring line and the second coil wiring line, are arranged inside the element body, but one or three or more coil wiring lines may instead be arranged inside the element body, and in this case, each coil wiring line is covered with an insulating coating film. In the above-described embodiments, the number of turns of each coil wiring line is less than one turn, but the number of turns of each coil wiring line may exceed one turn. In this case, every turn of the coil wiring lines is covered with an insulating coating film. Therefore, the size of a region occupied by a magnetic layer between adjacent turns of a coil wiring line can be increased. In addition, the total number of coil wiring lines is not limited to one layer and there may be two or more layers in a multilayer configuration. In particular, the term “coil wiring line” used in the present specification refers to a coil wiring line that gives inductance to an inductor component by generating magnetic flux in a magnetic layer when a current flows and there are no particular restrictions on the structure, shape, material, and so forth of the coil wiring lines. Specifically, the coil wiring lines are not limited to forming a spiral curve extending along a plane as described in the embodiments and various known wiring line shapes such as meandering wiring lines can be used. The columnar wiring lines are not covered by an insulating coating film in the above-described embodiments, but the columnar wiring lines may be covered by an insulating coating film. Furthermore, although the shape of the columnar wiring lines is a substantially rectangular shape when looking in the Z direction, the shape may instead be a substantially circular, elliptical, or oval shape. While preferred embodiments of the disclosure have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the disclosure. The scope of the disclosure, therefore, is to be determined solely by the following claims. | 35,603 |
11942256 | DETAILED DESCRIPTION The following detailed description is provided to assist the reader in gaining a comprehensive understanding of the methods, apparatuses, and/or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatuses, and/or systems described herein will be apparent to one of ordinary skill in the art. The sequences of operations described herein are merely examples, and are not limited to those set forth herein, but may be changed as will be apparent to one of ordinary skill in the art, with the exception of operations necessarily occurring in a certain order. Also, descriptions of functions and constructions that would be well known to one of ordinary skill in the art may be omitted for increased clarity and conciseness. The features described herein may be embodied in different forms, and are not to be construed as being limited to the examples described herein. Rather, the examples described herein have been provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to one of ordinary skill in the art. Herein, it is noted that use of the term “may” with respect to an embodiment or example, e.g., as to what an embodiment or example may include or implement, means that at least one embodiment or example exists in which such a feature is included or implemented while all examples and examples are not limited thereto. Throughout the specification, when an element, such as a layer, region, or substrate, is described as being “on,” “connected to,” or “coupled to” another element, it may be directly “on,” “connected to,” or “coupled to” the other element, or there may be one or more other elements intervening therebetween. In contrast, when an element is described as being “directly on,” “directly connected to,” or “directly coupled to” another element, there can be no other elements intervening therebetween. As used herein, the term “and/or” includes any one and any combination of any two or more of the associated listed items. Although terms such as “first,” “second,” and “third” may be used herein to describe various members, components, regions, layers, or sections, these members, components, regions, layers, or sections are not to be limited by these terms. Rather, these terms are only used to distinguish one member, component, region, layer, or section from another member, component, region, layer, or section. Thus, a first member, component, region, layer, or section referred to in examples described herein may also be referred to as a second member, component, region, layer, or section without departing from the teachings of the examples. Spatially relative terms such as “above,” “upper,” “below,” and “lower” may be used herein for ease of description to describe one element's relationship to another element as illustrated in the figures. Such spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as being “above” or “upper” relative to another element will then be “below” or “lower” relative to the other element. Thus, the term “above” encompasses both the above and below orientations depending on the spatial orientation of the device. The device may also be oriented in other ways (for example, rotated 90 degrees or at other orientations), and the spatially relative terms used herein are to be interpreted accordingly. Throughout the specification, the term “on” means to be positioned above or below the target portion, and does not necessarily mean to be positioned above the direction of gravity. The terminology used herein is for describing various examples only, and is not to be used to limit the disclosure. The articles “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms “comprises,” “includes,” and “has” specify the presence of stated features, numbers, operations, members, elements, and/or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, operations, members, elements, and/or combinations thereof. Due to manufacturing techniques and/or tolerances, variations of the shapes illustrated in the drawings may occur. Thus, the examples described herein are not limited to the specific shapes illustrated in the drawings, but include changes in shape that occur during manufacturing. The features of the examples described herein may be combined in various ways as will be apparent after gaining an understanding of the disclosure of this application. Further, although the examples described herein have a variety of configurations, other configurations are possible as will be apparent after an understanding of the disclosure of this application. The drawings may not be to scale, and the relative sizes, proportions, and depiction of elements in the drawings may be exaggerated for clarity, illustration, and convenience. Since the sizes and thicknesses of respective components illustrated in the drawings are arbitrarily illustrated for convenience of description, the present disclosure is not necessarily limited to the illustration of the drawings. In the drawings, the X direction may be defined as a first direction or a length direction, the Y direction may be defined as a second direction or a width direction, and the Z direction may be defined as a third direction or a thickness direction. Hereinafter, a coil component according to an embodiment will be described in detail with reference to the accompanying drawings, and in the description with reference to the accompanying drawings, the same or corresponding components are assigned the same reference numbers and overlapped descriptions thereof are omitted. Various types of electronic components are used in electronic devices, and various types of coil components may be appropriately used between the electronic components, to remove noise or the like. For example, coil components in electronic devices may be used as power inductors, high frequency inductors (HF inductors), general beads, high frequency beads (GHz beads), common mode filters, or the like. First Embodiment FIG.1is a view schematically illustrating a coil component according to a first embodiment.FIG.2is a view of the coil component ofFIG.1, viewed from below.FIG.3is a cross-sectional view taken along line I-I′ ofFIG.1.FIG.4is an enlarged view of portion A ofFIG.3. Referring toFIGS.1and2, a coil component1000according to the first embodiment includes a body100, a support substrate200, first and second coil portions310and320, and first and second lead-out portions410and420, and may further include first and second auxiliary lead-out portions510and520, first and second connection vias610and620, and first and second external electrodes710and720. The support substrate200is disposed inside the body100to be described later, and supports the first and second coil portions310and320and the first and second lead-out portions410and420. The support substrate200may be formed of an insulating material including a thermosetting insulating resin such as an epoxy resin, a thermoplastic insulating resin such as polyimide, or a photoimageable dielectric resin, or may be formed of an insulating material impregnated with a reinforcing material such as glass fiber or inorganic filler. As an example, the support substrate200may be formed of an insulating material such as Prepreg, Ajinomoto Build-up Film (ABF), FR-4, Bismaleimide Triazine (BT) film, Photo Imageable Dielectric (PID) film, or the like, but the material is not limited thereto. As the inorganic filler, at least one or more selected from the group consisting of silica (SiO2), alumina (Al2O3), silicon carbide (SiC), barium sulfate (BaSO4), talc, mud, mica powder, aluminum hydroxide (Al(OH)3), magnesium hydroxide (Mg(OH)2), calcium carbonate (CaCO3), magnesium carbonate (MgCO3), magnesium oxide (MgO), boron nitride (BN), aluminum borate (AlBO3), barium titanate (BaTiO3) and calcium zirconate (CaZrO3) may be used. When the support substrate200is formed of an insulating material including a reinforcing material, the support substrate200may provide more excellent rigidity. When the support substrate200is formed of an insulating material that does not contain glass fibers, the support substrate200may be advantageous in reducing the overall thickness of the first and second coil portions310and320. The central portion of the support substrate200may be penetrated to form a through-hole (not illustrated), and the through-hole (not illustrated) may be filled with a magnetic material of the body100to be described later to form a core portion110. In this manner, the performance of the inductor may be improved by forming the core portion110filled with the magnetic material. The support portion210is a region of the support substrate200, which is disposed between the first and second coil portions310and320to be described later, to support the first and second coil portions310and320. First and second end portions221and222extend from the support portion210and support the first and second lead-out portions410and420and first and second auxiliary lead-out portions510and520to be described later, in the support substrate200. Specifically, the first end portion221is disposed between the first lead-out portion410and the first auxiliary lead-out portion510to support the first lead-out portion410and the first auxiliary lead-out portion510. The second end portion222is disposed between the second lead-out portion420and the second auxiliary lead-out portion520to support the second lead-out portion420and the second auxiliary lead-out portion520. The first and second end portions221and222are exposed on the first surface101of the body100to be spaced apart from each other. The first and second coil portions310and320are disposed on at least one surface of the support substrate200and express the characteristics of the coil component. For example, when the coil component1000of the present embodiment is used as a power inductor, the first and second coil portions310and320may serve to store electrical fields as magnetic fields and maintain the output voltage to stabilize the power of electronic devices. Referring toFIGS.1and2, the first and second coil portions310and320are disposed on two surfaces of the support substrate200opposing each other, respectively. The first coil portion310may be disposed on a first surface of the support substrate200, to face the second coil portion320disposed on a second surface of the support substrate200. The first and second coil portions310and320may be electrically connected to each other through a via electrode120penetrating through the support substrate200. Each of the first coil portion310and the second coil portion320may have a planar spiral shape in which at least one turn is formed around the core portion110. For example, the first coil portion310may form at least one turn about the core portion110on the first surface of the support substrate200. According to an embodiment, the first and second coil portions310and320may be formed to be upright with respect to the first surface101or the second surface102of the body100. Being formed to be upright with respect to the first surface101or the second surface102of the body100means that a surface of the first and second coil portions310and320in contact with the support substrate200is formed to be vertical or almost vertical with respect to the first surface101or the second surface102of the body100. For example, the first and second coil portions310and320and the first surface101or the second surface102of the body100may be formed upright at 80° to 100°. On the other hand, the first and second coil portions310and320may be formed to be parallel to the fifth surface105and the sixth surface106of the body100. For example, the surface of the first and second coil portions310and320in contact with the support substrate200may be parallel to the fifth surface105and the sixth surface106of the body100. As the coil component1000is downsized to a size of 1608 or 1006 or less, the body100having a thickness greater than a width is formed, and the cross-sectional area of the cross section in the X-Z direction of the body100becomes larger than the cross-sectional area in the X-Y direction. Therefore, as the first and second coil portions310and320are formed upright with respect to the first surface101or the second surface102of the body100, the area in which the first and second coil portions310and320may be formed increases. As the area in which the first and second coil portions310and320are formed increases, the inductance L and the quality factor Q may be improved. Referring toFIG.3, the first and second coil portions310and320have a constant line width up to ends3101and3201of outermost turns, respectively. The ends3101and3201of the outermost turns of the first and second coil portions, respectively, are disposed in the lower side of the body100based on the center of the body100in the thickness direction Z. For example, based on the center line I-I′ penetrating through the central portion of the body100in the thickness direction Z, each of the ends3101and3201of the outermost turns is disposed in the lower portion of the body100, so that the number of the outermost turns of the first and second coil portions310and320is increased, as compared to the case in which the ends3101and3201are located on the center line I-I′. For example, since the numbers of turns of the first coil portion310and the second coil portion320are each increased by a ¼ turn based on the support substrate200, the areas occupied by the coil portions310and320may be increased. The body100forms the exterior of the coil component1000according to the present embodiment, and includes the support substrate200and the first and second coil portions310and320embedded therein. The body100may be formed in the shape of a hexahedron as a whole. The body100includes a first surface101and a second surface102opposing each other in the thickness direction Z, and a third surface103and a fourth surface104opposing each other in the length direction X, and a fifth surface105and a sixth surface106opposing each other in the width direction Y, based onFIG.1. Hereinafter, one surface and the other surface of the body100may refer to the first surface101and the second surface102of the body100, respectively, and one side and the other side of the body100may refer to the third surface103and the fourth surface104of the body100, respectively. In addition, one end surface and the other end surface of the body100may refer to the fifth surface105and the sixth surface106of the body100, respectively. The body100may be for example formed in such a manner that the coil component1000of the present embodiment in which the first and second external electrodes710and720to be described later are formed has a length of 1.0 mm, a width of 0.5 mm, and a thickness of 0.8 mm, but the configuration is not limited thereto. On the other hand, since the above-described numerical values are merely design values that do not reflect process errors, etc., it should be considered to be within the scope of the present disclosure to the extent that may be recognized as a process error. The body100may include a magnetic material and an insulating resin. Specifically, the body100may be formed by laminating one or more magnetic sheets including an insulating resin and a magnetic material dispersed in the insulating resin. The body100may also have a structure different from the structure in which a magnetic material is dispersed in an insulating resin. For example, the body100may also be formed of a magnetic material such as ferrite. The magnetic material may be ferrite or magnetic metal powder. Ferrite powder particles may be at least one or more of, for example, spinel type ferrites such as Mg—Zn-based, Mn—Zn-based, Mn—Mg-based, Cu—Zn-based, Mg—Mn—Sr-based and Ni—Zn-based ferrites, hexagonal ferrites such as Ba—Zn-based, Ba—Mg-based, Ba—Ni-based, Ba—Co-based and Ba—Ni—Co-based ferrites, garnet type ferrites such as Y series, and Li ferrites. In addition, the magnetic metal powder included in the body100may include at least one of iron (Fe), silicon (Si), chromium (Cr), cobalt (Co), molybdenum (Mo), aluminum (Al), niobium (Nb), copper (Cu), nickel (Ni) and alloys thereof. For example, the magnetic metal powder may be at least one or more of pure iron powder, Fe—Si alloy powder, Fe—Si—Al alloy powder, Fe—Ni alloy powder, Fe—Ni—Mo alloy powder, Fe—Ni—Mo—Cu alloy powder, Fe—Co alloy powder, Fe—Ni—Co alloy powder, Fe—Cr alloy powder, Fe—Cr—Si alloy powder, Fe—Si—Cu—Nb alloy powder, Fe—Ni—Cr alloy powder, and Fe—Cr—Al alloy powder. In this case, the magnetic metal powder may be amorphous or crystalline. For example, the magnetic metal powder may be a Fe—Si—B—Cr-based amorphous alloy powder, but is not limited thereto. Ferrite and magnetic metal powder may each have an average diameter of about 0.1 μm to 30 μm, but are not limited thereto. The body100may include two or more types of magnetic materials dispersed in an insulating resin. In this case, that the magnetic materials are of different types means that the magnetic materials dispersed in the insulating resin are distinguished from each other by any one of an average diameter, composition, crystallinity, and shape. The insulating resin may include, but is not limited to, epoxy, polyimide, liquid crystal polymer, or the like alone or as a mixture. The first and second lead-out portions410and420are connected to the ends3101and3201of the outermost turns of the first and second coil portions, respectively, and are exposed to the first surface101of the body100, to be spaced apart from each other. However, the first and second lead-out portions410and420are spaced apart from the third and fourth surfaces103and104of the body100. Referring toFIGS.1and2, the end3101of the outermost turn of the first coil portion formed on the first surface of the support substrate200is extended to form the first lead-out portion410, and the first lead-out portion410is exposed to the first surface101of the body100. The end3201of the outermost turn of the second coil portion320is extended to the second surface of the support substrate200opposing the first surface of the support substrate200to form a second lead-out portion420, and the second lead-out portion420is exposed to the first surface101of the body100to be spaced apart from the first lead-out portion410. Referring toFIGS.1and2, the first and second external electrodes710and720and the first and second coil portions310and320are connected through the first and second lead-out-portions410and420disposed in the body100. Referring toFIGS.3and4, the first and second lead-out portions410and420have upper surfaces connected to the ends3101and3201of the outermost turns of the first and second coil portions, respectively, and lower surfaces opposing the upper surfaces and exposed to the first surfaces101of the body100, respectively. Referring toFIG.4, an area S1of the upper surface of each of the first and second lead-out portions410and420is larger than an area S2of the lower surface of each of the first and second lead-out portions410and420. Further, a line width D1of the upper surface of each of the first and second lead-out portions410and420is greater than a line width dl of the lower surface of each of the first and second lead-out portions410and420. In one embodiment, respective angles between the upper surfaces of the first and second lead-out portions410and420and outer circumferential surfaces of the outermost turns of the first and second coil portions310and320may range between 0 degree and 90 degree. The first lead-out portion410includes an anchor portion4101connected to the end3101of the outermost turn of the first coil portion and inserted into the body100. On the other hand, although not specifically illustrated, an anchor portion connected to the end3201of the outermost turn of the second coil portion and inserted into the body100may be included. In this embodiment, the description of the first lead-out portion410is also applied to the second lead-out portion420unless there are special circumstances, and the description of the anchor portion of the first lead-out portion410may also be applied to the anchor portion of the second lead-out portion. On the other hand, the first and second lead-out portions410and420may include the anchor portions4101connected to the upper surfaces of the first and second lead-out portions410and420and protruding toward the third and fourth surfaces103and104of the body100, respectively. The protruding portions of the first and second lead-out portions410and420may share the upper surfaces of the first and second lead-out portions410and420, respectively. In one embodiment, each of the first and second lead-out portions410and420may include a tapered portion in a direction from the upper surfaces to the lower surfaces of the first and second lead-out portions410and420. In the case of a related art coil component, in which an end of an outermost turn is disposed closer to a lower side of a body, since a line width of the end of the outermost turn is smaller than a line width of a lead portion, there is a problem in that the reliability of a connection portion between the coil portion and the external electrode is deteriorated. However, in this embodiment of the present disclosure, as the line widths of the lead-out portions410and420connected to the ends3101and3201of the outermost turns are wider than the line widths of the lead-out portions410and420exposed on the lower surface of the body100, the aforementioned deterioration of connection reliability may be prevented. For example, in a case in which external force acts on portions of the first and second lead-out portions410and420through the anchor portions4101of the lead-out portions410and420inserted into the body100, connection reliability between the lead-out portions410and420and the body100may be improved. The first and second auxiliary lead-out portions510and520are disposed on both surfaces of the support substrate200to correspond to the first and second lead-out portions410and420. Specifically, the first auxiliary lead-out portion510is disposed to correspond to the first lead-out portion410on the second surface of the first end portion221of the support substrate200, and is spaced apart from the second coil portion320. The second auxiliary lead-out portion520is disposed to correspond to the second lead-out portion420on the first surface of the second end portion222of the support substrate200, and is spaced apart from the first coil portion310. The first and second auxiliary lead-out portions510and520are disposed to be spaced apart from each other on the first surface101of the body100. The first and second auxiliary lead-out portions510and520are electrically connected to the first and second lead-out portions410and420by the first and second connection vias610and620to be described later, and may be directly connected to the first and second external electrodes710and720. Since the first and second auxiliary lead-out portions510and520are directly connected to the first and second external electrodes710and720, the adhesive strength between the first and second external electrodes710and720and the body100may be improved. The body100includes an insulating resin and a metallic magnetic material, and the first and second external electrodes710and720include a conductive metal, so that they are formed of different materials, and thus, there is a strong tendency not to be mixed with each other. Therefore, by forming the first and second auxiliary lead-out portions510and520inside the body100to be exposed to the outside of the body100, the first and second external electrodes710and720and the first and second auxiliary lead-out portions510and520may be additionally connected. The connection between the first and second auxiliary lead-out portions510and520and the first and second external electrodes710and720is a connection between metal and metal, to have bonding force stronger than the bonding between the body100and the first and second external electrodes710, thereby resulting in improving the bonding force between the external electrodes710and720and the external electrodes710and720to the body100. On the other hand, although not specifically illustrated, the coil component of the present embodiment may further include anchor portions formed on the first and second auxiliary lead-out portions510and520. In the present embodiment, unless there are special circumstances, the description of the anchor portion of the first auxiliary lead-out portion510may be similarly applied to the anchor portion of the second auxiliary lead-out portion520. In this embodiment, as the line width of the auxiliary lead-out portions510,520adjacent to the ends3101and3201of the outermost turns is greater than the line width of the auxiliary lead-out portions510and520exposed on the lower surface of the body100, connection reliability between the body100and the external electrodes710and720may be further improved. For example, when external force acts on portions of the auxiliary lead-out portions510and520through the anchor portions of the auxiliary lead-out portions510and520inserted into the body100, connection reliability between the auxiliary lead-out portions510and520and the body100may be improved. The first coil portion310, the first lead-out portion410, the first auxiliary lead-out portion510, and the via electrode120are integrally formed so that a boundary may not be formed therebetween, which is only exemplary. Therefore, the case in which the above-described components are formed at different stages to form a boundary therebetween is not excluded from the scope of the present disclosure. In this embodiment, for convenience of descriptions, the first coil portion310, the first lead-out portion410, and the first auxiliary lead-out portion510are described, but the same descriptions may also be applied to the second coil portion320, the second lead-out portion420, and the second auxiliary lead-out portion520. At least one of the first coil portion310, the first lead-out portion410, the first auxiliary lead-out portion510, and the via electrode120may include at least one conductive layer. For example, when the first coil portion310, the first lead-out portion410, the first auxiliary lead-out portion510, and the via electrode120are formed by plating on the first surface of the support substrate200, each of the first coil portion310, the first lead-out portion410, the first auxiliary lead-out portion510, and the via electrode120may include a seed layer and a plating layer. The seed layer may be formed by a vapor deposition method such as an electroless plating method or sputtering. The seed layer is formed entirely along the shape of the first coil portion310. The thickness of the seed layer is not particularly limited, but may be formed to be thinner than the plating layer. Next, a plating layer may be disposed on the seed layer. As a non-limiting example, the plating layer may be formed using electroplating. Each of the seed layer and the plating layer may have a single layer structure or a multilayer structure. The multilayer plating layer may be formed in a conformal film structure in which one plating layer is covered by the other plating layer, or may be formed in a form in which the other plating layer is laminated on only one surface of any one plating layer. The first coil portion310, the first lead-out portion410, the first auxiliary lead-out portion510, and the seed layer of the via electrode120are integrally formed so that a boundary may not be formed therebetween, but the configuration is limited thereto. The seed layer and the plating layer of the first coil portion310, the first lead-out-portion410, the first auxiliary lead-out-portion510, and the via electrode120may be formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), molybdenum (Mo), or alloys thereof, but the material thereof is not limited thereto. The first and second connection vias610and620connect the first and second lead-out portions410and420to the first and second auxiliary lead-out portions510and520. The first auxiliary lead-out portion510and the first lead-out portion410are connected to each other by the first connection via610penetrating through the first end portion221. The second auxiliary lead-out portion520and the second lead-out portion420are connected to each other by the second connection via620penetrating through the second end portion222. Specifically, referring toFIG.3, the first connection via610penetrates through the first lead-out portion410and the first auxiliary lead-out portion510, to be disposed inside the body100, and the second connection via620penetrates through the second lead-out portion420and the second auxiliary lead-out portion520, to be disposed inside the body100. As a result, cross-sections of the first and second connection vias610and620disposed inside the body100have a circular shape based on the width direction Y of the body100. On the other hand, the present embodiment illustrates the case in which only one connection via610,620is present in the lead-out portions410and420, respectively, but the number of connection vias610and620is not limited thereto, and for example, may be plural. The first and second connection vias610and620can be disposed to be spaced apart from the first surface101of the body100. On the other hand, the first and second connection vias610and620can be exposed to the first surface101of the body100and covered by the first and second external electrodes710and720to be described later, respectively. The first and second external electrodes710and720are disposed to be spaced apart from each other on the first surface101of the body100, and cover the first and second lead-out portions410and420, respectively. The first external electrode710connectively contacts the first lead-out portion410and the first auxiliary lead-out portion510, and the second external electrode720connectively contacts the second lead-out portion420and the second auxiliary lead-out portion520. When the coil component1000according to the present embodiment is mounted on a printed circuit board, the first and second external electrodes710and720electrically connect the coil component1000to the printed circuit board or the like. As an example, the coil component1000according to the present embodiment may be mounted so that the first surface101of the body100faces the upper surface of the printed circuit board, and in this case, since the first and second external electrodes710and720are spaced apart from each other on the first surface101of the body100, the connection portion of the printed circuit board may be electrically connected. The first and second external electrodes710and720may include at least one of a conductive resin layer and an electroplating layer. The conductive resin layer may be formed, by printing a conductive paste on the surface of the body100to then be cured. The conductive paste may include any one or more conductive metal selected from the group consisting of copper (Cu), nickel (Ni), and silver (Ag), and a thermosetting resin. The electroplating layer may include at least one selected from the group consisting of nickel (Ni), copper (Cu), and tin (Sn). In this embodiment, the first and second external electrodes710and720may include first layers7101and7201formed on the surface of the body100and in direct contact with the first and second lead-out portions410and420and the first and second auxiliary lead-out portions510and520, and second layers7102and7202disposed on the first layers7101and7201, respectively. For example, the first layers7101and7201may be nickel (Ni) plating layers, and the second layers7102and7202may be tin (Sn) plating layers, but are not limited thereto. Referring toFIGS.1and2, the first layers7101and7102are not disposed on the first and second end portions221and222exposed on the outer surface of the body100. For example, a spaced portion may be formed in a central portion between the first layers7101and7102and the first and second end portions221and222. Since electrical connection characteristics between the first and second end portions221and222and the first and second lead-out portions410and420are different from each other, the first and second layers7101and7201formed of metal are is mainly plated on the surfaces of the first and second lead-out portions410and420and the first and second auxiliary lead-out portions510and520. As a result, in the first layers7101and7201disposed on the first and second lead-out portions410and420and the first and second auxiliary lead-out portions510and520are the first and second end portions221, a spaced portion is formed in a region thereof corresponding to the first and second ends221and222. On the other hand, the second layers7102and7202may be disposed along the first layers7101and7201to cover the first layers7101and7201and the first and second end portions221and222. Since the second layers7102and7202also do not have strong bonding strength with the first and second end portions221and222, a concave portion may be formed in the central portion of the second layers7102and7202. Although not specifically illustrated, the coil component of this embodiment may further include an insulating film (not illustrated) formed between the coil portions310and320and the lead-out portions410and420and between the lead-out portions410and420and the body100, respectively. In this embodiment, since the body100includes magnetic metal powder particles, the insulating film (not illustrated) is disposed between the support substrate200and the coil portions310and320, and the lead-out portions410and420and the body100, to insulate the coil portions310and320and the lead-out portions410and420. As an example, the insulating film (not illustrated) may be formed of a thin parylene layer, but the material is not limited thereto. For example, the insulating film (not illustrated) may be formed by a spray coating method including a resin. First Modified Example of First Embodiment FIG.5is a diagram illustrating a first modified example of the first embodiment, and is a view corresponding toFIG.3.FIG.6is an enlarged view of portion B inFIG.5. A coil component1000according to the present modified example has a different shape of the lead-out portion compared to the coil component1000according to the first embodiment. Therefore, in describing the present modified example, only the shape of the lead-out portion different from that of the first embodiment will be described. For the rest of the configuration of this modification, the description in the first embodiment may be applied as it is. Referring toFIG.5, the upper surface of the first and second lead-out portions410and420has a curved shape. The first and second lead-out portions410and420include anchor portions4101connected to the upper surfaces of the first and second lead-out portions410and420and protruding toward the second surface102of the body100, respectively. As a result, compared to the case in which the anchor portion includes corners of a polygonal shape, since the stress concentration in the corner region may be reduced, the connection reliability between the body100and the external electrodes710and720may be further improved. Referring toFIGS.5and6, a distance D′ from the upper surfaces of the first and second lead-out portions410and420to the lower surfaces of the first and second lead-out portions410and420increase toward the third and fourth surfaces103and104of the body100, respectively. In this modified example, the area of the lead-out portion connected to the outermost turn may be secured in the entire component through the curved shape of the lead-out portion, and thus, the connection reliability between the body100and the external electrodes710and720may be further improved. Second Modified Example of First Embodiment FIG.7is a diagram illustrating a second modified example of the first embodiment, and is a view corresponding toFIG.3.FIG.8is an enlarged view of portion C ofFIG.7. A coil component1000according to the present modified example has a different shape of the lead-out portion compared to the coil component1000according to the first embodiment. Therefore, in describing the present modified example, only the shape of the lead-out portion different from that of the first embodiment will be described. For the rest of the configuration of this modification, the description in the first embodiment may be applied as it is. Referring toFIG.7, the first and second lead-out portions410and420may include anchor portions4101connected to the upper surfaces of the first and second lead-out portions410and420and protruding toward the third and fourth surfaces103and104of the body100, respectively. Inner side surfaces of the first and second lead-out portions410and420in the X direction are substantially flat without having a protruding portion. The anchor portions4101serve to reinforce the bonding force between the first and second lead-out portions410and420and the body100. For example, in this modified example, an area occupied by the body in the entirety of the component may be significantly secured, and in a case in which external force acts on the first and second lead-out portions410and420, the reliability of connection between the first and second lead-out portions410and420and the body100may be improved. Referring toFIG.7, the upper surfaces of the first and second lead-out portions410and420have a curved shape. The first and second lead-out portions410and420include anchor portions4101connected to the upper surfaces of the first and second lead-out portions410and420and protruding toward the second surface102of the body100, respectively. As a result, compared to a case in which the anchor portion includes a polygonal corner, since the stress concentration in the corner region may be reduced, the connection reliability between the body100and the external electrodes710and720may be further improved. Referring toFIGS.7and8, distances D′ from the upper surface of the first and second lead-out portions410and420to the lower surface of the first and second lead-out portions410and420increases toward the fourth and third surfaces104and103of the body100, respectively. In this modified example, the area of the lead-out portion connected to the outermost turn may be secured in the entire component through the curved shape of the lead-out portion, and thus, the connection reliability between the body100and the external electrodes710and720may be further improved. Third Modified Example of First Embodiment FIG.9is a view illustrating a third modified example of the first embodiment, and is a view corresponding toFIG.3.FIG.10is an enlarged view of portion D inFIG.9. A coil component1000according to the present modified example has a different shape of the lead-out portion compared to the coil component1000according to the first embodiment. Therefore, in describing the present modified example, only the shape of the lead-out portion different from that of the first embodiment will be described. For the rest of the configuration of this modification, the description in the first embodiment may be applied as it is. Referring toFIG.9, the first and second lead-out portions410and420include an anchor portion4101connected to the end3101of the outermost turn of the first coil portion and protruding toward the inside of the body100, and an anchor portion connected to the end of the outermost turn of the second coil portion320and protruding toward the inside of the body100. That is, outer side surfaces of the first and second lead-out portions410and420in the X direction are substantially flat without having a protruding portion. In this modified example, an area occupied by the body in the entire component may be significantly secured, and in a case in which external force acts on the first and second lead-out portions410and420, the reliability of the connection between the first and second lead-out portions410and420and the body100may be improved. Second Embodiment FIG.11is a view schematically illustrating a coil component according to a second embodiment. FIG.12is a view of the coil component ofFIG.11viewed from below.FIG.13is a cross-sectional view taken along line II-II′ ofFIG.11. In the case of a coil component2000according to the present embodiment, the shapes of first and second connection vias610and620and first and second external electrodes710and720are different from those of the coil component1000according to the first embodiment. Therefore, in describing the present embodiment, only the shapes of the first and second connection vias610and620and the shapes of the first and second external electrodes710and720different from those of the first embodiment will be described. For the rest of the configuration of the present embodiment, the description in the first embodiment may be applied as it is. Referring toFIGS.11and12, the first connection via610is disposed on a first end portion221, and the second connection via620is disposed on a second end portion222, so that the first and second connection vias610and620are exposed to be spaced apart from each other on the first surface101of the body100. Specifically, referring toFIG.11, the first connection via610penetrates through the first lead-out portion410and the first auxiliary lead-out portion510to be disposed in an area of the first end portion221exposed to the first surface101of the body100, and the second connection via620respectively penetrates through the second lead-out portion420and the second auxiliary lead-out portion520to be disposed in an area of the second end portion222exposed to the first surface101of the body100. As a result, the cross sections of the first and second connection vias610and620disposed on the first and second end portions221and222, in the width direction Y of the body100, has a shape in which a circle is partially removed. Referring toFIGS.11and12, the coil component2000according to the embodiment further includes a first external electrode710covering the first lead-out portion410and the first connection via610, and a second external electrode720respectively covering the second lead-out portion420and the second connection via620. On the other hand, referring toFIGS.11and12, in first layers7101and7201covering the first and second end portions221and222in which the first and second connection vias610and620are not disposed, a spaced portion may be generated as in the first embodiment. However, plating may be performed in the spaced portion to fill the first layers7101and7201by adjusting the plating speed, the intensity of the current applied during plating, and the plating concentration. For example, since the first and second connection vias610and620exposed to the outer surface of the body100include a conductive material, the plating of the first layers7101and7201on the first and second end portions221and222may be facilitated. On the other hand, the second layers7102and7202are disposed on the first layers7101and7201to cover the first layers7101and7201and the first and second end portions221and222. For example, referring toFIG.10, unlike in the first embodiment, the second layers7102and7202may not include concave portions. In this embodiment, the area in which the first layers7101and7201are disposed increases by as much as the area in which the first and second connection vias610and620are exposed to the outer surface of the body100, and as a result, the surface area in which the external electrodes710and720are disposed may be further increased. As set forth above, according to an exemplary embodiment, high capacity may be implemented by increasing the area occupied by a coil portion, while maintaining the size of the coil component. In addition, according to an exemplary embodiment, connection reliability and structural rigidity of a portion in which a coil potion and an external electrode are connected may be enhanced. While this disclosure includes specific examples, it will be apparent to one of ordinary skill in the art that various changes in form and details may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only, and not for purposes of limitation. Descriptions of features or aspects in each example are to be considered as being applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed to have a different order, and/or if components in a described system, architecture, device, or circuit are combined in a different manner, and/or replaced or supplemented by other components or their equivalents. Therefore, the scope of the disclosure is defined not by the detailed description, but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents are to be construed as being included in the disclosure. | 45,676 |
11942257 | DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. In the accompanying drawings, shapes, sizes, and the like, of components may be exaggerated or stylized for clarity. The present disclosure may, however, be exemplified in many different forms and should not be construed as being limited to the specific embodiments set forth herein. Rather these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. The term “an exemplary embodiment” used herein does not refer to the same exemplary embodiment, and is provided to emphasize a particular feature or characteristic different from that of another exemplary embodiment. However, exemplary embodiments provided herein are considered to be able to be implemented by being combined in whole or in part one with another. For example, one element described in a particular exemplary embodiment, even if it is not described in another exemplary embodiment, may be understood as a description related to another exemplary embodiment, unless an opposite or contradictory description is provided therein. The meaning of a “connection” of a component to another component in the description includes an indirect connection through a third component as well as a direct connection between two components. In addition, “electrically connected” means the concept including a physical connection and a physical disconnection. It can be understood that when an element is referred to with “first” and “second”, the element is not limited thereby. They may be used only for a purpose of distinguishing the element from the other elements, and may not limit the sequence or importance of the elements. In some cases, a first element may be referred to as a second element without departing from the scope of the claims set forth herein. Similarly, a second element may also be referred to as a first element. Herein, an upper portion, a lower portion, an upper side, a lower side, an upper surface, a lower surface, and the like, are decided in the accompanying drawings. For example, a first connection member is disposed on a level above a redistribution layer. However, the claims are not limited thereto. In addition, a vertical direction refers to the abovementioned upward and downward directions, and a horizontal direction refers to a direction perpendicular to the abovementioned upward and downward directions. In this case, a vertical cross section refers to a case taken along a plane in the vertical direction, and an example thereof may be a cross-sectional view illustrated in the drawings. In addition, a horizontal cross section refers to a case taken along a plane in the horizontal direction, and an example thereof may be a plan view illustrated in the drawings. Terms used herein are used only in order to describe an exemplary embodiment rather than limiting the present disclosure. In this case, singular forms include plural forms unless interpreted otherwise in context. Hereinafter, a coil electronic component according to an exemplary embodiment in the present disclosure will be described, but is not necessarily limited thereto. Coil Electronic Component FIG.1is a schematic perspective view of a coil electronic component according to a first exemplary embodiment in the present disclosure, andFIG.2is a schematic cross-sectional view taken along line I-I′ ofFIG.1. Referring toFIGS.1and2, a coil electronic component100according to the first exemplary embodiment may include a body1and first and second external electrodes21and22disposed on an external surface of the body. The first and second external electrodes21and22may be formed on first and second end surfaces of the body opposing each other in a length direction to face each other and be selectively extended to at least portions of upper and lower surfaces, and the like, of the body. The first and second external electrodes may contain a conductive material and be composed of a plurality of layers while including Cu pre-plating layers or Ag-epoxy composite layers. The body1may form an exterior of the coil electronic component, have upper and lower surfaces opposing each other in a thickness (T) direction, first and second end surfaces opposing each other in a length (L) direction, and first and second side surfaces opposing each other in a width (W) direction, and be substantially hexahedron. However, an external shape of the body is not limited. The body1may include an encapsulant11formed of a magnetic material having magnetic properties. Here, as the magnetic material, any material may be used as long as it has the magnetic properties. For example, the magnetic material may be ferrite or a material in which metal magnetic particles are dispersed in a resin, wherein the metal magnetic particle may contain one or more selected from the group consisting of iron (Fe), silicon (Si), chromium (Cr), aluminum (Al), and nickel (Ni). Further, a support member12and an internal coil13which are encapsulated by the encapsulant in addition to the encapsulant may be further included in the body1. The support member12, which is to more thinly and easily form a coil, may be formed of a material having insulating properties and have a thin plate shape. For example, as the support member, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, resins in which a reinforcement material such as a glass fiber or an inorganic filler is impregnated in the thermosetting resin and the thermoplastic resin, for example, a prepreg, an ajinomoto build-up film (ABF), FR-4, a bismaleimide triazine (BT) resin, a photo imageable dielectric (PID) resin, or the like, may be used. When the glass fiber is contained in the support member, rigidity may be more excellent. A through-hole may be formed in a central portion of the support member12, and be filled with the magnetic material of the encapsulant, thereby forming a core central portion of the internal coil. Further, the support member12may further include a via hole for a via V electrically connecting upper and lower coils131and132to be described below to each other, wherein the via hole may be composed of a plurality of via holes in order to prevent via open. The internal coil13may be supported by the support member12and include the upper coil131supported by an upper surface of the support member12and the lower coil132supported by a lower surface of the support member12. Since the upper and lower coils are substantially symmetrical to each other in relation to the support member12, for convenience of explanation, a description thereof will be provided based on the upper coil131, and a separate description of the lower coil will be omitted. The upper coil131may include a plurality of coil patterns131ato131dwound in one direction to thereby be implemented in a spiral shape. A coil pattern closest to a core central portion C of the internal coil may be an innermost coil pattern131a, and a coil pattern farthest from the core central portion of the internal coil and directly connected to a lead portion may be an outermost coil pattern131d. Meanwhile, since each of the coil patterns is distinguished based on 1 turn in a winding direction of the internal coil, for example, the innermost coil pattern may be wound by 1 turn in the winding direction from one end portion thereof connected to the via to the other end portion thereof spaced apart from one end portion in the length direction by a predetermined interval. Continuously, another coil pattern may start to be wound from the other end portion of the innermost coil pattern. Referring toFIGS.1and2, a minimum thickness T2of the innermost coil pattern131amay be thinner than a minimum thickness T1of the coil pattern131bclosest to the innermost coil pattern131a. This is to allow the thickness of the innermost coil pattern closest to the core central portion of the internal coil in which a flow of magnetic flux is not smooth due to a relatively narrow area to be thin. Further, a portion of an upper surface of the innermost coil pattern may be formed to be inclined, and at the other portions thereof, the innermost coil pattern may be formed to have the same thickness as that of the other coil patterns, such that a magnetic flux density may be improved without a significant influence on an entire Rdc value, thereby improving inductance and DC-bias characteristics. Further, a first insulator14may be disposed on a surface of each of the coil patterns, thereby maintaining insulation between adjacent coil patterns and between the coil patterns and the encapsulant. A method of forming the first insulator14is not particularly limited. As an example of the first insulator14, a uniform insulating film may be formed on the surface of the coil pattern in a shape corresponding to the surface of the coil pattern using a chemical vapor deposition method, but the first insulator14is not limited thereto. As long as an insulation defect does not occur, the thinner the film thickness of the first insulator, the more advantages in view of securing a space to be filled with the magnetic material. However, in consideration of the insulation defect it is preferable to maintain a film thickness of 1 μm or more to 10 μm or less. When the film thickness of the first insulator is less than 1 μm, insulation reliability may not be secured, and when the film thickness of the first insulator is more than 10 μm, a space to be filled with the magnetic material may be insufficient based on a size of a miniaturized coil electronic component. Further, an insulating material of the first insulator is not particularly limited, but may be suitably selected by those skilled in the art depending on a manufacturing process and desired specifications as long as it has insulating properties. Next,FIGS.3and4illustrate a coil electronic component200according to a second exemplary embodiment in the present disclosure, whereinFIG.3is a schematic perspective view of the coil electronic component200, andFIG.4is a schematic cross-sectional view taken along line II-II′ ofFIG.3. The coil electronic component200according to the second exemplary embodiment may be substantially the same as the coil electronic component100according to the first exemplary embodiment except for a cross-sectional shape of an outermost coil pattern. Therefore, for convenience of explanation, only the outermost coil pattern will be described below, a description of the other configurations will be omitted, and configurations overlapping those described above will be denoted by the same reference numerals. Referring toFIGS.3and4, a minimum thickness T3of an outermost coil pattern131dof upper and lower coils of the coil electronic component200may be thinner than a minimum thickness T4of a coil pattern131cadjacent thereto. Further, a portion of an upper surface of the outermost coil pattern of an internal coil rather than the entire upper surface of the outermost coil pattern may be formed to be inclined. This is to change the coil pattern so as to correspond to a shape of a flow of a magnetic flux because the magnetic flux formed from the internal coil flows downwardly toward a support member in the vicinity of the outermost coil pattern. As a result, the flow of the magnetic flux may be optimized, a magnetic flux density may be decreased, and inductance may also be increased. An inclination angle of an inclined surface or a length of the inclined surface extended in the length direction is not particularly limited. However, it is not preferable that the entire upper surface of the outermost coil pattern is formed to be inclined and an entire cross-sectional shape of an upper region of the outermost coil pattern is substantially triangular. In this case, Rdc of the coil electronic component may be unnecessarily increased, and breakdown voltage (BDV) characteristics may be deteriorated. FIG.5is a schematic perspective view of a coil electronic component300according to a third exemplary embodiment in the present disclosure, andFIG.6is a cross-sectional view taken along line III-III′ ofFIG.5. In describing the coil electronic component300ofFIGS.5and6, in order to avoid an overlapping description, configurations substantially overlapping those in the coil electronic component100according to the first exemplary embodiment will be denoted by the same reference numerals, and a detailed description thereof will be omitted. The coil electronic component300according to the third exemplary embodiment may be different from the coil electronic component100according to the first exemplary embodiment in view of a structure of a first insulator. Referring toFIGS.5and6, when a first insulator141insulates between a plurality of coil patterns131ato131dand between the plurality of coil patterns and an encapsulant11, the insulator141is not formed in a shape corresponding to surfaces of the plurality of coil patterns but may include a plurality of opening portions, and the plurality of coil patterns may be disposed in the opening portions. Particularly, a cross section of the first insulator141disposed inwardly of an innermost coil pattern131amay include a triangular cross section insulating an inclined surface of the innermost coil pattern in addition to a rectangular cross section. A method of forming the first insulator is not particularly limited. As an example, an insulating sheet may be laminated on a support member, and repeatedly subjected to exposure and/or development. For example, after performing primary exposure and subsequently performing secondary exposure, development may be performed. At the time of performing the primary exposure, an exposure may be performed at an exposure amount of, for example, 1000 mJ/cm2to 3000 mJ/cm2, and the secondary exposure may only be additionally performed on a region in which the inclined surface are to be formed. In this case, it is suitable that an exposure amount of the secondary exposure is selected in a range of 2.5% to 15% of the exposure amount of the primary exposure, and may be preferably about 50 mJ/cm2to 400 mJ/cm2. When the coil patterns are insulated by the first insulator, an aspect ratio (a ratio of a thickness of each of the coil patterns to a width thereof) may be increased, and reliable insulation between the coil patterns may be achieved. Meanwhile, a second insulator142may be additionally disposed in a region that is not insulated by the first insulator, for example, a region between an exposed upper surface of the coil pattern and the encapsulant. A method of forming the second insulator142is not particularly limited. That is, an insulating sheet or a resist film having insulating properties may be laminated or a sealing method using a resin having insulating properties may be used. Alternatively, a chemical vapor deposition method or sputtering method may also be adopted in consideration of properties of an insulating material. Since a thickness of the second insulator142may be suitably selected, the second insulator142may be disposed up to a position lower than an upper surface of the first insulator141as illustrated inFIG.6, but is not limited thereto. Although not specifically illustrated, the second insulator142may be disposed at a position higher than the upper surface of the first insulator141, such that the second insulator142may be disposed to at least partially enclose the upper surface of the first insulator141. In this case, since the second insulator142is additionally disposed, there is a limitation in a space to be filled with the encapsulant, but when insulation reliability is further required, insulating properties may be reinforced by double insulation of the first and second insulators141and142. Next,FIG.7is a schematic perspective view of a coil electronic component400according to a fourth exemplary embodiment in the present disclosure, andFIG.8is a cross-sectional view taken along line IV-IV′ ofFIG.7. In describing the coil electronic component400ofFIGS.7and8, in order to avoid an overlapping description, configurations substantially overlapping those in the coil electronic component200according to the second exemplary embodiment will also be denoted by the same reference numerals, and a detailed description thereof will also be omitted. Referring toFIGS.7and8, the coil electronic component400according to the fourth exemplary embodiment may be different from the coil electronic component200according to the second exemplary embodiment in view of a structure of a first insulator. A first insulator141′ of the coil electronic component400according to the fourth exemplary embodiment may be formed by substantially the same manufacturing process of the first insulator141of the coil electronic component300according to the third exemplary embodiment. That is, the first insulator141′ may have a structure in which coil patterns are filled in opening portions after the first insulator141′ is processed so as to include a plurality of opening portions. However, in the coil electronic component400according to the fourth exemplary embodiment, the first insulator disposed outside an outermost coil pattern does not have a rectangular cross section but may have a triangular cross section in addition to the rectangular cross section so as to insulate an inclined surface of the outermost coil pattern. Further, a second insulator142′ may be further disposed in a region that is not insulated by the first insulator, for example, a region between an exposed upper surface of the coil pattern and the encapsulant. Since in the coil electronic component according to the fourth exemplary embodiment, plating of the coil patterns is performed after the first insulator is formed, even after the coil patterns are formed, a portion that is not insulated by the first insulator may be formed. The second insulator142′ may be added in order to insulate this portion. A method of forming the second insulator142′ is not particularly limited. That is, an insulating sheet or a resist film having insulating properties may be laminated or a sealing method using a resin having insulating properties may be used. Alternatively, a chemical vapor deposition method or sputtering method may also be adopted in consideration of properties of an insulating material. Since a thickness of the second insulator142′ may be suitably selected, the second insulator142′ may be disposed up to a position lower than an upper surface of the first insulator141′ as illustrated inFIG.8, but is not limited thereto. Although not specifically illustrated, the second insulator142′ may be disposed at a position higher than the upper surface of the first insulator141′, such that the second insulator142′ may be disposed to at least partially enclose the upper surface of the first insulator141′. In this case, since the second insulator142′ is additionally disposed, there is a limitation in a space to be filled with the encapsulant, but when insulation reliability is further required, insulating properties may be reinforced by double insulation of the first and second insulators141′ and142′. The coil electronic component400according to the fourth exemplary embodiment is different from the coil electronic component300according to the third exemplary embodiment in view of a cross sectional shape of the outermost coil pattern and a structure of the first insulator insulating the outermost coil pattern. In the coil electronic component400according to the fourth exemplary embodiment, a flow of a magnetic flux generated from an internal coil may be optimized in the vicinity of the outermost coil pattern as well as an innermost coil pattern. As a result, characteristic values such as inductance, DC-bias, and the like, may be improved. With the coil electronic component described above, a magnetic central core region in which a magnetic flux density is significantly increased may be significantly decreased, such that magnetic resistance may be decreased, and the magnetic flux density may be decreased, such that inductance may be increased and DC-bias characteristics may be improved. Except for the description described above, a description of features overlapping those of the above-mentioned coil electronic component according to the exemplary embodiment in the present disclosure will be omitted. As set forth above, according to exemplary embodiments in the present disclosure, the flow of the magnetic flux may be optimized through the entire region of the coil electronic component, and inductance and DC-bias characteristics may be improved. While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations could be made without departing from the scope of the present invention as defined by the appended claims. | 21,094 |
11942258 | According to the usual mode of operation, various features and elements in the figures have not been drawn to scale, which are drawn to the best way to present specific features and elements related to the disclosure. In addition, among the different figures, the same or similar element symbols refer to similar elements/components. DESCRIPTION OF THE EMBODIMENTS To make the contents of the present disclosure more thorough and complete, the following illustrative description is given with regard to the implementation aspects and embodiments of the present disclosure, which is not intended to limit the scope of the present disclosure. The features of the embodiments and the steps of the method and their sequences that constitute and implement the embodiments are described. However, other embodiments may be used to achieve the same or equivalent functions and step sequences. Unless otherwise defined herein, scientific and technical terminologies employed in the present disclosure shall have the meanings that are commonly understood and used by one of ordinary skill in the art. Unless otherwise required by context, it will be understood that singular terms shall include plural forms of the same and plural terms shall include the singular. Specifically, as used herein and in the claims, the singular forms “a” and “an” include the plural reference unless the context clearly indicates otherwise. FIG.1depicts a schematic diagram of an inductor device1000according to one embodiment of the present disclosure. As shown in the figure, the inductor device1000includes a first inductor1100, a first connection member1200, a second inductor1300, and a second connection member1400. The first inductor1100includes a first trace1110and a second trace1120. The second inductor1300includes a third trace1310and a fourth trace1320. For facilitating the understanding of the inductor device1000shown inFIG.1, reference is now made to bothFIG.2andFIG.3.FIG.2andFIG.3depict schematic diagrams of partial structures of the inductor device1000shown inFIG.1according to one embodiment of the present disclosure. As shown inFIG.2, the first trace1110is located on a first layer. As shown inFIG.3, the second trace1120is located on a second layer, and the second trace1120is coupled to the first trace1110inFIG.2in a first area2000and a second area3000. For example, the first area2000is located at the left side of the figure, and the second area3000is located at the right side of the figure. In addition, the first area2000and the second area3000are connected to each other at a junction4000. The first connection member1200is disposed at a block at which the first trace1110and the second trace1120are not disposed and which is adjacent to the junction4000, and coupled to the second trace1120. For example, the first trace1110and the second trace1120are all octangle traces. Therefore, an upper left block2100, a lower left block2200, an upper right block2300, and a lower right block2400of the first area2000do not have any first trace1110or any second trace1120disposed therein. In other words, the blocks are empty blocks. Similarly, an upper left block3100, a lower left block3200, an upper right block3300, and a lower right block3400of the second area3000do not have any first trace1110or any second trace1120disposed therein, and the blocks are empty blocks as well. The empty blocks of the inductor device1000of the present disclosure are used to dispose the first connection member1200so as to connect the second trace1120. However, the present disclosure is not limited to the foregoing embodiments inFIG.2andFIG.3, the type of the first trace1110and the second trace1120can be set to be other type, for example, diamond, depending on actual requirement. Since there are empty blocks around a diamond trace, the first connection member1200can be disposed at the empty blocks as well. Reference is made toFIG.2, the first trace1110and the third trace1310are all disposed on the first layer, and the first trace1110and the third trace1310are disposed to each other in the first area2000and the second area3000in an interlaced manner. For example, in the first area2000, the sequence of the first trace1110and the third trace1310is that: “the first trace1110, the third trace1310, the first trace1110, the third trace1310, and so on.” In addition, the sequence of the first trace1110and the third trace1310in the second area3000is the same as the sequence of the first trace1110and the third trace1310in the first area2000. Reference is made toFIG.2, the third trace1310is located on the first layer. Reference is made toFIG.3, the fourth trace1320is located on the second layer, and the fourth trace1320is coupled to the third trace1310inFIG.2in the first area2000and the second area3000. Reference is made toFIG.3, the second trace1120and the fourth trace1320are all located on the second layer, and the second trace1120and the fourth trace1320are disposed to each other in the first area2000and the second area3000in an interlaced manner. For example, in the first area2000, the sequence of the second trace1120and the fourth trace1320is that: “the second trace1120, the fourth trace1320, the second trace1120, the fourth trace1320, and so on.” In addition, the sequence of the second trace1120and the fourth trace1320in the second area3000is the same as the sequence of the second trace1120and the fourth trace1320in the first area2000. In addition, the second connection member1400is disposed at a block at which the third trace1310and the fourth trace1320are not disposed and which is adjacent to the junction4000, and coupled to the fourth trace1320. For example, the third trace1310and the fourth trace1320are all octangle traces. Therefore, an upper left block2100, a lower left block2200, an upper right block2300, and a lower right block2400of the first area2000do not have any third trace1310or any fourth trace1320disposed therein. In other words, the blocks are empty blocks. Similarly, an upper left block3100, a lower left block3200, an upper right block3300, and a lower right block3400of the second area3000do not have any third trace1310or any fourth trace1320disposed therein, and the blocks are empty blocks as well. The empty blocks of the inductor device1000of the present disclosure are used to dispose the second connection member1400so as to connect the fourth trace1320. However, the present disclosure is not limited to the foregoing embodiments inFIG.2andFIG.3, the type of the third trace1310and the fourth trace1320can be set to be other type, for example, diamond, depending on actual requirement. Since there are empty blocks around a diamond trace, the second connection member1400can be disposed at the empty blocks as well. Reference is made toFIG.2, the first trace1110includes a plurality of first wires1111. Reference is made toFIG.3, the second trace1120includes a plurality of second wires1121. In the first area2000, the first wires1111inFIG.2are coupled to the second wires1121inFIG.3. In the second area3000, the first wires1111inFIG.2are coupled to the second wires1121inFIG.3through second via1115. Reference is made toFIG.2, the inductor device1000further includes a first input/output member1500, and the first input/output member1500is disposed in the first area2000, and coupled to the first wire1111which is located at an outermost side among the first wires1111. In addition, the first input/output member1500is located on the first layer. In some embodiments, the first input/output member1500includes a first terminal and a second terminal. The first terminal (e.g., the lower terminal as shown in the figure) of the first input/output member1500is coupled to the first wire1111which is located at an outermost side among the first wires1111. The second terminal (e.g., the upper terminal as shown in the figure) of the first input/output member1500is disposed at a side which is opposite to the junction4000, and located at a block at which the first trace1110or the third trace1310are not disposed. For example, the upper terminal of the first input/output member1500is disposed at a left side of the junction4000formed by the first area2000and the second area3000, and located at the upper left block2100at which the first trace1110or the third trace1310are not disposed, wherein the upper left block2100is located at the upper left corner of the first area2000. In one embodiment, the inductor device1000further includes a first center-tapped member1600. The first center-tapped member1600is disposed in the second area3000, and coupled to the first wire1111which is located at an outermost side among the first wires1111. In addition, the first center-tapped member1600is located on the first layer. In some embodiments, the first center-tapped member1600includes a first terminal and a second terminal. The first terminal (e.g., the lower terminal as shown in the figure) of the first center-tapped member1600is coupled to the first wire1111which is located at an outermost side among the first wires1111. The second terminal (e.g., the upper terminal as shown in the figure) of the first center-tapped member1600is disposed at a side which is opposite to the junction4000, and located on at a block at which the first trace1110or the third trace1310are not disposed. For example, the upper terminal of the first center-tapped member1600is disposed at a right side of the junction4000formed by the first area2000and the second area3000, and located at the upper right block3300at which the first trace1110or the third trace1310are not disposed, wherein the upper right block3300is located at the upper right corner of the second area3000. Reference is now made toFIG.1,FIG.2andFIG.3, multiple first wires1111and multiple second wires1121are coupled to each other at a first side (e.g., the left side) and a second side (e.g., the right side) of the inductor device1000in an interlaced manner. In another embodiment, in the first area2000, multiple first wires1111and multiple second wires1121are coupled to each other at the left side and the right side in an interlaced manner. In addition, in the second area3000, multiple first wires1111and multiple second wires1121are coupled to each other at the left side and the right side in an interlaced manner. It is noted that the present disclosure is not intended to be limited to the embodiments inFIG.1,FIG.2andFIG.3, multiple first wires1111and multiple second wires1121can also be coupled to each other at a third side (e.g., the upper side) and a fourth side (e.g., the lower side) of the inductor device1000in an interlaced manner, depending on actual requirements. Reference is made toFIG.2, the third trace1310includes a plurality of third wires1311. Reference is made toFIG.3, the fourth trace1320includes a plurality of fourth wires1321. In the first area2000, the third wires1311inFIG.2are coupled to the fourth wires1321inFIG.3through a third via1313. In the second area3000, the third wires1311inFIG.2are coupled to the fourth wires1321inFIG.3through a fourth via1315. In one embodiment, the inductor device1000further includes a second input/output member1700, and the second input/output member1700is disposed in the first area2000, and coupled to the third wire1311which is located at an outermost side among the third wires1311. In addition, the second input/output member1700is located on the first layer. In some embodiments, the second input/output member1700includes a first terminal and a second terminal. The first terminal (e.g., the upper terminal as shown in the figure) of the second input/output member1700is coupled to the third wire1311which is located at an outermost side among the third wires1311. The second terminal (e.g., the lower terminal as shown in the figure) of the second input/output member1700is disposed at a side which is opposite to the junction4000, and located at a block at which the first trace1111or the third trace1310are not disposed. For example, the lower terminal of the second input/output member1700is disposed at a left side of the junction4000formed between the first area2000and the second area3000, and located at the lower left block2200at which the first trace1111or the third trace1310are not disposed, wherein the lower left block2200is located at the lower left corner of the first area2000. In one embodiment, the inductor device1000further includes a second center-tapped member1800. The second center-tapped member1800is disposed in the second area3000, and coupled to the third wires1311which is located at an outermost side among the third wires1311. In addition, the second center-tapped member1800is located on the first layer. In some embodiments, the second center-tapped member1800includes a first terminal and a second terminal. The first terminal (e.g., the upper terminal as shown in the figure) of the second center-tapped member1800is coupled to the third wires1311which is located at an outermost side among the third wires1311. The second terminal (e.g., the lower terminal as shown in the figure) of the second center-tapped member1800is disposed at a side which is opposite to the junction4000, and located at a block at which the first trace1111or the third trace1310are not disposed. For example, the lower terminal of the second center-tapped member1800is disposed at a right side of the junction4000formed between the first area2000and the second area3000, and located at the lower right block3400at which the first trace1111or the third trace1310are not disposed, wherein the lower right block3400is located at the lower right corner of the second area3000. Reference is now made toFIG.1,FIG.2andFIG.3, multiple third wires1311and multiple fourth wires1312are coupled to each other at a first side (e.g., the left side) and a second side (e.g., the right side) of the inductor device1000in an interlaced manner. In another embodiment, in the first area2000, multiple third wires1311and multiple fourth wires1312are coupled to each other at the left side and the right side in an interlaced manner. In addition, in the second area3000, multiple third wires1311and multiple fourth wires1312are coupled to each other at the left side and the right side in an interlaced manner. It is noted that the present disclosure is not intended to be limited to the embodiments inFIG.1,FIG.2andFIG.3, multiple third wires1311and multiple fourth wires1312can also be coupled to each other at a third side (e.g., the upper side) and a fourth side (e.g., the lower side) of the inductor device1000in an interlaced manner, depending on actual requirements. Reference is now made toFIG.1,FIG.2andFIG.3, the first connection member1200is located on the first layer and the second layer at the same time, and the first layer is different from the second layer. For example, as shown inFIG.3, the first connection member1200includes a first sub-connection member1210which is located on the second layer, and the first sub-connection member1210couples the second trace1120located in the first area2000and the second trace1120located in the second area3000. In addition, as shown inFIG.2, the first connection member1200further includes a second sub-connection member1220which is located on the first layer. The second sub-connection member1220is coupled to the first sub-connection member1210inFIG.3through vias (e.g., the square structure shown in the figure), and couples the second trace1120located in the first area2000and the second trace1120located in the second area3000through the first sub-connection member1210. Reference is now made toFIG.1,FIG.2andFIG.3, the second connection member1400is located on the first layer and the second layer at the same time. For example, as shown inFIG.3, the second connection member1400includes a third sub-connection member1410located on the second layer, and the third sub-connection member1410couples the fourth trace1321located in the first area2000and the fourth trace1321located in the second area3000. In addition, reference is made toFIG.2, the second connection member1400further includes a fourth sub-connection member1420which is located on the first layer. The fourth sub-connection member1420is coupled to the third sub-connection member1410inFIG.3through vias (e.g., the square structure shown in the figure), and couples the fourth trace1321located in the first area2000and the fourth trace1321located in the second area3000through the third sub-connection member1410. In one embodiment, the elements shown inFIG.2are all located on the first layer, and the elements shown inFIG.3are all located on the second layer. The first layer and the second layer are different layers. It is noted that the present disclosure is not limited to the structure as shown inFIG.1toFIG.3, and it is merely an example for illustrating one of the implements of the present disclosure. FIG.4depicts a schematic diagram of an inductor device1000A according to one embodiment of the present disclosure. Compared to the inductor device1000shown inFIG.1toFIG.3, the first input/output member1500A, the first center-tapped member1600A, the second input/output member1700A and the second center-tapped member1800A of the inductor device1000A inFIG.4are disposed at a third side (e.g., the upper side) and a fourth side (e.g., the lower side) of the inductor device1000A. It is noted that the element inFIG.4, whose symbol is similar to the symbol of the element inFIG.1toFIG.3, has similar structure feature in connection with the element inFIG.1toFIG.3. Therefore, a detail description regarding the structure feature of the element inFIG.4is omitted herein for the sake of brevity. In addition, the present disclosure is not limited to the structure as shown inFIG.4, and it is merely an example for illustrating one of the implements of the present disclosure. FIG.5depicts a schematic diagram of experimental data of an inductor device1000according to one embodiment of the present disclosure. As shown in the figure, the experimental curve of the quality factor of the inductor device1000adopting the structural configuration of the present disclosure is C1, and the experimental curve of the inductance value of the inductor device1000is L1. In addition, the experimental curves of the quality factor of the inductor device which does not adopt the structural configuration of the present disclosure are C2, C3. As can be seen from the figure, the inductor device1000adopting the structure of the present disclosure has better quality factor. For example, at a frequency of about 5 GHz, the quality factor of the inductor device1000is about 7.1, which is 40% higher than the quality factor of the inductor device which does not adopt the structural configuration of the present disclosure. In one embodiment, the size of the inductor device1000of the present disclosure is 130 μm×64 μm, the width of the inductor device1000is 2 μm, and the spacing of the inductor device1000is 1 μm. However, the present disclosure is not limited to the structure as shown inFIG.5, and it is merely an example for illustrating one of the implements of the present disclosure. It can be understood from the embodiments of the present disclosure that application of the present disclosure has the following advantages. The structure of the inductor device can use empty blocks to dispose connection members efficiently so as to simplify connection structure in the inductor device, and it only needs two layers to combine two inductors to become one inductor device. In addition, the quality factor of the inductor device adopting the structural configuration of the present disclosure can be enhanced substantially. Although the present invention has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents. | 20,451 |
11942259 | DETAILED DESCRIPTION An electronic component according to an embodiment of the present disclosure will be described hereinafter. (Configuration of Electronic Component) The configuration of the electronic component according to the embodiment will be described hereinafter with reference to the drawings.FIG.1is an external perspective view of an electronic component10according to the embodiment.FIG.2is an exploded perspective view of the electronic component10illustrated inFIG.1. In the following, a lamination direction of the electronic component10is defined as a front-back direction. When viewed in plan view from the front, a direction in which long sides of the electronic component10extend is defined as a left-right direction and a direction in which short sides of the electronic component10extend is defined as an up-down direction. As illustrated inFIGS.1and2, the electronic component10includes a multilayer body12, outer electrodes14aand14b, and an inductor L. As illustrated inFIG.2, the multilayer body12is formed by laminating a plurality of insulation layers16a-16 m to be arranged in that order from back to front, and takes on a parallelepiped shape by adding the outer electrodes14aand14b, which will be mentioned later. Hereinafter, two opposite sides of the multilayer body12in the front-back direction will be called side surfaces, and two opposite sides of the multilayer body12in the left-right direction will be called end surfaces. A surface of the multilayer body12on a top side thereof will be called a top surface, and a surface on a bottom side of the multilayer body12will be called a bottom surface. The bottom surface of the multilayer body12serves as a mounting surface that faces a circuit board when mounting the electronic component10on the circuit board. The two end surfaces, the top surface, and the bottom surface are surfaces formed by contiguous outer edges of the insulation layers16a-16 m. As illustrated inFIG.2, the insulation layers16a-16mare rectangular in shape, and are formed of an insulating material that has borosilicate glass as a primary component, for example. The insulation layer16aor the insulation layer16mmay be colored with a different color than the insulation layers16b-16lto make it possible to distinguish the directions of the electronic component10. The vicinities of the lower-right and lower-left corners of the insulation layers16e-16jare cut out in an L shape. Hereinafter, front-side surfaces of the insulation layers16a-16mwill be called front surfaces, and back-side surfaces of the insulation layers16a-16mwill be called back surfaces. As illustrated inFIG.1, the outer electrode14ais embedded in the left side surface and bottom surface of the multilayer body12, and is exposed on the outside of the multilayer body12across the left side surface and bottom surface. In other words, when viewed in plan view from the front, the outer electrode14ahas an L shape. As illustrated inFIG.2, the outer electrode14aincludes outer conductor layers25a-25g. As illustrated inFIG.2, the outer conductor layer25ais provided on the front surface of the insulation layer16d. The outer conductor layer25ahas an L shape, and when viewed in plan view from the front, makes contact with a left short side and a bottom long side of the insulation layer16d. As illustrated inFIG.2, the outer conductor layers25b-25gare laminated so as to pass through the insulation layers16e-16jin the front-back direction and be electrically connected. The outer conductor layer25a, meanwhile, is laminated to a back side of the outer conductor layer25b. The outer conductor layers25b-25ghave the same L shape as the outer conductor layer25a, and when viewed in plan view from the front, are provided within the L-shaped cutout areas in the vicinities of the lower-left corners of the insulation layers16e-16j. The parts of the outer conductor layers25a-25gexposed on the outside of the multilayer body12are plated with Sn and Ni to prevent corrosion. The outer electrode14aconfigured as described above has a rectangular shape on the left end surface, and a rectangular shape on the bottom surface as well. As illustrated inFIG.1, the outer electrode14bis embedded in the right side surface and bottom surface of the multilayer body12, and is exposed on the outside of the multilayer body12across the right side surface and bottom surface. In other words, when viewed in plan view from the front, the outer electrode14bhas an L shape. As illustrated inFIG.2, the outer electrode14bincludes outer conductor layers35a-35g. As illustrated inFIG.2, the outer conductor layer35ais provided on the front surface of the insulation layer16d. The outer conductor layer35ahas an L shape, and when viewed in plan view from the front, makes contact with a right short side and a bottom long side of the insulation layer16d. As illustrated inFIG.2, the outer conductor layers35b-35gare laminated so as to pass through the insulation layers16e-16jin the front-back direction and be electrically connected. The outer conductor layer35a, meanwhile, is laminated to a back side of the outer conductor layer35b. The outer conductor layers35b-35ghave the same L shape as the outer conductor layer35a, and when viewed in plan view from the front, are provided within the L-shaped cutout areas in the vicinities of the lower-right corners of the insulation layers16e-16j. The parts of the outer conductor layers35a-35gexposed on the outside of the multilayer body12are plated with Sn and Ni to prevent corrosion. The outer electrode14bconfigured as described above has a rectangular shape on the right end surface, and a rectangular shape on the bottom surface as well. The insulation layers16a-16dand16k-16mare laminated onto the front and back sides, respectively, of the outer electrodes14aand14b. As a result, the outer electrodes14aand14bare not exposed on the two side surfaces. The inductor L includes inductor conductor layers18a-18gand via hole conductors v1-v6, and when viewed in plan view from the front, forms a helical shape that progresses from the back toward the front while winding clockwise. The inductor conductor layers18a-18gare provided on the front surfaces of the insulation layers16d-16j. Accordingly, the inductor conductor layer18bis adjacent to the inductor conductor layer18aon the front side thereof. The inductor conductor layers18aand18ghave one turn or greater, whereas the inductor conductor layers18b-18fhave slightly less than one turn. Hereinafter, an end portion of the inductor conductor layers18a-18gon an upstream side in the clockwise direction will be called an upstream end, and an end portion of the inductor conductor layers18a-18gon a downstream side in the clockwise direction will be called a downstream end. When viewed in plan view from the front, the inductor conductor layers18b-18foverlap with each other and form a hexagonal annular path. Accordingly, the inductor conductor layers18b-18fare not directly connected to the outer conductor layers25a-25gand35a-35g(in other words, to the outer electrodes14aand14b). Parts of the inductor conductor layers18aand18galso overlap with the hexagonal annular path. However, the upstream end of the inductor conductor layer18ais directly connected to the outer conductor layer25a(in other words, to the outer electrode14a). Accordingly, the vicinity of the upstream end of the inductor conductor layer18adoes not overlap with the hexagonal annular path. Additionally, the downstream end of the inductor conductor layer18gis directly connected to the outer conductor layer35g(in other words, to the outer electrode14b). Accordingly, the vicinity of the downstream end of the inductor conductor layer18gdoes not overlap with the hexagonal annular path. However, the inductor conductor layers18aand18gare not lead out to the exterior of the multilayer body12. The inductor conductor layers18a-18gas described thus far are made from a conductive material that has Ag as a primary component, for example. Each of the via hole conductors v1-v6passes through the corresponding layer of the insulation layers16e-16jin the front-back direction respectively. The via hole conductors v1-v6are made from a conductive material that has Ag as a primary component, for example. The via hole conductor v1connects the downstream end of the inductor conductor layer18ato the upstream end of the inductor conductor layer18b. The via hole conductor v2connects the downstream end of the inductor conductor layer18bto the upstream end of the inductor conductor layer18c. The via hole conductor v3connects the downstream end of the inductor conductor layer18cto the upstream end of the inductor conductor layer18d. The via hole conductor v4connects the downstream end of the inductor conductor layer18dto the upstream end of the inductor conductor layer18e. The via hole conductor v5connects the downstream end of the inductor conductor layer18eto the upstream end of the inductor conductor layer18f. The via hole conductor v6connects the downstream end of the inductor conductor layer18fto the upstream end of the inductor conductor layer18g. In the inductor L configured as described thus far, the via hole conductor v1that connects the inductor conductor layer18aand the inductor conductor layer18badjacent to each other in the front-back direction is, when viewed in plan view from the front, provided closer to the outer electrode14athan the outer electrode14b, and, when viewed in plan view from the normal direction of the left end surface of the multilayer body12(in other words, from the left side), does not overlap with the outer electrode14a. More specifically, the via hole conductor v1is, when viewed in plan view from the front, positioned further to the left than a straight line passing through the center of the left-right direction of the multilayer body12in the up-down direction. Furthermore, the via hole conductor v1is located further upward than an upper end of the outer electrode14a. Additionally, in the inductor L, the via hole conductor v6that connects the inductor conductor layer18fand the inductor conductor layer18gadjacent to each other in the front-back direction is, when viewed in plan view from the front, provided closer to the outer electrode14bthan the outer electrode14a, and, when viewed in plan view from the normal direction of the right end surface of the multilayer body12(in other words, from the right side), does not overlap with the outer electrode14b. More specifically, the via hole conductor v6is, when viewed in plan view from the front, positioned further to the right than a straight line passing through the center of the left-right direction of the multilayer body12in the up-down direction. Furthermore, the via hole conductor v6is located further upward than an upper end of the outer electrode14b. (Method of Manufacturing Electronic Component) A method of manufacturing the electronic component10according to the present embodiment will be described hereinafter with reference to the drawings.FIGS.3to8are plan views illustrating the electronic component10during manufacture. First, as illustrated inFIG.3, insulating paste layers116a-116dare formed through the repeated spreading by screen printing of an insulating paste having borosilicate glass as a primary component. The insulating paste layers116a-116dare insulating paste layers that will serve as the insulation layers16a-16d, which are outer layer insulation layers located further in an outer side portion than the inductor L. Next, as illustrated inFIG.4, the inductor conductor layer18aand the outer conductor layers25aand35aare formed through photolithography. Specifically, a photosensitive conductive paste having Ag as a primary metal component is spread through screen printing so as to form a conductive paste layer on the insulating paste layer116d. Furthermore, the conductive paste layer is irradiated with ultraviolet light or the like through a photomask and then developed using an alkali solution or the like. The inductor conductor layer18aand the outer conductor layers25aand35aare formed on the insulating paste layer116das a result. Next, as illustrated inFIG.5, an insulating paste layer116e, in which openings h1and h2and holes H1are provided, is formed through photolithography. Specifically, a photosensitive insulating paste is spread through screen printing so as to form the insulating paste layer116eon the insulating paste layer116d. Furthermore, the insulating paste layer is irradiated with ultraviolet light or the like through a photomask and then developed using an alkali solution or the like. The insulating paste layer116eis a paste layer that will serve as the insulation layer16e. The openings h1and h2form L shapes having the same shape as the outer conductor layers25band35b, respectively. A plus-shaped opening is formed by two of the openings h1and two of the openings h2connecting. The holes H1, meanwhile, are round holes in which the via hole conductor v1will be formed. Next, as illustrated inFIG.6, the inductor conductor layer18b, the outer conductor layers25band35b, and the via hole conductor v1are formed through photolithography. Specifically, a photosensitive conductive paste having Ag as a primary metal component is spread through screen printing so as to form a conductive paste layer on the insulating paste layer116e. Furthermore, the conductive paste layer is irradiated with ultraviolet light or the like through a photomask and then developed using an alkali solution or the like. The inductor conductor layer18bis formed on the insulating paste layer116eas a result. The outer conductor layers25band35bare formed in the openings h1and h2, respectively. The via hole conductor v1is formed in the holes H1. Thereafter, the insulating paste layers116f-116j, the inductor conductor layers18c-18g, the outer conductor layers25c-25gand35c-35g, and the via hole conductors v2-v6are formed by repeating the processes illustrated inFIGS.5and6.FIG.7is a diagram illustrating a state following the formation of the inductor conductor layer18gand the outer conductor layers25gand35g. Next, as illustrated inFIG.8, insulating paste layers116k-116mare formed through the repeated spreading by screen printing of an insulating paste. The insulating paste layers116k-116mare insulating paste layers that will serve as the insulation layers16k-16m, which are outer layer insulation layers located further in an outer side portion than the inductor L. A mother multilayer body112is obtained from the processes described thus far. Next, the mother multilayer body112is cut into a plurality of unfired multilayer bodies12with a dicing machine or the like. In the process of cutting the mother multilayer body112, the outer electrodes14aand14bare exposed on the multilayer body12from cut faces formed by the cutting. The unfired multilayer body12is then fired under predetermined conditions to obtain the multilayer body12. The multilayer body12is furthermore subjected to barrel finishing. Finally, the parts of the outer electrodes14aand14bexposed on the multilayer body12are plated with Ni and Sn. The electronic component10is completed through the process described thus far. (Effects) According to the electronic component10configured as described above, a high Q value can be achieved. More specifically, in the electronic component10, the via hole conductor v1connects the inductor conductor layer18aand the inductor conductor layer18b, and thus the electric potential of the via hole conductor v1is comparatively close to the electric potential of the inductor conductor layer18a. Furthermore, the inductor conductor layer18ais connected to the outer electrode14a, and thus the electric potential of the via hole conductor v1is comparatively close to that of the outer electrode14aas well. However, the electric potential of the via hole conductor v1can differ greatly from the electric potential of the outer electrode14b. When there is such a great difference in potentials between the via hole conductor v1and the outer electrode14b, a high stray capacitance is formed therebetween, which negatively influences the inductor L. Accordingly, in the electronic component10, the via hole conductor v1is, when viewed in plan view from the front, provided closer to the outer electrode14athan the outer electrode14b. In other words, the via hole conductor v1is positioned so as to be distanced from the outer electrode14b. As a result, a high stray capacitance is prevented from being formed between the via hole conductor v1and the outer electrode14b, which have a large potential difference. As a result, negative influence on the inductor L by the stray capacitance is reduced, which makes it possible to achieve a high Q value in the inductor L. Furthermore, according to the electronic component10, a high Q value can be achieved for the following reasons as well. Specifically, when the electronic component10is viewed in plan view from the left, the via hole conductor v1does not overlap with the outer electrode14a. This reduces stray capacitance arising between the via hole conductor v1and the outer electrode14a. As a result, a drop in the self-resonating frequency of the inductor L caused by stray capacitance arising between the via hole conductor v1and the outer electrode14acan be suppressed, and a high Q value can be achieved in the inductor L. Here, the inventors of the present disclosure carried out the computer simulation described next to further clarify the effects provided by the electronic component10. The size of the electronic component10used in the computer simulation was L: 0.6 mm, W: 0.3 mm, and T: 0.4 mm. To be more specific, the Q value of the inductor L at 2 GHz was measured while varying the height of the outer electrodes14aand14bfrom the bottom surface from 150 μm to 340 μm. The position of the center of the via hole conductor v1in the up-down direction was fixed at 280 μm from the bottom surface at this time. Thus the position of the lower end of the via hole conductor v1in the up-down direction was 260 μm from the bottom surface.FIG.9is a graph illustrating results of the simulation. The vertical axis represents the Q value, and the horizontal axis represents the height of the outer electrodes14aand14b. As indicated inFIG.9, a comparatively good Q value is achieved in the case where the outer electrodes14aand14bare lower than the lower end of the via hole conductor v1. However, it can be seen that the Q value drops drastically once the outer electrodes14aand14bbecome higher than the lower end of the via hole conductor v1. In other words, the Q value of the inductor L worsens drastically when the via hole conductor v1overlaps with the outer electrodes14aand14b, when viewed in plan view from the left. Thus it can be seen from this computer simulation that the electronic component10is capable of achieving a high Q value. (First Variation) Next, an electronic component10aaccording to a first variation will be described with reference to the drawings.FIG.10is an exploded perspective view of the electronic component10a.FIG.11is a diagram illustrating a plan view of the electronic component10afrom the left side. The electronic component10adiffers from the electronic component10in that parts of the inductor conductor layers18aand18gare exposed on the left end surface and the right end surface of the multilayer body12. The electronic component10awill be described next, focusing on this difference. The remainder of the configuration of the electronic component10ais the same as that of the electronic component10and thus will not be described. In the electronic component10, the inductor conductor layers18aand18gare provided within the multilayer body12and are not exposed on the multilayer body12. However, in the electronic component10a, the inductor conductor layer18ais exposed on the left end surface of the multilayer body12, across a predetermined section from a part directly connected to the outer electrode14a. Accordingly, the inductor conductor layer18aextends linearly upward from an upper-back corner of the outer electrode14aon the left end surface of the multilayer body12, as illustrated inFIG.11. Additionally, in the electronic component10a, the inductor conductor layer18gis exposed on the right end surface of the multilayer body12, across a predetermined section from a part directly connected to the outer electrode14b. Accordingly, the inductor conductor layer18gextends linearly upward from an upper-front corner of the outer electrode14bon the right end surface of the multilayer body12. As such, the shapes of the outer electrode14aand the inductor conductor layer18awhen viewed in plan view from the left substantially match the shapes of the outer electrode14band the inductor conductor layer18gwhen viewed in plan view from the right. Here, a border between the outer electrode14aand the inductor conductor layer18aon the left end surface of the multilayer body12will be described. The outer electrode14ais a part in which the plurality of outer conductor layers25a-25gare laminated together to form a (rectangular) assembly on the left end surface of the multilayer body12. On the other hand, the inductor conductor layer18ais a part extending linearly from this assembly on the left end surface of the multilayer body12. Note that the same applies to a border between the outer electrode14band the inductor conductor layer18gon the right end surface of the multilayer body12. According to the electronic component10aconfigured as described above, a higher Q value can be achieved, in the same manner as with the electronic component10. Additionally, according to the electronic component10a, parts of the inductor conductor layers18aand18gare exposed on the left end surface and the right end surface of the multilayer body12. As such, inner diameters of the inductor conductor layers18aand18gof the electronic component10aare greater than the inner diameters of the inductor conductor layers18aand18gof the electronic component10. An inductance value of the inductor L in the electronic component10ais thus greater than an inductance value of the inductor L in the electronic component10. Here, the inventors of the present disclosure carried out a computer simulation to calculate the inductance values of the inductors L in the electronic component10and the electronic component10a. The conditions of the simulation are as indicated below. distance D from left end of annular path to left end surface (seeFIG.10): 59.7 μm line width of inductor conductor layers18a-18g:30 μm thickness of inductor conductor layers18a-18g:11.5 μm thickness of insulation layers16a-16g:14.5 μm number of turns in inductor L: 8.5 turns While the inductance value of the inductor L in the electronic component10at 500 MHz was 22.9 nH, the inductance value of the inductor L in the electronic component10aat 500 MHz was 25.3 nH. It can thus be seen that the electronic component10acan achieve a higher inductance value than the electronic component10from this computer simulation as well. (Second Variation) Next, an electronic component10baccording to a second variation will be described with reference to the drawings. FIG. is an exploded perspective view of the electronic component10b. The electronic component10bdiffers from the electronic component10ain that the inductor L has a double-helix structure. The electronic component10bwill be described next, focusing on this difference. The remainder of the configuration of the electronic component10bis the same as that of the electronic component10aand thus will not be described. The inductor L of the electronic component10bincludes inductor conductor layers18a-18gand19a-19g. The inductor conductor layers19a-19ghave the same shapes as the inductor conductor layers18a-18g, respectively. The inductor conductor layers18a,19a,18b,19b,18c,19c,18d,19d,18e,19e,18f,19f,18g, and19gare arranged in that order from back to front. The inductor conductor layer18aand the inductor conductor layer19aare electrically connected in parallel to each other at both ends thereof. The inductor conductor layer18band the inductor conductor layer19bare electrically connected in parallel to each other at both ends thereof. The inductor conductor layer18cand the inductor conductor layer19care electrically connected in parallel to each other at both ends thereof. The inductor conductor layer18dand the inductor conductor layer19dare electrically connected in parallel to each other at both ends thereof. The inductor conductor layer18eand the inductor conductor layer19eare electrically connected in parallel to each other at both ends thereof. The inductor conductor layer18fand the inductor conductor layer19fare electrically connected in parallel to each other at both ends thereof. The inductor conductor layer18gand the inductor conductor layer19gare electrically connected in parallel to each other at both ends thereof. In the inductor L of the electronic component10bconfigured as described thus far, a via hole conductor va that connects the inductor conductor layer19aand the inductor conductor layer18badjacent to each other is, when viewed in plan view from the front, provided closer to the outer electrode14athan the outer electrode14b, and, when viewed in plan view from the normal direction of the left end surface (in other words, from the left side), does not overlap with the outer electrode14a. More specifically, the via hole conductor va is, when viewed in plan view from the front, positioned further to the left from a straight line passing through the center of the left-right direction of the multilayer body12in the up-down direction. Furthermore, the via hole conductor va is located further upward than an upper end of the outer electrode14a. Additionally, in the inductor L, a via hole conductor vb that connects the inductor conductor layer19fand the inductor conductor layer18gadjacent to each other is, when viewed in plan view from the front, provided closer to the outer electrode14bthan the outer electrode14a, and, when viewed in plan view from the normal direction of the right end surface (in other words, from the right side), does not overlap with the outer electrode14b. More specifically, the via hole conductor vb is, when viewed in plan view from the front, positioned further to the right than a straight line passing through the center of the left-right direction of the multilayer body12in the up-down direction. Furthermore, the via hole conductor vb is located further upward than an upper end of the outer electrode14b. Additionally, in the electronic component10b, the inductor conductor layers18aand19aare exposed on the left end surface of the multilayer body12, across a predetermined section from a part connected to the outer electrode14a. Accordingly, the inductor conductor layers18aand19aextend parallel, linearly upward from the vicinity of an upper-back corner of the outer electrode14aon the left end surface of the multilayer body12. Additionally, in the electronic component10b, the inductor conductor layers18gand19gare exposed on the right end surface of the multilayer body12, across a predetermined section from a part connected to the outer electrode14b. Accordingly, the inductor conductor layers18gand19gextend parallel, linearly upward from the vicinity of an upper-front corner of the outer electrode14bon the right end surface of the multilayer body12. As such, the shapes of the outer electrode14aand the inductor conductor layers18aand19awhen viewed in plan view from the left substantially match the shapes of the outer electrode14band the inductor conductor layers18gand19gwhen viewed in plan view from the right. According to the electronic component10bconfigured as described above, a higher Q value can be achieved and a high inductance value can be achieved, in the same manner as with the electronic component10a. Additionally, in the electronic component10b, the inductor L has a double-helix structure, and thus a DC resistance value of the inductor L can be reduced. Other Embodiments The electronic component according to the present disclosure is not limited to the above-described electronic components10,10a, and10b, and can be modified without departing from the essential spirit thereof. The configurations of the electronic components10,10a, and10bmay be combined as desired. The inductor conductor layers18a-18gand19a-19gof the electronic components10,10a, and10bmay have spiral shapes having one or more turns. This makes it possible to increase the inductance value of the inductor L. Additionally, although the electronic components10,10a, and10bare made through a photolithography process, the components may be made through a printing process, a sequential pressure-bonding process, or the like. Additionally, although the insulation layers16a-16mand17d-17jare made from borosilicate glass in the electronic components10,10a, and10b, these layers may be made from magnetic ceramics, nonmagnetic ceramics, or the like. Additionally, although the outer electrode14ahas a rectangular shape when viewed in plan view from the left, the outer electrode14amay have a shape aside from a rectangle. Likewise, although the outer electrode14bhas a rectangular shape when viewed in plan view from the right, the outer electrode14bmay have a shape aside from a rectangle. Additionally, the outer electrodes14aand14bmay be provided on surfaces of the multilayer body12rather than being embedded in the multilayer body12. In this case, the outer electrodes14aand14bare formed by first forming base electrodes by applying a conductive paste having silver or the like as a primary component to the surfaces of the multilayer body12and firing the conductive paste, and then plating the base electrodes with Ni and Sn. | 29,970 |
11942260 | DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT The present disclosure will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this disclosure are presented herein for purpose of illustration and description only. It is not intended to be exhaustive or to be limited to the precise form disclosed. FIG.2Ais a schematic exploded view illustrating a power module according to an embodiment of the present invention.FIG.2Bis a schematic exploded view illustrating the power module ofFIG.2Aand taken along opposite viewpoint.FIG.3is a schematic circuit diagram illustrating an equivalent circuit of a voltage regulator module formed by the power module ofFIG.2A. The power module2(hereinafter also referred to as an apparatus) can form a voltage regulator module (VRM)1which can be applied into an electronic device. The voltage regulator module1can be for example but not limited to 4-phase buck converter. The voltage regulator module1comprises a plurality of power circuits10, a plurality of output inductors L, a controller11and at least one output capacitor Cout. Each of the power circuits10is electrically connected with a terminal SW of a corresponding output inductor L to form a phase buck circuit. Therefore, the voltage regulator module1comprises four phase buck circuits, which are connected in parallel and connected between a power source12and a first terminal of the output capacitor Cout. Besides, each of the power circuits10comprises at least one switch element and a driver which is used to drive the at least one switch element. Moreover, the output inductors L can be independent with each other. In other embodiment, the output inductors L can also be coupled together to reduce the ripple of the output current of the voltage regulator module1. The controller11senses the output voltage and the output current of every phase buck circuit to generate pulse width modulation signals to control every phase buck circuit. The first terminal of the output capacitor Cout forms a positive output terminal (Vo+) of the voltage regulator module1, and a second terminal of the output capacitor Cout is connected with a ground and forms a negative output terminal (Vo−) of the voltage regulator module1. As shown inFIGS.2A and2B, the power module2comprises a first circuit board assembly3and a magnetic assembly4. The first circuit board assembly3comprises a first printed circuit board101and at least one power circuit10. The magnetic assembly4comprises a magnetic core module102and a plurality of first electrical conductors104. The first printed circuit board101has a first surface101aand a second surface101b. Besides, the power circuits10shown inFIG.3are settled on the first surface101aof the first printed circuit board101. The first printed circuit board101with the power circuits10may be in contact with a case13(as shown inFIG.4) of the electronic device so that the heat generated from the power module2can be conducted to the case13of the electronic device by the first printed circuit board101. The operations of the power circuits10cause the main portion of heat of the power module2, and the power circuits10are fitted together with the case13of the electronic device so that the heat from the power circuits10can be conducted to the case13directly. In this embodiment, the number of the first electrical conductors104corresponds to the number of the output inductors L shown inFIG.3. Preferably but not exclusively, the power module2comprises four first electrical conductors104. A first terminal of each first electrical conductor104which is connected with the corresponding power circuit10is soldered on the second surface101bof the first printed circuit board101. The magnetic core module102comprises a plurality of holes108. In this embodiment, the number of the holes108corresponds to the number of the first electrical conductors104. Preferably but not exclusively, the magnetic core module102comprises four holes108, and each of the holes108is corresponding in position to the corresponding first electrical conductor104. The four first electrical conductors104pass through the four holes108of the magnetic core module102respectively so that the four output inductors L of the voltage regulator module1can be formed by the combination of the magnetic core module102and the four first electrical conductors104. FIG.4is a schematic assembled view illustrating the power module ofFIG.2Aassembled with a central processing unit and a system board. When the power module2is applied into the electronic device to assembly with a central processing unit7and a system board9of the electronic device, the power module2and the central processing unit7are disposed on the opposite surfaces of the system board9. The system board9has a first surface9aand a second surface9b. The power module2disposed on the first surface9aof the system board9is corresponding in position to the central processing unit7disposed on the second surface9bof the system board9. From the above descriptions, since the power module2of the present disclosure employs the first electrical conductors104as the windings of the output inductors L, the power module2can reduce the power loss of the output inductors L. In addition, since the first electrical conductors104comprise good thermal conductivity and shorter length, the thermal resistance between the output inductors L and the first printed circuit board101is reduced by the first electrical conductors104. Therefore, it is benefit to the power module2to conduct the heat to the case13of the electronic device. At the same time, suitable inductance can be obtained according to the length of the first electrical conductors104and the cross-sectional area of the magnetic core module102. In some embodiments, the power module2comprises a plurality of second electrical conductors105soldered on one edge of the second surface101bof the first printed circuit board101. One or more of the plurality of second electrical conductors105form a positive input terminal of the voltage regulator module1, and the other of the plurality of second electrical conductors105form a negative input terminal of the voltage regulator module1. Since the power module2of the present disclosure employs the second electrical conductors105as the input terminal of the voltage regulator module1, the power module2can reduce the equivalent series resistance ESR and the equivalent series inductance ESL so that the performance of the voltage regulator module1is enhanced. In some embodiments, the power module2comprises a third electrical conductor106soldered on the other edge of the second surface101bof the first printed circuit board101. The third electrical conductor106forms the negative output terminal (Vo−) of the voltage regulator module1. Since the power module2of the present disclosure employs the third electrical conductor106as the negative output terminal (Vo−) of the voltage regulator module1, the power module2can reduce the equivalent series resistance ESR and the equivalent series inductance ESL so that the dynamic switching performance of the voltage regulator module1is enhanced. Moreover, since the second electrical conductors105and the third electrical conductor106comprise good thermal conductivity respectively, the thermal resistance between the second electrical conductors105and the first printed circuit board101and the thermal resistance between the third electrical conductor106and the first printed circuit board101is reduced. Therefore, it is benefit to the power module2to conduct the heat to the case13of the electronic device. In this embodiment, the first electrical conductors104, the second electrical conductors105and the third electrical conductors106are made of metallic material for example but not limited to copper, aluminum or alloy. In some embodiments, considering performance and cost, preferably but not exclusively, the first electrical conductors104, the second electrical conductors105and the third electrical conductors106are made of copper. The shape of the electrical conductors isn't limited, which is designed according to the practical requirements. Furthermore, in order to fix the first electrical conductors104, the second electrical conductors105and the third electrical conductors106on the second surface101bof the first printed circuit board101when reflowing, the four first electrical conductors104are stuck and glued with the magnetic core module102, and the second electrical conductors105and the third electrical conductor106are glued at the edge of the magnetic core module102. In other embodiment, the first printed circuit board101comprises a plurality of through-holes202and a plurality of half-holes (not shown inFIGS.2A and2B). Each of the through-holes202run through the first printed circuit board101, and the half-holes located at the second surface101bdo not run through the first printed circuit board101. Besides, the power module2comprises a signal PIN combination107(i.e. a signal communication part) at one edge of the second surface101bof the first printed circuit board101. The signal PIN combination107comprises a plurality of pins. Each pin comprises a first contact part and a second contact part, which are opposite to each other. The first contact parts of some pins of the signal PIN combination107pass through the through-holes202of the first printed circuit board101. The first contact parts of the other pins of the signal PIN combination107are plugged into the half-holes of the second surface101bof the first printed circuit board101by soldering or be directly soldered on the second surface101bof the first printed circuit board101. Besides, the lengths of the pins of the signal PIN combination107can be different due to the different contacting methods. Since some of the pins of the signal PIN combination107are plugged into the half-holes of the second surface101bof the first printed circuit board101or are directly soldered on the second surface101bof the first printed circuit board101without passing through the through-holes202of the first printed circuit board101, it can save the area of the first surface101aof the first printed circuit board101. Therefore, additional electronic elements can be settled on this saved area of the first surface101aof the first printed circuit board101so as to increase the power density of the power module2. In some embodiments, the first surface9aof the system board9comprises a plurality of soldering pads (not shown inFIGS.2A and2B). The first electrical conductors104, the second electrical conductors105, the third electrical conductor106and the pins of the signal PIN combination107can be soldered on the corresponding soldering pads, respectively. FIG.5is a cross-sectional view illustrating the magnetic core module ofFIG.2Aaccording to a first embodiment of the present disclosure. As shown inFIG.5, the magnetic core module102comprises two E cores401,402and one I core403. The I core403is disposed between the two E cores401,402so that four holes108of the magnetic core module102are formed by the combination of the two E cores401,402and the I core403. Besides, a plurality of gaps404a,404b,405aand405bare formed and located at the intersections between the I core403and the two side columns of the two E cores401,402, wherein the E core401comprises two side columns406a,406band a middle column406c, and the E core402comprises two side columns407a,407band a middle column407c. Preferably, the magnetic core module102has a cross-sectional area in-shaped. FIG.6is a cross-sectional view illustrating the magnetic core module according to a second embodiment of the present disclosure. As shown inFIG.6, the magnetic core module410of the power module2of the present disclosure comprises single core integrated molding. In other words, the magnetic core module410can be an integrated structure in one piece. The magnetic core module410comprises a plurality of gaps414a,414b,415aand415blocated at two side columns of the magnetic core module410. Besides, the DC flux density Bdc at the middle column of the magnetic core module410counteracts, and there is no magnetic saturation at the middle column of the magnetic core module410. Moreover, the sectional area of the middle column of the magnetic core module410≤0.8×(the sectional area of one side column of the magnetic core module410+the sectional area of the other side column of the magnetic core module410). Preferably, the magnetic core module410has a cross-sectional area in-shaped. In some embodiments, as shown inFIGS.2A and2B, the power module2comprises a second circuit board assembly5(hereinafter also referred to as a conductive assembly5). The second circuit board assembly5comprises a second printed circuit board103and at least one output capacitor Cout. The second printed circuit board103has a first surface103aand a second surface103b. The second printed circuit board103comprises a plurality of soldering pads (not shown inFIG.2B) disposed on the first surface103aand used to be soldered with the system board9so that the second printed circuit board103can be fixed on the system board9by soldering. Besides, the second printed circuit board103comprises a plurality of first soldering pads204, a plurality of second soldering pads205and a third soldering pad206disposed on the second surface103bof the second printed circuit board103. A second terminal of each first electrical conductor104which forms the positive output terminal (Vo+) of the voltage regulator module1can be soldered on the corresponding first soldering pad204. One terminal of the second electrical conductors105can be soldered on the corresponding second soldering pads205. One terminal of the third electrical conductor106can be soldered on the corresponding third soldering pad206. Furthermore, the second surface103bof the second printed circuit board103comprises the half-hole combination203which comprises a plurality of half-holes. The second contact parts of the pins of the signal PIN combination107are plugged into the half-holes of the half-hole combination203of the second surface103bof the second printed circuit board103by soldering. In other embodiment, the second contact parts of the pins of the signal PIN combination107can be soldered on the second surface103bof the second printed circuit board103directly. Besides, the output capacitor Cout is disposed on the second surface103bof the second printed circuit board103. In other embodiment, the output capacitor Cout is disposed on the system board9when the second printed circuit board103is omitted. Furthermore, the voltage regulator module which is formed by the power module of the present disclosure also can be for example but not limited to a 2-phase buck converter or a 1-phase buck converter. When the voltage regulator module is a 2-phase buck converter, the voltage regulator module comprises two output inductors. Therefore, the differences between of the power module which forms 2-phase buck converter and the power module2which forms 4-phase buck converter shown inFIG.2Aare on the magnetic core module and the first electrical conductors. In this embodiment, the power module which forms 2-phase buck comprises two first electrical conductors.FIG.7is a cross-sectional view illustrating the magnetic core module according to a third embodiment of the present disclosure. When the power module forms 2-phase buck converter, the magnetic core module500of the power module includes two E cores501,502so that two holes504of the magnetic core module500are formed by the combination of the two E cores501,502. The E core501comprises two side columns506aand506band a middle column506c, and the E core502comprises two side columns507aand507band a middle column506c. A gap503ais formed and located between the side column506aand the side column507a. A gap503bis formed and located between the side column506band the side column507b. Moreover, the two first electrical conductors pass through the two holes504respectively to form the two output inductors. FIG.8is a cross-sectional view illustrating the magnetic core according to a fourth embodiment of the present disclosure. In some embodiments, when the power module forms 2-phase buck converter, the magnetic core module510of the power module may include one E core512and one I core511. A gap513ais formed and located between one side column512aof the E core512and the I core511. A gap513bis formed and located between the other side column512bof the E core512and the I core511. Besides, the DC flue density Bdc at the middle column512cof the magnetic core module510counteracts, and there is no magnetic saturation at the middle column512cof the magnetic core module510. Moreover, the sectional area of the middle column512cof the magnetic core module510≤0.8×(the sectional area of one side column512aof the magnetic core module510+the sectional area of the other side column512bof the magnetic core module510). In other embodiments, the magnetic core module510may be integrated molding. In other words, the magnetic core module510can be an integrated structure in one piece. When the voltage regulator module is a 1-phase buck converter, the voltage regulator module comprises one output inductor. Therefore, the differences between of the power module which forms 1-phase buck converter and the power module2which forms 4-phase buck converter shown inFIG.2Aare on the magnetic core module and the first electrical conductors. In this embodiment, the power module which forms 1-phase buck comprises one first electrical conductor.FIG.9is a cross-sectional view illustrating the magnetic core according to a fifth embodiment of the present disclosure. When the power module forms 1-phase buck converter, the magnetic core module600of the power module includes two U cores601,602so that one hole604of the magnetic core module600is formed by the combination of the two U cores601,602. A gap603is formed and located between one side column of the U core601and one side column of the U core602. Moreover, the one first electrical conductor passes through the hole604to form the output inductor. In other embodiment, the magnetic core module600may be formed by one U core and one I core. Besides, the magnetic core module600can be integrated molding. In other words, the magnetic core600can be an integrated structure in one piece. Furthermore, the output inductors can also be coupled together to reduce the ripple of the output current of voltage regulator module. For example, when the voltage regulator module is the 4-phase buck converter, the four output inductors are coupled together. When the voltage regulator module is the 2-phase buck converter, the two output inductors are coupled together. The following will exemplarily illustrate the structures of the magnetic core module and the first electrical conductors of the power module when the power module is the 2-phase buck converter and the output inductors of the 2-phase buck converter are coupled together.FIG.10is a schematic assembled view illustrating the magnetic core module of the power module assembled with the first electrical conductors of the power module when the power module forms a 2-phase buck converter. The magnetic core module700of the power module comprises two E cores701and702. The gap703is formed and located at a middle column of the magnetic core module700. Besides, the two first electrical conductors704and705can be formed by two copper bars which are flexible. The combination of the magnetic core module700and two first electrical conductors704,705can form two coupled output inductors. One terminal (SW1/SW2) of the two electrical conductors704and705are fixed on the first printed circuit board of the power module by soldering. The other terminal (Vo+) of the two electrical conductors704and705are connected to the second printed circuit board or the system board. In the magnetic core module700, there is a gap703formed at the middle column of the magnetic core module700, and the DC flux density Bdc at the middle column of the magnetic core700overlays, and the AC flex density Bac at the middle column of the magnetic core700counteracts. Obviously, the power module using 4-phase buck converter also can use the coupled output inductors based on the same principle shown inFIG.10. From the above descriptions, the present disclosure provides a power module. Since the power module of the present disclosure employs the first electrical conductors as the windings of the output inductors, the power loss of the output inductors can be reduced. In addition, since the first electrical conductors have good thermal conductivity and shorter length, the thermal resistance between the thermal sources and the case of the electronic device is reduced by the first electrical conductors. Therefore, it is benefit to the power module to conduct the heat to the case of the electronic device. At the same time, suitable inductance can be obtained according to the length of the first electrical conductors and the cross-sectional area of the magnetic core. Moreover, since some of the pins of the signal PIN combination are plugged into the half-holes of the second surface of the first printed circuit board or are directly soldered on the second surface of the first printed circuit board without passing through the through-holes of the first printed circuit board, it can save the area of the first surface of the first printed circuit board. Therefore, additional electronic elements can be settled on this saved area of the first surface of the first printed circuit board so as to increase the power density of the power module. While the disclosure has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the disclosure needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures. | 22,300 |
11942261 | DETAILED DESCRIPTION Mode for Carrying Out the Disclosure (Configuration of Common-Mode Choke Coil, SeeFIG.1andFIG.2) A common-mode choke coil1according to one embodiment is described with reference to drawings. Hereinafter, a direction along which a center axis of a winding core portion14extends is defined as an x axis direction. Further, as viewed from the x axis direction, a direction along a long side of a flange portion16is defined as a y axis direction, and a direction along a short side of the flange portion16is defined as a z axis direction. An x axis, a y axis and a z axis are orthogonal to each other. As shown inFIG.1, the common-mode choke coil1includes a core12, windings20,21, and external electrodes22to25. As shown inFIG.2, the common-mode choke coil1is roughly divided into a winding start side region α (first region) where winding of the windings20,21is started, a winding finish side region β (second region) where the winding of the windings20,21is finished, and a center region γ disposed between the winding start side region α and the winding finish side region β. To facilitate the understanding of the configuration of the common-mode choke coil1, inFIG.2, portions of the common-mode choke coil1other than the windings20,21shown in transverse cross section are described in size smaller than an actual size. The core12is made of a magnetic material such as ferrite or alumina, for example. The core12includes a winding core portion14and flange portions16,18. The winding core portion14is a prismatic member extending in the x axis direction. However, the winding core portion14is not limited to a prismatic shape, and may have a circular columnar shape. InFIG.2, the winding core portion14is described in size smaller than a size used in describing the winding core portion14inFIG.1. As shown inFIG.1, the flange portions16,18are mounted on both ends of the winding core portion14in the x axis direction. To be more specific, the flange portion16is mounted on one end of the winding core portion14on a negative direction side in the x axis direction. The flange portion18is mounted on the other end of the winding core portion14on a positive direction side in the x axis direction. The flange portion16has an approximately rectangular parallelepiped shape. Further, on a corner portion of the flange portion16made by a surface S1of the flange portion16disposed on a positive direction side in the x axis direction and a surface S2of the flange portion16disposed on a positive direction side (first direction) in the z axis direction, a recess is formed by cutting the corner portion toward the inside of the flange portion16. However, the recess is not formed on a center portion of the flange portion16in the y axis direction. Instead, an inclined surface extending toward a surface S3of the winding core portion14on a positive direction side in the z axis direction from the surface S2of the flange portion16is formed on the center portion. The flange portion18has an approximately rectangular parallelepiped shape. Further, on a corner portion of the flange portion18made by a surface S4of the flange portion18disposed on a negative direction side in the x axis direction and a surface S5of the flange portion18disposed on a positive direction side in the z axis direction, a recess is formed by cutting the corner portion toward the inside of the flange portion18. However, the recess is not formed on a center portion of the flange portion18in the y axis direction. Instead, an inclined surface extending toward the surface S3of the winding core portion14from the surface S5of the flange portion18is formed on the center portion. The external electrodes22to25are respectively made of an Ni-based alloy such as Ni—Cr, Ni—Cu or Ni, and Ag, Cu, Sn or the like. The external electrodes22to25respectively have an approximately rectangular shape as viewed from a positive direction side in the z axis direction. The external electrodes22,23are mounted on the surface S2of the flange portion16such that the external electrodes22,23are arranged in a row from a positive direction side to a negative direction side in the y axis direction in this order. In this case, the external electrodes22,23are arranged in a row in a spaced-apart manner such that the external electrodes22,23are not brought into contact with each other. The external electrodes24,25are mounted on the surface S5of the flange portion18such that the external electrodes24,25are arranged in a row from a positive direction side to a negative direction side in the y axis direction in this order. In this case, the external electrodes24,25are arranged in a row in a spaced-apart manner such that the external electrodes24,25are not brought into contact with each other. The windings20,21are conductive wires wound on the winding core portion14such that the windings20,21run parallel to each other, and the windings20,21are respectively formed such that a core wire which is mainly made of a conductive material such as copper or silver is covered by an insulating material such as polyurethane or the like. Further, as shown inFIG.2, the windings20,21are respectively formed by being wound on the winding core portion14twelve times. Hereinafter, the respective windings20,21are described specifically. One end of the winding20(first winding) on a negative direction side in the x axis direction is connected to the external electrode22on the surface S2, and the other end of the winding20on a positive direction side in the x axis direction is connected to the external electrode24on the surface S5. The winding20is wound on the winding core portion14such that the winding20is positioned on a negative direction side (one side) in the x axis direction with respect to the winding21at the same turn in the winding start side region α (first region) ranging from one end portion A (first end portion) on a negative direction side in the x axis direction where the winding20is brought into contact with the winding core portion14to a winding position B (first position) disposed in front of the center of the winding core portion14. Counting of the respective numbers of turns of the windings20,21in the winding start side region α is started from one end portion A on a negative direction side in the x axis direction where the windings20,21are wound on the winding core portion. In the winding start side region α, the winding20is wound on the winding core portion14in a state where the winding is brought into direct contact with the winding core portion14, and the winding21is further wound on the winding20. That is, the winding21is wound on the winding core portion14in the winding start side region α with the winding20interposed between the winding21and the winding core portion14. One end of the winding21(second winding) on a negative direction side in the x axis direction is connected to the external electrode23on the surface S2, and the other end of the winding21on a positive direction side in the x axis direction is connected to the external electrode25on the surface S5. The winding21is wound on the winding core portion14such that the winding21is positioned on a positive direction side (the other side) in the x axis direction with respect to the winding20at the same turn in the winding finish side region β (second region) ranging from the other end portion C (second end portion) on a positive direction side in the x axis direction where the winding21is brought into contact with the winding core portion14to a winding position D (second position) disposed in front of the center of the winding core portion14. Counting of the respective number of turns of the windings20,21in the winding finish side region β is started from the other end portion C on a positive direction side in the x axis direction where the windings20,21are wound on the winding core portion. In the winding finish side region β, the winding21is wound on the winding core portion14in a state where the winding21is brought into direct contact with the winding core portion14, and the winding20is further wound on the winding21. That is, the winding20is wound on the winding core portion14in the winding finish side region β with the winding21interposed between the winding20and the winding core portion14. With respect to the windings20,21, the relative positional relationship in the x axis direction between the winding20and the winding21is reversed between the winding start side region α and the winding finish side region β. Accordingly, the windings20,21intersect with each other in the center region γ ranging from the position B to the position D of the winding core portion14. In this case, the windings20,21intersect with each other on the surface S3of the winding core portion14. Further, both windings20,21are directly wound on the winding core portion14seven times. (Manufacturing method: seeFIG.2toFIG.17) Hereinafter, a method of manufacturing the common-mode choke coil1according to one embodiment is described. The x axis direction used in the description of the manufacturing method is a direction along which a center axis of the winding core portion14of the common-mode choke coil1manufactured by the manufacturing method extends. The y axis direction used in the description of the manufacturing method is a direction along which the long side of the flange portion16extends when the core12is fixed to a chuck C1, and the z axis direction used in the description of the manufacturing method is a direction along which the short side of the flange portion16extends when the core12is fixed to the chuck C1. In the manufacture of the common-mode choke coil1, firstly, a powder which contains ferrite as a main component and is used as a material for forming the core12is prepared. Then, ferrite powder prepared in this manner is filled in a female die. By pressing powder filled in the female die by a male die, the filled powder is molded to form a compact having a shape of the winding core portion14and shapes of the flange portions16,18. Next, after the compact having portions corresponding to the winding core portion14and the flange portions16,18is molded, the compact is baked so that the core12is completed. To form the external electrodes22to25, an Ag paste is applied by coating both end portions of the surfaces S2, S5of the flange portions16,18in the y axis direction respectively. Next, adhered Ag paste is dried and baked so that Ag films which form base electrodes for the external electrodes22to25are formed. Then, a metal film made of an Ni-based alloy is formed on the Ag film by applying an electroplating or the like. The external electrodes22to25are formed in accordance with the above-mentioned steps. Next, the windings20,21are wound on the winding core portion14of the core12. In steps of winding the windings20,21, as shown inFIG.3andFIG.4, firstly, the core12is fixed to the chuck C1. The core12is fixed to the chuck C1by grasping the flange portion16of the core12by the chuck. Then, the chuck C1is connected to a rotary drive device not shown in the drawing so that the chuck C1is rotatable using a center axis L2of the winding core portion14of the core12as an axis of rotation. After the core12is fixed to the chuck C1, one end of the winding20supplied from a nozzle N1and one end of the winding21supplied from a nozzle N2are clamped by a wire clamp P1mounted on the chuck C1. The wire clamp P1is mounted on a surface S7of the chuck C1which is approximately parallel to the surface S3of the winding core portion14of the core12, and is positioned on a negative direction side in the x axis direction and on a positive direction side in the y axis direction with respect to the core12. Then, nozzles N1, N2are connected to a drive unit not shown in the drawing, and are movable in an arbitrary direction in a three-dimensional space. Next, the winding20is hooked on a rod-like hooking pin H1mounted on the chuck C1. To be more specific, the hooking pin H1is mounted on the surface S7of the chuck C1, and is positioned between the wire clamp P1and the core12in the x axis direction. The hooking pin H1is also positioned in the vicinity of the external electrode22of the core12fixed to the chuck C1and on a positive direction side in the y axis direction with respect to the core12. In a state where the winding20is brought into contact with a side surface of the hooking pin H1disposed as described above on a positive direction side in the y axis direction, the nozzle N1which supplies the winding20is moved to a negative direction side in the y axis direction with respect to the core12and to a negative direction side in the z axis direction with respect to the core12. Due to such an operation, the winding20is hooked on the hooking pin H1while being pressed to the winding core portion14. In parallel with the operation of hooking the winding20on the hooking pin H1, the winding21is hooked on a rod-like hooking pin H2mounted on the chuck C1. To be more specific, the hooking pin H2is mounted on the surface S7of the chuck C1, and is positioned between the wire clamp P1and the core12in the x axis direction. Further, the hooking pin H2is positioned in the vicinity of an extension of a center axis L2of the winding core portion14of the core12, that is, in the vicinity of an axis of rotation of the chuck C1. In a state where the winding21is brought into contact with a side surface on a negative direction side in the y axis direction of the hooking pin H2disposed as described above, the nozzle N2is moved toward a positive direction side in the x axis direction with respect to the core12. Due to such an operation, the winding21is hooked on the hooking pin H2. However, the above-mentioned movement of the nozzle N2means that the nozzle N2moves substantially parallel to the center axis L2of the core12and hence, there is no possibility that the winding21is pressed to the winding core portion14. Next, the chuck C1is rotated. Due to the rotation of the chuck C1, as shown inFIG.5andFIG.6, the winding20is wound on the winding core portion14only one time. Then, the nozzle N2is positioned in the vicinity of the center axis L2of the winding core portion14of the core12, and is positioned on a positive direction side in the x axis direction with respect to the flange portion18and hence, there is no possibility that the winding21is wound on the winding core portion14. Accordingly, in this step, the winding20is wound on the winding core portion14prior to the winding21by only one turn (first step is finished). After the winding20is wound on the winding core portion14only one time, the nozzle N2is moved in a state where a position of the nozzle N1is held. To be more specific, the nozzle N2is moved from a position in the vicinity of the center axis L2of the winding core portion14to a negative direction side in the y axis direction and to a negative direction side in the z axis direction. With such an operation, the nozzle N2moves to a position in the vicinity of the nozzle N1, and the winding21is pressed to the winding core portion14with the winding20interposed therebetween. As shown inFIG.7andFIG.8, the chuck C1is rotated by five times while moving the nozzles N1, N2toward a positive direction side in the x axis direction. With such an operation, as shown inFIG.9, the winding20is directly wound on the winding core portion14and, at the same time, the winding21is wound on the winding core portion14so as to sandwich the winding20between the winding21and the winding core portion14. Here, the winding20is wound on the winding core portion14only one time before this step is performed and hence, the total number of winding times of the winding20with respect to the winding core portion14is 6. On the other hand, the total number of winding times of the winding21with respect to the winding core portion14is 5 (second step is finished). Next, as shown inFIG.10andFIG.11, the nozzle N1is moved in a state where a position of the nozzle N2is held. To be more specific, the nozzle N1is moved to a position in the vicinity of the center axis L2of the winding core portion14of the core12from a position on a negative direction side in the y axis direction and on a negative direction side in the z axis direction with respect to the core12. With such an operation, a state is brought about where only the winding21is pressed to the winding core portion14. After the nozzle N1is moved, firstly, the chuck C1is rotated one time. Thereafter, by further rotating the chuck C1one time, the winding21is wound on the winding core portion14by two turns. At this stage of operation, the nozzle N1is positioned in the vicinity of the center axis L2and on a positive direction side in the x axis direction with respect to the flange portion18and hence, there is no possibility that the winding20is wound on the winding core portion14. Further, by rotating the chuck C1two times in this step, as shown inFIG.12, the total number of turns of the winding21with respect to the winding core portion14becomes seven (third step and fifth step are finished). Next, the position of the nozzle N1and the position of the nozzle N2are exchanged with each other. To be more specific, the nozzle N1positioned in the vicinity of the center axis L2is moved to the position on a negative direction side in the y axis direction and on a negative direction side in the z axis direction with respect to the core12, and the nozzle N2positioned on a negative direction side in the y axis direction and on a negative direction side in the z axis direction with respect to the core12is moved to the position in the vicinity of the center axis L2. With such an operation, a state is brought about where only the winding20is pressed to the winding core portion14. After the position of the nozzle N1and the position of the nozzle N2are exchanged with each other, the chuck C1is rotated one time. Due to the rotation of the chuck C1, the winding20is wound on the winding core portion14only one time. At this stage of operation, the nozzle N2is positioned in the vicinity of the center axis L2and on a positive direction side in the x axis direction with respect to the flange portion18and hence, there is no possibility that the winding21is pressed to the winding core portion14. In this step, by rotating the chuck C1one time, as shown inFIG.13, the total number of turns of the winding20with respect to the winding core portion14becomes seven (sixth step is finished). Next, the nozzle N2is moved. To be more specific, as shown inFIG.14andFIG.15, the nozzle N2is moved to a negative direction side in the y axis direction with respect to the core12from a position in the vicinity of the center axis L2. At this stage of operation, the nozzle N2is positioned on a positive direction side in the x axis direction with respect to the nozzle N1. With such a configuration, the winding21is pressed to the winding core portion14and, at the same time, the winding20is pressed to the winding core portion14with the winding21interposed between the winding20and the winding core portion14. Then, the chuck C1is rotated by approximately five times while moving the nozzles N1, N2to a positive direction side in the x axis direction. With such an operation, the winding21is directly wound on the winding core portion14and, at the same time, the winding20is wound on the winding core portion14with the winding21interposed between the winding20and the winding core portion14. In this step, by rotating the chuck C1five times, a state is brought about where the windings20,21are wound on the winding core portion14twelve times as shown inFIG.2(fourth step is finished). Next, as shown inFIG.16andFIG.17, the winding20is hooked on a rod-like hooking pin H3which is mounted on a guide member C2disposed on a side opposite to the chuck C1with the core12interposed between the guide member C2and the chuck C1. To be more specific, the hooking pin H3is disposed on a positive direction side in the x axis direction and on a positive direction side in the y axis direction with respect to the core12. By bringing the winding20into contact with a side surface of the hooking pin H3on a positive direction side in the y axis direction disposed as described above, the nozzle N1which supplies the winding20is moved to a positive direction side in the x axis direction and to a negative direction side in the y axis direction. Then, the winding20is clamped by the wire clamp P2mounted on the guide member C2. In parallel with the operation of hooking the winding20on the hooking pin H3, the winding21is hooked on a rod-like hooking pin H4mounted on the guide member C2. To be more specific, the hooking pin H4is disposed on a positive direction side in the x axis direction and on a negative direction side in the y axis direction with respect to the core12. By bringing the winding21into contact with a side surface of the hooking pin H4disposed as described above on a negative direction side in the y axis direction, the nozzle N2is moved to a positive direction side in the x axis direction and to a negative direction side in the y axis direction. Then, the winding21is clamped by the wire clamp P2. With such operations, the step of winding the windings20,21on the winding core portion14of the core12is finished. In the above-mentioned winding step, the relative positional relationship between the winding20and the winding21in the x axis direction is reversed and hence, the winding20and the winding21intersect with each other. This intersection is performed on a surface of the winding core portion14on an external electrode side where the windings20,21are pulled out, that is, on the surface S3of the winding core portion14. After the winding of the windings20,21is finished, the windings20,21are connected to the external electrodes22to25. To be more specific, in a state where the windings20,21are brought into contact with the external electrodes22,23on the flange portion16, a heater chip is brought into pressure contact with the flange portion16. With such an operation, the windings20,21are pressure-bonded to the external electrodes22,23, respectively. Then, surplus portions of the windings20,21which project to the outside of the core12from the flange portion16are cut. Then, the windings20,21are brought into contact with the external electrodes24,25on the flange portion18, and the heater chip is brought into pressure contact with the flange portion18. Finally, by cutting the surplus portions of the windings20,21which project to the outside of the core12from the flange portion18, the common-mode choke coil1is completed. Advantageous Effect In the common-mode choke coil1, as shown inFIG.2, the winding20is wound on the winding core portion14such that the winding20is positioned on a negative direction side in an x axis direction with respect to the winding21at the same turn as the winding20in the winding start side region α, and the winding20is wound on the winding core portion14with the winding21interposed between the winding20and the winding core portion14in the winding finish side region β. The winding21is wound on the winding core portion14such that the winding21is positioned on a positive direction side in the x axis direction with respect to the winding20at the same turn as the winding21in the winding finish side region β, and the winding21is wound on the winding core portion14with the winding20interposed between the winding21and the winding core portion14in the winding start side region α. Accordingly, to compare a positional relationship of the windings20,21in the winding start side region α and a positional relationship of the windings20,21in the winding finish side region β to each other without distinguishing the winding20and the winding21with respect to an axis of symmetry L1which passes a middle point M of a segment which connects the winding start side region α and the winding finish side β on the winding core portion14and is orthogonal to the winding core portion, the positional relationship of the windings in the winding start side region α and the positional relationship of the windings in the winding finish side region β are symmetrical to each other. With such a configuration, in the common-mode choke coil1, it is possible to suppress a mode conversion which occurs due to the difference in positional relationship of windings between the winding start side region α and the winding finish side region β. Further, in the common-mode choke coil1, the number of turns of the winding20and the number of turns of the winding21are equal. That is, in both windings20,21, the number of turns is 12. Still further, the number of winding times that the winding20is wound on the winding core portion14in a state where the winding20is brought into contact with the winding core portion14and the number of winding times that the winding21is wound on the winding core portion14in a state where the winding21is brought into contact with the winding core portion14are also equal. That is, in both windings20,21, the number of winding times that the winding is wound on the winding core portion in contact with the winding core portion is seven times. In other words, a length that the winding20is wound on the winding core portion14is equal to a length that the winding21is wound on the winding core portion14. Accordingly, in the common-mode choke coil1, it is possible to suppress a mode conversion which occurs due to the difference in length between windings which are wound on the winding core portion14. Further, in the common-mode choke coil1, the windings20,21intersect with each other on a surface S3of the winding core portion14. In this embodiment, the number of turns of the winding20and the number of turns of the winding21are 12, that is, an even number respectively. In this manner, when the number of turns is an even number, by making the windings20,21intersect with each other on the surface of the winding core portion on an external electrode side to which the windings20,21are pulled out, it is possible to make the lengths of the winding20and the winding21wound on the winding core portion14equal to each other. In the manufacture of the common-mode choke coil1, assuming that the windings20,21are simultaneously wound on the winding core portion14without winding the winding20on the winding core portion14preceding the winding21by one time, as shown inFIG.18, there is a possibility that the winding21which is wound on the winding20falls or steps down from the winding20(hereinafter, referred to as “step-down”). On the other hand, in an actual method of manufacturing the common-mode choke coil1, the winding20is wound on the winding core portion14one time and, thereafter, the windings20,21are wound on the winding core portion14. In this manner, by winding the winding20on the winding core portion14preceding the winding21by one time, winding is performed such that the winding21is fitted into a groove formed by the N-th turn and the (n+1)th turn of the winding20. With such a configuration, in the method of manufacturing the common-mode choke coil1, it is possible to prevent the step-down of the winding21. In the method of manufacturing the common-mode choke coil1, after the second step is finished, the winding21is directly wound on the winding core portion14two times, and the winding20is directly wound on the winding core portion14one time and, thereafter, processing advances to the fourth step. Such a step is performed so as to make the positional relationship of the windings symmetrical between a negative direction side and a positive direction side of the x axis direction in the regions where the windings20,21are wound when the numbers of turns of windings of the common-mode choke coil are even. To consider a case where the numbers of turns of the windings20,21are set to twelve times as in the case of this embodiment and the processing advances to the fourth step immediately after the second step is finished, as shown inFIG.19, the number of turns where the windings are wound doubly in either one of a negative direction side or a positive direction side in an x axis becomes larger than the number of turns where the windings are wound doubly in the other side. To the contrary, in the method of manufacturing the common-mode choke coil1, the processing advances to the fourth step by directly winding the winding21on the winding core portion14two times and, subsequently, by directly winding the winding20on the winding core portion14one time after the second step is finished. Accordingly, it is possible to avoid the occurrence of a state where the number of turns where the windings are wound doubly in either one of the negative direction side or the positive direction side in the x axis becomes larger than the number of turns where the windings are wound doubly in the other side. (First Modification) The difference between the common-mode choke coil1A according to a first modification and the common-mode choke coil1lies in the numbers of turns of the windings20,21and the intersecting position of the windings20,21. The difference is specifically described hereinafter. As shown inFIG.20, in the common-mode choke coil1A, the total number of turns of the windings20,21with respect to a winding core portion14are 13. The windings20,21are wound on the winding core portion14in a state where the windings20,21are in contact with the winding core portion14seven and half times. The windings20,21intersect with each other within a center region γ ranging from a position B to a position D on the winding core portion14. In this case, as shown inFIG.21, the windings20,21intersect with each other on a surface S6of the winding core portion14on a negative direction side in a z axis direction. In the common-mode choke coil1A having the above-mentioned configuration, as shown inFIG.20, to compare positional relationships of the windings20,21in the winding start side region α and the positional relationship of the windings20,21in the winding finish side region β to each other without distinguishing the winding20and the winding21with respect to an axis of symmetry L1which passes a middle point M of a segment which connects the winding start side region α and the winding finish side β to each other on the winding core portion14and is orthogonal to the winding core portion14, the positional relationship of the windings in the winding start side region α and the positional relationship of the windings in the winding finish side region β are symmetrical to each other. With such a configuration, in the common-mode choke coil1A, it is possible to suppress a mode conversion which occurs due to the difference in positional relationship of the windings between the winding start side region α and the winding finish side region β. Further, in the common-mode choke coil1A, the number of turns of the winding20and the number of turns of the winding21are equal. That is, in both windings20,21, the number of turns is 13. Still further, the number of winding times that the winding20is wound on the winding core portion14in a state where the winding20is brought into contact with the winding core portion14and the number of winding times that the winding21is wound on the winding core portion14in a state where the winding21is brought into contact with the winding core portion14are equal. That is, in both windings20,21, the number of winding times that the winding is wound on the winding core portion in contact with the winding core portion is 7.5. In other words, a length that the winding20is wound on the winding core portion14is equal to a length that the winding21is wound on the winding core portion14. Accordingly, in the common-mode choke coil1A, it is possible to suppress a mode conversion which occurs due to the difference in length between the windings which are wound on the winding core portion. Further, in the common-mode choke coil1A, the windings20,21intersect with each other on a surface S6of the winding core portion14. In this embodiment, the number of turns of the winding20and the number of turns of the winding21are 13, that is, an odd number, respectively. In this manner, when the number of turns is an odd number, by making the windings20,21intersect with each other on the surface on a side opposite to a surface of the winding core portion on an external electrode side from which the windings20,21are pulled out, it is possible to make a length that the winding20is wound on the winding core portion14and a length that the winding21is wound on the winding core portion14equal to each other. Other configurations and manner of operation and advantageous effects such as the prevention of “step-down” of the common-mode choke coil1A according to this modification are substantially equal to the corresponding configurations and manner of operation and advantageous effects of the common-mode choke coil1according to the first embodiment. (Second Modification) In a common-mode choke coil1B according to a second modification, as shown inFIG.22, a region where a winding20is wound on a winding core portion14with a winding21interposed between the winding20and the winding core portion14and a region where the winding21is wound on the winding core portion14with the winding20interposed between the winding21and the winding core portion14are set larger than corresponding regions of the common-mode choke coil1A according to the first modification. With such a configuration, in a method of manufacturing a common-mode choke coil, this configuration can be acquired by performing the following method of manufacturing a common-mode choke coil1B. That is, after a first step and a second step are finished, the winding21is directly wound on the winding core portion14one time in a third step and, thereafter, the processing advances to a fourth step. Other configurations and manner of operation and advantageous effects of the common-mode choke coil1B according to this modification are substantially equal to the corresponding configurations and manner of operation and advantageous effects of the common-mode choke coil1A according to the first modification. Other Embodiments The common-mode choke coil and the method of manufacturing such a common-mode choke coil according to the present disclosure are not limited to those described in the embodiments, and various modifications are conceivable without departing from the gist of the present disclosure. For example, the number of turns of windings and shapes, materials and the like of the winding core portion and the flange portions in the core can be set as desired. Further, the middle point M which connects the winding start side region α and the winding finish side region β to each other in an x axis direction may not agree with a middle point of the winding core portion14. Further, constitutions of the respective embodiments may be combined with each other. INDUSTRIAL APPLICABILITY As has been described heretofore, the present disclosure is usefully applicable to a common-mode choke coil and a method of manufacturing a common-mode choke coil, and the common-mode choke coil to which the present disclosure is applied is excellent in suppressing the occurrence of the mode conversion. DESCRIPTION OF REFERENCE SYMBOLS A: one end portion of winding which is brought into contact with winding core portion (first end portion) C: the other end portion of winding which is brought into contact with winding core portion (second end portion) B: winding position in front of center of winding core portion as viewed from first end portion among windings which are in contact with winding core portion (first position) D: winding position in front of center of winding core portion as viewed from second end portion among windings which are in contact with winding core portion (second position) | 35,971 |
11942262 | DETAILED DESCRIPTION In the following, an embodiment of an inductor component will be described. Note that the drawings show enlarged views of components in some cases for easy understanding. Dimensional ratios of components are sometimes different from actual dimensional ratios or dimensional ratios in other drawings. As shown inFIG.1, an inductor component10includes an element body20configured of a magnetic material. The element body20has an outer appearance of a flat quadrangular prism. A material of the element body20is resin containing a metal magnetic powder such as iron and works as a magnetic material having magnetism as a whole. Note that, in the following description, a center axial line-direction of the element body20is assumed as a length direction Ld. In addition, a height direction Td and a width direction Wd that are perpendicular to the length direction Ld are defined as follows. Specifically, the height direction Td is the direction that is one of directions perpendicular to the length direction Ld and is perpendicular to the main face of a circuit board when the inductor component10is assembled on the circuit board. The width direction Wd is the direction that is one of directions perpendicular to the length direction Ld and is parallel to the main face of a circuit board when the inductor component10is assembled on the circuit board. In the present embodiment, the element body20has a larger dimension in the width direction Wd than in the height direction Td. As shown inFIG.2, an inductor wire30is disposed in the element body20. The inductor wire30extends on a virtual flat plane VF that is a plane passing inside the element body20. Further, a thickness of the inductor wire30in the height direction Td is approximately one quarter of a dimension of the element body20in the height direction Td. In the present embodiment, the inductor wire30extends parallel to both of a first main face MF1, which is an upper surface of the element body20inFIG.2, and a second main face MF2, which is a lower surface of the element body20inFIG.2. Therefore, the virtual flat plane VF is also parallel to both of the first main face MF1and the second main face MF2. Further, the inductor wire30is disposed at a center of the element body20in the height direction Td. The inductor wire30is made of a conductive material. In the present embodiment, the inductor wire30has a composition in which a proportion of copper is more than or equal to 99 atomic % and a proportion of sulfur is more than or equal to 0.01 atomic % and less than 1.0 atomic (i.e., from % 0.01 atomic % to 1.0 atomic %) in the present embodiment. As shown inFIG.3, the inductor wire30is configured with a wire main body31, a first pad32, a second pad33, and protrusions34. The wire main body31of the inductor wire30has an oblong rectangular shape elongated in the length direction Ld in the top view. Since the wire main body31has an oblong rectangular shape as described above, a wire width MW, of the wire main body31, parallel to the virtual flat plane and perpendicular to the extending direction of the wire main body31is constant. With regard to the inductor wire30, the first pad32is connected to a first end, of the wire main body31, in the length direction Ld. The first pad32has a square shape in the top view. Further, a dimension of the first pad32in the width direction Wd is wider than the wire width MW of the wire main body31. Note that the first pad32is a wiring part to connect the wire main body31to a first columnar wiring line41to be described later. With regard to the inductor wire30, the second pad33is connected to a second end, of the wire main body31, in the length direction Ld. The second pad33has the same square shape as the first pad32in the top view. Further, a dimension of the second pad33in the width direction Wd is wider than the wire width MW of the wire main body31. Note that the second pad33is a wiring part to connect the wire main body31to a second columnar wiring line42to be described later. As shown inFIG.2, the first columnar wiring line41of the same material as the inductor wire30is connected to an upper side of the first pad32in the height direction Td. The first columnar wiring line41has a square shape in the top view and has the same dimensions in the length direction Ld and the width direction Wd as the first pad32. The first columnar wiring line41extends in the height direction Td to the first main face MF1of the element body20and is exposed from the first main face MF1of the element body20. In other words, the first columnar wiring line41passes through inside the element body20in the height direction Td. Note that the above expression “passes through inside the element body20in the height direction Td” means that the first columnar wiring line41is not exposed in the length direction Ld or the width direction Wd of the element body20. The second columnar wiring line42of the same material as the inductor wire30is connected to an upper side of the second pad33in the height direction Td. The second columnar wiring line42has a square shape in the top view and has the same dimensions in the length direction Ld and the width direction Wd as the second pad33. The second columnar wiring line42extends in the height direction Td to the first main face MF1of the element body20and is exposed from the first main face MF1of the element body20. In other words, the second columnar wiring line42passes through inside the element body20in the height direction Td. Note that the above expression “passes through inside the element body20in the height direction Td” means that the second columnar wiring line42is not exposed in the length direction Ld or the width direction Wd of the element body20. As shown inFIG.1, a part, of each of the first pad32and the second pad33, exposed from the first main face MF1of the element body20is covered with an outer terminal50. Specifically, the outer terminals50are disposed on an upper side of the first main face MF1. The outer terminals50each have a three-layer structure in which copper, nickel, and gold are layered in order from each pad's side. As described above, the inductor component10includes the element body20, the inductor wire30, the first columnar wiring line41, the second columnar wiring line42, and the outer terminals50. Note that inFIGS.1and2, the outer terminals50are illustrated to have no thickness. Further,FIGS.1to3each illustrate a transparent view where the element body20is transparent. Further,FIG.3does not show the first columnar wiring line41, the second columnar wiring line42, or the outer terminals50. As shown inFIG.1, with regard to the inductor wire30, each protrusion34having an oblong rectangular shape in the top view protrudes from one of the edges, of the wire main body31, in the width direction Wd. Each protrusion34extends, from a center of the wire main body31in the extending direction of the wire main body31, in a direction perpendicular to the extending direction. As shown inFIG.2, the protrusions34extend on the virtual flat plane VF similarly to the wire main body31. Further, in the present embodiment, as shown inFIG.3, the protrusions34are each provided on one of the both sides, of the wire main body31, in the width direction Wd with the extending direction of the wire main body31sandwiched between the protrusions34. As shown inFIG.3, regarding dimensions of each protrusion34, a dimension by which the protrusion34protrudes from the edge of the wire main body31in the width direction Wd is assumed as a protrusion width PW, and a dimension in a direction perpendicular to a direction in which the protrusion34protrudes is assumed as a protrusion length PL. The protrusion length PL is a dimension, in the extending direction, of a region in which the dimension in the width direction Wd is larger than the wire width MW in the wire main body31having the constant wire width MW in the extending direction. Further, the protrusion width PW is a dimension from the edge of the wire main body31to a protrusion tip of protrusion34. The edge of the wire main body31is set by using the fact that the wire width MW, which is the dimension of the wire main body31in the width direction Wd, is constant. Specifically, a position that is away from the center, of the inductor wire30, in the width direction Wd by the distance of “wire width MW/2” in the width direction can be deemed as the edge of the wire main body31. The protrusion width PW and the protrusion length PL are measured in a viewing field in which the protrusion34and the wire main body31can be observed when a surface perpendicular to the height direction Td of the inductor wire30is subjected to cross-sectional observation. The cross-section to be observed in this observation is observed on a cross-section at the center in the height direction Td. With regard to the inductor wire30, a contact area between the wire main body31and the virtual flat plane VF can be calculated by multiplication of a wire length ML and the wire width MW of the wire main body31. Further, a protrusion area PA of the protrusions34is calculated by adding an area of each protrusion34, and the area of each protrusion34can be calculated by multiplication of the protrusion length PL and the protrusion width PW of the protrusion34. Specifically, in the present embodiment, an area ratio RA, which is a ratio of the protrusion area PA of the protrusions34to the area of the wire main body31, is 6.0%. That is, the area ratio RA is less than or equal to 7.2%. Next, a method for manufacturing the above inductor component10will be described. The manufacturing method in the present embodiment is a method using Semi Additive Process (SAP). Note that, in the following description, the description will be given with reference to cross-sectional views perpendicular to the length direction Ld. As shown inFIG.4, a base member preparation step is performed first. Specifically, a plate-shaped base member110is prepared. A material of the base member110is ceramic. The base member110has a rectangular shape in the top view, and each side of the base member110has such a dimension to house a plurality of inductor components10. In the following description, the description will be given assuming a direction perpendicular to a surface direction of the base member110as the vertical direction. Next, as shown inFIG.5, a base resin layer120is applied to an entire upper surface of the base member110. The base resin layer120is configured of a non-magnetic material and is formed, for example, by spin coating a surface of the base member110with polyimide varnish containing a trifluoromethyl group and silsesquioxane. Next, as shown inFIG.6, a patterning resin layer130is formed on the base resin layer120. Specifically, the patterning resin layer130is formed, in a region a little larger than a region on which the inductor wire30is disposed in the top view, by patterning a non-magnetic insulating resin by photolithography. Next, a seed layer140is formed on the patterning resin layer130and on an upper surface of a part of the base resin layer120not covered with the patterning resin layer130. Specifically, a seed layer140of copper is formed by sputtering from an upper surface side of the base member110. Note that, in the drawing, the seed layer140is thinner than the other layers and is shown by a line. Next, as shown inFIG.6, a first covering part150is formed to cover a part of an upper surface of the seed layer140on which the inductor wire30is not formed Specifically, a photosensitive dry film resist is first applied to the entire upper surface of the seed layer140. Next, the dry film resist is hardened by light-exposure on the entire upper surface of the base resin layer120and on a part of an upper surface, of the patterning resin layer130, on an outer edge part of the patterning resin layer130. In this step, a region in which the pattern is to be formed is set such that the area ratio RA of the protrusions34is less than or equal to 7.2%. After that, a not-hardened part of the applied dry film resist is removed with chemical liquid. By this process, a hardened part of the applied dry film resist constitutes the first covering part150. On the other hand, the seed layer140is exposed on a part that is not covered with the applied first covering part150since the applied dry film resist is removed by chemical liquid. Next, as shown inFIG.7, the inductor wire30is formed by electrolytic plating on a part, of the upper surface of the patterning resin layer130, not covered with the first covering part150. Specifically, electrolytic copper plating is performed to plate copper on a part where the seed layer140is exposed on the upper surface of the patterning resin layer130. This process forms the wire main body31of the inductor wire30, the first pad32, the second pad33, and the protrusions34. Note thatFIG.7shows only the wire main body31of the inductor wire30. Next, the first columnar wiring line41and the second columnar wiring line42are respectively formed on the upper surfaces of the first pad32and the second pad33. Specifically, by using photolithography, a second covering part covering a part where neither the first columnar wiring line41nor the second columnar wiring line42is formed is formed similarly to the first covering part150. By this process, a hardened part of the applied dry film resist forms the second covering part. On the other hand, the upper surfaces of the first pad32and the second pad33are exposed on parts in which the dry film resist is removed by chemical liquid and which are not covered with the first covering part150. Next, the first columnar wiring line41and the second columnar wiring line42are formed by electrolytic plating on the parts not covered with the second covering part. Specifically, electrolytic copper plating is performed to plate copper on the upper surfaces of the first pad32and the second pad33. This process forms the first columnar wiring line41and the second columnar wiring line42. Note thatFIGS.9to11show the first columnar wiring line41and the second columnar wiring line42by broken lines. Next, as shown inFIG.8, the first covering part150and the second covering part are removed. Specifically, by performing a process using a stripper liquid, the first covering part150and the second covering part are swollen. Then, the first covering part150and the second covering part are separated and stripped from the base member110while parts of the first covering part150and the second covering part are physically pinched. Next, a part of the seed layer140sticking out in a surrounding area of the inductor wire30is removed. Specifically, by performing etching on the seed layer140, the part of the seed layer140exposed from the inductor wire30is removed. Next, as shown inFIG.9, a resin containing a magnetic powder, which is a material for a first magnetic layer21, is applied on the upper surface side of the base member110. In this step, the resin containing a magnetic powder is applied so as to cover also upper surfaces of the first columnar wiring line41and the second columnar wiring line42. Next, the resin containing a magnetic powder is solidified by press machining, so that the first magnetic layer21is formed on the upper side of the base member110. Next, an upper side part of the first magnetic layer21is ground off to such an extent that the upper surfaces of the first columnar wiring line41and the second columnar wiring line42are exposed. Next, as shown inFIG.10, the base member110, the base resin layer120, and the patterning resin layer130are removed. Specifically, grinding is performed in a planar manner until a lower surface of the inductor wire30is exposed, so that the base member110, the base resin layer120, and the patterning resin layer130are removed. Note that cut surfaces of the base member110, the base resin layer120, and the patterning resin layer130constitute the virtual flat plane VF, on which the inductor wire30extends. Next, as shown inFIG.11, a resin containing a metal magnetic powder, which is a material for a second magnetic layer22, is applied to lower surfaces of the inductor wire30and the first magnetic layer21. Next, the resin containing a magnetic powder is solidified by press machining, so that the second magnetic layer22is formed on a lower side of the inductor wire30and the first magnetic layer21. Next, a lower side part of the second magnetic layer22is ground such that a dimension from an upper surface of the first magnetic layer21to a lower surface of the second magnetic layer22, in other words, a thickness dimension of the element body20becomes a predetermined dimension. Therefore, in the present embodiment, the virtual flat plane VF coincides with a boundary surface between the lower surface of the first magnetic layer21and an upper surface of the second magnetic layer22. After that, not shown in the drawings, but the outer terminals50are formed on upper surfaces of the first columnar wiring line41and the second columnar wiring line42, which are exposed on the upper surface of the element body20. The outer terminals50are formed by electroless copper plating of each of copper, nickel, and gold. By this process, the outer terminals50in a three-layer structure are formed. Next, dicing is performed by cutting with a dicing machine in such a manner that a length dimension and a width dimension of the element bodies20are predetermined dimensions. By this process, a plurality of the above-mentioned inductor components10can be obtained. Then, as shown inFIG.12, comparison was conducted on inductance ratios and presence or absence of positional displacement of wire with respect to inductor components of a comparative example, inductor components10of the examples, and inductor components of referential examples. The inductor components of the comparative example are different from the above-mentioned inductor components10only in that the inductor components of the comparative example do not have the protrusion34of the inductor wire30. Further, between the inductor components10of the examples and the inductor components of the referential examples, the area ratio RA of the protrusions34to the wire main body31is different. Specifically, the areas of the protrusions34of the Examples 1 to 27 are less than or equal to 3,600 square micrometers, and the area ratios RA of the inductor components10of Examples 1 to 27 are less than or equal to 7.2%. On the other hand, the area ratios RA of the inductor components of Referential examples 28 to 35 are greater than 7.2%. Note that, with regard to all the inductor components, the wire lengths ML are 500 μm, and the wire widths MW are 50 μm. Further, with regard to each inductor component10of the examples and each inductor components of the referential examples, the protrusions34are each provided at the central position of the wire main body31in the extending direction and on one of the both sides of the wire main body31as in the above-mentioned embodiment. Further, each protrusion width PW shown inFIG.12is the sum of two protrusions34. In addition, the ratio of the protrusion width PW to the wire width MW was calculated as a protrusion width ratio, and the ratio of the protrusion length PL to the wire length ML was calculated as a protrusion length ratio. In the present embodiment, the area ratio RA can be calculated also by multiplication of the protrusion width ratio and the protrusion length ratio. First, a predetermined number of the inductor components of the comparative example were manufactured, and it was found that a percentage of the inductor components in which the inductor wire main body31of the inductor wire30was displaced from a designed position to the number of the manufactured inductor components was more than 1%. On the other hand, for each of the inductor components10of the examples and the inductor components of the referential examples, a predetermined n number of inductor components10were manufactured, and it was found that the generation percentage of such positional displacement of wire was less than 1%. In more detail, the generation percentage of positional displacement of wire was more than 0.1% and less than or equal to 1% (i.e., from 0.1% to 1%) for Examples 1, 2, and 6. In contract, for Examples 3 to 5 and 7 to 27 and Referential examples 28 to 35, the generation percentage of positional displacement of wire was less than or equal to 0.1%. Note that, inFIG.12, “E (Excellent)” represents the generation percentage of positional displacement of wire of less than or equal to 0.1%, “G (Good)” represents the generation percentage of positional displacement of wire of more than 0.1% and less than or equal to 1% (i.e., from 0.1% to 1%), and “NG (Not Good)” represents the generation percentage of positional displacement of wire of more than 1%. Next, the inductance ratio is the ratio of the inductance of each example or each referential example to the inductance of the inductor components of the comparative example, in other words, the inductance in the case of no protrusion34provided. The calculation of the inductance was subjected to quantitative comparison by simulation. For the simulation, Femtet (registered trademark) of Murata Manufacturing Co., Ltd. was used. The material of the inductor wire30was copper, and magnetic material was MB3_23deg_JFE Ferrite, which was a low-loss power supply transformer material. The solver was an electromagnetic field analysis solver, and the frequency was 100 MHz. Inductor components sometimes have a variation of approximately ±10% in inductance from a design value due to, for example, variation in manufacturing processes. Therefore, when a change in inductance compared to the inductor components of the comparative example is less than or equal to 3% in simulation, the protrusions34are not supposed to affect the inductance in terms of products. As shown inFIG.12, focusing on the relation between the area ratio RA and the inductance ratio, the inductance ratio is smaller as the area ratio RA is larger. With regard to the inductor components of Referential examples 30 to 35, the inductance ratios are less than or equal to 96%, and it is understood that the inductances were affected since the protrusions34were larger for the wire main bodies31. Further, regarding the inductor components of Referential examples 28 and 29, the inductance ratios are 97%, and the area ratios RA are 8.0% and 8.4%. Here, the inductor components of Referential example 30, the area ratio RA is 8.0, and the inductance ratio is 97%. Therefore, an inductor component having an area ratio RA of 8.0% or 8.4% can have an inductance ratio of less than or equal to 96%. On the other hand, since the inductance ratio is more than or equal to 97% when the area ratio RA is less than or equal to 7.2%, it can be said that the effect of the protrusions34on the inductance is at such a level that the protrusions34do not cause a problem in manufacturing with regard to the inductor components10of Examples 1 to 27. Further, focusing on the relation between the area ratio RA and the generation percentage of positional displacement of wire, the generation percentage of positional displacement of wire is lower as the area ratio RA is larger. With regard to Examples 1, 2 and 6, the area ratio RA is 0.4% or 0.8%, and the generation percentage of positional displacement of wire is “G”. On the other hand, when the area ratio RA is more than or equal to 1.2%, the generation percentage of positional displacement of wire is “E”. Therefore, at least when the protrusions34are formed, the generation of positional displacement of wire can be reduced to less than 1.0%. Further, considering the inductance ratio and the generation percentage of positional displacement of wire with respect to the area ratio RA, when the area ratio RA is more than or equal to 1.2% and less than or equal to 7.2% (i.e., from 1.2% to 7.2%), the generation percentage of positional displacement of wire of the wire main body31can be less than 0.1%, and a decrease in inductance due to the protrusions34can be reduced to less than or equal to 3%. Similarly, focusing on the relation between the protrusion area PA and the inductance ratio, the inductance ratio is generally smaller as the protrusion area PA is larger. With regard to the inductor components of Referential examples 30 to 35, the inductance ratios are less than or equal to 96%, and it is understood that the inductances were affected since the protrusions34were larger for the wire main bodies31. Further, with regard to the inductor components of Referential examples 28 and 29, the inductance ratios are 97%, and the protrusion areas PA are 4,000 square micrometers and 4,200 square micrometers. Here, with regard to the inductor components of Referential example 30, the protrusion area PA is 4,000 square micrometers, and the inductance ratio is 97%. Therefore, an inductor component having a protrusion area PA of 4,000 square micrometers or 4,200 square micrometers can have an inductance ratio of less than or equal to 96%. On the other hand, since the inductance ratio is more than or equal to 97% when the protrusion area PA is less than or equal to 3,600 square micrometers, it can be said that the effect of the protrusions34on the inductance is at such a level that the protrusions34do not cause a problem in manufacturing with regard to the inductor components10of Examples 1 to 27. Further, focusing on the relation between the protrusion area PA and the generation percentage of positional displacement of wire, the generation percentage of positional displacement of wire is lower as the protrusion area PA is larger. With regard to Examples 1, 2 and 6, the protrusion area PA is 100 square micrometers or 400 square micrometers, and the generation percentage of positional displacement of wire is “G”. On the other hand, when the protrusion area PA is more than or equal to 600 square micrometers, the generation percentage of positional displacement of wire is “E”. Therefore, at least when the protrusion34is formed, the generation of positional displacement of wire can be reduced to less than 1%. Further, considering the inductance ratio and the generation percentage of positional displacement of wire with respect to the protrusion area PA, when the protrusion area PA is more than or equal to 600 square micrometers and less than or equal to 3,600 square micrometers (i.e., from 600 square micrometers to 3,600 square micrometers), the generation percentage of positional displacement of wire of the wire main body31can be less than 0.1%, and a decrease in inductance due to the protrusions34can be prevented or reduced. Next, functions and effects of the above embodiment will be described. (1) In the above embodiment, the first covering part150is removed in a manufacturing process of the inductor component10. When the first covering part150is removed, a stripper liquid is used, so that the first covering part150is swollen with the stripper liquid. Therefore, the first covering part150has an expanding nature. As a result, a pressing force is applied to the inductor wire30from the first covering part150. In particular, since the wire main body31is long, force is likely to be applied to the wire main body31in the width direction Wd. If there is a difference between pressing forces to the wire main body31from the right and left directions, a part of the wire main body31can be displaced from a designed position. According to the above embodiment, the protrusions34are provided on the wire main body31to protrude in the width direction Wd. Therefore, an overall width dimension of the inductor wire30is larger at a part where the protrusions34are provided, and the area on which the inductor wire30is adhered to the patterning resin layer130is accordingly larger. Therefore, in particular, even if a force perpendicular to the extending direction of the wire main body31, in other words, even if a force in the width direction Wd is applied, an occurrence of displacement of the wire main body31can be prevented or reduced. (2) According to the above embodiment, the area ratio RA of the protrusion area PA of the protrusions34to the area of the wire main body31is within 7.2%. Since the sized of the protrusions34are not excessively large as described above, a decrease in an amount of the metal magnetic powder due to providing of the protrusions34can be a requisite minimum. An amount by which the inductance is smaller than in the case where the protrusions34are not provided can be reduced. (3) In the above embodiment, to the both ends of the wire main body31in the extending direction, there are connected the first pad32and the second pad33, which have a larger dimension in the width direction Wd than the wire main body31. Therefore, if a pressing force is applied to the inductor wire30from the above-mentioned first covering part150, the position of the first pad32and the second pad33are hardly displaced. On the other hand, the pressing force from the first covering part150tends to intensively act on the center of the wire main body31in the extending direction, which center is most distant from the first pad32and the second pad33of the wire main body31. According to the present embodiment, the protrusions34are disposed at the center of the wire main body31in the extending direction. That is, in the present embodiment, the protrusions34are provided at a part where displacement is most likely to occur, so that displacement is effectively prevented or reduced. (4) According to the above embodiment, the protrusions34extend on the both sides from the edges of the wire main body31. Therefore, it is possible to secure the protrusion area PA of the whole protrusions34and, at the same time, to make the area of one protrusion34small. Therefore, it is possible to prevent or reduce interference to a surrounding area of the wire main body31. (5) According to the above embodiment, with regard to the composition of the inductor wire30, the proportion of copper is more than or equal to 99 atomic %, and the proportion of sulfur is more than or equal to 0.01 atomic % and less than 1.0 atomic % (i.e., from 0.01 atomic % to less than 1.0 atomic %). Therefore, it is possible to form the inductor wire30by electroplating, and a wire that is thick and has low electric resistance can be obtained at low cost. The above embodiment can be modified as below and be practiced. Each embodiment and the following modified examples can be combined and practiced without causing any technical contradiction. In the above embodiment, the inductor wire30only has to be an element that can provide inductance to the inductor component10by generating magnetic flux in the magnetic layer when a current flows through the element. In the above embodiment, the shape of the inductor wire30is not limited to the example in the embodiment. For example, in an example shown inFIG.13, with regard to an inductor wire230of an inductor component210, a wire main body231extends in a curved manner. Further, for example, in an example shown inFIG.14, with regard to an inductor wire330of an inductor component310, a wire main body331extends in a spiral manner. Still further, for example, the inductor wire30may have a meander shape. Also in the case where the wire main body31extends in a nonlinear manner as the modified examples, the dimension in the extending direction of the wire main body31, in other words, the dimension in the direction perpendicular to the center line is the dimension of the width direction Wd of the wire main body31. Note that,FIGS.13and14are top views of the inductor component, where the other members than the inductor wire are made transparent. Further, in a case where an inductor wire extends to be bent in a right angle, it is deemed that a first wire main body and a second wire main body are connected to each other and extending directions of the first wire main body and the second wire main body make a right angle. In this case, for example, in a case where wire widths of the first wire main body and the second wire main body are each constant, the protrusions only have to be provided on the wire main body having a constant width. In the above embodiment, the material of the inductor wire30is not limited to the example in the above embodiment. The material of the inductor wire30only has to be a conductive material and may be silver, gold, nickel, aluminum, or the like. In the above embodiment, a plurality of inductor wires30may be provided in the same layer. In this case, since the plurality of inductor wires30are provided, the plurality of inductor wires30can be put together in a single component. Further, when the plurality of inductor wires30are disposed in the same layer, it is possible to prevent or reduce an increase in an allover size in a lamination direction. In addition, because the inductor wires30are magnetically coupled to each other, it is possible to achieve characteristics appropriate for common mode choke coils, power inductors for multiphase, and the like. Further, an inductor component10in which a plurality of inductor wires30are provided in the same layer may be used while being separated into a plurality of inductor components. Further, for example, the plurality of inductor wires30may be stack in the height direction Td in the inductor component10. In this case, it is possible to improve an inductance as a whole. In the above embodiment, the shapes of the first pad32and the second pad33may be changed. For example, the shapes may be circular in the top view or a multangular shape other than a square. In the above embodiment, the first columnar wiring line41does not have to be directly connected to the first pad32. For example, if the inductor wire30is covered with an insulating resin, the first columnar wiring line41may be coupled via a via wire penetrating through the insulating resin. Alternatively, the first columnar wiring line41can be omitted. In this case, for example, a part of the first pad32is exposed on an outer face of the element body20, and the outer terminals50may be provided on the exposed part. In the above embodiment, the material of the element body20is not limited to the example in the above embodiment. For example, as the metal magnetic powder, it is possible to use iron, nickel, chromium, copper, aluminum, or an alloy containing these metals. Further, as the resin containing a metal magnetic powder, if insulation properties and formability are taken into consideration, polyimide resin, acrylic resin, and phenol resin are preferably used without being limited thereto, and epoxy resin or the like may be used. Note that in the case where the element body20is constituted by a resin containing a metal magnetic powder, the element body20preferably contains more than or equal to 60 wt % of the whole weight of the element body20. Further, in order to increase filling properties of the resin containing a metal magnetic powder, it is preferable to make the resin contain two or three metal magnetic powders having different particle size distributions. Further, the material of the element body20may be composed of a resin containing a ferrite powder instead of a metal magnetic powder or may be composed of a resin containing both of a metal magnetic powder and a ferrite powder. Further, for example, the element body20contain a resin in the above embodiment, but the element body20may be a sintered body of ferrite or may be a non-magnetic body. In the above embodiment, the shape of the element body20is not limited to a rectangular parallelepiped shape and may be, for example, a circular column shape or a multangular shape. In the above embodiment, the materials of the inductor wire30, first columnar wiring line41, and the second columnar wiring line42are not limited to the examples in the above embodiment. The materials of the inductor wire30, the material of the first columnar wiring line41and the second columnar wiring line42may be different. In the above embodiment, the material of the patterning resin layer130is polyimide resin, acrylic resin, epoxy resin, phenol resin, or the like, and the patterning resin layer130preferably contains fluorine or silicon. If the patterning resin layer130contains fluorine or silicon contained, it can improve an effect of prevention or reduction of signal loss at high frequencies. In particular, it is preferable that a content rate of fluorine or silicon be higher at a part of the patterning resin layer130closer to a surface on which the patterning resin layer130is in contact with the inductor wire30. In addition, a higher content rate of silicon at the part close to the inductor wire30can increase adhesion between the patterning resin layer130and the inductor wire30. Further, fluorine atoms may be contained in the patterning resin layer130in a form of trifluoromethyl group, for example. Note that the trifluoromethyl group may be contained as a functional group in the resin or may be contained as an additive agent. Further, the fluorine-containing form other than the trifluoromethyl group may be, for example, difluoromethylene group, monofluoromethylene group, difluoromethyl group, monofluoromethyl group, pentafluoroethyl grope, trifluoroethyl grope, pentafluoropropyl group, hexafluoroisopropyl group, trifluorobutyl group, pentafluorobutyl group, heptafluorobutyl group, monofluorophenyl group, difluorophenyl group, trifluorophenyl group, tetrafluorophenyl group, or hexafluorophenyl group. Further, silicon atoms may be contained in the patterning resin layer130in a form of silsesquioxane body, for example. Further, the silicon atom-containing form other than a silsesquioxane body may be silanol group, silica, or silicone, for example. In the above embodiment, an insulating resin may be stacked on a lower side of the inductor wire30. For example, the insulating resin can be made in the above-mentioned method for manufacturing the inductor component10by, instead of grinding until the lower surface of the inductor wire30is exposed, grinding in such a manner that a part of the patterning resin layer130on the inductor wire30side is left. In this case, the upper surface of the patterning resin layer130coincides with the virtual flat plane VF. In the above embodiment, an entire surface of the inductor wire30may be coated with an insulating film such as polyimide. In this case, for example, a hole is formed in the insulating film on the upper side of each pad, and a via wire is formed inside each via hole. Then, the columnar wiring lines and the inductor wire30are connected via the via wires to secure conductivity. In the above embodiment, a structure of the outer terminals50are not limited to the example in the above embodiment. For example, the outer terminals50may be configured of only copper. Alternatively, the outer terminals50may be omitted. In the above embodiment, the virtual flat plane VF does not have to be parallel to the first main face MF1or the second main face MF2. For example, the virtual flat plane VF may be parallel to an external surface, of the element body20, different from the first main face MF1and the second main face MF2, or may not be parallel to any outer face of the element body20. The inductor component10may be manufactured by another manufacturing method not using a semi-additive method. For example, the inductor component10may be manufactured by using a seed lamination method, a printing lamination method, or another method, and the inductor wire30may be formed by a thin film method such as a sputtering method or a deposition method, a thick film method such as a printing method or a coating method, or a plating process such as a full additive method or a subtractive method. Also in these methods, the inductor wire30sometimes receives a pressing force from a member located in a surrounding area of the inductor wire30during a manufacturing process or after being manufactured. In this case, since the inductor wire30includes the protrusions34, an adhesion force to the virtual flat plane VF on which the inductor wire30extends is accordingly larger. Therefore, in the inductor component10, regardless of manufacturing methods, it is possible to prevent or reduce displace of the inductor wire30from a designed position inside the element body20. In the above embodiment, the shape of the protrusion34of the inductor wire30is not limited to the example in the above embodiment. For example, the shape may be a multangular shape or a semicircular shape. In these cases, it is possible to calculate the area ratio RA of the protrusion area PA of the protrusions34to the area of the wire main body31by calculating the protrusion area PA of the protrusions34, depending on the shape of the protrusion34. The area ratio RA in such cases only has to be within 7.2%. In the above embodiment, the number of the protrusions34of the inductor wire30is not limited to the example in the above embodiment. For example, only one protrusion34may be provided on one side of the wire main body31in the width direction Wd. In the case where the protrusion34is provided only on one side, when the protrusion34is made to extend on a side more distant from other wires in a surrounding area of wire main body31, interference with the other wires can be prevented or reduced. Further, the number of the protrusions34of the inductor wire30may three or more; however, if the number is excessively large, the wire width MW of the wire main body31is not constant, the inductance can be accordingly low. By the way, when a plurality of protrusions34are provided, a total area is calculated as the protrusion area PA by adding the areas of the plurality of protrusions34. The protrusion area PA, which is the total area of the plurality of protrusions34, only has to be less than or equal to 3,600 square micrometers. Further, the area ratio RA is calculated as the ratio of the area of the protrusion area PA, which is the total area of the plurality of protrusions34, to the wire main body31; and the area ratio RA only has to be within 7.2%. In the above embodiment, the positions of the protrusions34of the inductor wire30may be shifted from the center of the wire main body31in the extending direction. Further, for example, as shown inFIG.15, when a plurality of inductor wires30are disposed inside the element body20, the protrusion34on one side of each wire main body31may be shifted, in position in the extending direction, from the protrusion34on the other side of the wire main body31. In this case, it is possible to prevent the protrusion34from being in contact with the protrusion34of the adjacent inductor wire30. In the above embodiment, when the area ratio RA of the protrusion area PA of the protrusions34to the area of the wire main body31is more than or equal to 1.2%, the generation percentage of positional displacement of wire of the wire main body31can be prevented or reduced. Therefore, in a case where a reduction in the inductance is acceptable to a certain extent, the area ratio RA of more than or equal to 1.2% is preferable in terms of preventing or reducing positional displacement of the wire main body31even if the area ratio RA is greater than 7.2%. In the above embodiment, the dimensions of the protrusions34are observed on a cross-section located at the center in the height direction Td; however, the cross-section on which the dimensions of the protrusions34are measured does not have to be at the center in the height direction Td. For example, the cross-section may be displaced by a small amount from the center in the height direction Td due to errors or the like of a device. When the measurement is performed at a position close to an upper surface or a lower surface of the protrusion34, the dimensions of the protrusion34can be varied; therefore, such variation can be reduced by measuring the dimensions of the protrusions34at the center in the height direction Td as much as possible. The technical idea that can be grasped from the above embodiment and modified examples will be described. An inductor component includes: an element body containing a magnetic material; and an inductor wire disposed in the element body. The wire main body of the inductor wire extends on a predetermined plane; and a wire width is constant, where the wire width is a dimension of the wire main body in a width direction parallel to the predetermined plane and perpendicular to an extending direction of the wire main body. A protrusion extends, on the plane, from the wire main body. An area ratio of the protrusion to the wire main body is more than or equal to 1.2% as viewed from a direction perpendicular to the plane. With the above configuration, the protrusion is provided on the wire main body; therefore, a contact area, on the predetermined plane, between the inductor wire and the element body is accordingly larger. Therefore, the inductor wire can be strongly in close contact with the other part, so that it is possible to prevent or reduce displacement of the wire main body from a designed position. | 45,384 |
11942263 | DETAILED DESCRIPTION Reference may now be made in detail to particular embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention may be described in conjunction with the preferred embodiments, it may be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents that may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it may be readily apparent to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, processes, components, structures, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present invention. Referring now toFIG.1, shown is a diagram of an example supportable inductance structure, which can reduce the volume of the power module. Inductance can include coil1, extraction electrode21electrically connected to a first end of coil1, extraction electrode22electrically connected to a tail end of coil1, and inductance magnet3. Coil1can be packaged in inductance magnet3, and extraction electrodes21and22may respectively be led out from the two sides of inductance magnet3. Each of extraction electrodes21and22can extend a certain distance along the corresponding side surface to the bottom surface of inductance magnet3direction, and may be bent to form an outer pin that is bonded to the package carrier. Thus, it can be seen that when the inductance shown inFIG.1is mounted on a printed-circuit board (PCB), the inductance itself can mainly be supported by extraction electrodes21and22. As such, there is a space between the inductance and the package carrier, and the space can be used to place other devices or chips in the power module. Accordingly, such an inductance with a supporting leg can reduce the area and volume of a package assembly, such as a power supply, in order to facilitate the improvement of power density. This example, the extraction electrode may be used as the support leg of the package device. However, the extraction electrode can be relatively thin, and the extraction electrode may bend easily and deform during transportation and installation of the inductance, which may affect the yield of finished products. Moreover, the supportable package assembly can be applied to the power module, and when the power module is shaken, the extraction electrode may be easily deformed, which can cause power failure. In particular embodiments, a supportable package device can include a package body, a conductive body, and at least one extraction electrode. The package body can include a support body and an encapsulating body configured to encapsulate the conductive body of the package device. At least one extraction electrode can be electrically connected to the conductive body, and part of which may be exposed outside the package body. For example, the support body can be located on only part of bottom surface of the encapsulating body, and may protrude from the bottom surface of the encapsulating body to form a cavity defined by the remaining exposed bottom surface of the encapsulating body and an inner side surface of the support body. The package device in certain embodiments may be a semiconductor chip or a discrete component. When the package device is a semiconductor chip, the package body may be a plastic body formed by a plastic sealing process, the conductive body can be a semiconductor die (e.g., semiconductor bare die, unmolded die), and the extraction electrodes may be pins on a lead frame. For example, the semiconductor die can be electrically connected to a pin on the lead frame through a conductor. A portion of the extraction electrode may be located at a bottom end of the support body, or in a same plane as a bottom end of the support body, in order to facilitate the packaged device being electrically connected to an external assembly through the extraction electrode. A portion of the extraction electrode may be located at a bottom end of the support body, or in a same plane as a bottom end of the support body. Thus, when the packaged device is electrically connected to an external assembly through the extraction electrode, the bottom end of the support body may be in contact with the external assembly. Also, the package assembly can be supported above the external assembly through the support body. As such, the weight of the package device itself can be prevented from being mainly supported by the extraction electrode, and the extraction electrode may not be easily deformed. The portion of the extraction electrode that is in the same plane as the bottom end of the support body may be in contact with the bottom end of the support body (e.g., the portion is located on a surface of the bottom end of the support body), or it may be located beside the bottom end of the support body (e.g., the two are not in contact). In addition, the package device may also be a discrete component (e.g., an inductance, a capacitance, a resistance, etc.). In this case, the conductive body may be a core part of the discrete component. The core part can be encapsulated by the encapsulating body (e.g., the conductive body can be a coil part of the inductance, etc.). The encapsulating body and the support body may be integrally formed. For example, the package body can be a magnet formed by one-time pressing of magnetic metal powder. Further, in the process of forming the magnet, the gap in the conductive body may also be filled by the magnetic metal powder. That is, the conductive body can be embedded in the magnet. For example, the package device can be an inductance, and the conductive body may be an inductance coil, where the “first” end of the conductive body may be the first end of the coil, and the “second” end of the conductive body may be the tail end of the coil. In other examples, if the conductive body is a semiconductor die, the first and second ends of the conductive body can be respective electrode pad terminals on the semiconductor die. Referring now toFIG.2, shown is a diagram of a portion of an example conductor structure in a single phase inductance. In this example, the conductor portion can include a conductive body and extraction electrodes. The conductive body can include coil1, and the extraction electrodes can include extraction electrode21electrically connected to a first end of coil1, and extraction electrode22electrically connected to the tail end of coil1. It should be noted that the “first” end here may refer to one end of coil1, and the “tail” end may refer to the other end of coil1. Also, coil1may be a spiral coil formed of a conductor. Further, extraction electrodes21and22may be integrally formed with coil1, or may be a sheet-shaped electrode welded to both ends of coil1. Referring now toFIG.3, shown is a diagram of an example single-phase supportable inductance semi-finished product structure, in accordance with embodiments of the present invention. In this particular example, package body3can include a support body and an encapsulating body for encapsulating coil1. The support body can be located on only part of bottom surface of the encapsulating body, and may protrude from the bottom surface of the encapsulating body to form a cavity defined by the remaining exposed bottom surface of the encapsulating body and inner side surface of the supporting body. The outer side surface of the support body may be conformal with that of the encapsulating body. Further, the support body can be located on at least two opposite parts of the bottom surface of the encapsulating body. Also, the supporting body can extend along the bottom surface of the encapsulating body from the outer side surface to inner part of the bottom surface of the encapsulating body, where the extending length is not less than 1 mm. For example, the support body can include support body31and support body32. The first end surface of the support body can include a first end surface of support body31and a first end surface of support body32. The second end surface of the support body can include a second end surface of support body31and a second end surface of support body32. A first end surface of the support body may be in contact with a bottom surface of the encapsulating body, and a second end surface of the support body can be a bottom surface of the support body. That is, the first end surface of support body31and the first end surface of support body32may both be in contact with a bottom surface of the encapsulating body (e.g., the remaining portions of package body3inFIG.3except for support body31and support body32, which can be a regular cuboids, cylinder, etc.). When the inductance shown inFIG.3is electrically connected to an external assembly, the bottom surface of the encapsulating body can be directed toward the external assembly. Also, the second end surface of support body31and the second end surface of support body32may both be raised with respect to a bottom surface of the encapsulating body by a predetermined height. The predetermined height may be determined according to a height of the component to be subsequently installed between the bottom surface of the encapsulating body and an external assembly. That is, the predetermined height can be greater than the height of the component to be installed. The external assembly here may be a lead frame or a printed circuit board, and the component to be installed may be a semiconductor bare die or a discrete electronic component, or the like. As shown inFIGS.2and3, the first end of the extraction electrode can include a first end of extraction electrode21and a first end of extraction electrode22, and the second end of the extraction electrode can include a second end of extraction electrode21and a second end of extraction electrode22. For example, the first end of extraction electrode21and the first end of extraction electrode22may be electrically connected to the first end and the tail end of coil1, respectively. Also, at least part of extraction electrode21and at least part of extraction electrode22may be exposed by package body3. Referring now toFIG.4, shown is a structural diagram of an example single-phase supportable inductance structure, in accordance with embodiments of the present invention. Referring also toFIG.5, shown is a front view of the example ofFIG.4, in accordance with embodiments of the present invention. Referring also toFIG.6, shown is a bottom view of the example ofFIG.4, in accordance with embodiments of the present invention. Referring also toFIG.7, shown is a top view of the example ofFIG.4, in accordance with embodiments of the present invention. Referring also toFIG.8, shown is a side view of the example ofFIG.4, in accordance with embodiments of the present invention. After the conductor portion (see, e.g.,FIG.1) is wrapped by the package body, a diagram of a supportable inductance structure formed by further bending the extraction electrode is shown inFIG.4. In order to show the inductance structure inFIG.4more clearly,FIGS.5to8respectively show plan views of the inductance ofFIG.4as seen from various directions.FIG.5is a view (e.g., front view) seen from the direction of arrow C inFIG.4, andFIG.6is a view (e.g., bottom view) seen from the opposite direction of arrow A inFIG.4.FIG.7is a view (e.g., top view) seen from the direction of the arrow A inFIG.4, andFIG.8is a view (e.g., side view) seen from the direction of arrow B inFIG.4. On the basis of the semi-finished product shown inFIG.3, the portion of extraction electrode21exposed by package body3can be bent to bottom surface of the support body, such that at least a first part of the extraction electrode is exposed on the bottom surface of the support body, and a second part of the extraction electrode is exposed on the side surfaces of the package body. Also, the first part and the second part of the extraction electrode can be connected together, where the a first part of the extraction electrode may include the second end of extraction electrode. Extraction electrode21may extend along the first side of package body3to bottom surface of the support body such that a lower surface of a first part of extraction electrode21and the bottom surface of support body31are in the same plane. Similarly, the portion of extraction electrode22exposed by package body3can be bent in the direction of the second end of the support body32. Extraction electrode22can extend along the second side of the package body to bottom surface of the support body, such that a lower surface of a first part of extraction electrode22and the bottom surface of support body32are in the same plane. In order to make the extraction electrodes and the corresponding support bodies better engage, as shown inFIGS.3and4, the second ends of the support bodies may be provided with grooves, for example. Groove311can be located at the second end surface of support body31, and groove321may be located at the second end surface of support body32. When the extraction electrodes is bent, the first part of extraction electrode21can be buckled in groove311, and the first part of extraction electrode22can be buckled in groove321. For example, “buckled” as described herein can indicate any suitable type of securing, fastening, and/or attaching in the given groove. Extraction electrodes21and22may be provided with a solder layer such that extraction electrodes21and22are soldered to package body3, and subsequently are electrical connected to the external assembly by soldering. As can be seen in the example ofFIG.4, since the package body includes support bodies which are convex relative to the low surface of a encapsulating body, in addition to the encapsulating body for encapsulating the conductive body, each of the support bodies can be located on only part of bottom surface of the encapsulating body. Also, at least part of the extraction electrode may be exposed on the bottom surface of the support body, and the bottom surface of the support body is away from the encapsulating body. When the package device is electrically connected to the external assembly, there may be no need to take the electrode itself to support the weight of the entire packaged device, and instead the package device can be supported by the support body of the package body itself. Therefore, when the supportable package device is mounted on an external assembly, the bottom surface of the encapsulating body may face the external assembly. Also, the second end surface (e.g., bottom surface) of each of the support bodies can be in contact with the external assembly, and the second end of each of the extraction electrodes may be electrically connected to the external assembly. The package device can be supported above the external assembly by each of the support bodies, and there may be a space between the encapsulating body and the external assembly for accommodating other components (e.g., semiconductor bare dies or discrete electronic components). This can be conducive to space saving, and reducing possible damage of the extraction electrode, along with having a relatively high production quality rate and reliability. In the example supportable package device shown inFIG.4, the bending process of each of the extraction electrodes may be performed after package body3is formed. Therefore, the second part of each of the extraction electrodes (e.g., the second part of extraction electrode21and second part of extraction electrode22) can be located outside package body3such that subsequent bending process may be performed. InFIG.4, each of the second parts can be in contact with side surfaces of package body3. In other examples, each of the second parts may not be in contact with each side surface of package body3. In addition, it should be noted that the side surfaces of package body3can include side surfaces of the encapsulating body and side surfaces of each of the support bodies, where side surfaces of the encapsulating body are adjacent to a bottom surface of the encapsulating body. The side surfaces of the support bodies can be located between the first end surface of the support bodies and the second end surface of the support bodies. For example, a first side surface of package body3can include a first side surface of support body31and a first side surface of the encapsulating body. In one example, the second part of extraction electrode21may be located on the first side surface of package body3. Similarly, a second side surface of package body3can include a first side surface of support body32and a second side surface of the encapsulating body. In one example, the second part of second extraction electrode22can be located on the second side surface of package body3. For example, the first side surface of the encapsulating body may be opposite to the second side surface of the encapsulating body, and the first side surface of package body3may be opposite to the second side surface of package body3. In other examples, the second part of each of the extraction electrodes may be not exposed by package body3. In this case, it may be necessary to bend each of the extraction electrodes before wrapping the conductor structure shown inFIG.1with package body3, such that the second end of each of the extraction electrodes can be bent to a plane. For example, the plane is coplanar with a plane of the second end surface of the subsequently formed support bodies. In this case, the second part of each of the extraction electrodes can include one portion extending in the encapsulating body and the other portion extending in the supporting bodies. Also, the other portion of the extraction electrode may be exposed at the bottom surface of the support body. Continuing withFIGS.3and4, the encapsulating body and the support body of the package body may be integrally formed. For example, the conductor structure inFIG.2can be placed in a pre-machined metal mold according to a predetermined position, and then the conductor structure and the magnetic metal powder shown inFIG.2may be press-molded into a structure as shown inFIG.3by a powder core press. That is, the package body can be a magnet that is once press molded of magnetic metal powder. The conductive body of the supportable package device may be applicable not only to devices including only one conductive body, but also to devices including a plurality of conductive bodies. For example, two or more multi-phase inductance structure, as opposed to strictly a single-phase inductance shown inFIG.4may be supported in certain embodiments. Referring now toFIG.9, shown is a diagram of a portion of an example conductor structure in a two-phase inductance, in accordance with embodiments of the present invention. Referring also toFIG.10, shown is a diagram of an example two-phase supportable inductance semi-finished product structure, in accordance with embodiments of the present invention. Referring also toFIG.11, shown is a bottom view of the example ofFIG.10, in accordance with embodiments of the present invention. As shown inFIGS.9-11, in a two-phase supportable inductance, the first conductive body can include coil1as shown inFIG.1, and the second conductive body can include coil4coupled to coil1. The supportable package device may further include extraction electrodes51and52. A first end of extraction electrode51can connect to a first end of coil4, and a first end of extraction electrode52can connect to a tail end of coil4. In addition, the support body can also include support body33and support body34. A first end of the support body may further include a first end of support body33and a first end of support body34. A second end of the support body may further include a second end of support body33and a second end of support body34. Similarly, the second end surface of support body33and the second end surface of support body34can be respectively provided with grooves331and341. The first part of extraction electrode51may be in contact with the second end surface of support body33, and in the same plane. For example, the first part of extraction electrode51can be buckled in groove331. The first part of extraction electrode52may be in contact with the second end surface of support body34, and in the same plane. Also, the first part of extraction electrode52can be buckled in groove341. The positional relationship between extraction electrode51and package body3may be the same as the positional relationship between extraction electrode21and package body3. Also, the positional relationship between extraction electrode52and package body3may be the same as the positional relationship between extraction electrode22and package body3. In order to make the coupling coefficient between coils1and4relatively large, coils1and4can be placed in the package body3in stacked layers. However, in some applications, the coupling coefficients of the two coils of the two-phase inductance may be required to be relatively small. In this case, coils1and4may be arranged side by side with a certain distance between them, as shown inFIGS.12and13. Referring now toFIG.12, shown is a diagram of a portion of an example conductor structure in another two-phase inductance, in accordance with embodiments of the present invention. Referring also toFIG.13, shown is a diagram of another example two-phase supportable inductance, in accordance with embodiments of the present invention. In this particular example, the number and arrangement of the support bodies of package body3can be the same as those inFIG.4. That is, support bodies31and32, and a first part of extraction electrode51may be in contact with one of the second end surface of support body31and the second end surface of support body32, and can be in same plane. A first part of extraction electrode51may be in contact with the other one of the second end surface of support body31and the second end surface of support body32, and can be in same plane. The first part of extraction electrode51and the first part of extraction electrode52can respectively be buckled in the groove of the corresponding supporting body. Referring now toFIG.14, shown is a diagram of an example package assembly, in accordance with embodiments of the present invention. Particular embodiments may provide a package assembly including the supportable package device according to any of the examples described herein. The structure of the example package assembly shown inFIG.14can include assembly6and component7. The package device can be located on assembly6. The second end surface of the support body31and the second end surface of the support body32can be in contact with assembly6, and extraction electrodes21and22may be electrically connected to assembly6. The encapsulating body may be supported above assembly6by the support body, where there is a space between the bottom surface of the encapsulating body, the support body, and component6. Component7may be located on assembly6and within the space. Further, the package assembly can include encapsulating body8that fills a gap between the inductance and component7, and encapsulates the inductance. Assembly6may be configured as a lead frame or a PCB, and component7can be configured as a semiconductor bare die or a discrete electronic component. For example, the package assembly can be a package assembly in a power module, and component7can be a control chip or a power switch transistor in the power module. In certain embodiments, since a package body of the package device includes a encapsulating body for encapsulating the coil, and a support body protruding relative to the bottom surface of the encapsulating body, each of the support bodies may be located at the bottom surface of the encapsulating body. Also, the extraction electrode can be exposed on the bottom surface of the support body. Thus, when the package device is electrically connected to the external assembly, the package device can mainly be supported by the support body of the package body itself. Therefore, the package assembly including the exemplified supportable package device can save space, and reduce the possibility of damage of the extraction electrode, as well as having a high production yield and reliability. The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications, to thereby enable others skilled in the art to best utilize the invention and various embodiments with modifications as are suited to particular use(s) contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents. | 25,146 |
11942264 | DETAILED DESCRIPTION The terms used in the description of the present disclosure are used to describe a specific embodiment, and are not intended to limit the present disclosure. A singular term includes a plural form unless otherwise indicated. The terms “include,” “comprise,” “is configured to,” etc. of the description of the present disclosure are used to indicate the presence of features, numbers, steps, operations, elements, parts, or combination thereof, and do not exclude the possibilities of combination or addition of one or more additional features, numbers, steps, operations, elements, parts, or combination thereof. Also, the terms “disposed on,” “positioned on,” and the like, may indicate that an element is positioned on or beneath an object, and does not necessarily mean that the element is positioned above the object with reference to a gravity direction. The term “coupled to,” “combined to,” and the like, may not only indicate that elements are directly and physically in contact with each other, but also include the configuration in which another element is interposed between the elements such that the elements are also in contact with the other component. Sizes and thicknesses of elements illustrated in the drawings are indicated as examples for ease of description, and the present disclosure are not limited thereto. In the drawings, an L direction is a first direction or a length (longitudinal) direction, a W direction is a second direction or a width direction, a T direction is a third direction or a thickness direction. Hereinafter, a coil component according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings. Referring to the accompanying drawings, the same or corresponding components may be denoted by the same reference numerals, and overlapped descriptions will be omitted. In electronic devices, various types of electronic components may be used, and various types of coil components may be used between the electronic components to remove noise, or for other purposes. In other words, in electronic devices, a coil component may be used as a power inductor, a high frequency (HF) inductor, a general bead, a high frequency (GHz) bead, a common mode filter, and the like. One Embodiment FIG.1is a schematic perspective view of a coil component according to an exemplary embodiment.FIG.2is a perspective view, in which a portion is omitted from the perspective view ofFIG.1, when viewed from a lower side thereof.FIG.3is a view in which a portion is omitted from the perspective view ofFIG.2.FIG.4is a cross-sectional view taken along line I-I′ ofFIG.1.FIG.5is a cross-sectional view taken along line II-II′ ofFIG.1. Referring toFIGS.1to5, a coil component1000may include a body100, a support substrate200, a coil portion300, slit portions S1and S2, and external electrodes410and420. The body100may form an exterior of the coil component1000, and may embed the support substrate200and the coil portion300therein. The body100may be formed to have a hexahedral shape overall. The body100has a first surface101and a second surface102opposing each other in a length direction L, a third surface103and a fourth surface104opposing each other in a width direction W, and a fifth surface105and a sixth surface106opposing each other in a thickness direction T, based on directions ofFIGS.1to5. Each of the first to fourth surfaces101,102,103, and104of the body100may correspond to a wall surface of the body100connecting the fifth surface101and the sixth surface106of the body100. Hereinafter, both end surfaces (a first end surface and a second end surface) of the body100may refer to the first surface101and the second surface102, respectively, and both side surfaces (a first side surface and a second side surface) of the body100may refer to the third surface103and the fourth surface104of the body100, respectively. In addition, one surface and a lower surface of the body100may refer to the sixth surface106, and the other surface and an upper surface of the body100may refer to a fifth surface105of the body100. As an example, the body100may be formed in such a manner that the coil component1000, including the external electrodes410and420to be described later, has a length of 2.0 mm, a width of 1.2 mm, and a thickness of 0.65 mm, but the present disclosure is not limited thereto. The body100may include a magnetic material and a resin. Specifically, the body100may be formed by laminating at least one magnetic composite sheet in which a magnetic material is dispersed in a resin. However, the body100may have a structure other than the structure in which a magnetic material is dispersed in a resin. For example, the body100may be formed of a magnetic material such as ferrite. The magnetic material may be ferrite or magnetic metal powder particles. Examples of the ferrite powder particles may include at least one or more of spinel type ferrites such as Mg—Zn-based ferrite, Mn—Zn-based ferrite, Mn—Mg-based ferrite, Cu—Zn-based ferrite, Mg—Mn—Sr-based ferrite, Ni—Zn-based ferrite, and the like, hexagonal ferrites such as Ba—Zn-based ferrite, Ba—Mg-based ferrite, Ba—Ni-based ferrite, Ba—Co-based ferrite, Ba—Ni—Co-based ferrite, and the like, garnet type ferrites such as Y-based ferrite, and the like, and Li-based ferrites. The magnetic metal powder particle may include one or more selected from the group consisting of iron (Fe), silicon (Si), chromium (Cr), cobalt (Co), molybdenum (Mo), aluminum (Al), niobium (Nb), copper (Cu), and nickel (Ni). For example, the magnetic metal powder particle may be at least one or more of a pure iron powder, a Fe—Si-based alloy powder, a Fe—Si—Al-based alloy powder, a Fe—Ni-based alloy powder, a Fe—Ni—Mo-based alloy powder, a Fe—Ni—Mo—Cu-based alloy powder, a Fe—Co-based alloy powder, a Fe—Ni—Co-based alloy powder, a Fe—Cr-based alloy powder, a Fe—Cr—Si-based alloy powder, a Fe—Si—Cu—Nb-based alloy powder, a Fe—Ni—Cr-based alloy powder, and a Fe—Cr—Al-based alloy powder. The metallic magnetic powder particle may be amorphous or crystalline. For example, the magnetic metal powder particle may be a Fe—Si—B—Cr-based amorphous alloy powder, but is not limited thereto. Each of the magnetic metal powder particles may have an average diameter of about 0.1 μm to 30 μm, but is not limited thereto. The body100may include two or more types of magnetic metal powder particle dispersed in a resin. The term “different types of magnetic powder particle” means that the magnetic powder particles, dispersed in the resin, are distinguished from each other by at least one of average diameter, composition, crystallinity, and shape. The resin R may include epoxy, polyimide, liquid crystal polymer, or the like, in a single or combined form, but is not limited thereto. The body100may have a core110penetrating through the coil portion300to be described later. The core110may be formed by filling a through-hole in the coil portion300with a magnetic composite sheet, but the present disclosure is not limited thereto. The support substrate200may be disposed inside the body100. The support substrate200may be configured to support the coil portion300to be described later. The support substrate200may include an insulating material, for example, a thermosetting insulating resin such as an epoxy resin, a thermoplastic insulating resin such as polyimide, or a photosensitive insulating resin, or the support substrate200may include an insulating material in which a reinforcing material such as a glass fiber or an inorganic filler is impregnated with an insulating resin. For example, the support substrate200may include an insulating material such as prepreg, Ajinomoto Build-up Film (ABF), FR-4, a bismaleimide triazine (BT) film, a photoimageable dielectric (PID) film, and the like, but are not limited thereto. The inorganic filler may be at least one or more selected from the group consisting of silica (SiO2), alumina (Al2O3), silicon carbide (SiC), barium sulfate (BaSO4), talc, mud, a mica powder, aluminum hydroxide (Al(OH)3), magnesium hydroxide (Mg(OH)2), calcium carbonate (CaCO3), magnesium carbonate (MgCO3), magnesium oxide (MgO), boron nitride (BN), aluminum borate (AlBO3), barium titanate (BaTiO3), and calcium zirconate (CaZrO3). When the support substrate200is formed of an insulating material including a reinforcing material, the support substrate200may provide better rigidity. When the support substrate200is formed of an insulating material not including glass fibers, the support substrate200may be advantageous in thinning the entire coil component1000. When the support substrate200is formed of an insulating material including a photosensitive insulating resin, the number of processes of forming the coil portion300may be reduced. Therefore, it may be advantageous in reducing production costs, and a fine via may be formed. The support substrate200may have a thickness of, for example, 10 μm or more to 50 μm or less, but is not limited thereto. The slit portions S1and S2may be formed on edge portions of the sixth surface106of the body100. Specifically, the slit portions S1and S2may be formed along edge portions between the first surface101and the second surface102of the body100and the sixth surface106of the body100, respectively. For example, the first slit portion S1may be formed along the edge portion between the first surface101and the sixth surface106of the body100, the second slit portion S2may be formed along the edge portion between the second surface102and the sixth surface106of the body100. The slit portions S1and S2may have a shape extending from the third surface103of the body100to the fourth surface104of the body100. The slit portions S1and S2do not extend to the fifth surface105of the body100. For example, the slit portions S1and S2do not penetrate through the body100in the thickness direction T of the body100. The slit portions S1and S2may be formed by performing pre-dicing on one surface of a coil bar along an imaginary boundary line matching a width direction of each coil component, among imaginary boundary lines individualizing each coil component, in a coil bar level, a state before each coil component is not individualized. The pre-dicing may adjust depths of the slit portions S1and S2such that lead-out patterns331and332to be described are exposed inwardly of the slit portions S1and S2. Internal surfaces of the slit portions S1and S2may have internal walls, substantially parallel to the first and second surfaces101and102of the body100, and bottom surfaces connecting the internal wall to the first and second surfaces101and102of the body100. Hereinafter, for ease of description, the slit portions S1and S2will be described as having internal walls and lower surfaces, but the present disclosure is not limited thereto. As an example, the internal surface of the first slit S1may be formed to have a curved shape, connecting the first surface101and sixth surface106of the body100to each other, in a cross section in the length-thickness (L-T) direction such that the internal wall and the lower surface may not be readily apparent. The internal surfaces of the slit portions also correspond to surfaces of the body100. However, for understanding of the present disclosure and ease of description, the internal surfaces of the slit portions S1and S2will be distinguished from the first to sixth surfaces101,102,103,104,105, and106, i.e., the surfaces of the body100. The coil portion300may be embedded in the body100to exhibit characteristics of the coil component1000. For example, when the coil component1000is used as a power inductor, the coil portion300may store an electric field as a magnetic field to maintain an output voltage, serving to stabilize a power supply of an electronic device. Referring toFIGS.1,4, and5, based on directions ofFIGS.4and5, the first coil pattern311and the lead-out patterns331and332may be disposed on a lower surface of the support substrate200facing the sixth surface106of the body100, and the second coil pattern312and the dummy lead-out patterns341and342may be disposed on an upper surface of the support substrate200opposing the lower surface of the support substrate200. On the lower surface of the support substrate200, the first coil pattern311may be in direct contact with and connected to the second lead-out pattern332, and each of the first coil pattern311and the second lead-out pattern332may be disposed to be spaced apart from the first lead-out pattern331. The second lead-out pattern332may be formed to extend from an outermost turn of the first coil pattern311. The first lead-out pattern331may be exposed to the first surface101of the body100and the internal surface of the first slit portion S1. The first lead-out pattern331may be continuously exposed to the first surface101of the body100and the lower surface of the first slit portion S1. The second lead-out pattern332may be exposed to the second surface102of the body100and the internal surface of the second slit portion S2. The second lead-out pattern332may be continuously exposed to the second surface of the body100and the lower surface of the second slit portion S2. On the upper surface of the support substrate200, the second coil pattern312may be in contact with and connected to the first dummy lead-out pattern341, and each of the second coil pattern312and the first dummy lead-out pattern341may be disposed to be spaced apart from the second dummy lead-out pattern342. The first dummy lead-out pattern341may be formed to extend from an outermost turn of the second coil pattern312. The first dummy lead-out pattern341may be exposed to the first surface101of the body100. The second dummy lead-out pattern342may be exposed to the second surface102of the body100. The first via321may penetrate through the support substrate200to be in contact with an innermost turn of the first coil pattern311and an innermost turn of the second coil pattern312. The second via322may penetrate through the support substrate to connect the first lead-out pattern331and the first dummy lead-out pattern341to each other. The third via323may penetrate through the support substrate200to connect the second lead-out pattern332and the second dummy lead-out pattern342to each other. As a result, the coil portion300may overall serve as a single coil. Each of the coil patterns311and312may have a planar spiral shape having at least one turn formed about the core110. As an example, the first coil pattern311may form at least one turn about the core110on one surface of the support substrate200. In the present embodiment, first lead-out pattern331may be exposed to a lower surface of the first slit portion S1and may not be exposed to an internal wall of the first slit portion S1. The second lead-out pattern322may be exposed to a lower surface of the second slit portion S1and may not be exposed to an internal wall of the second slit portion S2. The external electrodes410and420to be described later may be formed on the lower surfaces and the internal walls of the slit portions S1and S2. Since the lead-out patterns331and332are exposed to the lower surfaces of the slit portions S1and S2, the lead-out patterns331and332and the external electrodes410and420are in contact with and connected to each other. In the present embodiment, the lead-out patterns331and332are not exposed to the internal walls of the slit portions S1and S2. For example, a depth of pre-dicing may be adjusted to expose the lower surfaces of the lead-out patterns331and332based on a direction ofFIG.4. Thus, loss of the volume of the body100, for example, loss of a magnetic material, occurring due to the slit portions S1and S2, may be significantly reduced. In the lead-out patterns331and332, regions exposed to the lower surfaces of the slit portions S1and S2may have higher surface roughness than other surfaces of the lead-out patterns331and332. As an example, when the lead-out patterns331and332are formed using electroplating and then the slit portions S1and S2are formed in the body100, a pre-dicing tip may be in contact with lower surfaces of the lead-out patterns331and332facing the sixth surface106of the body100, and the lower surfaces of the lead-out patterns331and332may be polished by the pre-dicing tip. As will be described later, the external electrodes410and420may be formed as thin films to have poor coupling force to the lead-out patterns331and332. Since the regions exposed to the lower surfaces of the slit portions S1and S2in the lead-out patterns331and332have relatively high surface roughness, coupling force between the lead-out patterns332and332and the external electrodes410and420may be enhanced. At least one of the first and second lead-out patterns331and332may have a thickness greater than a thickness of each of the first coil pattern31and the first dummy lead-out pattern341. As an example, referring toFIG.4, a thickness h1of the first lead-out pattern331may be greater than a thickness h2of the first coil pattern311. The first lead-out pattern331may be formed to have the thickness h1greater than the thickness h2of the first coil pattern311, so that a depth of the first slit portion S1for exposure of the first lead-out pattern331may be significantly reduced. Thus, loss of the volume of the body100, for example, loss of a magnetic material, occurring due to the first slit portion S1, may be significantly reduced. The thickness h1of the first lead-out pattern331may be greater than the thickness h3of the first dummy lead-out pattern341. The first lead-out pattern331may be formed to have the thickness h1greater than the thickness h3of the first dummy lead-out pattern341, so that a volume of a magnetic material on an upper side of the body100may be sufficiently secured. Thus, necking of magnetic flux may be significantly reduced. The above description of the thickness h1of the first lead-out pattern may be equivalently applied to the second lead-out pattern332. For example, each of the first and second lead-out patterns331and332may have a thickness greater than a thickness of the first coil pattern311. Accordingly, the slit portions S1and S2may have the same depth to increase ease of process. In addition, each of the first and second lead-out patterns331and332may have a thickness greater than a thickness of each of the first and second dummy lead-out patterns341and342. At least one of the coil patterns311and312, the vias321,322, and323, the lead-out patterns331and332, and the dummy lead-out patterns341and342may include one or more conductive layers. As an example, when the first coil pattern311, the lead-out patterns331and332, and the vias321,322, and323are formed on a side of the lower surface of the support substrate200by plating, each of the first coil pattern311, the lead-out patterns331and332, and the vias321,322, and323may include a first conductive layer, formed by electroplating or the like, and a second conductive layer disposed on the first conductive layer. The first conductive layer may be a seed layer for forming the second conductive layer on the support substrate200by plating. The second conductive layer may an electroplating layer. In this case, the electroplating layer may have a single-layer structure or a multilayer structure. An electroplating layer having a multilayer structure may be formed to have a conformal layer structure in which one electroplating layer covers another electroplating layer or one electroplating layer is stacked on only one surface of another electroplating layer. The seed layer of the first coil pattern311and the seed layer of the first lead-out pattern331may be formed to be integrated with each other such that a boundary therebetween may not be formed, but the present disclosure is not limited thereto. The electroplating layer of the first coil pattern311and the electroplating layer of the first lead-out pattern331may be formed to be integrated with each other such that a boundary therebetween may not be formed, but the present disclosure is not limited thereto. As an example, the coil patterns311and312, the lead-out patterns331and332, and the dummy lead-out patterns341and342may be formed to protrude from a lower surface and an upper surface of the support substrate200, as illustrated inFIGS.4and5. As another example, the first coil pattern311and the lead-out patterns331and332may be formed to protrude from the lower surface of the support plate200, and the second coil pattern312and the dummy lead-out patterns341and342may be embedded in the upper surface of the support substrate200to expose upper surfaces thereof to the upper surface of the support substrate200. In this case, a concave portion may be formed on at least one of an upper surface of the second coil pattern312and upper surfaces of the dummy lead-out patterns341and342. Thus, the upper surface of the support substrate200, the upper surface of the second coil pattern312, and/or the upper surfaces of the dummy lead-out patterns341and342may not be substantially coplanar with each other. Each of the coil patterns311and312, the vias321,322, and323, the lead-out patterns331and332, and the dummy lead-out patterns341and342may be formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof, but the conductive material is not limited thereto. FIG.7is a schematic view illustrating another modified example of an exemplary embodiment of the present disclosure and corresponds toFIG.4.FIG.8is a schematic view illustrating another modified example of an exemplary embodiment of the present disclosure and corresponds toFIG.4. A second dummy lead-out pattern342is irrelevant to electrical connection between the other elements of a coil portion300, and thus, the second dummy lead-out pattern342and/or the third via323may be omitted. For example, in a modified example of the present embodiment illustrated inFIG.7, the third via323may be omitted, so that the second lead-out pattern332and the second dummy lead-out pattern342may not be connected to each other. In this modified example, the second dummy lead-out pattern342, irrelevant to the electrical connection of the coil portion300, may not be electrically connected to another element of the coil portion300. In this modified example, warpage of the support substrate200, which may occur when the second dummy lead-out pattern342is removed, may be prevented. Alternatively, in the modified example illustrated inFIG.8, the second dummy lead-out pattern342and the third via323may be omitted, and thus, a volume of a magnetic material in the body100may be increased by a volume corresponding to the second dummy lead-out pattern342. The external electrodes410and420may be disposed to be spaced apart from each other on one surface of the body100, and may extend to first and second slit portions S1and S2to be connected to first and second lead-out patterns331and332, respectively. Specifically, the first external electrode410may include a first connection portion411, disposed on an internal surface of the first slit portion S1to be in contact with and connected to the first lead-out pattern331exposed to a lower surface of the first slit portion S1, and a first pad portion412extending from the first connection portion411to the sixth surface106of the body100. The second external electrode420may include a second connection portion421, disposed on an internal surface of the second slit portion S2to be in contact with and connected to the second lead-out pattern332exposed to a lower surface of the second slit S2, and a second pad portion extending from the second connection portion421to the sixth surface106of the body100. The first pad portion412and the second pad portion422may be disposed to be spaced apart from each other on the sixth surface106of the body100. The external electrodes410and420may be formed along the internal surfaces of the slit portions S1and S2, and the sixth surface106of the body100, respectively. For example, the external electrodes410and420may be formed on the internal surfaces of the slit portions S1and S2and the sixth surface106of the body100in the form of a conformal layer. The external electrodes410and420may be formed to be integrated with the internal surfaces of the slit portions S1and S2and the sixth surface106of the body100. To this end, the external electrodes410and420may be formed by a thin-film process such as a sputtering process or a plating process. Each of the external electrodes410and420may be formed of a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof, but the conductive material is not limited thereto. Each of the external electrodes410and420may be formed to have a single-layer structure and a multilayer structure. As an example, each of the external electrodes410and420may include a first layer including copper (Cu), a second layer formed on the first layer and including nickel (Ni), and a third layer formed on the second layer and including tin (Sn). The first layer may be formed by electroplating or vapor deposition such as sputtering, or by applying and curing a conductive paste including a conductive material such as copper (Cu), or the like. Each of the second and third layers may be formed by electroplating. The second layer may be formed to have a shape covering the connection portions411and421and the pad portions412and422, or may be formed on only the pad portions412and422. The third layer may also be formed to have a shape similar to the shape of the second layer. An insulating film IF may insulate the coil patterns311and312, the lead-out patterns331and332, and the dummy lead-out patterns341and342from the body100. The insulating film IF may include, for example, parylene, but the present disclosure is not limited thereto. The insulating film IF may be formed by a method such as vapor deposition, but the present disclosure is not limited thereto and the insulating film IF may be formed by laminating an insulating film on both surfaces of the support substrate200. The insulating film IF may have a structure including a portion of a plating resist used to form the coil portion300using electroplating, but the present disclosure is not limited thereto. A surface insulating layer500may be formed on surfaces of the body100, and may be disposed on the slit portions S1and S2to cover the connection portions411and421in the external electrodes410and420. Specifically, the surface insulating layer500may be disposed on the internal surfaces of the slit portions S1and S2and the first to sixth surfaces101,102,103,104,105, and106of the body100while exposing regions, in which the pad portions412and422of the external electrodes410and420are disposed, in the sixth surface106of the body100. Specifically, the surface insulating layer500may include a first insulating layer510, disposed on each of the first to fifth surfaces101,102,103,104, and105and the internal surfaces of the slit portions S1and S2, and a second insulating layer520disposed on the sixth surface106of the body100while exposing the pad portions412and422of the external electrodes410and420. The first insulating layer510and the second insulating layer520may be formed in different processes such that a boundary therebetween may be formed, but the scope of the present disclosure is not limited thereto. In the first insulating layer510, portions disposed on the first to fifth surfaces101,102,103,104, and105of the body100and portions disposed on the internal surfaces of the slit portions S1and S2are formed together in the same process such that boundaries therebetween may not be formed, but the present disclosure is not limited thereto. The surface insulating layer500may be formed using a printing method, vapor deposition, a spray coating method, a film lamination method, or the like, but the present is not limited thereto. The surface insulating layer500may include a thermoplastic resin such as a polystyrene-based resin, a vinyl acetate-based resin, a polyester-based resin, a polyethylene-based resin, a polypropylene-based resin, a polyamide-based resin, a rubber-based resin, or an acrylic-based resin, a thermosetting resin such as a phenol-based resin, an epoxy-based resin, a urethane-based resin, a melamine-based resin, or an alkyd-based resin, a photosensitive resin, parylene, SiOx, or SiNx. The second insulating layer520, included in the surface insulating layer500, may be formed on the body100before a process for forming the external electrodes410and420, serving as a mask when the external electrodes410and420are formed, but the present disclosure is not limited thereto. Therefore, the coil component1000according to the present embodiment may easily implement a lower electrode structure while reducing a size of a coil component. That is, unlike the related art, the external electrodes410and420are not formed to protrude from both end surfaces101and102or both side surfaces103and104of the body100, and thus, an overall length and an overall width of the coil component1000are not increased. In addition, since the external electrodes410and420are formed by a thin-film process, each of the external electrodes410and420may have a relatively small thickness to significantly suppress an increase in thickness of the coil component1000. In addition, since the coil component1000according to the present embodiment, the lead-out patterns331and332are exposed to only the lower surfaces of the slit portions S1and S2and are not exposed to the internal walls of the slit portions S1and S2, loss of the body100may be significantly reduced. FIG.6is a schematic view illustrating a modified example of an exemplary embodiment of the present disclosure and corresponds toFIG.2. Referring toFIG.6, a coil component according to this modified example may further include filling portions600. In this modified example, connection portions411and421of external electrodes410and420may be disposed on a central portion of a body100in a width direction W and extend onto central portions of internal surfaces of slit portions S1and S2in the width direction W, so as to be connected to lead-out patterns331and332, respectively. Each of the external electrodes410and420may be spaced apart from the third and fourth surfaces103and104in the width direction W. The filling portions600may be disposed in regions, in which the connection portions411and421are not disposed, in the internal surfaces of the slit portions S1and S2. The slit portions S1and S2may be formed in an overall width direction W of the body100for ease of process, but are provided to connect the lead-out patterns331and332and the connection portions411and421of the external electrodes410and420to each other. In this regard, the internal surfaces of the slit portions S1and S2do not need to be exposed outwardly of the body100in the width direction W of the body100. In this modified example, the connection portions411and421may be disposed in the central portion of the body100in the width direction Win the internal surfaces of the slit portions S1and S2to provide a connection between the coil portion300and the external electrodes410and420, and the filling portions600may be disposed in the regions, in which the connection portions411and421are not disposed, in the internal surfaces of the slit portions S1and S2to prevent plating dispersal during formation of the connection portions411and421. In addition, the filling portions600may fill at least portion of the internal surfaces of the slit portions S1and S2to significantly suppress insufficient formation of surface insulating layers500. One surface of the filling portion600may be substantially coplanar with first and second surfaces101and102, both end surfaces of the body100, and third and fourth surfaces103and104, both side surfaces of the body100. The filling portion600may include an insulating resin. The resin may include epoxy, polyimide, a liquid crystal polymer, or the like, in a single or combined form, but is not limited thereto. The filling portion600may further include magnetic powder particles dispersed in the insulating resin. The magnetic powder particles may be ferrite or magnetic metal powder particles. Examples of the ferrite powder particles may include at least one or more of spinel type ferrites such as Mg—Zn-based ferrite, Mn—Zn-based ferrite, Mn—Mg-based ferrite, Cu—Zn-based ferrite, Mg—Mn—Sr-based ferrite, Ni—Zn-based ferrite, and the like, hexagonal ferrites such as Ba—Zn-based ferrite, Ba—Mg-based ferrite, Ba—Ni-based ferrite, Ba—Co-based ferrite, Ba—Ni—Co-based ferrite, and the like, garnet type ferrites such as Y-based ferrite, and the like, and Li-based ferrites. The magnetic metal powder particle may include one or more selected from the group consisting of iron (Fe), silicon (Si), chromium (Cr), cobalt (Co), molybdenum (Mo), aluminum (Al), niobium (Nb), copper (Cu), and nickel (Ni). For example, the magnetic metal powder particle may be at least one or more of a pure iron powder, a Fe—Si-based alloy powder, a Fe—Si—Al-based alloy powder, a Fe—Ni-based alloy powder, a Fe—Ni—Mo-based alloy powder, a Fe—Ni—Mo—Cu-based alloy powder, a Fe—Co-based alloy powder, a Fe—Ni—Co-based alloy powder, a Fe—Cr-based alloy powder, a Fe—Cr—Si-based alloy powder, a Fe—Si—Cu—Nb-based alloy powder, a Fe—Ni—Cr-based alloy powder, and a Fe—Cr—Al-based alloy powder. The metallic magnetic powder particle may be amorphous or crystalline. For example, the magnetic metal powder particle may be an Fe—Si—B—Cr-based amorphous alloy powder, but is not limited thereto. Each of the magnetic metal powder particles10may have an average diameter of about 0.1 μm to 30 μm, but is not limited thereto. Another Embodiment FIG.9is a schematic perspective view of a coil component according to another exemplary embodiment of the present disclosure.FIG.10is a cross-sectional view taken along line III-III′ ofFIG.9. Referring toFIGS.1to5andFIGS.9and10, a difference between a coil component2000according to a second embodiment and the coil component1000according to the first embodiment lies in slit portions S1and S2. Therefore, the present embodiment will be described while focusing on only the slit portions S1and S2. The description of the first embodiment will be applied to the description of the other configurations of the second embodiment as is. Referring toFIGS.9and10, the slit portions S1and S2, applied to the present embodiment, may be formed to extend to at least a portion of each of lead-out patterns321and332. Accordingly, the lead-out pattern331may have a first region onto which the slit portion S1is formed to extend, and a second region onto which the slit portions S1is not formed to extend, and the lead-out pattern332may have a first region, onto which the slit portion S2is formed to extend, and a second region onto which the slit portion S2is not formed to extend. In other words, the first regions of the slit portion S1and S2may be exposed to an outside of the body100and disposed in an outer side than the second regions in the length direction L, and the slit portion S1and S2may overlap the first regions and may not overlap the second regions in the thickness direction T. Since the first region is a region in which the slit portion S1/S2is formed to extend to at least a portion of the lead-out pattern331/332, the second region may have a thickness h12greater than a thickness h11of the first region. In the present embodiment, the thickness h21of the second region of each of the lead-out patterns331and332may be greater than a thickness h1of a first coil pattern311and greater than a thickness h3of a first dummy lead-out pattern341. In the present embodiment, since each of the slit portions S1and S2is formed to extend to at least a portion of each of the lead-out patterns331and332, the lead-out patterns331and332may be exposed to not only lower surfaces of the slit portions S1and S2but also internal walls of the slit portions S1and S2. Thus, a contact area between each of the lead-out patterns331and332and each of external electrodes410and420may be increased to improve coupling force therebetween. As described above, according to exemplary embodiments, an effective volume of a body may be increased. While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations could be made without departing from the scope of the present disclosure as defined by the appended claims. | 36,796 |
11942265 | DESCRIPTION OF EMBODIMENT An Example of an inductor and a method for manufacturing the inductors disclosed by the present application will be described below in detail based on the drawings. Incidentally, technology to be disclosed herein is not limited by the Example. Example [Configuration of Inductor] FIG.1is a view showing an example of the configuration of an inductor1according to an Example. A section of the inductor1is schematically shown inFIG.1. An upper side face and a lower side face on paper inFIG.1will be hereinafter referred to as upper face and lower face respectively for explanatory convenience. However, the inductor1may be, for example, used in a vertically inverted state, or may be used at any posture.FIG.2is a perspective view of an upper face side of the inductor1according to the Example.FIG.3is a perspective view of a lower face side of the inductor1according to the Example. A section taken along a line I-I shown inFIG.2corresponds to the section of the inductor1shown inFIG.1. As shown inFIG.1toFIG.3, the inductor1has a coil11, a pair of electrodes12and13and a sealing resin14. The coil11has a two-layer structure in which two conductor layers are deposited on each other. Specifically, the coil11has a first conductor layer20and a second conductor layer30, as shown inFIG.4.FIG.4is a perspective view showing a state in which the first conductor layer20, the second conductor layer30and the pair of electrodes12and13are separated from one another. The first conductor layer20is, for example, formed from metal such as copper. The first conductor layer20has a pair of first metal pieces21and22and a first conductor23. The pair of first metal pieces21and22are provided at positions to face each other in one and the same plane. The first conductor23extends from one of the pair of first metal pieces21and22toward the other first metal piece21,22to be wound in a spiral shape in one and the same plane. That is, for example, as shown inFIG.4, the first conductor23having an outer circumferential side end portion231connected to the first metal piece22is wound in a clockwise spiral shape. An inner circumferential side end portion232of the first conductor23serves as a bonding portion to the second conductor layer30. That is, the first conductor23has a protrusion portion233provided on the inner circumferential side end portion232so as to protrude more outward than the other portion of the first conductor23. The protrusion portion233is superimposed on an inner circumferential side end portion332of the second conductor33to be bonded thereto. The second conductor33will be described later. In addition, in the first conductor layer20, thicknesses of the pair of first metal pieces21and22are the same as thickness (thickness including thickness of the protrusion portion233) of the inner circumferential side end portion232of the first conductor23. Lower faces of the pair of first metal pieces21and22protrude more outward than a lower face of the other portion of the first conductor23than the protrusion portion233. An upper face of the first conductor layer20is formed such that all the parts thereof are flush with one another. That is, the other portion of the first conductor23than the protrusion portion233is half-etched from the lower face side of the first conductor23to be made thinner than the protrusion portion233. Thus, contact between the lower face of the other portion of the first conductor23than the protrusion portion233and an upper face of the second conductor33which will be described later can be prevented when the first conductor layer20and the second conductor layer30are superimposed on each other to be bonded thereto in a bonding step which will be described later. The second conductor layer30is, for example formed from metal such as copper. The second conductor layer30has a pair of second metal pieces31and32and a second conductor33. The pair of second metal pieces31and32which are provided at positions to face each other in one and the same plane are superimposed on the pair of first metal pieces21and22to be bonded thereto respectively. Since the pair of second metal pieces31and32are superimposed on the pair of first metal pieces21and22to be bonded thereto respectively, the pair of first metal pieces21and22and the pair of second metal pieces31and32form opposite end portions of the coil11. The second conductor33extends from one of the pair of second metal pieces31and32toward the other second metal piece31,32to be wound in a spiral shape in one and the same plane. The second conductor33is wound in a reverse direction to a direction in which the first conductor23is wound. That is, for example, as shown inFIG.4, the second conductor33having an outer circumferential side end portion331connected to the second metal piece31is wound in a counterclockwise spiral shape. The inner circumferential side end portion332of the second conductor33serves as a bonding portion to the first conductor layer20. That is, the inner circumferential side end portion332of the second conductor33is superimposed on the protrusion portion233of the first conductor23to be bonded thereto. The pair of electrodes12and13are, for example, formed from metal such as copper. The pair of electrodes12and13are superimposed on the pair of second metal pieces31and32to be bonded thereto respectively. The sealing resin14is formed so as to entirely cover the coil11(i.e. the first conductor layer20and the second conductor layer30) and the pair of electrodes12and13. The sealing resin14has a lower face14a, an upper face14dand side faces14band14c. The lower face14afaces the second conductor33. The upper face14dfaces the first conductor23and is positioned on an opposite side to the lower face14a. The side faces14band14care positioned between the lower face14aand the upper face14d. Outer side faces12aand13aof the pair of electrodes12and13are exposed in the lower face14aof the sealing resin14. Specifically, the electrode12has a bonding portion122and an overhanging portion121. The bonding portion122is bonded to the second metal piece31. The overhanging portion121overhangs from the bonding portion122. The overhanging portion121has an upper face121band a lower face121a. The upper face121bfaces the second conductor33. The lower face121ais positioned on an opposite side to the upper face121b. The lower face121aof the overhanging portion121is exposed from the lower face14aof the sealing resin14. In addition, the electrode13has a bonding portion132and an overhanging portion131. The bonding portion132is bonded to the second metal piece32. The overhanging portion131overhangs from the bonding portion132. The overhanging portion131has an upper face131band a lower face131a. The upper face131bfaces the second conductor33. The lower face131ais positioned on an opposite side to the upper face131b. The lower face131aof the overhanging portion131is exposed from the lower face14aof the sealing resin14. The end faces12aand13aof the pair of electrodes12and13exposed in the lower face14aof the sealing resin14are faces which will be finally connected to electrodes of a circuit substrate. That is, the pair of electrodes12and13form external electrodes for connecting the opposite end portions of the coil11to the electrodes of the circuit substrate. Since the end faces12aand13aof the pair of electrodes12and13which are the external electrodes are exposed in the lower face14aof the sealing resin14, the external electrodes do not protrude from the side faces14band14cof the sealing resin14. Therefore, the size of the inductor1does not increase on the sides of the sealing resin14. As a result, reduction of the size of the inductor1can be attained. In addition, outer side faces of the pair of first metal pieces21and22, outer side faces of the pair of second metal pieces31and32and outer side faces of the pair of electrodes12and13are exposed in the side faces14band14cintersecting with the lower face14aof the sealing resin14. Plating films15and16are formed so as to cover the exposed end faces12aand13aof the pair of electrodes12and13, the exposed outer side faces of the pair of first metal pieces21and22, the exposed outer side faces of the pair of second metal pieces31and32and the exposed outer side faces of the pair of electrodes12and13. Since the plating films15and16are formed on the end faces12aand13aof the pair of electrodes12and13and the outer side faces of the pair of electrodes12and13, solders get wet to spread along the plating films15and16when the pair of electrodes12and13are soldered to the electrodes of the circuit substrate. Thus, fillets generated by the solders are formed between the outer side faces of the pair of electrodes12and13and the electrodes of the circuit substrate so that the pair of electrodes12and13and the electrodes of the circuit substrate can be connected to each other firmly. As a result, connection reliability can be improved. In addition, for example, a magnetic material-including resin having a magnetic material and an insulating resin mixed with each other can be used as the sealing resin14. For example, a material having an Fe-based amorphous alloy subjected to outer circumference insulation treatment, a material having carbonyl iron powder subjected to outer circumference insulation treatment, or ferrite powder can be used as the magnetic material. The insulating resin serves as a binder. The magnetic material-including resin is generated by blending, for example, a thermosetting resin such as an epoxy resin as the binder with the magnetic material. Here, when the magnetic material included in the magnetic material-including resin has electric conductivity, it is preferable that an insulating film made of an insulating resin is provided on the surface of the first conductor layer20, the surface of the second conductor layer30and the surfaces of the pair of electrodes12and13to attain insulation from the magnetic material-including resin. By use of the magnetic material-including resin as the sealing resin14, an inductance value of the inductor1can be improved. [Method for Manufacturing Inductors] Next, a specific example about a method for manufacturing the inductors1having the aforementioned configuration will be described with reference toFIG.5.FIG.5is a flow chart showing the method for manufacturing the inductors1according to the Example. First, first conductor layers20each of which has a pair of first metal pieces21and22and a first conductor23are formed (step S11). That is, a first metal plate which is, for example, made of metal such as copper is etched so that the first conductor layers20each of which has the pair of first metal pieces21and22and the first conductor23are formed, for example, as shown inFIG.6.FIG.6is a view showing a specific example of the first conductor layer forming step. The first metal plate has a plurality of individual regions which are arrayed in a matrix form. The first conductor layers20are formed in the individual regions of the first metal plate respectively. For example, as shown inFIG.7, a first metal plate200has 2×2 individual regions which are arrayed in a matrix form, and first conductor layers20are formed in the individual regions of the first metal plate200respectively.FIG.7is a perspective view of the first metal plate200. At a stage where the first conductor layers20are formed in the individual regions of the first metal plate200respectively, a pair of first metal plates21and22of each of the first conductor layers20are connected to a connecting frame201formed between adjacent ones of the individual regions. When the first metal plate200is cut along cutting lines L1positioned in boundaries of the individual regions, the first conductor layers20are individually separated from the connecting frame201, as shown inFIG.6. However, the first metal plate200has not been cut yet at the stage where the first conductor layers20are formed. In each of the first conductor layers20, a first conductor23is formed by etching and half etching so that a protrusion portion233protruding more outward than the other portion of the first conductor23is provided on an inner circumferential side end portion232, for example, as shown inFIG.8.FIG.8is a side view of the first conductor layer20. The protrusion portion233is formed integrally with the inner circumferential side end portion232of the first conductor23. Thus, electrical resistance of a bonding portion between the first conductor layer20and a second conductor layer30can be reduced. In addition, thicknesses of the pair of first metal pieces21and22and thickness (thickness including thickness of the protrusion portion233) of the inner circumferential side end portion232of the first conductor23are the same as thickness of the first metal plate200which has not been worked yet. That is, the other portion of the first conductor23than the protrusion portion233is half-etched from a lower face side of the first conductor23so as to be thinner than the first metal plate200which has not been worked yet. In addition, thickness of the connecting frame201is also the same as the thickness of the first metal plate200which has not been worked yet. Here, the formation of the first conductor layers20by etching and half etching will be described simply.FIG.9is a view for explaining the formation of the first conductor layers20by etching and half etching. First, a first metal plate200shaped like a flat plate is prepared. As shown in a state251, resists202are applied to an entire upper face and an entire lower face of the first metal plate200respectively and dried. Successively, photomasks having desired patterns are disposed on the resists202respectively. As shown in a state252, the resists202are exposed to light by radiation of light203on the resists202. Successively, the resists202which have been exposed to light are developed so that the resists202having predetermined openings are formed. That is, for example, as shown in a state253, opening portions204are formed in portions where the first metal plate200will be etched from the upper face side to be penetrated. In addition, openings205are formed in portions where the first metal plate200will be half-etched and etched from the lower face side. Successively, the first metal plate200is etched by a corrosion solution206with the resists202as masks. Thus, as shown in a state254, through holes207are formed at places where the corrosion solution206can be supplied from both the upper face and the lower face of the first metal plate200. On the other hand, the lower face of the first metal plate200is half-etched so that thick portions208are formed at places where the corrosion solution206cannot be supplied from the upper face of the first metal plate200. Each of the thick portions208corresponds to a protrusion portion233inFIG.8. Then, the resists202are removed. Thus, first conductor layers20are formed. Incidentally, the case where the first conductor layers20are formed by etching and half etching has been shown in the Example. However, the first conductor layers20may be formed by pressing. When the first conductor layers20have been formed, second conductor layers30each of which has a pair of second metal pieces31and32and a second conductor33are formed (step S12). That is, a second metal plate which is, for example, made of metal such as copper and which is shaped like a flat plate is etched so that the second conductor layers30each of which has the pair of second metal pieces31and32and the second conductor33are formed, for example, as shown inFIG.10.FIG.10is a view showing a specific example of the second conductor layer forming step. The second metal plate has a plurality of individual regions arrayed in a matrix form. The second conductor layers30are formed in the individual regions of the second metal plate respectively. For example, as shown inFIG.11, a second metal plate300has 2×2 individual regions arrayed in a matrix form, and second conductor layers30are formed in the individual regions of the second metal plate300respectively.FIG.11is a perspective view of the second metal plate300. At a stage where the second conductor layers30are formed in the individual regions of the second metal plate300respectively, a pair of second metal pieces31and32of each of the second conductor layer30are connected to a connecting frame301formed between adjacent ones of the individual regions. When the second metal plate300is cut along cutting lines L2positioned in boundaries of the individual regions, the second conductor layers30are individually separated from the connecting frame301, as shown inFIG.10. However, the second metal plate300has not been cut yet at the stage where the second conductor layers30are formed. For example, as shown inFIG.12, each of the second conductor layers30does not have any protrusion portion differently from the first conductor layer20. That is, the second conductor layer30is formed so that the pair of second metal pieces31and32and the second conductor33are the same in thickness.FIG.12is a side view of the second conductor layer30. Incidentally, the case where the second conductor layers30are formed by etching has been shown in the Example. However, the second conductor layers30may be formed by pressing. When the second conductor layers30have been formed, pairs of electrodes12and13are formed (step S13). That is, a third metal plate which is, for example, made of metal such as copper and which is shaped like a flat plate is etched so that the pairs of electrodes12and13are formed, for example, as shown inFIG.13.FIG.13is a view showing a specific example of the electrode forming step. The third metal plate has a plurality of individual regions arrayed in a matrix form. The pairs of electrodes12and13are formed in the individual regions of the third metal plate respectively. For example, as shown inFIG.14, a third metal plate400has 2×2 individual regions arrayed in a matrix form, and pairs of electrodes12and13are formed in the individual regions of the third metal plate400respectively.FIG.14is a perspective view of the third metal plate400. At a stage where the pairs of electrodes12and13are formed in the individual regions of the third metal plate400respectively, each of the pairs of electrodes12and13are connected to a connecting frame401formed between adjacent ones of the individual regions. When the third metal plate400is cut along cutting lines L3positioned in boundaries of the individual regions respectively, the pairs of electrodes12and13are individually separated from the connecting frame401, as shown inFIG.13. However, the third metal plate400has not been cut yet at the stage where the pairs of electrodes12and13are formed. Each of the pairs of electrodes12and13are formed by etching and half etching so that overhanging portions121and131overhang in directions perpendicular to a thickness direction of the pair of electrodes12and13from inner side faces of the pair of electrodes12and13, for example, as shown inFIG.15.FIG.15is a side view of the pair of electrodes12and13. Due to the overhanging portions121and131overhanging from the inner side faces of the pair of electrodes12and13, areas of end faces12aand13aof the pair of electrodes12and13which serve as connection faces to electrodes of a circuit substrate can be expanded. Consequently, connection reliability in the pair of electrodes12and13can be improved. In addition, thicknesses of the overhanging portions121and131are made thinner than the other portions of the pair of electrodes12and13. Thus, upper faces of body portions of the pair of electrodes12and13protrude more upward than upper faces of the overhanging portions121and131. Thus, when the second conductor layer30and the pair of electrodes12and13are superimposed on each other to be bonded thereto in a bonding step which will be described later, contact between a lower face of the second conductor33and upper faces of the overhanging portions121and131can be prevented. Incidentally, the case where the pair of electrodes12and13are formed by etching and half etching has been shown in the Example. However, the pair of electrodes12and13may be formed by pressing. In addition, the aforementioned sequence of the first conductor layer forming step (the step S11), the second conductor layer forming step (the step S2) and the electrode forming step (the step S13) can be altered desirably. For example, the first metal plate200may be etched to form the first conductor layers20after the third metal plate400is etched to form the pairs of electrodes12and13. When each of the first conductor layers20, each of the second conductor layers30and each of the pairs of electrodes12and13have been formed, the first conductor layer20, the second conductor layer30and the pair of electrodes12and13are sequentially superimposed on one another to be bonded thereto. That is, the pair of second metal pieces31and32of the second conductor layer30are superimposed on the pair of first metal pieces21and22of the first conductor layer20to be bonded thereto respectively. In addition, the inner circumferential side end portion332of the second conductor33is superimposed on the inner circumferential side end portion232(the protrusion portion233) of the first conductor23to be bonded thereto. Further, the pair of electrodes12and13are superimposed on the pair of second metal pieces31and32to be bonded thereto respectively. For example, diffusion bonding or bonding using solders or metal pastes can be used as the bonding method. Since the first conductor layer20, the second conductor layer30and the pair of electrodes12and13are sequentially superimposed on one another to be bonded thereto, a bonding structure body in which the first conductor layer20, the second conductor layer30and the pair of electrodes12and13are bonded to one another is formed. FIG.16is a view showing a specific example of the bonding step using diffusion bonding. That is, for example, as shown inFIG.16, the pair of electrodes12and13are disposed on a flat plate-like carbon jig51where a protrusion portion51ais formed so that the protrusion portion51ais interposed between the pair of electrodes12and13. Successively, the second conductor layer30is disposed on the pair of electrodes12and13and on the protrusion portion51aof the carbon jig51. Successively, the first conductor layer20is disposed on the second conductor layer30. Successively, another flat plate-like carbon jig51is disposed on the first conductor layer20. A space surrounding the disposed members is kept in a vacuum state. Pressures Pare applied to the two carbon jigs51in directions in which the carbon jigs51are deposited, and the two carbon jigs51are heated. Thus, atoms are diffused in contact faces between the pair of first metal pieces21and22and the pair of second metal pieces31and32to thereby bond the pair of first metal pieces21and22and the pair of second metal pieces31and32to each other respectively. In addition, atoms are diffused in a contact face between the inner circumferential side end portion232(the protrusion portion233) of the first conductor23and the inner circumferential side end portion332of the second conductor33to thereby bond the inner circumferential side end portion232(the protrusion portion233) of the first conductor23and the inner circumferential side end portion332of the second conductor33to each other. Further, atoms are diffused in contact faces of the pair of second metal pieces31and32and the pair of electrodes12and13to thereby bond the pair of second metal pieces31and32and the pair of electrodes12and13to each other respectively. Such diffusion bonding can be performed under conditions that, for example, 0.005 kN/mm2is applied as each of the pressures P in a vacuum state of 10 Pa or less, and a temperature of 600° C. is maintained for 5 minutes. FIG.17is a view showing a specific example of the bonding step using solders or metal pastes. That is, for example, as shown inFIG.17, bonding materials52which are solders or metal pastes are applied to bonding faces of the pair of electrodes12and13to the pair of second metal pieces31and32. Further, bonding materials53which are solders or metal pastes are applied to bonding faces of the pair of second metal pieces31and32to the pair of first metal pieces21and22and a bonding face of the end portion332to the end portion232(the protrusion portion233). The members to which the bonding materials52and53are applied are deposited on one another. The bonding materials52and53are melted by heat and then cooled and solidified. Thus, the deposited members are bonded to one another. The members are directly bonded to one another by the diffusion bonding which has been described by use ofFIG.16. Accordingly, connection reliability can be improved, and electrical resistance can be reduced. On the other hand, the bonding using the solders or the metal pastes can be executed more easily than the diffusion bonding. Incidentally, only one of the individual regions of the first metal plate200, one of the individual regions of the second metal plate300and one of the individual regions of the third metal plate400are shown inFIG.16andFIG.17. When each of the bonding structure bodies in which the first conductor layer20, the second conductor layer30and the pair of electrodes12and13are bonded to one another has been formed, insulating films are formed to cover the surfaces of the first conductor layer20, the second conductor layer30and the pair of electrodes12and13(step S15). That is, for example, by an electrodeposition coating method or a spray coat method, insulating films54are uniformly formed on the entire surfaces of the first conductor layer20, the second conductor layer30and the pair of electrodes12and13, for example, as shown inFIG.18.FIG.18is a view showing a specific example of the insulating film forming step. Only one of the individual regions of the first metal plate200, one of the individual regions of the second metal plate300and one of the individual regions of the third metal plate400are shown inFIG.18. For example, an insulating resin such as an epoxy resin or a polyimide resin can be used as the material of the insulating films54. Incidentally, immersion into a liquid resin can be listed as another example of the method for forming the insulating films54. When the insulating films54have been formed, a sealing resin14is formed to cover the first conductor layer20, the second conductor layer30and the pair of electrodes12and13but to expose the end faces12aand13aof the pair of electrodes12and13in a lower face14afacing the second conductor layer30(step S16). That is, for example, as shown inFIG.19, a sealing tape55is pasted on the side of the end faces12aand13aof the pair of electrodes12and13of the bonding structure body. The bonding structure body is disposed between an upper side mold and a lower side mold of a molding apparatus. A magnetic material-including resin is press-fitted into the bonding structure body so that the sealing resin14is formed.FIG.19is a view showing a specific example of the sealing resin forming step. When the sealing resin14has been formed, the sealing tape55is removed from the bonding structure body. Incidentally, illustration of the insulating films54is omitted fromFIG.19for convenience of explanation. Since the sealing tape55is removed from the bonding structure body, the end faces12aand13aof the pair of electrodes12and13are exposed from the sealing resin14. By brushing processing or blasting processing applied to the end faces12aand13aof the pair of electrodes12and13exposed from the sealing resin14, the insulating film54provided on the end faces12aand13ais removed. After the insulating film54has been removed, the bonding structure body is cut (step S17). That is, for example, as shown inFIG.20, the bonding structure body is cut along the cutting lines L1to be separated into an individual piece.FIG.20is a view showing a specific example of the cutting step. Thus, the first conductor layer20, the second conductor layer30and the pair of electrodes12and13are separated from the connecting frames201,301and401at places of the cutting lines L1, the cutting lines L2and the cutting lines L3. Thus, the inductor1having the first conductor layer20, the second conductor layer30and the pair of electrodes12and13is generated. On this occasion, the side faces14band14cof the sealing resin14, the outer side faces of the pair of first metal pieces21and22, the outer side faces of the pair of second metal pieces31and32and the outer side faces of the pair of electrodes12and13are formed as cut faces to be flush with one another. The outer side faces of the pair of first metal pieces21and22, the outer side faces of the pair of second metal pieces31and32and the outer side faces of the pair of electrodes12and13are exposed in the side faces14band14cof the sealing resin14. Then, plating films15and16are formed to cover the exposed end faces12aand13aof the pair of electrodes12and13, the exposed outer side faces of the pair of first metal pieces21and22, the exposed outer side faces of the pair of second metal pieces31and32and the exposed outer side faces of the pair of electrodes12and13(step S18). That is, for example, as shown inFIG.21, the plating film15is formed on the end face12aof the electrode12which is exposed in the lower face14aof the sealing resin14and on the outer side face of the first metal piece21, the outer side face of the second metal piece31and the outer side face of the electrode12which are exposed in the side face14bof the sealing resin14. At the same time, the plating film16is formed on the end face13aof the electrode13which is exposed in the lower face14aof the sealing resin14and on the outer side face of the first metal piece22, the outer side face of the second metal piece32and the outer side face of the electrode13which are exposed in the side face14cof the sealing resin14.FIG.21is a view showing a specific example of the plating film forming step. The plating films15and16are formed, for example, by an electrolytic plating method or a barrel plating method. For example, Ni/Pd/Au, Ni/Au, Ni/Ag, Ni/Sn, Sn or solder can be used as the material of the plating films15and16. By the aforementioned steps, the inductor1shown inFIG.1toFIG.3is completed. Next, a state in which the inductor1is mounted on a circuit substrate61will be described with reference toFIG.22.FIG.22is a view showing a state in which the inductor1is mounted on the circuit substrate61. When the pair of electrodes12and13whose end faces12aand13aand outer side faces have been covered with the plating films15and16are soldered to a pair of electrodes62and63of the circuit substrate61respectively, the inductor1is mounted on the circuit substrate61. Here, the plating films15and16are formed on the end faces12aand13aof the pair of electrodes12and13and the outer side faces of the pair of electrodes12and13, as described above. Therefore, when the pair of electrodes12and13are soldered to the pair of electrodes62and63of the circuit substrate61respectively, the solders get wet to spread to plating portions of the outer side faces of the pair of electrodes12and13in addition to plating portions of the end faces12aand13aof the pair of electrodes12and13. Specifically, the solders get wet to spread to plating portions of the outer side faces of the pair of first metal pieces21and22, the outer side faces of the pair of second metal pieces31and32and the outer side faces of the pair of electrodes12and13, which are exposed from the side faces14band14cof the sealing resin14. Thus, fillets71and72generated by the solders are formed between the outer side faces of the pair of electrodes12and13and the pair of electrodes62and63of the circuit substrate61. As a result, connection strength between the inductor1and the circuit substrate61can be improved, and connection reliability of the inductor1can be improved. As described above, the inductor according to the Example has the first conductor layer, the second conductor layer, the pair of electrodes and the sealing resin. The first conductor layer has the pair of first metal pieces, and the first conductor which extends from one of the pair of first metal pieces toward the other first metal piece to be wound in a spiral shape in one and the same plane. The second conductor layer has the pair of second metal pieces which are superimposed on the pair of first metal pieces to be bonded thereto respectively, and the second conductor which extends from one of the pair of second metal pieces toward the other second metal piece to be wound in a spiral shape in one and the same plane, and which has the inner circumferential side end portion superimposed on the inner circumferential side end portion of the first conductor to be bonded thereto. The pair of electrodes are superimposed on the pair of second metal pieces to be bonded thereto respectively. The sealing resin covers the first conductor layer, the second conductor layer and the pair of electrodes. The end faces of the pair of electrodes are exposed in one face of the sealing resin facing the second conductor. Thus, an increase of the size of the inductor according to the Example on the sides of the sealing resin can be reduced in comparison with the background-art inductor in which the external electrodes protrude from the outer side faces of the sealing resin. As a result, reduction of the size of the inductor can be attained. In addition, in the inductor according to the Example, the outer side faces of the pair of first metal pieces, the outer side faces of the pair of second metal pieces and the outer side faces of the pair of electrodes are exposed in the outer side faces of the sealing resin intersecting with the face of the sealing resin. The inductor further has the plating films formed to cover the exposed end faces of the pair of electrodes, the exposed outer side faces of the pair of first metal pieces, the exposed outer side faces of the pair of second metal pieces and the outer side faces of the pair of electrodes. Thus, when the pair of electrodes are soldered to the electrodes of the circuit substrate, the solders get wet to spread along the plating films15and16so as to form the fillets. Accordingly, connection reliability of the inductor can be improved. In addition, in the inductor according to the Example, the pair of electrodes have the overhanging portions which overhang in the directions perpendicular to the thickness direction of the pair of electrodes from the inner side faces of the pair of electrodes. The lower faces of the overhanging portions positioned on an opposite side to the pair of second metal pieces are exposed in the face of the sealing resin. Thus, the areas of the end faces of the pair of electrodes which serve as the connection faces to the electrodes of the circuit substrate can be expanded so that connection reliability in the pair of electrodes can be improved. In addition, in the inductor according to the Example, the first conductor has the protrusion portion provided on the inner circumferential side end portion of the first conductor so as to protrude more outward than the other portion of the first conductor, and the inner circumferential side end portion of the second conductor is superimposed on the protrusion portion to be bonded thereto. Thus, electrical resistance of the bonding portion between the first conductor layer and the second conductor layer can be reduced. In addition, in the inductor according to the Example, the sealing resin is a magnetic material-including resin. Thus, the inductance value of the inductor can be improved. It should be considered that the present disclosed Example is not limited but exemplified in all respects. The aforementioned Example may be omitted, replaced or changed in various modes without departing from the scope of attached Claims and the gist thereof. For example, the case where the protrusion portion233is provided in the first conductor layer20has been shown by way of example in the aforementioned Example. However, the first conductor layer20may be entirely uniform in thickness without being half-etched. In this case, the upper face of the second conductor33in the second conductor layer30is half-etched so that a protrusion portion is provided on the upper face of the inner circumferential side end portion332of the second conductor33. In addition, in the second conductor layer30, the thicknesses of the pair of second metal pieces31and32are the same as the thickness (thickness including thickness of the protrusion portion provided on the upper face of the end portion332) of the inner circumferential side end portion332of the second conductor33. Further, the upper faces of the pair of second metal pieces31and32are formed so as to protrude more outward than the upper face of the other portion of the second conductor33than the protrusion portion. Various aspects of the subject matter described herein are set out non-exhaustively in the following numbered clauses: 1) A method for manufacturing an inductor, the method comprising:forming a first conductor layer comprising: a pair of first metal pieces; and a first conductor, wherein the first conductor extends from one of the pair of first metal pieces toward the other first metal piece to be wound in a spiral shape in the same plane;forming a second conductor layer comprising a pair of second metal pieces and a second conductor, wherein the second conductor extends from one of the pair of second metal pieces toward the other second metal piece to be wound in a spiral shape in the same plane;forming a pair of electrodes;bonding the first conductor layer to the second conductor layer such that each of the pair of first metal pieces are bonded to a corresponding one of the pair of second metal pieces, and an inner circumferential side end portion of the first conductor is bonded to an inner circumferential side end portion of the second conductor;bonding each of the pair of second metal pieces to a corresponding one of the pair of electrodes; andcovering the first conductor layer, the second conductor layer and the pair of electrodes with a sealing resin,wherein end faces of the pair of electrodes are exposed in a lower face of the sealing resin facing the second conductor. | 38,440 |
11942266 | While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present invention as defined by the appended claims. DETAILED DESCRIPTION Generally, the present disclosure is directed to improvements in electrical power distribution and monitoring systems for data centers. A data center includes any computing facility or portion of a facility in which computer operations are carried out. A data center may include computing devices (e.g., servers) dedicated to specific functions or serving multiple functions. Examples of computer operations include electronic data storage, information processing, communications, and operational control. For example, an organization, such as but not limited to a transport service provider, utilizes data centers to accommodate a large amount of server, network, and computer equipment to process, store, and exchange data as needed to perform the operations of an organization. The data center can include server racks that contain a large number of servers which require a large amount of electrical power to operate. A server rack can include a computing system that includes one or more computing devices mounted in a rack. Electrical power can be distributed by a power distribution unit (PDU) to a large number of locations throughout the data center. The PDU can include any device, module, component, or combination thereof, that can be used to distribute electrical power. The elements of a PDU may be distributed among two or more components (e.g., a transformer and a rack power distribution unit, each housed in a separate enclosure, and associated cables). A power distribution unit may include transformer, power monitoring, fault detection, and/or isolation components. The PDUs may need to be serviced or maintained from time to time. Typically, service or maintenance can only be performed when the power distribution units are powered off. The downtime associated with maintenance and service of the power distribution units may result in a significant loss in computing resources. In some critical systems, such as systems associated with a transport service provider, downtime may result in significant disruption to the service provided to the users (e.g., a ridesharing service, delivery service, vehicle fleet management, other transportation-related service, or the like). An electrical power distribution and monitoring system allows for data centers to function more efficiently by having monitoring capabilities. However, conventional distribution and monitoring systems may have limited system monitoring capabilities, or may have a vendor-specific, inflexible, monitoring system with drawbacks pertaining to installation, maintenance, component access, and more. An improved design is needed to address many of these drawbacks, and to significantly improve the state of the art in the monitoring system design. According to some embodiments, the power distribution and monitoring system can include a remote power panel (RPP) as the power distribution system, and a monitoring system that is connected to the RPP to improve the functionality and efficiency of the power distribution system. In some instances, the low voltage electrical power distribution and monitoring system can include the PDU. The low voltage electrical power distribution and monitoring system allows for modern data centers to function more efficiently. Techniques described herein include an improved design and functionality to address many of the drawbacks associated with conventional power distribution and monitoring systems. In some instances, the system described herein can provide power distribution extensions from PDUs directly to server racks with several benefits such as improved distribution capacity, better cooling, smaller footprint, server layout flexibility, and more efficient maintenance. For example, the system can provide circuit infrastructure to expand server capacity without adding additional PDUs. Additionally, the system, or individual circuits, can be shut down for maintenance while the associated PDU remains powered up. The system can include any panel, device, module, component, or combination thereof, that can be used to transfer or distribute electrical power. The system can be housed in one or more enclosures/compartments. The power distribution and monitoring system can distribute electrical power to some or all of the many servers in the rack. The power distribution and monitoring system can include circuit breakers and other electronic components to supply power to one or more distinct servers in the server rack. The system may be positioned to each side of the server rack. The server rack can be a computing system that includes one or more computing devices (e.g., server devices) mounted in a rack. In some instances, a data center can include a plurality of data halls, where each data hall includes a plurality of server racks (e.g., hundreds of server racks). The server racks can be configured for storage of computing devices such as but not limited to server devices. A power distribution and monitoring system can provide power to the computing devices positioned relative to the racks. In some implementations, each rack can have two sources of power, a first power distribution and monitoring system positioned adjacent to a first end of a rack (referred to herein as an A-side power source) and a second power distribution and monitoring system positioned adjacent to a second end of a rack (referred to herein as a B-side power source). One or more monitoring systems can measure an amount of current that is flowing to computing devices within each rack from the power distribution system. The monitoring system(s) allow for analysis of the power flow, determine trending over a period of time, and can include a notifications system to send alarms if needed. In conventional systems, the monitoring system(s) can be connected to busway systems (i.e., an example of a power distribution system), which are metal-enclosed buses that hang above each rack and are connected to a central monitoring system. In some cases, the busway systems are spread out (e.g., 40 feet long) across an entire data hall. The busway systems can be cumbersome and have many drawbacks, such as not being compact. A power distribution and monitoring system in accordance with the disclosed technology can include a centrally located power panel connected to one or more racks from the power panel or below each data hall to a rack location. In conventional systems, a current transformer (CT), which can be used to measure the current to each rack, can be soldered onto a strip. The strip can be connected to the monitoring system. The strip can be a single unit which can have a plurality of CTs soldered on it. One of the drawbacks of having all the CTs soldered on the strip is that when one CT becomes non-functional, an operator needs to replace the strip with all of the CTs soldered on the strip. For example, if there are 42 CTs connected to the strip, then when one CT becomes non-functional, then all 42 CTs need to be replaced. By having to replace the entire strip, the operator needs to shut down the panel and racks for an extended period of time, even though there may be 41 functioning CTs in the strip. Techniques described herein allow for the installation of each of the CTs (e.g., split core CTs) independently and connect each CT to the monitoring unit in order to minimize the amount of downtime if a single CT becomes non-functional. Additionally, providing the CTs in separate enclosures from the circuit breakers helps to facilitate safe accessibility of the electrical components which reduces the likelihood of an operator being shocked when replacing the CTs. Generally, the present disclosure is directed to improvements in the design of low voltage electrical power distribution and monitoring systems. For example, the system can include a compartmentalized low voltage electrical power distribution system enclosure, with integral, individually replaceable, circuit monitoring and metering components. The system can further include a central, rectangular cuboid compartment that houses the main power distribution buses and branch circuit protection devices (e.g., circuit breakers). In some instances, on each side of the central compartment is an instrumentation chamber. The instrumentation chambers include split core, phase and neutral current transformers (CTs) that can be installed to measure current flowing through circuit conductors. The phase CTs can be individually mounted on an insulating support in a staggered arrangement, directly adjacent to the circuits they monitor, while the neutral CTs can be group mounted towards the top of the instrumentation chamber. A metering compartment can be located below the main compartment and instrumentation chambers, and houses electronic metering devices to interpret, store, and transmit data collected from the CTs. Additionally, the system can include three pass-through type Ethernet jacks that are located on each side of the metering compartment's rear facing panel, which can allow electrical connectivity (e.g., RJ-45 connectivity) to remote monitoring and display systems. Furthermore, the system can include an upper cable management compartment that features designated openings for incoming main, and outgoing branch circuit conductors including side-mounted terminal strips for ground conductors. The technology of the present disclosure can provide a number of benefits and technical effects. For instance, the technology of the present disclosure can allow each compartment to accommodate devices from multiple equipment manufacturers. The system can be vendor agnostic. Additionally, the individually mounted CTs enable replacement of a single defective component without impacting non-defective components. Moreover, the staggered CT arrangement allows for a compact instrumentation solution, without requiring completely integrated CT printed circuit boards. Furthermore, the externally mounted Ethernet jacks allow for easier and safer remote connectivity by eliminating the need to access energized internal parts. Each compartment or chamber can be independently front accessible. In some instances, a data center includes a plurality of server racks to execute software systems. The power distribution and monitoring system can power the server racks in data centers. For example, the server rack can have two power distribution and monitoring systems on each side (e.g., A-side, B-side). The power distribution and monitoring system can also measure the amount of electric current to each server rack, and perform analysis based on the measured electric current. According to some embodiments, the power distribution and monitoring system can perform trending analysis, generate alarm notifications, and generate reports. In conventional systems, a datacenter can be powered using busway electrical distribution systems. The busway system can be installed (e.g., hang) above each rack or above an entire row of racks, which can then be fed down from the busway system to each rack location. The monitoring system of a busway system would connect each rack to a head-end-unit, and the head-end-unit can be connected to a central monitoring system. One of the drawbacks of the busway system is that the entire monitoring system is not compact because it can spread across an entire row, and the entire row can be long (e.g., 40 feet), which can make the installation cumbersome. Alternatively, instead of using a busway system, a datacenter can be powered using a centrally located power panel. The power panel can include a branch circuit that originates at the centrally located power panel and feeds electricity throughout the server racks. The branch circuit can be connected from the power panel to each rack location. The power panel can include a monitoring system. In conventional systems, the power panel can have current transformers (CTs) that are soldered on a CT strip. The CT strip can be a single unit that monitors each circuit associated with a CT. For example, a plurality of CTs (e.g., 42 CTs) can be soldered on the CT strip to monitor the plurality of currents associated with each CT. A drawback of such a conventional monitoring system includes having to replace the whole strip when one of the CTs malfunctions. As a result, all of the CTs that are soldered on the CT strip have to be replaced, instead of just replacing the one malfunctioning CT. Additionally, in order to replace the CT strip, the power panel must be shut down for an extended period of time. Techniques described herein improve the power distribution and monitoring of power panels by minimizing the amount of downtime when a single CT malfunctions and needs to be replaced. With reference now to the figures, example aspects of the present disclosure will be discussed in further detail. FIG.1depicts an electrical power distribution and monitoring system100according to example embodiments of the present disclosure. For example, the system100can be a low voltage (e.g., less than 600 volts) power distribution and monitoring system105. The system100can include a first enclosure110having a panel board with circuit breakers, a second enclosure115having a first set of current transformers, a third enclosure120having a metering system, and a fourth enclosure125having a second set of current transformers. In some embodiments, the first enclosure110houses power distribution components of system100(e.g., corresponding to a remote power panel (RPP)), while the remaining enclosures (e.g., second enclosure115, third enclosure120, and/or fourth enclosure125) correspond to power monitoring components of system100. In conventional systems, as later described inFIG.10, a conventional power distribution and monitoring system can include solid core CTs that are soldered to an electrical circuit board inside the power panel. As previously mentioned, all of the CTs have to be replaced when just one CT malfunctions. Additionally, because the CTs are in the same enclosure as some of the circuit breakers, the power distribution and monitoring system needs to be shut down in order to replace the CTs. Techniques described herein improve the design and functionality of a power distribution and monitoring system. According to some embodiments, the system100can include a power distribution and monitoring system105coupled to one or more racks135. For example, the one or more racks135can be one or more server racks. For example, the power distribution system can be a remote power panel (RPP). One or more circuit breakers can be mounted in a first enclosure110. The RPP can be an example of the first enclosure110. Additionally, the circuit breakers can be three-pole circuit breakers that are coupled to a power supply (e.g., mounted to a power distribution bus). In some instances, the first enclosure110can include a main power distribution bus and a plurality of circuit breakers. For each one of the circuit breakers, a branch circuit conductors can connect the circuit breaker to a set of phased current transformers, and then exit through the top of the panel to one of the server racks. The first set of phased current transformers (CTs) can be positioned in a first component arrangement of a second enclosure115. A current transformer can be a type of an instrument transformer that can reduce an alternating current by producing a current that is proportional to the current in the circuit breaker. The first set of phased CTs can be coupled to a first portion of the circuit breakers that are mounted in the first enclosure110. The first set of phased CTs can be configured to measure a current value flowing through the circuit breakers. Additionally, by positioning the first set of phased CTs together, the design allows for a more compact installation. Moreover, the first set of phased CTs can be associated with a first neutral CT. In some instances, the first set of phased CTs can be individually mounted on an insulated support in a staggered arrangement and positioned laterally adjacent to the circuit breaker(s). In some instances, the first set of phased CTs include split core CTs. Split core CTs can provide accurate measurement of electrical systems and feature a removable latch for easy installation without disconnecting wires or interrupting power. For example, split core CTs can have a split in the core that allows the CTs to open and be placed around the conductor without having to disconnect the conductor or disrupt the wiring. The split-core CT can contain a transformer in which one of the cores to position around the conductor can be opened or moved and then locked with a latch. The split core CT can be retrofitted without disrupting it into a live network. This noninvasive installation and removal approach provides for quicker installation with no disruption of service. Additionally, by using split core CTs, the design is more compact, which results in the power distribution and monitoring system having more CTs and circuit breakers than conventional systems. Furthermore, the CTs used in conventional systems require the circuit to be disconnected in order to remove or install the CT. Using techniques described herein, the power distribution and monitoring system can utilize split-core CTs which can be removed or installed without having the circuit be disconnected, which reduces the amount of downtime for the servers. Additionally, the system can include a first neutral current transformer (CT) positioned in a second component arrangement of the second enclosure115. The first neutral CT can also be coupled to the circuit breaker. In some instances, the first neutral CT can be mounted adjacent (e.g., above, below, to the left of, to the right of) the first set of phased CTs. For example, the first neutral CT can be mounted above the first set of phased CTs. Furthermore, the metering device can be positioned (e.g., mounted) in the third enclosure120. The metering device can transmit data associated with the current value to a display system130. For example, the third enclosure120can be located below the first enclosure110and the second enclosure115. The metering device can convert an analog signal from the first set of CTs to digital data. The metering device can also store the digital data. In some instances, the metering device can transmit, using an electrical connector (e.g., an RJ-45 connector), the data associated with the respective CT current values to the display system130, wherein the display system130is a remote device located outside the power distribution and monitoring system105. In some instances, the system100can be a low voltage electrical power distribution system operating at a maximum voltage of about 600 volts. In some instances, the power distribution and monitoring system105can further include a second set of phased current transformers (CTs) positioned in a first component arrangement of a fourth enclosure125. Additionally, the power distribution and monitoring system105can include a second neutral current transformer (CT) positioned in a second component arrangement of the fourth enclosure125. Moreover, the first enclosure110can be a compartment located between the second enclosure115and the fourth enclosure125. Furthermore, the plurality of circuit breakers can include a first set of circuit breakers that are coupled to a plurality of current transformers housed within the first enclosure115and a second set of circuit breakers that are coupled to a plurality of current transformers housed within the fourth enclosure125. Additionally, the system100can include a second neutral current transformer (CT) positioned in a second component arrangement of the fourth enclosure125. The second neutral CT can also be coupled to the circuit breaker. In some instances, the second neutral CT can be mounted adjacent (e.g., above, below, to the left of, to the right of) the second set of phased CTs. In some instances, the second set of phased CTs can be individually mounted on an insulated support in a staggered arrangement and positioned laterally adjacent to the circuit breaker. In some instances, the power distribution and monitoring system105can further include an upper cable management compartment having three openings for incoming conductors and multiple openings for outgoing branch conductors.FIGS.6A and6Bfurther describes the upper cable management compartment. In some instances, the power distribution and monitoring system can include side-mounted terminal strips for ground conductors. In some instances, at the first enclosure110and the second enclosure115are independently accessible from the same surface of the power distribution and monitoring system105(e.g., a front surface of the power distribution and monitoring system105depicted inFIG.1). In some instances, the first enclosure110, the second enclosure115, the third enclosure120, and the fourth enclosure125are independently accessible from the same surface of power distribution and monitoring system105(e.g., a front surface). FIG.2depicts a data hall200according to example embodiments of the present disclosure. A data center can have a plurality of data halls200. According to some embodiments, the data hall200can have a plurality of racks215,220,225,230. In some instances, the system (e.g., system100) can include a first power distribution and monitoring system205and a second power distribution and monitoring system210for each of the one or more racks215,220,225,230. For example, the power distribution and monitoring system105described inFIG.1can be an example of the first power distribution and monitoring system205and the second power distribution and monitoring system210. The first power distribution and monitoring system205can be positioned adjacent to a first end of a given rack215. Additionally, the second power distribution and monitoring system210can be positioned adjacent to a second end of the given rack215. Another example aspect of the present disclosure is directed to a system having a rack, a first power distribution and monitoring system, and a second power distribution and monitoring system. The first power distribution and monitoring system can be positioned adjacent to a first end of the rack. The second power distribution and monitoring system can be positioned adjacent to a second end of the rack. The first power distribution and monitoring system and the second power distribution and monitoring system respectively can include a circuit breaker, a first set of phased current transformers (CTs), a first neutral current transformer (CT), and a metering device. The circuit breaker can be mounted in a first enclosure. The first set of phased CTs can be positioned in a first component arrangement of a second enclosure and can be coupled to the circuit breaker. Additionally, the first set of phased CTs can be configured to measure a current value flowing through the circuit breaker. The first neutral CT can be positioned in a second component arrangement of the second enclosure and can be coupled to the circuit breaker. The metering device can transmit data associated with the current value to a display system. In some instances, the first power distribution and monitoring system and the second power distribution and monitoring system respectively can include a second set of phased current transformers (CTs) positioned in a first component arrangement of a fourth enclosure and a second neutral current transformer (CT) positioned in a second component arrangement of the fourth enclosure. In some instances, the first enclosure can be a compartment located between the second enclosure and the fourth enclosure, and wherein the first enclosure includes a main power distribution bus and a plurality of circuit breakers. In some instances, the plurality of circuit breakers can include a first set of circuit breakers that are coupled to a plurality of current transformers housed within the second enclosure and a second set of circuit breakers that are coupled to a plurality of current transformers housed within the fourth enclosure. Yet another example aspect of the present disclosure is directed to a system having one or more racks, one or more servers, and a power distribution and monitoring system. The one or servers can be positioned relative to the one or more racks. The power distribution and monitoring system can be coupled to the one or more racks. The power distribution and monitoring system can include a first circuit breaker and a second circuit breaker mounted in a first enclosure. Additionally, the power distribution and monitoring system can include a first set of phased current transformers (CTs) positioned in a first component arrangement of a second enclosure. The first set of phased CTs can be coupled to the first circuit breaker, and the first set of phased CTs are configured to measure a current value flowing through the first circuit breaker. Moreover, the power distribution and monitoring system can include a first neutral current transformer (CT) positioned in a second component arrangement of the second enclosure. The first neutral CT can be coupled to the circuit breaker. The power distribution and monitoring system can include a metering device mounted in a third enclosure, where the metering device can transmit data associated with the current value to a display system. The power distribution and monitoring system can include a second set of phased current transformers (CTs) positioned in a first component arrangement of a fourth enclosure. The second set of phased CTs can be coupled to the second circuit breaker. Furthermore, the power distribution and monitoring system can include a second neutral current transformer (CT) positioned in a second component arrangement of the fourth enclosure. According to another embodiment, the system may only include the monitoring system. For example, the system can include a first set of phased current transformers (CTs) positioned in a first component arrangement of a first enclosure. The first set of phased CTs can measure a current value from through a circuit breaker. For example, the circuit breakers can be connected to the monitoring system, while not forming a part of the monitoring system. Additionally, the monitoring system can include a first neutral current transformer (CT) positioned in a second component arrangement of the first enclosure. The first neutral CT can be connected to a neutral bus. Moreover, the monitoring system can include a metering device. The metering device can be configured to transmit data associated with the current value to a display device. FIGS.3A-3Bdepict respective front views of a power distribution and monitoring system305,310according to example embodiments of the present disclosure.FIG.3Adepicts the front view of a power distribution and monitoring system305with the enclosure doors closed. The power distribution and monitoring system305ofFIG.3Aincludes a first enclosure315, a second enclosure320, a third enclosure325, a fourth enclosure330, and an upper cable management compartment335.FIG.3Bdepicts the front view of a power distribution and monitoring system310with the enclosure doors opened. The power distribution and monitoring system310of FIG.3B includes a first enclosure340, a second enclosure345, a third enclosure350, a fourth enclosure355, and an upper cable management compartment360. In some instances, the first enclosure315,340can include a main power distribution bus and a plurality of circuit breakers365,395. According to an example embodiment, when the circuit breaker365is a three-pole circuit breaker, three different phased wires can be connected from the three-pole circuit breaker to the three phased CTs375. The phased CTs375can be grouped laterally adjacent to each circuit breaker365. Additionally, one single neutral wire can be connected from the neutral bus371to the neutral CT370. Furthermore, all the neutral CTs370can be positioned together for a more compact installation. In some instances, the plurality of neutral CTs370can be positioned above the different set of phased CTs375. The second enclosure320,345can include a plurality of first phased current transformers (CTs)375positioned in a first component arrangement of the second enclosure. For example, a first set (e.g., 3 CTs) of phased CTs375can be coupled to a first circuit breaker365. The first set of phased CTs375can be configured to measure a current value of the electric current flowing through the circuit breaker365. For example, a first phased CT in the first set of phased CTs375can measure the electric current in a first phase flowing through the circuit breaker365, while a second phased CT in the first set of phased CTs375can measure the electric current in a second phase flowing through the circuit breaker365, and a third phased CT in the first set of phased CTs375can measure the electric current in a third phase flowing through the circuit breaker365. For alternating current (AC) power distribution, the first phase measured by the first phased CT, the second phase measured by the second phased CT, and the third phase measured by the third phased CT can all be offset from one another (e.g., offset from one another by 120 degrees). Additionally, the second enclosure320,345can include a first set of neutral current transformers (CTs)370positioned in a second component arrangement of the second enclosure. The first set of neutral CTs370can also be coupled to respective circuit breakers365. In some instances, the first enclosure315,340and the second enclosure320,345can be independently accessible from a same surface of the power distribution and monitoring system305,310. Additionally, in some embodiments, all of the different enclosures (e.g., first enclosure, second enclosure, third enclosure, fourth enclosure) can be independently accessible. The third enclosure325,350can include a metering device380. The metering device380can transmit data associated with the current value of the electric current flowing through the circuit breakers365to a display system. The metering device380can convert an analog signal from the first set of CTs to digital data, and the metering device can store the digital data. In some instances, the metering device380can include two wiring harnesses on either side of the third enclosure325,350in order to make the power distribution and monitoring system side agnostic. The wiring harness can have wires that are connected to the CTs in the second enclosure320,345and to the CTs in the fourth enclosure330,355. The metering device380can also include an electronic component (e.g., head-end-unit) that converts the analog signal (e.g., current flowing through the CTs) received from the CTs into digital data. The digital data (e.g., current value) can be stored by a head-end-unit of the metering device380. The head-end-unit can be positioned between the two wiring harnesses. The head-end-unit can aggregate the digital data and allow a user to access the data remotely. For example, the data can be presented in the display system130ofFIG.1. The metering device380can also include a circuit breaker and a power supply to provide power to the metering device380. For example, the metering device380can measure the amount of current that is flowing through each of the circuit conductors by using the corresponding CT for each circuit conductor. The metering device380can measure the amount of electric current flowing in a conductor. The metering device380can use current and voltage measurements to calculate power and energy (e.g., kW and kWh). For example, a voltage reference can be taken from the main bus and passed to the metering device380. Additionally, the data transmitted by the metering device380can include any data associated with the power distribution and monitoring system that can be measured, which can include power and voltage measurements. The metering device380can also be a low voltage monitoring system. For example, the low voltage monitoring system can be a monitoring system below a certain voltage threshold (e.g., 600 volts). In some instances, the low voltage monitoring system can monitor a certain voltage range (e.g., between 600 volts and 240 volts, between 220 volts and 40 volts). The fourth enclosure330,355can include a plurality of second phased current transformers (CTs)385positioned in a first component arrangement of the fourth enclosure. For example, a second set (e.g., 3 CTs) of phased CTs385can be coupled to a second circuit breaker395. The second set of phased CTs385can be configured to measure a current value of the electric current flowing through the second circuit breaker395. For example, a first phased CT in the second set of phased CTs can measure a first phase of the electric current flowing through the circuit breaker, while a second phased CT in the second set of phased CTs can measure a second phase of the electric current flowing through the circuit breaker, and a third phased CT in the second set of phased CTs can measure a third phase of the electric current flowing through the circuit breaker. For alternating current (AC) power distribution, the first phase measured by the first phased CT, the second phase measured by the second phased CT, and the third phase measured by the third phased CT can all be offset from one another (e.g., offset from one another by 120 degrees). Additionally, the second enclosure330,355can include a second set of neutral current transformer (CT)390positioned in a second component arrangement of the second enclosure. The second neutral CT390can be coupled to the second circuit breaker395. In some instances, the first enclosure315,340and the fourth enclosure330,355can be independently accessible from the same surface of the power distribution and monitoring system305,310. The upper cable management compartment335,360of the power distribution and monitoring system305,310can include three openings (not pictured) for incoming conductors and multiple openings for outgoing branch conductors. In some instances, the first set of phased CTs370and the second set of phased CTs385can be split core CTs. The first set of phased CTs370can be individually mounted on an insulated support in a staggered arrangement and positioned laterally adjacent to the first circuit breaker365. The second set of phased CTs385can be individually mounted on an insulated support in a staggered arrangement and positioned laterally adjacent to the second circuit breaker395. Additionally, the first neutral CT375can be mounted below the first set of phased CTs390. The second neutral CT390can be mounted below the second set of phased CTs385. FIGS.4A-4Bdepict respective side views400,405of a power distribution and monitoring system410according to example embodiments of the present disclosure.FIG.4Adepicts a first side400of the power distribution and monitoring system410.FIG.4Bdepicts the second side405of the power distribution and monitoring system410. The power distribution and monitoring system410is side agnostic and therefore can be installed on either side of a server rack. FIG.5depicts a back view500of a power distribution and monitoring system510according to example embodiments of the present disclosure. In some instances, the metering device520(e.g., enclosed in a third enclosure) can transmit, using an electrical connector (e.g., an RJ-45 connector)525,530, the data associated with the current value to a display system. The RJ-45 connector525,530can be positioned on both sides of the metering device520so that the power distribution and monitoring system510can be side-agnostic during an installation. The display system (not pictured) can be a remote device located outside the power distribution and monitoring system510. FIG.6Adepicts a top view600of a first power distribution and monitoring system620to be installed on a first side (e.g., left side) of a server rack according to example embodiments of the present disclosure.FIG.6Bdepicts a top view610of a power distribution and monitoring system630to be installed on a second side (e.g., right side) of the server rack according to example embodiments of the present disclosure. According to some embodiments, the first power distribution and monitoring system620can include an upper cable management compartment having three openings640for incoming conductors and multiple openings for branch circuit conductors. Similarly, the second power distribution and monitoring system630can include an upper cable management compartment having three openings650for incoming conductors and multiple openings for outgoing branch circuit conductors. By having three openings640,650, instead of just two openings, for both the first power distribution and monitoring system620and the second power distribution and monitoring system630, the power distribution and monitoring systems can be side agnostic during installation. Additional symmetry of the top panel of power distribution and monitoring system620and power distribution and monitoring system630is intended to facilitate power distribution and monitoring system design as being side agnostic so that a given power distribution and monitoring system can be configured for use as either an A-side power source or a B-side power source. FIG.7Adepicts a bottom view700of a first power distribution and monitoring system720to be installed on a first side of a server rack according to example embodiments of the present disclosure.FIG.7Bdepicts a bottom view710of a second power distribution and monitoring system730to be installed on a second side of a server rack according to example embodiments of the present disclosure. The first power distribution and monitoring system720can include anchoring brackets at a first position740that secure (e.g., fasten, install) the first power distribution and monitoring system720to a building structure (e.g., a wall, floor, ceiling, frame, etc.). Similarly, the second power distribution and monitoring system730can include anchoring brackets at a second position750to secure the second power distribution and monitoring system730to the building structure. By having the option to secure the anchoring brackets at either the first position or the second position, the power distribution and monitoring systems can be side agnostic during installation. Additional symmetry of the side panel of power distribution and monitoring system720and power distribution and monitoring system730is intended to facilitate power distribution and monitoring system design as being side agnostic so that a given power distribution and monitoring system can be configured for use as either an A-side power source or a B-side power source. FIGS.8A-8Bdepict respective perspective views800,810of a first power distribution and monitoring system820and a second power distribution and monitoring system830according to example embodiments of the present disclosure. The first power distribution and monitoring system820can be installed on a first side of the server rack, and the second power distribution and monitoring system830can be installed on a second side of the server rack. As previously mentioned, the first power distribution and monitoring system820and the second power distribution and monitoring system830are side agnostic based on the design. The design can include the upper cable management compartment having three openings840for the conductors850and multiple openings860for the outgoing branch circuit conductors. FIGS.9and10respectively depict portions of a power distribution and monitoring system with open enclosures according to example embodiments of the present disclosure.FIG.9illustrates a first enclosure910and a second enclosure920of a power distribution and monitoring system900that is designed using techniques described herein. The example arrangement inFIG.9allows an operator to access the CTs in the second enclosure920without getting close to the live bus bars and the energized compartment in the first enclosure910. This example arrangement can position the CTs in the second enclosure920and the metering system (e.g., in another enclosure that is not pictured inFIG.9) separate from the main power in the first enclosure920. Therefore, all of the controls and metering components can be accessed individually, without necessarily reaching into a live compartment. FIG.10illustrates a power distribution and monitoring system1000that is designed using conventional methods. As previously mentioned, the power distribution and monitoring system1000that is designed using conventional methods have many drawbacks. As illustrated inFIG.10, the CTs1030and the circuit breaker1050are in the same enclosure1040. For example, given that the power distribution and monitoring system1000only has one enclosure1040, the first CT1010is in the same enclosure as the circuit breakers1050with the live bus and other energized electrical components, which can be unsafe for an operator that is trying to replace the first CT1010. Additionally, when a first CT1010in a power distribution and monitoring system1000has to be replaced, the whole CT strip1020needs to be replaced with the remaining CTs1030that are soldered on the CT strip1020. FIG.11depicts components of a metering device1100according to example embodiments of the present disclosure. The metering device1100includes a power supply1110, and two wiring harnesses1120,1130on either side of the metering device1100that enables the power distribution and monitoring system to be side agnostic. FIGS.12A-12Cdepict respective views1200,1210,1220of a first power distribution and monitoring system for use as a first-side power source in a power distribution and monitoring system according to example embodiments of the present disclosure.FIGS.13A-13Cdepict respective views1300,1310,1320of a second power distribution and monitoring system for use as a second-side power source in a power distribution and monitoring system according to example embodiments of the present disclosure.FIGS.12A-13Cdescribe some of the mechanical features of the power distribution and monitoring systems. For example, the position of a ladder1240and a basket1250for a left-side power distribution and monitoring system1210can be different from the position of a ladder1340and a basket1350of a right-sided power distribution and monitoring system1310. Using the techniques described herein, the power distribution and monitoring system1210,1310is side-agnostic, and thus can be installed on either side of the server rack. As illustrated inFIGS.12A-13C, the openings at the top of the power distribution and monitoring system1210,1310are symmetric, and therefore the ladder1240,1340and the basket1250,1350can be installed on either side of the power distribution and monitoring system. The ladder1240,1340and the basket1250,1350are designed to provide mechanical positioning and support for various electrical connectors coupled to the power distribution and monitoring systems. In some instances, the ladder1240,1340can physically support the circuit conductors that are coming out of the power distribution and monitoring system. For example, each circuit conductor can be connected to a circuit breaker inside the power distribution and monitoring system and a single server rack. The server rack can be part of the plurality of server racks located in a data center. The ladder can support the electric cables coming out of the power distribution and monitoring system to the other electric systems (e.g., server, server rack) in the data center. In some instances, the basket1250,1350can include the fiber communication cables and network switches that are connected to each rack. Aspects of the disclosure have been described in terms of illustrative embodiments thereof. Numerous other embodiments, modifications, and/or variations within the scope and spirit of the appended claims can occur to persons of ordinary skill in the art from a review of this disclosure. Any and all features in the following claims can be combined and/or rearranged in any way possible. Accordingly, the scope of the present disclosure is by way of example rather than by way of limitation, and the subject disclosure does not preclude inclusion of such modifications, variations or additions to the present subject matter as would be readily apparent to one of ordinary skill in the art. Moreover, terms are described herein using lists of example elements joined by conjunctions such as “and,” “or,” “but,” etc. It should be understood that such conjunctions are provided for explanatory purposes only. Lists joined by a particular conjunction such as “or,” for example, can refer to “at least one of” or “any combination of” example elements listed therein. Also, terms such as “based on” should be understood as “based at least in part on.” As used throughout this application, the word “may” and “can” is used in a permissive sense (i.e., meaning having the potential to), rather than the mandatory sense (i.e., meaning must). Similarly, the words “include,” “including,” and “includes” mean including, but not limited to. Those of ordinary skill in the art, using the disclosures provided herein, will understand that the elements of any of the claims discussed herein can be adapted, rearranged, expanded, omitted, combined, or modified in various ways without deviating from the scope of the present disclosure. Some implementations are described with a reference numeral for example illustrated purposes and is not meant to be limiting. Although claims included herein may be shown to be dependent on other certain claims, any of the claims can depend on one or more other claims, including any preceding claims. | 46,510 |
11942267 | DETAILED DESCRIPTION OF THE INVENTION Hereinbelow, a sintered body in one embodiment of the present invention and a method for producing the sintered body will be described with reference to drawings. In the drawings, the same number is assigned to the same members, and is accompanied by the same explanation unless otherwise stated. As shown inFIG.1, a sintered body10containing a metal magnetic body in this embodiment includes: a plurality of coated grains (or resin-coated metal magnetic body grains)5in which each of metal magnetic body grains1is coated with a resin layer3; a plurality of ferrite grains7; and an amorphous phase9which is located between the plurality of coated grains5and the plurality of ferrite grains7. Each of the metal magnetic body grains1may be composed of a metal magnetic body. The metal magnetic body is a magnetic body composed of one type or two or more types of metal or alloy. The metal magnetic body which can be used in this embodiment is not particularly limited, and may contain, for example, at least one metal magnetic body selected from the group consisting of Fe, a Fe—Si-based metal magnetic body, a Fe—Ni-based metal magnetic body, a Fe—Ni—Mo-based metal magnetic body, a Fe—Si—Al-based metal magnetic body, a Fe—Si—Cr-based metal magnetic body, a Fe-based amorphous metal and a Fe nanocrystal. Among these components, a Fe—Si-based metal magnetic body is preferred, because this metal magnetic body has a high saturation magnetic flux density and can improve the direct-current bias characteristics of the sintered body10. When the metal magnetic body is an alloy, the content ratios of metal elements may be selected appropriately depending on the desired electrical properties. Without limiting this embodiment, the Fe—Si-based metal magnetic body may contain 0.1 to 8.0% by mass of Si, with the remainder being Fe. The Fe—Ni-based metal magnetic body may contain 36 to 90% by mass of Ni, with the remainder being Fe. The Fe—Ni—Mo-based metal magnetic body may contain 36 to 90% by mass of Ni and 0.1 to 10% by mass of Mo, with the remainder being Fe. The Fe—Si—Al-based metal magnetic body may contain 0.1 to 10% by mass of Si and 0.1 to 12% by mass of Al, with the remainder being Fe. The Fe—Si—Cr-based metal magnetic body may contain 0.1 to 8.0% by mass of Si and 0.1 to 20% by mass of Cr, with the remainder being Fe. The Fe-based amorphous metal is composed of Fe or a Fe-based metal (e.g., Fe—Si—B), and is an amorphous metal. The Fe nanocrystal is composed of Fe and is a metal in which an amorphous is the main phase and nanocrystals having an average grain diameter of 5 or more and 25 nm or less are mixed therein. The average grain diameter of the metal magnetic body grains1may be, for example, 0.01 to 1000 μm, preferably 0.02 to 100 μm. When the average grain diameter of the metal magnetic body grains1falls within the range of 0.01 to 1000 μm, in the producing method mentioned below in this embodiment, the metal magnetic body grains are more likely to be delivered to gaps formed between the other metal magnetic body grains by means of a liquid medium and/or a fluid (preferably solvent) derived from the metal acetylacetonate, resulting in the effective achievement of the increase in density of the sintered body obtained the producing method. The term “average grain diameter” as used herein refers to a grain diameter (D50) at a point at which an accumulated value becomes 50% in a cumulative curve which is obtained by determining a volume-based grain size distribution and in which the total volume is 100%. The average grain diameter can be measured using a laser diffraction/scattering grain diameter/grain size distribution measurement device or a scanning electron microscope. The metal magnetic body grains1may be a mixture of two or more types of metal magnetic body grains having different metal magnetic body compositions and/or different average grain diameters from each other. The resin layer3may be composed of a resin material. The resin material which can be used in this embodiment is not particularly limited, as long as the resin material does not have electrical conductivity. For example, the resin material may contain at least one component selected from the group consisting of polyimide, polyamide, polyamide-imide, polyethylene terephthalate, polyetherimide, polytetrafluoroethylene, an epoxy resin and a silicone-based resin. Among these components, polyimide is preferred, because polyimide has high insulation properties and also has excellent heat resistance and strength and can improve the specific resistance, heat resistance and strength of the sintered body10. The resin layer3may have a single-layer structure, or may have a multi-layer structure composed of two or more layers respectively made from resin material having different compositions. The thickness of the resin layer3is not particularly limited, as long as the electrical conduction can be prevented, preferably insulation can be achieved, between the metal magnetic body grains1. For example, the average thickness of the resin layer3may be, for example, 200 nm or less, preferably 100 nm or less. The lower limit of the average thickness is not particularly limited, and may be, for example, 10 nm or more. When the average thickness of the resin layer3is 200 nm or less, the eddy current loss can be reduced and excellent direct-current bias characteristics can be achieved without substantially decreasing the total magnetic permeability of the sintered body10. Furthermore, when the average thickness of the resin layer3is 100 nm or less, the magnetic permeability can also be improved significantly compared with the case of conventional sintered bodies each composed of metal magnetic body grains and a resin layer (e.g., Comparative Example 2) when the filling rate of the metal magnetic body grains1is higher. The resin layer3preferably coats the entire surface of the metal magnetic body grains1. However, it is not necessarily required for the resin layer3to coat the whole surface areas of the metal magnetic body grains1. The metal magnetic body grains1may be exposed partly, for example by less than 50%, more specifically by less than 10%, of the total surface area of the metal magnetic body grains1, may be exposed on the resin layer3. The average thickness of the resin layer can be determined in the following manner. With respect to a single metal magnetic body grain, in a scanning electron microscope (SEM) observation image of a sectional surface of the sintered body, the thickness of the resin layer is measured at 10 points or more located on the surface of the metal magnetic body grain which are apart from each other at approximately equal intervals, and then the average value of the measurement values is calculated. This procedure is carried out with respect to 5 metal magnetic body grains1in total, and the calculated average values are averaged. The average grain diameter of the coated grains5can be understood as the sum total of the average grain diameter of the metal magnetic body grains1and the average thickness of the resin layer3. However, the average grain diameter may also be measured from the coated grains that are used as a raw material. The average grain diameter of the coated grains5may be, for example, 0.02 to 1000 μm, preferably 0.11 to 100 μm. Each of the ferrite grains7may be composed of a ferrite. The ferrite is a magnetic body, preferably a ferromagnetic body, containing iron oxide. The ferrite which can be used in this embodiment is not particularly limited, and may include, for example, at least one component selected from the group consisting of Ni—Zn-based ferrite, Ni—Zn—Cu-based ferrite, Ni-based ferrite, Co-based ferrite, Co—Zn-based ferrite, Mn—Zn-based ferrite, Mg—Zn-based ferrite, and Mg—Zn—Cu-based spinel-type ferrites and magnetopulmbite-type hexagonal Ba ferrites. Among these ferrites, a ferrite containing Ni and Zn (e.g., a N—Zn-based ferrite, a Ni—Zn—Cu-based ferrite), a Ni-based ferrite, a Co-based ferrite, a Co—Zn-based ferrite, a Mg—Zn-based ferrite, and a Mg—Zn—Cu-based ferrite are preferred, because these ferrites have high specific resistance and can reduce the eddy current loss of the sintered body10. The spinel-type ferrite is a magnetic material containing iron oxide and having a spinel-type structure, and examples of the spinel-type ferrite include a ferrite represented by the compositional formula: AFe2O4, a ferrite represented by the compositional formula: A1XA21-XFeaO4±δ, and a ferrite represented by the compositional formula: A3XA4yA5zFeaO4±δ(wherein x+y+z=1, 1.5≤a≤2.55, 0≤δ<1). Each of A and A1to A5may represent an arbitrary metal such as Mn, Co, Ni, Cu, Zn, Li, Fe and Mg, preferably Ni, Zn, Fe, Mn, Co or Li. The average grain diameter of the ferrite grains7is preferably smaller than the average grain diameter of the metal magnetic body grains1(therefore is inevitably smaller than the average grain diameter of the coated resin5). The average grain diameter of the ferrite grains7may be 50% or less, more specifically 0.1 to 30%, of the average grain diameter of the metal magnetic body grains1. More specifically, the average grain diameter of the ferrite grains7may be, for example, 0.01 to 100 μm, preferably 0.02 to 1 μm. When the average grain diameter of the ferrite grains7is smaller than the average grain diameter of the metal magnetic body grains1, in the producing method mentioned below in this embodiment, the ferrite grains can be delivered more easily to gaps between the metal magnetic body grains by means of a liquid medium and/or a fluid (preferably solvent) derived from the metal acetylacetonate, resulting in the increase in magnetic permeability of the sintered body obtained the producing method. The ferrite grains7may be a mixture of two or more types of ferrite grains respectively having different ferrite compositions and/or different average grain diameters from each other. The amorphous phase9is located between the coated grains5and the ferrite grains7and can adhere these grains to each other strongly. Without limiting this embodiment, it is possible to form such a structure that a plurality of the coated grains5and a plurality of the ferrite grains7are dispersed in a continuous phase formed by the amorphous phase9. Furthermore, the sintered body10according to this embodiment can contain these grains at a high density due to the presence of the amorphous phase9, and particularly can contain the metal magnetic body grains1at a high filling rate. The filling rate of the metal magnetic body grains can be determined by performing image analysis in a scanning electron microscope (SEM) observation image of a sectional surface of the sintered body. Therefore, in the sintered body10according to this embodiment, it becomes possible to follow the movement of the coated grains5(e.g., the plastic deformation of the metal magnetic body) due to the presence of the relatively flexible and plastically deformable amorphous phase9when an external force is applied (e.g., during molding) while keeping the high strength and a high density of the sintered body10. As a result, the approximation or close contact of the metal magnetic body grains1to each other in association with the destruction of the resin layer3can be prevented, the specific resistance can be increased, and the eddy current loss can be reduced, resulting in the prevention of the deterioration in electrical properties. Without limiting this embodiment, the iron loss in a high-frequency region of 10 MHz or more can be reduced as the result of the reduction in the eddy current loss, and therefore the sintered body10according to this embodiment can be used suitably as a core material in a power inductor for high frequency. Furthermore, in the sintered body10according to this embodiment, because each of the metal magnetic body grains1is coated with the resin layer3, the eddy current loss can be reduced and excellent direct-current bias characteristics can be exerted. Moreover, in the sintered body10according to this embodiment, because the resin layer3is introduced as a non-magnetic gap between the metal magnetic body grains1and the ferrite grains7, a direct-current magnetic field generated in the ferrite grains7can be reduced and the direct-current bias characteristics can be improved. Still further, the sintered body10according to this embodiment does not contain any resin other than the resin layer3, and therefore can have such a structure that spaces other than the coated grains5(in which each of the metal magnetic body grains1is coated with the resin layer3) and the amorphous phase9are occupied by the ferrite grains7. Therefore, a higher magnetic permeability can also be achieved compared with the case of a conventional sintered body that is composed of metal magnetic body grains and resin layers (e.g., Comparative Example 2) when the filling rate of the metal magnetic body grains1is small. As a result, when it is intended to achieve a given magnetic permeability, the filling rate of the metal magnetic body grains1can be reduced, and therefore the distance between the metal magnetic body grains1can be kept large, resulting in the increase in specific resistance and the decrease in the eddy current loss. The amorphous phase9may contain a metal element that is the same as a metal element contained in the ferrite grains7. Therefore, the amorphous phase9can exhibit electrical properties similar to those of the ferrite grains7. Furthermore, when mutual diffusion between the ferrite grains7and the amorphous phase9occurs, the deterioration in the electrical properties of the sintered body10can be prevented effectively. The term “amorphous phase” as used herein refers to a phase having substantially no crystallinity or having relatively small crystallinity, and the amorphous phase can be distinguished from grains each having a crystal structure on the basis of an electron beam diffraction image that is a technique known to a person skilled in the art. The element (particularly the metal element) contained in the amorphous phase can be confirmed using a scanning transmission electron microscope (STEM). In the sintered body10according to this embodiment, it should be noted that the amorphous phase9contains substantially no silicon oxide such as SiO2glass. The presence of a silicon oxide is not preferred, because significant decrease in electrical properties may be caused. The content of the silicon oxide in the amorphous phase9is, for example, 0.1% by mass or less, preferably 0.01% by mass or less, more preferably substantially 0% by mass. The term “sintered body” as used herein refers to an object produced by heating a raw material mixture containing the metal magnetic body grains at a temperature lower than the melting point of the metal magnetic body constituting the grains. The shape of the sintered body is not particularly limited, and may be a film-like shape, a bulky shape, or a shape of a molded article. The sintered body10according to this embodiment can be produced by any proper method. For example, the sintered body10can be produced by the following method. Firstly, coated grains5in which each of metal magnetic body grains1is coated with a resin layer3are prepared. The method for coating each of the metal magnetic body grains1with the resin layer3is not particularly limited. For example, it is possible to immerse the metal magnetic body grains1in a resin precursor solution, then pulling up the metal magnetic body grains1coated with the resin precursor solution or separating the metal magnetic body grains1coated with the resin precursor solution with a magnet from the resin precursor solution itself, and then converting the resin precursor into a resin by heating to form a resin layer3that coats each of the metal magnetic body grains1. Separately, ferrite grains7are prepared. The ferrite grains7can be produced by any proper method. For example, the ferrite grains7can be produced by temporally firing a mixture prepared by mixing raw material oxides in such a manner that a desired ferrite composition can be achieved (to produce a temporally fired powder) and then pulverizing the temporally fired powder to a size close to a desired size. Subsequently, a mixture containing the coated grains5, the ferrite grains7and a metal acetylacetonate (wherein the mixture is also referred to as a “raw material mixture”, hereinafter) is supplied into a mold form for molding use or onto any proper substrate (wherein the substrate may be removed or may not be removed from a sintered body10finally) and is then heated at a temperature of the melting point of the metal acetylacetonate or higher and 350° C. or lower under pressure to produce a sintered body10containing the metal magnetic body. The mold form or the substrate in or to which the raw material mixture has been supplied may be subjected to a treatment such as drying or spontaneous air-drying under heating as required, and then can be heated at a temperature of the melting point of the metal acetylacetonate or higher and 350° C. under pressure or lower using a means known to a person skilled in the art, such as a pressing machine. The term “metal acetylacetonate” as used herein refers to an acetylacetonate salt of a metal, more specifically a chelate complex having an acetylacetonate ion ((CH3COCHCOCH3)−, also abbreviated as “(acac)-”, hereinafter) that is a bidentate ligand and a center metal. It is preferred that the metal element contained in the metal acetylacetonate is the same metal element as a metal element contained in the ferrite grains7. As the metal acetylacetonate, a single metal acetylacetonate may be used, or two or more metal acetylacetonates may be used in combination. When two or more metal elements are contained in the ferrite grains7, it is possible to use a combination of two or more metal acetylacetonates corresponding to the abundance ratio of the metal elements. In this manner, the composition of the ferrite grains7and the composition of the amorphous phase9containing a substance derived from the metal acetylacetonate can contain the same type of metal element. As a result, if the mutual diffusion between the ferrite grains and the amorphous phase occurs, the deterioration in the properties of the sintered body can be prevented. The raw material mixture can be prepared by mixing the coated grains5, the ferrite grains7and the metal acetylacetonate together. This mixing can be carried out under an atmosphere having an ambient temperature, an ambient humidity and an atmospheric pressure. The metal acetylacetonate may be mixed in an amount of, for example, 0.1% by mass to 50% by mass, preferably 1% by mass to 30% by mass, more preferably 2% by mass to 10% by mass, relative to the total mass of the coated grains5and the ferrite grains7. The metal acetylacetonate to be mixed may have any form. For example, the raw material mixture may be prepared by mixing the coated grains5, the ferrite grains7and a solid metal acetylacetonate having a dried powdery form together. In this case, the raw material mixture can be prepared by mixing the coated grains5, the ferrite grains7and the metal acetylacetonate having a powdery form together by employing a conventional mixing method which is carried out, for example, under an atmospheric pressure in one or two or more of solvent selected from the group consisting of water, acetylacetone, an alcohol including methanol and/or ethanol and the like or in one or two or more of gas selected from the group consisting of air, nitrogen and the like. Alternatively, the raw material mixture may be prepared by mixing the coated grains5, the ferrite grains7, the metal acetylacetonate and a solvent together. As the solvent, any appropriate solvent may be used, and may be, for example, a solvent selected from the group consisting of water, acetylacetone, an alcohol including methanol and/or ethanol and the like or a mixture of one or two or more of these solvents. The amount of the solvent is not particularly limited, as long as the amount is not too large and is suitable for the heating of the raw material mixture under pressure. The solvent may be mixed in an amount of, for example, 50% by mass or less, preferably 30% by mass or less, relative to the total mass of the coated grains5and the ferrite grains7. In the mixing, the metal acetylacetonate and the solvent may be used separately, or a liquid material prepared by dispersing or dissolving the metal acetylacetonate in the solvent may be used. In the latter case, a liquid material obtained as the result of the synthesis of the metal acetylacetonate may be used without the need to separate the metal acetylacetonate therefrom. More specifically, the metal acetylacetonate can be synthesized by mixing acetylacetone having a liquid form with a metal compound (e.g., a hydroxide or chloride of a metal), and a liquid material resulting from the synthesis can be used without any treatment or, alternatively, a solvent may be further added to the liquid material upon use if necessary. In addition to the coated grains5, the ferrite grains7and the metal acetylacetonate, the raw material mixture may further contain any appropriate material as long as the desired electrical properties cannot be adversely affected. More specifically, the raw material mixture may further contain an additive such as a pH modifier, a sintering additive and a pressure relaxing agent. The additive may be mixed in an amount of, for example, 0.01% by mass to 10% by mass, preferably 0.01% by mass to 1% by mass, more preferably 0.01% by mass to 0.1% by mass, relative to the total mass of the coated grains5and the ferrite grains7. The raw material mixture prepared as mentioned above is heated at a temperature of the melting point of the metal acetylacetonate or higher and 350° C. or lower under pressure to form a sintered body having a relatively high density. In the heating step, the metal acetylacetonate is liquidized and can act as a liquid medium. The heating is preferably carried out in the presence of a fluid. The term “fluid” as used herein is a liquid, preferably a liquid that can be used as a solvent, more preferably water. For example, when water is present during the heating and pressurization of the raw material mixture, the water can exist at the interfaces between the coated grains5and the ferrite grains7contained in the raw material mixture. As a result, the raw material mixture can be sintered at a lower temperature and the strength of the sintered body can be improved effectively. The wording “the mixture is in a water-containing state” as used herein refers to the state where water may be or may not be added actively to the mixture and it is only required for water to be present in a trace amount at the interfaces between the coated grains5and the ferrite grains7. Alternatively, the degree of the presence of water may be such that the coated grains5and the ferrite grains7absorb moisture at room temperature. The active addition of water may be performed by impregnating the raw material mixture with water (i.e., mixing) or may be performed by carrying out the heating and the pressurization of the raw material mixture under a water vapor atmosphere. Particularly when water is allowed to exist by mixing the water with the raw material mixture, it becomes possible to spread the water effectively from the interfaces between the grains. When water is mixed with the raw material mixture, the amount of the water is not particularly limited, and may be, for example, 20% by mass or less, preferably 15% by mass or less, typically 10% by mass, relative to the total mass of the coated grains5and the ferrite grains7. When the amount of water to be mixed with the raw material mixture is adjusted to 20% by mass or less, it becomes possible to mix the water with the raw material mixture and to prevent the deterioration in moldability of the raw material mixture more effectively. For achieving the improvement in the strength of the sintered body effectively, it is preferred to use water as much as possible within the above-mentioned range, more specifically in an amount of 10% by mass to 20% by mass. Furthermore, for achieving the molding more easily, it is preferred to use water as small as possible within the above-mentioned range, more specifically in an amount of more than 0% by mass and 10% by mass or less. The pressure to be applied for the pressurization of the raw material mixture is, for example, 1 MPa to 5000 MPa, preferably 5 MPa to 1000 MPa, more preferably 10 MPa to 500 MPa. The term “pressurization of the raw material mixture” as used herein refers to, for example, the matter that a pressing force (or a physical/mechanical pressure) is applied to the raw material mixture (more specifically a solid component contained in the raw material mixture) by using, for example, a pressure molding machine. Therefore, attention should be paid to the matter that a liquid component contained in the raw material mixture is also exposed to a pressure in the surrounding atmosphere (generally an atmospheric pressure) when the raw material mixture is in a pressurized state. The temperature to be employed for the heating of the raw material mixture (wherein the temperature is also referred to as a “heating temperature”, hereinafter) is a firing temperature, and may be a temperature of the melting point of the metal acetylacetonate contained in the raw material mixture or higher and 350° C. or lower. The term “melting point” as used herein refers to a temperature measured by the method prescribed in the JIS standard at room temperature under an atmospheric pressure. The melting point may vary depending on various conditions including the pressure to be applied for the pressurization. The melting points of various metal acetylacetonates are shown in Table 1. When two or more metal acetylacetonates are used, the “melting point of the metal acetylacetonate” refers to a highest melting point among the melting points of all of the metal acetylacetonates. The heating temperature for the raw material mixture may vary depending on the type of the materials for the metal magnetic body grains1, the resin layer3, the ferrite grains7and the like to be used, especially the resin to be used in the resin layer3, and may be higher by 5° C. or more than the melting point of the metal acetylacetonate and 350° C. or lower, preferably 100° C. to 320° C. TABLE 1Metal acetylacetonateMelting point (□)Iron acetylacetonate185Nickel acetylacetonate230Zinc acetylacetonate125Copper acetylacetonate284Cobalt acetylacetonate198Manganese acetylacetonate161Magnesium acetylacetonate276Barium acetylacetonate320 As mentioned above, the raw material mixture is heated at a temperature of the melting point of the metal acetylacetonate or higher under pressure, and, as a result, a sintered body having a relatively high density can be formed at a lower temperature as mentioned above. According to this embodiment, the resin layer3is present between the metal magnetic body grains1and the ferrite grains7, and, as a result, the interaction between the metal magnetic body and the ferrite can be inhibited. The metal magnetic body grains1contained in the sintered body can be considered to be substantially the same as the metal magnetic body grains1contained in the raw material mixture. The time required for the heating and the pressurization of the raw material mixture may be selected appropriately, and is preferably 10 minutes to 120 minutes. In this manner, the sintered body10according to this embodiment can be produced. The sintered body10has such a structure that the amorphous phase9derived from the metal acetylacetonate intervenes between the coated grains5and the ferrite grains7. In the amorphous phase9, a metal element derived from the metal acetylacetonate is contained. In the amorphous phase9, a metal element contained in the ferrite grains7may also be contained. In the method for producing the sintered body10according to this embodiment, the raw material mixture is heated at a temperature of the melting point of the metal acetylacetonate or higher and 350° C. or lower under pressure. Because the heating temperature is not higher than 350° C., the thermal decomposition of the resin constituting the resin layer3can be inhibited. Furthermore, the oxidation of the metal magnetic body constituting the metal magnetic body grains1and/or the reduction of the ferrite constituting the ferrite grains7can also be inhibited, resulting in the prevention of the deterioration in electrical properties caused by the oxidization/reduction. Moreover, the fluid ability of the coated grains5and the ferrite grains7can be increased by means of the liquid medium and/or the fluid (preferably a solvent) derived from the metal acetylacetonate, and therefore it becomes possible to produce a sintered body having a high ferromagnetic substance (including the metal magnetic body grains and the ferrite grains) filling rate and the magnetic permeability of the sintered body can be improved. As mentioned above, the sintered body according to one embodiment of the present invention and the method for producing the sintered body are described. However, the present invention is not limited to this embodiment. EXAMPLES Example 1 This example relates to a sintered body30according to the above-mentioned embodiment with reference toFIG.1. Firstly, coated grains in which each of metal magnetic body grains was coated with a resin layer were prepared. As the metal magnetic body grains, grains having an average grain diameter of 5 μm and composed of Fe-6.5Si (wherein “Fe-6.5Si” was referred to an alloy containing 6.5% by mass of Si with the remainder made up by Fe, as generally understood, and the grains were simply expressed as “Fe-6.5Si grains”, hereinafter) were used. As a resin material for forming a resin layer, polyimide was used. As a raw material for the polyimide, a polyimide varnish in which a polyamic acid was dissolved at a content ratio (relative to the whole amount) of 12% by mass in N-methyl-2-pyrrolidone (also simply referred to as “NMP”, hereinafter) was used. The polyimide varnish and NMP were mixed together at a mass ratio of 1:2 in such a manner that the total mass became 1.596 g to prepare a resin precursor solution. The Fe-6.5Si grains (5 g) was added to the resin precursor solution (1.596 g) (in Table 2, this amount is expressed as “1.6 g” by rough estimation), and the resultant mixture was mixed together by agitation. The resultant mixture was heated on a hot plate at 130° C. to remove an unnecessary liquid material (mainly NMP) by evaporation to dryness. During the drying procedure, agitation was carried out without stopping in order to prevent the separation between the solution and the Fe-6.5Si grains. The dried mixture (granules) was pulverized with a mortar, and the pulverized product was subjected to a heat treatment at 350° C. for 1 hour in a N2 atmosphere (30 L/min.) to cause a polyimdization reaction. By performing the above-mentioned procedure, coated grains in which the polyimide layer was formed on the surface of each of the Fe-6.5Si grains was produced. Subsequently, for the purpose of preparing ferrite grains, the pulverization of a temporality fired ferrite powder was carried out. As the temporality fired ferrite powder, a Ni—Zn—Cu-based temporality fired ferrite powder having a composition: Ni0.75Zn0.07Cu0.18Fe1.65O4±δ(wherein the numerical subscripts mean atomic ratios) was used. The Ni—Zn—Cu-based temporality fired ferrite powder (100 g), PSZ (partially stabilized zirconia) cobbles (2.4 kg) having a nominal diameter of 2 mm, and pure water (600 g) were introduced in a 1-L pot, and were then pulverized with a ball mill at a rotational frequency of 100 to 200 rpm for 113 hours, and the resultant product was heated on a hot plate at 130° C. to evaporate and remove an unnecessary liquid material (water) to dryness. The dried mixture (granules) was pulverized with a mortar to produce ferrite grains. The specific surface area (SSA) of the ferrite grains was 28 m2/g when measured with a specific surface area measurement device “Macsorb” (reregistered tradename, MOUNTECH Co. Ltd.). Finally, the coated grains and the ferrite grains were used to produce a sintered body having a ring-like shape. These grains were weighed in such a manner that the amount of the ferrite grains became a value shown in Table 2 relative to the total mass of the coated grains and the ferrite grains and the total mass of the coated grains and the ferrite grains became 3 g, and were then placed in a mortar. Furthermore, a metal acetylacetonate (0.03 g, i.e., 1% by mass) (relative to the mass of the grain mixture) was added to the mixture (3 g) of the grains, then ion exchange water (0.3 g, i.e., 10% by mass) (relative to the mass of the grain mixture) was added to the mixture, and the resultant mixture was fully mixed with a pestle to prepare a raw material mixture. As the metal acetylacetonate component, Zn(acac)2, Ni(acac)2and Fe(acac)2were used in such a manner that the content ratios (atomic ratios) of Zn, Ni and Fe became the same as those in the ferrite grains (i.e., Zn:Ni:Fe=0.07:0.75:1.65 (atomic ratios)). The raw material mixture thus prepared was filled in a ring-shaped mold (outer diameter: 17 mm, inner diameter: 10 mm) that had been used commonly for pressure molding, and the mixture filled in the mold was sandwiched by upper and lower heating plates of a pressing machine and was then pressurized to 1000 MPa. The raw material mixture was heated by raising the temperature of the upper and lower heating plates that held the raw material mixture filled in the mold to 300° C. After a lapse of 30 minutes under this pressure at this temperature, the heating was completed, then the heated product was air-cooled spontaneously, and then a sintered body produced was removed from the mold when the temperature reached 100° C. or lower. In this manner, a ring-shaped sintered body was produced. A magnetic field of up to 100 kA/m was applied to the sintered body, and the magnetic permeability and the direct-current bias characteristics of the sintered body were evaluated with 4991A Precision Impedance Analyzer (KEYSIGHT TECHNOLOGIES). More specifically, as an evaluation measure for a magnetic permeability (exactly a specific magnetic permeability), a real part μ′(-) of a complex magnetic permeability at 1 MHz without application of no magnetic field was employed; and as an evaluation measure for direct-current bias characteristics, a magnetic field Hsat (A/m) in which the magnetic permeability μ′ decreased by 20% was employed. It can be deemed that, in the measurement range, μ′ is substantially the same as a magnetic permeability (exactly a specific magnetic permeability). The filling rate (% by volume) of the metal magnetic body grains and the thickness of the resin layer in the sintered body were calculated by observing a sectional surface of the sintered body which was cut at a position close to the center of the sintered body and was then polished. More specifically, the filling rate of the metal magnetic body grains was determined by carrying out image analysis in a SEM observation image. The thickness of the resin layer was determined in the following manner. With respect to a single metal magnetic body grain, the thickness of the resin layer was measured at 10 points or more located on the surface of the metal magnetic body grain which were apart from each other at approximately equal intervals, and then the average value of the measurement values was calculated. This procedure was carried out with respect to 5 metal magnetic body grains1in total, and the calculated average values were averaged. As a result, the average thickness of the resin layer was 50 nm. The results of μ′, Hsat and filling rate of the metal magnetic body grains are shown together in Table 2, a graph in which μ′ and Hsat are plotted is shown inFIG.5, and a graph in which μ′ and the filling rate of the metal magnetic body grains are plotted is shown inFIG.6. TABLE 2AmountFilling rateFerriteof resinof metalcontentprecursormagnetic body(% bysolutiongrainsHsatmass)(g)(% by volume)μ′(A/m)Example 1-1131.678445697Example 1-2141.676415395Example 1-3231.668404471Example 1-4241.667384295Example 1-5251.665374391Example 1-6291.661364177Example 1-7351.655334312Example 1-8401.650324372 Example 2 This example also relates to the sintered body30according to the above-mentioned embodiment with reference toFIG.1. In this Example, a sintered body was produced in the same manner as in Example 1, except that the amount of a resin precursor solution to be used was 3.256 g (in Table 3, this amount is expressed as “3.3 g” by rough estimation) in the preparation of coated grains and ferrite grains were contained at a ferrite content shown in Table 3 relative to the total mass of the coated grains and the ferrite grains in the preparation of a raw material mixture, and the sintered body was evaluated. As a result, the average thickness of the resin layer was 100 nm. The results of μ′, Hsat and filling rate of the metal magnetic body grains are shown together in Table 3, a graph in which μ′ and Hsat are plotted is shown inFIG.5, and a graph in which μ′ and the filling rate of the metal magnetic body grains are plotted is shown inFIG.6. TABLE 3AmountFilling rateFerriteof resinof metalcontentprecursormagnetic body(% bysolutiongrainsHsatmass)(g)(% by volume)μ′(A/m)Example 2-1103.3782813766Example 2-2123.3762511524Example 2-3203.368278568Example 2-4213.367268188Example 2-5223.365257767Example 2-6273.361247075Example 2-7333.355236867Example 2-8383.350236571 Example 3 This example also relates to the sintered body30according to the above-mentioned embodiment with reference toFIG.1. In this Example, a sintered body was produced in the same manner as in Example 1, except that the amount of a resin precursor solution to be used was 4.982 g (in Table 4, this amount is expressed as “5.0 g” by rough estimation) in the preparation of coated grains and ferrite grains were contained at a ferrite content shown in Table 4 relative to the total mass of the coated grains and the ferrite grains in the preparation of a raw material mixture, and the sintered body was evaluated. As a result, the average thickness of the resin layer was 150 nm. The results of μ′, Hsat and filling rate of the metal magnetic body grains are shown together in Table 4, a graph in which μ′ and Hsat are plotted is shown inFIG.5, and a graph in which μ′ and the filling rate of the metal magnetic body grains are plotted is shown inFIG.6. TABLE 4AmountFilling rateFerriteof resinof metalcontentprecursormagnetic body(% bysolutiongrainsHsatmass)(g)(% by volume)μ′(A/m)Example 3-17.65.0782222811Example 3-29.15.0762021781Example 3-3185.0682212435Example 3-4185.0672112054Example 3-5205.0652011075Example 3-6245.061189546Example 3-7305.055188603Example 3-8365.050188348 Comparative Example 1 This Comparative Example relates to a sintered body30composed of metal magnetic body grains21which were not coated with a resin layer, ferrite grains27and an amorphous phase29which was located between these grains, as shown inFIG.2. In this Comparative Example, a sintered body was produced in the same manner as in Example 1, except that coated grains were not prepared (i.e., the amount of a resin precursor solution was 0 g), Fe-6.5Si grains were used in place of coated grains, ferrite grains were contained at a ferrite content shown in Table 5 relative to the total mass of the Fe-6.5Si grains and the ferrite grains in the preparation of a raw material mixture, and the sintered body was evaluated. The results of μ′, Hsat and filling rate of the metal magnetic body grains are shown together in Table 5, and a graph in which μ′ and Hsat are plotted is shown inFIG.5. TABLE 5AmountFilling rateFerriteof resinof metalcontentprecursormagnetic body(% bysolutiongrainsHsatmass)(g)(% by volume)μ′(A/m)Comparative18077284150Example 1-1Comparative25068200300Example 1-2Comparative26067173418Example 1-3Comparative28065150611Example 1-4Comparative32061110920Example 1-5Comparative37055871311Example 1-6Comparative42050731572Example 1-7 Comparative Example 2 This Comparative Example relates to a sintered body31composed of metal magnetic body grains21which are not coated with a resin layer and a resin phase23which is located between these grains, as shown inFIG.3. In this Comparative Example, the sintered body was produced in the same manner as in Example 1, except that the amount of a resin precursor solution to be used was adjusted to a value shown in Table 6 in the preparation of coated grains and the resultant coated grains were filled in a ring-shaped mold (outer diameter: 17 mm, inner diameter: 10 mm) that had been used commonly in pressure molding, and the sintered body was evaluated. The results of μ′, Hsat and filling rate of the metal magnetic body grains are shown together in Table 6, a graph in which μ′ and Hsat are plotted is shown inFIG.5, and a graph in which μ′ and the filling rate of the metal magnetic body grains are plotted is shown inFIG.6. TABLE 6AmountFilling rateFerriteof resinof metalcontentprecursormagnetic body(% bysolutiongrainsHsatmass)(g)(% by volume)μ′(A/m)Comparative07.8771917060Example 2-1Comparative012681526124Example 2-2Comparative013671336108Example 2-3Comparative014651140978Example 2-4Comparative017618.257323Example 2-5Comparative021556.667376Example 2-6Comparative026505.673815Example 2-7 Comparative Example 3 This Comparative Example relates to a sintered body32composed of coated grains25in which metal magnetic body grains21are coated with a ferrite layer24and a resin phase23which is located between these grains, as shown inFIG.4. In this Comparative Example, firstly ferrite grains were prepared in the same manner as in Example 1. Subsequently, these grains were weighed in such a manner that the amount of the ferrite grains became a ferrite content shown in Table 7 relative to the total mass of the ferrite grains and the Fe-6.5Si grains, and were then mixed together in a mortar. The resultant mixture was subjected to a dry-mode complexing treatment using NOBILTA MINI (Hosokawa Micron Corporation) to produce ferrite-coated grains in which the Fe-6.5Si grains were coated with a ferrite layer (of which the composition corresponded to that of the ferrite grains). The target thickness of the ferrite layer was 100 nm. Subsequently, the ferrite-coated grains were coated with a resin layer in the same manner as in Example 1, except that the ferrite-coated grains were used in place of the Fe-6.5Si grains and the amount of a resin precursor solution to be used was an amount shown in Table 7. Finally, the resultant grains were filled in a ring-shaped mold (outer diameter: 17 mm, inner diameter: 10 mm) that had been used commonly in pressure molding, and the subsequent procedures were carried out in the same manner as in Example 1. In this manner, a sintered body was produced and was then evaluated. As mentioned above, the target thickness of the ferrite layer was 100 nm. The results of μ′, Hsat and filling rate of the metal magnetic body grains are shown together in Table 7, and a graph in which μ′ and Hsat are plotted is shown inFIG.5. TABLE 7AmountFilling rateFerriteof resinof metalcontentprecursormagnetic body(% bysolutiongrainsHsatmass )(g)(% by volume)μ′(A/m)Comparative7.5106436490Example 3-1Comparative7.5116224773Example 3-2Comparative7.51261146425Example 3-3 As is found fromFIG.5and Tables 2 to 4, each of the sintered bodies of Examples 1 to 3 showed a high Hsat value of 4000 A/m or more and a high μ′ value of 15 or more. Particularly, the μ′ value was decreased but the Hsat value was improved in the sintered body of Example 2, and the μ′ value was decreased but the Hsat value was further improved in the sintered body of Example 3, both compared with the sintered body of Example 1. This is considered to be because the average thickness of the resin layer was increased in order of Example 1, Example 2, and Example 3. As is found fromFIG.5and Tables 2 to 5, each of the sintered bodies of Examples 1 to 3 showed a high Hsat value compared with that of the sintered body of Comparative Example 1. This is considered to be because: in the sintered bodies of Examples 1 to 3, a resin was introduced as a non-magnetic gap between the metal magnetic body and the ferrite and, as a result, the direct-current magnetic field generated in the ferrite was reduced and the direct-current bias characteristics was improved; in contrast, in the sintered body of Comparative Example 1, the resin was not introduced and therefore the above-mentioned effects could not be achieved. As is found fromFIG.5and Tables 2 to 4 and 6, each of the sintered bodies of Examples 1 to 3 showed a high μ′ value at the same Hsat value compared with that of the sintered body of Comparative Example 3 (summarily, in the graphs shown inFIG.5, points obtained by plotting the Hat values and μ′ values of the sintered bodies of Examples 1 to 3 were located at upper right positions compared with points obtained by plotting the Hat values and μ′ values of the sintered body of Comparative Example 3). This is considered to be because: in the sintered bodies of Examples 1 to 3, a resin was introduced as a non-magnetic gap between the metal magnetic body and the ferrite and, as a result, the direct-current magnetic field generated in the ferrite was reduced and the direct-current bias characteristics was improved; in contrast, in the sintered body of Comparative Example 3, the resin was introduce but a ferrite was present between the metal magnetic body and the resin and, therefore, the metal magnetic body and the ferrite directly came in contact with each other and a direct-current magnetic field was generated as the result of the magnetization of the metal magnetic body. As is found fromFIG.6and Tables 2 to 5, each of the sintered bodies of Examples 1 to 2 was improved in μ′ values against the filling rates of the metal magnetic body grains (at a higher filling rate of the metal magnetic body grains of, e.g., 76% by volume or more) compared with the sintered body of Comparative Example 2. This is considered to be because: in the sintered bodies of Examples 1 to 2, ferrite grains having a smaller average grain diameter were introduced at a high density between the coated grains in which the metal magnetic body grains were coated with the resin layer and, as a result, the μ′ value was improved due to the ferrite that was a ferromagnetic body; in contrast, in the sintered body of Comparative Example 2, a ferrite that was a ferromagnetic body was not introduced and, therefore, the above-mentioned effect was not achieved. As is found fromFIG.6and Tables 4 to 5, the sintered body of Example 3 did not show any advantageous μ′ improvement effect at a metal magnetic body grains filling rate of 76% by volume or more compared with the sintered body of Comparative Example 2. This is considered to be because, in the sintered body of Example 3, the average thickness of the resin layer was large (150 nm) and, therefore, the ferrite grains could not be introduced at a satisfactorily high density between the coated grains in which the metal magnetic body grains were coated with the resin layer. In each of the sintered bodies of Examples 1 to 3, coated grains in which the metal magnetic body grains were coated with a resin layer in advance were used in the production process for the sintered bodies. Therefore, it became possible to prevent the direct contact between the metal magnetic body grains during sintering, and the increase in specific resistance and the reduction in eddy current loss could be expected. Furthermore, it was also considered that the resin layer was present between the metal magnetic body grains and the ferrite grains and, as a result, an interaction between the metal magnetic body and the ferrite (e.g., the oxidization of the metal magnetic body and the reduction of the ferrite) could be inhibited, resulting in the prevention of the deterioration in μ′. Moreover, in each of the sintered bodes of Examples 1 to 3, the raw material mixture was heated at a temperature of the melting point of the metal acetylacetonate or higher and 350° C. or lower under pressure in the production process for the sintered bodies. It was considered that, due to this low-temperature sintering, the increase in density of the sintered body could be achieved while preventing the thermal decomposition of the resin. It was also considered that, due to this low-temperature sintering, the increase in density in the sintered body could be achieved and the deterioration in μ′ could be prevented while inhibiting the oxidization of the metal magnetic body and/or the reduction of the ferrite. It was also considered that, due to this low-temperature sintering, the fluid ability of the metal magnetic body grains and the ferrite grains were improved by means of a liquid medium and/or a fluid derived from the metal acetylacetonate (in this example, water that served as a solvent) and, as a result, a sintered body having a high ferromagnetic substance (including the metal magnetic body grains and the ferrite grains) filling rate was produced and the magnetic permeability of the sintered body was improved. The sintered body of the present invention can be used as a sintered magnetic component in various electromagnetic apparatuses/devices including an inductor, a trans and a coil. In particular, the sintered body of the present invention can be used suitably as, but is not limited to, a core material in a power inductor. DESCRIPTION OF REFERENCE SYMBOLS 1: Metal magnetic body grain3: Resin layer5: Coated grain7: Ferrite grain9: Amorphous phase10: Sintered body21: Metal magnetic body grain23: Resin layer24: Ferrite layer25: Coated grain27: Ferrite grain29: Amorphous phase30,31,32: Sintered body61: Metal magnetic powder (metal magnetic body grain)63: Ferrite layer (ferrite phase)70: Sintered body | 50,431 |
11942269 | DETAILED DESCRIPTION With reference now to the drawings, and in particular toFIGS.1through12thereof, a new security assembly for a security system embodying the principles and concepts of the disclosed subject matter will be described. In a broad sense, the disclosure relates to a system1may be employed to provide some aspect of security for an object2. In some implementations, aspects of the system1may include, or be used in conjunction with, a security apparatus10configured for providing a security platform for alarm elements to facilitate implementation of security alerting features for a space, such as a space in or adjacent to a building structure. Illustratively, the security apparatus10may be associated with the building structure, such as being positioned in the building structure. In some illustrative embodiments, the security apparatus10may include an alerting mechanism12configured to produce an alert perceptible by a person so that the person is able to understand that some condition relating to the security of the object has occurred. The perceptible alert may comprise an audible alert, a visible alert, and/or a tactile alert, or an alert that is transmitted to a device associated with a person, for example, a cellular telephone with processing capabilities, such as a “smartphone.” The security apparatus10may also include a signal receiving mechanism14configured to wirelessly receive an alerting signal which may be processed by the apparatus10, and receipt of the alerting signal may result in the triggering or activation of the alerting mechanism12of the apparatus10. The security apparatus10may have additional features, such as those typical of a building security system, Embodiments of the system1may include a security assembly20for providing an aspect of security for the object2. The security assembly20may comprise at least two components, which may include a first component22and a second component24. In some embodiments, the first component22may be associated with the object2to be secured, and the second component24may have an alarm interface which is wirelessly interfaced to an external system, such as the signal receiving mechanism14of the security apparatus10. In some implementations, the second component24may be secured to an immovable object or structure for the purpose of securing the object2to the immovable object. Illustratively, the object2may include devices having various purposes, such as communication devices and computing devices, and/or security devices for providing security to another device, such as a padlock or a gun trigger lock. The first22and second24components may be engageable together or with each other, and the components22,24may have an engaged condition and a disengaged condition. The engaged condition of the components22,24may be characterized by the first and second components being abutted against each other, or otherwise being in contact with each other. The disengaged condition may be characterized by the first and second components being separated or spaced from each other, and may also be characterized by there being no contact between the components. The first22and second24components may thus be separated from each other when changing from the engaged condition to the disengaged condition. In embodiments, the security assembly20may be configured to utilize a physical manipulation aspect and a magnetic interaction aspect between the components22,24. The magnetic interaction aspect of the components may be configured to hold the first22and second24components together by a magnetic attraction force which helps produce the engaged condition of the components and that permits separation of the components in the engaged condition into the disengaged condition. The securement of the components22,24may thus be accomplished by magnetic attraction between the components, and the magnetic securement may occur without the magnetic interaction providing any communication between the components. The first22and second24components may be separable from the engaged condition to the disengaged condition by application of physical force to the components that overcomes the magnetic attraction force between the first and second components. The application of physical force to overcome the magnetic attraction may be characterized by the force having a magnitude appliable to the components by the hands of a human. The engaged condition may further be characterized by there being no physical or mechanical interconnection between the components that needs to be overcome or manipulated to move the components from the engaged to the disengaged condition. In greater detail, the magnetic interaction aspect of the components22,24of the security assembly may be implemented by at least one of the first and second components incorporating a magnetically-active element30and the other (or another) one of the first and second components incorporating a magnetically-receptive element32so that the components22,24are magnetically attracted toward each other. Optionally, each (or both) of the first and second components may incorporate magnetically-attractive elements. The physical manipulation aspect of the components of the security assembly may include a protrusion40on the first component22of the security assembly20. In some embodiments, the protrusion40may extend from the first component22, and may be fixed in position with respect to other parts of the first component. In some embodiments, the protrusion40may be extendable with respect to other parts of the first component22, and the protrusion may be movable with respect to the other parts of the first component to an extended position from a retracted position, and may be movable from the extended to retracted positions. The physical manipulation aspect of the security assembly may also include a recess42on the second component24of the security assembly, and the recess42may be configured to receive at least a portion of the protrusion40of the first component22when the first and second components are in the engaged condition. In some embodiments, the recess42of the second component includes a plunger44movable. or capable of being moved, by the protrusion40of the first component22when the first and second components are in the engaged condition. In some implementations, the plunger44may be depressed by the protrusion40when the first and second components are brought into the engaged condition. In some implementations, the plunger44may be depressed by movement of the protrusion40from the retracted position to the extended position when the first and second components are in the engaged condition (see, e.g.,FIGS.12A and12B). In some embodiments, the plunger44may be connected to an electrical switch48in a manner such that movement of the plunger actuates or operates the switch. The switch48may be actuatable between an actuated condition and an unactuated condition. Illustratively, the actuated condition of the switch48may be a “closed” (or continuity) condition of the switch, and the unactuated condition may be an “open” (or non-continuity) condition of the switch. Illustratively,FIG.12Ashows the protrusion40of the first component22in the retracted position, whileFIG.12Bshows a protrusion40of the first component in the extended position. Correspondingly,FIG.12Aillustrates the retracted protrusion40being withdrawn from contact with the plunger44such that the plunger and the switch48are in the unactuated condition, andFIG.12Billustrates the extended protrusion40in contact with the plunger44such that the plunger is depressed and the plunger and the switch48are in the actuated condition. Optionally, additional features may facilitate positioning of the first22and second24components with respect to each other when the components are in the engaged condition to assist in the bringing together of the components to establish the engaged condition and also assist in the maintenance of the proper positioning of the components in the engaged condition. In embodiments, such as those depicted inFIGS.6and7, physical features on the surface of the components22,24may produce a degree of interlock between the exteriors of the components to help maintain the components in the engaged condition. For example, one or more concentric ridges46may be formed on one of the components that are substantially complementary in configuration to one or more concentric grooves47formed on the other of the components, and optionally each component may include one or more ridges46and one or more grooves47positioned with respect to each other to intermesh with each other when the components are in the engaged condition. The security assembly30may include an alarm interface50associated with one of the components and configured to send an alerting signal to the security apparatus. In embodiments, the alarm interface50may be located on the second component24. The alarm interface50may be configured to send the alerting signal wirelessly to the security apparatus10, and the alarm interface50may include a wireless transmitter52configured to send the alerting signal to the security apparatus. Illustratively, the closed or continuity condition of the switch48may cause the alarm interface50to send the alerting signal to the security apparatus. In some implementations, the alarm interface50may be configured to send the alerting signal when the first22and24second components are moved from the engaged condition to the disengaged condition, unless the alarm interface is disarmed prior to disengagement. This operation may provide an alert or notification that the first and second components, and the items to which the components are respectively connected, are being moved with respect to each other. In some implementations, the alarm interface50may be configured to send the alerting signal when the first and second components are moved from the disengaged condition to the engaged condition, which may provide a notification that the components have been linked together. The alarm interface50may be configured to send the alerting signal when the protrusion40of the first component22moves from the retracted position to the extended position, and in turn the protrusion actuates the switch48of the second component24between the unactuated and actuated conditions. In some implementations, the alarm interface50may be configured to send the alerting signal when the condition or state of the switch48is changed. As an example, the alarm interface50may be configured to send the alerting signal when the condition of the switch changes from the closed condition to the open condition, and as a further example, the alarm interface50may be configured to send the alerting signal when the condition of the switch changes from the open condition to the closed condition. In some implementations, the alarm interface50may be configured to send the alerting signal when one type of condition change is detected, but does not send the alerting signal when another type of condition change is detected. As an example, the alarm interface50may be configured to send the alerting signal when the condition of the switch changes from the closed condition to the open condition, but not send the alerting signal when the condition of the switch changes from the open condition to the closed condition. In some applications of the system1, the object2may incorporate a lock mechanism60with a locking element62which is movable when the lock mechanism changes from a locked condition of the lock mechanism to an unlocked condition of the lock mechanism. Illustratively, the lock mechanism60may include a lock cylinder, and the locking element62may comprise an extension of the plug of the lock cylinder. The locking element may be movable by the changing of the lock mechanism between the locked and unlocked condition. The locking element62may be suitably connected to the protrusion40such that movement of the locking element62functions to move the protrusion between the retracted and extended positions, with the resulting actuation of the alarm interface described herein. In other applications of the system1, other elements of an object2may be utilized to act on the protrusion40to move the protrusion between the retracted and extended conditions. For example, the action on the protrusion40may be the result of electromechanical operation, such as a solenoid, that is initiated by actuation of, for example, a biometric scanner associated with the object, or actuation of a keypad associated with the object. In other applications of the system1, the object2may incorporate a connector element66, and the element66may be a part of a data connector structure (see, for example,FIG.8). For example, the connector element66may be a part of a power connector structure, and the element66may comprise a connector jack, such as, for example, a universal serial bus (USB) jack. The connector jack may have a connected condition, in which a connector plug is inserted into the connector jack, and a disconnected condition, in which the connector plug is removed from the connector jack. In such an application, the security assembly20may additionally comprise an actuating member68at least partially positioned in a cavity of the connector jack such that insertion of a connector plug into the connector jack contacts and moves the actuating member68. The actuating member68may be configured to move the protrusion40between the retracted and extended conditions when the connector plug is inserted into or removed from the connector plug. Such an implementation may be capable of providing an alert when the condition of the connector element changes, such as, for example, the unplugging of a USB plug from a USB jack. In some implementations, the security assembly20may include additional sensors or actuating mechanisms, such as an auxiliary trip sensor70which may be actuated by the presence of a magnetic field within a range of the sensor, such as the range of the magnetic field of the magnetic source. The auxiliary trip sensor70may be triggered into a trigger condition by the sensor70being in, or moved into, a magnetic field and may be released into an untriggered condition by the sensor70being outside of, or being moved out of, the magnetic field. In an exemplary embodiment, the auxiliary trip sensor70may be incorporated into the component22,24that does not include the magnetically-active element30so that when the components22,24are moved toward each other and toward the engaged condition, the trip sensor70is triggered into the triggered condition. Conversely, the movement of the components22,24away from each other and out of the engaged condition, the trip sensor70may be released into the untriggered condition. An illustrative example of a highly suitable sensor70is available from Magnasphere Corp., N22 W22931 Nancys Ct. Ste 3, Waukesha, WI 53186 USA. Optionally, the auxiliary trip sensor70may be connected to the alarm interface50such that the trigger condition may cause the alarm interface to send the alerting signal. It should be appreciated that in the foregoing description and appended claims, that the terms “substantially” and “approximately,” when used to modify another term, mean “for the most part” or “being largely but not wholly or completely that which is specified” by the modified term. It should also be appreciated from the foregoing description that, except when mutually exclusive, the features of the various embodiments described herein may be combined with features of other embodiments as desired while remaining within the intended scope of the disclosure. Further, those skilled in the art will appreciate that steps set forth in the description and/or shown in the drawing figures may be altered in a variety of ways. For example, the order of the steps may be rearranged, substeps may be performed in parallel, shown steps may be omitted, or other steps may be included, etc. In this document, the terms “a” or “an” are used, as is common in patent documents, to include one or more than one, independent of any other instances or usages of “at least one” or “one or more.” In this document, the term “or” is used to refer to a nonexclusive or, such that “A or B” includes “A but not B,” “B but not A,” and “A and B,” unless otherwise indicated. With respect to the above description then, it is to be realized that the optimum dimensional relationships for the parts of the disclosed embodiments and implementations, to include variations in size, materials, shape, form, function and manner of operation, assembly and use, are deemed readily apparent and obvious to one skilled in the art in light of the foregoing disclosure, and all equivalent relationships to those illustrated in the drawings and described in the specification are intended to be encompassed by the present disclosure. Therefore, the foregoing is considered as illustrative only of the principles of the disclosure. Further, since numerous modifications and changes will readily occur to those skilled in the art, it is not desired to limit the disclosed subject matter to the exact construction and operation shown and described, and accordingly, all suitable modifications and equivalents may be resorted to that fall within the scope of the claims. | 17,397 |
11942270 | DETAILED DESCRIPTION Hereinafter, the features of the present invention will be specifically described with reference to exemplary embodiments. FIRST EXEMPLARY EMBODIMENT FIG.1is a perspective view schematically illustrating a configuration of an electricity storage device100according to a first exemplary embodiment.FIG.2is a schematic sectional view taken along a line II-II of the electricity storage device100illustrated inFIG.1.FIG.3is a schematic sectional view taken along a line III-III of the electricity storage device100illustrated inFIG.1. InFIGS.1to3, a symbol L indicates a length direction, a symbol W indicates a width direction, and a symbol T indicates a thickness direction (e.g., a laminating direction of internal electrodes). In this disclosure, it is assumed that the electricity storage device100is an electric double layer capacitor. However, it is noted that the electricity storage device100is not limited to the electric double layer capacitor, and can be various electricity storage devices, such as a lithium ion capacitor, a redox capacitor, an aluminum electrolytic capacitor, and a lithium ion secondary battery. The electricity storage device100can be used for various purposes such as communication devices. As shown, the electricity storage device100includes an internal element10, a first end surface electrode1, and a second end surface electrode2. The electricity storage device100in the present embodiment further includes an outer layer15. In the exemplary aspect, the internal element10can be an electric double layer capacitor element. The internal element10has a substantially rectangular parallelepiped shape. Specifically, the internal element10has a first end surface10aand a second end surface10bfacing in the length direction L, a first main surface10cand a second main surface10dfacing in the thickness direction T, and a first side surface10eand a second side surface10ffacing in the width direction W. The first end surface10aand the second end surface10bextend along the width direction W and the thickness direction T. The first main surface10cand the second main surface10dextend along the length direction L and the width direction W. The first side surface10eand the second side surface10fextend along the length direction L and the thickness direction T. In general, the “rectangular parallelepiped” according to an exemplary aspect includes a rectangular parallelepiped having chamfered or rounded corners and ridges. Each of the corners is a portion where three surfaces of the internal element10intersect with one another, and each of the ridges is a portion where two surfaces of the internal element10intersect with each other. The internal element10includes a first internal electrode11, a second internal electrode12, a separator layer13, and an electrolytic solution. Further, the internal element10in the present embodiment further includes an insulating layer14. The first internal electrodes11and the second internal electrodes12are alternately laminated in a plurality of layers with the separator layer13interposed therebetween. In other words, the plurality of the first internal electrodes11and the plurality of the second internal electrodes12are alternately laminated with the separator layer13interposed therebetween. As further shown, the first internal electrode11has a first current collector11aand a first active material layer11bprovided on both sides of the first current collector11a.However, when the first internal electrode11is located on the outermost side in the thickness direction T, the first active material layer11bmay be provided only on at least an inner side surface in the thickness direction T, of the first current collector11aof the first internal electrode11located on the outermost side. Moreover, the first current collector11aand the first active material layer11bare joined to each other. While the first internal electrode11is drawn out to the first end surface10aof the internal element10, the first internal electrode11is not drawn out to the second end surface10b,the first side surface10e,and the second side surface10f.Further, on the side of the first end surface10a,the first active material layer11bfaces the insulating layer14with the separator layer13interposed therebetween. However, when the first internal electrode11is located on the outermost side in the thickness direction T, a portion where the first active material layer11bfaces the insulating layer14may be removed. The second internal electrode12has a second current collector12aand a second active material layer12bprovided on both sides of the second current collector12a. However, when the second internal electrode12is located on the outermost side in the thickness direction T, the second active material layer12bmay be provided only on at least an inner side surface in the thickness direction T, of the second current collector12aof the second internal electrode12located on the outermost side. Moreover, the second current collector12aand the second active material layer12bare joined to each other. While the second internal electrode12is drawn out to the second end surface10bof the internal element10, the second internal electrode12is not drawn out to the first end surface10a,the first side surface10e,and the second side surface10f.Further, on the side of the second end surface10b,the second active material layer12bfaces the insulating layer14with the separator layer13interposed therebetween. However, when the second internal electrode12is located on the outermost side in the thickness direction T, a portion where the second active material layer12bfaces the insulating layer14may be removed. According to an exemplary aspect, the first current collector11aand the second current collector12aare sintered bodies of metal particles such as Al particles, Cu particles, and Ni particles. More specifically, the first current collector11aand the second current collector12aare sintered or necked structures after the process of sintering metal particles such as Al particles, Cu particles, and Ni particles, and have conductivity as a whole. In the exemplary aspect, the first active material layer11band the second active material layer12bcontain active material particles and an inorganic filler composed of an inorganic substance. For example, a carbon material such as activated carbon may be used as the active material. The inorganic filler is added to maintain the structure, and for example, carbon nanotubes and carbon nanofibers may be used. When the electricity storage device100is a lithium ion secondary battery, a substance configured for storing and releasing lithium ions is used as the active material contained in the first active material layer11band the second active material layer12b.For example, as the positive electrode active material, lithium oxides such as lithium cobaltite, lithium nickelate, lithium manganate, and lithium iron phosphate may be used. Further, as the negative electrode active material, carbon such as graphite, lithium titanate, and silicon oxide may be used. In each of the first current collector11aand the second current collector12a,metal particles made of Al may be used as the positive electrode current collector, and metal particles made of Cu may be used as the negative electrode current collector. In addition, when the electricity storage device100is a lithium ion secondary battery, it is preferable that the outer edge of the positive electrode active material is arranged inside the outer edge of the negative electrode active material in plane directions defined by the length direction L and the width direction W. Such configuration prevents precipitation of Li ions and short-circuiting at the outer edge of the negative electrode active material. When the electricity storage device100is an aluminum electrolytic capacitor, at least one of the first current collector11aand the second current collector12ais a sintered body of Al particles. A chemical conversion treatment is performed on the surface of the sintered body to form an oxide film, so that it is possible to allow the oxide film to function as a dielectric layer. A general-purpose method may be used for the chemical conversion treatment, and an oxide film to be a dielectric layer can be formed by applying a DC voltage in a water bath of ammonium phosphate, ammonium adipate or the like. It is preferable that the oxide film is washed with pure water or the like after chemical conversion. As further shown, the separator layer13is provided between the first active material layer11bof the first internal electrode11and the second active material layer12bof the second internal electrode12. The separator layer13is a porous body provided with a plurality of pores in which ions contained in the electrolytic solution can move between the first active material layer11band the second active material layer12b. In general, it is noted that the type of electrolytic solution is not particularly limited, and examples thereof include an ionic liquid such as EMITFSI (1-ethyl-3-methylimidazolium bis (trifluoromethanesulfonyl) imide) or EMIBF4 (1-ethyl-3-methylimidazolium tetrafluoroborate), or a solution obtained by dissolving the ionic liquid in an organic solvent such as propylene carbonate or acetonitrile. Moreover, the electricity storage device100can be a lithium ion secondary battery and a known electrolytic solution may be used. For example, a solution obtained by dissolving a Li salt such as LiPF6or LiBF4in a solvent, such as propylene carbonate or ethylene carbonate, can be used as the electrolytic solution. In addition, there are no particular restrictions when the electricity storage device100is an aluminum electrolytic capacitor, and a known electrolytic solution may be used. For example, a solvent obtained by dissolving an ammonium salt of an organic acid such as phthalic acid or adipic acid or an inorganic acid such as boric acid or phosphoric acid in a solvent such as ethylene glycol or γ-butyl lactone may be used as the electrolytic solution. Moreover, in an exemplary aspect, the separator layer13is a sintered body formed from a material containing at least one of a ceramic material containing at least one selected from the group consisting of oxides, nitrides, and carbides, and a glass material as an amorphous solid. The separator layer13may further contain an inorganic filler or the like. The number of layers when the structure in which the separator layer13is sandwiched between the first internal electrode11and the second internal electrode12is defined as one layer can be any number. In other words, one layer may be formed or a plurality of layers of two or more layers may be formed. As further shown, the insulating layer14is provided in a region that is not in contact with the first internal electrode11and the second internal electrode12, on each side of the separator layer13, in order to eliminate bumps. Specifically, the insulating layer14with the same thickness as that of the first internal electrode11is provided in a region not in contact with the first internal electrode11, on the surface that is in contact with the first internal electrode11, on each side of the separator layer13. Further, the insulating layer14with the same thickness as that of the second internal electrode12is provided in a region not in contact with the second internal electrode12, on the surface that is in contact with the second internal electrode12, on each side of the separator layer13. The insulating layer14is provided to suppress the occurrence of the above-mentioned bumps, and for example, suppress curving of the ends of the first internal electrode11and the ends of the second internal electrode12during pressing in the manufacturing process. It is also noted that the insulating layer14is not particularly limited as long as it is formed of an insulating material, and is, for example, a sintered body formed from a material containing at least one of a ceramic material containing at least one selected from the group consisting of oxides, nitrides, and carbides, and a glass material as an amorphous solid. The insulating layer14may further contain an inorganic filler or the like. The first internal electrode11, the second internal electrode12, the separator layer13, and the insulating layer14mentioned above have a structure through which the electrolytic solution permeates. Further, in the present embodiment, an outer layer15is provided to protect both outsides of the internal element10in the thickness direction T and both outsides of the internal element10in the width direction W, i.e., the first main surface10c,the second main surface10d,the first side surface10e,and the second side surface10fof the internal element10. The outer layer15is a sintered body formed from a material containing at least one of a ceramic material containing at least one selected from the group consisting of oxides, nitrides, and carbides, and a glass material as an amorphous solid. For example, Al2O3may be used as the ceramic material. The outer layer15has a structure having high airtightness, and is configured so that moisture does not enter from the outside and the electrolytic solution does not leak to the outside of the internal element10. The separator layer13, the insulating layer14, and the outer layer15are sintered bodies formed from a material containing at least one of a ceramic material containing at least one selected from the group consisting of oxides, nitrides, and carbides, and a glass material as an amorphous solid. For example, the content of the glass material is adjusted, so that the separator layer13has a structure that allows the electrolytic solution to permeate, and the outer layer15has a structure that does not allow the electrolytic solution to permeate. As illustrated inFIG.2, the outer layer15is provided with an injection port16for injecting an electrolytic solution. In the present embodiment, one injection port16is provided at the center of the outer layer15located on one of the outsides in the thickness direction T. However, the position where the injection port16is provided is not limited to the above-mentioned position, and the injection port16may be provided on the outer layer15located outside in the width direction W, for example. Further, the configuration may be such that two or more injection ports16are provided. Moreover, the injection port16is sealed by a sealing member17. The constituent material of the sealing member17is not particularly limited as long as the intrusion of moisture from the outside and the permeation of the electrolytic solution from the inside are suppressed. Since it is desirable to have high airtightness and high liquid tightness, it is preferable to use a metal or glass material as the sealing member17. For example, the injection port16can be sealed by metallizing the periphery of the injection port of the outer layer15and joining a metal plate with a brazing material, such as silver or tin, by heating or welding. However, it is noted that the sealing member17is not limited to a metal plate, and can be a plate-like material made of a material other than metal, such as a glass plate, or may be a member such as a resin provided so as to close the injection port16. When a resin is used, for example, an epoxy resin may be used. Moreover, the first end surface electrode1is provided on the first end surface10aof the internal element10, and is electrically connected to a plurality of first internal electrodes11drawn out to the first end surface10a.In the present embodiment, the first end surface electrode1is provided on the entire first end surface10aof the internal element10and is provided so as to wrap around sides of the first main surface10c,the second main surface10d,the first side surface10e,and the second side surface10fof the internal element10, in a manner of covering a part of the outer layer15. Similarly, the second end surface electrode2is provided on the second end surface10bof the internal element10, and is electrically connected to a plurality of second internal electrodes12drawn out to the second end surface10b.In the present embodiment, the second end surface electrode2is provided on the entire second end surface10bof the internal element10, and is provided so as to wrap around sides of the first main surface10c,the second main surface10d,the first side surface10e,and the second side surface10fof the internal element10, in a manner of covering a part of the outer layer15. The first end surface electrode1and the second end surface electrode2are a composite of metal particles and glass as an amorphous solid. The metal particles are, for example, Al particles, Cu particles, or Ni particles. Moreover, the metal particles contained in the first end surface electrode1and the second end surface electrode2are sintered or necked after the sintering process, and have conductivity as a whole. Further, the first end surface electrode1and the second end surface electrode2have a structure having high airtightness, and can be configured, for example, by adjusting the content of the glass material. Moreover, in an exemplary aspect, the surfaces of the first end surface electrode1and the second end surface electrode2may be plated, if necessary. For example, Ni plating may be applied, and then Zn plating may be applied on the Ni plating. As an example of the size, the dimensions of the electricity storage device100in the length direction L, in the width direction W, and in the thickness direction T are 7.3 mm, 4.3 mm, and 2.0 mm, respectively. In that case, the thickness of the outer layer15is 0.5 mm, the thicknesses of the first end surface electrode1and the second end surface electrode2are 0.1 mm, the thicknesses of the first current collector11aand the second current collector12aare 5 μm, the thicknesses of the first active material layer11band the second active material layer12bare 30 μm, and the thickness of the separator layer13is 15 μm; and the number of layers when the structure in which the separator layer13is sandwiched between the first internal electrode11and the second internal electrode12is defined as one layer can be ten. The capacity of the electricity storage device100is, for example, 90 mF. In the electricity storage device100according to the present embodiment, a sintered body is formed by integrally sintering the first internal electrode11, the second internal electrode12, the separator layer13, the insulating layer14, the outer layer15, the first end surface electrode1, and the second end surface electrode2. The integrally sintered body is a structure formed by pressure-molding particles of materials for the first internal electrode11, the second internal electrode12, the separator layer13, the insulating layer14, the outer layer15, the first end surface electrode1, and the second end surface electrode2so as to be a desired structure, and heat-treating the resultant product so that at least some of these particles are bonded to each other and integrated. According to this configuration, no organic substance is contained in the first internal electrode11, the second internal electrode12, the separator layer13, the insulating layer14, the outer layer15, the first end surface electrode1, and the second end surface electrode2. Therefore, the thermal decomposition and structural change of the organic substance can be reduced during reflow mounting, and desired characteristics can be obtained after reflow mounting. In order to reduce the thermal decomposition and structural change of the organic substance during reflow mounting, it is preferable that no organic substance is contained in the first internal electrode11, the second internal electrode12, the separator layer13, the insulating layer14, the outer layer15, the first end surface electrode1, and the second end surface electrode2, but it should be appreciated that this does not preclude a configuration in which an organic substance is contained to the extent that the characteristics of the electricity storage device100are not affected. Further, since the electricity storage device100in the present embodiment includes an electrolytic solution inside, the ion conductivity is high and the interfacial resistance of the electrode is low as compared with an electricity storage device having a solid electrolyte, so that a higher output can be obtained. Further, the electricity storage device100in the present embodiment has a structure in which there is no void among the outer layer15, the first internal electrode11, the second internal electrode12, the separator layer13, and the insulating layer14. Therefore, the size of the internal element10with respect to the total size can be increased to increase the capacity and output per volume. (Method of Producing Electricity Storage Device) An example of a method of producing the electricity storage device100having the above-mentioned configuration will be described. A paste containing a material for forming the separator layer13, a paste containing a material for forming the first active material layer11b(and the second active material layer12b), a paste containing a material for forming first current collector11a(and the second current collector12a), a paste containing a material for forming the first active material layer11b(and the second active material layer12b) are sequentially applied onto a carrier film. In addition, a paste containing a material for forming the insulating layer14is applied to an area where the paste containing a material for forming the first active material layer11b(and the second active material layer12b) is not applied. As the pastes mentioned above, known pastes used in forming a green sheet for producing a multilayer ceramic capacitor may be used, and the pastes can be obtained by mixing each of the constituent materials with a dispersed material, a plasticizer, a binder, and an organic solvent. In order to obtain a desired structure, coating is preferably performed using a metal mask with an appropriate pattern for each configuration, or the like. Subsequently, a plurality of the above-mentioned structures from which the carrier film has been removed is laminated. At this time, the first internal electrode11and the second internal electrode12obtained after firing are laminated while being slightly shifted so as to be drawn out alternately. After lamination, a sheet obtained by applying a material for forming the outer layer15to a carrier film is laminated on both outsides in the laminating direction, and this is once pressed to obtain an unfired mother laminate. Subsequently, the mother laminate is cut into a predetermined size for individualization. Then, a sheet obtained by applying a material for forming the outer layer15to a carrier film is attached to the exposed side surface portion, and the sheet is further pressed and bonded. Although a hole serving as the injection port16is formed on the surface, the hole may be formed on the sheet before lamination or after lamination. A jig, a cutting device, a laser, or the like may be used for the drilling process for forming the injection port. As a result, an unfired multi-layer chip is obtained. Subsequently, a paste containing materials for forming the first end surface electrode1and the second end surface electrode2is applied to the end surface portion of the multi-layer chip, and then the whole is fired. The firing temperature is determined by the melting point of the materials used. For example, when Al is used for the current collector, the firing temperature is preferably 700° C. or more and 800° C. or less. Further, the first end surface electrode1and the second end surface electrode2are plated, if necessary. Subsequently, an electrolytic solution is injected from the injection port16. As mentioned above, since the first internal electrode11, the second internal electrode12, the separator layer13, and the insulating layer14have a structure through which the electrolytic solution permeates, the electrolytic solution permeates the entire inside of the internal element10. The permeation of the electrolytic solution is preferably carried out in vacuum. After injecting the electrolytic solution, the injection port16is sealed by the sealing member17. Thus, in an exemplary aspect, the electricity storage device100can be produced by the above-mentioned steps. SECOND EXEMPLARY EMBODIMENT FIG.4is a perspective view schematically illustrating a configuration of an electricity storage device200according to a second exemplary embodiment.FIG.5is a schematic sectional view taken along a line V-V of the electricity storage device200illustrated inFIG.4. In this embodiment, the electricity storage device200can be an electric double layer capacitor. However, the electricity storage device200is not limited to the electric double layer capacitor, and can be various electricity storage devices, such as a lithium ion capacitor, a redox capacitor, an aluminum electrolytic capacitor, and a lithium ion secondary battery. As shown, the electricity storage device200in the second embodiment includes an internal element30, a storage container40, and a conductive part60. Similarly to the electricity storage device100in the first embodiment, the internal element30contains an electrolytic solution, but in the electricity storage device200in the present embodiment, an electrolytic solution50is also present between the storage container40and the internal element30. Similarly to the internal element10of the electricity storage device100in the first embodiment, the internal element30includes the first internal electrode11, the second internal electrode12, the separator layer13, the insulating layer14, and an electrolytic solution. Moreover, the first internal electrode11, the second internal electrode12, and the separator layer13forming the internal element30are the same as the first internal electrode11, the second internal electrode12, and the separator layer13of the electricity storage device100according to the first embodiment. In the exemplary aspect, the insulating layer14includes a first insulating layer14aand a second insulating layer14b.The first insulating layer14ais the same as the insulating layer14of the electricity storage device100in the first embodiment, and the first insulating layer14ais provided in a region not in contact with the first internal electrode11and the second internal electrode12, on each side of the separator layer13, in order to eliminate bumps. The second insulating layer14bis provided on both outsides of the internal element30in the thickness direction T, and has a structure through which the electrolytic solution50permeates. Moreover, the first insulating layer14aand the second insulating layer14bare made of the same material. However, the materials for forming the first insulating layer14aand the second insulating layer14bmay be different materials in an alternative aspect. The electricity storage device100according to the first embodiment is provided with the outer layer15that protects the first main surface10c,the second main surface10d,the first side surface10e,and the second side surface10fof the internal element10. However, no outer layer is provided in the electricity storage device200in the present embodiment. In order to maintain the structural strength of the internal element30, the outer layer may be provided in the present embodiment as well, but in that case, the outer layer has a structure through which the electrolytic solution50permeates. For example, the content of the glass material is adjusted, so that the outer layer can have a structure through which the electrolytic solution permeates. The first end surface electrode1provided on the first end surface30aof the internal element30and the second end surface electrode2provided on the second end surface30bare the same as the first end surface electrode1and the second end surface electrode2of the electricity storage device100according to the first embodiment. The storage container40has a recess for accommodating the internal element30. Specifically, the storage container40is a bottomed tubular housing having a cavity at one end, a bottom surface facing the cavity, and side walls substantially perpendicular to the bottom surface. The storage container40is a sintered body formed from a material containing at least one of a ceramic material containing at least one selected from the group consisting of oxides, nitrides, and carbides, and a glass material as an amorphous solid. A known ceramic package may be used as the storage container40. The storage container40includes four side walls: a first side wall40c;a second side wall40d;a third side wall; and a fourth side wall. The height of the side wall, i.e., the dimension of the side wall in the thickness direction T is larger than the dimension of the internal element30in the thickness direction T. A first terminal41and a second terminal42are provided on an inner bottom surface40a,which is a bottom surface of the storage container40and is a surface on the side of the cavity. The inner bottom surface40ais a surface facing the second main surface30dof the internal element30. In the present embodiment, one end of the first terminal41is in contact with the first side wall40cof the storage container40, and one end of the second terminal42is in contact with the second side wall40dof the storage container40. Among the four side walls of the storage container40, the first side wall40cis a side wall facing the first end surface electrode1, and the second side wall40dis a side wall facing the second end surface electrode2. Further, the third side wall is a side wall facing the first side surface of the internal element30, and the fourth side wall is a side wall facing the second side surface of the internal element30. As further shown, a first external electrode43and a second external electrode44are disposed on an outer bottom surface40b,which is a bottom surface of the storage container40and is a surface opposite to the inner bottom surface40a.The first external electrode43is electrically connected to the first terminal41with a first via conductor45interposed therebetween. Further, the second external electrode44is electrically connected to the second terminal42with a second via conductor46interposed therebetween. The electrolytic solution50is stored in the storage container40. In the present embodiment, the electrolytic solution50is stored in the storage container40up to the upper surface of the internal element30, i.e., a position higher than the first main surface30cof the internal element30. The electrolytic solution50is present not only between the storage container40and the internal element30, but also in the internal element30. The conductive part60electrically connects the internal element30to the external electrodes43and44provided in the storage container40. More specifically, the conductive part60includes a first conductive part60athat electrically connects between the first end surface electrode1and the first terminal41, and a second conductive part60bthat electrically connects between the second end surface electrode2and the second terminal42. The first conductive part60ais provided so as to cover the surface of the first terminal41. Further, the second conductive part60bis provided so as to cover the surface of the second terminal42. With such a configuration, the first terminal41and the second terminal42can be prevented from coming into contact with the electrolytic solution50, and the first terminal41and the second terminal42can be prevented from corroding due to the contact with the electrolytic solution50. With the above-mentioned configuration, the plurality of first internal electrodes11of the internal element30is electrically connected to the first external electrode43with the first end surface electrode1, the first conductive part60a,the first terminal41, and the first via conductor45interposed therebetween. Further, the plurality of second internal electrodes12of the internal element30is electrically connected to the second external electrode44with the second end surface electrode2, the second conductive part60b,the second terminal42, and the second via conductor46interposed therebetween. Moreover, the conductive part60includes a composite of metal particles and glass as an amorphous solid and has conductivity as a whole. The metal particles, for example, Al particles, are sintered or necked after the sintering process. Further, the glass is contained in the conductive part in an amount of 10% by volume or more and 50% by volume or less. In this exemplary embodiment, the first internal electrode11, the second internal electrode12, the separator layer13, the insulating layer14, the first end surface electrode1, the second end surface electrode2, the storage container40, and the conductive part60are integrally sintered to form a sintered body, and the sintered body contain no organic substance. Therefore, in the electricity storage device200in the second embodiment, similarly to the electricity storage device100in the first embodiment, the thermal decomposition and structural change of the organic substance can be reduced during reflow mounting, and desired characteristics can be obtained after reflow mounting. In order to reduce the thermal decomposition and structural change of the organic substance during reflow mounting, it is preferable that no organic substance is contained in the first internal electrode11, the second internal electrode12, the separator layer13, the insulating layer14, the first end surface electrode1, the second end surface electrode2, and the conductive part60. However, it is noted that this exemplary aspect does not preclude a configuration in which an organic substance is contained to the extent that the characteristics of the electricity storage device200are not affected. Further, since the electricity storage device200in the present embodiment includes an electrolytic solution inside, the ion conductivity is high and the interfacial resistance of the electrode is low as compared with an electricity storage device having a solid electrolyte, so that a higher output can be obtained. As further shown, the cavity of the storage container40is sealed by a lid70. More specifically, a seal ring75is provided between the lid70and the storage container40, and the lid70and the seal ring75are sealed by welding. The lid70is made of, for example, kovar. A plating layer such as Ni plating may be formed on the surface of the lid70. The seal ring75is made of, for example, kovar. On the surface of the seal ring75, a plating layer, for example, two layers of a Ni-plated base layer and an Au-plated surface layer may be formed. Welding can be performed by, for example, seam welding or laser welding. (Method of Producing Electricity Storage Device in Second Embodiment) An example of a method of producing the electricity storage device200in the second embodiment will be described. An unfired mother laminate is produced in a similar manner to that of the electricity storage device100in the first embodiment. However, instead of applying a paste containing a material for forming the outer layer, a paste containing a material for forming the second insulating layer14bis applied. Subsequently, the mother laminate is pressed and then cut into a predetermined size for individualization to obtain an unfired multi-layer chip. Then, a paste containing materials for forming the first end surface electrode1and the second end surface electrode2is applied. Subsequently, a paste containing a material for forming the first conductive part60ais applied so as to cover the first terminal of the unfired storage container, and a paste containing a material for forming the second conductive part60bis applied so as to cover the second terminal. Then, after firing, the multi-layer chip is placed in the unfired storage container so that the first conductive part60aelectrically connects between the first end surface electrode1and the first terminal41, and the second conductive part60belectrically connects between the second end surface electrode2and the second terminal42. Subsequently, the unfired multi-layer chip and the unfired storage container are fired. The firing temperature is determined by the melting point of the materials used. For example, when Al is used for the current collector, the firing temperature is preferably 700° C. or more and 800° C. or less. Subsequently, the electrolytic solution50is poured through the cavity of the storage container40, and then the cavity of the storage container40is sealed by the lid70with the seal ring75interposed therebetween. Thus, according to an exemplary aspect, the electricity storage device200can be produced by the above-mentioned steps. In general, it is noted that the present invention is not limited to the above embodiments, and various applications and modifications can be added within the scope of the present invention. Moreover, the electricity storage device100according to the first embodiment has a configuration in which the outer layer15that protects the first main surface10c,the second main surface10d,the first side surface10e,and the second side surface10fof the internal element10is provided, but may have a configuration in which no outer layer15is provided. In the electricity storage device200according to the second embodiment mentioned above, the storage container40accommodating the internal element30is formed of a material including at least one of a ceramic material and a glass material; and the first internal electrode11, the second internal electrode12, the separator layer13, the first end surface electrode1, the second end surface electrode2, and the conductive part60are integrally sintered to form a sintered body. On the other hand, like a coin type battery, the storage container for accommodating the internal element30may be made of a metal such as stainless steel. In that case, a sintered body is formed by integrally sintering the first internal electrode11, the second internal electrode12, the separator layer13, the first end surface electrode1, and the second end surface electrode2forming the internal element30. Even in this configuration, the electrolytic solution is stored in the storage container, and the electrolytic solution permeated the internal element30is present. DESCRIPTION OF REFERENCE SYMBOLS 1: First end surface electrode 2: Second end surface electrode 10: Internal element 11: First internal electrode 11a: First current collector 11b: First active material layer 12: Second internal electrode 12a: Second current collector 12b: Second active material layer 13: Separator layer 14: Insulating layer 15: Outer layer 16: Injection port 17: Sealing member 30: Internal element 40: Storage container 41: First terminal 42: Second terminal 43: First external electrode 44: Second external electrode 45: First via conductor 46: Second via conductor 50: Electrolytic solution 60: Conductive part 60a: First conductive part 60b: Second conductive part 70: Lid 75: Seal ring 100,200: Electricity storage device | 39,432 |
11942271 | DETAILED DESCRIPTION OF CERTAIN EMBODIMENTS Disclosed are methods and apparatus for providing a high performance electrode for an energy storage device, e.g., an ultracapacitor, where the electrode includes an aluminum current collector with a layer of aluminum carbide on at least one surface and carbon nanotubes (CNTs) disposed on the aluminum carbide layer. Advantageously, the electrode may be fabricated from mass-produced materials, e.g., aluminum carbide coated current collectors and CNTs. Energy storage devices, such as ultracapacitors, that incorporate the presently disclosed electrode exhibit, among other things, higher performance than previously achievable, in terms of at least one of gravimetric power density (power as a function of weight), volumetric power density (power as a function of volume), gravimetric energy density (energy as a function of weight), volumetric energy density (energy as a function of volume), equivalent series resistance (ESR), frequency response, and maximum voltage. In order to provide some context for the teachings herein, reference is first made to U.S. Pat. No. 7,897,209, entitled “Apparatus and Method for Producing Aligned Carbon Nanotube Aggregate.” This patent is incorporated herein by reference, in its entirety. The foregoing patent (the “'209 patent”) teaches a process for producing aligned carbon nanotube aggregate.” Accordingly, the teachings of the '209 patent, which are but one example of techniques for producing aligned carbon nanotube aggregate, may be used to produce carbon nanotube aggregate (CNT) referred to herein. One example of a device incorporating an electrode as provided herein is provided in U.S. Patent Application Publication No. 2007-0258192, entitled “Engineered Structure for Charge Storage and Method of Making,” also incorporated herein by reference, in its entirety. In general, methods and apparatus disclosed herein may be used to enhance an energy storage system, such as the embodiments disclosed in this publication. One embodiment of such energy storage is referred to as an “ultracapacitor.” However, it should be recognized that the teachings herein may be applicable to other embodiments of energy storage and are therefore not limited to practice with an ultracapacitor. Electrodes for energy storage devices are disclosed herein. Referring toFIG.1in some embodiments, an electrode100includes a current collector101comprising a conductor layer102having at least a first surface103. The conductor layer may be made of any suitable electrically conductive material, e.g., a metal such as aluminum. In some embodiments, the conductor layer may be rigid (e.g., a metal plate), or flexible (e.g., a metal foil). In some embodiments, elongated metal carbide nanostructures104extend from the first surface103. The structure of the metal carbide material on the surface103of the current collector101may vary. The structure of the metal carbide typically material depends on the method by which carbon is deposited on the current collector101. The structure may depend, among other factors, on the type of metal or metal alloy used as a current collector and the source of carbon used to form the metal carbide layer. One advantageous metal carbide structure is metal carbide “whiskers,” as shown. These whiskers are thin elongated structures (e.g., nanorods) that extend generally away from the surface103of the current collector101. The whiskers may have a radial thickness of less than 100 nm, 50 nm, 25 nm, 10 nm, or less, e.g., in the range of 1 nm to 100 nm or any subrange thereof. The whiskers may have a longitudinal lengths that is several to many times the radial thickness, e.g., greater than 200 nm, 300 nm, 400 nm, 500 nm, 1 μm, 5 μm, 10 μm, or more, e.g., in the range of 100 nm to 100 μm or any subrange thereof. PCT Publication No. WO WO/2000/044965, dated Aug. 3, 2000 and titled “Manufacture of transition metal carbide and carbonitride whiskers with low amounts of oxygen and residual oxide phases,” the entire disclosure of which is incorporated by reference, discloses transition metal carbide “whiskers” useful in certain embodiments of the present disclosure. Metal carbide whiskers of the present disclosure may comprise any metal, e.g., an alkali metal of Group 1, an alkaline earth metal of Group 2, a transition metal of Groups 3-12, or a post-transition metal of Group 13-15, provided the carbide is relatively stable and demonstrates acceptable electrical performance under the conditions in which an electrode comprising the carbide would be used. For example, metal carbide whiskers of the present disclosure may comprise magnesium carbide, aluminum carbide, titanium carbide, zirconium carbide, hafnium carbide, vanadium carbide, niobium carbide, tantalum carbide, chromium carbide, molybdenum carbide, tungsten carbide, or any mixed metal carbide (e.g., titanium-tantalum carbide, aluminum-titanium carbide, or metal-silicon carbide, such as nickel-silicon carbide). An exemplary current collector is the current collector available from Toyo Aluminum K.K. under the trade name TOYAL-CARBO®. The metal carbide whiskers may be formed on a variety of metal substrates, which typically include the same metal as the metal carbide whiskers and may include additional metal-containing layers, e.g., layers containing other metals, metal alloys, or metal oxides or hydroxides. For example, as shown inFIG.1, the current collector101includes a cover layer105(e.g., a metal oxide layer, such as an aluminum oxide layer) disposed on the first surface103. In some embodiments this cover layer105may be thin, (e.g., 1 μm or less) such that and the elongated metal carbide nanostructures104extend through the cover layer105. In some embodiments, a carbonaceous energy storage media106is disposed on the first surface103or the current collector and in contact with the elongated metal carbide nanostructures104. The interface between the nanostructures104and the media106. The media106may include one or more forms of carbon including activated carbon or nanoform carbon. The language “nanoform carbon” is used herein to describe the general class of allotropes of carbon, which, for example, include but are not limited to nanotubes (single or multi-walled, aligned or unaligned) nanohorns, nano-onions, carbon black, fullerene, graphene, and oxidized graphene. In certain embodiments of the invention the nanoform carbon is a nanotube, e.g., aligned carbon nanotubes. In some embodiments, the media106may be monolithic. In other embodiments, the media106may have internal structure, e.g., a plurality of stacked layers. As shown inFIG.1, the carbonaceous energy storage media comprises a contact layer106athat may include carbon nanotubes. The contact layer106ais in contact with the elongated metal carbide nanostructures104extending from the first surface103. In some embodiments, the contact layer106amay include a compressed layer of carbon nanotubes. For example, in some embodiments, the nanotubes (e.g., vertically aligned nanotubes) may be grown on a carrier substrate (not shown) and transferred onto the surface103using any suitable technique. Exemplary transfer techniques are disclosed in PCT Publication No. WO/2012/170749 published Dec. 13, 2012, and in U.S. Patent Publication No. 2013/0044405 published Feb. 21, 2013 and titled “High Power and High Energy Electrodes Using Carbon Nanotubes,” the entire contents of each of which are incorporated herein by reference. In some embodiments, pressure may be applied during the transfer process to compress the nanotubes. The compressed nanotubes may include physical defects, such as windows and cracks, generally provide more surface area for charge storage, while occupying a smaller volume than the uncompressed material. In some embodiments, the nanotubes may be aligned in a direction transverse to the first surface103(e.g., substantially perpendicular to the surface). In some embodiments, the nanotubes may be aligned in a direction substantially parallel to the first surface103. In still further embodiments, the nanotubes may be unaligned or in a combination of various configurations. In some embodiments, the contact layer106acomprises an aggregate of carbonaceous materials, e.g., including carbon nanotubes. In some embodiments, the aggregate may consist essentially of carbon nanotubes. In some embodiments, the aggregate may include carbon nanotubes mixed with a different form of carbonaceous material such as activated carbon or another nanoform carbon material. For example, in some embodiments, the carbon nanotubes may make up less than 90%, 80%, 70%, 60%, 50%, 40%, 30%, 10%, 5%, 2.5%, 1%, or less of the aggregate by weight. In some embodiments, the aggregate may be a dried aggregate, e.g., substantially free of any liquid such as solvents or moisture. The aggregate may be formed using any suitable technique, such as those described in PCT Publication No. WO/2012/170749. For example, in some embodiments the aggregate may be formed as follows. A first solution (also referred to herein as a slurry) is provided that includes a solvent and a dispersion of carbon nanotubes, e.g., vertically aligned carbon nanotubes. A second solution (also referred to herein as a slurry) may be provided that includes a solvent with carbon disposed therein. The carbon addition includes at least one form of material that is substantially composed of carbon. Exemplary forms of the carbon addition include, for example, at least one of activated carbon, carbon powder, carbon fibers, rayon, graphene, aerogel, nanohorns, carbon nanotubes and the like. While in some embodiments, the carbon addition is formed substantially of carbon, it is recognized that the carbon addition may include at least some impurities, e.g., by design. Generally, the one or more of the solvents used may be an anhydrous solvent, although this is not a requirement. For example, the solvent may include at least one of ethanol, methanol, DMSO, DMF, acetone, acetonitrile, and the like. Generally, the dispersion of vertically aligned carbon nanotubes may include fragments of vertically aligned carbon nanotubes produced by a production cycle. That is, the vertically aligned carbon nanotubes may be segmented into fragments when harvested from a substrate. The two solutions may subjected to “sonication” (physical effects realized in an ultrasonic field). With regard to the first solution, the sonication is generally conducted for a period that is adequate to tease out, fluff or otherwise parse the carbon nanotubes. With regard to the second solution, the sonication is generally conducted for a period that is adequate to ensure good dispersion or mixing of the carbon additions within the solvent. Once the first solution and the second solution have been adequately sonicated, they are then mixed together, to provide a combined solution and may again be sonicated. Generally, the mixture is sonicated for a period that is adequate to ensure good mixing of the vertically aligned carbon nanotube with the carbon addition. This second mixing results in a carbonaceous aggregate. The carbonaceous aggregate may then be withdrawn from the combined solution and processed. For example, the wet carbonaceous aggregate may be placed onto an appropriate surface. While any material deemed appropriate may be used for the surface, exemplary material includes PTFE as subsequent removal from the surface is facilitated by the properties thereof. In some embodiments, the carbonaceous aggregate is formed in a press to provide a layer that exhibits a desired thickness, area and density. In some embodiments, the aggregate may be cast wet directly onto the surface103a, and dried (e.g., by applying heat or vacuum or both) until substantially all of the solvent and any other liquids have been removed, thereby forming the contact layer106a. In some such embodiments it may be desirable to protect various parts of the current collector101(e.g., and underside where the current collector is intended for two sided operation) from the solvent, e.g., by masking certain areas, or providing a drain to direct the solvent. In other embodiments, the aggregate may be dried elsewhere and then transferred onto the surface103to form the contact layer106a, using any suitable technique (e.g., roll-to-roll layer application). In some embodiments the media106includes a first overlayer106bof carbonaceous material disposed on the contact layer106a. In some embodiment, the first overlayer106bhas a thickness in a direction perpendicular the first surface103that is greater than a thickness of the contact layer106aalong the same dimension (as shown, the vertical direction). In some embodiments, the first overlayer106bhas a thickness in a direction perpendicular the first surface of in the range of about 1 μm to about 1,000 μm, or any subrange thereof, such as 10-100 μm. In some embodiments, the overlayer106bmay include a compressed layer of carbon nanotubes. For example, in some embodiments, the nanotubes (e.g., vertically aligned nanotubes) may be grown on a carrier substrate (not shown) and transferred onto the contact layer106ausing any suitable technique. Exemplary transfer techniques are disclosed in PCT Publication No. WO/2012/170749 published Dec. 13, 2012, and in U.S. Patent Publication No. 2013/0044405 published Feb. 21, 2013 and titled “High Power and High Energy Electrodes Using Carbon Nanotubes,” the entire contents of each of which are incorporated herein be reference. In some embodiments, pressure may be applied during the transfer process to compress the nanotubes. The compressed nanotubes may include physical defects, such as windows and cracks, generally provide more surface area for charge storage, while In some embodiments, the nanotubes may be aligned in a direction transverse to the first surface103(e.g., substantially perpendicular to the surface). In some embodiments, the nanotubes may be aligned in a direction substantially parallel to the first surface103. In still further embodiments, the nanotubes may be unaligned or in a combination of various configurations. In some embodiments, the overlayer106bcomprises an aggregate of carbonaceous materials, e.g., including carbon nanotubes. In some embodiments, the aggregate may consist essentially of carbon nanotubes. In some embodiments, the aggregate may include carbon nanotubes mixed with a different form of carbonaceous material such as activated carbon or another nanoform carbon material. For example, in some embodiments, the carbon nanotubes may make up less than 90%, 80%, 70%, 60%, 50%, 40%, 30%, 10%, 5%, 2.5%, 1%, or less of the aggregate by weight. In some embodiments, the aggregate may be a dried aggregate, e.g., substantially free of any liquid such as solvents or moisture. The aggregate may be formed using any suitable technique, such as those described in PCT Publication No. WO/2012/170749. The aggregate may wet cast onto the contact layer106a, or cast and dried to form the overlay106b. The aggregate may be formed as a dry layer transferred onto the contact layer106a. In some embodiments, the overlayer106bmay be in direct physical contact with contact layer106a, e.g., such that no adhesion or bonding layer is disposed therebetween. For example, in some embodiments, the contact layer106aand the overlayer106badhere to each other through Van der Waals bonding between carbonaceous material in each layer. In various embodiments, one more additional overlayers (not shown), comprising carbonaceous material may be stacked over the first overlayer106b, e.g., by repeating any of the techniques described above with respect to applying the first overlayer106b. In some embodiments, the electrode100may be a two sided electrode, wherein the current collector comprises a second surface, e.g., a lower surface, having a similar structure and energy storage media disposed thereon. In various embodiments, the presently disclosed electrodes comprise a current collector having a metal carbide layer on at least one surface and CNTs disposed on the metal carbide layer.FIGS.2A-2Ddepict various electrodes1according to the present disclosure.FIG.2Adepicts certain embodiments in which the electrode comprises horizontally aligned CNTs6disposed on a layer of metal carbide whiskers5on a surface of a current collector2. Current collector2may comprise a conducting layer3and an oxide layer4. Conducting layer3may be selected from any material with acceptable electrical and mechanical properties for a particular application, such as conductivity, stability, electrochemical reactivity, hardness, tear resistance, and processability. Conducting layer3is typically selected from a variety of conducting metals, such as aluminum, or metal alloys. Oxide layer4may be present or absent, but is typically present when conducting layer4comprises as oxidizable metal such as aluminum. Metal carbide whiskers5are generally a nanostructured metal carbide that are connected to conductor layer3of current collector2and, when oxide layer4is present, extend through oxide layer4. CNTs, which are shown as horizontally aligned CNTs6inFIG.2A, adhere to metal carbide whiskers5, e.g., through Van der Waals forces. Metal carbide whiskers5provide for improved electrical contact between the CNTs and conducting layer3, enabling a reduction in the intrinsic resistance of the electrode, while maintaining good adhesion between the current collector2and the CNTs6, when compared to an electrode having an analogous current collector without metal carbide whiskers. FIG.2Bdepicts certain embodiments in which the electrode comprises vertically aligned CNTs7.FIG.2Cdepicts certain embodiments in which the electrode comprises non-aligned CNTs8, such as tangled or clustered CNTs.FIG.2Ddepicts certain embodiments in which the electrode comprises compressed CNTs9, which may be horizontally aligned CNTs or vertically aligned CNTs that are compressed before or after disposing them onto current collector2. Generally, compressed CNTs have a higher specific surface area (m2/g) than the corresponding uncompressed CNTs. U.S. Patent Publication No. 2013/0044405 published Feb. 21, 2013 and titled “High Power and High Energy Electrodes Using Carbon Nanotubes,” the entire disclosure of which is incorporated herein by reference, discloses compressed CNTs and methods of fabricating electrodes comprising compressed CNTs that may be employed to construct electrodes according to the present disclosure. Specifically, paragraphs [0028] to [0038] and U.S. Patent Publication No. 2013/0044405 and the related figures describe, among other things, electrodes comprising compressed CNTs and methods of fabricating such electrodes. In certain embodiments, the current collector comprises aluminum carbide whiskers (analogous to metal carbide whiskers5) on an aluminum current collector (analogous to current collector2) having a conducting layer of aluminum (analogous to conducting layer3) and a layer of aluminum oxide (analogous to oxide layer4). An exemplary current collector is the current collector available from Toyo Aluminum K.K. under the trade name TOYAL-CARBO®. The aluminum carbide “whiskers” are typically <50 nm, <30 nm, or about 20-30 nm in diameter. As used herein, the term “ultracapacitor” should be given its ordinary and customary meaning to those skilled in the art and refers, without limitation, to an energy storage device also known as a “supercapacitor” and sometimes as an “electric double layer capacitor.” Ultracapacitors are disclosed herein, which employ the electrodes disclosed herein. The ultracapacitors disclosed herein are exemplary energy storage devices in which the electrodes disclosed herein may be employed. Other energy storage devices, including electrolytic capacitors and rechargeable batteries, that comprise the electrodes disclosed herein are also contemplated by this disclosure, and can be constructed by adapting existing fabrication methods. In certain embodiments, an ultracapacitor may be formed comprising an electrode of the type described herein. The ultracapacitor may further comprise an electrolyte with certain desired properties in terms of the electrical performance and compatibility with the other materials of the ultracapacitor, e.g., the electrode or separator. In certain embodiments, the electrolyte is a solution comprising at least one inorganic or organic salt, such as an ionic liquid, and optionally further comprising at least one solvent. In certain embodiments, the electrolyte is a gel comprising at least one ionic liquid and at least one gelling agent, and optionally comprising other additives such as solvents, salts, and surfactants. In certain embodiments, the electrolyte is a solid polymer electrolyte comprising at least one inorganic or organic salt, such as an ionic liquid, and at least one polymeric material, such as a fluoropolymer (e.g., polytetrafluoroethylene (PTFE), polyether ether ketone (PEEK), polyvinylidene difluoride (PVDF), or co-polymers thereof) and optionally comprising other additives such as solvents, salts, and surfactants. In a particular embodiment, the electrolyte is substantially free of moisture and other contaminants that may adversely affect the performance of the ultracapacitor. The ultracapacitor may further comprise a separator to provide electrical separation between a positive electrode and a negative electrode of the ultracapacitor, which separator has certain desired properties in terms of the electrical performance and compatibility with the other materials of the ultracapacitor, e.g., the electrode or electrolyte. In certain embodiments, the separator comprises a material selected from the group consisting of polyamide, PTFE, PEEK, PVDF, aluminum oxide (Al2O3), fiberglass, fiberglass reinforced plastic, or any combination thereof. In a particular embodiment, the separator is substantially free of moisture. In another particular embodiment, the separator is substantially hydrophobic. In some embodiments, (e.g., where a solid state electrolyte use used that may operate to separate the electrodes of the device), a separator may be omitted. FIG.6shows an exemplary implementation of an ultracapacitor10(note, forFIG.6like reference numerals do not indicate correspondence to equivalent elements in other figures). In this case, the ultracapacitor10is an electric double-layer capacitor (EDLC). The EDLC includes at least one electrode3, e.g., of the types described in detail above (in some cases, such as where there are two electrodes3, the electrodes may be referred to as a negative electrode3and a positive electrode3). When assembled into the ultracapacitor10, each electrode3presents a double layer of charge at an electrolyte interface. In some embodiments, a plurality of electrodes3is included. However, for purposes of discussion, only two electrodes3are shown. As a matter of convention herein, at least one of the electrodes3uses a carbon-based energy storage media1(as discussed further herein) to provide energy storage. Each of the electrodes3includes a respective current collector2(also referred to as a “charge collector”). The electrodes3are separated by a separator5. In general, the separator5is a thin structural material (usually a sheet) used to separate the electrodes3into two or more compartments. At least one form of electrolyte6is included, and fills void spaces in and between the electrodes3and the separator5. In general, the electrolyte6is a substance that disassociates into electrically charged ions. A solvent that dissolves the substance may be included in some embodiments. A resulting electrolytic solution conducts electricity by ionic transport. Generally, a combination of the electrode(s)3and the separator5are then formed into one of a wound form or prismatic form which is then packaged into a cylindrical or prismatic housing7. Once the electrolyte6has been included, the housing7is hermetically sealed. In various examples, the package is hermetically sealed by techniques making use of laser, ultrasonic, and/or welding technologies. The housing7(also referred to as a “enclosing body” or “case” or by other similar terms) includes at least one terminal8. Each terminal8provides electrical access to energy stored in the energy storage media1, generally through electrical leads (not shown) which are coupled to the energy storage media1. That is, in some embodiments, a plurality of leads (not shown) are electrically coupled to each of the current collectors2. Each plurality (accordingly to a polarity of the ultracapacitor10) are grouped and coupled to respective terminals8of the housing7. Additional exemplary suitable implementations of ultracapacitors that may include electrodes of the type described in the present disclosure are disclosed in PCT Publication Number WO/2015/102716 published Jul. 9, 2015, and entitled “ADVANCED ELECTROLYTES FOR HIGH TEMPERATURE ENERGY STORAGE DEVICE,” the entire contents of which are incorporated herein by reference. FIGS.3to5Cshow experimental results for exemplary ultracapacitors of the type described here.FIG.3shows a conventional Nyquist plot for an ultracapacitor of the type described herein showing excellent performance. FIG.4AandFIG.4Bare, respectively, plots of capacitance and phase versus frequency for an ultracapacitor of the type described herein having an electrode featuring an electrode comprising a 50 μm aluminum foil with aluminum carbide whiskers and a carbon nanotubes layer disposed thereon. The ultracapacitor shows good capacitive behavior up to a cutoff frequency of about 10 Hz.FIG.4Cshows cyclic voltammetry results for the same ultracapacitor, showing a good operation voltage window ranging from 0V to more than 3V. FIGS.5A,5B, and5Cshow a performance comparison for ultracapacitors of the type described herein having an electrode featuring either an electrode comprising a 50 μm aluminum foil with aluminum carbide whiskers and a carbon nanotubes layer disposed thereon or a similar electrode without any carbon nanotubes. As will be apparent to one skilled in the art, the nanotube-based electrode shows substantially better performance than the electrode lacking nanotubes. Having disclosed aspects of embodiments of the production apparatus and techniques for fabricating aggregates of carbon nanotubes, it should be recognized that a variety of embodiments may be realized. Further a variety of techniques of fabrication may be practiced. For example, steps of fabrication may be adjusted, as well as techniques for joining, materials and chemicals used and the like. As a matter of convention, it should be considered that the terms “may” as used herein is to be construed as optional; “includes,” “has” and “having” are to be construed as not excluding other options (i.e., steps, materials, components, compositions, etc. . . . ); “should” does not imply a requirement, rather merely an occasional or situational preference. Other similar terminology is likewise used in a generally conventional manner. While the invention has been described with reference to exemplary embodiments, it will be understood that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. For example, in some embodiments, one of the foregoing layers may include a plurality of layers there within. In addition, many modifications will be appreciated to adapt a particular instrument, situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed as the best mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope of the appended claims. | 28,005 |
11942272 | DETAILED DESCRIPTION Comparative Example 1 Preparation of Polypyrrole-coated Aramid Fiber and Capacitor (1) 0.85 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 0.67 g pyrrole was added into 50 mL water, followed by adding 0.5 g poly-terephthalyl p-phenylenediamine fiber bundles, the whole reactor was shaken at room temperature, and then silver nitrate water-soluble was added dropwise, the reaction was processed at room temperature for 24 hours; after the reaction, the fiber is taken out, washed and dried to obtain polypyrrole-coated aramid fiber bundles;(2) 10 g of polyvinyl alcohol, 10 g of phosphoric acid and 100 mL of water were heated and maintained at 90° C. for 5 h, and then cooled down to obtain a polyvinyl alcohol gel;(3) Two polypyrrole-coated aramid fiber bundles were immersed in a polyvinyl alcohol gel, and then taken out and twist them together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. Its histograms of length specific capacitance, volumetric specific capacitance and gravimetric specific capacitance are provided inFIG.5, its histograms of length energy density, volumetric energy density and gravimetric energy density are provided inFIG.6, its capacitance retentions after different bending times of aramid fiber electrochemical capacitor are shown inFIG.8. Comparative Example 2 Preparation of Aramid Fiber Coated with Double Layers of Polypyrrole and Silver Nanoparticles and Capacitor (1) 0.2 g of dopamine hydrochloride and 0.16 g of trimethylolaminomethane hydrochloride were dissolved in 100 mL of water to obtain solution A; 2 g of sodium hydroxide was dissolved in 100 mL of water to obtain an aqueous solution of sodium hydroxide; an aqueous solution of sodium hydroxide was used to adjust the pH value of solution A to 8.5 to obtain solution B; 0.5 g of polyparaphenylene terephthalamide fiber bundles were immersed in solution B, followed by shaking at room temperature for 24 hours; after the reaction is complete, the fibers were taken out, washed and dried to obtain poly dopamine-coated aramid fiber bundles;(2) 1.5 g of silver nitrate was dissolved in 50 mL of water, followed by adding dropwise ammonia water until the silver ammonia solution is clarified again, and the 0.25 g of polyvinylpyrrolidone was added to obtain solution C; 3 g of glucose was dissolved in 50 mL of water to obtain a glucose aqueous solution; 0.5 g of polydopamine-coated aramid fiber bundles was added to solution C, and the solution was shaken at room temperature while the glucose aqueous solution was added dropwise, and then the reaction was processed at room temperature for 30 min with continue shaking; after the reaction, the fibers are taken out, washed and dried to obtain aramid fiber bundles coated with silver nanoparticles.(3) 0.85 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 0.67 g pyrrole was added into 50 mL water, followed by adding 0.5 g of silver nanoparticle-coated aramid fiber bundles, and then the whole reactor was shaken at room temperature, and silver nitrate water-soluble was added at the same time, and then the reaction was processed at room temperature for 24 hours with shaking; after the reaction was complete, the fibers were taken out, washed and dried to obtain polypyrrole and silver nanoparticles coated aramid fiber bundles;(4) 10 g of polyvinyl alcohol, 10 g of phosphoric acid and 100 mL of water were heated at 90° C. for 5 h, and the cooled down to obtain a polyvinyl alcohol gel;(5) Two aramid fiber bundles covered with two layers of polypyrrole and silver nanoparticles were immersed in a polyvinyl alcohol gel, and then the fibers were taken out and entangled together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. Its histograms of length specific capacitance, volume specific capacitance and mass specific capacitance were provided inFIG.5, its histograms of length energy density, volume energy density and mass energy density are provided inFIG.6, its retention rates of the capacitance of the aramid fiber electrochemical capacitors after 90° bending at different times are provided inFIG.8; Comparative Example 3 Preparation of Aramid Fibers with Double-Layer Coatings of Polypyrrole and Carbon Nanotubes and Preparation of Capacitor (1) 0.2 g of dopamine hydrochloride and 0.16 g of trimethylolaminomethane hydrochloride were dissolved in 100 mL of water to obtain solution A; 2 g of sodium hydroxide in 100 mL of water was dissolved to obtain an aqueous solution of sodium hydroxide; an aqueous solution of sodium hydroxide was used to adjust the pH value of solution A to 8.5 to obtain solution B; 0.5 g of polyparaphenylene terephthalamide fiber bundles were immersed in solution B, and then the reaction was carried out with shaking at room temperature for 24 hours; after the reaction is complete, the fibers were taken out, washed and dried to obtain polydopamine-coated aramid fiber bundles;(2) 2.5 g of γ-(2,3-glycidoxy) propyltrimethoxysilane was added to 100 mL of water, into which 0.5 g of polydopamine-coated aramid fiber bundles were then added, the reaction was taken place with shaking at 65° C. for 5 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with epoxy groups on the surface;(3) 1 g of multi-walled carbon nanotubes with carboxyl groups were added to 100 mL of ethanol, and then 0.5 g of aramid fiber bundles coated with silver nanoparticles with epoxy groups on the surface were then added, the reaction was taken place with shaking at 70° C. for 12 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with carbon nanotubes;(4) 0.85 g silver nitrate was dissolved in 50 mL water to obtain carbon nanotube and silver nitrate aqueous solution; 0.67 g pyrrole was added into 50 mL water, followed by adding 0.5 g of aramid fiber bundles with carbon nanotubes, and then the whole reactor was shaken at room temperature, and silver nitrate solution was added at the same time, and then the reaction was processed at room temperature for 24 hours with shaking; after the reaction is complete, the fibers are removed, washed, and dried to obtain aramid fiber bundles with two-layer coatings of polypyrrole and carbon nanotubes;(5) 10 g of polyvinyl alcohol, 10 g of phosphoric acid and 100 mL of water were heated at 90° C. for 5 h, and the cooled down to obtain a polyvinyl alcohol gel;(6) two aramid fiber bundles covered with two-layer coatings of polypyrrole and carbon nanotubes were immersed in a polyvinyl alcohol gel, and then the fibers were taken out and entangled together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. Its histograms of length specific capacitance, volumetric specific capacitance and gravimetric specific capacitance are provided inFIG.5, its histograms of length energy density, volumetric energy density and gravimetric energy density are provided inFIG.6, its capacitance retentions after different 90° bending times of aramid fiber electrochemical capacitor are shown inFIG.8. Example 1 (1) 0.1 g of dopamine hydrochloride and 0.05 g of trimethylolaminomethane hydrochloride were dissolved in 100 mL of water to obtain solution A; 0.1 g of sodium hydroxide in 100 mL of water was dissolved to obtain an aqueous solution of sodium hydroxide; an aqueous solution of sodium hydroxide was used to adjust the pH value of solution A to 8.5 to obtain solution B; 0.1 g of polyparaphenylene terephthalamide fiber bundles were immersed in solution B, and then the reaction was carried out with shaking at room temperature for 5 hours; after the reaction is complete, the fibers were taken out, washed and dried to obtain polyopamine-coated aramid fiber bundles;(2) 0.5 g silver nitrate was dissolved in 50 mL water, followed by adding dropwise ammonia water until the silver ammonia solution is clarified again, and the 0.05 g of polyvinylpyrrolidone was added to obtain solution C; 1 g of glucose was dissolved in 50 mL of water to obtain a glucose aqueous solution; 0.1 g of polydopamine-coated aramid fiber bundles was added to solution C, and the solution was shaken at room temperature while the glucose aqueous solution was added dropwise, and then the reaction was processed at room temperature for 10 min with continue shaking; after the reaction, the fibers are taken out, washed and dried to obtain aramid fiber bundles coated with silver nanoparticles.(3) 0.5 g of γ-(2,3-glycidoxy) propyltrimethoxysilane was added to 100 mL of water, into which 0.1 g of polydopamine and silver nanoparticles coated aramid fiber bundles were then added, the reaction was taken place with shaking at 50° C. for 1 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with epoxy groups on the surface;(4) 0.5 g of multi-walled carbon nanotubes with carboxyl groups were added to 100 mL of ethanol, and then 0.1 g of aramid fiber bundles coated by silver nanoparticles with epoxy groups on the surface were then added, the reaction was taken place with shaking at 50° C. for 5 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles;(5) 0.2 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 0.1 g pyrrole was added into 50 mL water, followed by adding 0.1 g of aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles, and then the whole reactor was shaken at room temperature, and silver nitrate water-soluble was added at the same time, and then the reaction was processed at room temperature for 5 hours with shaking; after the reaction was complete, the fibers were taken out, washed and dried to obtain aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles;(6) 1 g of polyvinyl alcohol, 1 g of phosphoric acid and 100 mL of water were heated at 50° C. for 1 h, and the cooled down to obtain a polyvinyl alcohol gel;(7) two aramid fiber bundles covered with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles were immersed in a polyvinyl alcohol gel, and then the fibers were taken out and entangled together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. Example 2 (1) 0.2 g of dopamine hydrochloride and 0.16 g of trimethylolaminomethane hydrochloride were dissolved in 100 mL of water to obtain solution A; 2 g of sodium hydroxide in 100 mL of water was dissolved to obtain an aqueous solution of sodium hydroxide; an aqueous solution of sodium hydroxide was used to adjust the pH value of solution A to 8.5 to obtain solution B; 0.5 g of polyparaphenylene terephthalamide fiber bundles were immersed in solution B, and then the reaction was carried out with shaking at room temperature for 24 hours; after the reaction is complete, the fibers were taken out, washed and dried to obtain polyopamine-coated aramid fiber bundles;(2) 1.5 g silver nitrate was dissolved in 50 mL water, followed by adding dropwise ammonia water until the silver ammonia solution is clarified again, and the 0.25 g of polyvinylpyrrolidone was added to obtain solution C; 3 g of glucose was dissolved in 50 mL of water to obtain a glucose aqueous solution; 0.5 g of polydopamine-coated aramid fiber bundles was added to solution C, and the solution was shaken at room temperature while the glucose aqueous solution was added dropwise, and then the reaction was processed at room temperature for 30 min with continue shaking; after the reaction, the fibers are taken out, washed and dried to obtain aramid fiber bundles coated with silver nanoparticles.(3) 2.5 g of γ-(2,3-glycidoxy) propyltrimethoxysilane was added to 100 mL of water, into which 0.5 g of polydopamine and silver nanoparticles coated aramid fiber bundles were then added, the reaction was taken place with shaking at 65° C. for 5 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with epoxy groups on the surface;(4) 1 g of multi-walled carbon nanotubes with carboxyl groups were added to 100 mL of ethanol, and then 0.5 g of aramid fiber bundles coated by silver nanoparticles with epoxy groups on the surface were then added, the reaction was taken place with shaking at 70° C. for 12 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles;(5) 0.42 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 0.34 g pyrrole was added into 50 mL water, followed by adding 0.5 g of aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles, and then the whole reactor was shaken at room temperature, and silver nitrate water-soluble was added at the same time, and then the reaction was processed at room temperature for 24 hours with shaking; after the reaction was complete, the fibers were taken out, washed and dried to obtain aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles;(6) 10 g of polyvinyl alcohol, 10 g of phosphoric acid and 100 mL of water were heated at 90° C. for 5 h, and the cooled down to obtain a polyvinyl alcohol gel; (7) two aramid fiber bundles covered with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles were immersed in a polyvinyl alcohol gel, and then the fibers were taken out and entangled together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. Example 3 (1) to (4) are consistent with those in Example 2;(5) 0.85 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 0.67 g pyrrole was added into 50 mL water, followed by adding 0.5 g of aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles, and then the whole reactor was shaken at room temperature, and silver nitrate water-soluble was added at the same time, and then the reaction was processed at room temperature for 24 hours with shaking; after the reaction was complete, the fibers were taken out, washed and dried to obtain aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles;(6) to (7) are consistent with those in Example 2, and an aramid fiber electrochemical capacitor was obtained. Referring toFIG.1, it is scanning electron microscope (SEM) photographs of poly-p-phenylene terephthamide fibers, polydopamine-coated aramid fibers, silver nanoparticle-coated aramid fibers, aramid fiber bundles with two-layered coatings of carbon nanotubes and silver nanoparticles, aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles that provided in Example 3. The surface of the poly-p-phenylene terephthamide fiber is smooth; the surface of the aramid fiber covered by polydopamine is rough with a uniform coating layer; the surface of the aramid fiber bundle covered by silver nanoparticles is distributed with silver particles having an average diameter of about 30 nm; there are silver particles and carbon nanotubes on the surface of aramid fibers covered with double-layer coatings of carbon nanotubes and silver nanoparticles; polypyrrole particles with a diameter of about 1 μm were distributed on the surface of aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles. FIG.2gives infrared spectra of poly-p-phenylene terephthamide fibers, polydopamine-coated aramid fibers, silver nanoparticle-coated aramid fibers, aramid fibers coated by silver nanoparticle with epoxy groups, aramid fiber bundles with two-layered coatings of carbon nanotubes and silver nanoparticles, aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles that provided in Example 3. Compared with the spectrum of poly-p-phenylene terephthamide fibers, that of polydopamine-coated aramid fibers shows absorption peaks assigning to asymmetric (2929 cm−1) and symmetric (2851 cm−1) stretching vibration of methylene that are derived from polydopamine. Compared with the spectrum of silver nanoparticle-coated aramid fibers, that of aramid fibers coated by silver nanoparticles with epoxy groups have characteristic peaks reflecting asymmetric stretching vibration (845 and 908 cm−1) of epoxy group, stretching vibrations of Si—O—C (1034 cm−1), Si—O (1110 cm−1) and Si—CH2—R (1200 cm−1), these peaks belong to γ-(2,3-glycidoxy) propyltrimethoxysilane. The characteristic peaks of epoxy group are not found in the spectrum of aramid fibers coated with multi-walled carbon nanotubes and silver particles. In the spectrum of aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles, there are characteristic peaks from polypyrrole including the in-plane vibration of C—H (1033 cm−1), stretching vibration of C—C (1533 cm−1) and stretching vibration of C—N (1430 cm−1).[36] The strong peak at 1385 cm−1is originated from the interaction between silver nanoparticles and polypyrrole. FIG.3shows Raman spectra of poly-p-phenylene terephthamide fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles, aramid fiber bundles with two-layered coatings of carbon nanotubes and silver nanoparticles that are provided in Example 3. The spectrum of aramid fibers with double-layered coatings consists of two characteristic bands of carbonaceous materials, namely D-band at ca. 1329 cm−1and G-band at ca. 1583 cm−1; the spectrum of aramid fibers with three-layered coatings show the peaks at ca. 1000-1150 cm−1, 1300-1410 cm−1and 1600 cm−1, they are attributed to the in-plane deformation of C—H, ring stretching and C═C backbone stretching of polypyrrole, respectively, demonstrating the presence of polypyrrole coating on fibres. FIG.4gives X-ray diffraction patterns of poly-p-phenylene terephthamide fibers, polydopamine-coated aramid fibers, silver nanoparticle-coated aramid fibers, aramid fiber bundles with two-layered coatings of carbon nanotubes and silver nanoparticles as well as aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles that are provided in Example 3. Each pattern shows a broad peak superimposed by (110) and (200) peaks, the typical peaks of poly-p-phenylene terephthamide fibers, indicating that the crystal structure of aramid fibre is not changed in the whole process of preparing new fibres. Compared with the patterns of poly-p-phenylene terephthamide and polydopamine-coated aramid fibers, those of silver nanoparticle-coated aramid fibers, aramid fiber bundles with two-layered coatings and aramid fiber bundles with three-layered coatings show peaks reflecting (111), (200), (220), (311) and (222) planes, which result from face-centred-cubic phase of Ag, so the appearance of these peaks demonstrate the production of silver coating on fibres. FIG.5gives histograms of the length, volumetric and gravimetric specific capacitance of the aramid fiber electrochemical capacitors provided in Comparative Example 1, Comparative Example 2, Comparative Example 3, and Example 3. The aramid fiber electrochemical capacitor prepared in Example 3 has the optimal capacitance performance, its length specific capacitance, volume specific capacitance and mass specific capacitance are 100.1 mF/cm, 84.3 F/cm3, and 24.8 F/g, respectively; moreover, the specific capacitances are all higher than their theoretical values (CComparative Example 2+CComparative Example 3−2CComparative Example 1, where C is the specific capacitance determined experimentally), indicating that there is a synergistic effect between silver and carbon nanotubes, this may be because carbon nanotubes fill the gaps between silver particles, a better conductive network is formed, and thus increasing the conductivity of the electrode. FIG.6gives histograms of length, volumetric and gravimetric energy densities of the aramid fiber electrochemical capacitors provided by Comparative Example 1, Comparative Example 2, Comparative Example 3, and Example 3. As energy density is proportional to specific capacitance, it has a similar law to the specific capacitance. That is, the aramid fiber electrochemical capacitor prepared in Example 3 has the highest energy density, and its length, volumetric and gravimetric energy densities are 8.9 μWh/cm, 7.49 mWh/m3, and 2.21 mWh/g. Referring to Table 1, it is the aramid fiber electrochemical capacitor prepared in Example 3 of the present invention and the aramid fiber electrochemical capacitor prepared in Comparative Example 1, Comparative Example 2, and Comparative Example 3 after 1000 cycles of voltammetry. Aramid fiber electrochemical capacitor prepared in Comparative Example 1 has the minimum capacitance, those in Comparative Examples 2 and 3 have slightly improved cycle performances, while that in Example 3 has the best. This is because swelling and shrinkage generally occur when polypyrrole contacts with electrolyte during cycling, and the presence of silver particles and carbon nanotubes can prevent the structure of the polypyrrole from being destroyed, thereby improving the cycling performance. In the existing reports, the capacitance retention rate of polymer fiber capacitors containing conductive polymers after 1000 cycles is generally below 92%, and the capacitance retention rate after 1000 cycles of aramid fiber electrochemical capacitor prepared in Example 3 of the present invention reached 95.2%. TABLE 1Capacitance retention ratios of Example3 and Comparative Examples 1 to 3ComparativeComparativeComparativeExample 1Example 2Example 3Example 3Capacitance88.190.891.095.2retention rate (%) FIG.7is the ratios of the capacitance of the aramid fiber electrochemical capacitor provided in Example 3 to the initial capacitance at different bending angles. Even if the bending angle of the aramid fiber capacitor reaches 180°, its capacitance has only slight change, indicating that the aramid fiber capacitor has good flexibility. FIG.8is the retention rates of the capacitance of the aramid fiber electrochemical capacitors after 90° bending at different times provided by Comparative Example 1, Comparative Example 2, Comparative Example 3, and Example 3. When the number of bending times reaches 500, the capacitance retention rate of the aramid fiber capacitor is 94.5%, which is higher than those of Comparative Example 1 (78.8%), Comparative Example 2 (82.2%), and Comparative Example 3 (87.1%), indicating good adhesion between the coating layers FIG.9gives the stress-strain curve of aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles that are provided in Example 3. The elongation at break, tensile strength and modulus are 3.1%, 2521 MPa and 95.4 GPa, respectively, indicating that aramid fibers coated with three-layers have good mechanical properties. Tensile strength and modulus of aramid fiber prepared in Comparative Example 3 are 2232 MPa and 81.9 GPa, respectively, while those of fibers prepared in Comparative Examples 1 and 2 are lower. Example 4 (1) 0.2 g of dopamine hydrochloride and 0.16 g of trimethylolaminomethane hydrochloride were dissolved in 100 mL of water to obtain solution A; 2 g of sodium hydroxide in 100 mL of water was dissolved to obtain an aqueous solution of sodium hydroxide; an aqueous solution of sodium hydroxide was used to adjust the pH value of solution A to 8.5 to obtain solution B; 0.5 g of polyparaphenylene terephthalamide fiber bundles were immersed in solution B, and then the reaction was carried out with shaking at room temperature for 24 hours; after the reaction is complete, the fibers were taken out, washed and dried to obtain polyopamine-coated aramid fiber bundles;(2) 1.5 g silver nitrate was dissolved in 50 mL water, followed by adding dropwise ammonia water until the silver ammonia solution is clarified again, and the 0.25 g of polyvinylpyrrolidone was added to obtain solution C; 3 g of glucose was dissolved in 50 mL of water to obtain a glucose aqueous solution; 0.5 g of polydopamine-coated aramid fiber bundles was added to solution C, and the solution was shaken at room temperature while the glucose aqueous solution was added dropwise, and then the reaction was processed at room temperature for 30 min with continue shaking; after the reaction, the fibers are taken out, washed and dried to obtain aramid fiber bundles coated with silver nanoparticles.(3) 2.5 g of γ-(2,3-glycidoxy) propyltrimethoxysilane was added to 100 mL of water, into which 0.5 g of polydopamine and silver nanoparticles coated aramid fiber bundles were then added, the reaction was taken place with shaking at 65° C. for 5 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with epoxy groups on the surface;(4) 1 g of multi-walled carbon nanotubes with carboxyl groups were added to 100 mL of ethanol, and then 0.5 g of aramid fiber bundles coated by silver nanoparticles with epoxy groups on the surface were then added, the reaction was taken place with shaking at 70° C. for 12 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles;(5) 1.27 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 1.01 g pyrrole was added into 50 mL water, followed by adding 0.5 g of aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles, and then the whole reactor was shaken at room temperature, and silver nitrate water-soluble was added at the same time, and then the reaction was processed at room temperature for 24 hours with shaking; after the reaction was complete, the fibers were taken out, washed and dried to obtain aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles;(6) 10 g of polyvinyl alcohol, 10 g of phosphoric acid and 100 mL of water were heated at 90° C. for 5 h, and the cooled down to obtain a polyvinyl alcohol gel;(7) two aramid fiber bundles covered with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles were immersed in a polyvinyl alcohol gel, and then the fibers were taken out and entangled together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. After 1000 cycles, the capacitance retention rate reaches 95.1%, when the number of bending times reaches 500, the capacitance retention rate of aramid fiber capacitors is 94.1%. Example 5 (1) 1 g of dopamine hydrochloride and 0.5 g of trimethylolaminomethane hydrochloride were dissolved in 0.1 L of water to obtain solution A; 10 g of sodium hydroxide in 0.1 L of water was dissolved to obtain an aqueous solution of sodium hydroxide; an aqueous solution of sodium hydroxide was used to adjust the pH value of solution A to 8.5 to obtain solution B; 1 g of polyparaphenylene terephthalamide fiber bundles were immersed in solution B, and then the reaction was carried out with shaking at room temperature for 48 hours; after the reaction is complete, the fibers were taken out, washed and dried to obtain polyopamine-coated aramid fiber bundles;(2) 5 g silver nitrate was dissolved in 50 mL water, followed by adding dropwise ammonia water until the silver ammonia solution is clarified again, and the 0.5 g of polyvinylpyrrolidone was added to obtain solution C; 10 g of glucose was dissolved in 50 mL of water to obtain a glucose aqueous solution; 1 g of polydopamine-coated aramid fiber bundles was added to solution C, and the solution was shaken at room temperature while the glucose aqueous solution was added dropwise, and then the reaction was processed at room temperature for 60 min with continue shaking; after the reaction, the fibers are taken out, washed and dried to obtain aramid fiber bundles coated with silver nanoparticles.(3) 5 g of γ-(2,3-glycidoxy) propyltrimethoxysilane was added to 100 mL of water, into which 1 g of polydopamine and silver nanoparticles coated aramid fiber bundles were then added, the reaction was taken place with shaking at 100° C. for 10 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with epoxy groups on the surface;(4) 5 g of multi-walled carbon nanotubes with carboxyl groups were added to 100 mL of ethanol, and then 1 g of aramid fiber bundles coated by silver nanoparticles with epoxy groups on the surface were then added, the reaction was taken place with shaking at 80° C. for 24 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles;(5) 4 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 2 g pyrrole was added into 50 mL water, followed by adding 1 g of aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles, and then the whole reactor was shaken at room temperature, and silver nitrate water-soluble was added at the same time, and then the reaction was processed at room temperature for 48 hours with shaking; after the reaction was complete, the fibers were taken out, washed and dried to obtain aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles;(6) 20 g of polyvinyl alcohol, 20 g of phosphoric acid and 100 mL of water were heated at 100° C. for 10 h, and the cooled down to obtain a polyvinyl alcohol gel;(7) two aramid fiber bundles covered with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles were immersed in a polyvinyl alcohol gel, and then the fibers were taken out and entangled together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. After 1000 cycles, the capacitance retention rate reaches 95.0%, when the number of bending times reaches 500, the capacitance retention rate of aramid fiber capacitors is 94.2%. Example 6 (1) 0.1 g of dopamine hydrochloride and 0.05 g of trimethylolaminomethane hydrochloride were dissolved in 100 mL of water to obtain solution A; 0.1 g of sodium hydroxide in 100 mL of water was dissolved to obtain an aqueous solution of sodium hydroxide; an aqueous solution of sodium hydroxide was used to adjust the pH value of solution A to 8.5 to obtain solution B; 0.1 g of polyparaphenylene terephthalamide fiber bundles were immersed in solution B, and then the reaction was carried out with shaking at room temperature for 5 hours; after the reaction is complete, the fibers were taken out, washed and dried to obtain polyopamine-coated aramid fiber bundles;(2) 0.5 g silver nitrate was dissolved in 50 mL water, followed by adding dropwise ammonia water until the silver ammonia solution is clarified again, and the 0.05 g of polyvinylpyrrolidone was added to obtain solution C; 1 g of glucose was dissolved in 50 mL of water to obtain a glucose aqueous solution; 0.1 g of polydopamine-coated aramid fiber bundles was added to solution C, and the solution was shaken at room temperature while the glucose aqueous solution was added dropwise, and then the reaction was processed at room temperature for 10 min with continue shaking; after the reaction, the fibers are taken out, washed and dried to obtain aramid fiber bundles coated with silver nanoparticles.(3) 0.5 g of γ-(2,3-glycidoxy) propyltrimethoxysilane was added to 100 mL of water, into which 0.1 g of polydopamine and silver nanoparticles coated aramid fiber bundles were then added, the reaction was taken place with shaking at 50° C. for 1 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with epoxy groups on the surface;(4) 0.5 g of multi-walled carbon nanotubes with carboxyl groups were added to 100 mL of ethanol, and then 0.1 g of aramid fiber bundles coated by silver nanoparticles with epoxy groups on the surface were then added, the reaction was taken place with shaking at 50° C. for 5 h; after the reaction was completed, the fibers were taken out, washed and dried to obtain aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles; (5) 0.2 g silver nitrate was dissolved in 50 mL water to obtain silver nitrate aqueous solution; 0.1 g pyrrole was added into 50 mL water, followed by adding 0.1 g of aramid fiber bundles with double-layered coatings of carbon nanotubes and silver nanoparticles, and then the whole reactor was shaken at room temperature, and silver nitrate water-soluble was added at the same time, and then the reaction was processed at room temperature for 5 hours with shaking; after the reaction was complete, the fibers were taken out, washed and dried to obtain aramid fiber bundles with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles; (6) 1 g of polyvinyl alcohol, 1 g of phosphoric acid and 0.1 L of water were heated at 50° C. for 1 h, and the cooled down to obtain a polyvinyl alcohol gel; (7) two aramid fiber bundles covered with three-layered coatings of polypyrrole, carbon nanotubes and silver nanoparticles were immersed in a polyvinyl alcohol gel, and then the fibers were taken out and entangled together, the gel was solidified at room temperature to obtain an aramid fiber electrochemical capacitor. | 34,177 |
11942273 | DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. First Preferred Embodiment FIG.1is a perspective view of an electronic component according to a first preferred embodiment of the present invention mounted on a circuit board90.FIG.2is a partial enlarged cross-sectional view of the electronic component1according to the first preferred embodiment of the present invention. The electronic component1includes an electronic element10and an interposer board20. The interposer board20is attached to the electronic element10. The electronic component1is mounted on the circuit board90. The circuit board90includes lands91on a surface thereof. The lands91are each connected to the interposer board20. Electronic Element10 The electronic element10is, for example, a capacitor in the present preferred embodiment of the present invention, but is not limited thereto. The electronic element10may be, for example, an inductor, a thermistor, a piezoelectric, or a semiconductor or other elements. The electronic element10of the present preferred embodiment of the present invention includes a multilayer body13and a pair of external electrodes14. The multilayer body13includes a rectangular or substantially rectangular parallelepiped shape. In the multilayer body13, dielectric layers11, and internal electrode layers12are alternately laminated. The pair of external electrodes14are provided on both end surfaces of the multilayer body13. Multilayer Body13 The multilayer body13has a rectangular or substantially rectangular shape. The multilayer body13includes a pair of multilayer body end surfaces CS orthogonal or substantially orthogonal to the internal electrode layer12, a pair of multilayer body side surfaces BS orthogonal or substantially orthogonal to the multilayer body end surface CS, and a pair of multilayer body main surfaces AS orthogonal or substantially orthogonal to the multilayer body end surface CS and the multilayer body side surface BS. The electronic element10of the present preferred embodiment of the present invention is a horizontal mounting electronic element. In the horizontal mounting electronic element, the dielectric layers11and the internal electrode layers12are provided in parallel or substantially in parallel with the multilayer body main surface AS. However, the present invention is not limited to the horizontal mounting electronic element. The electronic element10of the present preferred embodiment of the present invention may be a vertical mounting electronic element. In the vertical mounting electronic element, the dielectric layers11and the internal electrode layers12are provided perpendicular or substantially perpendicular to the multilayer body main surface AS. Dielectric Layer11 The dielectric layers11each mainly include, for example, barium titanate or other components. However, the main component of the dielectric layers11is not limited to barium titanate. The main component of the dielectric layer11may include a ceramic having a high dielectric constant, such as, for example, calcium titanate or strontium titanate. The dielectric layers11may include at least one kind of sub-component such as, for example, Mn compounds, Fe compounds, Cr compounds, Co compounds and Ni compounds. Furthermore, the dielectric layers11may include, for example, Si, glass components, and other components. Internal Electrode Layer12 The internal electrode layers12are provided by printing a paste including, for example, Ni on a ceramic sheet of the dielectric layers11. However, the main material of the internal electrode layers12is not limited to Ni. The main material of the internal electrode layers12may include an alloy of Pd and Ag, for example. External Electrodes14 The external electrodes14are respectively provided on the pair of multilayer body end surfaces CS of the multilayer body13. The external electrodes14each cover not only the multilayer body end surface CS, but also the multilayer body main surface AS and the multilayer body side surface BS in a vicinity of the multilayer body end surface CS. As shown inFIG.2, in the internal electrode layers12, an internal electrode layer12aand an internal electrode layer12bare adjacent and oppose each other. The internal electrode layer12ais electrically connected to one of the external electrodes14provided on one of the multilayer body end surfaces CS. The internal electrode layer12bis electrically connected to the other one of the external electrodes14provided on the other one of the multilayer body end surface CS. In the following description, the direction extending from one of the multilayer body end surfaces CS of the electronic element10to the other one of the multilayer body end surfaces CS is defined as the length direction L. The direction extending from one of the multilayer body side surfaces BS of the electronic element10to the other one of the multilayer body side surfaces BS is defined as the width direction W. The direction extending from one of the multilayer body main surfaces AS of the electronic element10to the other one of the multilayer body main surfaces AS is defined as the thickness direction T. Size of Electronic Element10 In the electronic element10, the distance between the pair of multilayer body end surfaces CS is defined as the length LS. The distance between the pair of multilayer body side surfaces BS is defined as the width WS. The distance between a pair of multilayer body main surfaces AS is defined as the thickness TS. In this case, in the electronic element10of the present preferred embodiment of the present invention, for example, the length LS is about 2.01 mm to about 2.20 mm, the width WS is about 1.30 mm to about 1.50 mm, and the thickness TS is about 1.70 mm to about 1.9 mm. The thickness of each of the dielectric layers11is preferably about 0.4 μm to about 0.8 μm, and may be about 0.4 μm to about 1.0 μm, for example. The thickness of each of the internal electrode layers12is preferably about 0.4 μm to about 0.8 μm, and may be about 0.4 μm to about 1.0 μm, for example. However, the present invention is not limited thereto, and other sizes may be used. For example, in the electronic element10, for example, the length LS may be about 3.1 mm to about 3.3 mm, the width WS may be about 1.5 mm to about 2.7 mm, and the thickness TS may be about 1.5 mm to about 2.7 mm. In this case, the thickness of each of the dielectric layers11is preferably about 0.4 μm to about 0.8 μm, and may be about 0.4 μm to about 1.0 μm, for example. The thickness of each of the internal electrode layers12is preferably about 0.4 μm to about 0.8 μm, and may be about 0.4 μm to about 1.0 μm, for example. As shown inFIG.2, the external electrodes14each include, for example, from the side of the multilayer body end surface CS, a Cu (copper) electrode layer14a, an electrically conductive resin layer14bprovided on the outer periphery of the Cu electrode layer14a, a Ni (nickel) plated layer14cprovided on the outer periphery of the electrically conductive resin layer14b, and a first Sn (tin) plated layer30provided on the outer periphery of the Ni plated layer14c. Cu Electrode Layer14a The Cu electrode layer14ais provided by, for example, applying and baking a conductive paste including a conductive metal and glass. The Cu electrode layer14acovers not only the multilayer body end surfaces CS on both sides of the multilayer body13, but also a portion of the multilayer body main surface AS in the vicinity of the multilayer body end surface CS, and a portion of the multilayer body side surface BS in the vicinity of the multilayer body end surface CS. Electrically Conductive Resin Layer14b The electrically conductive resin layer14bcovers the Cu electrode layer14aat the outer periphery of the Cu electrode layer14a. The electrically conductive resin layer14bmay include, for example, a thermosetting resin and a metal component. As the thermosetting resin, various known thermosetting resins can be used. Specific examples of the thermosetting resin include, for example, epoxy resin, phenolic resin, urethane resin, silicone resin, and polyimide resin. As the metal component, for example, Ag or a metal powder coated with Ag on the surface of the base metal powder can be used. Similarly to the Cu electrode layer14a, the electrically conductive resin layer14balso covers not only the multilayer body end surface CS on both sides of the multilayer body13, but also a portion of the multilayer body main surface AS in the vicinity of the multilayer body end surface CS and a portion of the multilayer body side surface BS in the vicinity of the multilayer body end surface CS. The electrically conductive resin layer14bincludes, for example, a thermosetting resin. For this reason, the electrically conductive resin layer14bis more flexible than, for example, a metal layer made of a plated film or a fired product of a conductive paste. Therefore, even when an impact caused by physical shock or thermal cycling acts on the electronic component1, the electrically conductive resin layer14bdefines and functions as a buffer layer. Thus, cracks in the electronic component1are prevented from occurring. Furthermore, it is easy to absorb piezoelectric vibration, and it is possible to reduce or prevent the “noise”. Gap14d A gap14dis provided between the Cu electrode layer14aand the electrically conductive resin layer14b. In the gap14d, the distance d in the length direction L between the Cu electrode layer14aand the electrically conductive resin layer14bis largest at the middle portion in the width direction W and the thickness direction T in the multilayer body end surface CS where the Cu electrode layer14ais provided. Furthermore, the distance between the Cu electrode layer14aand the electrically conductive resin layer14bdecreases approaching the end portion of the multilayer body end surface CS in the vicinity of the multilayer body main surface AS or the multilayer body side surface BS. Furthermore, the gap14dis eliminated or substantially eliminated at the corner portion and the ridgeline portion. As a result, the Cu electrode layer14aand the electrically conductive resin layer14bare in contact with each other. Thus, the distance d in the length direction L of the gap14dis largest at the middle portion of the width direction W and the thickness direction T in the multilayer body end surface CS. Therefore, the external electrodes14each have a shape that bulges toward the length direction L. Ni Plated Layer14c The Ni plated layer14ccovers the electrically conductive resin layer14bat the outer periphery of the electrically conductive resin layer14b. The Ni plated layer14cincludes, for example, plating of Ni or an alloy including Ni. Similarly to the Cu electrode layer14a, the Ni plated layer14ccovers not only the multilayer body end surface CS on both sides of the multilayer body13, but also a portion of the multilayer body main surface AS in the vicinity of the multilayer body end surface CS, and a portion of the multilayer body side surface BS in the vicinity of the multilayer body end surface CS. First Sn Plated Layer30 The first Sn plated layer30is provided at the outer periphery of the Ni plated layer14c. The first Sn plated layer30includes, for example, plating of Sn or an alloy including Sn. The first Sn plated layer30may be a single layer. Although described later, the first Sn plated layer30integrally covers the outer periphery including the metal layer of the interposer board20with the interposer board20attached to the electronic element10. The first Sn plated layer30may include, for example, two Sn-plated layers. In this case, the first Sn plated layer30may include, for example, a Sn plated layer covering only the Ni plated layer14cof the electronic element10without covering the interposer board20, between the Ni plated layer14cand the first Sn plated layer30. Interposer Board20 The interposer board20is a rectangular or substantially rectangular plate member. The interposer board20includes a pair of board end surfaces CK, a pair of board side surfaces BK perpendicular or substantially perpendicular to the board end surface CK, and a pair of board main surfaces AK perpendicular or substantially perpendicular to the board end surface CK and the board side surface BK. The pair of board end surfaces CK each include a recess21. A board main surface AK1in the vicinity of the electronic element which is one of the pair of board main surfaces AK is joined with a multilayer body main surface AS2in the vicinity of the board which is one of the pair of multilayer body main surfaces AS of the electronic element10. Material The interposer board20is, for example, an alumina board made of alumina. Alumina is generally harder than epoxy resin or the like, which is a common material for insulation boards. Therefore, it is possible to provide an electronic component including an interposer board20that is resistant to deflection. In addition, alumina is harder than epoxy resin or the like. This is also effective in reducing or preventing the noise. Size In the following, in the interposer board20, the length between the pair of board end surfaces CK is defined as LK. The width between the pair of board side surfaces BK is defined as WK. The thickness between the pair of board main surfaces AK is defined as TK. The length LK between the pair of board end surfaces CK refers to a length between the pair of board end surfaces CK other than the portion where the recess21is provided, in the board end surface CK. The width WK of the interposer board20is smaller than the width WS of the electronic element10. The length LK of the interposer board20is smaller than the length LS of the electronic element10. Therefore, the entire interposer board20is covered by the electronic element10in a plan view. Therefore, when mounting the interposer board20of the electronic component1on the circuit board90, the arrangement is not limited due to the size of the interposer board20. Furthermore, the interposer board20is not visible in a plan view. For this reason, it has excellent aesthetics. Recess21 Each of the pair of board end surfaces CK of the interposer board20includes a recess21. The recess21has a semi-elliptical or substantially semi-elliptical shape in a plan view as shown inFIG.1. By providing the recess21, it is possible to accumulate a solder layer40to join the lands91of the electronic component1and the circuit board90, in a space provided by the recess21. Thus, it is possible to reduce or prevent wetting of the solder layer40on the end surface in the length direction L of the electronic element10. The shape in a plan view of the recess21is not limited to a semi-elliptical shape, and may be, for example, a polygonal or substantially polygonal shape or other shapes. However, for the purpose of increasing the area where the solder layer40is wetted while maintaining the bonding strength between the electronic element10and the interposer board20, the shape of the recess21in a plan view is preferably semi-elliptical or substantially semi-elliptical. Such a semi-elliptical or substantially semi-elliptical shape is obtained by dividing the ellipse or an approximate ellipse having a main axis parallel or substantially parallel to the width direction W of the interposer board20along this main axis. Cu Fired layer23 The Cu fired layer23is provided on the board main surface AK of the interposer board20in the vicinity of the board end surface CK. By the Cu fired layer23being provided in this way, the adhesion force of the Cu plated layer provided on the outer periphery of the Cu fired layer23to the board main surface AK of the interposer board20is improved. In the present preferred embodiment of the present invention, the Cu fired layer23is provided on both sides of the board main surface AK1in the vicinity of the electronic element and the board main surface AK2in the vicinity of the circuit board. The Cu fired layer23provided on the board main surface AK2in the vicinity of the circuit board may be thinner than the Cu fired layer23provided on the board main surface AK1in the vicinity of the electronic element. The Cu fired layer23may be thinner from the board end surface CK toward the middle portion along the length direction L on the board main surface AK. Therefore, when mounting the electronic element10using solder40A, the posture of the electronic element10is easily stabilized. Diffusion Layer24 Furthermore, the Cu fired layer23is provided on the board main surface AK of the interposer board20in the vicinity of the board end surface CK. Thus, on the board main surface AK of the interposer board20in the vicinity of the board end surface CK, the diffusion layer24including, for example, aluminum and Cu is provided between the Cu layer27and the interposer board20made of alumina. Mark Portion25 As shown inFIG.2, a mark portion25is provided which includes, for example, Si at the middle portion in the length direction L and the width direction W of the board main surface AK of the interposer board20. The mark portion25may be made of, for example, glass. The mark portion25may include, for example, Si and alumina. Since the mark portion25includes alumina, it is firmly attached to the interposer board20made of alumina. The mark portion25may be thinner than the Cu fired layer23. Therefore, when mounting the electronic element10to the interposer board20, the mark portion25provided at the middle portion in the length direction L and the width direction W does not contact the electronic element10. Thus, the mounting of the electronic element10does not become unstable. The mark portion25is circular or substantially circular in the present preferred embodiment. However, the present invention is not limited thereto, and may be, for example, oval, substantially oval, triangular, or substantially triangular. Furthermore, in the present preferred embodiment, the mark portion25is provided on the board main surface AK1in the vicinity of the electronic element. As described above, the Cu fired layer23provided on the board main surface AK1in the vicinity of the electronic element may be thicker than the Cu fired layer23provided on the board main surface AK2in the vicinity of the circuit board. Among the board main surfaces AK of the interposer board20, the board main surface AK1in the vicinity of the electronic element is attached to the electronic element10. The board main surface AK1in the vicinity of the electronic element includes the thicker Cu fired layer23thereon. However, the difference in thickness of the Cu fired layers23may be small. Therefore, the board main surface AK2in the vicinity of the circuit board and the board main surface AK1in the vicinity of the electronic element may be visually indistinguishable from each other when visually viewing the Cu fired layers23. However, in the present preferred embodiment of the present invention, the mark portion25is provided on the main surface AK1in the vicinity of the electronic element. As a result, the mark portion25defines and functions as a mark to identify the board main surface AK1in the vicinity of the electronic element on which the Cu fired layer23is thicker. Thus, it is possible to attach the board main surface AK1in the vicinity of the electronic element where the Cu fired layer23is thicker to the electronic element10. However, the present invention is not limited thereto. The mark portion25may be provided on the board main surface AK2in the vicinity of the circuit board. When joining the electronic element10and the interposer board20, there are cases where alignment using a camera is performed. In these cases, photographing is performed from the side of the interposer board20. When the mark portion25is provided on the board main surface AK2in the vicinity of the circuit board, the mark portion25is visible during the alignment using a camera. Therefore, the alignment is easily performed. Zn-Containing Layer26 The pair of board end surfaces CK of the interposer board20each include a Zn-containing layer26including Zn (zinc). Metal Layer The outer periphery of the Cu fired layer23and the Zn-containing layer26on the interposer board20in the vicinity of the board end surface CK includes a metal layer thereon. The metal layer includes, for example, a Cu layer27, a Ni plated layer28, and a second Sn plated layer29. Cu Layer27 In the present preferred embodiment, the Cu layer27is, for example, a Cu plated layer. However, the present invention is not limited thereto. For example, a paste may be applied to the Cu layer27. The Cu layer27covers not only the board end surfaces CK on both sides of the interposer board20, but also a portion of the board main surface AK in the vicinity of the board end surface CK, and a portion of the board side surface BK in the vicinity of the board end surface CK. Ni Plated Layer28 The Ni plated layer28is provided on the outer periphery of the Cu layer27. The Ni plated layer28covers the Cu layer27. The Ni plated layer28may include, for example, plating of Ni or an alloy including Ni. Similarly to the Cu layer27, the Ni plated layer28covers not only the board end surfaces CK on both sides of the interposer board20, but also a portion of the board main surface AK in the vicinity of the board end surface CK and a portion of the board side surface BK in the vicinity of the board end surface CK. Furthermore, the external electrodes14each include the Ni plated layer14c. However, the Ni plated layer14cof the external electrode14is not connected to the Ni plated layer28of the interposer board20. Second Sn Plated Layer29 The second Sn plated layer29is provided on the outer periphery of the Ni plated layer28. The second Sn plated layer29covers the Ni plated layer28. The second Sn plated layer29includes, for example, plating of Sn or an alloy including Sn. Similarly to the Cu layer27, the second Sn plated layer29covers not only the board end surfaces CK on both sides of the interposer board20, but also a portion of the board main surface AK in the vicinity of the board end surface CK and a portion of the board side surface BK in the vicinity of the board end surface CK. First Sn Plated Layer30 The first Sn plated layer30is provided on the outer periphery of second Sn plated layer29. As described above, the first Sn plated layer30covers both the external electrode14of the electronic element10and the metal layer of the interposer board20. The first Sn plated layer30is provided over the metal layer of the board end surface CK of the interposer board20from the external electrode14of the electronic element10. Therefore, the first Sn plated layer30seamlessly connects the land91of the circuit board90and the external electrode14of the electronic element10. As a result, excellent conductivity can be ensured. Notch22 FIG.3is an enlarged view of a region P shown inFIG.2. Notches22are provided in the surface of the interposer board20in the vicinity of the board end surface CK. One or more of the notches22may be provided in a predetermined region. This region may include the board end surface CK, the board side surface BK in the vicinity of the board end surface CK, the board main surface AK in the vicinity of the board end surface CK, the ridge portion between the board end surface CK and the board side surface BK, the ridge portion between the board end surface CK and the board main surface AK, the ridge portion between the board side surface BK and the board main surface AK, and the corner portion among the board end surface CK, the board side surface BK, and the board main surface AK. Advantageous Effects of Notch22 The Cu fired layer23, the Cu layer27, the Ni plated layer28, the second Sn plated layer29, the first Sn plated layer30, or the like provided on the outer periphery of the interposer board20may enter the interior of the notches22provided in the interposer board20. Depending on the shape, position, depth, or size of the notch22, the number and type of layers that enter may vary. Thus, the Cu fired layer23, the Cu layer27, the Ni plated layer28, the second Sn plated layer29, the first Sn plated layer30, or the like enters the notches22, which provides an anchoring effect. Due to the anchoring effect, it is possible to increase the adhesive force of the Cu fired layer23, the Cu layer27, the Ni plated layer28, the second Sn plated layer29, and the first Sn plated layer30, to the interposer board20. Solder Layer40 The solder layer40is provided between the electronic element10and the interposer board20. The solder layer40joins the electronic element10and the interposer board20. The solder layer40may be, for example, a Sn cream solder layer. The Sn cream solder layer may include a flux including, for example, a rosin, an activator, or a solvent. The solder layer40is provided between the external electrode14on the multilayer body main surface AS2in the vicinity of the board of the electronic element10, and a portion where the diffusion layer24, the Cu fired layer23, the Cu layer27, the Ni plated layer28, and the second Sn plated layer29on the board main surface AK1in the vicinity of the electronic element of the interposer board20are provided. The solder layer40may include a solder unfilled region41. In the solder unfilled region41, the solder is not filled. The solder unfilled region41includes a cavity region41A and a flux region41B, for example. The cavity region41A may include, for example, air. The flux region41B may include, for example, flux. The flux may be, for example, a rosin, an activator, or a solvent included in the Sn cream solder. The solder layer40includes the solder unfilled region41such as the cavity region41A and the flux region41B. With such a configuration, cushioning properties can be provided between the electronic element10and the interposer board20. As a result, it is possible to reduce the transmission of impact to the electronic element10when an impact is applied to the circuit board90. Furthermore, beads or the like having a cushioning property may be mixed into the Sn cream solder. This may provide a cushioning region41C as the solder unfilled region41. Advantageous Effects of Interposer Board20 As described above, the electronic component1in which the electronic element10and the interposer board20are joined is mounted on the circuit board90. Thus, the electronic element10and the circuit board90sandwich the interposer board20such that the electronic element10and the circuit board90are connected to each other. The vibration generated from the electronic element10is attenuated when propagating through the interposer board20. Thus, it is possible to reduce or prevent the audible sound generated by the vibration propagating to the circuit board90. Manufacturing Method Next, a non-limiting example of a manufacturing method of the electronic component1according to the present preferred embodiment of the present invention will be described. The method of manufacturing the electronic component1includes a method of manufacturing the interposer board20and a method of attaching the interposer board20and the electronic element10.FIGS.4A-4Hare diagrams of a non-limiting example of a method of manufacturing the interposer board20.FIG.5is a flowchart of such a method of manufacturing the interposer board20. Board Preparing Process First, an elongated alumina board20A having a predetermined width is prepared (FIG.4Aand Step S1inFIG.5). Cu Paste and Glass Paste Application Process A Cu paste23A is applied along the width direction W to two coating positions which are spaced apart by a constant distance in the length direction L on the board main surface AK of the board20A. Furthermore, a glass paste25A forming the mark portion25is applied between the two coating positions. Either application of the Cu paste23A and the glass paste25A may be performed first (FIG.4Band Step S2inFIG.5). The Cu paste23A may include, for example, a Cu powder and a binder. The glass paste25A may include, for example, a glass powder, an alumina powder, and a binder. The application of the Cu paste23A and the application of the glass paste25A are performed by, for example, screen printing. The Cu paste23A is applied to both surfaces of the board main surface AK1in the vicinity of the electronic element of the board main surface AK and the board main surface AK2in the vicinity of the circuit board of the board main surface AK. At this time, the Cu paste23A may be applied thinner to the board main surface AK2in the vicinity of the circuit board than the board main surface AK1in the vicinity of the electronic element. In the present preferred embodiment of the present invention, the glass paste25A is applied to the board main surface AK1in the vicinity of the electronic element. The glass paste25A may be applied thinner than the Cu paste23A on the surface to be applied. Board Firing Process The board20A is heated to fire the Cu paste23A and the glass paste25A, thus forming the Cu fired layer23and the mark portion25including Si (FIG.4Cand Step S3inFIG.5). Through Hole Forming Process The middle portion of the Cu fired layer23of the board20A on which the Cu fired layer23and the mark portion25are fired is punched so as to penetrate in the thickness direction T, to form a through-hole21A defining and functioning as the recess (FIG.4Dand Step S4inFIG.5). Cutting Process Two locations where the Cu fired layer23is provided on the board20A are cut in a plane perpendicular or substantially perpendicular to the length direction L to form the interposer board20including the Cu fired layers23and the mark portion provided between the two locations where the Cu fired layers23are provided on the board main surface AK at both ends in the length direction L (FIG.4E, and Step S5ofFIG.5). The cutting may be performed by, for example, dicing or breaking. Dicing is a method of cutting using a dicer (dicing saw) that rotates at high speed. Breaking is a method in which a groove is formed in advance in the board20A, and the groove is split along the groove. Debris Removing Process Next, debris on the board side surface BK of the interposer board20, which is cut and exposed, is removed (FIG.4Fand Step S6ofFIG.5). Zn-Containing Layer Forming Process The Zn-containing layer26is formed on the board side surface BK of the interposer board20from which debris is removed. The Zn-containing layer forming process is, for example, a zincate treatment. Therefore, the Zn-containing layer forming process is a pretreatment process for obtaining a Zn-containing layer having favorable adhesion to alumina including Al (aluminum), which is a less-noble metal than Zn. In general, when the board side surface BK is immersed in an aqueous solution (zincate processing solution) in which Zn is dissolved, Al dissolves as ions because Zn has a more noble standard oxidation-reduction potential than Al. Electrons are generated at this time, and Zn ions receive the electrons on the surface of the board side surface BK, to form the Zn-containing layer on the surface of the board side surface BK (FIG.4G, and Step S7ofFIG.5). Since the Zn-containing layer26is formed on the board side surface BK in this way, the adhesion of the metal layers formed on the board side surface BK such as the Cu layer27, the Ni plated layer28, and the second Sn plated layer29is improved. Cu Layer Forming Process The Cu layer27is formed on the outer periphery of the interposer board20in the vicinity of the board end surface CK at both ends in the length direction L (FIG.4H, and Step S8ofFIG.5). In the present preferred embodiment of the present invention, the Cu layer27is formed by Cu plating. When the Cu plating is performed, since Zn is replaced by Cu, the Cu layer27is easily adhered to the board end surface CK. However, the Cu layer27is not limited to the plated layer. Here, not all Zn of the Zn-containing layer is replaced, and a portion of Zn remains on the board side surface BK, such that the Zn-containing layer26remains thin. Ni Plated Layer Forming Process The Ni plated layer28is formed on the outer periphery of the interposer board20where the Cu layer27is formed, in the vicinity of the board end surface CK at both ends in the length direction L (FIG.4Hand Step S9ofFIG.5). Second Sn Plated Layer Forming Process The second Sn plated layer29is formed on the outer periphery of the interposer board20where the Ni plated layer28is formed, in the vicinity of the board end surface CK at both ends in the length direction L (FIG.4Hand Step S10ofFIG.5). Next, a non-limiting example of a method of attaching the interposer board20and the electronic element10will be described.FIGS.6A-6Dare diagrams of a method of attaching the interposer board20and the electronic element10.FIG.7is a flowchart of a method of attaching the interposer board20and the electronic element10. Jig Holding Process The interposer board20in which the Cu layer27, the Ni plated layer28, and the second Sn plated layer29are provided is provided and held in a jig100including a plurality of recessed insertion portions therein (FIG.6Aand Step S11ofFIG.7). Solder Providing Process The cream solder40A is provided on the board main surface AK1of the interposer board20in the vicinity of the electronic element which is one of the board main surfaces AK (FIG.6Band Step S12ofFIG.7). Electronic Element Attaching Process The electronic element10is provided on the board main surface AK1in the vicinity of the electronic element of the interposer board20on which the solder40A is provided (FIG.6Cand Step S13ofFIG.7). First Sn Plated Layer Forming Process The first Sn plated layer30A is formed which covers both the external electrode14of the electronic element10and the metal layer of the interposer board20(FIG.6Dand Step S14ofFIG.7). Advantageous Effects of First Preferred Embodiment As described above, according to the first preferred embodiment of the present invention, the interposer board20is an alumina board. Alumina is generally harder than epoxy resin or the like, which is a common material for insulation boards. Therefore, it is possible to provide an electronic component including the interposer board20that is resistant to deflection. In addition, alumina is harder than epoxy resin or the like. This is also effective in reducing or preventing noise. The width WK of the interposer board20is smaller than the width WS of the electronic element10. The length LK of the interposer board20is smaller than the length LS of the electronic element10. Therefore, the entire interposer board20is covered by the electronic element10in a plan view. Therefore, when mounting the interposer board20of the electronic component1on the circuit board90, the arrangement is not limited due to the size of the interposer board20. Furthermore, the interposer board20is not visible in a plan view. For this reason, it has excellent aesthetics. Each of the pair of board end surfaces CK of the interposer board20includes a recess21. The recess21has a semi-elliptical or substantially semi-elliptical shape in a plan view as shown inFIG.1. By providing the recess21, it is possible to accumulate a solder layer40to join the lands91of the electronic component1and the circuit board90, in a space provided by the recess21. Thus, it is possible to reduce or prevent wetting of the solder layer40on the end surface in the length direction L of the electronic element10. The external electrodes14each include the electrically conductive resin layer14b. The electrically conductive resin layer14bincludes a thermosetting resin. For this reason, the electrically conductive resin layer14bis more flexible than, for example, a metal layer made of a plated film or a fired product of a conductive paste. Therefore, even when an impact caused by physical shock or thermal cycling on the electronic component1is applied, the electrically conductive resin layer14bdefines and functions as a buffer layer. Thus, cracks in the electronic component1are prevented from occurring. Furthermore, it is easy to absorb piezoelectric vibration, and it is possible to reduce or prevent “noise”. The Cu fired layer23is provided on the board main surface AK of the interposer board20in the vicinity of the board end surface CK. By the Cu fired layer23being provided in this way, the adhesion force of the Cu plated layer provided on the outer periphery of the Cu fired layer23to the board main surface AK of the interposer board20is improved. The Cu fired layer23may be thinner from the board end surface CK toward the middle portion along the length direction L on the board main surface AK. Therefore, when mounting the electronic element10on the interposer board20using the solder40A, the posture of the electronic element10is easily stabilized. The notches22are provided on the surface of the interposer board20in the vicinity of the board end surface CK. The Cu fired layer23, the Cu layer27, the Ni plated layer28, the second Sn plated layer29, the first Sn plated layer30, or the like provided on the outer periphery of the interposer board may enter the interior of the notches22provided in the interposer board20. This provides an anchoring effect. Due to the anchoring effect, it is possible to increase the adhesive force of the Cu fired layer23, the Cu layer27, the Ni plated layer28, the second Sn plated layer29, and the first Sn plated layer30, to the interposer board20. The first Sn plated layer30is provided. The first Sn plated layer30covers both the external electrode14of the electronic element10and the metal layer of the interposer board20. The first Sn plated layer30is provided over the metal layer of the board end surface CK of the interposer board20from the external electrode14of the electronic element10. Therefore, the first Sn plated layer30seamlessly connects the land91of the circuit board90and the external electrode14of the electronic element10. As a result, excellent conductivity can be ensured. The mark portion25is provided on the board main surface AK1in the vicinity of the electronic element. As a result, the mark portion25defines and functions as a mark to identify the board main surface AK1in the vicinity of the electronic element on which the Cu fired layer23is provided thicker. The mark portion25includes alumina. Therefore, it is possible to firmly adhere to the interposer board20made of alumina. The mark portion25is thinner than the Cu fired layer23. Therefore, when mounting the electronic element10to the interposer board20, the mark portion25provided at the middle portion in the length direction L and the width direction W does not contact the electronic element10. Thus, the mounting of the electronic element10does not become unstable. When joining the electronic element10and the interposer board20, there are cases where alignment using a camera is performed. In these cases, photographing is performed from the side of the interposer board20. When the mark portion25is provided on the board main surface AK2in the vicinity of the circuit board, the mark portion25is visible during the alignment using a camera. Therefore, the alignment is easily performed. The solder layer40includes the solder unfilled region41. In the solder unfilled region41, the solder is not filled. The solder unfilled region41defines and functions as the cavity region41A, the flux region41B, or the cushioning region41C. The solder layer40includes the solder unfilled region41. With such a configuration, cushioning properties can be provided between the electronic element10and the interposer board20. As a result, it is possible to reduce the transmission of impact to the electronic element10when an impact acts on the circuit board90. Before forming the metal layer on the board side surface BK of the interposer board20, the Zn-containing layer26is formed by the Zn-containing layer forming process, which is a zincate treatment. Since the Zn-containing layer26is formed on the board side surface BK in this way, the adhesion of the metal layers formed on the board side surface BK such as the Cu layer27, the Ni plated layer28, and the second Sn plated layer29is improved. Second Preferred Embodiment Next, a second preferred embodiment of the present invention will be described. In the first preferred embodiment of the present invention, in the Zn-containing layer forming process in Step S7, the Zn-containing layer26is formed on the board side surface BK of the interposer board20. In contrast, in the second preferred embodiment of the present invention, as Step S7, for example, a Pd (palladium)-containing layer forming process is performed, instead of the Zn-containing layer forming process. As a result, a Pd-containing layer26ashown as a common portion with the Zn-containing layer26inFIG.2is formed. The application of Pd is not limited to this. The application of Pd is performed using, for example, the following (1) method of holding by an elastic body holder, or (2) method of holding by an adhesive layer. (1) Method of Holding by Elastic Body Holder FIG.8is a diagram of a non-limiting example of a method of holding the interposer board20by an elastic body holder201. The elastic body holder201is a plate-shaped member made of, for example, a silicone-based or fluorine-based rubber. The elastic body holder201includes a holding hole204that receives the interposer board20, for example, in the length direction L. The inner dimension of the holding hole204may be smaller than the cross-sectional dimension of the interposer board20. Therefore, when the interposer board20is inserted into the holding hole204, the interposer board20is held in close contact. Next, for example, by sputtering as the dry plating method, the step of adhering Pd on the board end surface CK of the interposer board20is performed. In the case of sputtering, the elastic body holder201is opposed to the target205. Then, in the interposer board20held by the elastic body holder201, the metal particles are spattered toward the board end surface CK facing the opening side of the holding hole204, as indicated by the arrow. As a result, a metal film is formed on the board end surface CK, such that Pd is formed. (2) Method of Holding by Adhesive Layer FIG.9is a diagram of a non-limiting example of a method of holding the interposer board20by a holder301including an adhesive film303. The holder301includes a base material302and an adhesive film303made of an elastic body such as, for example, silicon rubber. For example, a chip aligner (not shown) is used to press the plurality of interposer boards20provided in line against the adhesive film303. As a result, the interposer boards20are adhered to the adhesive film303, and aligned with and held by each holder301as shown inFIG.9. On the other hand, a Pd catalyst305is provided on a platen304with a predetermined thickness. The holder301holding the interposer board20is brought close to the platen304with the interposer board20facing downward, as indicated by the arrow. As a result, one of the board end surfaces CK of the interposer board20is dipped into the Pd catalyst. The interposer board20is then lifted from the Pd catalyst. As a result, a Pd film is formed on the board end surface CK of the interposer board20. Similarly, a Pd film is also formed on the other one of the board end surfaces CK of the interposer board20. The Pd-containing layer is formed on the board side surface BK of the interposer board20by using (1) the method of holding by the elastic body holder or (2) the method of holding by the adhesive layer. Except for the Pd including-containing layer forming process of Step S7, the processes are the same or substantially the same as those of the first preferred embodiment of the present invention. Therefore, their descriptions are omitted. Also in the second preferred embodiment of the present invention, the Cu layer27is formed after the Pd-containing layer forming process, as in the first preferred embodiment of the present invention. However, in the second preferred embodiment of the present invention, the Cu layer27is formed by, for example, electroless plating. During Cu plating, although Pd is replaced by Cu, not all Zn of the Pd-containing layer is replaced, and a portion of Pd remains on the board side surface BK, such that the Pd-containing layer remains thin. Also in the second preferred embodiment of the present invention, since Pd is replaced with Cu at the time of Cu plating, the adhesiveness of the Cu layer27, the Ni plated layer28, and the second Sn plated layer29, which are metal layers provided on the board side surface BK, is improved as in the first preferred embodiment of the present invention. Furthermore, the other advantageous effects are the same or substantially the same as those of the first preferred embodiment of the present invention. Third Preferred Embodiment Next, a third preferred embodiment of the present invention will be described. In the first preferred embodiment of the present invention, in the Zn-containing layer forming process of Step S7, the Zn-containing layer is formed on the board side surface BK of the interposer board20. In contrast, in the third preferred embodiment of the present invention, as Step S7, a Cu-containing layer forming process is performed, instead of the Zn-containing layer forming process. As a result, a Cu-containing layer26bshown as a common portion with the Zn-containing layer26inFIG.2is formed. The application of Cu is not limited to this. The application of Cu is performed, for example, in the same or substantially the same manner as in the second preferred embodiment of the present invention using (1) the method of holding by the elastic body holder or (2) the method of holding by the adhesive layer. Using (1) the method of holding by the elastic body holder or (2) the method of holding by the adhesive layer, the Cu-containing layer is formed on the board side surface BK of the interposer board20. Except for the Cu-containing layer forming process of Step S7, the processes are the same or substantially the same as those of the first preferred embodiment of the present invention. Therefore, their descriptions are omitted. Also in the third preferred embodiment of the present invention, the Cu layer27is formed by Cu plating after the Cu-containing layer forming process, as in the first preferred embodiment of the present invention. Therefore, the Cu-containing layer remains inside the Cu layer27formed by Cu plating. Also in the third preferred embodiment of the present invention, since the Cu-containing layer is formed when performing Cu plating, the adhesiveness of the Cu layer27, the Ni plated layer28, and the second Sn plated layer29, which are metal layers formed on the board side surface BK, is improved as in the first preferred embodiment of the present invention. Furthermore, the other advantageous effects are the same or substantially the same as those of the first preferred embodiment of the present invention. While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims. | 47,666 |
11942274 | In the figures, identical or functionally identical components are provided with the same reference signs. DETAILED DESCRIPTION FIG.1Ais an oblique view, by way of example, of a film capacitor100of the prior art, which is designed in the form of a stacked capacitor. The capacitor100shown comprises dielectric films105which are arranged in layers one above the other. The stacked capacitor, thus resulting, comprises a first and second end side face in each case, on the surfaces of which a first electrically conductive layer110and a second electrically conductive layer120are arranged, correspondingly, in each case. In this case, the electrically conductive layers are arranged such that the surface normals thereof are perpendicular to the surface normals of the dielectric films of the capacitor which are arranged in layers one above the other. The electrically conductive layers serve as a contact surface for electrical contacting of the capacitor. The electrically conductive layers can also be designed as schoopage layers. FIG.1Bis an oblique view, by way of example, of a film capacitor100of the prior art, which is designed in the form of a flat-wound capacitor. The capacitor100comprises dielectric films105. These are wound around a winding mandrel, during manufacture, such that a film capacitor in the form of a round-wound capacitor results. In order to achieve the form of a flat-wound capacitor, the winding mandrel is subsequently removed or the winding resulting from winding the dielectric films105is removed from the winding mandrel, and subsequently the winding is flattened under the action of pressure and brought into the shape of an oval, such that the form of a flat-wound capacitor, shown inFIG.1B, is created from the form of a round-wound capacitor. In this case, the cavity previously occupied by the winding core disappears completely due to the deformation under the action of pressure. The film capacitor, thus resulting, comprises a first and second end side face in each case, on the surfaces of which a first electrically conductive layer110and a second electrically conductive layer120are applied, correspondingly, in each case. In this case, the electrically conductive layers are arranged such that the surface normals thereof are perpendicular to the surface normals of the wound dielectric films of the capacitor. The electrically conductive layers serve as a contact surface for electrical contacting of the capacitor. The electrically conductive layers can be designed as schoopage layers. FIGS.2A and2Bare, respectively, a perspective view and a side view, by way of example, of a capacitor assembly200of the prior art. In this case, an assembly is shown which comprises four individual capacitors100. However, the view shown inFIG.2A, by way of example, of a capacitor assembly can readily be transferred to an assembly that comprises more or fewer than the number of individual capacitors shown. In this case, the individual capacitors100may be capacitors as have been described for example in connection withFIG.1AandFIG.1B. In order to electrically connect the individual capacitors to form an assembly, a first joint plate210is used which can be arranged on the top side of the assembly and in each case contacts the first electrically conductive layers110of the individual capacitors. A second joint plate220can be arranged on the bottom side and a lateral side of the assembly. The second joint plate220can be L-shaped. The second joint plate220in each case contacts the second electrically conductive layers120of the individual capacitors. The first joint plate210and the second joint plate220are electrically isolated from one another, at corresponding portions of the first joint plate210and of the second joint plate220, by an isolation layer230, such that the capacitors are interconnected in parallel. However, the L-shape of the second joint plate220has an unfavorable effect on the parasitic inductances, since the L-shape constitutes a partial loop, and thus has a non-negligible self-inductance, which has a disadvantageous effect in particular at high frequencies. FIG.3Ais an oblique view of a film capacitor300according to the invention in the form of a stacked capacitor according to an embodiment, the basic shape of which is constructed as described above with respect toFIG.1A. The capacitor300shown is constructed from dielectric films305which are arranged in layers one above the other and which can be metallized entirely, in part, or not at all. The dielectric films may for example comprise plastics films consisting of a suitable dielectric material, it being possible for example for polyester (PET), polyethylene naphthalate (PEN), polyphenylene sulfide (PPS), polypropylene (PP), polytetrafluoroethylene (PTFE), polystyrene (PS), polycarbonate (PC), or similar plastics materials, to be selected as the dielectric material for the plastics films, according to the desired operating parameters of the capacitor. Correspondingly suitable papers can also be possible as dielectric films. The stacked capacitor comprises a first and second end side face in each case, on the surfaces of which a first electrically conductive layer310and a second electrically conductive layer320are arranged, correspondingly, in each case. The electrically conductive layers310and320are arranged such that the surface normals thereof are perpendicular to the surface normals of the dielectric films of the capacitor which are arranged in layers one above the other. The electrically conductive layers310and320serve as a contact surface for electrical contacting of the capacitor. The electrically conductive layers310and320can also be designed as schoopage layers. FIG.3Bis an oblique view of a film capacitor300according to the invention in the form of a flat-wound capacitor according to a preferred embodiment, the basic shape of which is constructed as described above with respect toFIG.1B. The capacitor300shown is constructed from dielectric films305which can be metallized entirely, in part, or not at all. As in the case of the film capacitor shown inFIG.3A, the dielectric films may for example comprise plastics films consisting of a suitable dielectric material, it being possible for example for polyester (PET), polyethylene naphthalate (PEN), polyphenylene sulfide (PPS), polypropylene (PP), polytetrafluoroethylene (PTFE), polystyrene (PS), polycarbonate (PC), or similar plastics materials, to be selected as the dielectric material for the plastics films, according to the desired operating parameters of the capacitor. Correspondingly suitable papers can also be possible as dielectric films. The wound capacitor comprises a first and second end side face in each case, on the surfaces of which a first electrically conductive layer310and a second electrically conductive layer320is arranged, correspondingly, in each case. The electrically conductive layers310and320are arranged such that the surface normals thereof are perpendicular to the surface normals of the wound dielectric films of the capacitor. The electrically conductive layers310and320serve as a contact surface for electrical contacting of the capacitor300. The electrically conductive layers310and320can be designed as schoopage layers. In contrast with the capacitors of the prior art, shown by way of example inFIGS.1A and1B, the film capacitor300according to the invention inFIG.3A(stacked capacitor) and3B (flat-wound capacitor) comprises a passage340which extends from the outer surface of the first electrically conductive layer310to the outer surface of the second electrically conductive layer320. Said passage340is formed by removing capacitor material, for example parts of the dielectric films of the film capacitor and (if present) parts of a flexible core tube, which served as the winding core. In this case, the passage340can extend in a substantially perpendicular direction or at an angle with respect to the electrically conductive layers. In this case the passage340may be shaped uniformly or may have a lateral surface that is of different dimensions in different portions of the passage340. The base area of the passage340may have a circular or elliptical surface area. However, in general the base area may be of any desired surface shape, for example the shape of a polygon. The passage340can be arranged centrally in the first, the second, or in the first and second electrically conductive layer. The passage340can, however, also be arranged in the first, the second, or in the first and second electrically conductive layer310and320so as to be off-center in the first and second electrically conductive layer310and320, respectively. FIG.3Cis a cross-sectional view of a film capacitor300according to the invention according to a preferred embodiment. The capacitor shown comprises dielectric films305which may be wound or layered. The dielectric films may comprise films made of dielectric material, as shown above with respect toFIGS.3A and3B. A first electrically conductive layer310is arranged on the end faces, in each case, and a second electrically conductive layer320is arranged on the opposing side. Furthermore, a passage340is formed which extends from the outer surface of the first electrically conductive layer310to the outer surface of the second electrically conductive layer320. Said passage340can be formed by removal of capacitor material, for example parts of the dielectric films of the film capacitor and (if present) parts of a flexible core tube, which served as a winding core. In this case, the individual elements and components of the capacitor can be arranged and formed as has been described for example in connection withFIGS.3A and3B. The electrically conductive layers310,320of the film capacitors are suitable for being electrically connected to connection elements. The film capacitors can be electrically connected for example to a printed circuit board via said connection elements, by soldering or welding, or any other suitable manner of connection. The above-described passage340according to the invention, through the film capacitor, allows for the use of an electrical connecting line350(see for exampleFIG.4B) which extends from the first310or second320electrically conductive layer on one end face of the capacitor300, through the passage340, to the other end face, respectively. Here, the electrical connecting line350is connected to a connection element, such that the respective connection elements for the two electrically conductive layers or connecting poles of the capacitor can be arranged on just one side of the capacitor. In this way, routings are avoided which are arranged on the outside, around the capacitor. This leads on the one hand to a saving of line material, but on the other hand in particular also to a significant reduction in parasitic inductances. Any desired number of capacitor assemblies, formed in this way, can be arranged in parallel or in series, and side-by-side or one above the other, and thus form larger tightly packed capacitor assemblies. Furthermore, the individual capacitors can be arranged in an alternating manner, with respect to the polarity thereof. Thus, adjacent individual capacitors can be arranged, oriented and electrically contacted such that a first capacitor has a first polarity, and a second adjacent capacitor has an opposing polarity. A method for manufacturing the film capacitor according to the invention essentially comprises two steps. In a first step, a film capacitor in the form of a flat-wound capacitor or stacked capacitor is manufactured by means of methods known from the prior art. For example, firstly a film capacitor in the form of a round winding is manufactured by winding metallized dielectric films onto a winding mandrel. Subsequently, the winding mandrel is removed from the center of the round winding, or the winding resulting from winding the dielectric films is removed from the winding mandrel. The removed winding is then deformed or pressed flat, under pressure. In this case, the opening originally left behind by the removed winding mandrel is then completely pressed together and closed by the deformation step, such that there is no longer any opening present. A capacitor in the form of a flat winding is obtained by the deformation. When a flexible core tube is used as the winding core, the core tube can also remain in the center of the round winding. The flexible core tube is then pressed together with the winding, such that there is no longer any opening present. Alternatively, a stacked capacitor can be produced by layering dielectric films one on top of the other. In an additional step, the passage according to the invention is subsequently created. In this case, said step comprises the removal of capacitor material, for example parts of the dielectric films of the film capacitor and (if present) parts of a flexible core tube, which served as a winding core, of the film capacitor manufactured in the first step. The removal of capacitor material can generally take place using any suitable production method, e.g. by machining methods. The removal of capacitor material can preferably take place by means of a drilling procedure, it being possible for the drilling procedure to be carried out using a cutting drill. The cutting drill comprises commercially available HSS drills for metal and plastics processing. However, the passage can for example also be produced by milling or using a laser. The drilling procedure can be performed using one or more optimized parameters, the one or more optimized parameters including an optimized drilling speed and/or an optimized advancement speed. In this respect, the drilling procedure can also be performed in a manner having an oscillating advancement. In this case, the drilling procedure is performed in a manner having a continuous advancement, the continuous advancement being repeatedly temporarily reversed. The method according to the invention for manufacturing a film capacitor according to the invention has the advantage that the film capacitor is firstly manufactured according to one of the known manufacturing methods, such that initially no changes or additional costs arise during the manufacturing. Only then is the passage created, in an additional step, it being possible for this step, too, to be performed in a cost-effective manner. In the following, the way in which a plurality of capacitors can be interconnected to form a capacitor assembly is described.FIGS.4A and4Bare, respectively, a perspective view and a cross-sectional view of a capacitor assembly400according to the invention, according to a first embodiment. In this case, a capacitor assembly400is shown which comprises four individual film capacitors300, as are described for example in connection withFIGS.3A,3B and3Cand which are connected in parallel. However, it should be clear to a person skilled in the art that the view shown inFIG.4A, by way of example, of a capacitor assembly comprising four film capacitors can readily be transferred to an assembly that comprises more or fewer than the number of individual capacitors shown. For example, in the case of a capacitor assembly comprising just one film capacitor300, a first connection element410can be connected to the first310or the second320electrically conductive layer of the film capacitor300. A second connection element420is connected to the other electrically conductive layer, in each case, by an electrically conductive connection350which is guided through the passage340. In this case, the first and the second connection element410and420, respectively, are arranged so as to be electrically isolated from one another, side-by-side or one above the other, on the same end side face of the film capacitor300, which is opposite the electrically conductive layer that is connected to the electrically conductive connection350. In the case of a capacitor assembly comprising a plurality of film capacitors, these can in each case be coupled or contacted with one another in series or in parallel, by means of a plurality of connection elements. Optionally, one or more additional connection elements are utilized as neutral conductors. In this case, all the connection elements are arranged so as to be electrically isolated from one another, side-by-side or one above the other on the end side faces of the film capacitors of the capacitor assemblies which are opposite the electrically conductive layers of the film capacitors that are contacted by the electrically conductive connections. InFIG.4AandFIG.4B, the capacitors300of the capacitor assembly400are arranged side-by-side. They can, however, also be arranged one above the other, or side-by-side and one above the other. In this case, the individual capacitors300are film capacitors as have been described for example in connection withFIG.3A,3BandFIG.3C. The individual film capacitors can be electrically isolated from one another by means of a suitable isolation or isolation layer330. In order to electrically interconnect the individual film capacitors, for example a first joint plate410is arranged, as a first connection element410, on the first electrically conductive layer310, in each case, of the individual film capacitors, and electrically contacts said capacitors. Furthermore, a second joint plate420is arranged on the outer surface of the first joint plate410, as a second connection element420. An isolation layer430is arranged between the first joint plate410and the second joint plate420, which isolation layer electrically isolates the first joint plate410and the second joint plate420from one another. The second joint plate420can contact the second electrically conductive layers320, in each case, of the individual film capacitors300, without in the process guiding line elements around the assembly400, as has been described for example in connection withFIGS.2A and2B. For this purpose, recesses are arranged in the first joint plate410and in the isolation layer430located between the first joint plate410and second joint plate420, at portions on which in each case the passages340of the individual film capacitors300are arranged with respect to the first joint plate410and the isolation layer430located between the first joint plate410and the second joint plate420. The second joint plate420can thus contact the second electrically conductive layers320of the individual film capacitors300, located in each case on the opposing end face, by means of connecting lines350which in each case extend through the passages340and contact the second electrically conductive layers320in each case. Instead of the joint plates, used by way of example as connection elements in the embodiment in the figures, for example conductors, wires, flat wires, gratings or busbars, or also any other conductor configurations suitable as connection elements, can also be used for the connection elements410,420. The first and second connection elements can also be designed differently. Such a configuration and arrangement of the individual components and elements has several advantages. Since currents flow in opposite directions, in each case, in the first connection element410and in the second connection element420, which are arranged adjacently and in parallel with one another, the magnetic fields generated in the connection elements410and420compensate one another. This leads to a significant reduction of parasitic inductances. Since the connection elements410and420cover the one or more capacitors300on just one side, the capacitor assembly400can furthermore be cooled significantly more efficiently and more uniformly, since the majority of the cabling is provided on just one side, and an increased number of connection elements for integral cooling is possible. Adjacent individual capacitors300can also be arranged such that a first capacitor has a first polarity at the first electrically conductive layer310thereof, and a second adjacent capacitor has a second polarity at the first electrically conductive layer310thereof, which is opposite to the polarity of the first conductive layer310of the first adjacent capacitor. The first and second connection elements410and420are then correspondingly connected to the first and second conductive layers310and320of the capacitors such that the first connection element is assigned one polarity, and the second connection element is assigned the corresponding opposite polarity. FIG.5shows a capacitor assembly500of the prior art (similar to that shown inFIG.2A) comprising four film capacitors100(flat-wound, stacked, or round-wound capacitors) arranged side-by-side, which are interconnected in parallel by joint plates510and520, known as busbars. One busbar contacts the first electrically conductive layers of the film capacitors, and a second busbar contacts the second electrically conductive layers of the film capacitors. The two busbars510,520are arranged on the outside of the film capacitors and extend through an isolation530in a manner electrically isolated from one another, and run together at a connection point, e.g. for connection to an IGBT. FIG.6Ashows a capacitor assembly600consisting of two capacitor subassemblies, similar to those shown inFIG.4A, each comprising four film capacitors (flat-wound, stacked, or round-wound capacitors) which are arranged in two courses, one above the other. In this case, the first and second electrically conductive layers310,320of the film capacitors300in each case correspondingly contact a first connection element610and a second connection element620of the capacitor assembly600, in order to form a parallel connection of the film capacitors300. As set out above with respect toFIG.4B, in each case recesses in the connection elements610,620, designed by way of example inFIG.6Aas joint plates, and the isolation630allow for the parallel interconnection of the film capacitors300. Reference sign350denotes the connecting lines which are contacted at the outer electrically conductive layers of the film capacitors of the capacitor subassemblies arranged at the top or bottom for example by means of soldering, and which extend in each case through the passages340of the film capacitors300, in order to then contact the first or second connection element. A first joint plate610of the joint plates arranged centrally between the film capacitor courses or subassemblies is directly connected to the corresponding centrally arranged first electrically conductive layers310of the film capacitors of the first capacitor subassembly. A second joint plate620arranged centrally between the film capacitor courses is directly connected to the corresponding centrally arranged second electrically conductive layers320of the film capacitors of the second capacitor subassembly. The electrically conductive layers310and320of the film capacitors of the two capacitor subassemblies that are arranged on the outside (at the top and bottom, on the capacitor assembly600, inFIG.6A) are in each case connected to the first and second joint plates610and620, by means of connecting lines350extending through the passages of the film capacitors, such that the first joint plate610contacts the first electrically conductive layer310of the film capacitors of the second (top) capacitor subassembly, and the second joint plate620contacts the second electrically conductive layer320of the film capacitors of the first (bottom) capacitor subassembly. It has been found that such a division of a large film capacitor of the prior art, as shown inFIG.5, into two film capacitors of half winding height and joint plates arranged between the film capacitors, as shown inFIG.6A, leads to extremely low inductance which is smaller, by approximately a factor of 10, than in the case of a large film capacitor of the prior art. This is in particular due to the absolutely symmetrical capacitor structure, without induction loops. The thermal losses during operation under load are also smaller by approximately a factor of 4, since halving the winding height compared with the film capacitor assembly of the prior art achieves a disproportionate reduction in the capacitor internal resistance and thus the thermal losses, at an almost identical volume and at identical electrical values (capacitance and nominal voltage) as in the film capacitor assembly of the prior art shown inFIG.5. FIG.6Bshows a first connection element610in the form of a first joint plate610which is directly connected to the first electrically conductive layers310of the bottom course of film capacitors and also comprises electrical connecting lines350, upwards, via which the connection to the first electrically conductive layers310of the upper course of film capacitors is achieved. A second connection element620in the form of a second joint plate620lies on the first connection element610in a manner electrically isolated by an isolation layer630. Recesses for the electrical connecting lines350connected to the first joint plate310are provided in the second joint plate620and the isolation layer630. As shown inFIG.6A, the second joint plate620directly contacts the second electrically conductive layers320of the top course of film capacitors. Just like the first joint plate610, the second joint plate620also comprises electrical connection lines350(not shown) which extend downwards through the film capacitors of the first subassembly and electrically contact the respective second electrically conductive layers320of the bottom course of film capacitors. For this purpose, corresponding recesses are also provided in the first joint plate610and the isolation layer630. Two courses of four film capacitors in each case are shown by way of example inFIGS.6A and6B. However, the courses can also comprise more or fewer film capacitors. The film capacitors shown by way of example inFIGS.6A and6Bcomprise passages as have been described with respect to the film capacitors according to the invention ofFIGS.3a,3B and3C. In the case of film capacitors without a passage according to the invention or a hollow winding core, the connecting lines can also extend on the outside of the film capacitors. FIG.7Ashows, by way of example, a capacitor assembly700according to the invention, according to a further embodiment which is a modification of the embodiment described inFIGS.4A and4B. Two capacitor subassemblies, each comprising of one film capacitor, are connected in series by means of three connection elements710,720,740which are electrically isolated from one another by means of isolations730. Recesses (not shown) in the connection elements710,720,740, designed by way of example as joint plates, and the isolations730allow for the contacting of the individual connection elements which is utilized for the series connection. It is also possible for more than two capacitor subassemblies to be interconnected in series, by means of a corresponding number of connection elements. In this case, the capacitor subassemblies can each consist of a capacitor assembly comprising just one film capacitor, or of a capacitor assembly comprising a plurality of film capacitors connected in parallel (as shown for example with reference toFIGS.4A and4B). FIG.7Bis a cross-sectional view of the capacitor assembly700according to the invention according toFIG.7A. The capacitor assembly700comprises at least two integrated individual capacitor subassemblies700a,700bwhich are connected in series. The capacitor assembly700may comprise n capacitor subassemblies700a,700bconnected in series. The capacitor subassemblies700a,700bmay comprise individual capacitors or a plurality of capacitors. It is also possible, for example, for a plurality of capacitor subassemblies, comprising capacitors arranged in parallel, to be connected in series, as were described with respect toFIGS.4A,4B and6A. The capacitor assembly700can therefore be expanded as desired. In order to achieve the desired series connection of the capacitor subassemblies shown, three connection elements710,720and740are utilized. In this embodiment, a third connection element740is arranged between a first connection element710and the first electrically conductive layers310a,310b, in each case, of the individual capacitors or capacitor subassemblies. In addition, an isolation or isolation layer730, which electrically isolates the first connection element710and the third connection element740from one another, is arranged between the third connection element740, which functions as a neutral conductor, and the first connection element710. The series connection optionally results in an alternating interconnection of the windings at the polarity. Recesses, which are arranged according to the positions of the passages340a,340bof the capacitors or the capacitor subassemblies700a,700bof the capacitor assembly700, are arranged in corresponding portions of the third connection element740and the isolation layer730, between the third connection element740and the first connection element710. Via said recesses, the first connection element710can contact the second electrically conductive layer320bof the second capacitor subassembly700bby means of a connecting line350b, which extends through the passage340b. Furthermore, recesses, which are arranged according to the position of the passage340aof the capacitor of a further capacitor subassembly700aof the capacitor assembly700, are arranged in corresponding portions of the third connection element740and the isolation layer730, between the third connection element740and the first connection element710, and of the isolation layer730between the first connection element710and the second connection element720, and of the first connection element710. The second connection element720can thereby contact the second electrically conductive layers320aof the capacitor subassembly700aby means of a connecting line350a, which extends through the passage340a. Individual capacitors can be arranged such that in each case closest neighbors of the individual capacitors belong, in each case, to another capacitor subassembly. The capacitor assembly700described has the same advantages as have already been explained in connection withFIGS.4A and4B. In the embodiment shown inFIGS.7A and7B, joint plates were used as connection elements. However, for example conductors, wires, flat wires, gratings, or busbars can also be used as connection elements. The sequence of the layering of the individual connection elements710,720and740can be varied as desired, while maintaining the above-described contacting systematics. As described above with respect toFIG.7A, it is also possible for more than two capacitor subassemblies to be interconnected in series, by means of a corresponding number of connection elements and the contacting thereof. FIG.8shows a capacitor assembly of the prior art comprising four film capacitors (flat-wound, stacked, or round-wound capacitors) arranged side-by-side, which are interconnected in series by joint plates, known as busbars. One busbar contacts the first electrically conductive layers of the film capacitors, and a second busbar contacts the second electrically conductive layers of the film capacitors. A third busbar serves as a neutral conductor. The busbars are electrically isolated from one another. All the busbars are arranged on the outside of the film capacitors and run together at a connection point, e.g. for connection to an IGBT. FIG.9Ashows, by way of example, a capacitor assembly according to the invention consisting of two capacitor subassemblies900each comprising four film capacitors (flat-wound, stacked, or round-wound capacitors) which are arranged in two courses, one above the other. In this case, a first connection element910contacts the first electrically conductive layers310of the film capacitors300of the first capacitor subassembly, and a second connection element920contacts the second electrically conductive layers320of the film capacitors300of the second capacitor subassembly. A third connection element940functions as a neutral conductor and contacts the second electrically conductive layer320, in each case, of the film capacitors of the first subassembly, by means of a first connecting line350, and contacts the first electrically conductive layer310, in each case, of the film capacitors300of the second subassembly, by means of a second connecting line350. Said first and second connecting lines can extend through inner passages in the film capacitors, from the first electrically conductive layer in each case, to the second electrically conductive layer in each case, or past the film capacitors on the outside. As a result, a series interconnection of the film capacitors is achieved. The individual connection elements910,920and940are electrically isolated from one another by isolation layers930. As set out above with respect toFIG.4B, in each case recesses in the connection elements910,920,940, designed by way of example inFIG.9A to9Cas joint plates, and the isolation930allow for the series interconnection of the film capacitors. Reference sign350denotes the connecting lines which proceed from the third connection element940, functioning as a neutral conductor, and which contact the outer electrically conductive layers of the film capacitors of the top or the bottom capacitor assembly or capacitor courses, for example by soldering. The first and second joint plates910and920, arranged centrally between the film capacitor courses, are directly connected to the corresponding centrally arranged first and second electrically conductive layers310,320, respectively, of the film capacitors300. It has been found here too that such a division of a large film capacitor of the prior art, as shown inFIG.8, into two film capacitors of half winding height and joint plates arranged between the film capacitors, as shown inFIG.9A, leads to extremely low inductance which is smaller, by approximately a factor of 10, than in the case of a large film capacitor of the prior art. This is in particular due to the absolutely symmetrical capacitor structure, without induction loops. The thermal losses during operation under load are also smaller by approximately a factor of 4, since halving the winding height compared with the film capacitor assembly of the prior art achieves a disproportionate reduction in the capacitor internal resistance and thus the thermal losses, at an almost identical volume and at identical electrical values (capacitance and nominal voltage) as in the film capacitor assembly of the prior art shown inFIG.8. The film capacitors shown by way of example inFIG.9A to9Ccomprise passages as have been described with respect to the film capacitors according to the invention ofFIGS.3A,3B and3C. In the case of film capacitors without a passage according to the invention or a hollow winding core, the connecting lines can also extend on the outside of the film capacitors. FIGS.4A,4B,6A,6B,7A,7B and9A to9Cshow, by way of example, parallel and series couplings of four film capacitors300in each case. In this case, the connection elements can also be arranged differently from the manner shown, in particular also in a different sequence, one above the other or side-by-side. Likewise, the number of film capacitors is not limited to four, and may include more of fewer film capacitor The following paragraphs describe additional embodiments. In some embodiments, a film capacitor (300) for power electronics, comprises: a first electrically conductive layer (310), which is arranged on a first end side face of the film capacitor (300), the surface normal of the first electrically conductive layer (310,310a,310b) being perpendicular to the surface normals of dielectric films (305) of the film capacitor (300),a second electrically conductive layer (320,320a,320b), which is arranged on a second end side face opposite from the first end side face, the surface normal of the second electrically conductive layer (320,320a,320b) being perpendicular to the surface normals of the dielectric films (305) of the film capacitor.the film capacitor (300) has at least one inner passage (340,340a,340b), which extends from the first electrically conductive layer (310,310a,310b) to the second electrically conductive layer (320,320a,320b), the passage (340,340a,340b) being formed by removal of capacitor material. In some embodiments, the film capacitor (300) is a flat-wound or stacked capacitor. In some embodiments, the passage (340,340a,340b) is a drilled hole. In some embodiments, the passage (340,340a,340b) extends in a substantially perpendicular direction with respect to the first electrically conductive layer (310,310a,310b) and the second electrically conductive layer (320,320a,320b). In some embodiments, at least one of the first electrically conductive layer (310,310a,310b) and the second electrically conductive layer (320,320a,320b) is a schoopage layer. In some embodiments, the dielectric films (305) of the film capacitor (300) comprise plastics films consisting of polyester (PET), polyethylene naphthalate (PEN), polyphenylene sulfide (PPS), polypropylene (PP), polytetrafluoroethylene (PTFE), polystyrene (PS), or polycarbonate (PC). In some embodiments, the dielectric films (305) are fully or partially metalized or not metallized. In some embodiments, an electrically conductive connection (350) is guided from the first (310) or the second (320) electrically conductive layer on one end side face of the film capacitor (300), through the passage (340), to the other end side face, respectively, of the film capacitor (300). In some embodiments, a first connection element (410) is connected to the first (310) or the second (320) electrically conductive layer of the film capacitor (300), wherein a second connection element (420) is connected to the other electrically conductive layer, in each case, via the electrically conductive connection (350) which is conducted through the passage (340), and wherein the first and the second connection element (410,420) are arranged so as to be electrically isolated (430) from one another, side-by-side or one above the other, on the same end side face of the film capacitor (300), which is opposite the electrically conductive layer that is connected to the electrically conductive connection (350). In some embodiments, a plurality of the capacitor assemblies described above are contacted with one another in series or in parallel by means of a plurality of connection elements (410,420;710,720,740), wherein all the connection elements are arranged so as to be electrically isolated from one another, side-by-side or one above the other on the end side faces of the film capacitors (300) of the capacitor assemblies which are opposite the electrically conductive layers of the film capacitors (300) that are contacted by the electrically conductive connections (350). In some embodiments, a plurality of the capacitor assemblies described above are arranged side-by-side,wherein a first connection element (410) is connected to the first electrically conductive layer (310) and/or the second electrically conductive layer (320) of the film capacitors (300) of the capacitor assemblies, in each case,wherein a second connection element (420) is connected to the first electrically conductive layer (310) and/or the second electrically conductive layer (320) of the film capacitors (300) of the capacitor assemblies, in each case, which are in each case of an opposite polarity with respect to the first and second electrically conductive layers (310,320), which are connected to the first connection element (410),wherein the first and the second connection element (410,420) are arranged so as to be electrically isolated from one another, side-by-side or one above the other, on the same end side face of the film capacitor (300), which is opposite the electrically conductive layer that is connected to the electrically conductive connection (350),wherein the connection of the first and second connection element (310,320) to the respective first and second electrically conductive layers is achieved in each case either directly or by means of the electrically conductive connection (350) which is guided through the passage (340) of the relevant film capacitor (300). In some embodiments, a layer of first capacitor assemblies described above is arranged side-by-side and is arranged above another layer of second capacitor assemblies, where the first and second electrically conductive layers (310,320) of which further layer in each case correspondingly contact the first connection element (410;610) and the second connection element (420;620) of the second capacitor assemblies in order to form a parallel connection of the film capacitors (300). In some embodiments, an aggregate capacitor assembly comprises a plurality of capacitor subassemblies (700a,700b), wherein the capacitor subassemblies (700a,700b) each comprise a capacitor assembly described above. The capacitor subassemblies (700a,700b) are connected in series by means of a third connection element (740), wherein the first, the second and the third connection element (710,720,740) are arranged so as to be electrically isolated from one another, side-by-side or one above the other, on the same end side face of the film capacitor (300), which is opposite the electrically conductive layer that is connected to the electrically conductive connection (350). In some embodiments, a capacitor assembly comprises a first subassembly comprising:at least one film capacitor comprising a first electrically conductive layer (310), which is arranged on a first end side face of the film capacitor, wherein the surface normal of the first electrically conductive layer (310) is perpendicular to the surface normals of the films of the film capacitor, and a second electrically conductive layer (320), which is arranged on a second end side face of the film capacitor, opposite the first end side face, in parallel with the first electrically conductive layer (320),a first connection element (610) which contacts the first electrically conductive layer (310) of the at least one film capacitor of the first subassembly, in each case;a second subassembly which is arranged over the first subassembly and comprises:at least one film capacitor comprising a first electrically conductive layer (310), which is arranged on a first end side face of the film capacitor, wherein the surface normal of the first electrically conductive layer is perpendicular to the surface normals of the films of the film capacitor, and a second electrically conductive layer (320), which is arranged on a second end side face of the film capacitor, opposite the first end side face, in parallel with the first electrically conductive layer (310),a second connection element (620) which contacts the second electrically conductive layer (320) of the at least one film capacitor of the second subassembly, in each case;wherein the first connection element (610) in each case contacts the first electrically conductive layer (310) of the at least one film capacitor of the second subassembly, by means of at least one first connecting line (350); andwherein the second connection element (620) in each case contacts the second electrically conductive layer (320) of the at least one film capacitor of the first subassembly, by means of at least one second connecting line (350). In some embodiments, the at least one film capacitor of the first and the second subassembly in each case comprise at least one inner passage (340) which extends from the first electrically conductive layer (310), in each case, to the second electrically conductive layer (320), in each case; andwherein the at least one first connecting line (350) and the at least one second connecting line (350) extend through the relevant inner passage (340). In some embodiments, the first connection element (610) and/or the second connection element (620) is arranged at least in part between the first subassembly and the second subassembly. In some embodiments, the first connection element (610) comprises recesses for conducting through the at least one second connecting line (350) of the second connection element (620), and the second connection element (620) comprises recesses for conducting through the at least one first connecting line (350) of the first connection element (610). In some embodiments, a capacitor assembly comprises:a first subassembly comprising:at least one film capacitor comprising a first electrically conductive layer (310), which is arranged on a first end side face of the film capacitor, wherein the surface normal of the first electrically conductive layer (310) is perpendicular to the surface normals of the films of the film capacitor, and a second electrically conductive layer (320), which is arranged on a second end side face of the film capacitor, opposite the first end side face, in parallel with the first electrically conductive layer (310);a first connection element (910) which contacts the first electrically conductive layer (310) of the at least one film capacitor of the first subassembly, in each case;a second subassembly which is arranged over the first subassembly and comprises:at least one film capacitor comprising a first electrically conductive layer (310), which is arranged on a first end side face of the film capacitor, wherein the surface normal of the first electrically conductive layer (310) is perpendicular to the surface normals of the films of the film capacitor, and a second electrically conductive layer (320), which is arranged on a second end side face of the film capacitor, opposite the first end side face, in parallel with the first electrically conductive layer (310),a second connection element (920) which contacts the second electrically conductive layer (320) of the at least one film capacitor of the second subassembly, in each case;a third connection element (940) comprising:at least one first connecting line (350) and at least one second connecting line (350), wherein the at least one first connecting line (350) of the third connection element (940) contacts the respective second electrically conductive layer (320) of the at least one film capacitor of the first subassembly,and wherein the at least one second connecting line (350) of the third connection element (940) contacts the respective first electrically conductive layer (310) of the at least one film capacitor of the second subassembly. In some embodiments, the at least one film capacitor of the first and the second subassembly in each case comprise at least one inner passage (340) which extends from the first electrically conductive layer (310), in each case, to the second electrically conductive layer (320), in each case; andwherein the at least one first connecting line (350) of the third connection element (940), and the at least one second connecting line (350) of the third connection element (940), extend through the relevant inner passage (340) of the film capacitor. In some embodiments, the first connection element (910) and/or the second connection element (920) and/or the third connection element (940) is arranged at least in part between the first subassembly and the second subassembly. In some embodiments, the first connection element (910) comprises recesses for conducting through the at least one first connection line (350) of the third connection element (940), and the second connection element (920) comprises recesses for conducting through the at least one second connecting line (350) of the first connection element (940). In some embodiments, the connection elements (410,420;610,620;710,720,740;910,920,940) are in each case designed as conductors, wires, ribbon wires, gratings, joint plates, or busbars. In some embodiments, a method is described for manufacturing a film capacitor (300) described above, wherein, in the case of the film capacitor, capacitor material is removed in order to produce a passage (340,340a,340b). In some embodiments, the step for producing the passage (340,340a,340b) comprises drilling using a cutting drill. In some embodiments, an advancement of the cutting drill during the drilling procedure is performed in a continuous or oscillating manner. | 48,530 |
11942275 | DESCRIPTION OF EMBODIMENTS The busbar structure for capacitor described herein are more specifically described below based on different examples of this invention. First Example InFIGS.1to3are illustrated a capacitor element1, electrodes1aand1bhaving different polarities disposed at axial both ends of the capacitor element1, a first busbar2, a second busbar3, a first body plate2A of the first busbar2, a second body plate3A of the second busbar3, a first plate portion2B which is one of opposing plate portions, and a second plate portion3B which is the other one of the opposing plate portions. The body plates2A and3A have an L-like bent shape. The opposing plate portions2B and3B, which are part of the body plates2A and3A, are disposed in adjacency and stand upright in parallel to each other. In these drawings are further illustrated a first fitting part (burred part) of the first plate portion2B, a second fitting part (burred part) of the second plate portion3B, an insulating plate4, a swelling4A of the insulating plate4(covered tubular portion inFIGS.2and3), a first direction D1, and a second direction D2. As illustrated inFIG.1, the capacitor element1has, on its axial end surfaces on both sides, a pair of electrodes1aand1brespectively having P and N polarities. The first and second busbars2and3include plate-shaped conductors having different polarities. The first and second busbars2and3respectively have, at their base ends, protruding pieces2aand3afor connecting purpose, and these protruding pieces are electrically and mechanically joined by soldering to the electrodes1aand1b. The first and second body plates2A and3A of the first and second busbars2and3are each bent through 90 degrees and stand upright in adjacency and in parallel to each other, constituting the first and second opposing plate portions2B and3B. The first and second body plates2A and3A include horizontal plate portions2C and3C, and these plate portions are disposed along a substantially flat upper surface of the capacitor element1. The flat insulating plate4is fixedly disposed in a narrow interval between the first and second opposing plate portions2B and3B in adjacency and in parallel to each other. The opposing plate portions2B and3B respectively have tongue-shaped terminals2dand3dfor external connection. These terminals2dand3dare extending from upper edges of the plate portions2B and3B and stand at positions very close to but far enough from each other to avoid any contact. The terminals2dand3dfor external connection have screw insertion holes (fastening holes)2eand3ethat allow these terminals to be fastened to terminals for cable connection of an external electric device. The insulating plate4between the first and second opposing plate portions2B and3B is extending more outward than outer edges of the first and second plate portions2B and3B to provide an adequate creeping distance between these plate portions. The insulating plate4and the first and second opposing plate portions2B and3B of the first and second busbars2and3may be collectively called a group of adjacent members X. Structural features of this group of adjacent members X are hereinafter described in detail. A first direction D1refers to a direction from the first plate portion2B of the first busbar2toward the second plate portion3B of the second busbar3(horizontal direction), and a second direction D2refers to a direction opposite to the first direction D1. As illustrated inFIG.2, the insulating plate4disposed between the opposing plate portions2B and3B has a swelling4A that protrudes in the first direction D1. This swelling4A is a covered tubular portion formed integral with this insulating plate4. The covered tubular portion (4A) includes a tubular portion4aand a cover4bthat are integral with each other. The tubular portion4ais integral with the body of the insulating plate4, and a lower end of the tubular portion4ain the direction of swelling (first direction D1) is closed with the cover4b. The tubular portion4amay conventionally have a cylindrical shape but is not necessarily limited to such a shape. Other examples of the shape may include elliptic cylinders and angular tubes. The first plate portion2B of the first busbar2has a tubular first fitting part2b. This first fitting part2bis formed so as to penetrate through in the first direction D1and to be integral with this first plate portion2B. The first fitting part2bis obtained by burring a thin, plate-shaped conductor constituting the first busbar2. A through hole is formed in the thin, plate-shaped conductor using a drilling tool, so that an opening-formed tubular part (burred part) is left around the through hole to be integral with the conductor. As illustrated inFIG.3, the outer circumferential surface of the tubular first fitting part2bis internally fitted onto the whole inner circumferential surface of the tubular portion4aof the swelling4A in the insulating plate4. The axial dimension of the first fitting part2bis greater than the thickness of the first plate portion2B. The second plate portion3B of the second busbar3has a tubular second fitting part3b. The second fitting part3bis formed so as to penetrate through in the first direction D1and to be integral with this plate portion3B. In a manner similar to the first fitting part2b, the second fitting part3bis obtained by burring a thin, plate-shaped conductor constituting the second busbar3. The inner circumferential surface of the tubular second fitting part3bis externally fitted onto the whole outer circumferential surface of the tubular portion4aof the swelling4A in the insulating plate4. The axial dimension of the second fitting part3bis greater than the thickness of the second plate portion3B. The burring may provide a greater fitting area for the swelling4A than an area that would be obtained by the inner circumferential surface of a simple through hole alone (as thick as the plate portions), thereby achieving an enhanced fitting strength. The three members thus characterized (insulating plate4and first and second busbars2and3) are assembled as described below. As illustrated inFIG.3, the tubular first fitting part2bof the first plate portion2B is fitted, in the first direction D1, onto one surface side of the tubular portion4aof the swelling4A in the insulating plate4, in which the outer circumferential surface of the first fitting part2bis internally and closely fitted onto the whole inner circumferential surface of the tubular portion4aof the swelling4A. The fitting depth then is greater than the thickness of the first plate portion2B. Thus, the fitting area may be increased and the fitting strength may be thereby improved, as compared with the known art that does not employ burring but uses the inner circumferential surface of a simple through hole alone (as thick as the plate portion) for the fitting part to be fitted. The tubular second fitting part3bof the second plate portion3B is fitted, in the second direction D2, onto the other surface side of the tubular portion4aof the swelling4A in the insulating plate4, in which the inner circumferential surface of the second fitting part3bis externally and closely fitted onto the whole outer circumferential surface of the tubular portion4aof the swelling4A. The fitting depth then is greater than the thickness of the second plate portion3B. Thus, the fitting area may be increased and the fitting strength may be thereby improved, as compared with the known art that does not employ burring but uses the inner circumferential surface of a simple through hole alone (as thick as the plate portion) for the fitting part to be fitted. Unless an adequate distance for insulation (creeping distance) fails to be secured between the heteropolar first and second plate portions2B and3B, the swelling may include, instead of the covered tubular portion, an uncovered tubular portion (with no cover4b) illustrated inFIG.4. The covered tubular portion, however, may be more effective for preventing the strength of the swelling4A from degrading and for keeping an adequate distance for insulation between the heteropolar first and second plate portions2B and3B. Second Example The following structural elements are illustrated inFIGS.5and6of a second example of this invention; a conical part3b1, a top plate part3b2, a tubular part3b3of the second fitting part3b, a swelling4A′ of the insulating plate4, and an annular portion4c, an annular recess4c1, a bottom-closed recess4d, and a peripheral wall4eof the swelling4A′. Any other components are similar to those described in the first example. The same reference signs ofFIGS.5and6as those illustrated inFIGS.1to3of the first example refer to the same components and will not be described again in detail. In the first example, the first fitting part2bof the first plate portion2B is internally fitted in the swelling4A of the insulating plate4, while the second fitting part3bof the second plate portion3B is externally in the swelling4A of the insulating plate4. In the second example that differs from the first example, the swelling4A′ of the insulating plate4has, in cross section, the annular portion4cand the bottom-closed recess4dat the center (protrusion-recess-protrusion), the tubular first fitting part2bof the first plate portion2B is internally and externally fitted into the annular recess4c1of the annular portion4cin the swelling4A′, and the tubular part3b3extending in the second direction D2of the tubular second fitting part3bin the second plate portion3B is internally fitted into the bottom-closed recess4d. This example is hereinafter described in detail. As illustrated inFIG.5, the swelling4A′ of the insulating plate4includes an annular portion4chaving a C-like shape with an opening in the second direction D2when axially viewed in cross section, and further includes a bottom-closed recess4dwith an opening in the first direction D1on an inner side than the annular portion4cand an annular recess with an opening in the second direction D2. This swelling has, on the whole, an irregular shape (protrusion-recess protrusion) in cross section. As illustrated inFIG.6, the annular portion4chas the annular recess4C1with an opening in the second direction D2. The tubular first fitting part2bof the first plate portion2B is fitted into the annular recess4c1, and the tubular second fitting part3bof the second plate portion3bis fitted onto the inner circumferential surface of the bottom-closed recess4dwith an opening in the first direction D1. The first fitting part2bis fitted, both internally and externally, into the annular recess4c1, while the second fitting part3bis internally fitted into the bottom-closed recess4d. The first and second fitting parts2band3bcollaborate with each other to radially hold and support the peripheral wall4ebetween the annular recess4c1and the bottom-closed recess4dof the insulating plate4. In this instance, the first fitting part2bis fitted, both internally and externally, into the annular recess4c1instead of being simply fitted externally into this recess. This may promise a greater fitting area and a greater holding strength, leading to an increased fitting strength, and may also ensure further improvement of the vibration resistance through higher natural frequencies. In this example, the group of adjacent members X; the insulating plate4and the first and second plate portions2B and3B thus improved in fitting strength, may be allowed to have a higher natural frequency. This may improve the natural frequency of these members and may accordingly control possible resonance to relatively low frequency vibrations transmitted from outside, leading to an improved vibration resistance. INDUSTRIAL APPLICABILITY This invention provides an advantageous technology that may allow opposing plate portions and an insulating plate to be accurately and certainly positioned in a simplified structure and that may offer a greater fitting strength and an improved vibration resistance. REFERENCE SIGNS LIST 1capacitor element1a,1belectrode1cupper surface of capacitor element2first busbar2B first plate portion2bfirst fitting part (burred part)3second busbar3B second plate portion3bsecond fitting part (burred part)4insulating plate4A swelling (covered or uncovered tubular portion)4A′ swelling (irregular shape)4cannular portion4c1annular recess4dbottom-closed recessD1first directionD2second direction | 12,479 |
11942276 | DETAILED DESCRIPTION Hereinafter, embodiments of the present disclosure will be described below with reference to the drawings. The individual embodiments merely illustrate examples of embodiments of the disclosure, and the disclosure is not restricted thereto. Different embodiments may suitably be combined with each other and be carried out, and the content of such a combined embodiment is encompassed within the disclosure. The drawings are provided for the better understanding of the specification and some drawings are only schematically shown. The size ratio of each component or the size ratio of one component to another component shown in the drawings may not match that described in the specification. Some components described in the specification may not be shown in the drawings, or a component shown in a drawing may not be as many as that described in the specification. First Embodiment A manufacturing method for a multilayer electronic component100according to a first embodiment is shown inFIGS.1through7.FIGS.1through7are perspective views showing individual steps performed in this embodiment. The perspective view ofFIG.7also illustrates the completed multilayer electronic component100. In the perspective views inFIGS.1through7, the left-right direction is the X direction, the front-back direction is the Y direction, and the top-bottom direction is the Z direction. In the X direction, the right direction is the positive side, while the left direction is the negative side. In the Y direction, the back direction is the positive side, while the front direction is the negative side. In the Z direction, the top direction is the positive side, while the bottom direction is the negative side. InFIGS.1through7, the X direction, the Y direction, and the Z direction are indicated by the arrows. The head of each arrow indicates the positive side, while the tail of each arrow indicates the negative side. In this embodiment, a multilayer piezoelectric actuator is made as the multilayer electronic component100. However, the type of multilayer electronic component to be made in the disclosure is not limited to a multilayer piezoelectric actuator and may be another type, such as a multilayer ceramic capacitor and a multilayer thermistor. Reference is first made toFIG.7to discuss the completed multilayer electronic component (multilayer piezoelectric actuator)100made in this embodiment. The multilayer electronic component100includes a ceramic multilayer body1having three ceramic layers1a,1b, and1c. The ceramic layers1a,1b, and1care each made of piezoelectric ceramics and are stacked on each other. The ceramic multilayer body1has a first main surface (bottom main surface)1B and a second main surface (top main surface)1T. The ceramic multilayer body1also has a pair of side surfaces1S1and1S2and a pair of end surfaces1E1and1E2that link the first main surface1B and the second main surface1T. The ceramic layers1a,1b, and1care polarized in the thickness direction. In this embodiment, the ceramic layers1aand1care polarized in the same direction, while the polarization direction of the ceramic layers1aand1cis opposite that of the ceramic layer1b. The ceramic multilayer body1has a length J in the direction in which the end surfaces1E1and1E2oppose each other. The length J is a design dimension. A first inner electrode2is provided between the ceramic layers1aand1b. In the first inner electrode2, the end portion on the negative side of the X direction reaches the end surface1E1of the ceramic multilayer body1, while the end portion on the positive side in the X direction does not reach the end surface1E2. The first inner electrode2has a length K in the X direction. A distance D1having a length L is provided between the end portion of the first inner electrode2on the positive side in the X direction and the end surface1E2of the ceramic multilayer body1. The lengths K and L are design dimensions. A second inner electrode3is provided between the ceramic layers1band1c. In the second inner electrode3, the end portion on the positive side of the X direction reaches the end surface1E2of the ceramic multilayer body1, while the end portion on the negative side in the X direction does not reach the end surface1E1. The second inner electrode3has a length M in the X direction. A distance D2having a length N is provided between the end portion of the second inner electrode3on the negative side in the X direction and the end surface1E1of the ceramic multilayer body1. The lengths M and N are design dimensions. In this embodiment, the length K of the first inner electrode2and the length M of the second inner electrode3are designed to be equal to each other. The length L of the distance D1and the length N of the distance D2are also designed to be equal to each other. Any suitable material may be used for the first inner electrode2and the second inner electrode3. For example, a metal, such as AgPd or Pt, may be used. A first outer electrode4is provided on the end surface1E1of the ceramic multilayer body1. The first outer electrode4is partly disposed also on the first main surface1B and the second main surface1T of the ceramic multilayer body1. The first inner electrode2is connected to the first outer electrode4. A second outer electrode5is provided on the end surface1E2of the ceramic multilayer body1. The second outer electrode5is partly disposed also on the first main surface1B and the second main surface1T of the ceramic multilayer body1. The second inner electrode3is connected to the second outer electrode5. Any suitable structure and material may be used for the first and second outer electrodes4and5. Each of the first and second outer electrodes4and5may be formed in a double layer structure in which a first layer is made of NiCr and a second layer is made of Au. In the multilayer electronic component (multilayer piezoelectric actuator)100, the ceramic multilayer body1is bent as a result of applying a voltage to between the first outer electrode4and the second outer electrode5. An example of the manufacturing method for the multilayer electronic component100will be described below. To make multiple ceramic multilayer bodies1together at the same time, a first-stage ceramic collective board is first formed. In the specification of this application, the ceramic collective board which is initially made may be called a first-stage ceramic collective board, while multiple ceramic collective boards produced by cutting the first-stage ceramic collective board may be called second-stage ceramic collective boards. First of all, three mother green sheets11a′,11b′, and11c′ are prepared, as shown inFIG.1, and are each formed as follows. A slurry is first prepared by mixing piezoelectric ceramic powder, a binder, and a solvent, for example, and is then formed into a sheet by doctor blading, for example. The mother green sheets11a′,11b′, and11c′ each have a rectangular shape as viewed from above and extend in the X and Y directions. The plan view of each of the mother green sheets11a′,11b′, and11c′ is shown inFIG.8. InFIG.8, the left-right direction is the X direction, and the top-bottom direction is the Y direction. Three first-stage first inner electrodes12are formed on the top main surface of the mother green sheet11a′ by applying a conductive paste thereto in a predetermined shape. Each of the first-stage first inner electrodes12is formed in a rectangular shape as viewed from above and has a pair of sides extending in the X direction and a pair of sides extending in the Y direction. Each of the first-stage first inner electrodes12is disposed next to another first-stage first inner electrode12with a first gap13interposed therebetween. The first gap13has a width A and extends in the Y direction. The first gap13has a negative side13B positioned on the negative side in the X direction and a positive side13A positioned on the positive side in the X direction. A first cutout14is formed at the central portion of each side extending in the X direction of each first-stage first inner electrode12. The first cutout14is formed in a rectangular shape as viewed from above and has a width B and extends in the Y direction. The first cutout14has a positive side14A positioned on the positive side in the X direction and a negative side14B positioned on the negative side in the X direction. Likewise, three first-stage second inner electrodes15are formed on the top main surface of the mother green sheet11b′ by applying a conductive paste thereto in a predetermined shape. Each of the first-stage second inner electrodes15is formed in a rectangular shape as viewed from above and has a pair of sides extending in the X direction and a pair of sides extending in the Y direction. Each of the first-stage second inner electrodes15is disposed next to another first-stage second inner electrode15with a second gap16interposed therebetween. The second gap16has a width B and extends in the Y direction. The second gap16has a negative side16B positioned on the negative side in the X direction and a positive side16A positioned on the positive side in the X direction. A second cutout17is formed at the central portion of each side extending in the X direction of each first-stage second inner electrode15. The second cutout17is formed in a rectangular shape as viewed from above and has a width A and extends in the Y direction. The second cutout17has a positive side17A positioned on the positive side in the X direction and a negative side17B positioned on the negative side in the X direction. In this embodiment, the length K of the first inner electrode2and the length M of the second inner electrode3are designed to be equal to each other. The length L of the distance D1and the length N of the distance D2are also designed to be equal to each other. In this embodiment, the width A of the first gap13and the width A of the second cutout17is accordingly equal to the width B of the first cutout14and the width B of the second gap16. That is, the width A is equal to the width B. The first-stage first inner electrodes12are formed on the top main surface of the mother green sheet11a′ and the first-stage second inner electrodes15are formed on the top main surface of the mother green sheet11b′ with a very high dimensional accuracy by screen printing, for example. In the mother green sheet11a′, the first-stage first inner electrodes12, the first gaps13, and the first cutouts14are individually formed in predetermined shapes with predetermined dimensions at predetermined positions almost without errors. Likewise, in the mother green sheet11b′, the first-stage second inner electrodes15, the second gaps16, and the second cutouts17are individually formed in predetermined shapes with predetermined dimensions at predetermined positions almost without errors. Then, the mother green sheet11a′ having the first-stage first inner electrodes12formed on its top main surface, the mother green sheet11b′ having the first-stage second inner electrodes15formed on its top main surface, and the mother green sheet11c′ are stacked in the Z direction and are pressure-bonded so as to be integrated with each other. When stacking the mother green sheets, the mother green sheet11b′ is positioned on the mother green sheet11a′ so that the first gaps13and the second cutouts17overlap each other and the second gaps16and the first cutouts14overlap each other. Subsequently, the mother green sheets11a′,11b′, and11c′ stacked and integrated with each other are fired to make a first-stage ceramic multilayer body11of the first embodiment shown inFIG.2. The first-stage ceramic multilayer body11includes first-stage ceramic layers11a,11b, and11carranged side by side in the Z direction. In the first-stage ceramic multilayer body11, in the Z direction, each first gap13and the corresponding second cutout17overlap each other in a first region18, while each second gap16and the corresponding first cutout14overlap each other in a second region19. In the first-stage ceramic multilayer body11, the first-stage first inner electrodes12are disposed between the first-stage ceramic layers11aand11b, while the first-stage second inner electrodes15are disposed between the first-stage ceramic layers11band11c. The first-stage ceramic multilayer body11includes multiple second-stage ceramic multilayer bodies21, which will be discussed later. The multiple second-stage ceramic multilayer bodies21are arranged side by side in the X direction. InFIG.2, each boundary line between two adjacent second-stage ceramic multilayer bodies21is indicated by the long dashed dotted line P. Both end portions of the first-stage ceramic multilayer body11in the X direction are portions each adjacent to a second-stage ceramic multilayer body21in the X direction. Both end portions of the first-stage ceramic multilayer body11in the X direction each include only one of the first-stage first inner electrode12and the first-stage second inner electrode15and are thus discarded after the first-stage ceramic multilayer body11is cut into the second-stage ceramic multilayer bodies21. InFIG.2, the boundary line between the end portion of the first-stage ceramic multilayer body11on the positive side in the X direction and its adjacent second-stage ceramic multilayer body21and that between the end portion of the first-stage ceramic multilayer body11on the negative side in the X direction and its adjacent second-stage ceramic multilayer body21are also indicated by the long dashed dotted lines P. Then, as shown inFIG.3, a bottom-surface electrode22is formed on the bottom main surface of the first-stage ceramic multilayer body11by sputtering, for example, while a top-surface electrode23is formed on the top main surface of the first-stage ceramic multilayer body11by sputtering, for example. The bottom-surface electrode22and the top-surface electrode23each form part of the first outer electrode4or the second outer electrode5in the completed multilayer electronic component100. Then, as shown inFIG.4, the bottom-surface electrode22and the top-surface electrode23are processed into a desired shape by etching. After the above-described steps, a first-stage ceramic collective board50in this embodiment has been completed. The first-stage ceramic collective board50includes multiple second-stage ceramic multiplayer bodies21arranged side by side in the X direction, which will be discussed later. Then, the first-stage ceramic collective board50is cut along the long dashed dotted lines P, thereby resulting in the multiple second-stage ceramic multilayer bodies21, one of which is shown inFIG.5. The second-stage ceramic multilayer body21has second-stage ceramic layers21a,21b, and21c. When cutting the first-stage ceramic collective board50, extra care should be taken not to cause misalignment between the first-stage first inner electrodes12and the first-stage second inner electrodes15stacked on each other in the X direction. An explanation will be given regarding how to set cutting lines by usingFIG.10(A)of a first example,FIG.11(A)of a second example, andFIG.15of a third example. Reference is preferably made mainly toFIG.15and toFIGS.10(A) and11(A)if necessary. The setting of cutting lines will be discussed more specifically. Seeing through the first-stage ceramic collective board50in the Z direction, the region where all the first gaps13and second cutouts17overlap each other in the Z direction through the first-stage ceramic layers11athrough11cis set to be a first region18. Then, seeing through the first region18in the Z direction, the side extending in the Y direction and positioned on the positive side in the X direction is set to be a first-region positive side18A, while the side extending in the Y direction and positioned on the negative side in the X direction is set to be a first-region negative side18B. An imaginary line positioned at an equal distance from the first-region positive side18A and from the first-region negative side18B and extending in the Y direction is set to be a first cutting line51. The first-region positive side18A coincides with one of the positive sides13A of the first gaps13and the positive sides17A of the second cutouts17which is positioned on the most negative side in the X direction, as viewed from the Z direction. The first-region negative side18B coincides with one of the negative sides13B of the first gaps13and the negative sides17B of the second cutouts17which is positioned on the most positive side in the X direction, as viewed from the Z direction. Seeing through the first-stage ceramic collective board50in the Z direction, the region where all the second gaps16and first cutouts14overlap each other in the Z direction through the first-stage ceramic layers11athrough11cis set to be a second region19. Then, seeing through the second region19in the Z direction, the side extending in the Y direction and positioned on the positive side in the X direction is set to be a second-region positive side19A, while the side extending in the Y direction and positioned on the negative side in the X direction is set to be a second-region negative side19B. An imaginary line positioned at an equal distance from the second-region positive side19A and from the second-region negative side19B and extending in the Y direction is set to be a second cutting line52. The second-region positive side19A coincides with one of the positive sides16A of the second gaps16and the positive sides14A of the first cutouts14which is positioned on the most negative side in the X direction, as viewed from the Z direction. The second-region negative side19B coincides with one of the negative sides16B of the second gaps16and the negative sides14B of the first cutouts14which is positioned on the most positive side in the X direction, as viewed from the Z direction. The first-stage ceramic collective board50is then cut along the first cutting lines51and the second cutting lines52in the Y direction. Details of the cutting of the first-stage ceramic collective board50will be discussed later in first and second examples and first and second comparative examples. The first-region positive side18A, the first-region negative side18B, the second-region positive side19A, and the second-region negative side19B can be determined easily by applying light to the bottom main surface or the top main surface of the first-stage ceramic collective board50and seeing the first-stage ceramic collective board50from above in the Z direction. In the first-stage ceramic collective board50, the first-stage ceramic multilayer body11is constituted by the very thin first-stage ceramic layers11athrough11c, and also, in the Z direction, the first gap13and the second cutout17overlap each other and the second gap16and the first cutout16overlap each other. The state of the inside of the first-stage ceramic multilayer body11can be recognized easily by applying light from the outside without using a special device, such as an X-ray device. In the second-stage ceramic multilayer body21, a second-stage first inner electrode42is disposed between the second-stage ceramic layers21aand21b, while a second-stage second inner electrode43is disposed between the second-stage ceramic layers21band21c. The second-stage first inner electrode42is one of the portions obtained by cutting the first-stage first inner electrode12. The second-stage second inner electrode43is one of the portions obtained by cutting the first-stage second inner electrode15. The second-stage ceramic multilayer body21includes multiple ceramic multilayer bodies1. The multiple ceramic multilayer bodies1are arranged side by side in the Y direction. InFIG.6, each boundary line between two adjacent ceramic multilayer bodies1is indicated by the long dashed dotted line Q. Both end portions of the second-stage ceramic multilayer body21in the Y direction are portions each adjacent to a ceramic multilayer body1in the Y direction. Both end portions of the second-stage ceramic multilayer body21in the Y direction each include the first cutout14and the second cutout17and are thus discarded after the second-stage ceramic multilayer body21is cut into the ceramic multilayer bodies1. InFIG.6, the boundary line between the end portion of the second-stage ceramic multilayer body21on the positive side in the Y direction and its adjacent ceramic multilayer body1and that between the end portion of the second-stage ceramic multilayer body21on the negative side in the Y direction and its adjacent ceramic multilayer body1are also indicated by the long dashed dotted lines Q. Subsequently, as shown inFIG.6, a second-stage first outer electrode34and a second-stage second outer electrode35are formed on the divided surfaces of the second-stage ceramic multilayer body21by sputtering, for example. The second-stage first outer electrode34and the second-stage second outer electrode35are each integrated with the bottom-surface electrode22remaining on the bottom main surface of the second-stage ceramic multilayer body21and the top-surface electrode23remaining on the top main surface of the second-stage ceramic multilayer body21. Then, poling treatment required for the second-stage ceramic multilayer body21is performed by applying a predetermined voltage to between the second-stage first outer electrode34and the second-stage second outer electrode35. Poling treatment is performed so that the polarization direction of the second-stage ceramic layers21aand21cbecomes opposite that of the second-stage ceramic layer21bin the thickness direction. After the above-described steps, a second-stage ceramic collective board60of this embodiment has been completed. Subsequently, the second-stage ceramic collective board60is cut along the long dashed dotted lines Q, thereby resulting in multiple multilayer electronic components100, one of which is shown inFIG.7. In the multilayer electronic component100, the first inner electrode2is one of the portions obtained by cutting the second-stage first inner electrode42, while the second inner electrode3is one of the portions obtained by cutting the second-stage second inner electrode43. In the multilayer electronic component100, the first outer electrode4is one of the portions obtained by cutting the second-stage first outer electrode34, while the second outer electrode5is one of the portions obtained by cutting the second-stage second outer electrode35. As a result, the multilayer electronic component100according to the first embodiment has been completed. As stated above, when cutting the first-stage ceramic collective board50, extra care is taken so as not to cause misalignment between the first-stage first inner electrodes12and the first-stage second inner electrodes15stacked on each other in the X direction. An explanation will be given regarding how to cut the first-stage ceramic collective board50. As shown inFIG.9, in the first-stage ceramic collective board50, the first-stage first inner electrodes12and the first-stage second inner electrodes15are disposed so that each first gap13and the corresponding second cutout17overlap each other in the first region18in the Z direction and each second gap16and the corresponding first cutout14overlap each other in the second region19in the Z direction. For enhancing the visibility, inFIG.9, the first cutouts14and the second cutouts17only at the near side of the drawing are designated by reference numerals. Ideally, it is desirable that the first-stage first inner electrodes12and the first-stage second inner electrodes15be disposed without misalignment therebetween in the X direction. The case in which the first-stage first inner electrodes12and the first-stage second inner electrodes15are positioned without misalignment therebetween in the X direction is shown inFIG.10(A)as a first example. InFIG.10(A), the left-right direction is the X direction, and the top-bottom direction is the Z direction. In the first example, the multilayer electronic component100shown inFIG.10(B)is made, as described below. In the first example, as viewed in the Z direction, in the first region18, the positive side13A of the first gap13and the positive side17A of the second cutout17overlap each other, which corresponds to the first-region positive side18A, while the negative side13B of the first gap13and the negative side17B of the second cutout17overlap each other, which corresponds to the first-region negative side18B. An imaginary line positioned between the first-region positive side18A (positive side13A and positive side17A) and the first-region negative side18B (negative side13B and negative side17B) at an equal distance from the first-region positive side18A and from the first-region negative side18B is set to be a first cutting line51. InFIG.10(A), although the first cutting line51is shown in the Z direction for easy visibility, it actually extends in the Y direction (direction perpendicular to the plane of the drawing inFIG.10(A)). In the first example, as viewed in the Z direction, in the second region19, the positive side16A of the second gap16and the positive side14A of the first cutout14overlap each other, which corresponds to the second-region positive side19A, while the negative side16B of the second gap16and the negative side14B of the first cutout14overlap each other, which corresponds to the second-region negative side19B. An imaginary line positioned between the second-region positive side19A (positive side16A and positive side14A) and the second-region negative side19B (negative side16B and negative side14B) at an equal distance from the second-region positive side19A and from the second-region negative side19B is set to be a second cutting line52. InFIG.10(A), although the second cutting line52is shown in the Z direction for easy visibility, it actually extends in the Y direction (direction perpendicular to the plane of the drawing inFIG.10(A)). In the first example, by cutting the first-stage ceramic collective board50along the first cutting lines51and the second cutting lines52, the second-stage ceramic collective board60is made. Then, by cutting the second-stage ceramic collective board60, the multilayer electronic component100is made. The multilayer electronic component100made in the first example is shown inFIG.10(B). In the multilayer electronic component100made in the first example, the ceramic multilayer body1has the design length J. The first inner electrode2has the design length K and the distance D1has the design length L. The second electrode3has the design length M and the distance D2has the design length N. The case in which misalignment occurs between the first-stage inner electrode12and the first-stage second inner electrode15in the X direction is shown inFIG.11(A)as a second example. More specifically, in the second example, it is assumed that the first-stage first inner electrode12is displaced toward the positive side in the X direction, while the first-stage second inner electrode15is displaced toward the negative side in the X direction and that the amount of misalignment between the first-stage first inner electrode12and the first-stage second inner electrode15is a length α. In the second example, two types of multilayer electronic components, multilayer electronic components100A and100B shown inFIG.11(B), are made, as described below. In the second example, in the first region18, the positive side13A of the first gap13and the positive side17A of the second cutout17are compared with each other as viewed from the Z direction, and the positive side17A of the second cutout17positioned on the more negative side in the X direction is set to be the first-region positive side18A. In the first region18, the negative side13B of the first gap13and the negative side17B of the second cutout17are compared with each other as viewed from the Z direction, and the negative side13B of the first gap13positioned on the more positive side in the X direction is set to be the first-region negative side18B. Then, as viewed from the Z direction, an imaginary line positioned at an equal distance from the positive side17A of the second cutout17, which is the first-region positive side18A, and from the negative side13B of the first gap13, which is the first-region negative side18B, is set to be the first cutting line51. In the second example, in the second region19, the positive side16A of the second gap16and the positive side14A of the first cutout14are compared with each other as viewed from the Z direction, and the positive side16A of the second gap16positioned on the more negative side in the X direction is set to be the second-region positive side19A. In the second region19, the negative side16B of the second gap16and the negative side14B of the first cutout14are compared with each other as viewed from the Z direction, and the negative side14B of the first cutout14positioned on the more positive side in the X direction is set to be the second-region negative side19B. Then, as viewed from the Z direction, an imaginary line positioned at an equal distance from the positive side16A of the second gap16, which is the second-region positive side19A, and from the negative side14B of the first cutout14, which is the second-region negative side19B, is set to be the second cutting line52. In the second example, by cutting the first-stage ceramic collective board50along the first cutting lines51and the second cutting lines52, the second-stage ceramic collective board60is made. Then, the second-stage ceramic collective board60is cut into the individual ceramic multilayer bodies1. As a result, the multilayer electronic components100A and100B are made. The multilayer electronic components100A and100B made in the second example are shown inFIG.11(B). In both of the multilayer electronic components100A and100B made in the second example, the ceramic multilayer body1has the design length J. In the multilayer electronic component100A, the first inner electrode2is longer than the design length K and has a length (K+½α), while the second inner electrode3is longer than the design length M and has a length (M+½α). In the multilayer electronic component100A, the distance D1between the edge of the first inner electrode2and the end surface1E2is shorter than the design length L and has a length (L−½α), while the distance D2between the edge of the second inner electrode3and the end surface1E1is shorter than the design length N and has a length (N−½α). In the multilayer electronic component100B, the first inner electrode2is shorter than the design length K and has a length (K−½α), while the second inner electrode3is shorter than the design length M and has a length (M−½α). In the multilayer electronic component100B, the distance D1between the edge of the first inner electrode2and the end surface1E2is longer than the design length L and has a length (L+½α), while the distance D2between the edge of the second inner electrode3and the end surface1E1is longer than the design length N and has a length (N+½α). That is, in the multilayer electronic components100A and100B, a misalignment length α between the first-stage first inner electrode12and the first-stage second inner electrode15in the X direction occurred during the making of the first-stage ceramic collective board50is adjusted in a well-balanced manner by the length K of the first inner electrode2, the length M of the second inner electrode3, the length L of the distance D1between the edge of the first inner electrode2and the end surface1E2, and the length N of the distance D2between the edge of the second inner electrode3and the end surface1E1. In the multilayer electronic components100A and100B, the amounts of misalignment of the lengths K, L, M, and N deviating from the respective design lengths are contained within +½a or −½α. Usually, the misalignment length α in the X direction that may occur during the manufacturing steps is extremely small, and the above-described amounts of misalignment deviating from the design lengths K, L, M, and N are totally acceptable. Moreover, in both of the multilayer electronic components100A and100B, the ceramic multilayer body1has the design length J. The case in which the first-stage first inner electrode12and the first-stage second inner electrode15are cut by an approach of the related art is shown inFIG.12(A)as a first comparative example. In the first comparative example, two types of multilayer electronic components, multilayer electronic components500and600shown inFIG.12(B), are made, as described below. In the first comparative example, as well as in the second example, misalignment occurs between the first-stage first inner electrode12and the first-stage second inner electrode15in the X direction. More specifically, in the first comparative example, it is assumed that the first-stage first inner electrode12is displaced toward the positive side in the X direction, while the first-stage second inner electrode15is displaced toward the negative side in the X direction and that the amount of misalignment between the first-stage first inner electrode12and the first-stage second inner electrode15is a length α. In the first comparative example, no first cutout14is formed in the first-stage first inner electrode12, while no second cutout17is formed in the first-stage second inner electrode15. In the first comparative example, as viewed in the Z direction, an imaginary line positioned between the positive side13A and the negative side13B of the first gap13at an equal distance from the positive side13A and from the negative side13B is set to be a first cutting line51. The first cutting line51is difficult to determine unless a special device, such as an X-ray device, is used. In the first comparative example, as viewed in the Z direction, an imaginary line positioned between the positive side16A and the negative side16B of the second gap16at an equal distance from the positive side16A and from the negative side13B is set to be a second cutting line52. The second cutting line52is difficult to determine unless a special device, such as an X-ray device, is used. In the first comparative example, by cutting the first-stage ceramic collective board50along the first cutting lines51and the second cutting lines52, the second-stage ceramic collective board60is made. Then, the second-stage ceramic collective board60is cut into the individual ceramic multilayer bodies1so as to make multilayer electronic components. In the first comparative example, two types of multilayer electronic components, the multilayer electronic components500and600whose ceramic multilayer bodies1have different lengths, are made, as shown inFIG.12(B). As shown inFIG.12(B), neither of the ceramic multilayer body1of the multilayer electronic component500nor that of the multilayer electronic component600has the design length J. More specifically, the ceramic multilayer body1of the multilayer electronic component500has a length (J+α), while the ceramic multilayer body1of the multilayer electronic component600has a length (J−α). In the multilayer electronic component500, the first inner electrode2does not have the design length K and instead has a length (K+α), while the second inner electrode3does not have the design length M and instead has a length (M+α). In the multilayer electronic component500, however, the distance D1has the design length L, while the distance D2has the design length N. In the multilayer electronic component600, the first inner electrode2does not have the design length K and instead has a length (K−α), while the second inner electrode3does not have the design length M and instead has a length (M−α). In the multilayer electronic component600, however, the distance D1has the design length L, while the distance D2has the design length N. In this manner, according to the approach of the first comparative example, the length J of the ceramic multilayer body1, the length K of the first inner electrode2, and the length M of the second inner electrode3of the multilayer electronic component500and those of the multilayer electronic component600significantly different from each other. More specifically, the length of the ceramic multilayer body1of the multilayer electronic component500is (J+α), while that of the multilayer electronic component600is (J−α); the length of the first inner electrode2of the multilayer electronic component500is (K+α), while that of the multilayer electronic component600is (K−α); and the length of the second inner electrode3of the multilayer electronic component500is (M+α), while that of the multilayer electronic component600is (M−α). According to the approach of the first comparative example, the characteristics of the multilayer electronic component500and those of the multilayer electronic component600become significantly different from each other, and thus, they are not suitable to be put to practical use. Additionally, the length of the ceramic multilayer body1of the multilayer electronic component500and that of the multilayer electronic component600are significantly different from each other, and thus, they are not suitable to be put to practical use. The case in which the first-stage first inner electrode12and the first-stage second inner electrode15are cut by another approach of the related art is shown inFIG.13(A)as a second comparative example. In the second comparative example, two types of multilayer electronic components, multilayer electronic components700and800shown inFIG.13(B), are made, as described below. In the second comparative example, as well as in the second example and the first comparative example, misalignment occurs between the first-stage first inner electrode12and the first-stage second inner electrode15in the X direction. More specifically, in the second comparative example, it is assumed that the first-stage first inner electrode12is displaced toward the positive side in the X direction, while the first-stage second inner electrode15is displaced toward the negative side in the X direction and that the amount of misalignment between the first-stage first inner electrode12and the first-stage second inner electrode15is a length α. In the second comparative example, as well as in the first comparative example, no first cutout14is formed in the first-stage first inner electrode12, while no second cutout17is formed in the first-stage second inner electrode15. In the second comparative example, as viewed in the Z direction, an imaginary line positioned between the positive side13A and the negative side13B of the first gap13at an equal distance from the positive side13A and from the negative side13B is set to be a first cutting line51. The first cutting line51is difficult to determine unless a special device, such as an X-ray device, is used. In the second comparative example, as viewed in the Z direction, an imaginary line positioned between two adjacent first cutting lines51at an equal distance from one first cutting line51and from the other first cutting line51is set to be a second cutting line52. In the second comparative example, the distance between each first cutting line51and the second cutting line52has the length J. In the second comparative example, by cutting the first-stage ceramic collective board50along the first cutting lines51and the second cutting lines52, the second-stage ceramic collective board60is made. Then, the second-stage ceramic collective board60is cut into the individual ceramic multilayer bodies1so as to make multilayer electronic components. In the second comparative example, two types of multilayer electronic components, the multilayer electronic components700and800, are made, as shown inFIG.13(B). In both of the multilayer electronic components700and800made in the second comparative example, the ceramic multilayer body1has the design length J. Additionally, the first inner electrode2has the design length K, while the distance D1has the design length L. In the multilayer electronic component700made in the second comparative example, however, the second inner electrode3does not have the design length M and instead has a length (M+α), while the distance D2does not have the design length N and instead has a length (N−α). In the multilayer electronic component800made in the second comparative example, the second inner electrode3does not have the design length M and instead has a length (M−α), while the distance D2does not have the design length N and instead has a length (N+α). In this manner, according to the approach of the second comparative example, the length M of the second inner electrode3and the length N of the second distance D2of the multilayer electronic component700and those of the multilayer electronic component800significantly different from each other. More specifically, the length of the second inner electrode3of the multilayer electronic component700is (M+α), while that of the multilayer electronic component800is (M−α); and the length of the second distance D2of the multilayer electronic component700is (N+α), while that of the multilayer electronic component800is (N−α). According to the approach of the second comparative example, the characteristics of the multilayer electronic component700and those of the multilayer electronic component800become significantly different from each other, and thus, they are not suitable to be put to practical use. In particular, in the multilayer electronic component700, the length of the distance D2is (N−α) so that the edge of the second inner electrode3excessively approaches the end surface1E1of the ceramic multilayer body1, which may cause short-circuiting between the second inner electrode3and the first outer electrode4. Hence, the multilayer electronic component700is not suitable to be put to practical use. As described above, in the first example of the first embodiment, misalignment does not occur between the first-stage first inner electrode12and the first-stage second inner electrode15in the X direction. In the second example of the first embodiment, the first-stage first inner electrode12is displaced toward the positive side in the X direction, while the first-stage second inner electrode15is displaced toward the negative side in the X direction, which produces the misalignment length α between the first-stage first inner electrode12and the first-stage second inner electrode15. Nevertheless, not to mention the first example, even in the second example in which misalignment has occurred, the resulting multilayer electronic component100can safely be put to practical use. In contrast, in the first and second comparative examples in which the first-stage first inner electrode12and the first-stage second inner electrode15are cut by the approaches of the related art, the resulting multilayer electronic components500,600,700, and800have become defective, or if not, the characteristics of the multilayer electronic component500have become different from those of the multilayer electronic component600and the characteristics of the multilayer electronic component700have become different from those of the multilayer electronic component800. It is thus found that the multilayer electronic components500,600,700, and800are not suitable to be put to practical use. The effectiveness of the present disclosure has thus been validated. Second Embodiment A multilayer electronic component200made in a second embodiment is shown inFIG.14.FIG.14is a perspective view of the multilayer electronic component200. The multilayer electronic component200according to the second embodiment is an electronic component in which part of the configuration of the multilayer electronic component100of the first embodiment is modified. More specifically, in the multilayer electronic component200, the ceramic multilayer body1is constituted by five ceramic layers1athrough1e. In the ceramic multilayer body1, a first-layer first inner electrode2counted from the bottom is disposed between the ceramic layers1aand1b; a second-layer second inner electrode3counted from the bottom is disposed between the ceramic layers1band1c; a third-layer first inner electrode2counted from the bottom is disposed between the ceramic layers1cand1d; and a fourth-layer second inner electrode3counted from the bottom is disposed between the ceramic layers1dand1e. The configurations of the other portions of the multilayer electronic component200are the same as the multilayer electronic component100. In the multilayer electronic component200, as shown as a third example inFIG.15, it is assumed that, although the second-layer first-stage second inner electrode15and the third-layer first-stage first inner electrode12are disposed at correct positions, the first-layer first-stage first inner electrode12is displaced toward the positive side in the X direction, while the fourth-layer first-stage second inner electrode15is displaced toward the negative side in the X direction. It is also assumed that the amount of misalignment between the first-layer first-stage first inner electrode12and the fourth-layer first-stage second inner electrode15is a length α. In the third example, in the first region18, among the positive sides13A of the first gaps13and the positive sides17A of the second cutouts17, the positive side17A of the fourth-layer second cutout17positioned on the most negative side in the X direction is set to be the first-region positive side18A. In the first region18, among the negative sides13B of the first gaps13and the negative sides17B of the second cutouts17, the negative side13B of the first-layer first gap13positioned on the most positive side in the X direction is set to be the first-region negative side18B. Then, as viewed from the Z direction, an imaginary line positioned at an equal distance from the first-region positive side18A (the positive side17A of the fourth-layer second cutout17) and from the first-region negative side18B (the negative side13B of the first-layer first gap13) is set to be the first cutting line51. In the third example, in the second region19, among the positive sides16A of the second gaps16and the positive sides14A of the first cutouts14, the positive side16A of the fourth-layer second gap16positioned on the most negative side in the X direction is set to be the second-region positive side19A. In the second region19, among the negative sides16B of the second gaps16and the negative sides14B of the first cutouts14, the negative side14B of the first-layer first cutout14positioned on the most positive side in the X direction is set to be the second-region negative side19B. Then, as viewed from the Z direction, an imaginary line positioned at an equal distance from the second-region positive side19A (the positive side16A of the fourth-layer second gap16) and from the second-region negative side19B (the negative side14B of the first-layer first cutout14) is set to be the second cutting line52. In the third example, two types of multilayer electronic components, multilayer electronic components200A and200B shown inFIG.16, are made. In the multilayer electronic component200A, the ceramic multilayer body1has the design length J, as shown inFIG.16. The first-layer first inner electrode2has a length (K+½α) and the distance D1of the first-layer first inner electrode2has a length (L−½α). The second-layer second inner electrode3has the design length M and the distance D2of the second-layer second inner electrode3has the design length N. The third-layer first inner electrode2has the design length K and the distance D1of the third-layer first inner electrode2has the design length L. The fourth-layer second inner electrode3has a length (M+½α) and the distance D2of the fourth-layer second inner electrode3has a length (N−½α). In the multilayer electronic component200A, the length (K+½α) of the first-layer first inner electrode2is longer but is not too long, while the length (M+½α) of the fourth-layer second inner electrode3is longer but is not too long. The first-layer first inner electrode2and the fourth-layer second inner electrode3do not present any problem in terms of practical use. In the multilayer electronic component200A, the distance D1(L−½α) of the first-layer first inner electrode2is shorter but is not too short, while the distance D2(N−½α) of the fourth-layer second inner electrode3is shorter but is not too short. The distance D1and the distance D2do not present any problem in terms of practical use. In this manner, the multilayer electronic component200A of the third example can safely be put to practical use. In the multilayer electronic component200B, the ceramic multilayer body1has the design length J, as shown inFIG.16. The first-layer first inner electrode2has a length (K−½α) and the distance D1of the first-layer first inner electrode2has a length (L+½α). The second-layer second inner electrode3has the design length M and the distance D2of the second-layer second inner electrode3has the design length N. The third-layer first inner electrode2has the design length K and the distance D1of the third-layer first inner electrode2has the design length L. The fourth-layer second inner electrode3has a length (M−½α) and the distance D2of the fourth-layer second inner electrode3has a length (N+½α). In the multilayer electronic component200B, the length (K−½α) of the first-layer first inner electrode2is shorter but is not too short, while the length (M−½α) of the fourth-layer second inner electrode3is shorter but is not too short. The first-layer first inner electrode2and the fourth-layer second inner electrode3do not present any problem in terms of practical use. In the multilayer electronic component200B, the distance D1(L+½α) of the first-layer first inner electrode2is longer but is not too long, while the distance D2(N+½α) of the fourth-layer second inner electrode3is longer but is not too long. The distance D1and the distance D2do not present any problem in terms of practical use. In this manner, the multilayer electronic component200B of the third example can safely be put to practical use. As described above, in the third example, too, in the multilayer electronic components200A and200B, a misalignment length α between the first-stage first inner electrode12and the first-stage second inner electrode15in the X direction occurred during the making of the first-stage ceramic collective board50is adjusted in a well-balanced manner by the length K of the first inner electrode2, the length M of the second inner electrode3, the length L of the distance D1between the edge of the first inner electrode2and the end surface1E2, and the length N of the distance D2between the edge of the second inner electrode3and the end surface1E1. As is seen from the front views of the multilayer electronic components shown inFIG.16, in a multilayer electronic component such as the multilayer electronic component200A, when the length of the shortest distance D1is equal to that of the shortest distance D2, it can be assumed that the length of the shortest distance D1is (L−½α) and that of the shortest distance D2is (N−½α). It can thus be assumed that this multilayer electronic component has been made by the method in the second embodiment. Alternatively, in a multilayer electronic component such as the multilayer electronic component200B, when the length of the longest distance D1is equal to that of the longest distance D2, it can be assumed that the length of the longest distance D1is (L+½α) and that of the longest distance D2is (N+½α). It can thus be assumed that this multilayer electronic component has been made by the method in the second embodiment. In both the cases, the above-described assumptions can hold true on condition that the multilayer electronic component has two or more first inner electrodes2and two or more second inner electrodes3and that the design length L of the distance D1and the design length N of the distance D2are equal to each other (L=N), that is, the width A of the first gap and the second cutout17is equal to the width B of the first cutout14and the second gap16(a=b) in the first-stage ceramic collective board. FIG.16used for explaining the third example shows the front views of the multilayer electronic component200of the third example. Each of the front views coincides with a sectional view cut along a surface of the second-stage ceramic collective board extending in the X direction and the Z direction. Hence, in a sectional surface cut along a surface of the second-stage ceramic collective board extending in the X direction and the Z direction, when the length of the shortest distance between the edge of the second-stage first inner electrode and the outer surface of the second-stage ceramic collective board (second-stage ceramic multilayer body) opposing this second-stage first inner electrode is equal to the length of the shortest distance between the edge of the second-stage second inner electrode and the outer surface of the second-stage ceramic collective board (second-stage ceramic multilayer body) opposing this second-stage second inner electrode, it can be assumed that this second-stage ceramic collective board has been made by the method of the second embodiment. Alternatively, in a sectional surface cut along a surface of the second-stage ceramic collective board extending in the X direction and the Z direction, when the length of the longest distance between the edge of the second-stage first inner electrode and the outer surface of the second-stage ceramic collective board (second-stage ceramic multilayer body) opposing this second-stage first inner electrode is equal to the length of the longest distance between the edge of the second-stage second inner electrode and the outer surface of the second-stage ceramic collective board (second-stage ceramic multilayer body) opposing this second-stage second inner electrode, it can be assumed that this second-stage ceramic collective board has been made by the method of the second embodiment. In both the cases, the above-described assumptions can hold true on condition that the second-stage ceramic collective board has two or more second-stage first inner electrodes and two or more second-stage second inner electrodes and that the width A of the first gap and the second cutout17is equal to the width B of the first cutout14and the second gap16(a=b) in the first-stage ceramic collective board. The first and second embodiments have been discussed above. The present disclosure is not restricted to the above-described content and various modifications may be made within the spirit and scope of the disclosure. For example, in the multilayer electronic components100and200, the length of the first inner electrode2and that of the second inner electrode3are designed to be equal to each other. The width A of the first gap13and the second cutout17and the width B of the first cutout14and the second gap16are thus formed to be the same. Nevertheless, the width A and the width B are not necessarily formed to be the same. If it is desired that the length of the first inner electrode2and that of the second inner electrode3be different from each other, the width A and the width B are made different from each other. In this case, too, the first cutting line51and the second cutting line52are determined by the same approaches discussed in the above-described embodiments. In the first-stage ceramic collective board50, the first cutout14is provided on both sides of the first-stage first inner electrode12extending in the X direction. However, the first cutout14may be provided only on one side of the first-stage first inner electrode12. Likewise, in the first-stage ceramic collective board50, the second cutout17is provided on both sides of the first-stage second inner electrode15extending in the X direction. However, the second cutout17may be provided only on one side of the first-stage second inner electrode15. Although the multilayer electronic components100and200are multilayer piezoelectric actuators, any type of multilayer electronic component may be made. That is, the multilayer electronic components100and200are not limited to multilayer piezoelectric actuators and may be another type of multilayer electronic component, such as a multilayer ceramic capacitor and a multilayer thermistor. The embodiments disclosed herein are illustrative only and are not intended to be limiting in any way. The scope of the present disclosure is defined by the appended claims rather than the foregoing description, and it should be understood that all the changes conceived from the meaning and scope of the claims and their equivalents are included in the scope of the present disclosure. | 56,956 |
11942277 | DETAILED DESCRIPTION In order that the present disclosure is described in detail and completeness, implementation aspects and specific embodiments of the present disclosure with illustrative description are presented, but it is not the only form for implementation or use of the specific embodiments of the present disclosure. The embodiments disclosed herein may be combined or substituted with each other in an advantageous manner, and other embodiments may be added to an embodiment without further description. In the following description, numerous specific details will be described in detail in order to enable the reader to fully understand the following embodiments. However, the embodiments of the present disclosure may be practiced without these specific details. Further, spatially relative terms, such as “beneath,” “over,” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as shown in the figures. The true meaning of the spatially relative terms includes other orientations. For example, when the figure is flipped up and down by 180 degrees, the relationship between one component and another component may change from “beneath” to “over.” In addition, the spatially relative descriptions used herein should be interpreted the same. As mentioned in the related art, how to decrease the loss of the storage conductive layer when the stack capacitor is manufactured has become a technical issue to be solved in this field. Therefore, the present disclosure provides a method of manufacturing a semiconductor structure which can significantly decrease loss of the storage conductive layer when the semiconductor structure is manufactured. Various embodiments of the method of manufacturing the semiconductor structure and how to significantly decrease loss of the storage conductive layer will be described below. FIGS.1,2,3,4,5,6and7Aare cross-sectional views of a method of manufacturing a semiconductor structure at various stages in accordance with some embodiments of the present disclosure. In some embodiments, as shown inFIG.1, a substrate102is provided. In some embodiments, the substrate102includes a semiconductor material, such as an elementary semiconductor including silicon or germanium in crystal, polycrystalline, and/or an amorphous structure; a compound semiconductor including silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and/or indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and/or GaInAsP; any other suitable material; and/or a combination thereof. In some embodiments, as shown inFIG.1, a dielectric layer104is provided on the substrate102. In some embodiments, the dielectric layer104includes silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, silicon carbon nitride, or a combination thereof. In some embodiments, as shown inFIG.1, a landing pad layer110is provided on the dielectric layer104. In some embodiments, the landing pad layer110includes doped polysilicon (Si), tungsten (W), tungsten silicide (WSi), aluminum (Al), titanium (Ti), titanium nitride (TiN), cobalt (Co) or a combination thereof, but the disclosure is not limited thereto. In some embodiments, as shown inFIG.1, a bottom dielectric layer120is provided on the landing pad layer110. In some embodiments, the bottom dielectric layer120includes silicon nitride, silicon oxynitride, silicon carbide, silicon carbon nitride, or a combination thereof, but the disclosure is not limited thereto. As shown inFIG.1, a first oxide layer130is formed over the landing pad layer110. In some embodiments, the first oxide layer130includes silicon oxide. In some embodiments, formation of the first oxide layer130may include any suitable deposition method, such as coating, atomic layer deposition (ALD), plasma-enhanced atomic layer deposition (PEALD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), physical vapor deposition (PVD) (e.g., sputtering), and the like. As shown inFIG.1, a middle patterned dielectric layer140is formed over the first oxide layer130and has a plurality of first openings140aexposing a plurality of portions of the first oxide layer130. In some embodiments, the middle patterned dielectric layer140includes silicon nitride, silicon oxynitride, silicon carbide, silicon carbon nitride, or a combination thereof. In some embodiments, a dielectric layer (not shown) is formed over the first oxide layer130, and a patterning process, such as photolithography and etching processes, is performed on the dielectric layer to form the middle patterned dielectric layer140. In some embodiments, as shown inFIG.1, before the first oxide layer130and the middle patterned dielectric layer140are formed, a bottom oxide layer132and a bottom patterned dielectric layer142are sequentially formed. In some embodiments, the bottom oxide layer132is formed over the bottom dielectric layer120, and the bottom patterned dielectric layer142is formed over the bottom oxide layer132. In some embodiments, a dielectric layer (not shown) is formed over the bottom oxide layer132, and a patterning process, such as photolithography and etching processes, is performed on the dielectric layer to form the bottom patterned dielectric layer142. As shown inFIGS.1and2, after the middle patterned dielectric layer140is formed, a second oxide layer150and a top dielectric layer160are sequentially formed over the middle patterned dielectric layer140. In some embodiments, sequentially forming the second oxide layer150and the top dielectric layer160over the middle patterned dielectric layer140includes forming the second oxide layer150in the first openings140a. In some embodiments, the second oxide layer150includes silicon oxide, and the top dielectric layer160includes silicon nitride, silicon oxynitride, silicon carbide, silicon carbon nitride, or a combination thereof. In some embodiments, formations of the second oxide layer150and the top dielectric layer160may include any suitable deposition method, such as coating, ALD, PEALD, CVD, PECVD, LPCVD, PVD (e.g., sputtering), and the like. As shown inFIGS.2and3, a trench170is formed through the top dielectric layer160, the second oxide layer150and the first oxide layer130. In some embodiments, forming the trench170through the top dielectric layer160, the second oxide layer150and the first oxide layer130includes forming the trench170through a portion of the first opening140a. In some embodiments, the trench170is formed further through the bottom oxide layer132and the bottom dielectric layer120to expose a portion of the landing pad layer110. In some embodiments, formation of the trench170includes performing photolithography and etching processes. As shown inFIG.3, after the trench170is formed, a bottom conductive layer180is conformally formed in the trench170. The bottom conductive layer180may be also called as a bottom electrode layer, a trench conductive layer or a storage conductive layer. In some embodiments, the bottom conductive layer180is formed on a top surface of the top dielectric layer160, exposed side surfaces of the top dielectric layer160, exposed side surfaces of the second oxide layer150and exposed side surfaces of the first oxide layer130. In some embodiments, the bottom conductive layer180includes a metal-containing material, such as titanium (Ti), tantalum (Ta), tungsten (W), aluminum (Al), zirconium (Zr), hafnium (Hf), titanium aluminum (TiAl), tantalum aluminum (TaAl), tungsten aluminum (WAl), zirconium aluminum (ZrAl), hafnium aluminum (HfAl), titanium nitride (TiN), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), tungsten silicon nitride (WSiN), titanium carbide (TiC), tantalum carbide (TaC), titanium aluminum carbide (TiAlC), tantalum aluminum carbide (TaAlC), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), any other suitable metal-containing material or a combination thereof. In some embodiments, formation of the bottom conductive layer180may include any suitable deposition method, such as coating, ALD, PEALD, CVD, PECVD, LPCVD, PVD (e.g., sputtering), and the like. In some embodiments, as shown inFIGS.3and4, the method further includes performing a polishing process (e.g., chemical mechanical polishing (CMP) or other suitable method) on the bottom conductive layer180to remove the bottom conductive layer180on the top surface of the top dielectric layer160. In other words, the polishing process is used to expose the top surface of the top dielectric layer160. As shown inFIGS.4and5, a portion of the top dielectric layer160adjacent to the trench170is removed to expose a portion150aof the second oxide layer150beneath the removed portion of the top dielectric layer160. In some embodiments, removing the portion of the top dielectric layer160adjacent to the trench170includes performing a photolithography process and a dry etching process on the top dielectric layer160. In some embodiments, as shown inFIGS.4and5, the dry etching process is performed to remove the portion of the top dielectric layer160and a thin portion of the second oxide layer150therebeneath to ensure the second oxide layer150is exposed, but not limited thereto. In some embodiments, it is found that the dry etching process may result in loss of the bottom conductive layer180, such as loss of the bottom conductive layer180adjacent to the removed portion of the top dielectric layer160and adjacent to the removed thin portion of the second oxide layer150. As shown inFIGS.5and6, an etching process is performed to completely remove the second oxide layer150, the first oxide layer130, and the bottom oxide layer132. In some embodiments, performing the etching process to remove the second oxide layer150, the first oxide layer130, and the bottom oxide layer132includes performing a wet etching process. In some embodiments, it is found that the wet etching process may result in slight loss of the bottom conductive layer180. It is noteworthy that since the middle patterned dielectric layer140has the first openings140a(as shown inFIG.5), the second oxide layer150and the first oxide layer130can be once removed using the wet etching process. Therefore, the loss of the bottom conductive layer180can be minimized, and thus can decrease capacitance loss due to loss of the bottom conductive layer180when the semiconductor structure is manufactured. In contrast, if the middle dielectric layer does not have first openings (not shown), after the second oxide layer is removed, an additional patterning process (e.g., a photolithography process and a dry etching process) is required to perform on the middle dielectric layer to expose the first oxide layer, and an additional wet etching process is required to remove the first oxide layer, which results in further loss of the bottom conductive layer due to the additional patterning process and the additional wet etching process, causing greater capacitance loss. In some embodiments, as shown inFIGS.6and7A, the method further includes forming a high-k dielectric layer210covering the bottom conductive layer180after performing the etching process; forming a top conductive layer220covering the high-k dielectric layer210; and forming a semiconductor layer230covering the top conductive layer220. In some embodiments, as shown inFIGS.6and7A, the high-k dielectric layer210and the top conductive layer220are sequentially formed to conformally cover the bottom conductive layer180, the top dielectric layer160and the middle patterned dielectric layer140. In some embodiments, as shown inFIGS.6and7A, the semiconductor layer230is further filled in the trench170and in the space formed after the second oxide layer150and the first oxide layer130(shown inFIG.5) are removed. In some embodiments, the high-k dielectric layer210includes silicon oxide, silicon nitride, silicon oxynitride, metal oxide such as hafnium oxide, hafnium silicon oxide, hafnium silicon oxynitride or other suitable material, but the disclosure is not limited thereto. In some embodiments, the top conductive layer220includes a metal-containing material, such as Ti, Ta, W, Al, Zr, Hf, TiAl, TaAl, WAl, ZrAl, HfAl, TiN, TaN, TiSiN, TaSiN, WSiN, TiC, TaC, TiAlC, TaAlC, TiAlN, TaAlN, any other suitable metal-containing material or a combination thereof, but the disclosure is not limited thereto. In some embodiments, the semiconductor layer230includes an elementary semiconductor including silicon or germanium in crystal, polycrystalline, and/or an amorphous structure; a compound semiconductor including silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and/or indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and/or GaInAsP; any other suitable material; and/or a combination thereof, but the disclosure is not limited thereto. In some embodiments, the semiconductor layer230is single-layered or multi-layered. In some embodiments, as shown inFIG.7A, after the semiconductor layer230is formed, an outer conductive layer240is formed. In some embodiments, the outer conductive layer240includes a metal-containing material, such as Ti, Ta, W, Al, Zr, Hf, TiAl, TaAl, WAl, ZrAl, HfAl, TiN, TaN, TiSiN, TaSiN, WSiN, TiC, TaC, TiAlC, TaAlC, TiAlN, TaAlN, any other suitable metal-containing material or a combination thereof, but the disclosure is not limited thereto. In some embodiments, the outer conductive layer240is single-layered or multi-layered. In some embodiments, as shown inFIG.7A, after the outer conductive layer240is formed, an outer oxide layer250is formed. In some embodiments, the outer oxide layer250includes silicon oxide. In some embodiments, the outer oxide layer250is single-layered or multi-layered. In some embodiments, formations of the high-k dielectric layer210, the top conductive layer220, the semiconductor layer230, the outer conductive layer240and the outer oxide layer250may include any suitable deposition method, such as coating, ALD, PEALD, CVD, PECVD, LPCVD, PVD (e.g., sputtering), and the like. The present disclosure further provides a semiconductor structure. As shown inFIG.7A, the semiconductor structure includes a landing pad layer110, a middle patterned dielectric layer140, a top patterned dielectric layer160, and a plurality of trench conductive layers180. The trench conductive layers180may be also called as bottom conductive layers, bottom electrode layers, or storage conductive layers. The middle patterned dielectric layer140is disposed over the landing pad layer110, in which the middle patterned dielectric layer140includes a plurality of first openings140a. The top patterned dielectric layer160is disposed over the middle patterned dielectric layer140, in which the top patterned dielectric layer160includes a plurality of second openings160asubstantially aligned with the first openings140a, respectively. Each of the trench conductive layers180is disposed through a portion of one of the second openings160aand a portion of one of the first openings140a. FIG.7Bis an enlarged view of area A inFIG.7A. As shown inFIG.7B, each of the trench conductive layers180has two side layers180a,180bopposite to each other. A height difference H1between a lower one of the two side layers180a,180band a lower surface of the top patterned dielectric layer160is in a range of from 0 to 50 nm, such as 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm or 45 nm. In some embodiments, a ratio of the height difference H1between the lower one180bof the two side layers180a,180band the lower surface of the top patterned dielectric layer160to a distance D1between the middle patterned dielectric layer140(i.e., the patterned dielectric layer closest to the top patterned dielectric layer160) and the top patterned dielectric layer160is between 0 and 0.1, for example, such as 0.01, 0.02, 0.03, 0.04, 0.05, 0.06, 0.07, 0.08, or 0.09. In some embodiments, the ratio of the height difference H1to the distance D1is between 0 and 0.08. In some embodiments, as shown inFIG.7B, one of the two side layers180a,180bis in contact with a side surface of the top patterned dielectric layer160and a side surface of the middle patterned dielectric layer140, and the other180bof the two side layers180a,180bis separated from the top patterned dielectric layer160and the middle patterned dielectric layer140. In some embodiments, as shown inFIG.7B, a height of the one180aof the two side layers180a,180bis higher than a height of the other180bof the two side layers180a,180b. In some embodiments, as shown inFIG.7B, the top patterned dielectric layer160has an upper surface coplanar with an upper surface of the higher one of the two side layers180a,180b. In some embodiments, as shown inFIG.7B, a height difference H2between the two side layers180a,180bis less than or equal to 100 nm. In some embodiments, the height difference H2is in a range of from 60 nm to 100 nm, such as 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm or 95 nm. In some embodiments, as shown inFIGS.7A and7B, the semiconductor structure further includes a high-k dielectric layer210covering the trench conductive layers180; a top conductive layer220covering the high-k dielectric layer210; and a semiconductor layer230covering the top conductive layer220. In some embodiments, the high-k dielectric layer210and the top conductive layer220conformally cover the bottom conductive layer180, the top patterned dielectric layer160and the middle patterned dielectric layer140. In some embodiments, as shown inFIG.7A, the semiconductor structure further includes an outer conductive layer240and an outer oxide layer250. In some embodiments, as shown inFIG.7A, the semiconductor structure further includes a bottom patterned dielectric layer142disposed between the landing pad layer110and the middle patterned dielectric layer140. The bottom patterned dielectric layer142includes a plurality of third openings142asubstantially aligned with the first openings140, respectively. In some embodiments, as shown inFIG.7A, an edge142bof the bottom patterned dielectric layer142extends beyond an edge140bof the middle patterned dielectric layer140, and thus can release stress formed at the corner (i.e., between the edge140bof the middle patterned dielectric layer140and the landing pad layer110) of the outer oxide layer250. In other words, the stress is not easily accumulated at the corner of the outer oxide layer250due to the presence of the extending edge142bof the bottom patterned dielectric layer142. Although the present disclosure has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present disclosure without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present disclosure cover modifications and variations of this invention provided they fall within the scope of the following claims. | 19,466 |
11942278 | DETAILED DESCRIPTION Hereinafter, various embodiments will be described in detail with reference to the drawings. In each drawing, the same or corresponding portions are designated by the same reference numerals, and duplicate explanation will be omitted. FIG.1is a cross-sectional view schematically showing a part of a thin film capacitor according to an embodiment of the present invention. As shown inFIG.1, the thin film capacitor1has a capacitance portion10as a capacitor structure therein in which at least one dielectric layer is sandwiched between a pair of electrode layers. Electrode terminals20(20A,20B and20C) are drawn as electrode terminals from the capacitance portion10. A wiring portion40which electrically connects the capacitance portion10to the electrode terminals20is provided between the capacitance portion10and the electrode terminals20. In the specification, a “laminating direction” is a direction in which layers, such as the capacitance portion10, the wiring portion40and the electrode terminals20, sequentially overlap from the capacitance portion10toward the electrode terminals20. Further, in the following description, the side of the electrode terminal20may be referred to as “the upper side” in the laminating direction, and the side of the capacitance portion10may be referred to as “downward” in the laminating direction. The capacitance portion10includes a plurality of internal electrode layers (electrode layers)11provided in the laminating direction, a dielectric layer12sandwiched between the internal electrode layers11, and a base electrode layer (the electrode layer)13on which the plurality of internal electrode layers and the dielectric layer12are laminated. The internal electrode layers11and the dielectric layer12are alternately laminated on the base electrode layer13. In the embodiment, the capacitance portion10has a multilayer structure including three internal electrode layers11(11A,11B and11C), three dielectric layers12(12A,12B and12C), and one base electrode layer13. Respective layers of the capacitance portion10are laminated in the order of the base electrode layer13, the dielectric layer12A, the internal electrode layer11A, the dielectric layer12B, the internal electrode layer11B, the dielectric layer12C, and the internal electrode layer11C from the lower side in the laminating direction. In the following description, the internal electrode layer11and the base electrode layer13may be collectively referred to as an “electrode layer.” The capacitance portion10has a plurality of regions in which each of the internal electrode layers11and the dielectric layers12is partially removed. Therefore, an opening14extending in the laminating direction in which the internal electrode layers11and the dielectric layers12are laminated is formed in the capacitance portion10. The opening14passes through at least one internal electrode layer11and one dielectric layer12. In the opening14, one of the plurality of internal electrode layers11or the base electrode layer13is exposed at a bottom surface of the opening14. InFIG.1, two openings14(openings14A and14B) are shown, the internal electrode layer11A being exposed in one opening14A, and the internal electrode layer11B being exposed in the other opening14B. The internal electrode layers11A and11B have exposed portions15exposed at the bottom surfaces of the openings14A and14B, and each of the exposed portions15is connected to a first wiring layer43A which will be described later. With such a structure, a multilayer capacitor structure is formed in the capacitance portion10. A thickness T1of the exposed portions15of the internal electrode layers11A and11B is thinner than a thickness T2of other portions (that is, portions not exposed from the opening14) of the internal electrode layers11A and11B and is 50% or more of the thickness T2of the other portions of the internal electrode layers11A and11B. Although omitted inFIG.1, like the internal electrode layer11, the base electrode layer13also has an exposed portion which is exposed at the bottom surface of the opening14and connected to the first wiring layer43A. The internal electrode layer11is formed of a material having conductivity. Specifically, a material containing nickel (Ni) or platinum (Pt) as a main component (a component having the largest content) is suitably used for the internal electrode layer11, and Ni is particularly preferably used. When a material containing Ni as a main component is used for the internal electrode layer11, its content is preferably 50% by mass or more with respect to the entire internal electrode layer11. Also, when the main component of the internal electrode layer11is Ni, at least one element (hereinafter, referred to as an “additional element”) selected from a group consisting of platinum (Pt), palladium (Pd), iridium (Ir), rhodium (Rh), ruthenium (Ru), osmium (Os), rhenium (Re), tungsten (W), chromium (Cr), tantalum (Ta), and silver (Ag) is further contained. When the internal electrode layer11contains an additional element, disconnection of the internal electrode layer11can be inhibited. The internal electrode layer11may contain a plurality of additional elements. A thickness of the internal electrode layer11is, for example, about 10 nm to 1000 nm. Further, the base electrode layer13can be formed of the same conductive material as that of the internal electrode layer11. A thickness of the base electrode layer13can be, for example, 5 μm or more and 50 μm or less. The dielectric layer12is formed of a perovskite-based dielectric material. The perovskite-based dielectric material in the embodiment includes a dielectric (ferroelectric) material having a perovskite structure such as BaTiO3(barium titanate), (Ba1-xSrX)TiO3(barium strontium titanate), (Ba1-xCaX)TiO3, PbTiO3, Pb(ZrXTi1-X)O3or the like, a complex perovskite relaxor type ferroelectric material represented by Pb(Mg1/3Nb2/3)O3or the like, a bismuth layered compound represented by Bi4Ti3O12, SrBi2Ta2O9or the like, a tungsten bronze type ferroelectric material or the like represented by (Sr1-XBaX)Nb2O6, PbNb2O6or the like. Here, in the perovskite structure, the perovskite relaxor type ferroelectric material, the bismuth layered compound, and the tungsten bronze type ferroelectric material, a ratio between A sites and B sites is usually an integer ratio, but there may be intentional deviation from an integer ratio to improve characteristics. The dielectric layer12may appropriately contain an additive as an accessary component to control the characteristics of the dielectric layer12. The dielectric layer12is baked, and a relative dielectric constant (εr) thereof is, for example, 100 or more. The relative dielectric constant of the dielectric layer12is preferably as large as possible, and an upper limit value thereof is not particularly limited. A thickness of the dielectric layer12is, for example, 10 nm to 1000 nm. A electrode terminal20is a terminal for electrically connecting the thin film capacitor1with an external electronic component, a wiring substrate or the like (not shown). The electrode terminal20is laminated on the wiring portion40which will be described later. In the embodiment, the thin film capacitor1has a plurality of electrode terminals20. InFIG.1, only three electrode terminals20A,20B and20C are shown. In the material constituting the electrode terminal20, nickel (Ni), copper (Cu), gold (Au), platinum (Pt), and an alloy containing these metals as a main component are preferable, and in particular, an alloy containing Cu as a main component is preferably used. The higher the purity of Cu constituting the electrode terminal20is, the better it is, and it is preferably 99.99% by weight or more. A small amount of impurities may be contained in the electrode terminal20. Examples of impurities which can be contained in the electrode terminal20formed of an alloy containing Cu as a main component include transition metal elements such as iron (Fe), titanium (Ti), nickel (Ni), aluminum (Al), magnesium (Mg), manganese (Mn), silicon (Si) or chromium (Cr), vanadium (V), zinc (Zn), niobium (Nb), tantalum (Ta) yttrium (Y), lanthanum (La), cesium (Ce), or the like, or rare earth elements, chlorine (Cl), sulfur (S), phosphorus (P), and so on. The wiring portion40is provided to cover a region in which the capacitance portion10is formed, and includes a passivation layer41, a first insulating layer42A, a second insulating layer42B, a first wiring layer43A, and a second wiring layer43B. The first insulating layer42A and the second insulating layer42B serve as insulating layers on the capacitance portion10. The first wiring layer43A and the second wiring layer43B are wiring layers in the wiring portion40. The passivation layer41directly covers the capacitance portion10and is formed of, for example, an inorganic insulating material such as silicon oxide (SiO) or the like. The passivation layer41may be a layer formed of a single inorganic insulating material or may be a laminated structure formed of a plurality of inorganic insulating materials. However, the passivation layer41may not be provided. A thickness of the passivation layer41can be, for example, about 0.5 or more and 5 μm or less. The first insulating layer42A covers the capacitance portion10in each region in which the capacitor is formed in the capacitance portion10. The second insulating layer42B covers a region in which the first insulating layer42A is not formed and partially covers a periphery of the first insulating layer42A. That is, the capacitance portion10is covered with a two-stage structure of the first insulating layer42A and the second insulating layer42B. The first insulating layer42A and the second insulating layer42B are not particularly limited as long as they have insulating properties, and for example, a nonconductive resin such as polyimide, an inorganic material such as silicon oxide (SiO), alumina (Al2O3), and silicon nitride (SiN), or an insulating material obtained by mixing or laminating these can be used. A thickness of the first insulating layer42A is, for example, 0.5 μm or more and 10 μm or less, and a thickness of the second insulating layer42B is, for example, 0.5 μm or more and 10 μm or less. Here, the “thickness of the first insulating layer42A” is a distance between an upper surface of the passivation layer41and an upper surface of the first insulating layer42A. Further, the “thickness of the second insulating layer42B” is a distance between the upper surface of the first insulating layer42A and an upper surface of the second insulating layer42B. The first wiring layer43A is formed along the upper surface of the first insulating layer42between the first insulating layer42A and the second insulating layer42B. The first wiring layer43A extends in a vertical direction along the upper surface of the first insulating layer42A and has a contact portion44A, which is in contact with the exposed portion15of the internal electrode layer11, at a lower end thereof. Also, the second wiring layer43B is formed on the second insulating layer42B along the upper surface of the second insulating layer42B. The second wiring layer43B extends in the vertical direction along the second insulating layer42B and has a contact portion44B, which is in contact with the first wiring layer43A, at a lower end thereof. The electrode terminals20A,20B and20C are formed on the second wiring layer43B. The contact portion44B of the second wiring layer43B on which the electrode terminal20A is formed is in contact with the first wiring layer43A having a contact portion44A which is in contact with the internal electrode layer11A located closest to the base electrode layer13among the three internal electrode layers11. The contact portion44B of the second wiring layer43B on which the electrode terminal20B is formed is in contact with the first wiring layer43A having the contact portion44A which is in contact with the internal electrode layer11B located at a center among the three internal electrode layers11. The contact portion44B of the second wiring layer43B on which the electrode terminal20C is formed is in contact with the first wiring layer43A having the contact portion44A which is in contact with the internal electrode layer11C located closest to the electrode terminal20among the three internal electrode layers11. In this way, the electrode terminals20A,20B and20C are respectively electrically connected to the internal electrode layers11A,11B and11C via the second wiring layer43B and the first wiring layer43A. Next, a manufacturing method of the thin film capacitor1will be described with reference toFIGS.2A to4B.FIGS.2A to4Bare views for explaining the manufacturing method of the thin film capacitor shown inFIG.1.FIGS.2A to4Bare enlarged views showing a part of the thin film capacitor1in the middle of the manufacturing process. Actually, a plurality of thin film capacitors1are formed at one time, and then they are segmented into individual thin film capacitors1. In the following embodiment, a case in which the dielectric layer12is formed by baking will be described, but the dielectric layer12may be formed without baking. First, as shown inFIG.2A, the base electrode layer13is prepared, and a laminated body W is formed by alternately laminating the internal electrode layers11(11A,11B and11C) and the dielectric films12′ (dielectric films12A′,12B′ and12C′) which will be the dielectric layers12(12A,12B and12C) on the base electrode layer13(a lamination process). Due to this process, in the laminated body W, the base electrode layer13, the dielectric film12A′, the internal electrode layer11A, the dielectric film12B′, the internal electrode layer11B, the dielectric film12C′, and the internal electrode layer11C are laminated in this order from the lower side in the laminating direction, and a portion which will be the capacitance portion10is formed. For example, DC sputtering or the like can be used as a method of forming the internal electrode layer11. Also, as a method of forming the dielectric film12′, a film forming technique such as a solution method, a physical vapor deposition (PVD) method like sputtering, or a chemical vapor deposition (CVD) method can be used, and for example, the sputtering method may be selected. Next, as shown inFIG.2B, the openings14(openings14A and14B) are formed in the laminated body W (an etching process). Details of this process will be described later. Thereafter, the laminated body W is baked. Through this process, the dielectric film12′ is sintered, the dielectric layer12is formed, and the capacitance portion10(refer toFIG.2C) is formed. A temperature at the time of baking is preferably a temperature at which the dielectric film12′ is sintered (crystallized), specifically, about 800° C. to 1000° C. being preferable. Further, a baking time can be set to about 5 minutes to 2 hours. An atmosphere at the time of baking is not particularly limited and may be any of an oxidizing atmosphere, a reducing atmosphere and a neutral atmosphere, and it is possible to adopt a constitution in which the baking is performed at least at an oxygen partial pressure which does not oxidize the internal electrode layer11. A baking timing is not limited, and for example, the baking may be performed before the openings14are formed. Next, as shown inFIG.2C, the passivation layer41is formed. Thus, an upper surface of the laminated body W, and a bottom surface and a side surface of the opening14are covered with the passivation layer41. The passivation layer41can be formed by, for example, the PVD method such as sputtering. Next, as shown inFIG.3A, the first insulating layer42A is formed to cover the passivation layer41, and then the passivation layer41formed on the bottom surfaces of the openings14is removed. Additionally, the first wiring layer43A is formed on the first insulating layer42A. The first insulating layer42A may be formed by, for example, applying a thermosetting resin in an uncured state, curing the applied thermosetting resin by heating or the like and then patterning it. Alternatively, the first insulating layer42A may be formed by another method such as sputtering or the like. The first wiring layer43A is formed by sputtering or evaporating a conductive material such as copper (Cu) and then patterning it by etching. Through this process, a plurality of first wiring layers43A which are electrically independent from each other are formed, and the respective first wiring layers43A are electrically connected to the respective internal electrode layers11A,11B and11C. Next, as shown inFIG.3B, the second insulating layer42B is formed on the first insulating layer42A and the first wiring layer43A. Additionally, the second wiring layer43B is formed on the second insulating layer42B. Like the first insulating layer42A, the second insulating layer42B is formed by, for example, applying a thermosetting resin in an uncured state, curing the applied thermosetting resin by heating or the like and then patterning it. Like the first wiring layer43A, the second wiring layer43B is formed by, for example, sputtering or evaporating a conductive material such as copper (Cu) and then patterning it by etching. Through this process, a plurality of second wiring layers43B which are electrically independent from each other are formed. The respective second wiring layers43B are electrically connected to the respective first wiring layers43A, and the wiring portion40is formed. Thereafter, the electrode terminals20A,20B and20C for electrically connecting the thin film capacitor1with external electronic components are formed on the respective second wiring layers43B. The electrode terminals20A,20B and20C are formed by, for example, forming a layer of a conductive material such as copper (Cu) by plating or the like and then etching it or the like. Eventually, the thin film capacitor1shown inFIG.1is obtained by segmentation due to dicing or the like. Next, the etching process will be described in detail with reference toFIGS.4A and4B. The etching process includes a first etching process and a second etching process. In the manufacturing method of the thin film capacitor1, first, the first etching process is performed, and then the second etching process is performed. In the first etching process, as shown inFIG.4A, an opening14′ extending in the laminating direction is formed in the laminated body W. The dielectric film12′ laminated directly on one of the plurality of electrode layers (the internal electrode layer11or the base electrode layer13) is exposed at a bottom surface of the opening14′. Specifically, the openings14A′ and14B′ which will later become the openings14A and14B are formed. Accordingly, the dielectric film12B′ just above the internal electrode layer11A is exposed in the opening14A′, and the dielectric film12C′ just above the internal electrode layer11B is exposed in the opening14B′. For example, argon (Ar) gas or a mixed gas of Ar and CHF3can be used as an etching gas used in the first etching process.FIG.4Ashows a state in which the dielectric films12W and12C′ are partially etched, but in the first etching process, the etching may be performed until upper surfaces of the dielectric films12B′ and12C′ are exposed. In the second etching process, as shown inFIG.4B, one target electrode layer (that is, the internal electrode layers11A and11B) is exposed at the bottom surface of the opening14′. Therefore, the openings14(the openings14A and14B) are formed in the laminate W. Further, the exposed portions15are formed in the internal electrode layers11A and11B. For example, a mixed gas of Ar and CHF3can be used as an etching gas used in the second etching process. An etching rate of one electrode layer (the internal electrode layer11or the base electrode layer13) to be etched in the second etching process is lower than an etching rate of the plurality of electrode layers in the first etching process. As an example, the etching rate of the plurality of electrode layers in the first etching process may be about 30 nm/min or more and about 600 nm/min or less, and the etching rate of the electrode layer in the second etching process may be set to about 5 nm/min or more and about 50 nm/min or less. In addition, in the second etching process, the etching rate of the electrode layer to be etched is lower than the etching rate of the dielectric film12′. As an example, the etching rate of the electrode layer in the second etching process can be about ¼ of the etching rate of the dielectric film12′ to be etched in the second etching process. The etching rate of the electrode layer in the first etching process may be about 1.5 to 3 times the etching rate of the dielectric film12′ to be etched in the first etching process, but as in the second etching process, the etching rate of the electrode layer may be lower than the etching rate of the dielectric film12′. The etching rate of the internal electrode layer11or the base electrode layer13in the first etching process and the second etching process can be adjusted, for example, by changing a type, a flow rate, a mixing ratio or the like of the etching gas. Further, when the first etching process and the second etching process are performed, for example, using a dry etching apparatus such as an ICP-RIE apparatus, the etching rate of the internal electrode layer11or the base electrode layer13can be adjusted by changing an output for generating plasma from the etching gas and/or an output for drawing the plasma into the laminated body W. For example, when the electrode layer is Ni and the dielectric film is BaTiO3, the etching rate of the electrode layer may be 120 nm/min and the etching rate of the dielectric film12′ may be 60 nm/min in the first etching process, and the etching rate of the electrode layer may be 10 nm/min and the etching rate of the dielectric film12′ may be 40 nm/min in the second etching process. As described above, the manufacturing method of the thin film capacitor according to the embodiment includes the first etching process of performing etching until the dielectric film12′ laminated just above one of the plurality of electrode layers (the internal electrode layer11or the base electrode layer13) is exposed, and the second etching process of exposing one electrode layer, and the etching rate of the one electrode layer (the internal electrode layer11or the base electrode layer13) is lower than the etching rate of the dielectric film12′ in the second etching process. Therefore, since the target electrode layer can be exposed under a condition that it is difficult for the electrode layer to be etched, excessive etching of one electrode layer which is in contact with the contact portion44A and connected to the electrode terminal20via the first wiring layer43A and the second wiring layer43B can be suppressed. Thus, it is possible to suppress a decrease in strength of the electrode layer. Further, the etching rate of one electrode layer in the second etching process is lower than the etching rate of the plurality of electrode layers in the first etching process. Therefore, since the target electrode layer can be exposed under a condition that the etching rate of the electrode layer is low, excessive etching of one electrode layer which is in contact with the contact portion44A and connected to the electrode terminal20via the first wiring layer43A and the second wiring layer43B can be suppressed. Therefore, it is possible to suppress the strength of the electrode layer from being lowered. Further, in the first etching process, since the laminated body W can be etched under a condition that the etching rate of the electrode layer is high, it is possible to suppress the electrode layer from being excessively etched while shortening a time required for manufacturing the thin film capacitor1. Further, one electrode layer (the internal electrode layer11or the base electrode layer13) of the thin film capacitor1according to the embodiment has the exposed portion15exposed at the bottom surface of the opening14, the thickness T1of the exposed portion15being thinner than the thickness T2of the other portions of the one electrode layer and being 50% or more of the thickness T2of the other portions of the one electrode layer. That is, since an amount of the etched electrode layer is 50% or less of the thickness T2, the excessive etching of the electrode layer which is in contact with the contact portion44A and connected to the electrode terminal20via the first wiring layer43A and the second wiring layer43B is suppressed. Accordingly, a decrease in the strength of the electrode layer is suppressed. Since the excessive etching of the electrode layer is suppressed and thus deterioration of electrical performance such as an increase in a resistance value of the thin film capacitor1is also curtailed, a yield for the thin film capacitors1is greatly improved. Although the embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment, and various modifications can be made. For example, the case in which the capacitance portion10of the thin film capacitor1has two internal electrode layers11, three dielectric layers12, and one base electrode layer13has been described in the embodiment, but the number of layers of the internal electrode layer11and the dielectric layer12of the capacitance portion10is not particularly limited and can be arbitrarily changed. For example, the capacitance portion10may have one internal electrode layer11, one dielectric layer12, and one base electrode layer13, or may have more internal electrode layers11and dielectric layers12. Further, an insulating base material may be provided instead of the base electrode layer13, and the internal electrode layers11and the dielectric layers12may be alternately laminated on the insulating base material. Further, in the above-described embodiment, although the relative dielectric constant of the dielectric layer12is improved by baking the dielectric film12′, the dielectric layer12may not be baked. Further, in the above-described embodiment, the example in which the etching rate of the electrode layer is lower than the etching rate of the dielectric film12′ in the second etching process has been described, but the etching rate of the electrode layer in the second etching process may be substantially the same as the etching rate of the dielectric film12′ or higher than the etching rate of the dielectric film12′. Further, in the above-described embodiment, the example in which the plurality of openings14(14A and14B) are simultaneously famed in the first etching process and the second etching process has been described, but the first etching process and the second etching process may be repeated to form the openings14one by one. | 26,979 |
11942279 | DETAILED DESCRIPTION The following detailed description is provided to assist the reader in gaining a comprehensive understanding of the methods, apparatuses, and/or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatuses, and/or systems described herein will be apparent to one of ordinary skill in the art. The sequences of operations described herein are merely examples, and are not limited to those set forth herein, but may be changed as will be apparent to one of ordinary skill in the art, with the exception of operations necessarily occurring in a certain order. Also, descriptions of functions and constructions that would be well known to one of ordinary skill in the art may be omitted for increased clarity and conciseness. The features described herein may be embodied in different forms, and are not to be construed as being limited to the examples described herein. Rather, the examples described herein have been provided and thus, this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to one of ordinary skill in the art. Herein, it is noted that use of the term “may” with respect to an embodiment or example, e.g., as to what an embodiment or example may include or implement, means that at least an embodiment or example exists in which such a feature is included or implemented while all examples and examples are not limited thereto. Throughout the specification, when an element, such as a layer, region, or substrate, is described as being “on,” “connected to,” or “coupled to” another element, it may be directly “on,” “connected to,” or “coupled to” the other element, or there may be one or more other elements intervening therebetween. In contrast, when an element is described as being “directly on,” “directly connected to,” or “directly coupled to” another element, there can be no other elements intervening therebetween. As used herein, the term “and/or” includes any one and any combination of any two or more of the associated listed items. Although terms such as “first,” “second,” and “third” may be used herein to describe various members, components, regions, layers, or sections, these members, components, regions, layers, or sections are not to be limited by these terms. Rather, these terms are only used to distinguish one member, component, region, layer, or section from another member, component, region, layer, or section. Thus, a first member, component, region, layer, or section referred to in examples described herein may also be referred to as a second member, component, region, layer, or section without departing from the teachings of the examples. Spatially relative terms such as “above,” “upper,” “below,” and “lower” may be used herein for ease of description to describe one element's relationship to another element as illustrated in the figures. Such spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as being “above” or “upper” relative to another element will then be “below” or “lower” relative to the other element. Thus, the term “above” encompasses both the above and below orientations depending on the spatial orientation of the device. The device may also be oriented in other manners (for example, rotated 90 degrees or at other orientations), and the spatially relative terms used herein are to be interpreted accordingly. The terminology used herein is for describing various examples only, and is not to be used to limit the disclosure. The articles “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms “comprises,” “includes,” and “has” specify the presence of stated features, numbers, operations, members, elements, and/or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, operations, members, elements, and/or combinations thereof. Due to manufacturing techniques and/or tolerances, variations of the shapes illustrated in the drawings may occur. Thus, the examples described herein are not limited to the detailed shapes illustrated in the drawings, but include changes in shape occurring during manufacturing. The features of the examples described herein may be combined in various manners as will be apparent after gaining an understanding of the disclosure of this application. Further, although the examples described herein have a variety of configurations, other configurations are possible as will be apparent after gaining an understanding of the disclosure of this application. The drawings may not be to scale, and the relative sizes, proportions, and depiction of elements in the drawings may be exaggerated for clarity, illustration, and convenience. Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the drawings, the X-direction may be defined as a first direction, an L direction or a length direction, the Y-direction may be defined as a second direction, a W direction or a width direction, and the Z-direction may be defined as a third direction, a T direction, or a thickness direction. FIG.1is a perspective view of a tantalum capacitor according to an embodiment. Referring toFIG.1, a tantalum capacitor1000according to an embodiment may include a tantalum body100including tantalum powder (or particle) and having a tantalum wire150exposed to one end surface, a molded portion200having fifth and sixth surfaces5and6opposing each other in a first direction, third and fourth surfaces3and4opposing each other in a second direction, and first and second surfaces1and2opposing each other in a third direction, and formed to surround the tantalum body100, an anode lead frame300exposed to (or extending from) the second surface2of the molded portion200and electrically connected to the tantalum wire150, and a cathode lead frame400spaced apart from the anode lead frame300and exposed to (or extending from) the second surface2of the molded portion200. The tantalum body100may have the tantalum wire150exposed in the X-direction of the body. In this case, the tantalum wire150may penetrate through at least a portion of a tantalum sintered body110in the first direction (X). The tantalum wire150may be installed by being inserted into a mixture of the tantalum powder and a binder so as to be eccentric from the center before the powder in which the tantalum powder and the binder is mixed is compressed. For example, the tantalum body100may be manufacture by inserting and mounting the tantalum wire150in the tantalum powder mixed with a binder to form a tantalum element of a required size and then, by sintering the tantalum element in a high temperature and high vacuum (10−5torr or less) atmosphere for about 30 minutes. The molded portion200covers the tantalum body100, and may be formed in such a manner that one surface of a first connection portion320of the anode lead frame300and one surface of a second connection portion of the cathode lead frame400are exposed. The molded portion200of the tantalum capacitor according to an embodiment may be formed by transfer molding a resin such as an epoxy molding compound (EMC) or the like to surround the tantalum body100. The molded portion200serves to protect the tantalum wire150and the tantalum body100from the outside. The anode lead frame300may be formed of a conductive metal such as nickel/iron alloy or the like, and may include the first connection portion320, a first lead portion330, and a first bend portion310. The first bend portion310may be inclined toward the tantalum body100with respect to the first connection portion320. The first connection portion320of the anode lead frame300may be exposed to the second surface2of the molded portion200. The first connection portion320may be exposed to the lower surface of the molded portion200to serve as a terminal at the time of being mounted on the board. In this case, the first connection portion320may be spaced apart from the tantalum body100and may function as a positive electrode of the tantalum capacitor1000according to an embodiment. The cathode lead frame400may be formed of a conductive metal such as a nickel/iron alloy, and may include a second bend portion, a second connection portion, and a second lead portion formed of an integral body. The second connection portion may be disposed parallel to and spaced apart from the first connection portion320of the anode lead frame300in the first direction (X). The second connection portion of the cathode lead frame400may be exposed to the second surface2of the molded portion200. The second connection portion may be exposed to the lower surface of the molded portion200to serve as a terminal at the time of being mounted on the board. In this case, the second connection portion may be in contact with the tantalum body100and may function as a negative electrode of the tantalum capacitor1000according to an embodiment. FIG.2is a cross-sectional view of a tantalum body in a tantalum capacitor according to an embodiment as viewed in the I direction. FIG.3is a cross-sectional view taken along line I-I′ ofFIG.2. Referring toFIG.2, the tantalum body100of the tantalum capacitor1000according to an embodiment may include the tantalum sintered body110formed by sintering a molded body containing metal powder, a conductive polymer layer120disposed on the tantalum sintered body110, a carbon layer130disposed on the conductive polymer layer120, and a silver (Ag) layer140disposed on the carbon layer130. The tantalum capacitor may further include the tantalum wire150having an insertion region positioned inside the tantalum sintered body110and a non-insertion region positioned outside the tantalum sintered body110. The tantalum sintered body110may be formed by sintering a molded body including a metal powder and a binder. In detail, the tantalum sintered body110may be manufactured by mixing and stirring metal powder, a binder and a solvent in a certain ratio, compressing the mixed powder to form a rectangular parallelepiped, and sintering the same under high temperature and high vibration. The metal powder is not particularly limited as long as it may be used for the tantalum sintered body110of the tantalum capacitor1000according to an embodiment, and may be a tantalum (Ta) powder. However, the present disclosure is not limited thereto, and for example, the metal powder may be at least one selected from the group consisting of aluminum (Al), niobium (Nb), vanadium (V), titanium (Ti) and zirconium (Zr). Accordingly, an aluminum sintered body, a niobium sintered body, or the like may be used instead of the tantalum sintered body. The binder is not particularly limited, and may be, for example, a cellulose-based binder. The cellulose-based binder may be at least one selected from the group consisting of nitrocellulose, methyl cellulose, ethyl cellulose, and hydroxypropyl cellulose. In addition, the tantalum wire150may be inserted and mounted so as to be eccentric from the center before the mixed powder is compressed. According to an embodiment, a dielectric oxide layer may be formed as an insulating layer on the tantalum sintered body110. For example, the dielectric oxide layer may be formed by growing an oxide film (Ta2O5) on the surface of the tantalum sintered body110in a formation process using an electrochemical reaction. At this time, the dielectric oxide layer changes the tantalum sintered body110into a dielectric material. In addition, the conductive polymer layer120having a negative polarity may be applied on the dielectric oxide layer to be formed. The conductive polymer layer120is not particularly limited, and may include, for example, a conductive polymer. In detail, a conductive polymer is formed using a method of chemical polymerization or electrolytic polymerization using 3,4-ethylenedioxythiophene (EDOT), pyrrole monomer, or polypyrrole, and thereafter, may be formed as a negative electrode layer having a conductive polymer negative electrode on the outer surface of the tantalum sintered body110formed as an insulating layer. For example, the conductive polymer layer120may be formed using a polymer slurry, and the polymer slurry may include at least one of polypyrrole, polyaniline, or EDOT (3,4-ethylenedioxythiophene). In addition, the conductive polymer layer120may include poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS). PEDOT:PSS may be prepared by oxidative polymerization of polystyrene sulfonate (PSS), using a charge-balancing template. According to an example of the present disclosure, the conductive polymer layer120may include first and second fillers121and122, and at least one of the first and second fillers121and122may have a core-shell structure, and accordingly, may include a coating film formed on the surface of the core. A detailed description of the conductive polymer layer120will be described later. The carbon layer130is laminated on the conductive polymer layer120, by dissolving the carbon powder in an organic solvent containing an epoxy resin, impregnating the tantalum sintered body110in a solution in which carbon powder has been dissolved, and then drying the same at a predetermined temperature to volatilize the organic solvent. In addition, the carbon layer130may serve to prevent passage of silver (Ag) ions. Next, the silver (Ag) layer140formed of a silver (Ag) paste may be formed on the upper surface of the carbon layer130. The silver (Ag) layer140may be laminated on the outside of the carbon layer130to improve conductivity. In addition, the silver (Ag) layer140may facilitate electrical connection for polarity transfer by improving conductivity with respect to the polarity of the negative electrode layer. FIG.4is an enlarged view of area A ofFIG.3. FIG.5is a cross-sectional view schematically illustrating a core-shell structure of the first filler ofFIG.4. Referring toFIG.4, in the case of the tantalum capacitor1000according to an example of the present disclosure, the above-described conductive polymer layer120may have a structure in which the first and second fillers121and122are distributed in a polymer slurry for formation of the conductive polymer layer120. The first filler121according to an embodiment of the present disclosure may include non-conductive particles. As an example, the first filler121may include silica (SiO2), but is not limited thereto, and may include any one or more metal oxides among BaTiO3, Al2O3, and ZrO2. Tantalum capacitors of the related art have a problem in that the conductive polymer layer has relatively high moisture absorption properties and thus the reliability of the capacitor is low. In the case of embodiments of the present disclosure, by dispersing the first filler121including non-conductive particles such as silica in the conductive polymer layer120, the moisture absorption rate of the conductive polymer layer120may be effectively lowered. In addition, as the conductive polymer layer120of the present disclosure includes the non-conductive first filler121, the flow of current that causes leakage current may be prevented, and the properties of the entire capacitor1000may be improved by increasing the strength of the conductive polymer layer120. On the other hand, in a case in which a plurality of first fillers121are disposed in the conductive polymer layer120more than necessary, it may be advantageous in terms of a decrease in moisture absorption, but a problem in that the equivalent series resistance (ESR) is increased may occur. In the case of the tantalum capacitor1000according to an embodiment, since the conductive polymer is bonded to the surface of the first filler121, an increase in ESR may be suppressed even when the content of non-conductive particles is increased. Referring toFIG.5, the structure of the first filler121according to the tantalum capacitor1000of the present disclosure is illustrated in detail. The first filler121may include a core1211and a coating film1212(or a shell) surrounding the core1211. Accordingly, the first filler121may have a core-shell structure. Referring to the enlarged view ofFIG.5, the coating film1212may include a conductive polymer such as polyheterocycle (e.g., polypyrrole, polythiophene, polyaniline, or the like), polyacetylene, poly-p-phenylene, and polyphenolate, and as a non-limiting example, the conductive polymer may be PEDOT:PSS. In some embodiments, the shell may include a conductive polymer. The core1211may include the material of the first filler121described above. For example, the core1211may include silica (SiO2), but is not limited thereto, and may include any one or more metal oxides among BaTiO3, Al2O3, and ZrO2. InFIG.5, the coating film1212may include a conductive polymer in which PSS1212aand PEDOT1212bare combined. At this time, the PSS1212amay be coupled to the surface of the core1211of the first filler using a coupling agent and a condensation reaction, and as a result, the core1211of the first filler may be covalently bonded to a functional group reacting with the inorganic material of the coupling agent, and the PSS1212amay be bonded to a functional group reacting with the organic material of the coupling agent. In addition, the PEDOT1212bmay be ionically coupled to the PSS1212a. As an example, the core1211of the first filler121according to an embodiment of the present disclosure may be coupled to the coating film1212which is a polymer, using a coupling agent. In this case, the coupling agent may have two or more different reactive groups in the molecule, one of which may be a reactive group chemically bonding with an inorganic material, and the other of which may be a reactive group chemically bonding with an organic material. For example, the coupling agent may have an R—Si(OR′)3structure, in which a functional group is denoted on the left side of Si and a hydrolyzable group on the right side of Si are denoted as OR′. The coupling agent may be hydrolyzed by treatment with water, a mixture of water and alcohol, or a variety of polar and non-polar solvents. The core1211of the first filler121including silica may have a hydroxyl group (—OH) formed on the surface thereof through a treatment reaction with an aqueous alkali solution. The core1211and the coupling agent are mixed. In this case, the hydroxyl group (—OH) on the surface of the core1211and the hydroxyl group (—OH) of the coupling agent may be covalently bonded through a condensation reaction. By mixing with PEDOT:PSS aqueous dispersion and performing dehydration reaction thereof, the first filler having a core-shell structure in which the coating film1212including PEDOT(1212b):PSS(1212a) is formed on the surface of silica (core,1211) may be manufactured. In this case, the hydroxyl group of the core1211and the hydroxyl group of the coupling agent are covalently bonded, and the PSS1212aand the PEDOT1212bmay be ionically bonded. The first filler121manufactured in this manner is dispersed in the conductive polymer layer120to improve withstand voltage characteristics, improve breakdown voltage (BDV) characteristics, and effectively prevent Leakage Current (LC). In addition, due to the coating film1212chemically adsorbed on the surface of the core1211, an increase in ESR in a high-temperature environment may be effectively suppressed while maintaining the ESR at a level of the related art. As described above, since the coating film1212containing PEDOT:PSS is bonded to the surface of the core1211of the first filler121, it is possible to suppress a significant increase in equivalent series resistance (ESR) due to an increase in the content of the non-conductive first filler121. In addition, since the coating film1212includes PEDOT:PSS, the first filler121may be easily dispersed between the conductive polymer layers120. TABLE 1Ratio of firstfiller inpolymer layerMoisture(cross-sectionalabsorptionarea ratio)(%)ESR (mΩ)10.016.5 (NG)10520.1514.6 (NG)10430.4111.5 (NG)10440.488.910250.537.410160.586.110170.615.110380.654.610590.734.0110100.813.7120 (NG) Table 1 is a table showing moisture absorption and equivalent series resistance (ESR) according to the ratio of the first filler121including silica (SiO2) in the conductive polymer layer120. In this case, the ratio of the first filler121is based on the ratio of the area occupied in the polymer layer120in one cross-section, and an example of measuring the ratio of the area of the first filler will be described. First, a tantalum capacitor sample is prepared, and a polishing process is performed from the negative electrode to the inside up to ⅓ to expose the cross section of the tantalum body. In this case, the polishing process may use laser polishing. In the cross section, the conductive polymer layer120is in the form of a band, and a total of 10 measurement points may be selected at equal intervals, and the SEM image is analyzed for a 5 μm×5 μm area of each measurement point. In this case, the conditions for acquiring the SEM image were a magnification of 15,000 times or more and an acceleration voltage of 10 kV. The images obtained in this manner were analyzed using an image analysis program, for example, paint, to analyze the area occupied by silica as the number of pixels. In the experimental results of Table 1, when the moisture absorption was 10% or more, the ESR was determined to be unsuitable (NG) when it was 120 mΩ. As can be seen from the experimental results of Table 1, as the content of the first filler121including silica increases, it was confirmed that the moisture absorption may be lowered to an appropriate level when the cross-sectional area ratio exceeds 0.41 while the moisture absorption of the conductive polymer layer120tends to decrease. However, when the cross-sectional area ratio was increased to 0.81 level, ESR significantly increased to 120 mΩ level. As described above, the tantalum capacitor according to an embodiment has a structure in which the first filler121having a core-shell structure that may reduce moisture absorption and effectively suppress an increase in ESR is dispersed in the conductive polymer layer120. Considering the moisture absorption and ESR characteristics, the preferred ratio of the first filler may be set to be more than 0.41 and less than 0.81 based on the cross-sectional area ratio. On the other hand, before the first filler121is dispersed in the conductive polymer layer120, the first filler121may already have a core-shell structure, and accordingly, the coating film1212including PEDOT:PSS on the surface may be formed. As a result, as the coating film1212of the first filler121and the conductive polymer layer120contain the same material, when the first filler121is dispersed in the conductive polymer layer120, the bonding force therebetween may be secured, thereby preventing peeling defects and further facilitating dispersion. In the tantalum capacitor1000of the present disclosure, the first filler121having a core-shell structure as described above, in detail, the first filler121including PEDOT:PSS, in which the coating film1212on the surface is a conductive polymer, is dispersed in the conductive polymer layer120. Therefore, the effects of reducing moisture absorption, preventing an increase in ESR, and securing reliability may be all obtained. On the other hand, as will be described later, the conductive polymer layer120of the tantalum capacitor according to an embodiment may further include a second filler122including conductive particles. On the other hand, referring toFIG.4, the second filler122may be dispersed in the conductive polymer layer120. The conductive polymer layer120of the present disclosure may additionally include a second filler122including conductive particles of any one or more of graphene, carbon nanotubes, and black carbon. Since the conductive polymer layer120includes the second filler122formed of conductive particles, the thickness of the conductive polymer layer120on the central portion of the tantalum sintered body110may be easily adjusted. In detail, in the process of forming the conductive polymer layer120on the tantalum sintered body110, one or more conductive particles of graphene, carbon nanotubes, and black carbon may cause a coffee ring effect. For example, the polymer slurry containing any one or more conductive particles among the graphene, carbon nanotubes, and black carbon starts to evaporate from the edge surface of the tantalum sintered body110, and the density of particles at a first evaporated point increases, and due to this increased particle density and high solid content, the surrounding slurry and particles are further pulled, so that the thickness of the conductive polymer layer120disposed at the edge of the tantalum sintered body110may be increased, and thus, thickness control is relatively easy. In addition, according to an embodiment, the conductive polymer layer120selectively selects particles having different conductivity among graphene, carbon nanotubes, and black carbon, and thus, the equivalent series resistance (ESR) of the tantalum capacitor may be adjusted to a required level. On the other hand, in the case of the second filler122, a coating film may also be formed on the surface as in the case of the first filler121. As the coating film, a metal oxide may be used. On the other hand, the average particle size of the first and second fillers121and122may be 100 nm or more and 1 μm or less, in detail, 40 nm or more and 5 μm or less, but is not limited thereto. Other features are the same as those of the tantalum capacitor according to the embodiment described above, and thus a detailed description thereof will be omitted. As set forth above, according to an embodiment of the present disclosure, a tantalum capacitor having excellent reliability may be provide by lowering a moisture absorption rate while effectively suppressing an increase in equivalent series resistance. In addition, a tantalum capacitor having improved reliability in a high temperature or high humidity environment may be provided. While this disclosure includes detailed examples, it will be apparent to one of ordinary skill in the art that various changes in form and details may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only, and not for purposes of limitation. Descriptions of features or aspects in each example are to be considered as being applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed to have a different order, and/or if components in a described system, architecture, device, or circuit are combined in a different manner, and/or replaced or supplemented by other components or their equivalents. Therefore, the scope of the disclosure is defined not by the detailed description, but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents are to be construed as being included in the disclosure. | 27,459 |
11942280 | DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS FIG.1shows a first embodiment of a winding element2of a hybrid polymer aluminum electrolytic capacitor1. The winding element2has a diameter of more than 10 mm and a height of more than 12 mm. The winding element2comprises an anode foil3, a cathode foil4and a separator5which are wound around a common axis. The separator5is arranged between the anode foil3and the cathode foil4. The winding element2further comprises another separator which is also arranged between the anode foil3and the cathode foil4and which is not shown inFIG.1to simplify the Figure. In particular, the anode foil3, the separator5, the cathode foil4and the other separator are stacked in this order and then wound around the axis. The winding element2has been impregnated with a polymer6. The impregnation is indicated inFIG.1by showing the polymer6that covers the anode foil3, the cathode foil4and the separator5in an enlarged view. The polymer6which covers the anode foil3, the cathode foil4and the separators5is conductive. In addition to the polymer, the capacitor1also comprises a liquid electrolyte. The anode foil3comprises an aluminum foil. The surface of the aluminum foil has been roughened by an etching process. Then, a dielectric oxide film has been formed on the surface by an oxidation treatment. Thus, the anode foil3comprises aluminum foil having an oxide layer on its surface. The cathode foil4also comprises an aluminum foil where the surface of the aluminum foil has been roughened by an etching process and, then, a dielectric oxide film has been formed on the surface by an oxidation treatment. Thus, the cathode foil4also comprises aluminum foil having an oxide layer on its surface. The anode foil3and the cathode foil4are dimensioned such that they result in a winding element2having a diameter of more than 10 mm and a height of more than 12 mm when being wound. Thus, the foils3,4are larger and broader than the foils commonly used for hybrid polymer aluminum electrolytic capacitors. Each of the separators5is a paper that has been impregnated with the polymer6. The common axis around which the winding element2is wound defines an axial direction. The winding element2further comprises tabs7,8which are used for electrically contacting the winding element2. The winding element2comprises two tabs7which are both connected to the anode foil3. The tabs7connected to the anode foil3extend in the positive axial direction. Further, the winding element2comprises two tabs8which are connected to the cathode foil4. The tabs8connected to the cathode foil4extend in the negative axial direction, i.e., in the opposite direction to the tabs7connected to the anode foil3. Capacitors1having tabs7connected to the anode foil3and tabs8connected to the cathode foil4which extend in opposite directions are also known as axial capacitors. In contrast to this, in a radial capacitor, a tab connected to the anode foil and a tab connected to the cathode foil both extend in the same axial direction, i.e., both extending in the positive axial direction or both extending in the negative axial direction. The use of multiple tabs7,8for connecting each of the anode foil3and the cathode foil4allows to use long and broad foils3,4. The use of multiple tabs7,8reduces the metal resistance of the winding element2as a current can be fed into winding element2at multiple locations, thus reducing the length which the current has to travel inside the winding element2. The use of multiple tabs7,8is not known from hybrid polymer aluminum electrolytic capacitors. FIG.2shows different kinds of capacitors in a perspective view. In particular,FIG.2shows two axial capacitors9, each having two tabs7extending in the positive axial direction and two tabs8extending in the negative axial direction. The tabs7extending in the positive axial direction are connected to the anode foil3and the tabs8extending in the negative axial direction are connected to the cathode foil4. For the axial capacitor shown on the left, the two tabs8are not visible due to the perspective. The winding element of the axial capacitor9is wound around an axis. Each of the two tabs7connected to the anode foil3is arranged in a radial distance away from this axis. In a plane perpendicular to the axis, the two tabs7are arranged in point symmetry with respect to the axis. Each of the two tabs8connected to the cathode foil4is arranged in a radial distance away from the axis. In a plane perpendicular to the axis, the two tabs8are arranged in point symmetry with respect to the axis. The axial capacitors9having two tabs7,8connected to each of the anode foil3and the cathode foil4have a low ESR and, thus, an increased ripple current capability. It can be gathered that constructing a capacitor having two tabs connected to each of the anode foil and the cathode foil is possible for an axial capacitor9.FIG.2further shows two snap-in capacitors10. A minimum diameter of 22 mm is required in order to enable the construction of a snap-in capacitor10having two tabs connected to each of the anode foil3and the cathode foil4.FIG.2further shows a radial capacitor11. It is not possible to construct a radial capacitor11having two tabs connected to each of the anode foil3and the cathode foil4. The capacitor1shown inFIG.1is arranged inside in a can which is not shown inFIG.1. The can comprises a tubular can body, a can bottom and a cover. The can bottom and the cover are disc-shaped. In the axial direction, the tubular can body is sandwiched between the can bottom and the cover. The cathode foil4has a larger extent in the axial direction towards the can bottom than the anode foil3. The separators5have a smaller extent than the cathode foil4in the axial direction towards the can bottom. The anode foil3has a shorter extent in the axial direction towards the can bottom than the cathode foil4and the separators5. The extending cathode foil4touches the can bottom. Thus, a current can flow through a shortcut via the conductive case bottom to the cathode foil4. The extending cathode foil4shown inFIG.1results in a reduced ESR. This idea is known for electrolytic capacitors wherein the winding element is mechanically pressed to the can bottom so that an extending cathode foil touches the can bottom. This approach works only with low reliability and for a limited time. During operation, an oxide layer between the cathode foil and the can bottom is formed that reduces and finally interrupts the electrical connection. However, in the hybrid polymer aluminum electrolytic capacitor1, the cathode foil4is covered by polymer. The polymer cover prevents an oxidation of the cathode foil4. Therefore, no oxide layer can grow. Moreover, the polymer is also conductive such that a current can flow from the can bottom to the cathode foil4via the polymer. Accordingly, no connection of two metals is required. Thus, the design shown inFIG.1results in a better thermal connection and a reduced ESR. For a long term stability of the electrical connection to the can, a mechanical movement of the winding element2relative to the can should be prevented. Therefore, the cathode foil4may be fixed to the can bottom, e.g., by welding. Welding has the benefit of a low contact resistance, but has the drawback of an additional process step and, thus, additional costs. Alternatively or additionally, the can bottom may further comprise a structure, e.g., ribs. The structure may further help to avoid any mechanical movements. The structure may be designed to fix the extending cathode foil4. For example, the cathode foil4may be clamped between two adjacent ribs. The cathode foil4and the structure on the can bottom can be designed such that they merge with each other, thereby providing mechanical stability. Moreover, the can may comprise a corrugation which also fixes the winding element2mechanically. The corrugation may be an inwardly protruding part of the can. The corrugation keeps the winding element2stable to the can bottom. Therefore, the current path from the can bottom to the cathode foil4via the polymer or via a metal connection keeps stable. Additionally or alternatively, the anode foil3may be extended in the opposite direction. Accordingly, the extended anode foil3may touch the cover of the can. The extended anode foil3may be welded to the cover. This solution provides equivalent low ESR, like using a high number of tabs on the anode side. FIG.3shows another embodiment of a capacitor1which comprises three winding elements2, each winding element2having a height of more than 12 mm. Each winding element is connected by two tabs7,8, one tab7connected to the anode foil3and one tab8connected to the cathode foil4. All of the tabs7connected to the anode foils3are connected together. Moreover, all of the tabs8connected to the cathode foils4are also connected together. Thus, the winding elements2are electrically connected in parallel to each other. The winding elements2are arranged in a common can12. All tabs7,8are extracted on the same side. Thus, each of the winding element2is connected as a radial winding element. All of the tabs7,8connected to the anode foils3are connected together. Moreover, all of the tabs7,8connected to the cathode foils4are also connected together. In an alternative design, the winding elements2may be formed as axial winding elements wherein the tabs7connected to the anode foil are extracted at one end of the winding elements2and the tabs8connected to the cathode foil are extracted at the opposite end of the winding element2. FIG.4is an x-ray picture of a common polymer electrolytic capacitor. With the help ofFIG.4, a failure mechanism which has been identified will be explained. The polymer is mostly connected with the oxide of the anode foil3and the oxide of the cathode foil4. During a voltage change of the capacitor, the polymer potential is mainly close to the potential of the cathode foil potential because the oxide on the cathode foil4is very thin. However, the capacitor also comprises polymer regions which are only in contact to the anode foil3. These regions are marked by two thick arrows A inFIG.4. In this region only the potential of the anode foil3is dominating. Therefore, compensation currents are generated when the capacitor is charged or discharged. Moreover, if the voltage charge is too fast, the caused compensating current can destroy the polymer and causes short circuits. As will be discussed now, the anode foil3and the cathode foil4are dimensioned and wound in such a way that compensation currents can be avoided. FIG.5shows a schematic cross-sectional view of the hybrid polymer aluminum electrolytic capacitor1. The capacitor1comprises the anode foil3, the cathode foil4, a first separator5and a second separator5. Moreover, the capacitor1comprises a liquid electrolyte13which fills the gaps between the anode foil3, the cathode foil4and the separators5. The anode foil3is shorter than the cathode foil4. Thus, at the beginning of its winding and at the end of its winding, the winding element2does not comprise the anode foil3. In every part of the winding element2, the cathode foil4is always parallel to the anode foil3. The winding element2does not comprise a region wherein the anode foil3is free from the cathode foil4. The winding element2does not comprise a polymer region that is in contact with the anode foil3and not in contact with the cathode foil4. The anode foil3and the cathode foil4are arranged and dimensioned such that, in the winding element2, every part of the anode foil3is covered by the cathode foil4. Thus, it can be ensured that the capacitor1does not comprise a polymer region wherein the potential applied to the anode foil3can dominate the potential in an adjacent polymer region. Accordingly, no compensation current can be generated. The arrangement of the cathode foil4ensures that the polymer and the electrolyte13have more or less the same electrical potential. The failure mechanism discussed with respect toFIG.4can be avoided. Moreover, an inhomogeneous thickness of the oxide layer on the cathode foil4can also result in compensation currents during charging and discharging of the capacitor1. To avoid the generation of the compensation current, the oxide layer on the cathode foil4has a homogeneous thickness. Thus, the thickness of the oxide layer is considered as being homogeneous when its minimum thickness is not thinner than 95% of its maximum thickness. The homogeneous oxide thickness on the cathode foil4further increases the robustness against transient electrical loads. This can be achieved by using cathode foils4formed to a voltage level of, e.g., 3 V or more, instead of applying unformed foils having a lower and naturally varying oxide thickness. In the following, the method of impregnating the winding element2with a polymer dispersion is described. The winding element2is wound before the step of impregnating the winding element2. The polymer dispersion comprises electrically conductive solid polymer particles or a polymer powder. Additionally, the polymer dispersion comprises a solvent, e.g., water. In the prior art, methods of impregnating a winding element2with a polymer dispersion are known wherein the polymer dispersion is applied under vacuum conditions. As previously discussed, this method has technical limitations in terms of the height of the winding element2.FIG.6shows an example of a polymer dispersion being applied to a winding element2with a height larger than 10 mm using a conventional impregnation method.FIG.6clearly shows that the polymer solution penetrates only on upper and bottom parts of the separator, anode foil and cathode foil. The middle part of the separator is completely free from polymer as the polymer particle could not penetrate by using a strong vacuum. In contrast to this, according to embodiments of the present invention, the winding element2may be impregnated with a polymer dispersion using pressure pulses of an overpressure. The winding element2is arranged in a pressure vessel which is closed tightly. The vessel is flooded by a polymer dispersion through a joint. An overpressure air is applied to the vessel through the joint. The overpressure air may have a pressure larger than 1 atm. The overpressure may be in the range of 2 to 150 bar. The overpressure is released after a few seconds, e.g., after a time period in the range of 2 seconds to 20 seconds. Then, the pressure in the vessel drops to lower pressure. The lower pressure may either be an atmospheric pressure or a pressure below 1 bar. The cycle of applying an overpressure followed by applying lower pressure is considered as one pressure pulse. The cycle is repeated multiple times. By applying pressure pulses to the winding element and the polymer dispersion, the polymer dispersion is distributed in a homogenized way in the anode foil3, the separator5and the cathode foil4. FIG.7shows a detailed photograph of an anode foil3, a separator5and a cathode foil4which have been impregnated with the help of pressure pulses. The polymer particle has reached the core of the separator5. Penetration of the polymer particles into the winding element2and the homogeneity of the polymer distribution are excellent. In an alternative method, the winding elements2are arranged in a tube and the tube is filled with the polymer dispersion which flows through the tube and thereby through the winding elements2. Moreover, an overpressure of more than 1.5 bar may be applied to the polymer dispersion. This method also results in a homogenous covering of the anode foil3, the separator5, the cathode foil4and the tabs7,8with the polymer. In particular, the polymer dispersion enters on the bottom or on the top of the winding element2and flows through the winding element2in the axial direction. The method can be designed such that the polymer dispersion is circulated and thus flows through the winding element2multiple times, each time further improving the impregnation of the winding element2. The above described methods for impregnating the winding element2enable a homogeneous impregnation of winding elements2having a diameter of more than 10 mm and a height of more than 12 mm. The hybrid polymer aluminum electrolytic capacitor described above has the following advantages. Even at diameter dimensions at more than 10 mm it provides a low ESR and therefore a high ripple current ability. As the capacitor has a height of more than 12 mm, it has a low ESR. Further, the diameter of more than 10 mm and the height of more than 12 mm result in a high capacity. The low ESR and the large dimensions further result in a high ripple current ability. Even in the case of high voltage ripple loads, a high quality can be ensured. Thus, a customer can use a lower number of big capacitors instead of using a bigger number of small capacitors. The lifetime of the hybrid polymer aluminum electrolytic capacitor is long due to its big dimensions. The capacitor has a large reservoir of liquid electrolytic which therefore escapes more slowly by diffusion through the rubber and can materials. FIGS.8to12show different designs of the capacitor comprising a winding element having a diameter of more than 10 mm and a length of more than 12 mm. Each of the capacitors shown inFIGS.8to12is a hybrid polymer aluminum electrolytic capacitor.FIG.8shows an axial capacitor. It is configured for soldering or welding conducting.FIG.9shows a soldering star capacitor. A soldering star capacitor provides the advantage of a low inductance.FIG.10shows a flat horizontal soldering star capacitor.FIG.11shows a surface-mountable capacitor.FIG.12shows a press-fit version of either the capacitor shown inFIG.9or the capacitor shown inFIG.10. | 17,833 |
11942281 | DETAILED DESCRIPTION OF THE INVENTION The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout. Definitions The terms used in this specification generally have their ordinary meanings in the art, within the context of the invention, and in the specific context where each term is used. Certain terms that are used to describe the invention are discussed below, or elsewhere in the specification, to provide additional guidance to the practitioner regarding the description of the invention. For convenience, certain terms may be highlighted, for example using italics and/or quotation marks. The use of highlighting has no influence on the scope and meaning of a term; the scope and meaning of a term is the same, in the same context, whether or not it is highlighted. It will be appreciated that same thing can be said in more than one way. Consequently, alternative language and synonyms may be used for any one or more of the terms discussed herein, nor is any special significance to be placed upon whether or not a term is elaborated or discussed herein. Synonyms for certain terms are provided. A recital of one or more synonyms does not exclude the use of other synonyms. The use of examples anywhere in this specification including examples of any terms discussed herein is illustrative only, and in no way limits the scope and meaning of the invention or of any exemplified term. Likewise, the invention is not limited to various embodiments given in this specification. It will be understood that, as used in the description herein and throughout the claims that follow, the meaning of “a”, “an”, and “the” includes plural reference unless the context clearly dictates otherwise. Also, it will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention. Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The exemplary term “lower”, can therefore, encompasses both an orientation of “lower” and “upper,” depending of the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The exemplary terms “below” or “beneath” can, therefore, encompass both an orientation of above and below. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” or “has” and/or “having” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, “around”, “about” or “approximately” shall generally mean within 20 percent, preferably within 10 percent, and more preferably within 5 percent of a given value or range. Numerical quantities given herein are approximate, meaning that the term “around”, “about” or “approximately” can be inferred if not expressly stated. As used herein, the terms “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” and the like are to be understood to be open-ended, i.e., to mean including but not limited to. As used herein, if any, the term “scanning electron microscope” or its abbreviation “SEM” refers to a type of electron microscope that images the sample surface by scanning it with a high-energy beam of electrons in a raster scan pattern. The electrons interact with the atoms that make up the sample producing signals that contain information about the sample's surface topography, composition and other properties such as electrical conductivity. As used herein, a “nanostructure” refers to an object of intermediate size between molecular and microscopic (micrometer-sized) structures. In describing nanostructures, the sizes of the nanostructures refer to the number of dimensions on the nanoscale. For example, nanotextured surfaces have one dimension on the nanoscale, i.e., only the thickness of the surface of an object is between 0.1 and 1000 nm. Sphere-like nanoparticles have three dimensions on the nanoscale, i.e., the particle is between 0.1 and 1000 nm in each spatial dimension. A list of nanostructures includes, but not limited to, nanoparticle, nanocomposite, quantum dot, nanofilm, nanoshell, nanofiber, nanoring, nanorod, nanowire, nanotube, and so on. OVERVIEW OF THE INVENTION The present invention, in one aspect, relates to a method of making non-covalently bonded graphene-titania nanocomposite thin films with improved photoactivities. Previous graphene-based composite photocatalysts utilized reduced graphene oxide (RGO)1,2produced via an oxidation-reduction procedure that introduces large quantities of irreversible structural and chemical defects.3Furthermore, the effects of these graphene defects on catalysis remained unknown due to the complexities associated with producing pristine graphene nanocomposites. For example, macroscopic cracking was observed after filtering a titanium dioxide (TiO2) and graphene dispersion onto an anodized aluminum oxide membrane. The pristine graphene-TiO2nanocomposites produced according to one or more embodiments of the present invention exhibited dramatically improved photoactivities over similar RGO-TiO2films. This improved photocatalytic activity is useful for the improved degradation of liquid and gaseous organic contaminants and the production of solar chemical fuels. Another aspect of the disclosure relates to a method of making solvent-exfoliated graphene titania (SEG-TiO2) nanocomposite thin films, including: adding a first amount of natural graphite to a second amount of N,N-dimethylforamide (DMF) to form a graphite solution; sonicating the graphite solution at about 30-50 kHz for about 2.5-3.5 hours; centrifuging the sonicated graphite solution for about 3-6 hours at about 6000-9000 rpm to obtain a SEG supernatant; disposing the SEG supernatant in ethyl-cellulose (EC) and terpineol, and evaporating the DMF in the SEG solution to form a concentrated SEG ink; forming a titania solution; blade-coating a mechanical mixture of the concentrated SEG ink and the titania solution onto a substrate; and annealing the blade-coated substrate at about 350-450° C. for about 20-45 minutes to obtain the SEG-TiO2nanocomposite thin films. In one embodiment of the disclosure, novel SEG-TiO2nanocomposites and methods of producing these novel SEG-TiO2nanocomposites are invented, which are then compared to previously available RGO-TiO2nanocomposites in an effort to elucidate the role of graphene and its defects in the photocatalytic reduction of CO2. Consistent with prior reports, we find that RGO possesses significantly higher defect density than SEG. However, in contrast to conventional wisdom regarding the importance of defects in catalysis, the less defective SEG is shown to possess higher photocatalytic activity than RGO for the reduction of CO2to CH4, with up to an unexpected, surprising, seven-fold improvement compared to pure TiO2under visible illumination. Based on extensive characterization of the structural, electrical, and optical properties of SEG-TiO2and RGO-TiO2, it is concluded that the improved electrical mobility of SEG facilitates photo-reduction reactions by allowing photoexcited electrons to more effectively diffuse to reactive sites. Overall, among other things, this invention provides new chemical insight into nanocomposite-based photocatalysis that can inform ongoing efforts to harness solar energy for the conversion of greenhouse gases into useful chemical fuels. FIG.1shows schematically characterization of solvent-reduced graphene oxide (SRGO) and solvent-exfoliated graphene (SEG) according to one or more embodiments of the disclosure, where (A) shows photographs of graphene oxide, SRGO, and SEG (from left to right) dispersions in DMF at 0.01 mg/ml; (B) shows intensity-normalized Raman spectra of SEG and SRGO films annealed at 400° C. for 30 min in air; (C) shows sheet resistances of SEG and SRGO thin films formed via vacuum filtration as a function of mass density; and (D) shows optical absorbance coefficients for SEG and SRGO dispersions in DMF. In one or more embodiments of the present invention, SEG dispersions were produced by adding 2.5 g of natural graphite to 50 ml of N,N-dimethylforamide (DMF) to form a graphite solution, and performing a 3-hour ultrasonic treatment to the graphite solution of the natural graphite in the DMF, followed by centrifugation of the sonicated graphite solution at 7500 rpm for 4.5 hour to remove the fast sedimenting graphite. The resulting SEG supernatant consists primarily of few-layer graphene nanoplatelets with lateral dimensions ranging from about 50 nm to 750 nm. In comparison, graphene oxide (GO) was produced via a modified Hummers method,27using the same natural graphite as the source material. As shown inFIG.1(A), thermal reduction process was then performed in DMF to produce solvent-reduced graphene oxide (SRGO) with lateral dimensions ranging from about 500 nm to 3 μm. The resulting SEG and SRGO nanoplatelets were characterized using Raman spectroscopy. Typical Raman spectra for graphene films exhibit four primary peaks: the G band at about 1590 cm−1, 2D band at about 2700 cm−1, and the disorder-associated D and D′ bands at about 1350 cm−1and about 1620 cm−1respectively15. Of particular note is the intensity ratio of the D and G bands, I(D)/I(G), which is a measure of the relative concentration of spa hybridized defects compared to the sp2hybridized graphene domains. As shown inFIG.1(B), the average I(D)/I(G) value for the annealed SEG films is 0.17, which is significantly lower than 0.82 for the annealed SRGO films, thus indicating the higher defect density of SRGO compared to SEG. The electrical and optical properties of SEG and SRGO were characterized using four-point probe sheet resistance measurements and UV-Vis-NIR optical absorbance spectroscopy. Sheet resistance was assessed for both SEG and SRGO films formed via vacuum filtration. As shown inFIG.1(C), consistent with their higher defect density, sheet resistances for SRGO films were on average 2.4 times higher than SEG films at the same areal mass density. As shown inFIG.1(D), spectrally resolved optical absorbance measurements reveal that SRGO closely follows SEG in the near-infrared region but is slightly more transparent at ultraviolet and visible wavelengths. In addition, a small optical absorbance feature is observed for SRGO dispersions at about 350 nm. However, these subtle differences between the SEG and SRGO optical characteristics are unlikely to result in significant differences between their photocatalytic properties. Graphene nanocomposite synthesis typically employs covalent chemistry to attach inorganic nanoparticles onto the graphene surface.7,11,28However, since covalently bound nanocomposites require either the presence or introduction of defects, only those based on highly defective SRGO nanoplatelets have been produced.28While vacuum filtration offers one potential path towards the synthesis of non-covalently modified SEG composites,29the co-filtration of SEG and P25 yielded films with macroscopic fissures upon drying. Therefore, in one aspect, a novel scheme for producing SEG and SRGO nanocomposite films is devised, using ethyl-cellulose (EC) as a stabilizing and film-forming polymer.13Highly concentrated SEG and SRGO inks were generated by removing DMF in the presence of EC and terpineol. A titanium oxide P25 ink (hereinafter the “P25 ink”) was also prepared following a previously established protocol.30Mechanical mixtures of these inks were then blade coated onto 1 mm thick silica glass substrates and annealed at 400° C. for 30 min, which removes carbonaceous impurities to produce SEG-P25 and SRGO-P25 nanocomposite thin films. FIG.2shows schematically characterization of SEG-P25 and SRGO-P25 nanocomposites according to one or more embodiments of the present invention, where (A) shows a scanning electron micrograph of an annealed SEG-P25 nanocomposite showing its highly porous and homogenous microstructure; (B) shows a scanning electron micrograph of an annealed SRGO-P25 nanocomposite showing TiO2nanoparticles both above and below the embedded SRGO nanoplatelet; (C) shows photoluminescence (PL) spectra of the PL quenching of P25 by SEG; and (D) shows PL spectra of the PL quenching of P25 by SRGO. As shown inFIG.2(A), the SEMs reveal the homogenous structure of the nanocomposite thin films generated by this process. The SEG-P25 film has a porous network of SEG nanoplatelets decorated with P25 TiO2particles that are about 21 nm in average diameter. In comparison, for the SRGO-P25 films, the larger SRGO nanoplatelets are similarly embedded into the porous P25 network. As shown inFIG.2(B), with the SEM, P25 nanoparticles can be observed both above and below the wrinkled SRGO nanoplatelet due to its thinness and electron transparency. Photoluminescence (PL) spectroscopy was then employed to follow the fates of photoexcited charge carriers in these films. Supra-bandgap irradiation of TiO2results in emission of photons at specific wavelengths associated with either direct bandgap, indirect bandgap (phonon-assisted), or defect mediated recombination in the TiO2crystal.31As shown inFIGS.2(C) and2(D), in both the SEG-P25 and SRGO-P25 nanocomposites, increased PL quenching is observed with increased carbon content for the lower energy indirect bandgap and trap level-mediated transitions. In contrast, emission at wavelengths associated with the more rapid direct bandgap transitions, at 345 and 359 nm,31were largely preserved. FIG.3shows photocatalytic activity of SEG-P25 and SRGO-P25 nanocomposites according to one or more embodiments of the present invention, where (A) shows pseudo first-order CH3CHO photo-oxidation rate constants for SEG-P25 and SRGO-P25 nanocomposites under ultraviolet (385 nm) and visible illumination; and (B) shows CO2photo-reduction for SEG-P25 and SRGO-P25 nanocomposites under ultraviolet (385 nm) and visible illumination. The photocatalytic activity of the SEG and SRGO nanocomposites at various compositions were evaluated via acetaldehyde (CH3CHO) photo-oxidation and CO2photo-reduction reactions. Pseudo first-order decay rate constants were calculated from CH3CHO concentration curves following exposure to either ultraviolet (385 nm) or visible radiation. As shown inFIG.3(A), enhanced CH3CHO photo-oxidation was observed for SEG-P25 nanocomposites under both irradiation conditions. The largest improvement in the rate of oxidation, 96% greater than P25, was achieved by the 0.27 weight % SEG-P25 nanocomposite under visible illumination. Under ultraviolet irradiation, the 0.55 weight % SEG-P25 film demonstrated the fastest rate of oxidation, which is 57% greater than P25. In contrast, SRGO-P25 films did not exhibit enhanced photo-oxidation under either irradiation condition. As shown inFIG.3(B), in the photo-reduction reactions, CO2was reduced in the presence of water to produce methane (CH4) under the same ultraviolet (385 nm) and visible irradiation conditions. Since CO2reduction is likely driven by the photoexcited electrons injected into the SRGO or SEG nanoplatelets, this reaction is well-suited for studying the role of graphene and its defects in nanocomposite photocatalysis. The 0.27 weight % SEG-P25 nanocomposite exhibited the highest photo-reductive activity under ultraviolet illumination, producing 4.5 times more CH4than the P25 film. Under visible illumination, the highest photo-reductive activity was achieved by the 0.55 weight % SEG-P25 nanocomposite, with a 7.2 times enhancement compared to pure P25. Alternatively, no improvement in the photo-reduction activity was observed for SRGO-P25 films under ultraviolet illumination, while a maximum enhancement of 2.3 fold was achieved for the 0.41 weight % SRGO-P25 nanocomposite under visible illumination. Recent high resolution transmission electron microscopy images have established the atomic-scale structure of RGO resulting from its oxidation-reduction treatment. In this prior work, RGO nanoplatelets were found to be comprised of defect-free graphene regions of 3 to 6 nm in size interspersed by defective domains, consisting of disordered carbon networks, topological defects, ad-atoms, substitutions, and holes, covering about 40% of the surface.22In contrast, SEG nanoplatelets exhibit relatively few basal plane defects.18,32The defect characteristics for the SRGO and SEG nanoplatelets used in one or more embodiments of the present invention are consistent with these observations as illustrated by the Raman spectra, as shown inFIG.1(B), that show higher I(D)/I(G) ratios for SRGO compared to SEG. Although defect sites are often more reactive and thus believed to be the drivers of catalytic reactions,24this commonly invoked mechanism is apparently not dominant in graphene-TiO2photocatalysts as evidenced by the larger enhancement factor for the less defective SEG nanocomposites compared to those based on SRGO, as shown inFIG.3. These differences in defect type and density are also reflected in the electrical properties of SEG and SRGO nanoplatelets. Since basal plane defects increase charge carrier scattering, the electrical conductivity and mobility of individual RGO nanoplatelets have been found to lag behind pristine graphene by 3 and 2 orders of magnitude respectively.33Consistent with this previous study, the sheet resistance of our SRGO films exceeds that of our SEG films, as shown inFIG.1(C). Another frequently cited mechanism in photocatalysis is the extension of reactive electron and hole lifetimes via charge carrier separation.7,11In graphene-P25 photocatalysts, the first step in charge separation is achieved by injection of electrons into the carbon phase, resulting in reduced TiO2PL. As shown inFIGS.2(C) and2(D), a comparable amount of PL quenching was observed for SEG-P25 and SRGO-P25 films at similar compositions, suggesting that electron injection into the carbon phase is similar in these two cases and thus cannot fully explain the observed differences in photocatalytic activity, as shown inFIG.3. In addition to serving as a sink for photoexcited electrons, electronic interactions between graphene and TiO2have been shown to extend the optical absorption of TiO2to longer wavelengths, which implies enhanced photocatalytic activity under visible illumination.7,10,11Since SEG-P25 shows higher photocatalytic activity than SRGO-P25 under visible illumination (as shown inFIG.3), it appears that SEG has superior electronic coupling to TiO2. In addition, the enhanced electrical mobility of SEG compared to SRGO implies a longer electronic mean free path, which enables energetic electrons to diffuse farther from the graphene-P25 interface, thus decreasing the likelihood of their recombination with holes on the TiO2. In this manner, the lifetime of holes on TiO2may be prolonged for SEG-P25 nanocomposites, which is consistent with the observed enhancement in photo-oxidation of CH3CHO by SEG, as shown inFIG.3(A). FIG.4shows schematically a photocatalytic mechanism for graphene-TiO2nanocomposites according to one or more embodiments of the present invention. The color scheme for the atoms is: carbon (gray), hydrogen (white), oxygen (red), and titanium (blue). Upon illumination, the photoexcited electron is injected into the graphene nanoplatelet, leaving behind a TiO2confined hole (green). Due to its lower density of defects, electrons in SEG are able to diffuse farther (depicted as the yellow pathway), thus sampling a larger surface area for adsorbed CO2. Since reduction reactions are driven by energetic electrons, they presumably stand to benefit most significantly from the enhanced electrical mobility of SEG. In particular, as shown inFIG.4, the longer mean free path for electrons on SEG implies that energetic electrons will sample a larger area of the graphene surface, thereby increasing the likelihood of interaction with adsorbed reactants. Consistent with this newly discovered mechanism in one or more embodiments of the present invention, as shown inFIG.3, the photo-reduction of CO2was more significantly enhanced than the photo-oxidation of CH3CHO by SEG. While other factors may also contribute to this observed enhancement (e.g. differences in the adsorption/diffusion of reactants to/through the graphene-P25 films), the strong correlation between electrical mobility of the graphene and photocatalytic activity of the nanocomposite suggests that future efforts to improve carbon-TiO2photocatalysts may benefit from careful consideration of the electrical properties of the nanocarbon component. In sum, among other things, the present invention provides a novel approach to synthesize graphene-TiO2nanocomposite thin films without covalent modification, which allows the production and study of novel graphene-TiO2photocatalysts with low graphene defect densities. By varying the graphene processing method and nanocomposite loading, the optimized graphene-TiO2nanocomposites unexpectedly yield approximately two-fold and seven-fold improvements in the photo-oxidation of CH3CHO and photo-reduction of CO2, respectively, compared to pure TiO2under visible illumination. In contrast to many catalytic systems, the less defective SEG resulted in larger photocatalytic enhancement factors compared to SRGO, especially for the photo-reduction of CO2to CH4. Following thorough characterization with scanning electron microscopy, optical absorbance and photoluminescence spectroscopy, and charge transport measurements, a direct correlation was found between the electrical mobility of the graphene component and photocatalytic activity. Overall, the present invention provides novel mechanistic insights into nanocomposite-based photocatalysis and is likely to inform ongoing efforts to exploit graphene-based materials in the production of solar fuels. In another aspect of the disclosure, a method of making non-covalently bonded carbon-based titania nanocomposite thin films includes: forming a carbon-based ink; forming a titania (TiO2) solution; blade-coating a mechanical mixture of the carbon-based ink and the titania solution onto a substrate; and annealing the blade-coated substrate at a first temperature for a first period of time to obtain the carbon-based titania nanocomposite thin films. In certain embodiments, the carbon-based ink may include a concentrated solvent-exfoliated graphene (SEG) ink, or a concentrated single walled carbon nanotube (SWCNT) ink. This aspect relates to the method of making non-covalently bonded SEG-titania or SWCNT-titania nanocomposite thin films with low carbon defect densities. In contrast to existing RGO-based chemistries,56the resulting non-covalent coupling between the carbon and titania components preserves the well-defined nanomaterial surface chemistry, allowing for the direct study of interfacial effects on photocatalysis. In particular, SWCNT-TiNS and SEG-TiNS nanocomposites enable the comparison of photo-oxidation and photo-reduction activities for materials with 1D-2D and 2D-2D interfaces, respectively. Under ultraviolet excitation, 2D-2D SEG-TiNS demonstrate superior CO2photo-reduction activities compared to 1D-2D SWCNT-TiNS, highlighting the stronger optoelectronic coupling between 2D-2D nanomaterials. In contrast, both visible photo-oxidation and visible photo-reduction reactions are enhanced for SWCNT-TiNS, highlighting the effectiveness of 1D SWCNTs as visible TiO2photosensitizers. While directly relevant to ongoing efforts to improve the performance of nanocomposite photocatalysts, this study also provides fundamental insight into the effects of nanomaterial dimensionality on interfacial charge transport. FIG.5shows schematically scanning electron micrographs of annealed SWCNT-TiNS and SEG-TiNS nanocomposite thin films, and schematics of the 1D-2D SWCNT-TiNS and (D) 2D-2D SEG-TiNS interfaces according to one or more embodiments of the present invention, where (A) shows a scanning electron micrograph of an annealed 1 weight % SWCNT-TiNS nanocomposite, (B) shows a scanning electron micrograph of an annealed 1 weight % SEG-TiNS nanocomposite thin films, (C) shows the 1D-2D SWCNT-TiNS interfaces, and (D) shows the 2D-2D SEG-TiNS interfaces. The color scheme for the atoms is: carbon (gray), oxygen (red), and titanium (blue). The SWCNTs used here are 1D, with an average diameter of 1.4 nm and lengths ranging from 0.5 μm to 3 μm. In contrast, SEG is 2D, with an average thickness of approximately 2 nm, as measured by atomic force microscopy (AFM),34and lateral dimensions ranging from 50 nm to 750 nm. TiNS are also 2D, with an average thickness of approximately 8 nm and lateral dimensions ranging from 50 nm to 130 nm, with the fraction of (001) TiO2anatase surface as high as 89%.42The SEM of the SWCNT-TiNS and SEG-TiNS nanocomposites reveals their well-dispersed nanoporous structures. As shown inFIG.5(A), in the SWCNT-TiNS nanocomposite, the 1D SWCNTs are suspended across numerous TiNS. In contrast, as shown inFIG.5(B), the 2D SEG sheets are stacked against neighboring TiNS in the SEG-TiNS nanocomposite. Raman spectroscopy was used to quantify the SWCNT and SEG defect density following film formation and annealing. Raman spectra were collected at five different locations for each annealed SWCNT, SEG, and nanocomposite film using a 514 nm laser Typical Raman spectra for SWCNT and SEG contain three primary peaks: the G band at about 1590 cm−1, 2D band at about 2700 cm−1, and the disorder-associated D band at about 1350 cm−1.67Of particular interest is the intensity ratio of the D and G bands, I(D)/I(G), which is a measure of the relative concentration of sp3hybridized defects compared to the sp2hybridized graphitic domains. The average I(D)/I(G) for the annealed SEG film was 0.17, indicating a relatively low concentration of covalent defects compared to 0.82 for that of covalently modified RGO.53,57The average I(D)/I(G) for the annealed SWCNT film was even lower, at 0.02, due to the smaller fraction of edge defects in SWCNTs compared to SEG. FIG.6shows photoluminescence (PL) spectra of SWCNT-TiNS and SEG-TiNS thin films according to one or more embodiments of the present invention, where (A) shows the PL spectra of SWCNT-TiNS thin films, (B) shows PL spectra of SEG-TiNS thin films, and (C) shows peak intensities for the direct and indirect bandgap transitions in SWCNT-based and SEG-based TiNS nanocomposite thin films. Photoluminescence (PL) spectroscopy provides insight into optoelectronic properties and charge transfer efficiencies across 1D-2D and 2D-2D interfaces. In PL spectroscopy, supra-bandgap illumination of TiNS generates excitons, which can be dissociated for catalysis, non-radiatively recombine, or radiatively recombine. In the case of radiative recombination, emission can occur directly at the anatase TiO2bandgap at about 380 nm or indirectly through defect and surface-mediated recombination at longer wavelengths.59Due to the preferential segregation of energetic electrons onto carbon nanomaterials, SWCNT-TiNS and SEG-TiNS composites exhibit increased PL quenching with increasing carbon content for both direct and indirect transitions, as shown inFIGS.6(A) and6(B). However, SEG proved to be more efficient at quenching TiNS PL compared to SWCNTs. For both direct and indirect TiNS transitions, SEG achieves approximately the same level of PL intensity quenching as twice its equivalent mass in SWCNTs, as shown inFIG.6(C). FIG.7shows photocatalytic activity of SEG-TiNS and SWCNT-TiNS nanocomposites according to one or more embodiments of the present invention, where (A) shows pseudo first-order rate constants for acetaldehyde (CH3COH) photo-oxidation under ultraviolet (365 nm) and visible irradiation, and (B) shows carbon dioxide (CO2) photo-reduction to CH4under ultraviolet (365 nm) and visible irradiation. SEG-TiNS and SWCNT-TiNS nanocomposites were assessed for their photocatalytic activity in both photo-oxidation and photo-reduction reactions. Pseudo-first-order decay rate constants for acetaldehyde (CH3COH) photo-oxidation were calculated from CH3COH decay curves under either ultraviolet (365 nm) or visible (>380 nm) irradiation for nanocomposites at various compositions. For SEG-TiNS, improvement was observed for CH3COH degradation under either irradiation condition compared to pure TiNS, as shown inFIG.7(A). For SWCNT-TiNS, while no improvement was observed under ultraviolet irradiation, a maximum improvement of 31% in the CH3COH decay rate constant was observed for the 0.5 SWCNT-TiNS film under visible irradiation, as shown inFIG.7(A). In carbon dioxide (CO2) photo-reduction, methane (CH4) is produced from a water saturated CO2atmosphere under either ultraviolet (365 nm) or visible (>380 nm) irradiation. The amount of CH4is measured using gas chromatographic separation and flame ionization detection (GC/FID) both prior to and after 3 hours of illumination to determine the photo-reduction activity for each film. In contrast to CH3COH photo-oxidation, marked improvements in CO2photo-reduction were observed for both SWCNT-TiNS and SEG-TiNS films. As shown inFIG.7(B), under ultraviolet illumination, maximum improvement factors of 2 and 3.5 were achieved for the 0.25% SWCNT-TiNS and 0.5% SEG-TiNS films, respectively, in comparison to pure TiNS. Under visible illumination, maximum improvement factors of 5.1 and 3.7 were achieved for the 0.25% SWCNT-TiNS and SEG-TiNS films, respectively, in comparison to pure TiNS, as shown inFIG.7(B). In contrast to recent work which showed covalently bound SWCNT-TiO2and RGO-TiO2nanocomposites to be similarly photoactive,59 major differences were observed between the catalytic performance of SWCNT-TiNS and SEG-TiNS thin films. These photocatalytic differences can be attributed to the unique structure and optoelectronic properties of these 1D and 2D nanomaterials. In composite form, 2D SEG shows more intimate electronic and physical coupling with 2D TiNS in comparison to 1D SWCNT, as shown inFIGS.5-6. With this conformal 2D-2D interface, SEG can more effectively dissociate and inhibit the recombination of TiNS photogenerated excitons compared to SWCNTs, resulting in superior TiNS PL quenching. Since reduction reactions utilize the energetic electrons segregated to the nanocarbon surface,53,54,66CO2photo-reduction on SEG-TiNS is more significantly enhanced than SWCNT-TiNS. In particular, the most photoactive SEG-TiNS film produced 73.5% more CH4than the most photoactive SWCNT-TiNS film under ultraviolet irradiation, as shown inFIG.7B. Other factors that may contribute to the observed enhancements include an increase in the overall effective surface area and the porosity difference between SWCNT-TiNS and SEG-TiNS thin films. However, since the continued increase in surface area provided by SWCNT and SEG past 0.5 weight % resulted in decreasing photoactivities (as shown inFIG.7), the former is unlikely to be a dominant factor. Moreover, any porosity difference between SWCNT-TiNS and SEG-TiNS thin films is unlikely to explain the large discrepancy between their photocatalytic performance since the pore structure of the most photoactive, low carbon compositions remain dominated by the TiNS network, as shown inFIGS.5(A) and5(B). Unlike CO2photo-reduction, CH3COH photo-oxidation utilizes the holes on the TiNS surface. In nanocomposite films, photo-oxidation reactions also benefit from extended reactive hole lifetimes and diminished electron/hole recombination that result from electron segregation onto the carbon nanomaterials. However, as shown inFIG.7, no enhancement in CH3COH oxidation was observed for either SWCNT-TiNS or SEG-TiNS films under ultraviolet illumination. In particular, SEG-TiNS films were less active than SWCNT-TiNS films despite the improved propensity of SEG to separate electrons from the holes on TiNS. Consequently, the decreased activity of the SEG-TiNS films is likely due to the greater loss of accessible TiNS oxidative surface area in the more intimately coupled 2D-2D SEG-TiNS composites compared to the 1D-2D SWCNT-TiNS composites. The net result is that, for both sets of films, any gains from nanocomposite charge carrier separation were offset by the loss of accessible TiNS surface area, yielding a net loss in ultraviolet photo-oxidation activity. Since anatase TiO2has a bandgap of about 3.25 eV,69stand-alone TiNS displayed very low photoactivity under the visible irradiation conditions of these experiments. This minor visible response can be attributed to the presence of vacancy and surface defects as well as fluorine-doping from the TiNS synthesis.69,70These defects result in the formation of intra-bandgap transition states, which are reflected in the TiNS PL spectra, as shown inFIG.6. In composites, TiO2visible photoactivity can be enhanced by either nanocarbon surface doping or photosensitization.54The evaluation of these effects in composite photocatalysis requires a more detailed understanding of the electronic structures of 1D and 2D carbon nanomaterials. In particular, 2D graphene is a zero bandgap semiconductor, while 1D SWCNTs can be either semiconducting or metallic depending on their chiral vector. As-synthesized SWCNT populations, such as those used in this work, are typically one-third metallic and two-thirds semiconducting at room temperature.71Therefore, for composite photocatalysis, SWCNTs can provide enhanced TiO2photosensitization due to their increased optical absorption in the visible and infrared regions, resulting from 1D van Hove singularities, and longer semiconductor exciton lifetimes, compared to graphene and metallic SWCNTs.71,72 Accordingly, SWCNT-TiNS films demonstrated higher visible photocatalytic activities in both reduction and oxidation reactions (as shown inFIG.7). These results suggest that, for non-covalently bound nanocarbon-TiNS films, photosensitization, where reactive charge carriers are generated in the carbon nanomaterial and then transferred to TiNS, is the primary enhancement mechanism for visible photocatalysis. Otherwise, TiNS nanocomposites based on the more intimately coupled SEG would have yielded higher photoactivities through stronger surface doping. The superior performance of these non-covalently bound SWCNT-TiNS composites under visible illumination contrasts with recent work on covalently bound nanocarbon-TiO2composites in which no discernible difference was observed between SWCNT-TiO2and graphene-TiO2photoactivities.59This disparity suggests that covalent modification in composite photocatalysts results in both enhanced carbon TiO2surface doping and suppressed carbon TiO2photosensitization by disrupting the pristine SWCNT electronic structure.57,73 In sum, among other things, the present invention provides a novel approach to synthesize non-covalently bonded SWCNT-TiNS and SEG-TiNS nanocomposites with low carbon defect densities, leading to improved insight into nanocomposite photocatalytic enhancement mechanisms. Due to the 1D and 2D nature of these materials, SEG was shown to provide a more intimate optoelectronic coupling with TiNS in comparison to SWCNT, resulting in considerably higher PL quenching and ultraviolet photo-reduction activities for SEG-TiNS films. Alternatively, SWCNT-TiNS films yielded higher visible photo-oxidation and visible photo-reduction activities due to the ability of SWCNTs to sensitize TiNS to longer wavelength light. Overall, this work is likely to inform ongoing efforts to realize well-defined nanocomposite interfaces and exploit the unique optoelectronic properties of low-dimensional carbon nanomaterials in photochemical devices. These and other aspects of the present invention are further described below. IMPLEMENTATIONS AND EXAMPLES OF THE INVENTION Without intent to limit the scope of the invention, exemplary instruments, apparatus, methods and their related results according to the embodiments of the present invention are given below. Note that titles or subtitles may be used in the examples for convenience of a reader, which in no way should limit the scope of the invention. Moreover, certain theories are proposed and disclosed herein; however, in no way they, whether they are right or wrong, should limit the scope of the invention so long as the invention is practiced according to the invention without regard for any particular theory or scheme of action. Example One 1. Graphene Synthesis and Characterization 1.1 Solvent Exfoliated Graphene (SEG) Synthesis In this example, 2.5 g of natural graphite (Asbury Carbon, 3061) was added to 50 ml of N,N-dimethylformamide (DMF, Mallinckrodt Analytical) and sonicated in a Bransonic 3510 tabletop ultrasonic cleaner for 3 hours at 40 kHz and 100 W. These solutions were then combined into 250 ml centrifuge tubes and sedimented in a large volume centrifuge (Beckman Coulter Avanti J-26 XP Centrifuge) for 4.5 hours at 7500 rpm, or an average relative centrifugal force of 6804 g. The graphene concentration of this SEG solution, 0.013 mg/ml, was determined by measuring the difference in filter (Whatman Anodisc, 0.02 μm pore size) masses after filtering both 20 and 50 ml of the solution. 1.2 Graphene Oxide (GO) Synthesis As a comparative example, GO was produced using a modified version of Hummers method. 5 g of natural graphite (Asbury Carbon, 3061) were added to 115 ml of concentrated sulfuric acid (H2SO4) and cooled to 0° C. 15 g of potassium permanganate (KMnO4, Aldrich) were then gradually added to the solution in an ice bath. The temperature of the mixture was then raised to 35° C. and stirred for 2 hours. 230 ml of deionized water (DI-H2O) were slowly added to the solution while stirring. After 15 minutes, an additional 700 ml of DI-H2O were added to terminate the oxidation reaction. Finally, 12.5 ml of 30% hydrogen peroxide (H2O2) were added, producing a bright yellow solution of oxidized graphene and graphite. A combination of filtration and centrifugation was subsequently employed to remove the graphite, metallic ions, and excess acid. The solution was passed through a filter (Whatman Anodisc, 0.2 μm pore size) and rinsed with 1.5 L of 10% hydrochloric acid (HCl)-DI H2O. The filtrate was then resuspended in 500 ml of DI-H2O and centrifuged for 1 hour at 7500 rpm to remove the unoxidized graphite. The GO containing supernatant was then collected via sedimentation at 7500 rpm for 16 hours after which the pellet was redispersed in DI-H2O after 30 min of sonication. The sedimentation and sonication procedure was repeated three more times to yield a GO solution with about 6 pH. A final GO sedimentation step was then performed, and the GO nanoplatelets were redispersed in DMF. 1.3 Solvothermal Reduction of GO Thermal reduction of GO was performed in DMF. A solution of 0.015 mg/ml GO-DMF was refluxed for 5 hours while stirring, yielding highly reduced GO precipitates in DMF. A homogenous solvent reduced graphene oxide (SRGO) solution was then produced following 90 minutes of sonication. The graphene concentration of this SRGO solution was determined by measuring the difference in filter masses after filtering both 17 ml and 50 ml of this solution. 1.4 Optical Characterization of SEG and SRGO Nanoplatelets FIG.8shows the optical absorbance of SEG (left) and SRGO (right) nanoplatelets in DFM at five different concentrations according to one or more embodiments of the present invention. Optical absorbance spectra of both SEG-DMF and SRGO-DMF solutions were collected using a Varian Cary 5000 spectrophotometer. Five different SEG and SRGO solutions ranging from 2.5 to 15 μg/ml were used to determine the absorbance coefficient of SEG and SRGO nanoplatelets in DMF. As shown inFIG.8, the SEG and SRGO absorbance within each set of solutions was found to be highly linear within this range of concentration with standard deviations of their absorbance coefficients at less than 1%. The average absorbance coefficients between 300 and 1300 nm are shown inFIG.1(D). 1.5 Electronic Characterization of SEG and SRGO Nanoplatelets Thin films of SEG and SRGO were formed via vacuum filtration of different stock solution volumes through 25 mm diameter alumina filters (Whatman Anodisc, 0.02 μm pore size). Their sheet resistances were measured using four-point probe measurements with the probes arranged in a linear configuration and 1 mm spacing, as shown inFIG.1(C). A GO film with an areal density of 32 μg/mL was also measured, yielding a sheet resistance of 4.38 GΩ/sq. The SRGO film at the same density showed over five orders of magnitude decrease in sheet resistance at 18.1 kΩ/sq. 1.6 Atomic Force Microscopy (AFM) Characterization of SEG and SRGO Nanoplatelets Graphene nanoplatelets from both the SEG ink and SRGO solution were deposited onto 100 nm thick oxide silicon wafers for AFM imaging. The wafers were first submerged in 2.5 mM 3-aminopropyl triethoxysilane (ATPES) aqueous solution to functionalize the surface with a hydrophobic self-assembled monolayer for 30 minutes. The substrates were then rinsed with DI-H2O and dried under a stream of nitrogen. The graphene solutions were then diluted to approximately 0.02 mg/ml in ethanol after which drops of each were placed onto the wafers for 10 minutes. The drops were then blown off under a stream of N2, and the wafers were rinsed with DI-H2O. The SEG wafers were subsequently annealed for 30 minutes at 400° C. in air to remove solution residues. FIG.9shows AFM images and line scans of SEG and SRGO nanoplatelets according to one or more embodiments of the present invention, where (A) shows an AFM image and two line scans of SEG nanoplatelets deposited from a diluted SEG ink after annealing at 400° C. for 30 min in air; and (B) shows an AFM image and two line scans of SRGO nanoplatelets deposited from a diluted DMF. All AFM images as shown inFIG.9were obtained with a Thermo Microscopes Autoprobe CP-Research AFM in tapping mode using cantilever B on MikroMasch NSC36/Cr-AuBS probes. As shown inFIG.9, these 2 μm×2 μm images were collected using identical scanning parameters, and two line scan nanoplatelet profiles are plotted from each image. As expected, SEG dispersions were composed of predominately few-layer graphene nanoplatelets with lateral dimensions ranging from about 50 nm to 750 nm. SRGO dispersions were comprised of thin graphene nanoplatelets with greater lateral extent, ranging from about 500 nm to several microns. 1.7 Raman Spectra of SEG and SRGO Nanoplatelets FIG.10shows Raman spectra obtained for filtered GO and SRGO nanoplatelets before and after thermal reduction in DMF according to one or more embodiments of the present invention. The Raman spectra as shown inFIG.10were obtained for GO and SRGO nanoplatelets on alumina filters as well as SEG and SRGO nanoplatelets deposited from ethyl-cellulose (EC) stabilized inks after annealing at 400° C. for 30 minutes in air using a Renishaw inVia Raman microscope with an excitation wavelength of 514 nm. Five spectra were obtained on different areas of each film and combined to form a representative Raman spectrum for the entire film. Consistent with previous GO reduction studies, the intensity ratio of the D and G bands, I(D)/I(G), for the GO before and after thermal reduction remained relatively unchanged, as shown inFIG.10.15,33 2. SEG-P25 and SRGO-P25 Characterization 2.1 Vacuum Co-Filtration of SEG and P25 TiO2 FIG.11shows a photograph of a vacuum filtered 1% SEG-P25 composite exhibiting macroscopic fissure after drying on a 25 mm diameter alumina membrane according to one or more embodiments of the present invention. Vacuum filtration was explored as a possible synthetic method for producing SEG-P25 and SRGO-P25 composites. Individual dispersions of SEG and P25 TiO2were combined and filtered on an alumina membrane (Whatman Anodisc, 0.02 μm pore size) to form a 1% SEG-P25 composite film. However, upon drying, the nanocomposite exhibited macroscopic cracks, rendering these films unsuitable for photocatalytic measurements that require controlled light exposure, as shown inFIG.11. 2.2 SEG-P25 and SRGO-P25 Nanocomposite Films FIG.12shows schematically the method of forming graphene-based nanocomposite thin films and the thin films formed according to one or more embodiments of the present invention, where (A) shows the method of forming graphene-based nanocomposite thin films according to one embodiment; (B) shows a series of SEG-P25 nanocomposite thin films ranging from 0.27 weight % to 26 weight % SEG deposited on 2.54 cm×2.54 cm glass slides; and (C) shows an analogous series of SRGO-P25 thin films ranging from 0.41 weight % to 1.65 weight % SEG. To circumvent the limitations of vacuum filtration, a general approach was developed to deposit graphene nanocomposites using a film-forming polymer. Due to its graphene stabilizing and film forming capabilities,13graphene dispersions were concentrated into 2 g of 10% w/v EC-terpineol solution to form SEG and SRGO inks after evaporating DMF at reduced pressures. A separate Degussa P25 TiO2ink was produced following a previously established protocol for producing highly porous TiO2electrodes for dye-sensitized solar cells.30After blade coating and annealing, as shown inFIG.12, mechanical mixtures of these inks produced homogenous nanocomposite thin films. The compositions of these nanocomposite films were tuned by varying the fraction of graphene and P25 inks in the mechanical mixture. Film thicknesses and optical extinction were measured prior to the photocatalytic assessment of the SEG-P25 and SRGO-P25 nanocomposite films. Profilometry was performed using a Veeco Dektak 150 Surface Profilometer with a 2.5 μm tip radius. Optical extinction was measured using a Varian Cary 5000 spectrophotometer, with the background from the glass slide subtracted from the measurements. The thickness and extinction values at both 385 nm and 550 nm for each film are summarized in Table 1. The thickness and optical extinction at both ultraviolet (λ=385 nm) and visible (λ=550 nm) wavelengths for each photocatalytic thin film tested. TABLE 1thickness and extinction values at both385 nm and 550 nm for each film.ThicknessExtinction atExtinction atFilm(μm)385 nm (Abs)550 nm (Abs)P257.63.131.040.27% SEG8.53.080.810.55% SEG7.23.631.041.09% SEG7.73.811.172.15% SEG6.453.771.48SEG0.31.81.260.41% SRGO12.13.681.770.83% SRGO11.64.452.471.65% SRGO9.55.833.61SRGO0.41.471.03 2.3 Raman Characterization of SEG-P25 and SRGO-P25 Nanocomposites FIG.13shows combined Raman spectra of annealed SEG, SEG-P25, SRGO and SRGO-P25 films according to one or more embodiments of the present invention, where (A) shows Raman spectra of annealed SEG and 1.09 weight % SEG-P25 films, and (B) shows Raman spectra of annealed SRGO and 1.65 weight % SRGO-P25 films. As shown inFIG.13, Raman spectroscopy was also performed on annealed SEG, SRGO, SEG-P25, and SRGO-P25 films. These Raman spectra for the annealed SEG and SEG-P25 clearly exhibit three primary peaks: the disorder-associated D bands at about 1350 cm−1, the G band at about 1590 cm−1, and the 2D band at about 2700 cm−1, respectively. It is shown that for the annealed SEG film, a ratio of the peak intensity at the D-band to the peak intensity at the G-band of the Raman spectrum is about 0.17. Further, the SEG-TiO2nanocomposite thin film, the ratio of the peak intensity at the D-band to the peak intensity at the G-band of the Raman spectrum is less than 1. The low intensity ratio between the D and G bands for these annealed films indicate that few defects were introduced through nanocomposite formation. These spectra also showed minimal variation across the different film locations and were combined to form a representative Raman spectrum for the entire film. The P25 TiO2contributes to the broad peak observed between 1200 cm−1and 2000 cm−1in the composite films. 2.4 Photoluminescence (PL)Spectra of SEG-P25 and SRGO-P25 Nanocomposites PL spectra of nanocomposite films were collected using a commercial photon counting ISS PC-1 Fluorimeter. All measurements were made using a 295 nm excitation wavelength with the film oriented 22.5° orthogonal to the incident light path towards the photon counting detector in a nitrogen atmosphere. 2 mm excitation slits, 1 mm emission slits, and cross-polarizers were used to obtain optimal signal intensity and minimal Raleigh scattering. 3. SEG-P25 and SRGO-P25 Photocatalytic Measurements 3.1 Photocatalytic Testing of SEG-P25 and SRGO-P25 Films FIG.14shows emission spectra of light sources used in photocatalytic testing according to one or more embodiments of the present invention, where (A) shows an emission spectrum of the mercury vapor lamp used in photocatalytic testing; and (B) shows an emission spectrum of the natural daylight bulb used in photocatalytic testing. Photocatalytic reactions were carried out using either UV light from a mercury vapor lamp (100 W), with a wavelength of 365 nm and an energy density of about 110 W/m2, or a natural daylight bulb (60 W, Halco Lighting, Pure Lite, Neodymium), with wavelengths ranging from about 400 to 850 nm and energy density of about 31 W/m2. The emission spectra of both light sources are shown inFIG.11. FIG.15shows CH3CHO photo-oxidation on SEG-P25 and SRGO-P25 thin films under UV and visible exposures according to one or more embodiments of the present invention, where (A) shows CH3CHO photo-oxidation on SEG-P25 thin films at different compositions under UV exposure (left) and visible exposure (right); and (B) shows CH3CHO photo-oxidation on SRGO-P25 thin films at different compositions under UV exposure (left) and visible exposure (right). Photo-oxidation reactions were performed in a 25 ml Teflon chamber with a quartz window 1 h after injecting 0.5 ml of acetaldehyde (CH3CHO) vapor in the dark at room temperature. As shown inFIG.15, a Hewlett Packard 5890 gas chromatograph equipped with a flame ionizing detector was used to monitor the CH3CHO concentrations. FIG.16shows the standard curve for the gas chromatograph used to determine CH4concentration within the reactor according to one embodiment of the present invention. In the photo-reduction of carbon dioxide (CO2) to methane (CH4), a 25 ml Teflon chamber was first purged with H2O-saturated CO2(99.99%) at ambient temperatures for 1 hour. The gas chromatograph was then used to monitor the CH4concentration. As shown inFIG.16, five 50 μL chromatography measurements were obtained to determine the initial CH4concentration within the reactor using a standard curve. After the reactor was exposed to either UV or visible radiation for 3 h, five more 50 μL chromatography measurements were then obtained to determine the final CH4concentration. The photo-reduction activity reported is the difference between the average final CH4concentrations and average initial CH4concentrations. 3.2 Source of Carbon in the CH4Produced Additional control experiments were performed to ensure that CO2was indeed the source of carbon for the CH4produced. A 0.55 weight % SEG-P25 film was simultaneously purged with H2O-saturated nitrogen (N2) while irradiated with UV light within the reactor. The reactor was then closed off, and the concentration of CH4was measured after exposure to UV radiation for an additional 3 hour. A minimal amount of CH4(0.177 μmol/m2hr) was detected. A 1-hour H2O-saturated CO2purge was then performed, and the concentration of CH4evolved from the film was measured. Following the N2purge, about 78% of the photoactivity (5.31 out of 6.82 μmol/m2hr) was restored, indicating that the vast majority of CH4was produced from gaseous CO2as opposed to other adventitious sources of carbon. Many applications can be found for the present invention. For examples, chemically pristine graphene-nanoparticle composites deposited from stable highly concentrated inks have a broad range of applications. In particular, the more homogenous atomic structure and superior electronic properties of pristine graphene can enhance the performance of composite biological and chemical sensors and electroactive tissue scaffolds. In energy applications, the superior catalytic reactivity of composites based on pristine graphene can enhance the photocatalytic degradation of gas and liquid phase organic contaminants as well as the production of solar chemical fuels. Additionally, platinum-graphene nanocomposites have potential to serve as an effective counter-electrode in dye sensitized solar cells. In energy storage applications, the outstanding chemical resistance and electronic conductivity of graphene nanocomposites will likely enable its use in next-generation lithium ion batteries. Example Two 1. Low Dimensional Nanomaterial Synthesis and Processing Single walled carbon nanotubes (SWCNT, Carbon Solutions Inc, P2) were dispersed at 0.5 mg/ml in 1 weight % ethyl cellulose (EC)-ethanol solutions using a Fisher Scientific sonic dismembrator 500 for 1 hour at 35% power. Solvent exfoliated graphene (SEG) was produced from natural graphite flakes (Asbury Carbon, 3061) in 0.25 weight % EC-ethanol solutions using a Bransonic 3510 tabletop ultrasonic cleaner for 3 hours at 40 kHz and 100 W. This sonicated dispersion was then collected into 250 mL centrifuge tubes and sedimented in a large volume centrifuge (Beckman Coulter Avanti J-26 XP Centrifuge) for 4.5 hours at 7500 rpm with an average relative centrifugal force of 6804 g. The resulting supernatant consisted primarily of single and few layer graphene sheets at about 0.1 mg/ml, as measured using a Varian Cary 5000 spectrophotometer and an absorbance coefficient of 3397 L/g·m at 550 nm.74 FIG.17shows an atomic force micrograph and line scan of SWCNTs deposited from a diluted SWCNT ink after annealing at 400° C. for 30 minutes in air according to one embodiment of the present invention.FIG.18shows scanning electron micrographs of annealed SWCNT and SEG thin films and dark field transmission electron micrograph of TiNS according to one or more embodiments of the present invention, where (A) shows the annealed SWCNT thin films, (B) shows the annealed SEG thin films, and (C) shows the dark field transmission electron micrograph of TiNS showing their 2D geometry. Concentrated SWCNT and SEG inks were produced following solvent exchange in terpineol,75yielding final ink concentrations of 1.18 mg/ml and 0.31 mg/ml, respectively. SWCNT was deposited from the concentrated SWCNT ink onto a 3-aminopropyl triethoxysilane (ATPES) functionalized 100 nm thick oxide silicon wafer for atomic force microscopy (AFM) imaging. As shown inFIG.17, the AFM and corresponding line scan point to a well-dispersed SWCNT ink, with both individually dispersed SWCNTs and small SWCNT bundles. Previously published work contains detailed AFM analysis for concentrated SEG inks.75Both SWCNT and SEG inks were then blade coated onto 2.54 cm×2.54 cm glass slides. Following annealing at 400° C. for 30 min in air, scanning electron microscopy (SEM) of the resulting SWCNT and SEG thin films reveal their 1D and 2D structures, as shown inFIGS.18(A) and18(B). Titania nanosheets (TiNS) were produced from 20 ml of titanium butoxide (97%, Aldrich Chemicals) and 2.8 ml of hydrofluoric acid (47%, Mallinckrodt Chemicals).76Following 30 minutes of mixing, the solution was placed in an oven for 24 hours at 200° C. under hydrothermal conditions. The TiNS precipitate was rinsed repeatedly with ethanol, deionized water, and 100 ml of 0.1 M sodium hydroxide solution until pH 7 was achieved. As shown inFIG.18(C), transmission electron microscopy (TEM) of these TiNS confirms their 2D structure. A 22.8 weight % TiNS ink was then produced from the precipitate following an established procedure.77 The fraction of TiNS (001) surface was calculated based on their SEM-measured lateral dimensions, which range from 50 nm to 130 nm, and thickness of 8 nm, as shown inFIG.18(C). For the largest TiNS, the fraction of (001) surface area can be as high as 89%, matching previous reports:76 2·(130nm)22·(130nm)2+4·(130nm·8nm)2=0.89 2. Nanocarbon-Titania Nanosheet Composite Thin Films FIG.19shows photographs of annealed TiNS nanocomposite thin films on 2.54 cm×2.54 cm silica glass slides according to one or more embodiments of the present invention, where (A) shows the annealed TiNS nanocomposite thin films ranging from 0, 0.25, 0.5, 1, and 100 weight % SEG (left to right) and (B) shows the annealed TiNS nanocomposite thin films ranging from 0, 0.25, 0.5, 1, and 100 weight % SWCNT (left to right). To form mechanically robust nanocomposite thin films, as shown inFIG.19, physical mixtures of SWCNT, SEG, and TiNS inks were blade coated onto silica glass slides and annealed at 400° C. for 30 minutes in air. Each nanocomposite film was approximately 2 cm2. Their consistent areas and transparent glass substrates facilitate photocatalytic and optical extinction measurements. FIG.20shows UV-vis-NIR absorbance spectra for annealed SWCNT-TiNS and (B) SEG-TiNS nanocomposite thin films at various compositions according to one or more embodiments of the present invention, where (A) shows the UV-vis-NIR absorbance spectra of the annealed SWCNT-TiNS nanocomposite thin films, and (B) shows the UV-vis-NIR absorbance spectra of the annealed SEG-TiNS nanocomposite thin films. As shown inFIG.20, optical extinctions of nanocomposite thin films at each composition were then measured using the Varian Cary 5000 spectrophotometer. Due to their 1D geometry, SWCNTs possess optoelectronic van Hove singularities that provide increased optical absorption in the visible and infrared spectrum. Correspondingly, SWCNT and SWCNT-TiNS nanocomposite thin films absorbed more visible and infrared light compared to their analogous SEG and SEG-TiNS nanocomposite thin films. The spectral signature of the SWCNT film also confirms the heterogeneous electronic structure of the as-produced SWCNTs used in this study. In particular, the SWCNT S22peaks at about 1000 nm, assigned to the semiconducting species, are approximately twice the area of the SWCNT M11peaks at about 700 nm, assigned to the metallic species.78 FIG.21shows vertically offset average Raman spectra of annealed SWCNT, 1 weight % SWCNT-TiNS nanocomposite, SEG, and 1 weight % SEG-TiNS nanocomposite thin films according to one or more embodiments of the present invention. Raman spectra as shown inFIG.21were obtained for SWCNT, SWCNT-TiNS, SEG, and SEG-TiNS thin films deposited on silica glass slides from EC-stabilized inks after annealing at 400° C. for 30 minutes in air using a Renishaw inVia Raman microscope with an excitation wavelength of 514 nm. As shown inFIG.21, five spectra were obtained on different areas of each film and combined to form a representative Raman spectrum for the entire film. The low intensity ratios between the D and G bands, I(D)/I(G), for these annealed films indicate that few defects were introduced through nanocomposite formation. In particular, the SWCNT, SWCNT-TiNS, SEG, and SEG-TiNS films had averaged I(D)/I(G) of 0.02, 0.05, 0.17, and 0.43, respectively. FIG.22shows vertically offset glancing angle X-ray diffraction (XRD) of annealed TiNS, 0.5 weight % SWCNT-TiNS nanocomposite, and 0.5 weight % SEG-TiNS nanocomposite thin films according to one or more embodiments of the present invention. As shown inFIG.22, glancing angle X-ray diffraction (XRD) was performed on TiNS, SWCNT-TiNS nanocomposite, and SEG-TiNS nanocomposite thin films. The resulting spectra were indexed to anatase titania (TiO2),76showing that phase transformation did not occur for any of the films during the 400° C. annealing process. Photoluminescence (PL) spectra of nanocomposite thin films were collected using a commercial photon counting ISS PC-1 Fluorimeter. All measurements were made using a 285 nm excitation wavelength with the film oriented 22.5° orthogonal to the incident light path towards the photon counting detector in a nitrogen atmosphere. 2 mm excitation slits, 1 mm emission slits, and cross-polarizers were used to obtain optimal signal intensity and minimize Raleigh scattering. 3. Nanocomposite Photocatalytic Testing FIG.23shows emission spectra of light sources used in photocatalytic testing according to one or more embodiments of the present invention, where (A) shows an emission spectrum of the ultraviolet mercury vapor lamp and (B) shows an emission spectrum of the visible natural daylight bulb used in photocatalytic testing. As shown inFIG.23, photocatalytic reactions were performed using either UV light from a mercury vapor lamp (100 W), with a wavelength of 365 nm and an energy density of about 110 W/m2, or a natural daylight bulb (60 W, Halco Lighting, Pure Lite, Neodymium), with wavelengths ranging from about 380 to 850 nm and energy density of about 31 W/m2. FIG.24shows CH3CHO photo-oxidation on SWCNT-TiNS and SEG-TiNS thin films under UV and visible exposures according to one or more embodiments of the present invention, where (A) shows CH3CHO photo-oxidation on SWCNT-TiNS thin films at different compositions under UV exposure (left) and visible exposure (right); and (B) shows CH3CHO photo-oxidation on SEG-TiNS thin films at different compositions under UV exposure (left) and visible exposure (right). Photo-oxidation reactions were performed in a 25 ml Teflon chamber with a quartz window 1 hour after injecting 0.5 mL of acetaldehyde (CH3CHO) vapor in the dark at room temperature. As shown inFIG.24, a Hewlett Packard 5890 gas chromatograph with a flame ionizing detector was used to monitor the CH3CHO concentrations. Photo-reduction of carbon dioxide (CO2) to methane (CH4) was also performed in a 25 ml Teflon chamber. The chamber was purged initially with H2O-saturated CO2(99.99%) at room temperature for 1 hour. The gas chromatograph was then used to monitor the CH4concentrations. Five 50 μL chromatography measurements were obtained to determine both the initial CH4concentration and CH4concentration after 3 hours of either ultraviolet or visible exposure. The photo-reduction activity reported is the difference between the average final CH4concentrations and average initial CH4concentrations. In sum, one aspect of the disclosure relates to a method of making non-covalently bonded carbon-titania nanocomposite thin films, which includes: forming a carbon-based ink; forming a TiO2solution; blade-coating a mechanical mixture of the carbon-based ink and the titania solution onto a substrate; and annealing the blade-coated substrate at a first temperature for a first period of time to obtain the carbon-based titania nanocomposite thin films. In certain embodiments, the carbon-based ink may include a concentrated SEG ink, or a concentrated SWCNT ink. The foregoing description of the exemplary embodiments of the invention has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to explain the principles of the invention and their practical application so as to enable others skilled in the art to utilize the invention and various embodiments and with various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to those skilled in the art to which the present invention pertains without departing from its spirit and scope. Accordingly, the scope of the present invention is defined by the appended claims rather than the foregoing description and the exemplary embodiments described therein. LIST OF REFERENCES (1) Fujishima, A.; Honda, K.Nature1972, 238, 37-38.(2) Linsebigler, A. L.; Lu, G.; Yates, J. T.Chem. Rev.1995, 95, 735-758.(3) Roy, S. C.; Varghese, O. K.; Paulose, M.; Grimes, C. A.ACS Nano2010, 4, 1259-1278.(4) Inoue, T.; Fujishima, A.; Konishi, S.; Honda, K.Nature1979, 277, 637-638.(5) Hurum, D. C.; Agrios, A. G.; Gray, K. A.; Rajh, T.; Thurnauer, M. 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11942282 | DETAILED DESCRIPTION Various technologies pertaining to a thermally sensitive ionic redox transistor are now described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more aspects. It may be evident, however, that such aspect(s) may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to facilitate describing one or more aspects. Further, it is to be understood that functionality that is described as being carried out by certain system components may be performed by multiple components. Similarly, for instance, a component may be configured to perform functionality that is described as being carried out by multiple components. Moreover, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless specified otherwise, or clear from the context, the phrase “X employs A or B” is intended to mean any of the natural inclusive permutations. That is, the phrase “X employs A or B” is satisfied by any of the following instances: X employs A; X employs B; or X employs both A and B. In addition, the articles “a” and “an” as used in this application and the appended claims should generally be construed to mean “one or more” unless specified otherwise or clear from the context to be directed to a singular form. Further, as used herein, the terms “component” and “system” are intended to encompass computer-readable data storage that is configured with computer-executable instructions that cause certain functionality to be performed when executed by a processor. The computer-executable instructions may include a routine, a function, or the like. It is also to be understood that a component or system may be localized on a single device or distributed across several devices. Additionally, as used herein, the term “exemplary” is intended to mean serving as an illustration or example of something, and is not intended to indicate a preference. It is to be understood that while certain terminology used herein is in common with conventional transistors (e.g., field-effect transistors, or FETs), including but not limited to the terms gate, source, and drain, such terms are not intended to imply commonality of function between elements of conventional transistors and the thermally sensitive ionic redox transistor described herein. By way of example, and not limitation, unlike various types of conventional transistors, the conductance of a channel of the redox transistor does not depend on a voltage being maintained at a gate electrode during operation of the redox transistor. With reference now toFIG.1, an exemplary thermally sensitive ionic redox transistor100is illustrated. The redox transistor100includes a solid channel layer102, a solid reservoir layer104, and an electrolyte layer106disposed between the channel layer102and the reservoir layer104. The redox transistor100further includes a plurality of contacts108-112that facilitate integration of the transistor100with other electronic systems. The contacts108-112include a source contact108, a drain contact110, and a gate contact112. In exemplary embodiments, the channel layer102of the redox transistor100can be deposited on a substrate114. By way of example, the redox transistor100can be deposited on a substrate114of Si or SiO2in a CMOS-compatible manufacturing process. The electrical conductance (or resistance) of the channel102between the source108and the drain110contacts serves as a “state” of the redox transistor100. As will be explained in greater detail herein, the redox transistor100is non-volatile such that for micro- and nano-scale devices, the conductance state of the channel102is retained for several hours or days without continued energy input. The conductance of the channel102can be varied by a “write” operation and the present conductance of the channel102can be measured by way of a “read” operation, as will be described in greater detail below. The redox transistor100can further be used as a neuromorphic computing element that applies a weight to a signal input to the redox transistor100based on the present conductance state of the redox transistor100. A current output at one of the source108or the drain contacts110is a product of the conductance of the channel102and a value of a voltage input to the other of the source108or the drain110. Thus, a current output by the redox transistor100can be considered a weighted function of the present conductance state of the redox transistor100. The channel102comprises a mixed ionic and electronic conductor (MIEC) material that has an electrical conductance that varies as a function of the bulk concentration of ions in the channel layer102. The conductance of the channel102can be modulated by transport of ions into and out of the channel102. The reservoir layer104comprises a MIEC material that can readily accept ions from or donate ions to the channel layer102. In an exemplary embodiment, the channel102and the reservoir layer104can each comprise a proton injection/extraction material such as, but not limited to, PEDOT:PSS, or WO3. In further exemplary embodiments, the channel layer102and the reservoir layer104each comprise a transition metal oxide such as, for example (but not limited to) TiOx, or VOx, WOx, MoOx. In such embodiments, each of the channel layer102and the reservoir layer104are crystalline layers. Exchange of ions between the channel layer102and the reservoir layer104occurs by way of the electrolyte layer106. The electrolyte layer106is configured such that the electrolyte layer106undergoes a state change as the electrolyte layer106is heated or cooled through a state transition temperature or temperature range. In other words, the electrolyte layer106is configured such that the electrolyte layer106is in a first physical state above a state transition temperature or temperature range, and is in a second physical state below the state transition temperature or temperature range. As used herein supra, reference to a state transition temperature is intended to include a state transition temperature range unless otherwise noted or apparent from context. Furthermore, the electrolyte layer106is configured such that the electrolyte layer106has an ionic conductivity with respect to ions present in the channel layer102and the reservoir layer104that is at least 1000 times greater in the first physical state than in the second physical state. In the second physical state (i.e., below the state transition temperature), ionic conductivity is sufficiently low in the electrolyte layer106that ions are substantially unable to migrate between the channel layer102and the reservoir layer104. When the redox transistor100is heated to a temperature above the state transition temperature of the electrolyte layer106such that the electrolyte layer106is in the first physical state, the electrolyte layer106has sufficiently high ionic conductivity with respect to ions present in the channel layer102and the reservoir layer104to allow the ions to migrate between the channel102and the reservoir layer104. From the foregoing, it is to be appreciated that materials used for construction of the channel102, the reservoir layer104, and the electrolyte layer106can be selected jointly, such that each of the layers102-106is capable of accepting, donating, and/or conducting a same ionic species. The state change of the electrolyte layer106from the first physical state to the second physical state or vice versa can be any of various changes in a physical state of the electrolyte layer106that affect the ionic conductivity of the material used to form the electrolyte layer106. In some exemplary embodiments, the state change of the electrolyte layer106can be a phase change from a solid in the second physical state to a liquid in the first physical state. For example, the electrolyte layer106can be formed as an ionogel that includes a solid matrix in which an ionic compound is suspended. The ionic compound can be a solid below the state transition temperature and a liquid above the state transition temperature. In the solid state of the ionic compound, the ions can be substantially immobile, whereas in the liquid state ion transport and intercalation can occur. The solid matrix in which the ionic compound is suspended can be solid both below and above the state transition temperature. Hence, the electrolyte layer106can function macroscopically as a solid both below and above the state transition temperature. In various embodiments, the solid matrix can be composed of silica, PVDF-HFP, or alumina (Al2O3). In further embodiments, the ionic compound suspended in the solid matrix can include imidazolium-based mineral-acid compounds (e.g., 1-methyl-2-methylimidazolium bromide), 1,2,4-Triazolium perfluorobutanesulfonate, or oxalic acid. In other embodiments, the state change of the electrolyte layer106can be a change in the internal structure of the material used to form the electrolyte layer106. For example, the state change can be a change from a first crystalline structure to a second crystalline structure, wherein ionic conductivity of the electrolyte layer106differs depending upon the crystalline structure of the electrolyte layer106. In various embodiments, the electrolyte layer106can be composed of a solid acid that undergoes a temperature dependent structural change. By way of example, and not limitation, the electrolyte layer106can be composed of cesium bisulfate (CsHSO4), potassium phosphate (e.g., monopotassium phosphate, KH2PO4), or cesium hydrogen selenite (CsHSeO4). In these materials, an internal structural change can form an ionic conduction pathway that allows internal hydrogen ions (i.e., protons) to become highly mobile. In other embodiments, the electrolyte layer106can be composed of a solid-state cation-conductor. Exemplary materials in this category include copper(I) sulfide (Cu2S), materials in the lithium borohydride system (LiCBxHy, where x and y are integers), or silver iodine (AgI) Whereas some materials contemplated for use in a redox transistor, such as yttria-stabilized zirconia (YSZ), have been shown to exhibit temperature-dependent ionic conductivity, these materials have generally exhibited a substantially continuous relationship between ionic conductivity and temperature. For example, and referring now toFIG.2, a plot200of measurements of ionic conductivity of YSZ at temperatures ranging from about 50° C. to about 250° C. is illustrated. As indicated by the plot200, the ionic conductivity of YSZ increases as temperature increases in a substantially continuous, albeit nonlinear fashion. In YSZ, the ionic conductivity at 25° C. is about 10−14S/cm, the conductivity at 90° C. is about 10−11S/cm (1000 times higher than room temperature), and the conductivity at 200° C. is about 10−7S/cm. By contrast, the ionic conductivity of the electrolyte layer106in embodiments described herein exhibits a discontinuity at a state transition temperature. For instance, and referring now toFIG.3, a plot300of measurements of ionic conductivity of CsHSO4at temperatures ranging from about 100° C. to about 185° C. is illustrated. As indicated by the plot300, the ionic conductivity of CsHSO4increases by more than four orders of magnitude as temperature increases within a range of about 135° C. to about 140° C. Thus, CsHSO4exhibits a discontinuous relationship between temperature and ionic conductivity in a state transition temperature range between about 135° C. and about 140° C. (or at a state transition temperature of about 140° C.). In other words, CsHSO4is substantially non-conducting with respect to hydrogen ions below about 135° C. but is conductive with respect to hydrogen ions above about 140° C. Thus, the electrolyte layer106can exhibit behavior similar to a thermally controlled switch. Discontinuity in the relationship between ionic conductivity and temperature exhibited by various embodiments of the electrolyte layer106described herein can provide various advantages to performance of the redox transistor100. For instance, since the ionic conductivity of the electrolyte layer106varies less outside of a narrow state transition temperature range, ion migration between the channel102and the reservoir layer104of the redox transistor100can be less susceptible to variation due to thermal waste of other components with which the transistor100may be integrated or packaged. This can inhibit leakage between the channel102and the reservoir104that can cause loss of information stored in the state of the transistor100(e.g., the conductance state of the channel102). Furthermore, since the temperature change required to transition the electrolyte layer106from a non-conducting to a conducting state with respect to ions present in the channel102and reservoir layer104is smaller than, for example, YSZ, less energy may be needed to heat the transistor100when a write operation is performed. For instance, if the electrolyte layer106of the transistor is formed from CsHSO4and the transistor100has a normal operating a temperature of about 100° C. (i.e., when a state of the transistor100is not being written), a temperature change required to change ionic conductivity of the electrolyte layer106by a factor of about 105is about 40° C., whereas for YSZFIG.2indicates that the necessary temperature change would be greater than 100° C. Still further, in at least some embodiments described herein, above the state transition temperature the ionic conductivity of the electrolyte layer106is higher than YSZ at the same temperatures. In at least some embodiments, this can facilitate faster performance of a “write” procedure of the transistor100, which is described below, as compared to redox transistors that incorporate a YSZ-based electrolyte. A specific material used to form the electrolyte layer106can be selected to have a state transition temperature that lies outside of an expected operating temperature range of a device in which the transistor100is intended to be incorporated. For example, many CMOS-based devices such as cell phones, tablet computing devices, and personal computers have operating temperatures ranging from room temperature (e.g., about 20° C.) up to nearly 100° C. In embodiments wherein the transistor100is incorporated in a CMOS-based computing device, a material used to form the electrolyte layer106of the transistor can be selected to have a state transition temperature that is above 100° C. For example, the electrolyte layer106can be formed of CsHSO4, which has a state transition temperature of about 140° C. In various exemplary embodiments, the electrolyte layer106is configured to have a first physical state above about 100° C., above about 125° C., or above about 150° C., and a second physical state at a temperature about 10° C. less, e.g., below about 90° C., below about 115° C., or below about 140° C., respectively. In other embodiments, an expected operational temperature of the transistor100can be substantially lower than room temperature or substantially higher than 100° C. Thus, substantially any state transition temperature for the electrolyte layer106is contemplated as being within the scope of the present disclosure. In various exemplary embodiments, the electrolyte layer106is selected to have an ionic conductivity that is at least 103times greater, 104times greater, or 106times greater in a physical state above the state transition temperature of the electrolyte layer106than in a physical state below the state transition temperature. In further embodiments, the electrolyte layer106can be selected such that the ionic conductivity is greater than or equal to about 10−3S/cm, greater than or equal to about 10−2S/cm, or greater than or equal to about 10−1S/cm in a physical state above the state transition temperature. In still further embodiments, the electrolyte layer106can be selected such that the ionic conductivity in a physical state below the state transition temperature is less than or equal to about 10−4S/cm, less than or equal to about 10−5S/cm, or less than or equal to about 10−6S/cm. In some embodiments, the channel layer102and the reservoir layer104can also be configured to have thermally-responsive ionic conductivity. In these embodiments, the channel layer102and the reservoir layer104are formed of materials that are configured to accept a same ion that is accepted by the electrolyte layer106. By way of example, and not limitation, the electrolyte layer106can be an ionogel that is configured to accept oxygen vacancies, and the channel and reservoir layers102,104can be formed from a material that is configured to accept oxygen vacancies. For example, one or both of the channel layer102or the reservoir layer104can be formed from strontium titanate (STO) or other material with a perovskite structure that exhibits change in electronic conductivity responsive to changes in oxygen vacancy concentration. These materials further have ionic conductivity with respect to oxygen vacancies that is dependent upon temperature. A write procedure to modify the conductance state of the redox transistor100is now described. Write performance of the redox transistor100is substantially linear and symmetric, yielding predictable change of conductance state of the redox transistor100without a priori knowledge of the present state of the redox transistor100. As noted above, the conductance of the channel102can be varied by control of transport of ions between the channel102and the reservoir layer104. Migration of ions between the channel102and the reservoir layer104across the electrolyte layer106occurs in response to movement of electrons (i.e., electric current) between the channel102and the reservoir layer104. Accordingly, conductance of the channel102can be changed in response to voltage pulses being applied between the reservoir layer104and the channel102(or between metallic contacts in contact with the reservoir104and the channel102, such as the gate112and source108contacts, respectively). By way of example, a voltage VWRITEapplied between the gate contact112and the source contact108causes an electric current to flow between the channel102and the reservoir layer104. However, migration of ions across the electrolyte layer106is limited by the ionic conductivity of the layers102-106with respect to ions present in the channel layer102and the reservoir layer104. Below a state transition temperature of the electrolyte layer106, the electrolyte layer106is substantially non-conductive (e.g., at least 1000 times less conductive than when the redox transistor100is heated above the state transition temperature of the electrolyte layer106) to ions present in the channel layer102and the reservoir layer104that are responsible for the electrical conductance of the channel layer102. Accordingly, at temperatures below the state transition temperature of the electrolyte layer106, application of voltage pulses at VWRITEwill not cause sufficient ion migration between channel layer102and reservoir layer104to substantially change the conductance state of channel102. Thus, below the state transition temperature of the electrolyte layer106, the conductance state of the channel102is substantially invariant responsive to voltage pulses at VWRITE. The conductance state will not degrade when a switch116connected between VWRITEand the gate112is leaky (e.g., permits electrical current to flow even when the switch116is “open”), or even when switch116does not exist and there exists a direct electronic path from the reservoir104to the channel102, because ion migration from the channel102to the reservoir layer104across the electrolyte layer106is effectively blocked when the redox transistor100is below the state transition temperature of the electrolyte layer106. During a write operation, a change in conductance of the channel102exhibits a linear dependence on a number of ions that migrate into or out of the channel102. A number of ions that migrate into or out of the channel102responsive to a voltage pulse applied at VWRITEdepends upon a magnitude and duration of the voltage pulse, but also exhibits a linear relationship. Thus, two voltage pulses of equal magnitude and duration cause a substantially same change in conductance of the channel102. Furthermore, pulses of equal duration and equal but opposite magnitude cause substantially equal but opposite changes in the conductance of the channel102. To illustrate further, and referring now toFIG.4, a conceptual channel conductance plot402, an exemplary VWRITEvoltage plot404, and a plot405of a state of the switch116are illustrated, which together illustrate certain write performance features of the redox transistor100when the redox transistor100is heated above the state transition temperature of the electrolyte layer106. Time is depicted on the x-axis of the plots402,404,405. Conductance G of the channel102is depicted on the y-axis of the channel conductance plot402. The voltage VWRITEthat is applied between the gate112and the drain110is depicted on the y-axis of the VWRITEvoltage plot404. The state of the switch116, closed or open, is depicted on the y-axis of the switch state plot405. From time t0to time t1, the voltage VWRITEtakes the value V and the switch116is closed, such that there is a drop in electric potential from the reservoir104to the channel102. As a result, in the same period, the conductance of the channel102, G, undergoes a substantially linear change from G1to G2as ions migrate into or out of the channel102, which direction of migration may depend upon whether the ions are n- or p-type dopants, a material-dependent factor. While the conductance G of the channel102is depicted in the plot402as increasing in response to a positive value of voltage VWRITE, it is to be understood that whether the conductance G increases or decreases in response to a voltage will depend on whether the voltage causes ions to migrate into or out of the channel layer102. From t1to t2, the switch116is open, and the conductance G does not change. Once a concentration of ions in the channel102is set by way of application of a voltage pulse between the source contact108and the gate contact112, the conductance of the channel102remains stable until another voltage pulse is applied between the drain110and the gate112. Thus, when no voltage is applied, the conductance of the channel102stays constant. From t2to t3the voltage VWRITEtakes the value V again and the switch116is closed, and the conductance G undergoes another substantially linear increase from G2to G3. Since the same voltage is applied for the same duration, the conductance increase from G2to G3is substantially the same magnitude as the conductance increase from G1to G2(e.g., ±5%). From t3to t4, the voltage VWRITEtakes the value −V, equal and opposite to the magnitude of the voltage VWRITEfrom time t2to t3. In the same period t3to t4, since the switch116is closed, the conductance G undergoes a substantially linear decrease from G3to G2. Thus, two voltage pulses at VWRITEof the same duration and equal but opposite magnitudes yield conductance changes that cancel one another. In the period t4to t5, the conductance G does not change since the switch116is open and thus there is no VWRITEapplied between the reservoir layer104and the channel102. From t5to t6, the voltage VWRITEcontinues to take the value −V and the switch116is closed, and thus the conductance G decreases from G2to G1. As will be understood by those of skill in the art in view of the present disclosure, the change in conductance of the channel102resulting from a voltage pulse VWRITEis not substantially dependent on the present conductance state of the channel102. Furthermore, a conductance change in the channel102can be reversed by application of a voltage pulse having opposite polarity to the pulse used to initially cause the conductance change. The write time required to change the resistance or conductance state of the channel102by a given amount can depend at least in part upon the thickness of the electrolyte layer106(e.g., where the thickness refers to a thickness of the electrolyte layer106between the reservoir layer104and the channel layer102). Thus, in some embodiments the electrolyte layer106can be made to be relatively thin (e.g., between 100 nanometers and 1 micron) in order to improve a response time over which the conductance of the channel102changes in response to a voltage pulse VWRITE. After the conductance of the channel layer102is set to a desired state by way of the write procedure described above, the temperature of the redox transistor100can be reduced to a temperature below the state transition temperature of the electrolyte layer106in order to reduce ionic conductivity of the electrolyte layer106and improve retention of the channel conductance state. Subsequently, the conductance state of the channel layer102can be read by applying a voltage VREADbetween the source108and the drain110, and measuring a current I that flows from the source to the drain. The conductance of the channel102can be computed by application of Ohm's law wherein the channel conductance G is equal to I/VREAD. Thermally-sensitive redox transistors constructed in accordance with the present disclosure can retain state for extended periods (e.g., several hours or several days) below the state transition temperature of a material used to form the electrolyte layer106. Referring now toFIG.5, a partial circuit diagram of an exemplary crossbar memory array500that incorporates thermally-sensitive ionic redox transistors502is shown. The memory array500is a 3×3 array addressable by 3 voltage write lines VW1-VW3and 3 voltage read lines VR1-VR3. It is to be understood that while the crossbar memory array500shown inFIG.5(and similarly, a crossbar memory array600shown inFIG.6) is a 3×3 array, principles described herein are applicable to arrays of substantially any size. The write lines VW1-VW3are connected to gate contacts504of the redox transistors502along rows of the array500. The read lines VR1-VR3are connected to either sources or drains506of the redox transistors502along rows of the array500. Current collector lines I1-I3are connected to the other of the sources or drains506along columns of the array500. Each of the gates504of the redox transistors502is connected to the same voltage write line as the other redox transistors502in its row, either its source or drain506is connected to the same voltage read line as the other redox transistors502in its row, and the other of its source or drain506is connected to the same current collector line as the other redox transistors502in its column. A conductance state of a redox transistor502in the array500can be read by applying a voltage to the voltage read line of the row that corresponds to the redox transistor502and measuring the current of the collector line of the column that corresponds to the redox transistor502. The conductance state can then be determined by an application of Ohm's law given the known write voltage and measured collector line current. In the crossbar memory array500, columns of redox transistors502can be selectively heated to a temperature above the state transition temperature of the electrolyte layers of the redox transistors502, one column at a time. An individual redox transistor502can therefore be written by heating the column that corresponds to the redox transistor502and then applying a write voltage pulse or pulses at the voltage write line of the row that corresponds to the redox transistor502. Since the state of a redox transistor502of the array500is only changed when the redox transistor502is both heated above the state transition temperature and pulsed at its gate contact504by a voltage pulse, heating a single column and energizing a single voltage write line of the array500uniquely identifies a single element of the array500for a write operation. It is to be understood that in some embodiments, redox transistors of the array500can be individually heated (e.g., using Joule heating by way of a resistor array having a corresponding resistor for each element of the array500), which can save energy. If a memory array is heated in its entirety rather than selectively, a different means of selecting a redox transistor for writing a conductance state to a single redox transistor in the array can be used. By way of example, and referring now toFIG.6, a partial circuit diagram of an exemplary crossbar memory array600that includes the redox transistors502is shown, wherein each of the redox transistors502is further addressed for writing by way of a selector switch602that is positioned between the gate contact504of the redox transistor502and its voltage write line (e.g., VW1). In the array600, read operations occur in the same manner as described above with respect to the array500ofFIG.5. To perform a write operation with respect to one of the redox transistors502of the array600, the array600is heated to a temperature above the state transition temperature of the transistors502. The voltage write line corresponding to the row of the desirably addressed redox transistor502is energized with a desired write voltage. The selector switch602of the redox transistor502is then closed to apply the write voltage to the gate504of the redox transistor502. In order to simplify addressing of elements in the array600, selector switches602of redox transistors502in the same column of the array600can be collectively controlled such that switches602in the same column of the array600are closed and reopened by a single control signal. Thus, to perform a write operation of a redox transistor502in the array600, the voltage write line of the row corresponding to the redox transistor502can be energized, and the selector switches of the column corresponding to the redox transistor502can be closed. FIGS.7and8illustrate exemplary methodologies relating to writing and reading conductance states of a thermally-sensitive ionic redox transistor, respectively. While the methodologies are shown and described as being a series of acts that are performed in a sequence, it is to be understood and appreciated that the methodologies are not limited by the order of the sequence. For example, some acts can occur in a different order than what is described herein. In addition, an act can occur concurrently with another act. Further, in some instances, not all acts may be required to implement a methodology described herein. Referring now toFIG.7, a methodology700that facilitates writing a conductance state to a thermally-sensitive ionic redox transistor is illustrated. The methodology700begins at702, and at704, a thermally-sensitive ionic redox transistor (e.g., the redox transistor100) is heated to a temperature above the state transition temperature of the redox transistor (e.g., a state transition temperature of an electrolyte layer of the redox transistor). While the redox transistor is above the state transition temperature, at706, a voltage pulse is applied between a variable-conductance channel of the redox transistor and a reservoir layer of the redox transistor, wherein the voltage pulse causes ions to migrate between the channel and the reservoir layer. The migration of ions in turn causes an increase or decrease in the conductance of the channel layer. The step706can be repeated as many times as required to reach a desired conductance state of the channel of the redox transistor. The redox transistor is then allowed to cool or actively cooled to a temperature below the state transition temperature at708, taking the redox transistor out of a writeable state. The methodology700then completes710. Referring now toFIG.8, a methodology800that facilitates reading a conductance state of a thermally-sensitive ionic redox transistor (e.g., the redox transistor100) is illustrated. The methodology800begins at802, and at804, a voltage is applied between source and drain contacts of the redox transistor, which are separated by a variable-conductance channel. At806, an electrical current flowing between the source and the drain contacts is measured while the voltage is being applied804. At808, a conductance state of the channel of the redox transistor is computed based upon the voltage applied at804and the current measured at806, by application of Ohm's law. The methodology800ends at810. What has been described above includes examples of one or more embodiments. It is, of course, not possible to describe every conceivable modification and alteration of the above devices or methodologies for purposes of describing the aforementioned aspects, but one of ordinary skill in the art can recognize that many further modifications and permutations of various aspects are possible. Accordingly, the described aspects are intended to embrace all such alterations, modifications, and variations that fall within the spirit and scope of the appended claims. Furthermore, to the extent that the term “includes” is used in either the detailed description or the claims, such term is intended to be inclusive in a manner similar to the term “comprising” as “comprising” is interpreted when employed as a transitional word in a claim. | 33,592 |
11942283 | DETAILED DESCRIPTION OF THE EXAMPLE EMBODIMENTS The above and other elements, features, steps, and concepts of the present disclosure will be more apparent from the following detailed description in accordance with example embodiments of the invention, which will be explained with reference to the accompanying drawings. It is to be understood that the following description of embodiments is not to be taken in a limiting sense. The scope of the invention is not intended to be limited by the embodiments described hereinafter or by the drawings, which are taken to be illustrative only. The drawings are to be regarded as being schematic representations, and elements illustrated in the drawings are not necessarily shown to scale. Rather, the various elements are represented such that their function and general purpose become apparent to a person skilled in the art. Any connection, or communication, or coupling between functional blocks, devices, components, or other physical or functional units shown in the drawings or described herein may also be implemented by an indirect connection or coupling. Various example embodiments will now be described more fully with reference to the accompanying drawings in which only some example embodiments are shown. Specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments. Example embodiments, however, may be embodied in various different forms, and should not be construed as being limited to only the illustrated embodiments. Rather, the illustrated embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey the concepts of this disclosure to those skilled in the art. Accordingly, known processes, elements, and techniques, may not be described with respect to some example embodiments. Unless otherwise noted, like reference characters denote like elements throughout the attached drawings and written description, and thus descriptions will not be repeated. The present invention, however, may be embodied in many alternate forms and should not be construed as limited to only the example embodiments set forth herein. It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, components, regions, layers, and/or sections, these elements, components, regions, layers, and/or sections, should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of example embodiments of the present invention. As used herein, the term “and/or,” includes any and all combinations of one or more of the associated listed items. The phrase “at least one of” has the same meaning as “and/or”. Spatially relative terms, such as “beneath,” “below,” “lower,” “under,” “above,” “upper,” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below,” “beneath,” or “under,” other elements or features would then be oriented “above” the other elements or features. Thus, the example terms “below” and “under” may encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. In addition, when an element is referred to as being “between” two elements, the element may be the only element between the two elements, or one or more other intervening elements may be present. Spatial and functional relationships between elements (for example, between modules) are described using various terms, including “connected,” “engaged,” “interfaced,” and “coupled.” Unless explicitly described as being “direct,” when a relationship between first and second elements is described in the above disclosure, that relationship encompasses a direct relationship where no other intervening elements are present between the first and second elements, and also an indirect relationship where one or more intervening elements are present (either spatially or functionally) between the first and second elements. In contrast, when an element is referred to as being “directly” connected, engaged, interfaced, or coupled to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (e.g., “between,” versus “directly between,” “adjacent,” versus “directly adjacent,” etc.). The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments of the invention. As used herein, the singular forms “a,” “an,” and “the,” are intended to include the plural forms as well, unless the context clearly indicates otherwise. As used herein, the terms “and/or” and “at least one of” include any and all combinations of one or more of the associated listed items. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including,” when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. Also, the term “example” is intended to refer to an example or illustration. When an element is referred to as being “on,” “connected to,” “coupled to,” or “adjacent to,” another element, the element may be directly on, connected to, coupled to, or adjacent to, the other element, or one or more other intervening elements may be present. In contrast, when an element is referred to as being “directly on,” “directly connected to,” “directly coupled to,” or “immediately adjacent to,” another element there are no intervening elements present. It should also be noted that in some alternative implementations, the functions/acts noted may occur out of the order noted in the figures. For example, two figures shown in succession may in fact be executed substantially concurrently or may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which example embodiments belong. It will be further understood that terms, e.g., those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. Before discussing example embodiments in more detail, it is noted that some example embodiments may be described with reference to acts and symbolic representations of operations (e.g., in the form of flow charts, flow diagrams, data flow diagrams, structure diagrams, block diagrams, etc.) that may be implemented in conjunction with units and/or devices discussed in more detail below. Although discussed in a particularly manner, a function or operation specified in a specific block may be performed differently from the flow specified in a flowchart, flow diagram, etc. For example, functions or operations illustrated as being performed serially in two consecutive blocks may actually be performed simultaneously, or in some cases be performed in reverse order. Although the flowcharts describe the operations as sequential processes, many of the operations may be performed in parallel, concurrently or simultaneously. In addition, the order of operations may be re-arranged. The processes may be terminated when their operations are completed, but may also have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, subprograms, etc. Specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments of the present invention. This invention may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein. Units and/or devices according to one or more example embodiments may be implemented using hardware, software, and/or a combination thereof. For example, hardware devices may be implemented using processing circuitry such as, but not limited to, a processor, Central Processing Unit (CPU), a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a System-on-Chip (SoC), a programmable logic unit, a microprocessor, or any other device capable of responding to and executing instructions in a defined manner. Portions of the example embodiments and corresponding detailed description may be presented in terms of software, or algorithms and symbolic representations of operation on data bits within a computer memory. These descriptions and representations are the ones by which those of ordinary skill in the art effectively convey the substance of their work to others of ordinary skill in the art. An algorithm, as the term is used here, and as it is used generally, is conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of optical, electrical, or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like. It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise, or as is apparent from the discussion, terms such as “processing” or “computing” or “calculating” or “determining” of “displaying” or the like, refer to the action and processes of a computer system, or similar electronic computing device/hardware, that manipulates and transforms data represented as physical, electronic quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices. In this application, including the definitions below, the term ‘module’ or the term ‘controller’ may be replaced with the term ‘circuit.’ The term ‘module’ may refer to, be part of, or include processor hardware (shared, dedicated, or group) that executes code and memory hardware (shared, dedicated, or group) that stores code executed by the processor hardware. The module may include one or more interface circuits. In some examples, the interface circuits may include wired or wireless interfaces that are connected to a local area network (LAN), the Internet, a wide area network (WAN), or combinations thereof. The functionality of any given module of the present disclosure may be distributed among multiple modules that are connected via interface circuits. For example, multiple modules may allow load balancing. In a further example, a server (also known as remote, or cloud) module may accomplish some functionality on behalf of a client module. Software may include a computer program, program code, instructions, or some combination thereof, for independently or collectively instructing or configuring a hardware device to operate as desired. The computer program and/or program code may include program or computer-readable instructions, software components, software modules, data files, data structures, and/or the like, capable of being implemented by one or more hardware devices, such as one or more of the hardware devices mentioned above. Examples of program code include both machine code produced by a compiler and higher level program code that is executed using an interpreter. For example, when a hardware device is a computer processing device (e.g., a processor, Central Processing Unit (CPU), a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a microprocessor, etc.), the computer processing device may be configured to carry out program code by performing arithmetical, logical, and input/output operations, according to the program code. Once the program code is loaded into a computer processing device, the computer processing device may be programmed to perform the program code, thereby transforming the computer processing device into a special purpose computer processing device. In a more specific example, when the program code is loaded into a processor, the processor becomes programmed to perform the program code and operations corresponding thereto, thereby transforming the processor into a special purpose processor. Software and/or data may be embodied permanently or temporarily in any type of machine, component, physical or virtual equipment, or computer storage medium or device, capable of providing instructions or data to, or being interpreted by, a hardware device. The software also may be distributed over network coupled computer systems so that the software is stored and executed in a distributed fashion. In particular, for example, software and data may be stored by one or more computer readable recording mediums, including the tangible or non-transitory computer-readable storage media discussed herein. Even further, any of the disclosed methods may be embodied in the form of a program or software. The program or software may be stored on a non-transitory computer readable medium and is adapted to perform any one of the aforementioned methods when run on a computer device (a device including a processor). Thus, the non-transitory, tangible computer readable medium, is adapted to store information and is adapted to interact with a data processing facility or computer device to execute the program of any of the above mentioned embodiments and/or to perform the method of any of the above mentioned embodiments. Example embodiments may be described with reference to acts and symbolic representations of operations (e.g., in the form of flow charts, flow diagrams, data flow diagrams, structure diagrams, block diagrams, etc.) that may be implemented in conjunction with units and/or devices discussed in more detail below. Although discussed in a particularly manner, a function or operation specified in a specific block may be performed differently from the flow specified in a flowchart, flow diagram, etc. For example, functions or operations illustrated as being performed serially in two consecutive blocks may actually be performed simultaneously, or in some cases be performed in reverse order. According to one or more example embodiments, computer processing devices may be described as including various functional units that perform various operations and/or functions to increase the clarity of the description. However, computer processing devices are not intended to be limited to these functional units. For example, in one or more example embodiments, the various operations and/or functions of the functional units may be performed by other ones of the functional units. Further, the computer processing devices may perform the operations and/or functions of the various functional units without sub-dividing the operations and/or functions of the computer processing units into these various functional units. Units and/or devices according to one or more example embodiments may also include one or more storage devices. The one or more storage devices may be tangible or non-transitory computer-readable storage media, such as random access memory (RAM), read only memory (ROM), a permanent mass storage device (such as a disk drive), solid state (e.g., NAND flash) device, and/or any other like data storage mechanism capable of storing and recording data. The one or more storage devices may be configured to store computer programs, program code, instructions, or some combination thereof, for one or more operating systems and/or for implementing the example embodiments described herein. The computer programs, program code, instructions, or some combination thereof, may also be loaded from a separate computer readable storage medium into the one or more storage devices and/or one or more computer processing devices using a drive mechanism. Such separate computer readable storage medium may include a Universal Serial Bus (USB) flash drive, a memory stick, a Blu-ray/DVD/CD-ROM drive, a memory card, and/or other like computer readable storage media. The computer programs, program code, instructions, or some combination thereof, may be loaded into the one or more storage devices and/or the one or more computer processing devices from a remote data storage device via a network interface, rather than via a local computer readable storage medium. Additionally, the computer programs, program code, instructions, or some combination thereof, may be loaded into the one or more storage devices and/or the one or more processors from a remote computing system that is configured to transfer and/or distribute the computer programs, program code, instructions, or some combination thereof, over a network. The remote computing system may transfer and/or distribute the computer programs, program code, instructions, or some combination thereof, via a wired interface, an air interface, and/or any other like medium. The one or more hardware devices, the one or more storage devices, and/or the computer programs, program code, instructions, or some combination thereof, may be specially designed and constructed for the purposes of the example embodiments, or they may be known devices that are altered and/or modified for the purposes of example embodiments. A hardware device, such as a computer processing device, may run an operating system (OS) and one or more software applications that run on the OS. The computer processing device also may access, store, manipulate, process, and create data in response to execution of the software. For simplicity, one or more example embodiments may be exemplified as a computer processing device or processor; however, one skilled in the art will appreciate that a hardware device may include multiple processing elements or processors and multiple types of processing elements or processors. For example, a hardware device may include multiple processors or a processor and a controller. In addition, other processing configurations are possible, such as parallel processors. The computer programs include processor-executable instructions that are stored on at least one non-transitory computer-readable medium (memory). The computer programs may also include or rely on stored data. The computer programs may encompass a basic input/output system (BIOS) that interacts with hardware of the special purpose computer, device drivers that interact with particular devices of the special purpose computer, one or more operating systems, user applications, background services, background applications, etc. As such, the one or more processors may be configured to execute the processor executable instructions. The computer programs may include: (i) descriptive text to be parsed, such as HTML (hypertext markup language) or XML (extensible markup language), (ii) assembly code, (iii) object code generated from source code by a compiler, (iv) source code for execution by an interpreter, (v) source code for compilation and execution by a just-in-time compiler, etc. As examples only, source code may be written using syntax from languages including C, C++, C#, Objective-C, Haskell, Go, SQL, R, Lisp, Java®, Fortran, Perl, Pascal, Curl, OCaml, Javascript®, HTML5, Ada, ASP (active server pages), PHP, Scala, Eiffel, Smalltalk, Erlang, Ruby, Flash®, Visual Basic®, Lua, and Python®. Further, at least one embodiment of the invention relates to the non-transitory computer-readable storage medium including electronically readable control information (processor executable instructions) stored thereon, configured in such that when the storage medium is used in a controller of a device, at least one embodiment of the method may be carried out. The computer readable medium or storage medium may be a built-in medium installed inside a computer device main body or a removable medium arranged so that it can be separated from the computer device main body. The term computer-readable medium, as used herein, does not encompass transitory electrical or electromagnetic signals propagating through a medium (such as on a carrier wave); the term computer-readable medium is therefore considered tangible and non-transitory. Non-limiting examples of the non-transitory computer-readable medium include, but are not limited to, rewriteable non-volatile memory devices (including, for example flash memory devices, erasable programmable read-only memory devices, or a mask read-only memory devices); volatile memory devices (including, for example static random access memory devices or a dynamic random access memory devices); magnetic storage media (including, for example an analog or digital magnetic tape or a hard disk drive); and optical storage media (including, for example a CD, a DVD, or a Blu-ray Disc). Examples of the media with a built-in rewriteable non-volatile memory, include but are not limited to memory cards; and media with a built-in ROM, including but not limited to ROM cassettes; etc. Furthermore, various information regarding stored images, for example, property information, may be stored in any other form, or it may be provided in other ways. The term code, as used above, may include software, firmware, and/or microcode, and may refer to programs, routines, functions, classes, data structures, and/or objects. Shared processor hardware encompasses a single microprocessor that executes some or all code from multiple modules. Group processor hardware encompasses a microprocessor that, in combination with additional microprocessors, executes some or all code from one or more modules. References to multiple microprocessors encompass multiple microprocessors on discrete dies, multiple microprocessors on a single die, multiple cores of a single microprocessor, multiple threads of a single microprocessor, or a combination of the above. Shared memory hardware encompasses a single memory device that stores some or all code from multiple modules. Group memory hardware encompasses a memory device that, in combination with other memory devices, stores some or all code from one or more modules. The term memory hardware is a subset of the term computer-readable medium. The term computer-readable medium, as used herein, does not encompass transitory electrical or electromagnetic signals propagating through a medium (such as on a carrier wave); the term computer-readable medium is therefore considered tangible and non-transitory. Non-limiting examples of the non-transitory computer-readable medium include, but are not limited to, rewriteable non-volatile memory devices (including, for example flash memory devices, erasable programmable read-only memory devices, or a mask read-only memory devices); volatile memory devices (including, for example static random access memory devices or a dynamic random access memory devices); magnetic storage media (including, for example an analog or digital magnetic tape or a hard disk drive); and optical storage media (including, for example a CD, a DVD, or a Blu-ray Disc). Examples of the media with a built-in rewriteable non-volatile memory, include but are not limited to memory cards; and media with a built-in ROM, including but not limited to ROM cassettes; etc. Furthermore, various information regarding stored images, for example, property information, may be stored in any other form, or it may be provided in other ways. The apparatuses and methods described in this application may be partially or fully implemented by a special purpose computer created by configuring a general purpose computer to execute one or more particular functions embodied in computer programs. The functional blocks and flowchart elements described above serve as software specifications, which can be translated into the computer programs by the routine work of a skilled technician or programmer. Although described with reference to specific examples and drawings, modifications, additions and substitutions of example embodiments may be variously made according to the description by those of ordinary skill in the art. For example, the described techniques may be performed in an order different with that of the methods described, and/or components such as the described system, architecture, devices, circuit, and the like, may be connected or combined to be different from the above-described methods, or results may be appropriately achieved by other components or equivalents. At least one embodiment of the invention is directed to a fixing module for fixing a push button or emergency stop button or rotary actuator of a control and signaling device, wherein the fixing module is constructed from a top housing part and a bottom housing part, which each have a cuboidal structure with a top side, an underside and four side parts connecting the top side to the underside. The invention is characterized in that, on the top side of the bottom housing part, a material that extends at least partially in this plane and has a grounding function is formed. An advantageous embodiment of the concept, according to the invention, of a fixing module can reside in that the material that extends at least partially in the plane and has a grounding function is a grounding foil. A continuation of the concept, according to an embodiment of the invention, for the fixing module can reside in that the material that extends in the plane of the top side of the bottom housing part has a plurality of layers. A development of a specific configuration of the concept, according to an embodiment of the invention, for the fixing module can provide for the material that extends in the plane of the top side of the bottom housing part to be arranged on the top side of the bottom housing part in a positionally stable manner via an adhesive layer. In a specific embodiment of the concept, according to an embodiment of the invention, for the fixing module, the material that extends in the plane of the top side of the bottom housing part has a polymer-containing layer. A continuation of the concept, according to an embodiment of the invention, for the fixing module can reside in that the material that extends in the plane of the top side of the bottom housing part has a graphite layer. A development of a specific configuration of the concept, according to an embodiment of the invention, for the fixing module can provide for the material that extends in the plane of the top side of the bottom housing part to be configured such that grounding of the electric currents that flow through metal components in the housing of the fixing module is formed via at least one contact point. In a specific embodiment of the concept, according to an embodiment of the invention, for the fixing module, the housing parts of the fixing module are both manufactured from metal or one housing part is manufactured from plastic and the other is manufactured from metal. A further example embodiment of the fixing module resides in that, on the top side of the bottom housing part, an electrically conductive component made of metal with a grounding function is arranged. In a specific embodiment of the concept, according to an embodiment of the invention, for this fixing module, the electrically conductive component is a spring element. At least one embodiment is furthermore directed to a push button or emergency stop button or rotary actuator having one of the two fixing modules. At least one embodiment is also directed to a control and signaling device having a push button or emergency stop button or rotary actuator and at least one switch element, wherein the push button or emergency stop button or rotary actuator and the at least one switch element are mounted on one of the two fixing modules. The fixing module according to at least one embodiment is the invention preferably has a two-part housing made up of a top housing part and a bottom housing part. The housing parts are each configured in a cuboidal manner with a top side, an underside and four side parts connecting the top side to the underside. The housing parts can be fastened together preferably via clamping lugs, wherein the top housing part has recesses for receiving the clamping lugs on the bottom housing part. This arrangement for the clamped connection for fixing the housing parts together can also be the other way around. A concentric passage opening is arranged preferably in a centered manner in an identical position in both housing parts. The fixing module for the push button has a snap ring, which rests on the top side of the bottom housing part and surrounds the passage opening. An actuating lever is arranged, preferably in one piece, on the snap ring, the actuating lever releasing the push button when actuated. Beneath the snap ring, a gearwheel is arranged in the bottom housing part, the gearwheel being operatively connected to a pinion. Fastened to the snap ring is a restoring spring, which allows restoration into the starting position. Positioned in the pinion, from the underside of the bottom housing part, is a contact pin, into which a peg has been inserted as a rotation lock. The grounding function of the fixing module can be implemented either via a spring element, which is fastened between the pinion and a connection dome on the top side of the bottom housing part, or via a grounding foil. The grounding foil has preferably at least one contact point in the form of a tab with the pinion. The grounding foil is positioned between the top side of the bottom housing part and the snap ring. The grounding foil has cutouts for possible connection domes. FIG.1shows a fixing module according to an embodiment of the invention having a top housing part1and a bottom housing part2. The fixing module according to an embodiment of the invention has preferably a two-part housing made up of a top housing part1and a bottom housing part2. The housing parts are each formed in a cuboidal manner with a top side3, an underside4and four side parts5,6,7,8connecting the top side3to the underside4. The housing parts can be fastened together preferably via clamping lugs9, wherein the top housing part1has recesses10for receiving the clamping lugs9on the bottom housing part2. This arrangement for the clamping connection for fixing the housing parts together can also be the other way around. A concentric passage opening11is arranged preferably in a centered manner in an identical position, one on top of the other, in both housing parts. FIG.2illustrates a holding device in a fixing module according to an embodiment of the invention for a control and signaling device. The holding device for the push button has a snap ring12, which rests on the top side3of the bottom housing part2and surrounds the passage opening11. An actuating lever13is arranged, preferably in one piece, on the snap ring12, the actuating lever13releasing the push button when actuated. Beneath the snap ring12, a gearwheel14is arranged in the bottom housing part2, the gearwheel14being operatively connected to a pinion15. Fastened to the snap ring12is a restoring spring16, which allows restoration into the starting position. FIG.3shows the bottom housing part2according toFIG.1with a first example embodiment of a grounding function in the form of a spring element19. The spring element19is tensioned between a connection dome16and the pinion15on the top side3of the bottom housing part2. FIG.4illustrates an enlarged detail according toFIG.3. It is apparent from this illustration that a contact pin17, formed in a U-shaped manner, is arranged in the pinion15, with an introduced peg18, which serves as a rotation lock for the fixing module. The grounding function of the fixing module is implemented via the spring element19, which is fastened between the pinion15and connection dome16to the top side3of the bottom housing part2. A material extending in a plane of the top side3of the bottom housing part2includes a plurality of layers23. FIG.5illustrates a fixing module according to an embodiment of the invention having a second example embodiment for the grounding function in the form of a material with a foil-like appearance, for example a grounding foil22. Formed on the top side3of the bottom housing part2is a material, extending at least partially in this plane, with a grounding function. The material has preferably at least one contact point20in the form of a tab with the pinion15. The material, or the grounding foil22, is positioned between the top side3of the bottom housing part2and the snap ring12. The material, or the grounding foil22, has cutouts21for possible connection domes16. The material is arranged on the top side3of the bottom housing part2in a positionally stable manner on an adhesive layer24. FIG.6illustrates an enlarged detail according toFIG.5. In this second example embodiment, too, a contact pin17, formed in a U-shaped manner, is arranged in the pinion15with an introduced peg18as a rotation lock for the fixing module. The fixing module according to an embodiment of the invention is characterized in that the housing parts manufactured from metal retain simple grounding via a spring element or by the grounding foil. A housing combination with one housing part manufactured from metal and one from plastic represents a cost saving and can likewise be grounded in a simple manner via the grounding foil. Although the invention has been illustrated in greater detail using the example embodiments, the invention is not limited by the disclosed examples, and a person skilled in the art can derive other variations therefrom without departing from the scope of protection of the invention. The patent claims of the application are formulation proposals without prejudice for obtaining more extensive patent protection. The applicant reserves the right to claim even further combinations of features previously disclosed only in the description and/or drawings. References back that are used in dependent claims indicate the further embodiment of the subject matter of the main claim by way of the features of the respective dependent claim; they should not be understood as dispensing with obtaining independent protection of the subject matter for the combinations of features in the referred-back dependent claims. Furthermore, with regard to interpreting the claims, where a feature is concretized in more specific detail in a subordinate claim, it should be assumed that such a restriction is not present in the respective preceding claims. Since the subject matter of the dependent claims in relation to the prior art on the priority date may form separate and independent inventions, the applicant reserves the right to make them the subject matter of independent claims or divisional declarations. They may furthermore also contain independent inventions which have a configuration that is independent of the subject matters of the preceding dependent claims. None of the elements recited in the claims are intended to be a means-plus-function element within the meaning of 35 U.S.C. § 112(f) unless an element is expressly recited using the phrase “means for” or, in the case of a method claim, using the phrases “operation for” or “step for.” Example embodiments being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the present invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims. LIST OF REFERENCE SIGNS 1Top housing part2Bottom housing part3Top side4Underside5Side part6Side part7Side part8Side part9Clamping lug10Recess11Passage opening12Snap ring13Actuating lever14Gearwheel15Pinion16Restoring spring17Contact pin18Peg19Spring element20Contact point21Cutout22Grounding foil | 37,573 |
11942284 | DETAILED DESCRIPTION One or more embodiments will now be described with reference to the accompanying drawings. The same components are given the same reference numerals in the embodiments described below, and redundant descriptions are omitted. Example Use A switch device of the present disclosure according to one or more embodiments may be an in-vehicle microswitch used for, for example, detecting a seat position, an open or closed state of a sunroof, and an open or closed state of a door. First Embodiment Switch Device FIG.1is a perspective view of a switch device1A according to a first embodiment or embodiments.FIG.2is a transparent perspective view of the switch device1A inFIG.1, showing its example internal structure.FIG.3is a side view of the switch device1A inFIG.2viewed from the left, showing the internal structure.FIG.4is a plan view of the switch device1A inFIG.2viewed from above, showing the internal structure. In the figures, the X direction is the front-rear direction (depth direction) of the switch device1(A, B, C, D). The −X direction (negative X direction) is the frontward direction and the +X direction (positive X direction) is the rearward direction. The Y direction is the right-left direction of the switch device1(A, B, C, D). The −Y direction (negative Y direction) is the leftward direction and the +Y direction (positive Y direction) is the rightward direction. The Z direction is the up-down direction of the switch device1(A, B, C, D). The −Z direction (negative Z direction) is the downward direction and the +Z direction (positive Z direction) is the upward direction. The same applies to the embodiments described below. The directions used herein are for ease of explanation, and do not limit the orientation of the switch device1according to one or more embodiments. The switch device1A according to a first embodiment or embodiments includes a housing2, a pressing member3, an urging member4, fixed contacts5(5a,5b), and a movable contact6(refer toFIGS.1to4). In the switch device1A according to a first embodiment or embodiments, the pressing member3reciprocates in a movement direction D (+D/−D) parallel to the up-down direction (Z direction) to allow the movable contact6to connect and disconnect between the fixed contacts5(5a,5b). Housing The housing2includes a housing body20, a cover21, and a cover holder22(refer toFIG.1). The housing2accommodates the pressing member3, the urging member4, the multiple fixed contacts5(5a,5b), and the movable contact6. In the housing2in a first embodiment or embodiments, the cover21is placed on the housing body20, and the cover holder22is placed over the cover21. The housing body20is a substantially rectangular prism (refer toFIG.1). The housing body20is formed by, for example, injection molding using a synthetic resin material. The housing body20in a first embodiment includes, on the upper outer surfaces on its two sides, receiving portions200with which the cover holder22is engaged. The housing body20in a first embodiment or embodiments has, on its front inner surface, a guide groove201in the up-down direction (Z direction) for guiding the pressing member3in the movement direction D (refer toFIGS.3and4). An urging member positioning boss202for positioning the urging member4is in the housing body20(refer toFIGS.3and4). The housing body20has, on its outer surface, pins203and204that can be fitted with peripheral components of the switch device1A (refer toFIG.1). The cover21prevents foreign matter such as water and dust from entering the housing body20. The cover21is an elastic member that is, for example, waterproof, dustproof, and flexible, such as rubber. The cover21deforms elastically as the pressing member3moves. The cover holder22is squared U-shaped (substantially U-shaped) and opens downward (−Z direction) (refer toFIG.1). The cover holder22has, in its center, a through-hole220through which the pressing member3protrudes outside the housing2. The cover holder22in a first embodiment or embodiments includes, in its two ends, engaging portions221engaged with the receiving portions200in the housing body20. Pressing Member FIG.5is a schematic diagram of an example slider portion31in a first embodiment or embodiments. The pressing member3moves from a reference position to a pressed position in the movement direction D upon receiving an external pressing force and returns to the reference position upon being released from the external pressing force. The external pressing force includes, for example, a pressing force resulting from an operation of a peripheral component of the switch device1A. The reference position refers to the position of the pressing member3without receiving any external pressing force. The pressed position refers to the position of the pressing member3farthest from the reference position in the movable range of the pressing member3upon receiving an external pressing force. The reference position in a first embodiment or embodiments is upward (in the +Z direction) from the pressed position. The pressed position in a first embodiment or embodiments refers to the position of the pressing member3hitting the bottom surface of the housing body20and being restricted from moving further downward (−Z direction). The pressing member3includes a button30and the slider portion31(refer toFIGS.2and3). The button30receives an external pressing force. The button30in a first embodiment or embodiments has a substantially quadrangular pyramidal upper end (refer toFIGS.1to3). The slider portion31extends in a diagonal direction defined by the −X and +Z directions oblique to the movement direction D. The slider portion31is slidable along the movable contact6. In a first embodiment or embodiments, the slider portion31slides along the movable contact6by moving along the movable contact6. The slider portion31in a first embodiment or embodiments has a first inclined surface310and a second inclined surface311. The first inclined surface310and the second inclined surface311are included in the inner side surface of a leg33, which extends downward from the button30along the front inner surface of the housing2. The first inclined surface310and the second inclined surface311extend in directions that are oblique at different angles to the movement direction D of the pressing member3(refer toFIGS.3and5). The first inclined surface310extends in a direction oblique at an angle θ to the movement direction D of the pressing member3as viewed in the right-left direction (Y direction). The second inclined surface311extends upward (in the +Z direction) from the first inclined surface310in a direction oblique at an angle φ smaller than the angle θ to the movement direction D of the pressing member3as viewed in the right-left direction (Y direction). A specific example of the pressing member3in a first embodiment or embodiments with the slider portion31that slides along the movable contact6will now be described with reference toFIG.3. As the pressing member3moves from the reference position to the pressed position in the +D direction, the slider portion31in the pressing member3comes in contact with the movable contact6in the +D direction and slides along the movable contact6. As described above, the slider portion31in a first embodiment or embodiments extends in the diagonal direction defined by the −X and +Z directions. The slider portion31coming in contact with the movable contact6in the +D direction allows the movable contact6to slide in the diagonal direction defined by the −X and +Z directions relative to the pressing member3. Accordingly, the pressing member3has the slider portion31sliding along the movable contact6. Urging Member The urging member4urges the pressing member3toward the reference position. The urging member4is, for example, a coil spring. The urging member positioning boss202in the housing body20extends through the urging member4(refer toFIGS.3and4). The urging member4causes the pressing member3to return to the reference position when the pressing member3is released from the external pressing force. Fixed Contact The multiple fixed contacts5in a first embodiment or embodiments include a first fixed contact5aand a second fixed contact5b(refer toFIGS.2and4). The first fixed contact5aand the second fixed contact5bin a first embodiment or embodiments both protrude from a lower portion of the housing body20and are electrically connectable to the peripheral components of the switch device1A. The first fixed contact5ais located on the right (in the +Y direction) in the housing body20(refer toFIGS.2and4). The second fixed contact5bis located on the left (in the −Y direction) in the housing body20(refer toFIGS.2and4). The second fixed contact5bincludes, on its upper end, a contact target51with which the movable contact6comes in contact. A resistor such as a chip resistor may be electrically connected between the first fixed contact5aand the second fixed contact5b. Movable Contact The movable contact6is swingable in a direction intersecting with the movement direction D of the pressing member3. The movable contact6connects and disconnects between the first fixed contact5aand the second fixed contact5b. Connecting and disconnecting refers to switching the state from being electrically connected to being electrically insulated and from being electrically insulated to being electrically connected. The movable contact6in a first embodiment or embodiments is electrically connected to the first fixed contact5a. The movable contact6comes in contact with and separates from the second fixed contact5bto connect and disconnect between the first fixed contact5aand the second fixed contact5b. The movable contact6in a first embodiment or embodiments includes an arm60and a contact point61(refer toFIGS.2and4). The arm60in a first embodiment or embodiments is squared U-shaped (substantially U-shaped) in the right-left direction (Y direction) in a plan view and opens toward the center of the housing body20(refer toFIG.4). The arm60has a right end (in the +Y direction) electrically connected to the first fixed contact5a. In a specific example, the arm60receives the first fixed contact5ain a slit62in the right end (in the +Y direction) to be electrically connected to the first fixed contact5a(refer toFIG.2). The movable contact6is swingable in a swing direction S (+S/−S) along the front-rear direction (X direction) with a right corner65(in the +Y direction) of the square U-shape of the arm60as a basal end (refer toFIG.4). With the arm60functioning as a leaf spring, the movable contact6returns to its natural state under no load. The contact point61(610,611) in a first embodiment or embodiments comes in contact with and separates from the second fixed contact5b. The contact point61(610,611) is bifurcated from the left end (in the −Y direction) of the arm60like a fork (refer toFIG.4). The contact point61(610,611) is away from the second fixed contact5bwhen the arm60is under no load (refer toFIGS.2to4). The contact points610and611are both U-shaped and open upward (+Z direction). The contact point611is located inward from the contact point610. The contact point611, which is nearer the basal end for the movable contact6to swing than the contact point610, has a smaller width than the contact point610(refer toFIG.4), which equalizes the frictional force between the contact point610and the second fixed contact5band the frictional force between the contact point611and the second fixed contact5b. The contact point61(610,611) can thus come in contact with and separate from the second fixed contact5bsmoothly. A specific example of the movable contact6in a first embodiment or embodiments connecting and disconnecting between the first fixed contact5aand the second fixed contact5bwill now be described with reference toFIG.4. The movable contact6in a first embodiment or embodiments described above swings in the +S direction with the corner65as a basal end upon receiving a pressing force on the arm60in the −X direction. The movable contact6swinging in the +S direction causes the contact point61in the movable contact6, which has been away from the second fixed contact5b, to come in contact with the contact target51in the second fixed contact5b. The movable contact6electrically connected to the first fixed contact5acoming in contact with the second fixed contact5belectrically connects the first fixed contact5aand the second fixed contact5b. The movable contact6swings in the −S direction to return to its natural state upon being released from the pressing force in the −X direction to be under no load. The movable contact6swinging in the −S direction causes the contact point61in the movable contact6, which has been in contact with the second fixed contact5b, to separate from the second fixed contact5b. The movable contact6electrically connected to the first fixed contact5aseparating from the second fixed contact5binsulates the first fixed contact5aand the second fixed contact5bfrom each other. Accordingly, the movable contact6connects and disconnects between the first fixed contact5aand the second fixed contact5b. As described above, the movable contact6including the multiple contact points61(610,611) allows electrical connection between the first fixed contact5aand the second fixed contact5bwith the contact point611when, for example, the contact point610oxidizes and fails to electrically connect with the second fixed contact5b. Thus, providing multiple contact points increases the reliability of contact between the first fixed contact5aand the second fixed contact5b. The first fixed contact5aand the second fixed contact5bin a first embodiment or embodiments are insert-molded to be integral with the housing body20. Operation of Switch Device The operation of the switch device1A according to a first embodiment or embodiments will now be described. FIG.6is a schematic side view and a schematic plan view of a portion including the first fixed contact5aand the second fixed contact5bin a first embodiment or embodiments insulated from each other.FIG.7is a schematic side view and a schematic plan view of the portion including the first fixed contact5aand the second fixed contact5bin a first embodiment or embodiments electrically connected with each other. In the figures, the dot-and-dash line in the vertical direction indicates the sliding position of the pressing member3with respect to the movable contact6. In the figures, the dot-and-dash line in the lateral direction conceptually indicates the reference position of the pressing member3. In the figures, the shaded areas indicate the portions of the contact point61in the movable contact6that come in contact with the second fixed contact5b. The same applies to the embodiments described below. As shown inFIG.6, when the pressing member3is at the reference position, the movable contact6is under no load, with the contact point61in the movable contact6away from the second fixed contact5b. The first fixed contact5aand the second fixed contact5bare thus insulated from each other. The pressing member3is guided along the guide groove201on the housing2to move to the pressed position in the +D direction upon receiving an external pressing force as shown inFIG.7. As the pressing member3moves to the pressed position, the slider portion31slides along the rear (in the +X direction) of the arm60in the movable contact6. When the pressing member3has its portion sliding along the arm60in the movable contact6, the arm60slides in the diagonal direction defined by the −X and +Z directions relative to the pressing member3and is also pressed by the slider portion31in the −X direction. The movable contact6swings in the +S direction, or more specifically, in the direction intersecting with the movement direction D of the pressing member3under the pressing force in the −X direction from the slider portion31. The movable contact6swinging in the +S direction causes the contact point61in the movable contact6electrically connected to the first fixed contact5ato come in contact with the contact target51in the second fixed contact5b. The first fixed contact5aand the second fixed contact5bare thus electrically connected. The pressing member3moves in the −D direction under the urging force from the urging member4to return to the reference position as shown inFIG.6upon being released from the external pressing force. The pressing member3has its portion stopping sliding along the movable contact6, and the movable contact6is released from the pressing force in the −X direction from the slider portion31to swing in the −S direction. The movable contact6swinging in the −S direction causes the contact point61in the movable contact6to separate from the second fixed contact5b. The first fixed contact5aand the second fixed contact5bare thus insulated from each other again. As described above, the movable contact6is pressed by the slider portion31in the pressing member3sliding along the movable contact6as the pressing member3moves from the reference position to the pressed position. Pressing causes the movable contact6to swing and come in contact with and separate from the second fixed contact5bthat is one of the multiple fixed contacts5(5a,5b), thus connecting and disconnecting between the first fixed contact5aand the second fixed contact5b. The ratio of the distance by which the pressing member3moves in the movement direction D and the distance by which the movable contact6slides along the slider portion31is approximate to cos(ω):1, where w is the angle at which the slider portion31is oblique to the movement direction D of the pressing member3. The slider portion31extends in a direction defined by the +sin(ω) and +cos(ω) directions. The movable contact6thus slides along the slider portion31in the direction defined by the +sin(ω) and +cos(ω) directions relative to the pressing member3and is also pressed by the slider portion31in the +sin(ω) direction to swing. In other words, the ratio of the distance by which the pressing member3moves in the movement direction D and the distance by which the movable contact6moves in the swing direction S is approximate to 1:tan(ω). The distance by which the movable contact6moves in the swing direction S is thus shorter than the distance by which the pressing member3moves in the movement direction D. The movable contact6moving by a shorter distance slides on the second fixed contact5bby a shorter distance, thus reducing the wear of the second fixed contact5b, reducing the likelihood of lower reliability of contact between the movable contact6and the second fixed contact5b. The slider portion31may have a shape other than the shape described above. For example, the slider portion31may have a plane, a curved surface, or an uneven surface. In other words, the slider portion31may have any shape that can cause the distance by which the movable contact6moves in the swing direction S to be shorter than the distance by which the pressing member3moves in the movement direction D. The angle ω between the movement direction D of the pressing member3and the direction in which the slider portion31is oblique to the movement direction D is not limited to the above example, and may vary, for example, depending on the distance by which the pressing member3moves. The slider portion31may extend in a direction other than the direction described above. The slider portion31may extend in, for example, a diagonal direction defined by the +X and +Z directions or by the Y and Z directions. In a first embodiment or embodiments described above, the slider portion31has the first inclined surface310and the second inclined surface311extending in the directions that are oblique at different angles to the movement direction D of the pressing member3. Thus, when the pressing member3moves from the reference position to the pressed position, the slider portion31slides along the movable contact6first with its first inclined surface310and then with its second inclined surface311. The first inclined surface310is inclined at the angle θ with the movement direction D of the pressing member3. The second inclined surface311is inclined at the angle φ with the movement direction D of the pressing member3. The movable contact6thus moves in the swing direction S by different distances on the first inclined surface310and the second inclined surface311. As described above, the slider portion31has the multiple inclined surfaces (the first inclined surface310and the second inclined surface311) extending in the directions that are oblique at different angles to the movement direction D of the pressing member3. The simple structure allows the distance by which the movable contact6moves in the swing direction S to be changeable depending on the distance by which the pressing member3moves. In a first embodiment or embodiments, the pressing member3has its portion sliding along the movable contact6along the second inclined surface311of the slider portion31when the movable contact6comes in contact with the second fixed contact5b. As described above, the first inclined surface310extends in the direction oblique at the angle θ to the movement direction D of the pressing member3. The second inclined surface311extends in the direction oblique at the angle φ smaller than the angle θ to the movement direction D of the pressing member3. The above ratio of the distance by which the pressing member3moves in the movement direction D and the distance by which the movable contact6moves in the swing direction S may be applied. Accordingly, the ratio of the distance by which the movable contact6moves in the swing direction S when the movable contact6is in contact with the second fixed contact5band the distance by which the movable contact6moves in the swing direction S when the movable contact6is not in contact with any of the fixed contacts5is approximate to tan((φ):tan(θ). The distance by which the movable contact6moves in the swing direction S when the movable contact6is in contact with the second fixed contact5bis thus shorter than the distance by which the movable contact6moves in the swing direction S when the movable contact6is not in contact with any of the fixed contacts5, causing the movable contact6, which has come in contact with the second fixed contact5b, to slide on the second fixed contact5bby a shorter distance, thus reducing the wear of the second fixed contact5b. Accordingly, the likelihood of lower reliability of contact between the movable contact6and the second fixed contact5bis reduced. In a first embodiment or embodiments described above, the movable contact6slides on the second fixed contact5bby a shorter distance, thus allowing downsizing of the switch device1A. In a first embodiment or embodiments described above, the movable contact6includes the arm60electrically connected to the first fixed contact5athat is one of the multiple fixed contacts5(5a,5b). The arm60is pressed by the slider portion31in the pressing member3sliding along the movable contact6, causing the movable contact6to swing and come in contact with and separate from the second fixed contact5bthat is the other fixed contact. The movable contact6includes the arm60. The simple structure allows the movable contact6to be swingable. The movable contact6is swingable by the slider portion31in the pressing member3sliding along the arm60. The simple structure allows connection and disconnection between the first fixed contact5aand the second fixed contact5b. The contact target51in the second fixed contact5bwith which the movable contact6comes in contact may be coated with, for example, plating for corrosion resistance. In a first embodiment or embodiments described above, the movable contact6slides on the second fixed contact5bby a shorter distance, which reduces the plated area of the second fixed contact5b, thus reducing the production costs. As described above, the switch device1A according to a first embodiment or embodiments may be a normally open (NO) switch. Second Embodiment A switch device1B according to a second embodiment will now be described focusing on its differences from a first embodiment or embodiments described above. FIG.8is a transparent perspective view of the switch device1B according to a second embodiment or embodiments, showing its example internal structure.FIG.9is a plan view of the switch device1B inFIG.8viewed from above, showing the internal structure. A contact point61(610,611) in a second embodiment or embodiments is in contact with a contact target51in a second fixed contact5bwhen an arm60is under no load. A specific example of a movable contact6in a second embodiment or embodiments connecting and disconnecting between a first fixed contact5aand the second fixed contact5bwill now be described with reference toFIG.9. The movable contact6in a second embodiment or embodiments described above swings in the +S direction upon receiving a pressing force on the arm60in the −X direction. The movable contact6swinging in the +S direction causes the contact point61in the movable contact6, which has been in contact with the second fixed contact5b, to separate from the second fixed contact5b. The movable contact6electrically connected to the first fixed contact5aseparating from the second fixed contact5binsulates the first fixed contact5aand the second fixed contact5bfrom each other. The movable contact6swings in the −S direction to return to its natural state upon being released from the pressing force in the −X direction to be under no load. The movable contact6swinging in the −S direction causes the contact point61in the movable contact6, which has been away from the second fixed contact5b, to come in contact with the second fixed contact5b. The movable contact6electrically connected to the first fixed contact5acoming in contact with the second fixed contact5belectrically connects the first fixed contact5aand the second fixed contact5b. Accordingly, the movable contact6connects and disconnects between the first fixed contact5aand the second fixed contact5b. The operation of the switch device1B according to a second embodiment or embodiments will now be described. FIG.10is a schematic side view and a schematic plan view of a portion including the first fixed contact5aand the second fixed contact5bin a second embodiment or embodiments electrically connected with each other.FIG.11is a schematic side view and a schematic plan view of the portion including the first fixed contact5aand the second fixed contact5bin a second embodiment or embodiments insulated from each other. As shown inFIG.10, when a pressing member3is at the reference position, the movable contact6is under no load, with the contact point61in the movable contact6in contact with the contact target51in the second fixed contact5b. The first fixed contact5aand the second fixed contact5bare thus electrically connected with each other. The pressing member3moves to the pressed position in the +D direction upon receiving an external pressing force as shown inFIG.11. As the pressing member3moves to the pressed position, a slider portion31slides along the arm60in the movable contact6. The movable contact6is pressed by the slider portion31in the −X direction to swing in the +S direction as the pressing member3slides along the movable contact6. The movable contact6swinging in the +S direction causes the contact point61in the movable contact6, which is electrically connected to the first fixed contact5a, to separate from the second fixed contact5b. The first fixed contact5aand the second fixed contact5bare thus insulated from each other. The pressing member3moves in the −D direction under the urging force from the urging member4to return to the reference position as shown inFIG.10upon being released from the external pressing force. The pressing member3has its portion stopping sliding along the movable contact6, and the movable contact6is released from the pressing force in the −X direction from the slider portion31to swing in the −S direction. The movable contact6swinging in the −S direction causes the contact point61in the movable contact6to come in contact with the contact target51in the second fixed contact5b. The first fixed contact5aand the second fixed contact5bare thus electrically connected with each other again. As described above, the switch device1B according to a second embodiment or embodiments may be a normally closed (NC) switch. Third Embodiment A switch device1C according to a third embodiment will now be described focusing on its differences from the above first embodiment. FIG.12is a transparent perspective view of the switch device1C according to a third embodiment or embodiments, showing its example internal structure.FIG.13is a side view of the switch device1C inFIG.12viewed from the left, showing the internal structure.FIG.14is a plan view of the switch device1C in FIG.12viewed from above, showing the internal structure. The switch device1C according to a third embodiment or embodiments includes a housing2, a pressing member3, an urging member4, fixed contacts5(5a,5b), and a pair of movable contacts6aand6bfacing each other (refer toFIG.12). The pressing member3in a third embodiment or embodiments includes slider portions for the respective movable contacts6aand6b. More specifically, the pressing member3includes a slider portion31aslidable along the movable contact6aand a slider portion31bslidable along the movable contact6b(refer toFIG.13). The slider portion31ais included in the inner side surface of a leg33a, which extends downward from the button30along the front inner surface of the housing2, and extends in the diagonal direction defined by the −X and +Z directions. The slider portion31bis included in the inner side surface of a leg33b, which extends downward from the button30along the rear inner surface of the housing2, and extends in the diagonal direction defined by the +X and +Z directions (refer toFIG.13). A specific example of the pressing member3in a third embodiment or embodiments having the slider portion31asliding along the movable contact6aand the slider portion31bsliding along the movable contact6bwill now be described with reference toFIG.13. The slider portion31ain the pressing member3comes in contact with the movable contact6ain the +D direction and slides along the movable contact6aas the pressing member3moves from the reference position to the pressed position in the +D direction. The movable contact6aslides along the slider portion31ain the diagonal direction defined by the −X and +Z directions relative to the pressing member3. Similarly, the slider portion31bcomes in contact with the movable contact6bin the +D direction and slides along the movable contact6b. The movable contact6bslides along the slider portion31bin the diagonal direction defined by the +X and +Z directions relative to the pressing member3. The first fixed contact5ain a third embodiment or embodiments includes, on its upper end, a contact target51awith which the movable contact6bcomes in contact. The second fixed contact5bin a third embodiment or embodiments includes, on its upper end, a contact target51bwith which the movable contact6acomes in contact (refer toFIGS.12and14). In a third embodiment or embodiments, the movable contact6ais electrically connected to the first fixed contact5a, and the movable contact6bis electrically connected to the second fixed contact5b. The movable contacts6aand6bcome in contact with or separate from the first and second fixed contacts5aand5bto connect and disconnect between the first fixed contact5aand the second fixed contact5b. The movable contact6ain a third embodiment or embodiments includes an arm60aand a contact point61a. The movable contact6bincludes an arm60band a contact point61b(refer toFIGS.12and14). The arm60ain the movable contact6ahas a right end (in the +Y direction) electrically connected to the first fixed contact5a. The arm60bin the movable contact6bhas a left end (in the −Y direction) electrically connected to the second fixed contact5b(refer toFIGS.12and14). The movable contact6ais swingable in a swing direction S1 (+S1/−S1) parallel to the front-rear direction (X direction) with a right corner65a(in the +Y direction) of the square U-shape of the arm60aas a basal end (refer toFIG.14). Similarly, the movable contact6bis swingable in a swing direction S2 (+S2/−S2) parallel to the front-rear direction (X direction) with a left corner65b(in the −Y direction) of the square U-shape of the arm60bas a basal end (refer toFIG.14). The contact point61ais away from the second fixed contact5bwhen the arm60ais under no load. Similarly, the contact point61bis away from the first fixed contact5awhen the arm60bis under no load. A specific example of the movable contacts6aand6bin a third embodiment or embodiments connecting and disconnecting between the first fixed contact5aand the second fixed contact5bwill now be described with reference toFIG.14. The movable contact6ain a third embodiment or embodiments described above swings in the +S1 direction with the corner65aas a basal end upon receiving a pressing force on the arm60ain the −X direction. Similarly, the movable contact6bswings in the +S2 direction with the corner65bas a basal end upon receiving a pressing force on the arm60bin the +X direction. The movable contact6aswinging in the +S1 direction causes the contact point61ain the movable contact6a, which has been away from the second fixed contact5b, to come in contact with the contact target51bin the second fixed contact5b, whereas the movable contact6bswinging in the +S2 direction causes the contact point61bin the movable contact6b, which has been away from the first fixed contact5a, to come in contact with the contact target51ain the first fixed contact5a. The first fixed contact5aand the second fixed contact5bcome in contact with each other. The first fixed contact5aand the second fixed contact5bare thus electrically connected with each other. The movable contact6aswings in the −S1 direction to return to its natural state upon being released from the pressing force in the −X direction to be under no load. Similarly, the movable contact6bswings in the −S2 direction to return to its natural state upon being released from the pressing force in the +X direction to be under no load. The movable contact6aswinging in the −S1 direction causes the contact point61ain the movable contact6a, which has been in contact with the second fixed contact5b, to separate from the second fixed contact5b. The movable contact6bswinging in the −S2 direction causes the contact point61bin the movable contact6b, which has been in contact with the first fixed contact5a, to separate from the first fixed contact5a. The first fixed contact5aand the second fixed contact5bseparate from each other. The first fixed contact5aand the second fixed contact5bare thus insulated from each other. Accordingly, the movable contact6connects and disconnects between the first fixed contact5aand the second fixed contact5b. As described above, the switch device1C including the multiple movable contacts (the movable contact6aand the movable contact6b) allows electrical connection between the first fixed contact5aand the second fixed contact5bwith the movable contact6bwhen, for example, the movable contact6aoxidizes and fails to electrically connect between the first fixed contact5aand the second fixed contact5b. Thus, the use of multiple movable contact increases the reliability of contact between the first fixed contact5aand the second fixed contact5b. The operation of the switch device1C according to a third embodiment or embodiments will now be described. FIG.15is a schematic side view and a schematic plan view of a portion including the first fixed contact5aand the second fixed contact5bin a third embodiment or embodiments insulated from each other.FIG.16is a schematic side view and a schematic plan view of the portion including the first fixed contact5aand the second fixed contact5bin a third embodiment or embodiments electrically connected with each other. As shown inFIG.15, when the pressing member3is at the reference position, the movable contacts6aand6bare both under no load, with the movable contacts6aand6baway from each other. The first fixed contact5aand the second fixed contact5bare thus insulated from each other. The pressing member3is guided along a guide groove201on the housing2to move to the pressed position in the +D direction upon receiving an external pressing force as shown inFIG.16. As the pressing member3moves to the pressed position, the slider portion31aslides along the rear (in the +X direction) of the arm60ain the movable contact6aand the slider portion31bslides along the front (in the −X direction) of the arm60bin the movable contact6b. When the pressing member3has its portion sliding along the arm60ain the movable contact6a, the arm60aslides in the diagonal direction defined by the −X and +Z directions relative to the pressing member3and is also pressed by the slider portion31ain the −X direction. The movable contact6aswings in the +S1 direction under the pressing force in the −X direction from the slider portion31a. Similarly, when the pressing member3has its portion sliding along the arm60bin the movable contact6b, the arm60bslides in the diagonal direction defined by the +X and +Z directions relative to the pressing member3and is also pressed by the slider portion31bin the +X direction. The movable contact6bswings in the +S2 direction under the pressing force in the +X direction from the slider portion31b. The movable contact6aswinging in the +S1 direction causes the contact point61ain the movable contact6ato come in contact with the contact target51bin the second fixed contact5b, whereas the movable contact6bswinging in the +S2 direction causes the contact point61bin the movable contact6bto come in contact with the contact target51ain the first fixed contact5a. In other words, the first fixed contact5aand the second fixed contact5bcome in contact with each other to be electrically connected with each other. The pressing member3moves in the −D direction under the urging force from the urging member4to return to the reference position as shown inFIG.15upon being released from the external pressing force. The pressing member3has its portion stopping sliding along the movable contact6, and the movable contact6ais released from the pressing force in the −X direction from the slider portion31ato swing in the −S1 direction. Similarly, the movable contact6bis released from the pressing force in the +X direction from the slider portion31bto swing in the −S2 direction. The movable contact6aswinging in the −S1 direction and the movable contact6bswinging in the −S2 direction cause the first fixed contact5aand the second fixed contact5bto separate from each other. The first fixed contact5aand the second fixed contact5bare thus insulated from each other again. In a third embodiment or embodiments described above, the pressing member3including the slider portions for the respective movable contacts (the movable contacts6aand6b) can cause the multiple movable contacts (the movable contacts6aand6b) to swing independently. Accordingly, the design flexibility of the switch device1C can be increased. As described above, the switch device1C includes the pair of movable contacts6aand6b, and the pressing member3includes a pair of slider portions31aand31b. Accordingly, as the pressing member3moves from the reference position to the pressed position, the pair of slider portions31aand31bare each allowed to slide along the respective movable contacts6aand6bin a well-balanced manner, thus increasing the stability in pressing the pressing member3. As described above, the switch device1C according to a third embodiment or embodiments may be a NO switch. Fourth Embodiment A switch device according to a fourth embodiment will now be described focusing on its differences from the above first embodiment. FIG.17is a schematic plan view of a portion including a first fixed contact5aand a second fixed contact5bin a fourth embodiment electrically connected with each other.FIG.18is a schematic plan view of the portion including the first fixed contact5aand a third fixed contact5cin a fourth embodiment or embodiments electrically connected with each other. The fixed contact5in a fourth embodiment or embodiments includes the first fixed contact5a, the second fixed contact5b, and a third fixed contact5c(refer toFIGS.17and18). The second fixed contact5bincludes a contact target51blocated on the left (in the −Y direction) in a housing body20. The third fixed contact5cincludes a contact target51cin front of the contact target51b(in the −X direction) in the second fixed contact5b(refer toFIGS.17and18). A movable contact6in a fourth embodiment or embodiments is electrically connected to the first fixed contact5a. The movable contact6comes in contact with and separates from the second fixed contact5band the third fixed contact5cto connect and disconnect between the second fixed contact5band the third fixed contact5c. A contact point61in a fourth embodiment or embodiments is in contact with the second fixed contact5bwhen an arm60is under no load. A specific example of the movable contact6in a fourth embodiment or embodiments connecting and disconnecting between the second fixed contact5band the third fixed contact5cwill now be described with reference toFIGS.17and18. The movable contact6in a fourth embodiment or embodiments described above swings in the +S direction upon receiving a pressing force on the arm60in the −X direction. The movable contact6swinging in the +S direction causes the contact point61in the movable contact6, which has been in contact with the second fixed contact5b, to separate from the second fixed contact5band come in contact with the contact target51cin the third fixed contact5c(refer toFIG.18). The movable contact6electrically connected to the first fixed contact5aseparating from the second fixed contact5band coming in contact with the third fixed contact5cinsulates the first fixed contact5aand the second fixed contact5band also electrically connects the first fixed contact5aand the third fixed contact5c. The movable contact6swings in the −S direction to return to its natural state upon being released from the pressing force in the −X direction to be under no load. The movable contact6swinging in the −S direction causes the contact point61in the movable contact6, which has been in contact with the third fixed contact5c, to separate from the third fixed contact5band come in contact with the contact target51bin the second fixed contact5b(refer toFIG.17). The movable contact6electrically connected to the first fixed contact5aseparating from the third fixed contact5cand coming in contact with the second fixed contact5belectrically connects the first fixed contact5aand the second fixed contact5band also insulates the first fixed contact5aand the third fixed contact5c. Accordingly, the movable contact6connects and disconnects between the first fixed contact5aand the second fixed contact5b. As described above, the switch device according to a fourth embodiment or embodiments may be a double throw switch. In the first to fourth embodiments described above, a single-pole switch is described as an example of the switch device. However, the switch device according to the embodiments of the present disclosure may be a multi-pole switch. The embodiments and examples described above are mere examples in all respects and should not be construed to be restrictive. The technical scope is not construed by the embodiments and examples described above and is defined by the claims. All changes that come within the meaning and range of equivalency of the claims fall within the claims. | 44,042 |
11942285 | DETAILED DESCRIPTION Reference will now be made in detail to representative embodiments illustrated in the accompanying drawings. It should be understood that the following descriptions are not intended to limit the embodiments to one preferred embodiment. To the contrary, it is intended to cover alternatives, modifications, and equivalents as can be included within the spirit and scope of the described embodiments as defined by the appended claims. The following disclosure relates generally to input devices for electronic devices, and more particularly to keyboard assemblies having reduced thicknesses. In a keyboard assembly, a switch membrane can be used that provides electrical connectivity between the key switches and a keyboard controller. The membrane can therefore have conductive traces and connectors that engage and disengage when a keycap is pressed by the user. In some of these membranes, multiple layers of conductive materials are used. When a keycap is pressed, a conductive part of one layer is pressed into contact with another conductive part on another layer, thereby making an electrical connection that is detected by the controller. When the key is released, the conductors break their connection, and the controller detects that break. A sufficient downward force must be applied to the membrane in order to deflect the layers into contact. Over time, the reliability of making the electrical connection can diminish. Keyboard membranes are susceptible to chemicals and liquids that degrade the glue holding the layers together. Moisture can get into the membrane via air venting channels and can corrode silver or other metallic conductors in the membrane. Embodiments of the present disclosure can help alleviate these issues and can thereby extend the life of a keyboard membrane while also reducing its thickness and adding new sensing capabilities to each key switch. One aspect of the disclosure relates to using a printable polymer piezoresistive material to create a half-bridge strain gauge arrangement that can detect key make and break events. Each key assembly can have a half Wheatstone bridge strain gauge arrangement sitting under the key. The half-bridge can include a set of piezoresistive material strips, with a first portion of the strips having an equal resistance to a second portion thereof. The first portion can be split into two piezoresistive strain gauges that are symmetrically placed on the sides of a single, other piezoresistive strain gauge in the half bridge. When a collapsible dome is collapsed by the user (e.g., by a key press), the dome can come into contact with a piezoresistor of the half-bridge (e.g., the second portion of the strips) and can affect the strain of this piezoresistor in a manner sufficient to detect the amount of force applied to the keycap. The force can be detected as a voltage as measured in the half bridge, wherein the voltage can indicate whether the keycap has been pressed or not. Sufficient force applied to the keycap can be detected as a key “make” event as the resistance of the central piezoresistor changes relative to the collective resistance of peripheral piezoresistors beyond a threshold value, and insufficient force can be detected as a key “break” event, wherein the central resistance is not sufficiently different from the combined resistance of the peripheral piezoresistors. In this manner, conductive material does not need to move between contacting or non-contacting positions in order to detect key make or break. No air venting is needed, so the membrane can be completely sealed against debris, condensation, spills, and other problematic intrusive materials, thereby extending its lifespan and reliability. Furthermore, because conductors do not need to move relative to the membrane on which they are located, and because the strain gauges and half bridges can be positioned in substantially a single layer, the overall thickness of the membrane can be substantially reduced. The overall keyboard or other electronic device implementing the membrane can therefore have reduced thickness and weight. Additionally, the keyboard can have a touch or force sensitivity based on the strain and detected voltage from a half-bridge. The keyboard can therefore have a customizable voltage threshold at which the controller can detect a “make” state (i.e., a state that indicates the key is activated by a user) instead of a “break” state (i.e., a state that indicates the key is not activated). Users with a heavier touch can set their keyboard with a higher required force/voltage/resistance difference threshold, and users with a lighter touch can have a lower threshold. Additionally, varying degrees of input force can be detected, wherein the magnitude or relative magnitude of the input force can be transduced due to being related to the amount of voltage produced by the strain gauges upon key press. Embodiments of a strain-sensing switch can have binary operation, wherein the system is configured to discretely detect “on” or “make” versus “off” or “break” states based on the force applied to a key. Alternatively, some embodiments can have trinary (or non-binary) operation, wherein the system detects an “off” or “break” state versus two (or more) different “on” or “make” states. Each of the “make” states can correspond to different amounts of force applied to the key (i.e., a harder press versus a lighter press) or patterns or characteristics of two different forces applied to the keys (i.e., a long press versus a short press, or a high frequency series of taps versus a single tap), and a controller receiving the signals from the key can differently operate based on which kind of “make” state is detected. Furthermore, some embodiments can have analog or continuous operation, wherein a large (even infinite) set of “make” states can be detected when forces are applied to the key above a certain minimum threshold force. Continuous changes to the force applied to a key can cause continuous change in the operation of the keyboard controller (e.g., a connected electronic device), such as by continuously changing a graphic displayed in response to the key press (e.g., changing its opacity, size, or animation on the display). These and other embodiments are discussed below with reference to the figures. However, those skilled in the art will readily appreciate that the detailed description given herein with respect to these figures is for explanatory purposes only and should not be construed as limiting. FIG.1depicts an electronic device100including a keyboard102. The keyboard102includes keys or key assemblies with keycaps103or button caps that move when depressed by a user. The electronic device100can also include a display screen106, a track pad108or other pointing device, and internal electronic components used in a notebook/laptop computer (e.g., a processor, electronic memory device, electronic data storage device, and other computer components; not shown). The display screen106can be positioned on a portion of the housing104configured to extend upright relative to the keyboard102. The track pad108can be positioned on the housing104adjacent to the keyboard102on a side of the keyboard102opposite the display screen106. Although the electronic device100ofFIG.1is a notebook/laptop computer it will be readily apparent that features and aspects of the present disclosure that are described in connection with the notebook computer can be applied in various other devices. These other devices can include, but are not limited to, personal computers (including, for example, computer “towers,” “all-in-one” computers, computer workstations, and related devices) and related accessories, tablet computers, speakers, graphics tablets and graphical input pens/styluses, watches, headsets, other wearable devices, and related accessories, vehicles and related accessories, network equipment, servers, screens, displays, and monitors, photography and videography equipment and related accessories, printers, scanners, media player devices and related accessories, remotes, headphones, earphones, device chargers, computer mice, trackballs, and touchpads, point-of-sale equipment, cases, mounts, and stands for electronic devices, controllers for games, remote control (RC) vehicles/drones, augmented reality (AR) devices, virtual reality (VR) devices, home automation equipment, and any other electronic device that uses, sends, or receives human input. Thus, the present disclosure provides illustrative and non-limiting examples of the kinds of devices that can implement and apply aspects of the present disclosure. The keyboard102can include a set of assembled components that correspond to each key. The assembly of these components can be referred to as a “stack-up” due to their substantially layered or stacked configuration.FIG.2illustrates an exploded view of a keyboard assembly200that can be implemented as part of an electronic device such as a peripheral keyboard input device or a built-in keyboard (e.g.,102) for a laptop (e.g., device100), tablet computer, portable electronic device, computer accessory, or other computer component. The keyboard assembly200can have a set of keycaps201, with at least one being used in connection with each key or button of the keyboard. One or more switch structures202(e.g., collapsible domes, springs, or other biasing devices) can be positioned underneath the keycaps201. In some cases, the switch structures202can be interconnected as a sheet (e.g., a flexible dome sheet). A membrane204can be positioned below the switch structures202, and a base layer206can be positioned below the membrane204. The base layer206can comprise a set of recesses, openings, or apertures (e.g.,208) aligned with each of the switch structures202. The membrane204can comprise a bottom layer210, a set of strain gauges212positioned on the bottom layer210, a set of conductive traces214(see alsoFIG.4) positioned on the bottom layer210and connecting the set of strain gauges212to an input-output connector or keyboard controller (not shown), and a mask layer216located on top of the strain gauges212and conductive traces214. SeeFIGS.2-4and6-8. The bottom layer210can comprise a flexible or substantially rigid material such as, for example, polyethylene terephthalate (PET). The bottom layer210and mask layer216can comprise transparent or translucent materials to permit light transmission through the membrane204. In some embodiments, a light source (not shown) may be associated with the membrane to provide light to a lower side of the keycap201, illuminating a symbol, indicia or other portion of the keycap201. In some embodiments, the light source may be integrated into the membrane204, positioned above the membrane, or positioned below the membrane with light from the light source passing through the membrane204to the keycap201. FIG.3shows a section view of one of the key assemblies300in the keyboard assembly200. In the key assembly300, the switch structure202comprises a top portion302that is vertically movable relative to a base portion304that is mounted to or in contact with the membrane204. A wall portion306can link the top and base portions302,304in a generally conical or dome-like shape. The top portion302can have an inner, downward-extending protrusion308extending into the hollow internal cavity formed by the top portion302and the wall portion306and that faces the membrane204. Collapsing the switch structure202can drive the protrusion308into contact with the membrane204at a strain gauge400. FIG.4shows a top view of the membrane204on the base layer206below the switch structure202ofFIG.3. In this view, the outer circumference of the switch structure202is shown as a broken line, and the outer circumference of the opening208is shown as a broken line. A set of strain gauges400,402,404are electrically connected to each other in the membrane204and underneath the switch structure202. The strain gauges400,402,404can be piezoresistors or can comprise piezoresistive material such as a carbon-based ink or other material that has low thermal sensitivity (i.e., thermal expansion or contraction). Accordingly, the resistance of the strain gauges can change in response to changes in strain present within the strain gauges400,402,404. FIG.5shows a simplified circuit diagram showing how the strain gauges400,402,404are connected to each other. In this diagram, the strain gauges400,402,404are connected in a half Wheatstone bridge circuit that is provided a drive voltage by a signal generator VDD and is connected to a voltmeter Vo and ground. The voltmeter Vo can be connected between strain gauges400and402. Strain gauges402and404can have equal unstressed resistance, and the sum total unstressed resistance of strain gauges402and404can be equal to the unstressed resistance of strain gauge400. As used herein, the strain gauges are “unstressed” when they are at rest and not being acted upon by the user or by movement of the switch structure202. Accordingly, their “unstressed resistance” refers to their resistance when the keycap103and switch structure202are at a raised, unpressed position. Due to the nature of the half bridge configuration, a change in the resistance of strain gauge400can be detected as a change in voltage as measured by the voltmeter Vo. Additionally, a change in the resistance in all three strain gauges400,402,404can result in little or no change in voltage as measured by the voltmeter Vo when the resistance on each side of the measurement point500changes substantially equally. The signal generated at the voltmeter Vo can be linearly related to the force applied to the strain gauges400,402,404because the applied force linearly changes the strain and resistance in the strain gauges400,402,404. Referring again toFIG.4, the strain gauges400,402,404are positioned underneath and within the circumference of the switch structure202. The central strain gauge400can be vertically aligned with the center of the switch structure202and the opening208of the base layer206. The peripheral strain gauges402,404can be positioned on the membrane204radially external to and non-overlapping with the opening208while still being underneath the switch structure202. The peripheral strain gauges402,404can also be symmetrically spaced apart from the central strain gauge400. In this manner, the strain gauges400,402,404are in close proximity to each other in the electronic device and within the keyboard102. They can therefore have an approximately equal internal temperature, and they are subjected to substantially equal pretension forces (and strain) when the switch structure202is not collapsed and when the protrusion308or top portion302are not in contact with the membrane204. Additionally, they are not separated from each other by long distances or by long lengths of conductive traces214. For this reason, the voltage measurement at the voltmeter408can be about zero when a keycap103is not operated because the resistance of the central strain gauge400is equal to the total resistance of the peripheral strain gauges402,404. In some embodiments, an initial voltage measurement can be frequently sensed by the controller (e.g., every few seconds), and the initial voltage can be compared to the driven voltage. Then, whenever the magnitude voltage measurement at the voltmeter408surpasses a threshold minimum value, the controller can determine that a key has been pressed. Therefore, the measured voltage level for an un-pressed key can vary with temperature or other conditions while still allowing the system to determine when the key is pressed. When a keycap103is pressed, the switch structure202can be configured to collapse into contact with the central strain gauge400. Contact with the central strain gauge400can cause it to at least slightly deflect downward with the bottom layer210into the opening208, thereby increasing strain in the central strain gauge400relative to the peripheral strain gauges402,404. The strain in the peripheral strain gauges402,404can also change as the switch structure202collapses, but the greater size and amount of deflection of the central strain gauge400can cause a greater change in its strain as compared to the peripheral strain gauges402,404. The increase in strain in the central strain gauge400can cause its resistance to increase beyond the combined resistance of the peripheral strain gauges402,404even if the combined resistance of the peripheral strain gauges402,404increases to a degree at the same time. Accordingly, a voltage measurement at the voltmeter408can be non-zero when the keycap103is operated. See alsoFIGS.9and10and their related descriptions herein. In some embodiments, the switch structure202can be omitted. In such cases, contact between the bottom of the keycap103and the membrane204can cause the system to detect a key press. The keycap103can be biased away from the membrane204by another elastic component (e.g., a compressible body or spring) that does not contact the strain gauges400,402,404. In some embodiments, a haptic engine (e.g., a piezoelectric motor) can be provided for one or more keys, wherein tactile feedback (e.g., a click or vibration) can be generated at the keycap when the keycap is pressed with sufficient force. Additionally, the magnitude of the voltage at the voltmeter408can be proportional to the amount of force applied to the keycap103. For example, the voltage can be linearly related to the magnitude of the applied force. Accordingly, the keycap103can be pressed until a threshold voltage is measured in the membrane204. When that threshold is reached, the controller (which receives the measurements of the voltmeter408or that operates as the voltmeter408) can register a key “make” state and can therefore determine that the key has been pressed. See alsoFIGS.9and10and their related descriptions herein. In some embodiments, multiple different key “make” states can be output from the controller. For example, different key “make” states can be detected by the controller based on varying magnitudes of the voltage measured by voltmeter408. For example, for a heavier typist pressing on the keycaps103with more force than an average user, the controller can be configured to provide a key “make” when a higher than average voltage is measured by the voltmeter408. In another example, with a lighter typist, the controller can be configured to provide a key “make” when a lower than average voltage is measured. In some embodiments, the user can provide input to the controller to determine the sensitivity of the keyboard to input forces. For example, the user can determine and provide a customized key “make” voltage threshold or force. Additionally, in some embodiments, the controller can be configured to produce multiple different signals in response to multiple different levels of input forces. For instance, pressing a keycap103with a first, low amount of force can cause the controller to provide a first type of signal, and pressing the keycap103with a second, higher amount of force can cause the controller to provide a second type of signal. The first signal can be a normal key “make” signal (e.g., a lowercase or normal letter), and the second signal can be different key “make” signal (e.g., an uppercase or bold letter). Similarly, different signals can cause the keyboard to produce different types of inputs (e.g., letters versus numbers or other symbols) or different degrees of inputs (e.g., causing a game character to walk versus run or causing the volume of the computer to change more quickly in response to higher force input). As shown inFIG.6, the keyboard assembly200can also include a set of keycap stabilizers600(e.g., scissor or butterfly hinge support mechanisms) configured to help the keycaps103remain substantially horizontal and parallel to the base layer206when the keycaps103are pressed down on an edge or corner.FIG.6shows a top view of a membrane204having openings602through which the stabilizers600can extend to attach to the base layer206. For example, brackets604can be positioned on the base layer206and can be pivotally attached to the stabilizers600. Similar connectors can be positioned on the underside of the keycaps103. The openings602can have elongated shapes, wherein they have relatively lengthened dimensions along an axis Y as compared to their dimensions along a perpendicular axis X. A strip606of membrane material can bear the strain gauges400,402,404between the openings602. The strip606can extend over the opening208in the base layer206. The strain gauges400,402,404can be parallel to each other on the strip606and can be parallel to a longitudinal axis of the strip606and parallel to the elongated axes (e.g., axis Y) of the openings602. Accordingly, the strain gauges400,402,404can have parallel primary stress axes, wherein the primary stress axes are defined along the direction primary bending of the strip606when the keycap103is depressed. When the switch structure202collapses, it can produce strain in the strip606(e.g., by elongation in the strip606) that is greater in the direction of the longitudinal axis Y of the strip606than in the direction of the perpendicular axis X. This can be influenced by the presence of the openings602, which allow the edges of the strip606at the openings602to flex inward (i.e., toward the opening208) when the central strain gauge400and which allow the membrane204to flex downward at the opening208. Accordingly, the membrane204can have the strain gauges400,402,404extending parallel to the edges of the strip606(i.e., the edges of the openings602) in order to maximize the amount of elongation at the strain gauges400,402,404and thereby maximize the amount of strain and resistance change in the strain gauges400,402,404when a key is pressed. The alignment of the strain gauges400,402,404with the strip606can therefore make the detection of a key press (or other voltage change) more sensitive since they are aligned with a loading axis of the strip606(that is parallel to the axis Y). The loading axis can be the major axis of bending in the strip606when the switch structure202collapses. As shown inFIGS.4and6, in some embodiments, a set of diodes610,612can be positioned between pairs of the strain gauges400,402,404. The diodes610,612can be used to prevent key ghosting at a controller of the keyboard102by preventing back-feeding of signals and by allowing multiple sets of strain gauges400,402,404(e.g., multiple key assemblies in a column of keys) to be connected to each other by a common conductor that leads to the controller. FIGS.4and6-8also show how portions of the membrane204can comprise an insulator layer700between some segments of the conductive traces214.FIG.7is a diagrammatic side section view of the membrane204as taken through section lines7-7inFIG.6.FIG.8is a diagrammatic side section view of the membrane204as taken through section lines8-8inFIGS.6and7. For example, the insulator layer700can be implemented at crossing junctions702(seeFIGS.4and6) on the membrane204. To construct the membrane204, the strain gauges400,402,404can be applied or attached to the bottom layer210. For example, the strain gauges400,402,404can comprise a piezoresistive material (e.g., a polymer piezoresistive material) that is adhered, jet printed, screen printed, or otherwise affixed to the top surface of the bottom layer210. As shown inFIG.7, strain gauges (e.g.,400) can be attached to the bottom layer210without any intervening components between the bottom layer210and the gauge material. In this manner, the movement and strain in the strain gauges400,402,404can closely match the movement and strain in the bottom layer210. The conductive traces214can also be applied to the bottom layer210. In some embodiments, the traces214comprise a silver or similar conductive material configured to be applied to the bottom layer210using a printing, etching, or related method. The traces214can comprise conductive pads704that are applied over top surfaces of the strain gauges400,402,404(as shown inFIGS.3,4,6, and7) and that are enlarged in width as compared to the linear traces214. Some of the conductive traces214-acan be applied with gaps in linear segments of the traces where insulator layer700will be applied. In some embodiments, the diodes610,612can be printed or otherwise attached or deposited onto the bottom layer210or onto the conductive traces214. In some embodiments, the insulator/insulating layer700can then be applied to the top surfaces of the traces214or conductive pads704that will vertically overlap with a second conductive trace (e.g., trace214-bwhich overlaps trace214-ainFIGS.7and8). The insulator layer700can therefore locally insulate the lower trace214-afrom the upper trace214-bwithout covering, and thereby thickening, the entire surface area of the membrane204. In some configurations, the insulator layer700can extend across the entire top surface of the membrane204except where upper traces214-bneed to connect to the lower traces214-a. After application of the insulator layer700, the upper conductive traces214-bcan be applied to the insulator layer700and can establish an electrical connection between segments of the conductive traces214on each side of the insulator layer700locations. The mask layer216can be applied to the top of all of the lower layers and traces to protect the conductive materials therein from damage and exposure. Accordingly, the conductive traces214, pads704, and strain gauges400,402,404can all be sealed within the membrane204. In some embodiments, the membrane204can be fluid-tight and can therefore prevent any contact between the conductive elements of the membrane204and any liquid or other debris that falls into the keyboard102. Therefore, the membrane204can have improved durability and protection against electrical shorting and related problems. The mask layer216can comprise a material similar to the bottom layer210. Where no insulator layers700are located, the overall thickness of the membrane204can be within a range of about 70-200 microns, about 80-100 microns, or about 91 microns. With an insulator layer700and conductive trace214-b, the overall thickness of the membrane204can be within a range of about 100-200 microns, about 110-160 microns, or about 131 microns. Accordingly, the overall thickness of the membrane204can be substantially smaller than the overall thickness of multi-layer membranes wherein internal conductors have to bend or translate into contact with each other across an air gap. For this reason, membranes of the present disclosure can beneficially be used in smaller, thinner devices since less space is needed the stack-up of such devices for the keyboard. The process used to apply the conductive pads704to the strain gauges400,402,404can be a high-precision process. The length of the strain gauges400,402,404between the conductive pads704can define the default or unstressed resistance of the gauges. Accordingly, for gauges with equal thickness and width, the pads704can be applied symmetrically on the peripheral gauges402,404and in a manner ensuring that each peripheral gauge has equal length between the pads704. This ensures that each of the peripheral gauges402,404have the same resistance and have the same change in resistance when the switch structure202moves and collapses. The peripheral gauges402,404thereby also help compensate for temperature changes at the membrane204due to being equal in resistance and size and due to being nearby each other while being in series with each other and with the central strain gauge400. If the central strain gauge400has the same width and thickness as the peripheral gauges402,404, the pads704for the central gauge400can be spaced apart along twice the length along the central gauge400as compared to the length between the pads704on the peripheral gauges402,404. FIGS.9and10are plots of the input force and measured voltage response over time during a key press.FIG.9shows data for a press of a user instrument at the center of a keycap103(i.e., the key is pressed directly over a switch structure202), andFIG.10shows a set of data for a set of multiple different presses of the user instrument at the edges and corners of the keycap103. As shown inFIG.9, at time zero, the keycap103, switch structure202, and membrane204are at rest. There is no applied force, and there is no significant output voltage since there is an equal ratio of the resistance of the central strain gauge400to the resistance of the peripheral strain gauges402,404. The system can therefore be calibrated under this condition in a manner setting the output voltage to about zero. At about 400 milliseconds, a key press begins, as indicated by the rise in the applied force. The output voltage also begins to increase due to the deformation of the switch structure202attached above the strain gauges400,402,404. However, the output voltage does not change dramatically and stays below the key make threshold voltage because the switch structure202imparts approximately equal strain to each of the strain gauges400,402,404as the membrane204reacts to the deformation of the switch structure202. When the input force reaches a mid-stroke peak (i.e., a tactile peak force) at about 600 milliseconds, the switch structure202begins to collapse from its first, raised, stable position to its second, depressed, stable position, thereby reducing the force required to continue moving the keycap103downward. At about 950 milliseconds, the switch structure202comes into contact with the central strain gauge400. At that point, the output voltage changes significantly due to the central strain gauge400being under significantly more strain than the peripheral strain gauges402,404. The output voltage therefore exceeds the key make threshold voltage for the first time. At this point, the force input also increases dramatically because the user instrument and keycap103are now compressing the switch structure202against the membrane204while the switch structure202and membrane204are in contact with each other. At about 1300 milliseconds, the force on the keycap103is reduced, and the switch structure202begins to rebound and bias the keycap103upward, transitioning from its stable collapsed state (i.e., the second stable position) to its stable uncollapsed state (i.e., the first stable position). Accordingly, the switch structure202can be a bistable structure but can also be configured to resiliently rebound from the stable collapsed state to the stable uncollapsed state. When the switch structure202moves out of contact with the central strain gauge400, the output voltage drops below the key make threshold voltage again, and the controller receiving the output voltage measurement therefore can determine that the key is no longer being pressed. Notably, the output voltage can change while the switch structure202is in contact with the central strain gauge400. For this reason, the output voltage can be used as a control signal for distinguishing between a range of possible inputs such as, for example, a light key press, a heavy key press, a key press with increasing force, a key press with decreasing force, a key press under wavering force, related inputs, and combinations thereof. The keyboard can therefore be advantageously used to receive variable types of input from a single keycap rather than only receiving a key “make” or “break” signal. Additionally, in some embodiments, the key make threshold voltage can be user-controlled or system-controlled in a manner that enables the threshold voltage to be higher or lower under different conditions. For instance, a lighter typist can choose a lower threshold, and a heavier typist can choose a higher threshold. In some cases, each key can be individually configured with different threshold voltages and, therefore, different threshold key press weights. The system can be configured to learn a user's typing characteristics, such as by detecting lighter (or heavier) user input on the keys, and can then automatically decrease (or increase) the key make threshold to adapt to the user's characteristics. For instance, the keyboard controller or a connected electronic device can receive force measurements based on the user input to the keyboard. The force measurements can be analyzed for behavior indicative of user errors based on application of force that is too light or too heavy for the keyboard in its current configuration. For example, the user errors can include detecting a set of key presses that are indicative of a failure to apply enough force to actuate a “make” state (e.g., a set of presses that is too light to exceed the minimum force threshold followed by a set of similar key presses that is heavier or detecting a set of key presses that are repeated after a minimum force threshold fails to be exceeded) or detecting a set of key presses that are indicative of an inadvertent key press (e.g., a light key press is usually followed by a backspace key press, but heavier key presses are not). The controller can then compensate for these errors by increasing or decreasing the key make threshold to reduce the number of inadvertent key presses or to register intentional key presses that seem to be going unregistered due to lack of input force. This can make the keyboard more comfortable for the user since a user with a lighter touch does not need to press harder than desired, and a user with a heavier touch can have fewer unintentional key presses registered. As shown inFIG.10, when an input force is applied to the edges and corners of a keycap103, the voltage output response can be similar to the output when the keycap is centrally pressed. In other words, at about 1000 milliseconds, the output voltage can exceed the key make threshold voltage, and that is after the switch structure202has collapsed into contact with the membrane204. Similarly, releasing the force on the keycap103allows the switch structure202to rebound and leads to the output voltage falling below the key make threshold voltage again. Accordingly, although in some traditional keyboards a key press cannot be detected when applied at a corner or peripheral edge of the keycap, the sensitivity of the membrane204of the present disclosure is sufficient to detect a key press at any location on top of the keycap103. Thus, the need for a key stabilizer (e.g.,600) in addition to the switch structure202is reduced or eliminated as compared to a traditional keycap with a collapsible dome that causes deflection of conductive material into contact with other conductive material. Additionally, the minimum thickness and rigidity of the keycap103can be reduced. To the extent applicable to the present technology, gathering and use of data available from various sources can be used to improve the delivery to users of invitational content or any other content that may be of interest to them. The present disclosure contemplates that in some instances, this gathered data may include personal information data that uniquely identifies or can be used to contact or locate a specific person. Such personal information data can include demographic data, location-based data, telephone numbers, email addresses, TWITTER® ID's, home addresses, data or records relating to a user's health or level of fitness (e.g., vital signs measurements, medication information, exercise information), date of birth, or any other identifying or personal information. The present disclosure recognizes that the use of such personal information data, in the present technology, can be used to the benefit of users. For example, the personal information data can be used to deliver targeted content that is of greater interest to the user. Accordingly, use of such personal information data enables users to calculated control of the delivered content. Further, other uses for personal information data that benefit the user are also contemplated by the present disclosure. For instance, health and fitness data may be used to provide insights into a user's general wellness, or may be used as positive feedback to individuals using technology to pursue wellness goals. The present disclosure contemplates that the entities responsible for the collection, analysis, disclosure, transfer, storage, or other use of such personal information data will comply with well-established privacy policies and/or privacy practices. In particular, such entities should implement and consistently use privacy policies and practices that are generally recognized as meeting or exceeding industry or governmental requirements for maintaining personal information data private and secure. Such policies should be easily accessible by users, and should be updated as the collection and/or use of data changes. Personal information from users should be collected for legitimate and reasonable uses of the entity and not shared or sold outside of those legitimate uses. Further, such collection/sharing should occur after receiving the informed consent of the users. Additionally, such entities should consider taking any needed steps for safeguarding and securing access to such personal information data and ensuring that others with access to the personal information data adhere to their privacy policies and procedures. Further, such entities can subject themselves to evaluation by third parties to certify their adherence to widely accepted privacy policies and practices. In addition, policies and practices should be adapted for the particular types of personal information data being collected and/or accessed and adapted to applicable laws and standards, including jurisdiction-specific considerations. For instance, in the US, collection of or access to certain health data may be governed by federal and/or state laws, such as the Health Insurance Portability and Accountability Act (HIPAA); whereas health data in other countries may be subject to other regulations and policies and should be handled accordingly. Hence different privacy practices should be maintained for different personal data types in each country. Despite the foregoing, the present disclosure also contemplates embodiments in which users selectively block the use of, or access to, personal information data. That is, the present disclosure contemplates that hardware and/or software elements can be provided to prevent or block access to such personal information data. For example, in the case of advertisement delivery services, the present technology can be configured to allow users to select to “opt in” or “opt out” of participation in the collection of personal information data during registration for services or anytime thereafter. In another example, users can select not to provide mood-associated data for targeted content delivery services. In yet another example, users can select to limit the length of time mood-associated data is maintained or entirely prohibit the development of a baseline mood profile. In addition to providing “opt in” and “opt out” options, the present disclosure contemplates providing notifications relating to the access or use of personal information. For instance, a user may be notified upon downloading an app that their personal information data will be accessed and then reminded again just before personal information data is accessed by the app. Moreover, it is the intent of the present disclosure that personal information data should be managed and handled in a way to minimize risks of unintentional or unauthorized access or use. Risk can be minimized by limiting the collection of data and deleting data once it is no longer needed. In addition, and when applicable, including in certain health related applications, data de-identification can be used to protect a user's privacy. De-identification may be facilitated, when appropriate, by removing specific identifiers (e.g., date of birth, etc.), controlling the amount or specificity of data stored (e.g., collecting location data a city level rather than at an address level), controlling how data is stored (e.g., aggregating data across users), and/or other methods. Therefore, although the present disclosure broadly covers use of personal information data to implement one or more various disclosed embodiments, the present disclosure also contemplates that the various embodiments can also be implemented without the need for accessing such personal information data. That is, the various embodiments of the present technology are not rendered inoperable due to the lack of all or a portion of such personal information data. For example, content can be selected and delivered to users by inferring preferences based on non-personal information data or a bare minimum amount of personal information, such as the content being requested by the device associated with a user, other non-personal information available to the content delivery services, or publicly available information. The foregoing description, for purposes of explanation, used specific nomenclature to provide a thorough understanding of the described embodiments. However, it will be apparent to one skilled in the art that the specific details are not required in order to practice the described embodiments. Thus, the foregoing descriptions of the specific embodiments described herein are presented for purposes of illustration and description. They are not target to be exhaustive or to limit the embodiments to the precise forms disclosed. It will be apparent to one of ordinary skill in the art that many modifications and variations are possible in view of the above teachings. | 41,852 |
11942286 | DETAILED DESCRIPTION The following detailed description refers to the accompanying drawings. The drawings show, by way of illustration, specific examples in which the claimed subject matter may be practiced. It should be understood that the following specific examples are intended to specifically describe typical examples for the purpose of explanation, but should not be construed as the limiting of the present disclosure; those skilled in the art, under the premise of fully understanding the spirit of the present disclosure, can make appropriate modifications and adjustments to the disclosed examples without departing from the spirit and scope of the claimed subject matter. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the various described examples. However, it will be apparent to one of ordinary skill in the art that the various described examples may be practiced without these specific details. Unless otherwise defined, technical and scientific terms used herein shall have the same meaning as commonly understood by one of ordinary skill in the art. The terms “first”, “second”, etc. in the description and claims of the present application do not imply any order, quantity, or importance, but are only used to distinguish different components. An example is an exemplary implementation or example. References in the specification to “an example”, “one example”, “some examples”, “various examples” or “other examples” mean that a particular feature, configuration, or characteristic described in connection with the examples is included herein at least some, but not necessarily all, examples of the technology. The various appearances of “an example”, “one example” or “some examples” are not necessarily all referring to the same examples. Elements or aspects from one example may be combined with elements or aspects from another example. FIG.1is an exploded view of a rotary knob switch100according to one example of the present disclosure.FIGS.2A-2Cshow an exploded view of a partially assembled rotary knob switch200and detail views of a portion of the components according to one example of the present disclosure. In combination withFIG.1andFIGS.2A-2C, the rotary knob switch100may include a knob head101. In one example, the knob head101may include one or more of: a surface cover102; an indicator block103, which can be assembled with the surface cover102and includes a light guide reflective structure therein, wherein the light emitted from the top and side of the indicator block103(for example, the directions of the light shown by the arrows inFIG.3D) is used to indicate that the rotary knob switch200has light, a light guide column105is provided at the lower part of the indicator block103, in a non-limiting example, the light guide column105can be integrally formed with the indicator block103, and in another non-limiting example, the light guide column105is a separate part that can be removed from the indicator block103; O-ring104of the indicator block, which is sleeved over the light guide column105for waterproofing; a knob handle106, which is mated with the surface cover102and the indicator block103to form a complete knob head101. As shown inFIG.2A, the bottom of the entire knob head101may have a protrusion shape1044, which in one example may be substantially semi-cylindrical, or may be other shapes. The protrusion shape1044can be inserted into a groove1168inside the cam116as described below to be used to confirm orientation during assembly and thus prevent reverse assembly. In a case where the protrusion shape1044is semi-cylindrical, the groove in cam116may be a semi-cylindrical groove matching with it for receiving and matching the protrusion shape1044. Coupling mechanism1046may also be included on the side of the bottom of the knob head101. In one example, the coupling mechanism1046is a structure with hole, such as a square hole. The square hole1046can mate with barb1166(shown inFIG.3A) of the cam116as described below for assembling them. For example, the structure1046with hole can be deformed and hung upside down at the barb1166of the cam116to prevent the relative up-and-down movement between the knob head101and the cam116. One aspect of the present disclosure is embodied in the unique light guide reflection structure that the indicator block103has. As shown inFIG.3D, incoming light can be propagating towards the bottom of the knob head101, and the light is transmitted upward through the light guide column105along the arrow direction. The light propagating from the light guide column105are reflected and homogenized by the light guide reflection structure of the indicator block103, such that the emitting light conducted through the upper and the side of the indicator block103is uniform. In one non-limiting example, the light source may be a module with light disposed below the rotary knob switch. In one example of the present disclosure, as shown in connection withFIG.3DandFIG.3E, the light guide reflection structure of the indicator block103may include one or more of the following features: the light guide reflection structure of the indicator block103has approximately the geometric shape of a hexahedron, which includes a light-emitting top surface1137(located on the top of the knob head), a light-incident bottom surface1131(where the light guide column is located) opposite to the light-emitting top surface, a light-emitting side surface1133(corresponding to the outer side of the knob head), and inner side surface1135opposite to the light-emitting side surface, and the left and right sides corresponding to the left and right sides of the knob head. Wherein, the inner side surface1135includes two slopes, which are the main reflection slope1032in the lower part and the auxiliary reflection slope1038in the upper part (closer to the light-emitting top surface), and the inner side surface1135also includes a horizontal transition section1136and a vertical transition section1138between the two reflection slopes, wherein the axially incident light from the light guide column105is at least partially reflected by the main reflection slope1032, and after being reflected by the main reflection slope1032, it is emitted to the light-emitting side surface1133along arrow f2as shown inFIG.3D. Further, a hollow hole1034is provided in the light guide reflection structure of the indicator block103. The hollow hole1034can be, for example, in an ellipse shape, and the long axis of the ellipse forms an acute angle with respect to the horizontal direction. As shown in the example ofFIG.3D, the hollow hole1034deviates from the light incident path of the light guide column105, and thus does not reflect light incident from the light guide column105. However, the light in the direction f2is produced through the refection by the main reflection slope1032, and a part of the light in the direction f2is further reflected into the light in the direction f1through the hollow hole1034, so as to be emitted to the light-emitting top surface1137. Further as shown inFIG.3D, where the horizontal transition section1136and the vertical transition section1138of the inner side surface1135intersect, a pit (groove) structure1036is provided, and the concave direction of the pit structure1036can be directed toward the light-emitting side surface1133. Both the pit structure1036and the auxiliary reflection slope1038can further disperse the bright spots of the light source at the top of the light guide column and soften the visual light source. More specifically, by arranging the pit structure1036and the auxiliary reflection slope1038, the straight propagation of the light can be interrupted, such that the light transmitted from the indicator block is more uniform and thus more beautiful. Therefore, the present disclosure realizes the uniformity of light by using the hollow hole1034in the light guide reflection structure of the indicator block, the main reflection slope1032, the pit structure1036and the auxiliary reflection slope1038on the inner surface. The light guide reflection structure can reduce material usage and the cost and complexity of process fabrication while achieving better uniform light-emitting effect. It should also be understood that, in the above-mentioned example, the auxiliary reflection slope1038and the pit structure1036are optional structures. The indicator block103is also provided with structural features to facilitate assembly. For example, as shown inFIG.3C, the indicator block103is provided with a groove structure1031and a convex coupling structure1033. During assembly, the right-angled barb structures1022on the surface cover102are pushed into the groove structures1031in the indicator block103, while the coupling mechanisms1033on the indicator block103are inserted into the features1024in the surface cover102for assembly to restrict the relative up and down movement of the surface cover102and the indicator block103. When the light guide column105is a detachable single piece, the light guide column105is aligned with and pressed into a knob hole at the bottom of the indicator block103. The barb1026of the surface cover102and the barb1035of the indicator block103simultaneously hook the lower barbs1062of the knob handle106(as shown inFIGS.3C and3D). The rotary knob switch may also include a surface frame108. The surface frame108may be internally provided with threads so as to cooperate and screw tightly with the threads on the periphery of the fixing mount112. Other available means may also be used to connect the surface frame108to the fixing mount112. In addition, the bottom of the knob head101can pass through the fixing mount112to be assembled with the cam116as described below, such that rotation of the knob head causes rotation of the cam116, as described further below. As shown inFIG.2A, one or more structures may be provided along the inner side of the fixing mount112, for example, the angle-limiting block1126and the groove1128inFIG.2A. In a non-limiting example of the present disclosure, the fixing mount112may include at least two angle-limiting blocks1126disposed opposite to each other, and four grooves1128. In an example of the present disclosure, a knob sealing ring110may be provided under the knob head101to achieve waterproof effect. The seal ring110may take the form of a V-ring seal and may be tightly coupled to the knob head101in various ways. The rotary knob switch100may further include a cam116. In one example of the disclosure, the cam116may be below the fixing mount and may be disposed concentrically with the fixing mount112. Furthermore, as described above, the cam116may be tightly coupled to the bottom of the knob head101(which passes through the fixing mount112). The cam116may include one or more bosses1162. The cooperation of the boss1162with the angle-limiting block1126inside the fixing mount112as described above defines the angular limit to which the cam116can rotate. In one example of the disclosure, the cam116may include two bosses1162. In further examples, the bosses1162may be disposed opposite along the edge of the cam116(as shown in connection with the cross-sectional views ofFIGS.4A-4C). The boss1162of the cam116does not overlap with the angle-limiting block1126of the fixing mount112, but is located between the two angle-limiting blocks1126. As shown in connection withFIG.2B, the bosses1162′,1162″ may extend along the circumference of the cam116for different lengths, so as to play different position-limiting roles. In addition, control curved surface1164is formed on the side surface of the cam116. In one example, the cam116may have two control curved surfaces1164. In one example of the present disclosure, as described above, the cam116can be closely matched with the bottom of the knob head101through a further connecting mechanism, such that the cam116is positioned relative to the knob head101and can rotate under the control of the knob head101. For example, the protrusion shape1044on the bottom of the knob head101can be inserted into the groove1168in the cam116. In the example where the protrusion shape1044is a semi-cylindrical shape, the groove1168of the cam116may be a semi-cylindrical groove that receives and mates the semi-cylindrical shape. Other mating shapes can also be used such that the knob head101and cam116fit together. Additionally, the knob head101and cam116, when assembled with this assembly feature, may align with mark1266(e.g., the triangular mark shown inFIG.2A) on the sleeve as described below, indicating the zero position of the rotary knob switch. As a non-limiting example,FIG.1shows, for example, cam116for a three-position rotary knob switch (e.g., as shown in connection withFIG.4A, with three positions of zero, 60° left rotation, and 45° right rotation), the cam116on the left side ofFIG.2Bshows, for example, cam for a two-position rotary knob switch (for example, 45 degrees for left and right, as shown inFIG.4C), and the cam116on the right side ofFIG.2Bshows cam for a two-position rotary knob switch, for example, which can correspond to the rotation angle inFIG.4B. The rotary knob switch100may further include a slider120. Slider120may be coaxial with cam116. Slider120may include ramps1204(FIG.3B) with varying heights along the edges of the slider120. When the cam116rotates, the control curved surface1164of the cam116presses the ramps1204of the slider120, such that the slider120slides toward the bottom of the rotary knob switch100in the axial direction. The rotary knob switch100may further include a slider-reset spring124which is used to provide an axial restoring elastic force for the movement of the slider120. For example, in connection withFIG.3B, in an exemplary example of the present disclosure, the control curved surface1164of the cam116can be placed on the ramp1204of the slider120. When the control curved surface1164of the cam116is rotated under the driving of the knob, the ramp1204can be pressed down, such that the slider120also as a whole moves downward accordingly. In one example of the present disclosure, the slider120includes at least one of the following control ramps: a self-locking ramp on the half120-1of the slider120, the top of the self-locking ramp has a groove1209capable of supporting the lower edge of the control curved surface1164of the cam116to maintain self-locking after the rotational force to the knob is released; the self-resetting ramp on the other half120-2of the slider120, wherein the self-resetting ramp can have a bump on its top, and the height of the self-resetting ramp is configured such that when the control curved surface1164of the cam116reaches the top of the ramp, the further rotation of the cam116is already limited by the bump on the top of the self-resetting ramp, thereby rotating reversely to reset when the rotational force to the knob is released. The slider120according to the present disclosure may include at least two control ramps (in this case the slider may be an integrally formed slider), and the at least two control ramps may be the same type of control ramps (as shown inFIG.2C, the two ramps are self-locking ramps, thus forming self-locking sliders), or a combination of self-locking ramp and self-resetting ramp. The slider120can also be formed by combining two slider components, wherein one120-1of the two slider components has a self-locking ramp, and the other120-2has a self-resetting ramp. The limit position to which the control curved surface1164of the cam116can move along the self-resetting ramp (blocked by the bump on the top of the self-resetting ramp) can define the angular limit to which the cam116can rotate. In addition, the outer surface of the ramp of the slider120may include vertical ribs1206. The vertical ribs can be inserted into the grooves1267in the inner wall of the sleeve126. At the angular limit position of the self-resetting ramp, the vertical rib1206can move to the bottom surface1269of the groove1267, and the bottom surface1269restricts the slider120and its self-resetting ramp from continuing to descend, and thus also restricts the cam116from continuing to rotate. In one example of the present disclosure, in the case of the slider120having a self-locking ramp: when the knob head101is rotated from the zero position such that the control curved surface1164of the cam116contacts the self-locking ramp of the slider120, the control curved surface1164of the cam116presses the self-locking ramp to move downward, and when the boss1162of the cam116hits the angle-limiting block1126inside the fixing mount112and is blocked, the knob is at the first rotation angle, and at this moment, the lower end of the control curved surface1164of the cam116is snapped into the groove1209on the top of the self-locking ramp to realize the self-locking of the knob at the first rotation angle position. In the case of the slider having a self-resetting ramp: when the knob head101is rotated such that the control curved surface1164of the cam116contacts the self-resetting ramp of the slider120, the control curved surface1164of the cam116presses the self-resetting ramp to cause it move downward, and at this moment the spring124is compressed; when the control curved surface1164of the cam116reaches the top of the self-resetting ramp, the bump on the top of the self-resetting ramp prevents the control curved surface1164of the cam116from rotating further over the top of the self-resetting ramp, and at this moment, the vertical rib1206moves to the bottom surface1269of the groove1267to restrict the self-resetting ramp from continuing to descend and restrict the cam116from continuing to rotate, so as to reach the second rotation angle; when the rotating force to the knob is released, the restoring force of the spring124makes the vertical rib1206leave the bottom surface1269of the groove1267in the sleeve126, and the cam116is reversely rotated from the second rotation angle to reset. In an example of a module with a light below the rotary knob switch, the slider may accordingly be a lighted slide, wherein the lighted slider may be a hollow structure (as inFIG.2A) to allow light to pass through. In the example of a module without a light below the rotary knob switch, the slider can be correspondingly a non-lighted slider, which is not provided with a hollow structure which allows light to pass through, but can be other structures, for example, the bottom of the non-lighted slider can be connected support ribs, such as the bottom surface is two semicircular structures (as shown at the bottom of the slider120inFIG.3F), or the bottom surface is a cross structure (not shown), and so on. The rotary knob switch100may also include a O-ring125for the fixing mount (which may be used for the fixing mount), a rubber gasket128and a fastening ring130. As shown inFIG.3AandFIG.3B, during the assembling process, the slider-reset spring124can be mounted from the bottom of the slider120, and the barb1208of the slider120prevents the return spring124for the slider from popping out. After the vertical rib1206on the surface of the slider120is aligned with the groove1267in the inner wall of the sleeve126, the barb1208of the slider120is pushed to snap into the groove1264of the sleeve126. The control curved surface of the cam116may be placed on the flat surface1202of the slider120shown inFIG.3Bduring the initial assembly process. As described above, in the case where the slider120is composed of two separate sliders, the two separate sliders can be assembled separately using this method. In the case of an integrally formed slider120, the entire slider120may be mounted in a similar assembly principle but as a whole. As mentioned above, the sleeve126may have a mark1266of a triangular groove, and the triangular groove1266on the sleeve126may be a reference for the initial position, from which rotation to the left can be left-rotation, and rotation to the right can be right-rotation. In addition, for example four grooves1128on the fixing mount112previously mentioned can be installed correspondingly with the bosses1268(for example, as shown inFIG.2, correspondingly the number may also be four) of the sleeve126, such that the rotation of the fixing mount112can be limited. According to an example of the present disclosure, the cam116described above includes a variety of interchangeable models, and the slider120also includes a variety of interchangeable models, such that in the case of only the slider120and the cam116being replaced, the fixing mount112, the cam116and the slider120cooperate with each other in structure to realize different rotation gear position types, and at least one of a self-locking function and a self-resetting function is provided. FIG.4A,FIG.4BandFIG.4Cillustrate schematic diagrams of the assembled rotary knob switch in three rotation gear position types and their rotation angles according to one example of the present disclosure. As a non-limiting example,FIG.4Ashows a rotary knob switch of left self-locking and right self-resetting, with three gear positions, wherein the schematic diagram of the leftmost rotary knob inFIG.4Aand the cross-sectional view below it can correspond to 60 degrees of the left rotation of the knob, the schematic diagram of the rotary knob in the middle and the cross-sectional view below it can correspond to the zero position, and the schematic diagram of the rotary knob on the rightmost and the cross-sectional view below it can correspond to 45 degrees of right rotation. Also as a non-limiting example,FIG.4Bshows a rotary knob switch of right self-locking, with two gear positions, wherein the schematic diagram of the rotary knob and the cross-sectional view below it inFIG.4Bcan correspond to the zero position of the rotary knob, and the schematic diagram of the rotary knob on the left and the cross-sectional view below it may correspond to 60 degrees of right rotation. Also as a non-limiting example,FIG.4Cshows a rotary knob switch of left self-locking and right self-locking, with two gear positions, wherein the schematic diagram of the rotary knob on the left inFIG.4Cand the cross-sectional view below it can correspond to the 45 degrees of left rotation of the rotary knob, the schematic diagram of the rotary knob on the right and the cross-sectional view below it can correspond to 45 degrees of right rotation. It can be understood that the above-mentioned left-right relationships are exemplary and relative, and these relative directions can be adjusted without departing from the design concept of the present disclosure. As shown in connection withFIG.4A, the slider120ofFIG.4Ais a slider120that is a combination of a self-locking ramp and a self-resetting ramp, or formed by two slider components combined with each other with one of the two slider components having self-locking ramp and the other having self-resetting ramp. When the boss (1162) of the cam is located in the middle of the angle-limiting blocks1126of the fixing mount, the rotary knob switch is in the zero position. Rotating the knob along one direction by a first angle (for example, 60 degrees to the left inFIG.4A), when the control curved surface1164of the cam116contacts the self-locking ramp of the slider120, the control curved surface1164of the cam116presses the self-locking ramp to move downward, and when the boss1162of the cam116hits the angle-limiting block1126inside the fixing mount112and is blocked, the knob is at a first rotation angle (for example, 60 degrees), and at this moment the lower end of the control curved surface1164of the cam116is snapped into the groove1209on the top of the self-locking ramp to realize the self-locking of the rotary knob at the first rotation angle position. When the knob is rotated by a second angle in the opposite direction (e.g., 45 degrees to the right inFIG.4A) which causes the control curved surface1164of the cam116contact the self-resetting ramp of the slider120, the control curved surface1164of the cam116press the self-resetting ramp to move downward, and when the control curved surface1164of the cam116reaches the top of the self-resetting ramp, the bump on the top of the self-resetting ramp prevents the control curved surface1164of the cam116from rotating further over the top of the self-resetting ramp, and at this moment the vertical rib1206also moves to the bottom surface1269of the groove1267to restrict the self-resetting ramp from continuing to descend and to restrict the cam116from continuing to rotate, thereby achieving a second rotation angle (e.g., 45 degrees to the right inFIG.3A). When the rotational force to the rotary knob switch is released, the restoring force of the spring124causes the vertical rib1206to leave the bottom surface1269of the groove1267in the sleeve126, and the cam116is reversely rotated from the second rotation angle to reset and return to the zero position. In the case shown inFIG.4A(three gear positions, the slider having self-resetting ramp and self-locking ramp), the cam116may include two control curved surfaces1164. The two control curved surfaces1164may be placed relatively close, e.g., as shown inFIG.2A. In one example, the spacing of the two control curved surfaces1164inFIG.3Acan be set such that: when one of the control curved surfaces1164presses down one (e.g., self-locking ramp, or self-resetting ramp) of the ramps of the slider, the other control curved surface1164(as inFIG.2A) at least does not press down the other ramp (e.g., the self-resetting ramp, or the self-locking ramp), but, for example, is on the same side as the control curved surface1164. In the example ofFIG.4B, two gear positions, which are zero degree and 60 degrees to the right, are implemented. Specifically, the bosses (1162) on the top of the cam116are set to have a certain length extending around the top edge of the cam116, such that when the two bosses (1162) on the top of the cam116respectively abut against the two angle-limiting blocks (1126) at the bottom of the fixing mount, the rotary knob switch is at the zero position; when the two bosses (1162) on the top of the cam respectively move in opposite directions and abut against the two angle-limiting blocks (1126) at the bottom of the fixing mount, the two control curved surfaces1164of the cam are respectively snapped into the grooves1209of the two self-locking sliders, such that the rotary knob switch is at a third rotation angle (60 degrees in this example) and realizes self-locking. In the example ofFIG.4C, two gear positions, which are 45 degrees to the left and 45 degrees to the right, are implemented. The bosses (1162) on the top of the cam116is set to have a certain length extending around the top edge of the cam116, such that when the two bosses (1162) on the top of the cam116abut against the two angle-limiting blocks (1126) at the bottom of the fixing mount112respectively, the control curved surface1164is in the recesses formed by the two self-locking ramps, such that the rotary knob switch is at a fourth rotation angle (for example, 45 degrees); when the two bosses (1162) on the top of the cam move in the opposite direction, respectively, the two control curved surfaces1164of the cam116are respectively snapped into the grooves1209on the top of the two self-locking ramps, such that the rotary knob switch100is at a fourth rotation angle (e.g., 45 degrees) in the opposite direction and realizes self-locking. In the cases shown inFIGS.4B and4C(two gear positions, the slider having self-locking ramps), the cam116may include one control curved surface1164. In a preferred example, the cam116may include two control curved surfaces to maintain balance when rotating. In the case where the cam116includes two control curved surfaces, the two control curved surfaces may be positioned opposite (as shown inFIGS.2C and2D) to better maintain balance as the cam rotates to press down the slider ramps. It can be understood that the above angles are only examples rather than limitations, and other angles of rotation may be set without departing from the spirit of the present disclosure, and therefore other angles are also within the scope of the present application. It should also be understood that the rotary knob switch100shown in the above examples is only exemplary examples of the rotary knob switch of the present disclosure. The rotary knob switch according to the present disclosure does not necessarily include or only includes all the components shown in the figures. It is contemplated that the rotary knob switch of the present disclosure may include more or fewer components, as long as they can achieve the corresponding functions. | 28,818 |
11942287 | DETAILED DESCRIPTION FIG.1is a simplified diagram of an example load control system. As shown, the load control system is configured as a lighting control system100for control of one or more lighting loads, such as a lighting load102that is installed in a ceiling-mounted downlight fixture103and a controllable lighting load104that is installed in a table lamp105. The lighting loads102,104shown inFIG.1may include light sources of different types (e.g., incandescent lamps, fluorescent lamps, and/or LED light sources). The lighting loads may have advanced features. For example, the lighting loads may be controlled to emit light of varying intensities and/or colors in response to a user command. The amount of power delivered to the lighting loads may be adjusted to an absolute level or by a relative amount. The lighting control system100may be configured to control one or more of the lighting loads (e.g., and/or other electrical loads) according to one or more configurable presets or scenes. These presets or scenes may correspond to, for example, predefined light intensities and/or colors, predefined entertainment settings such as music selection and/or volume settings, predefined window treatment settings such as positions of shades, predefined environmental settings such as heating, ventilation, and air conditioning (HVAC) settings, or any combination thereof. The presets or scenes may correspond to one or more specific electrical loads (e.g., bedside lamps, ceiling lights, etc.) and/or one or more specific locations (e.g., a room, an entire house, etc.). The lighting load102may be an example of a lighting load that is wired into a power control and/or delivery path of the lighting control system100. As such, the lighting load102may be controllable by a wall-mounted control device such as a dimmer switch. The lighting load104may be an example of a lighting load that is equipped with integral load control circuitry and/or wireless communication capabilities such that the lighting load may be controlled via a wireless control mechanism (e.g., by a remote control device). The lighting control system100may include one or more control devices for controlling the lighting loads102,104(e.g., controlling an amount of power delivered to the lighting loads). The lighting loads102,104may be controlled substantially in unison, or be controlled individually. For example, the lighting loads may be zoned so that the lighting load102may be controlled by a first control device, while the lighting load104may be controlled by a second control device. The control devices may be configured to turn the lighting loads102,104on and off. The control devices may be configured to control the magnitude of a load current conducted through the lighting loads (e.g., so as to control an intensity of the lighting loads102,104between a low-end intensity LLE and a high-end intensity Um). The control devices may be configured to control an amount of power delivered to the lighting loads to an absolute level (e.g., to a maximum allowable amount), or by a relative amount (e.g., an increase of 10% from a current level). The control devices may be configured to control a color of the lighting load102,104(e.g., by controlling a color temperature of the lighting loads or by applying full color control over the lighting loads). The control devices may be configured to activate a preset associated with the lighting load102,104(e.g., a preset may be associated with one or more predetermined settings of the lighting loads such as an intensity level of the lighting loads and/or a color of the lighting loads). The presets may be configured via the control device and/or via an external device (e.g., a mobile device) by way of a wireless communication circuit of the control device. The control devices may be configured to activate control of a zone. A zone may correspond to one or more electrical loads that are configured to be controlled by the control devices. A zone may be associated with a specific location (e.g., a living room) or multiple locations (e.g., an entire house with multiple rooms and hallways). The control devices may be configured to switch between different operational modes. An operational mode may be associated with controlling different types of electrical loads or different operational aspects of one or more electrical loads. Examples of operational modes may include a lighting control mode for controlling one or more lighting loads (e.g., which in turn may include a color control mode and an intensity control mode), an entertainment system control mode (e.g., for controlling music selection and/or the volume of an audio system), an HVAC system control mode, a winter treatment device control mode (e.g., for controlling one or more shades), and/or the like. The control device described herein may be, for example, a dimmer switch110, a retrofit remote control device112, a wall-mounted control device114, a tabletop remote control device116, and/or a handheld remote control device118, as shown inFIG.1. The dimmer switch110may include a base portion (e.g., such as one or more of a yoke, a bezel, and an enclosure that may house electrical circuitry and or mechanical complements of the dimmer switch110) that is configured to be mounted to a standard electrical wallbox. Once mounted, the dimmer switch110may be coupled in series electrical connection between an alternating-current (AC) power source105and a lighting load that is wired into the control path of the dimmer switch110(e.g., such as the lighting load102). The dimmer switch110may receive an AC mains line voltage VACfrom the AC power source105, and may generate a control signal for controlling the lighting load102. The control signal may be generated via various phase-control techniques (e.g., a forward phase-control dimming technique or a reverse phase-control dimming technique). The dimmer switch110may be configured to receive wireless signals (e.g., from a remote control device) representative of commands to control the lighting load102, and generate respective control signals for executing the commands. Examples of wall-mounted dimmer switches are described in greater detail with reference toFIG.13, and in commonly-assigned U.S. Pat. No. 7,242,150, issued Jul. 10, 2007, entitled DIMMER HAVING A POWER SUPPLY MONITORING CIRCUIT; U.S. Pat. No. 7,546,473, issued Jun. 9, 2009, entitled DIMMER HAVING A MICROPROCESSOR-CONTROLLED POWER SUPPLY; and U.S. Pat. No. 8,664,881, issued Mar. 4, 2014, entitled TWO-WIRE DIMMER SWITCH FOR LOW-POWER LOADS, the entire disclosures of which are hereby incorporated by reference. The retrofit remote control device112may be configured to be mounted to a mechanical switch (e.g., a toggle switch122, a paddle switch, a pushbutton switch, and/or other suitable switch) that may be pre-existing in the lighting control system100. Such a retrofit solution may provide energy savings and/or advanced control features, for example without requiring significant electrical re-wiring and/or without requiring the replacement of existing mechanical switches. As an example, a consumer may replace an existing lamp with the controllable lighting load104, switch a toggle switch122that is coupled to the lighting load104to the on position, install (e.g., mount) the remote control device112onto the toggle switch122, and associate the remote control device112with the lighting source104. The retrofit remoted control112may then be used to perform advanced functions that the toggle switch122may be incapable of performing (e.g., such as dimming the intensity level of the light output, changing the color of the light output, providing feedback to a user, etc.). As shown, the toggle switch122is coupled (e.g., via a series electrical connection) between the AC power source105and an electrical receptacle120into which the lighting load104may be plugged (e.g., as shown inFIG.1). Alternative, the toggle switch122may be coupled between the AC power source105and one or more of the lighting loads102,104, without the electrical receptacle120. The wall-mounted remote control device114may be configured to be mounted to a standard electrical wallbox and be electrically connected to the AC power source105for receiving power. The wall-mounted remote control device114may be configured to receive a user input and may generate and transmit a control signal (e.g., control data such as a digital message) for controlling the lighting loads102,104in response to the user input. The tabletop remote control device116may be configured to be placed on a surface (e.g., an end table or night stand), and may be powered by a direct-current (DC) power source (e.g., a battery or an external DC power supply plugged into an electrical outlet). The tabletop remote control device116may be configured to receive a user input, and may generate and transmit a signal (e.g., a digital message) for controlling the lighting loads102,104in response to the user input. The handheld remote control device118may be sized to fit into a user's hand, and may be powered by a direct-current (DC) power source (e.g., a battery or an external DC power supply plugged into an electrical outlet). The handheld remote control device118may be configured to receive a user input, and may generate and transmit a signal (e.g., a digital message) for controlling the lighting loads102,104in response to the user input. Examples of battery-powered remote controls are described in greater detail in commonly assigned U.S. Pat. No. 8,330,638, issued Dec. 11, 2012, entitled WIRELESS BATTERY POWERED REMOTE CONTROL HAVING MULTIPLE MOUNTING MEANS, and U.S. Pat. No. 7,573,208, issued Aug. 11, 2009, entitled METHOD OF PROGRAMMING A LIGHTING PRESET FROM A RADIO-FREQUENCY REMOTE CONTROL, the entire disclosures of which are hereby incorporated by reference. The control devices described herein (e.g., the dimmer switch110and/or remote control devices112-118) may each include a user input unit. The user input unit may be configured to receive (e.g., detect) user inputs for controlling one or more of the lighting loads102,104, and/or the control device itself. A plurality of mechanisms for receiving the user inputs may be implemented on the user input unit, including, for example, a rotating mechanism (e.g., such as a rotary knob or a dial), a button or switch or an imitation thereof, and a touch sensitive device (e.g., such as a capacitive touch surface) configured to detect both point actuations and gestures. The control devices described herein (e.g., the dimmer switch110and/or remote control devices112-118) may each include one or more visual indicators (e.g., a light bar) configured to be illuminated by one or more light sources (e.g., one or more LEDs). The one or more visual indicators may be provided on the user input unit or may be separate from the user input unit. The one or more visual indicators may be operable to provide feedback to a user of the control device. Such feedback may indicate, for example, a status of a lighting load (e.g., the lighting loads102,104) controlled by the control device. The status may reflect, for example, whether the lighting load is on or off, a present intensity of the lighting load, a color of the lighting load, and so on. The feedback may indicate a status of the control device itself, for example, such as a present operational mode of the control device (e.g., an intensity control mode or a color control mode), a power status of the control device (e.g., remaining battery power), and so on. As an example, the control device may provide feedback via the visual indicators while the control device is being actuated and/or after the control device is actuated. The feedback may indicate to the user that the control device is transmitting control signals (e.g., RF signals) in response to the actuation. The control device may be configured to keep the visual indicators illuminated while the condition triggering the feedback continues to exist. The control device may be configured to illuminate the visual indicators for a few seconds (e.g., 1-2 seconds) and then turn off the visual indicators (e.g., to conserve battery life). The control devices described herein (e.g., the dimmer switch110and/or remote control devices112-118) may each include a control circuit. The control circuit may be configured to be responsive to a user input received via the user input unit. The control circuit may be configured to generate control data (e.g., a control signal) for controlling the lighting loads102,104in response to the user input. The control data may include commands and/or other information (e.g., device identification information) for controlling the lighting loads102,104. The control data may be included in a control signal transmitted to the lighting loads102,104via a wireless communication circuit. The control circuit may be configured to illuminate the one or more visual indicators to provide feedback of the control being applied and/or its outcome. The control devices described herein (e.g., the dimmer switch110and/or remote control devices112-118) may each include a wireless communication circuit for transmitting and/or receiving radio frequency (RF) signals108. The wireless communication circuit may be used to transmit a control signal that includes the control data (e.g., a digital message) generated by the control device to the lighting loads102,104or to a central controller of the lighting control system100, for example. The control data may be generated in response to a user input to adjust one or more operational aspects of the lighting loads102,104. The control data may include a command and/or identification information (e.g., such as a unique identifier) associated with the control device and/or one or more of the lighting loads102,104(e.g., and/or other electrical loads of the load control system100). The control devices (e.g., the remote control devices112-118) may be associated with one or more lighting loads and/or other control devices (e.g., the dimmer switch110) for controlling the lighting loads (e.g., through a configuration procedure). Upon such association, the lighting loads102,104may be responsive to control signals transmitted by the control devices. To illustrate, the association may be accomplished by actuating an actuator on the concerned lighting loads and/or control devices, and then actuating (e.g., pressing and holding) an actuator on the control device for a predetermined amount of time (e.g., approximately 10 seconds). Examples of a configuration procedure for associating a control device with an electrical load is described in greater detail in commonly-assigned U.S. Patent Publication No. 2008/0111491, published May 15, 2008, entitled RADIO-FREQUENCY LIGHTING CONTROL SYSTEM, the entire disclosure of which is hereby incorporated by reference. The wireless communication circuit may also be controlled to transmit/receive feedback information regarding the control device and/or the lighting loads102,104via RF signals. The control device described herein (e.g., the dimmer switch110and/or remote control devices112-118) may include a memory (not shown). The memory may be used, for example, to store operational settings associated with the control device and/or the lighting loads102,104(e.g., such as lighting presets and their associated light intensities and/or colors). The memory may be implemented as an external integrated circuit (IC) or as an internal circuit (e.g., as part of a control circuit). Further, it should be appreciated that, although a lighting control system with two lighting loads is provided as an example above, a load control system as described herein may include more or fewer lighting loads, other types of lighting loads, and/or other types of electrical loads that may be configured to be controlled by the one or more control devices. For example, the load control system may include one or more of: a dimming ballast for driving a gas-discharge lamp; an LED driver for driving an LED light source; a dimming circuit for controlling the intensity of a lighting load; a screw-in luminaire including a dimmer circuit and an incandescent or halogen lamp; a screw-in luminaire including a ballast and a compact fluorescent lamp; a screw-in luminaire including an LED driver and an LED light source; an electronic switch, controllable circuit breaker, or other switching device for turning an appliance on and off; a plug-in control device, controllable electrical receptacle, or controllable power strip for controlling one or more plug-in loads; a motor control unit for controlling a motor load, such as a ceiling fan or an exhaust fan; a drive unit for controlling a motorized window treatment or a projection screen; one or more motorized interior and/or exterior shutters; a thermostat for a heating and/or cooling system; a temperature control device for controlling a setpoint temperature of a heating, ventilation, and air-conditioning (HVAC) system; an air conditioner; a compressor; an electric baseboard heater controller; a controllable damper; a variable air volume controller; a fresh air intake controller; a ventilation controller; one or more hydraulic valves for use in radiators and radiant heating system; a humidity control unit; a humidifier; a dehumidifier; a water heater; a boiler controller; a pool pump; a refrigerator; a freezer; a television and/or computer monitor; a video camera; an audio system or amplifier; an elevator; a power supply; a generator; an electric charger, such as an electric vehicle charger; an alternative energy controller; and/or the like. FIG.2Ais a perspective view andFIG.2Bis a front view of an example control device200that may be deployed as the dimmer switch110and/or the retrofit remote control device112in the lighting control system100. The lighting control system100may include one or more lighting loads, such as the lighting loads102,104. The control device200may comprise a user interface210(e.g., a user input device) and a faceplate212. The user interface202may include a rotating portion214that is rotatable with respect to the faceplate212. For example, the rotating portion214may be rotatable for controlling one or more characteristics of the lighting loads controlled by the control device (e.g., adjusting the intensities and/or the colors of the lighting loads). The control device200may comprise a base portion220for rotatably supporting the rotation portion214. The user interface210may also include an actuation portion216defining a front surface215that may be pressed in towards the faceplate212for turning the lighting loads on and off (e.g., toggling the lighting loads). The control device200may be responsive to a dynamic motion of the actuation portion216(e.g., an actuation that causes movement of the surface of the actuation portion). The user interface210may also include one or more visual indicators (e.g., a light bar218) configured to be illuminated by one or more light sources (e.g., one or more LEDs) to visibly display information, such as feedback to a user. The light bar218may be attached to a periphery of the actuation portion216and may move with the actuation portion216(e.g., when the actuation portion is actuated). The front surface215of the actuation portion216may rest in an idle plane230(e.g., an initial plane), for example, when the actuation portion216is in an idle position (e.g., when a user is not pressing the actuation portion216towards the faceplate212). For example, the front surface215of the actuation portion216may be biased to the idle plane230. As shown inFIGS.2A and2B, the actuation portion216may be pressed towards the faceplate212through a plurality of different planes. The control device200may be responsive to a first-depth actuation231of the front surface215of the actuation portion216, during which the front surface215of the actuation portion216may be pressed in by a first distance d1(e.g., a first depth), such that the front surface215of the actuation portion216resides in a first plane232(e.g., at a first detent). The control device200may be responsive to a second-depth actuation233of the front surface215of the actuation portion216, during which the front surface215of the actuation portion216may be pressed in by a second distance d2(e.g., a second depth), such that the front surface215of the actuation portion216resides in a second plane234(e.g., at a second detent). The idle plane230, the first plane232, and the second plane234may be parallel with one another. The control device200may operate differently based on the depth (e.g., the first distance d1or the second distance d2) by which the actuation portion216is pressed towards the faceplate212(e.g., depending on which of the first-depth actuation231or the second-depth actuation233is applied to the front surface215of the actuation portion216). For example, the control device200may control different characteristics of the lighting loads and/or change operating modes based on which of the first-depth actuation231or the second-depth actuation233is applied to the front surface215of the actuation portion216. The control device200may provide feedback using the light bar218to assist the user in determining the depth at which to actuate the front surface215of the actuation portion216to apply the first-depth actuation231or the second-depth actuation233(e.g., such that the front surface215resides in the first plane232or the second plane234, respectively). For example, the light bar218may be illuminated half way around the rotating portion214when the actuation portion216is pressed into the first plane232(e.g., by the first distance d1), and illuminated entirely around the rotating portion214when the actuation portion is pressed into the second plane234(e.g., by the second distance d2). Of course, if the actuation portion216is configured to be pressed into more than two planes, then an associated portion of the light bar218may be illuminated for each plane (e.g., detent), for example, one third, two thirds, and the entire light bar218if there are three planes in which the front portion215of the actuation portion216may reside. The control device200may operate differently based on how long the front surface215of the actuation portion216is held in one of the first plane232and/or the second plane234(e.g., depending upon the length of the first-depth actuation231and/or the second-depth actuation233). For example, the control device200may transmit a command to the turn one or more lighting loads on or off if the front surface215of the actuation portion216is held in one of the first plane232and/or the second plane234for less than a first predetermined amount of time (e.g., approximately three seconds). The control device200may be configured to cause a present intensity level of one or more lighting loads to be stored as a preset intensity level if the front surface215of the actuation portion216is held in the first plane232(e.g., the first-depth actuation231) for the first predetermined amount of time. The control device200may be configured to provide a preset animation (e.g., by causing the entire light bar218to blink quickly) after causing the preset intensity level to be stored. In addition, the control device200may be configured to cause the control device to change modes of operation (e.g., between a lighting control mode and a color control mode) if the front surface215of the actuation portion216is held in the first plane232(e.g., the first-depth actuation231) for a second predetermined amount of time (e.g., approximately six seconds). Further, the control device200may be configured to cause the control device to transmit a particular command for controlling the one or more lighting loads (e.g., a long fade-to-off command) if the front surface215of the actuation portion216is held in the first plane232(e.g., the first-depth actuation231) for the first predetermined amount of time, and then pressed in further and held in the second plane234(e.g., the second-depth actuation233) for the remainder of the second predetermined amount of time. The control device200may be configured to cause the control device to be associated with one or more lighting loads and/or other control devices (e.g., the dimmer switch110) if the front surface215of the actuation portion216is held in the second plane234(e.g., the second-depth actuation233). For example, the control device200may be configured to cause the control device to enter an association mode (e.g., to initiate an association procedure) if the front surface215of the actuation portion216is held in the second plane234for the first predetermined amount of time. The control device200may be configured to provide an association animation (e.g., by causing the entire light bar218to blink or strobe) while in the association mode. The control device200may be configured to cause the control device to complete the association procedure (e.g., to be associated with the one or more lighting loads and/or other control devices) and exit the association mode if the front surface215of the actuation portion216is held in the second plane234for the second predetermined amount of time. The control device200may change and/or cycle through operating modes based on how long the actuation portion216is held in one of the first plane232and/or the second plane234. The operating modes may, for example, configure the control device200to control different characteristics of the lighting loads (e.g., intensity, color, etc.) in response to rotations of the rotating portion214, and/or cause the control device200to enter one or more advanced modes. For example, in one operating mode, rotations of the rotating portion214may cause the control device200to control the intensity of the lighting loads, while in another operating mode, rotations of the rotating portion214may cause the control device to control the color of the lighting loads. Further, when in an advanced mode, the control device200may be configured to program presets (e.g., lighting presets), associate the control device200to one or more lighting loads and/or a system controller, and/or perform more advanced control of the lighting loads (e.g., fade to on, fade to off, etc.). Finally, it should be appreciated that although the control device200is described with reference to the control of lighting loads, the control device200may be configured to control characteristics of other electrical loads in addition or in lieu of lighting loads (e.g., volume of speakers, position of motorized window treatments, etc.). Further, the control device200may control different characteristics of the lighting loads based on the depth (e.g., the first distance d1or the second distance d2) to which the front surface215of the actuation portion216is pressed towards the faceplate212. For example, the control device200may control a first characteristic of the lighting loads if the front surface215of the actuation portion216is pressed towards the faceplate212by the first distance d1into the first plane232, and control a second characteristic of the lighting loads if the front surface215of the actuation portion216is pressed towards the faceplate212by the second distance d2into the second plane234. Accordingly, the control device200may be configured to treat each detent (e.g., each of the first and second planes232,234in which the front surface215of the actuation portion216may reside) as a separate actuator. Further, the control device200may be configured to determine how long the front surface215of the actuation portion216is pressed into a particular one of the first and second planes232,234, and for example, operate differently based on how long the front surface215of the actuation portion216is pressed into a particular one of the first and second planes232,234. For example, the control device200may be configured to determine whether the front surface215of the actuation portion216is pressed into a particular one of the first and second planes232,234for a plurality of different durations (e.g., less than 1 second, greater than 3 seconds, greater than 6 seconds, greater than 9 seconds, etc.). The control device200may, in some examples, be configured to wake the control device200from a sleep state upon detecting the first-depth actuation231of the actuation portion216(e.g., the front surface215of the actuation portion216being pressed into the first plane232). Upon detecting the first-depth actuation231of the actuation portion216, the control device200may illuminate the light sources (e.g., the light bar218) of the control device200, determine whether there are any lighting loads associated with the control device200, and/or send out a message to any associated lighting loads asking for their present intensities level. If the control device200determines that the lighting loads are off, the control device200may send out a command to the lighting loads to turn them on (e.g., turn on the lighting loads to a preset level). If the control device200determines that the lightings loads are on, the control device200may start a timer to determine whether the front surface215of the actuation portion216is being held in the first plane232and/or the second plane234for a first amount of time (e.g., three seconds). The control device200may operate differently based on which plane232,234the front surface215of the actuation portion216is held and/or for how long the actuation portion216is held in one of the planes232,234(e.g., as described with reference toFIGS.8A and8B). FIG.3is an example diagram360illustrating how a control device (e.g., the control device200) may operate based on how deep and how long a front surface of an actuation portion (e.g., the front surface215of the actuation portion216) is pressed towards a faceplate of the control device. The control device may be configured to perform a first operation (e.g., toggle the lighting load between on and off) if the front surface of the actuation portion is pressed into a first plane (e.g., the first plane232) for less than a first predetermined amount of time (e.g., pressed into the first plane and released before the end of a first time period350). For example, the first predetermined amount of time (e.g., and the length of the first time period350) may be approximately three seconds. If the front surface of the actuation portion is pressed into the first plane for greater than the first predetermined amount of time, then the control device may perform a second operation352(e.g., save the present intensity of one or more lighting loads as a preset intensity). The control device may be configured to provide a preset animation (e.g., by causing one or more fgtas to blink quickly) for a second time period352after the first time period350. For example, the length of the second time period352may be approximately one second. Similarly, the control device may be configured to perform a third operation (e.g., toggle the lighting load between on and off) if the front surface of the actuation portion is pressed into a second plane (e.g., the second plane234) for less than the first predetermined amount of time (e.g., pressed into the second plane and released before the end of a third time period354). If the front surface of the actuation portion is pressed into the second plane for greater than the first predetermined amount of time, the control device may configure to perform a fourth operation (e.g., enter an association mode for associating the control device to one or more lighting loads and/or other control devices). The control device may be configured to provide an association animation (e.g., by causing one or more visual indicators to blink or strobe) for a fourth time period356after the third time period354. For example, the length of the fourth time period356may be approximately three seconds. If the front surface of the actuation portion is pressed into the second plane for greater than a second predetermined amount of time, then the control device may configure to perform a fifth operation (e.g., associate the control device to the one or more lighting loads and/or other control devices). It should be appreciated that different operations of the actuation portion may result in the same response by the control device. Further, although not illustrated, the control device maybe configured to perform additional operations if the actuation portion is pressed into one plane for a particular amount of time and then into another plane (e.g., if the actuation portion is pressed into the first plane for greater than three seconds and then pressed into the second plane). This allows, for example, for a control device with a single actuator to provide increased levels of use control. FIGS.4A and4Bare front and rear exploded perspective views of another example remote control device310that may be deployed as the retrofit remote control device112in the lighting control system100shown inFIG.1and/or the control device200shown inFIG.2. The remote control device310may be configured to be mounted over an actuator of a standard light switch312(e.g., a toggle actuator of a single pole single throw (SPST) maintained mechanical switch). The remote control device310may be installed over of an existing faceplate316that is mounted to the light switch312(e.g., via faceplate screws318). The remote control device310may include a base portion320and a control unit330that may be operably coupled to the base portion320. The control unit330may be supported by the base portion320and may include a rotating portion332(e.g., an annular rotating portion) that is rotatable with respect to the base portion320. As shown inFIG.4A, the control unit330may be detached from the base portion320. The base portion320may be attached (e.g., fixedly attached) to a toggle actuator314and may be configured to maintain the toggle actuator314in the on position. The toggle actuator314may be received through a toggle actuator opening322in the base portion320. A screw324may be tightened to attach (e.g., fixedly attached) the base portion320to the toggle actuator314. In this regard, the base portion320may be configured to prevent a user from inadvertently switching the toggle actuator314to the off position when the remote control device310is attached to the light switch312. The control unit330may be released from the base portion320. For example, a control unit release tab326may be provided on the base portion320. By actuating the control unit release tab326(e.g., pushing up towards the base portion or pulling down away from the base portion), a user may remove the control unit330from the base portion320. The control unit330may comprise one or more clips338that may be retained by respective locking members328connected to the control unit release tab326when the base portion320is in a locked position. The one or more clips338may be released from the respective locking members328of the base portion320when the control unit release tab326is actuated (e.g., pushed up towards the base portion or pulled down away from the base portion) to put the base portion320in an unlocked position. In an example, the locking members328may be spring biased into the locked position and may automatically return to the locked position after the control unit release tab326is actuated and released. In an example, the locking members328may not be spring biased, in which case the control unit release tab326may be actuated to return the base portion320to the locked position. The control unit330may be installed on the base portion320without adjusting the base portion320to the unlocked position. For example, the one or more clips338of the control unit330may be configured to flex around the respective locking members328of the base portion and snap into place, such that the control unit330is fixedly attached to the base portion. The control unit330may be released from the base portion320to access one or more batteries340(e.g., as shown inFIG.4B) that provides power to at least the remote control device310. The batteries340may be held in place in various ways. For example, the batteries340may be held by a battery retention strap342, which may also operate as an electrical contact for the batteries. The battery retention strap342may be loosened by untightening a battery retention screw344to allow the batteries340to be removed and replaced. AlthoughFIG.4Bdepicts the batteries340as being located in the control unit330, it should be appreciated that the batteries340may be placed elsewhere in the remote control device310(e.g., in the base portion320) without affecting the functionality of the remote control device310. When the control unit330is coupled to the base portion320, the rotating portion332may be rotatable in opposed directions about the base portion320(e.g., in the clockwise and/or counter-clockwise directions). The base portion320may be configured to be mounted over the toggle actuator314of the switch312such that the rotational movement of the rotating portion332may not change the operational state of the toggle actuator314(e.g., the toggle actuator314may remain in the on position to maintain functionality of the remote control device310). The control unit330may comprise an actuation portion334defining a front surface335. The actuation portion334may in turn comprise a part or an entirety of a front surface of the control unit330. For example, the control unit330may have a circular surface within an opening defined by the rotating portion332. The actuation portion334may comprise a part of the circular surface (e.g., a central area of the circular surface) or approximately the entire circular surface. The actuation portion334may be received in a central circular opening defined by the rotating portion332. In an example, the actuation portion334may be configured to move towards the light switch312(e.g., through the central opening of the rotation portion332) to actuate a mechanical switch (not shown) inside the control unit330as will be described in greater detail below. The actuation portion334may return to an idle position after being actuated. In addition, the rotating portion332may be connected to the actuation portion334and may move with the actuation portion to actuate the mechanical switch when the actuation portion332is actuated. When the actuation portion334is in the idle position, the front surface335of the actuation portion334may be located in an idle plane that may be parallel to a front surface of the faceplate312(e.g., such as the idle plane230shown inFIGS.2A and2B). The rotating portion332and/or the actuation portion334may be pushed into towards the base portion320to cause the front surface335of the actuation portion334to be pressed in by a first distance (e.g., such as the first distance d1) towards the base portion320(e.g., the first-depth actuation231), such that the front surface335of the actuation portion334resides in a first plane (e.g., such as the first plane232). For example, the first plane may be parallel to the front surface of the faceplate312and closer to the faceplate than the idle plane. In addition, the rotating portion332and/or the actuation portion334may pressed in by a second distance (e.g., such as the second distance d2) towards the base portion320(e.g., the second-depth actuation233), such that the front surface335of the actuation portion334resides in a second plane (e.g., such as the second place234). For example, the second plane may be parallel to the front surface of the faceplate312and closer to the faceplate than the first plane. The remote control device310may be configured to transmit one or more wireless communication signals (e.g., the RF signals108ofFIG.1) to an electrical load (e.g., the lighting loads102,104of the lighting control system100ofFIG.1). The remote control device310may include a wireless communication circuit (e.g., an RF transceiver or transmitter (not shown)) via which one or more wireless communication signals may be sent and/or received. The control unit330may be configured to transmit messages (e.g., digital messages including commands to control the controllable electrical load) via the wireless communication signals. The control circuit330may be configured to transmit different messages and/or commands depending upon which of the first-depth actuation or the second-depth actuation is applied to the front surface335of the actuation portion336. For example, when the front surface335of the actuation portion334is actuated into the first plane, the control unit330may be configured to transmit a command, via the wireless communication circuit, to raise the intensity of a controllable lighting load in response to a clockwise rotation of the rotating portion332and to transmit a command to lower the intensity of the controllable light source in response to a counterclockwise rotation of the rotating portion332. In addition, when the front surface of the actuation portion334is in the second plane, the control unit330may be configured to transmit a command, via the wireless communication circuit, to adjust the color (e.g., the color temperature) of the controllable light source in response to clockwise and counterclockwise rotations of the rotating portion332. The control unit330may be configured to transmit a command to toggle an electrical load (e.g., from off to on or vice versa) in response to an actuation of the actuation portion334. In addition, the control unit330may be configured to transmit a command to turn an electrical load on in response to an actuation of the actuation portion334(e.g., if the control unit330possesses information indicating that the electrical load is presently off). The control unit330may be configured to transmit a command to turn an electrical load off in response to an actuation of the actuation portion334(e.g., if the control unit possesses information indicating that the electrical load is presently on). The control unit330may be configured to transmit a command to turn an electrical load on to a maximum power level (e.g., to turn a light source on to full intensity) in response to a double tap of the actuation portion334(e.g., two actuations in quick succession). The control unit330may be configured to adjust the power level of an electrical load to a minimum level (e.g., to turn the intensity of a lighting load to a minimum intensity) in response to rotation of the rotating portion332and may only turn off the electrical load in response to an actuation of the actuation portion334. The control unit330may also be configured in a spin-to-off mode, in which the control unit330may turn off an electrical load after the power level of the electrical load (e.g., intensity of the lighting load) is controlled to a minimum level in response to a rotation of the rotating portion332(e.g., without an actuation of the actuation portion). The control unit330may comprise one or more visual indicators (e.g., a light bar336) that may be illuminated by one or light sources (e.g., LEDs), for example, to provide feedback to a user of the remoted control device310. The light bar336may be located in different areas of the remote control device310in different implementations. For example, the light bar336may be located between the rotating portion332and the actuation portion334, and/or extend along the perimeter of the rotating portion332or the actuation portion334. The light bar336may have different shapes. For example, the light bar336may form a full circle (e.g., a substantially full circle) as shown inFIG.4A, a partial circle, a linear light bar, and/or the like. The light bar336may be attached to a periphery of the actuation portion334and move with the actuation portion334(e.g., when the actuation portion is actuated). The light bar336may have a certain width (e.g., a same width along the entire length of the light bar). The exact value of the width may vary, for example, depending on the size of the remote control device310and/or the intensity of the light source(s) that illuminates the light bar336. FIG.4Cis a front exploded view andFIG.4Dis a rear exploded view of the control unit330of the remote control device310. The actuation portion334may be received within an opening defined by the rotating portion332. The light bar336may be attached to the actuation portion334around a periphery of the actuation portion. The rotating portion332may comprise an inner surface416having tabs418surrounding the circumference of the rotation portion. The tabs418may be separated by notches420that are configured to receive engagement members422of the actuation portion334to thus engage the actuation portion334with the rotating portion332. The control unit330may also comprise a bushing424that is received within the rotating portion332, such that an upper surface426of the busing may contact lower surfaces428of the tabs418inside of the rotating portion. When the actuation portion334is received within the opening of the rotating portion332, the light bar336may be provided between the actuation portion334and the rotating portion332. When the rotating portion334is rotated, the actuation portion334and/or the light bar336may rotate with the rotating portion. The engagement members422of the actuation portion334may be able to move through the notches420in a z-direction (e.g., towards the base portion), such that the actuation portion334(along with the light bar336) may be able to move in the z-direction. The control unit330may further comprise a flexible printed circuit board (PCB)430that may be arranged over a carrier432. The flexible PCB430may comprise a main portion434on which most of the control circuitry of the control unit330(e.g., including a control circuit) may be mounted. The control unit330may comprise a plurality of light-emitting diodes (LEDs)436arranged around the perimeter of the flexible PCB430to illuminating the light bar336. The flexible PCB430may comprise a switch tab438that may be connected to the main portion434(e.g., via flexible arms440). The switch tab438may have a tactile switch442mounted thereto. The switch tab438of the flexible PCB430may be configured to rest on a switch tab surface444on the carrier432. The carrier432may comprise engagement members446configured to be received within notches448in the bushing424. A ring450may snap to a lower surface452of the rotating portion to hold the control unit330together. The clips338may be attached to the carrier432to allow the control unit330to be connected to the base portion. When the actuation portion334is pressed, the actuation portion334may move along the z-direction until an inner surface458of the actuation member actuates the tactile switch442. The actuation portion334may be returned to the idle position by the tactile switch442. In addition, the control unit330may comprise an additional return spring for returning the actuation portion334to the idle position. For example, the tactile switch442may comprise a double-detent mechanical tactile switch. The tactile switch442may comprise a plurality of overlapping domes (e.g., two overlapping domes), and the control unit330may be configured to determine the plane in which the front surface335of the actuation portion334resides (e.g., the first plane and/or the second plane) based on which of the domes are under pressure (e.g., buckled). For example, a first dome may buckle under low pressure and may be used to indicate that the front surface335of the actuation portion334is in the first plane (e.g., the first plane232), while a second dome may buckle under heavier pressure and may be used to indicate that the front surface335of the actuation portion334is in the second plane (e.g., the second plane234). The batteries340may be adapted to be received within a battery recess462in the carrier432as shown inFIG.4D. The batteries340may be held in place by the battery retention strap342, which may also operate as a negative electrical contact for the batteries and tamper resistant fastener for the batteries. The flexible PCB may comprise a contact pad466that may operate as a positive electrical contact for the batteries340. The battery retention strap342may comprise a leg468that ends in a foot470that may be electrically connected to a flexible pad472(e.g., as shown inFIG.4C) on the flexible PCB430. The battery retention strap342may be held in place by the battery retention screw344received in an opening476in the carrier432. When the battery retention screw344is loosened and removed from the opening476, the flexible pad472may be configured to move (e.g., bend or twist) to allow the battery retention strap342to move out of the way of the batteries340to allow the batteries to be removed and replaced. The control unit330may further comprise a magnetic strip480located on the inner surface416of the rotating portion332and extending around the circumference of the rotating portion. The flexible PCB430may comprise a rotational sensor pad482on which a rotational sensor (e.g., a Hall effect sensor integrated circuit484) may be mounted. The rotational sensor pad482may be arranged perpendicular to the main portion434of the flexible PCB430as shown inFIG.4D. The magnetic strip480may comprise a plurality of alternating positive and negative sections, and the Hall effect sensor integrated circuit484may comprise two sensor circuits operable to detect the passing of the positive and negative sections of the magnetic strip as the rotating portion332is rotated. Accordingly, the control circuit of the control unit330may be configured to determine the rotational speed and direction of rotation of the rotation portion332in response to the Hall effect sensor integrated circuit484. The flexible PCB430may also comprise a programming tab486to allow for programming of the control circuit of the control unit330. As shown inFIG.4D, the carrier432may comprise an actuator opening490adapted to receive the toggle actuator of the light switch when the control unit330is mounted to the base portion. The carrier432may comprise a flat portion492that may prevent the toggle actuator of the light switch from extending into the inner structure of the control unit330(e.g., if the toggle actuator is particularly long). The flexible PCB430may also comprise an antenna494on an antenna tab496that may lay against the flat portion492in the actuator opening490. While the rotating portions214,332and the actuations portions216,334of the control device200and the remote control device310shown and described herein have a circular shape, the rotating portions and the actuation portions could have other shapes. For example, the rotating portions and the actuation portions may a rectangular shape, a square shape, a diamond shape, a triangular shape, an oval shape, a star shape, or any suitable shape. The front surface of the actuations portions216,334and/or the side surfaces of the rotating portions214,332may be planar or non-planar. In addition, the light bars218,336may have alternative shapes, such as a rectangular shape, a square shape, a diamond shape, a triangular shape, an oval shape, a star shape, or any suitable shape. The light bars218,336may be continuous loops, partial loops, broken loops, a single linear bar, a linear or circular array of visual indicators, and/or other suitable arrangement. The surfaces of the control device200and/or the remote control device310may be characterized by various colors, finishes, designs, patterns, etc. FIG.5is a simplified block diagram of an example control device500(e.g., a remote control device), which may be deployed as the remote control devices112-118in the lighting control system100, the control device200, and/or the remote control devices310. The control device500may include a control circuit530, one or more actuators532(e.g., buttons and/or switches), a rotational sensing circuit534, a wireless communication circuit538, a memory540, a battery542, and/or one or more LEDs544. The memory540may be configured to store one or more operating parameters (e.g., such as a preconfigured color scene or a preset light intensity) of the control device500. The battery542may provide power to one or more of the components shown inFIG.5. The one or more actuators532may include a button or switch (e.g., a mechanical button or switch, or an imitation thereof) such as those described in association with the actuation portion216of the control device200and/or the actuation portion334of the remote control device310. For example, the actuators532may comprise a double-detent mechanical tactile switch (e.g., such as the tactile switch442). The actuators532may be configured to send respective input signals to the control circuit530in response to actuations of the actuators532(e.g., in response to movements of the actuators532). The rotational sensing circuit534may be configured to translate a force applied to a rotating mechanism (e.g., such as the rotating portion214of the control device200and/or the rotating portion334of the remote control device310) into an input signal and provide the input signal to the control circuit530. The rotational sensing circuit534may include, for example, one or more magnetic sensors (such as Hall-effect sensors (HES), tunneling magnetoresistance (TMR) sensors, anisotropic magnetoresistance (AMR) sensors, giant magnetoresistance (GMR) sensors, reed switches, or other mechanical magnetic sensors), a mechanical encoder, an optical encoder, and/or a potentiometer (e.g., a polymer thick film or other resistive trace on a printed circuit board). The control circuit530may be configured to translate the input signals provided by the actuators534and/or the rotational sensing circuit534into control data (e.g., digital control signals) for controlling one or more electrical loads. For example, the control circuit530may be responsive to a first-depth actuation (e.g., the first depth-actuation231) and/or a second-depth actuation (e.g., the second depth-actuation233) of one or more of the actuators532(e.g., as described herein for the control device200and/or the remote control device310). The control circuit530may cause the control data (e.g., digital control signals) to be transmitted to the electrical loads via the wireless communication circuit538. For example, the wireless communication circuit538may transmit a control signal including the control data to the one or more electrical loads or to a central controller of the concerned load control system. The control circuit530may transmit a control signal including control data for turning one or more lighting loads on or off in response to an actuation of one of the actuators534. The control circuit530may transmit one or more control signals including control data for adjusting the intensities of one or more lighting loads in response to rotations of the rotating mechanism determined from the rotational sensing circuit534. The control circuit530may transmit one or more control signals including control data for adjusting the color (e.g., the color temperature) of one or more lighting loads in response to rotations of the rotating mechanism while one of the actuators534is being actuated. The control circuit530may illuminated the LEDs544to present a light bar (e.g., such as the light bar218and/or the light bar336) and/or one or more indicator lights to provide feedback about various conditions. When the control circuit530is transmitting control signals including control data for adjusting the intensities of one or more lighting loads, the control circuit may control the LEDs544to illuminate the light bar (e.g., illuminated in a single color, such as white) to display feedback information regarding the present intensity of one or more of the lighting loads. When the control circuit530is transmitting control signals including control data for adjusting the color of one or more lighting loads, the control circuit may control the LEDs544to illuminate the light bar with one or more colors to provide feedback of the present color of one or more of the lighting loads. FIG.6is a simplified block diagram of an example control device600(e.g., a dimmer switch) that may be deployed as, for example, the dimmer switch110of the lighting control system100and/or the control device200. The control device600may include a hot terminal H that may be adapted to be coupled to an AC power source602. The control device600may include a controlled hot terminal CH (e.g., a switched hot and/or a dimmed hot terminal) that may be adapted to be coupled to an electrical load, such as a lighting load604. The control device600may include a controllably conductive device610coupled in series electrical connection between the AC power source602and the lighting load604. The controllably conductive device610may control the power delivered to the lighting load. The controllably conductive device610may include a relay and/or a bidirectional semiconductor switch, such as, for example, a triac, a field-effect transistor (FET) in a rectifier bridge, two FETs in anti-series connection, one or more insulated-gate bipolar junction transistors (IGBTs), or other suitable semiconductor switching circuit. The control device600may include a control circuit614. The control circuit614may include one or more of a processor (e.g., a microprocessor), a microcontroller, a programmable logic device (PLD), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or any suitable controller or processing device. The control circuit614may be operatively coupled to a control input of the controllably conductive device610, for example, via a gate drive circuit612. The control circuit814may be used for rendering the controllably conductive device610conductive or non-conductive, for example, to turn the lighting load604on and off and/or to control the amount of power delivered to the lighting load604. The control circuit614may receive a control signal representative of the zero-crossing points of the AC main line voltage of the AC power source602from a zero-crossing detector616. The control circuit614may be operable to render the controllably conductive device610conductive and/or non-conductive at predetermined times relative to the zero-crossing points of the AC waveform using a phase-control dimming technique. Examples of dimmers are described in greater detail in commonly-assigned U.S. Pat. No. 7,242,150, issued Jul. 10, 2007, entitled DIMMER HAVING A POWER SUPPLY MONITORING CIRCUIT; U.S. Pat. No. 7,546,473, issued Jun. 9, 2009, entitled DIMMER HAVING A MICROPROCESSOR-CONTROLLED POWER SUPPLY; and U.S. Pat. No. 8,664,881, issued Mar. 4, 2014, entitled TWO-WIRE DIMMER SWITCH FOR LOW-POWER LOADS, the entire disclosures of which are hereby incorporated by reference. The control device600may include a memory618. The memory618may be communicatively coupled to the control circuit814for the storage and/or retrieval of, for example, operational settings, such as, lighting presets and associated preset light intensities. The memory618may be implemented as an external integrated circuit (IC) or as an internal circuit of the control circuit614. The control device600may include a power supply620. The power supply620may generate a direct-current (DC) supply voltage VCCfor powering the control circuit614and the other low-voltage circuitry of the control device600. The power supply620may be coupled in parallel with the controllably conductive device610. The power supply620may be operable to conduct a charging current through the lighting load804to generate the DC supply voltage VCC. The control circuit614may be responsive to inputs received from one or more of actuators630and/or a rotational sensing circuit640. The control circuit614may control the controllably conductive device610to turn the lighting load604on and off, adjust the intensity of the lighting load, and/or adjust the color of the lighting load in response to the inputs received via the actuators630and/or the rotational position sensing circuit640. The actuators630may include a button or switch (e.g., a mechanical button or switch, or an imitation thereof) such as those described in association with the actuation portion216of the control device200and/or the actuation portion334of the remote control device310. For example, the actuators630may comprise a double-detent mechanical tactile switch (e.g., such as the tactile switch442). The actuators630may be configured to send respective input signals to the control circuit614in response to actuations of the actuators630. For example, the control circuit614may be responsive to a first-depth actuation (e.g., the first depth-actuation231) and/or a second-depth actuation (e.g., the second depth-actuation233) of one or more of the actuators630(e.g., as described herein for the control device200and/or the remote control device310). The rotary position sensing circuit640may be configured to translate a force applied to a rotating mechanism (e.g., such as the rotating portion214of the control device200and/or the rotating portion332of the remote control device310) into an input signal and provide the input signal to the control circuit614. The rotational position sensing circuit640may include, for example, one or more magnetic sensors (such as Hall-effect sensors (HES), tunneling magnetoresistance (TMR) sensors, anisotropic magnetoresistance (AMR) sensors, giant magnetoresistance (GMR) sensors, reed switches, or other mechanical magnetic sensors), a mechanical encoder, and/or an optical encoder. The control device600may comprise a communication circuit622. The communication circuit622may comprise a wireless communication circuit, for example, a radio-frequency (RF) transceiver coupled to an antenna for transmitting and/or receiving RF signals, an RF transmitter for transmitting RF signals, an RF receiver for receiving RF signals, or an infrared (IR) transmitter and/or receiver for transmitting and/or receiving IR signals. The communication circuit622may also comprise a wired communication circuit configured to be coupled to a wired control link, for example, a digital communication link and/or an analog control link, such as a 0-10V control link or a pulse-width modulated (PWM) control link. In addition, the communication circuit622may be coupled to the electrical wiring between the control device600and the lighting load604and may be configured to transmit a control signal to the lighting load604via the electrical wiring using, for example, a power-line carrier (PLC) communication technique. The communication circuit622may be configured to transmit a control signal that includes the control data (e.g., a digital message) generated by the control circuit614to the lighting load604. As described herein, the control data may be generated in response to a user input to adjust one or more operational aspects of the lighting load604. The control data may include a command and/or identification information (e.g., such as a unique identifier) associated with the control device600. In addition to or in lieu of transmitting the control signal to the lighting load604, the communication circuit622may be controlled to transmit the control signal to a central controller of the lighting control system. The control circuit614may be configured to turn the lighting load on and off by rendering the controllably conductive device610conductive and non-conductive in response to an actuation of one of the actuators630. The control circuit614may be configured to transmit digital messages to the lighting load604via the communication circuit622for adjusting the intensity of the lighting load in response to rotations of the rotating mechanism determined from the rotational sensing circuit640. In addition, the control circuit614may be configured to control the controllably conductive device610using the phase control technique to adjust the intensity of the lighting load in response to rotations of the rotating mechanism determined from the rotational sensing circuit640. The control circuit614may be configured to transmit digital messages to the lighting load604via the communication circuit622for adjusting the color of the lighting load in response to rotations of the rotating mechanism while one of the actuators630is being actuated. The control circuit614may be configured to illuminate one or more light sources, e.g., LEDs650, to provide feedback of a status of the lighting load604, to indicate a status of the control device600, and/or to assist with a control operation (e.g., to provide a color gradient for controlling the color of the lighting load604, etc.). The LEDs650may be configured to illuminate one or more visual indicators, such as a light bar (e.g., the light bar218and/or the light bar336), to serve as indicators of various conditions. When the rotating mechanism is being rotated to adjust the intensity of the lighting load604, the control circuit614may control the LEDs650to illuminate the light bar (e.g., illuminated in a single color, such as white) to display feedback information regarding the present intensity of the lighting load604. When the rotating mechanism is being rotated while one of the actuators630is being actuated in order to adjust the color of the lighting load604, the control circuit614may control the LEDs650to illuminate the light bar with one or more colors to provide feedback of the present color of the lighting load604. It should be noted that although the control device (e.g., the control device200,310,500or600) has been described or depicted herein as comprising a rotating mechanism (e.g., such as a rotary knob or a dial) for receiving user inputs, other types of user input mechanisms may also be implemented on the control device (e.g., in addition to or in lieu of a rotary knob or a dial). These mechanisms may include, for example, a button or switch or an imitation thereof, and/or a touch sensitive device (e.g., such as a capacitive touch surface) configured to detect both point actuations and gestures. In examples, the button, switch and/or touch sensitive device may comprise an actuation portion defined by an upper portion and a lower portion. The actuation portion may be configured to pivot (e.g., about a pivot axis) in response to an actuation of the upper portion or the lower portion, and either or both of the upper portion and the lower portion may be capable of being actuated into different planes along an axis perpendicular to a base portion, as described herein. FIG.7shows a simplified flowchart of an example control procedure700that may be executed by a control circuit of a control device (e.g., the control circuit530of the control device500and/or the control circuit614of the control device600) for controlling multiple characteristics of one or more electrical loads, such as lighting loads. The control circuit may use the control procedure700to determine a depth that a front surface of an actuation portion (e.g., the front surface215,335of the actuation portion216,336) is pressed towards a faceplate (e.g., the faceplate212) to detect a first-depth actuation (e.g., the first-depth actuation231) or a second-depth actuation (e.g., the second-depth actuation233) of the front surface of the actuation portion. That is, the control circuit may determine a plane in which the front surface of the actuation portion resides during the first-depth actuation and/or the second-depth actuation. The control device may operate differently (e.g., control different characteristics of the lighting loads and/or change operating modes) based on which of the first-depth actuation and the second-depth actuation are applied to the front surface of the actuation portion and/or on how long the front surface of the actuation portion is maintained in the corresponding planes, for example, as described herein. As shown inFIG.7, the control procedure700may begin at702when a first-depth actuation of the actuation portion is detected by the control circuit, that is, when the control circuit detects that the front surface of the actuation portion is pressed from an idle plane (e.g., the idle plane230) into a first plane (e.g., the first plane232). Upon detecting the first-depth actuation of the actuation portion, the control circuit may start a timer at704. The timer may be used to determine a duration in which the front surface of the actuation portion is maintained in a plane. At706, the control circuit may determine whether a second-depth actuation of the actuation portion has been detected, that is, when the control circuit detects that the front surface of the actuation portion is placed into a second plane (e.g., the second plane234). If the control circuit does not detect a second-depth actuation of the actuation portion, the control circuit may determine at708whether a first time period (e.g., a first timeout) has expired since the beginning of the first-depth actuation (e.g., based on the timer started at704). If the first time period (e.g., the first timeout) has not expired, the control circuit may further determine whether the actuation portion has returned to the idle plane at710(e.g., determine whether the user has released the actuation portion and is no longer pressing the actuation portion towards the faceplate). If the control circuit determines that the actuation portion has been released at710, the control circuit may generate first control data (e.g., for controlling a first characteristic of the loads) at712, after which the control procedure700may exit. If the control circuit determines that the actuation portion has not been released at710, the control circuit may return to706to determine whether a second-depth actuation has occurred. If the control circuit determines that a second-depth actuation has not occurred at706and that the first time period (e.g., the first timeout) has expired at708, the control circuit may generate second control data (e.g., for controlling a second characteristic of the loads) at714, after which the control procedure700may exit. If the control circuit detects a second-depth actuation at at706, the control circuit may determine at716whether a second time period (e.g., a second timeout) has expired since the beginning of the second-depth actuation (e.g., based on the timer started at704). If the second time period (e.g., the second timeout) has not expired, the control circuit may further determine whether the actuation portion has returned to the idle plane at718(e.g., determine whether the user has released the actuation portion and is no longer pressing the actuation portion towards the faceplate). If the control circuit determines that the actuation portion has been released at718, the control circuit may generate third control data (e.g., for controlling a third characteristic of the loads) at720, after which the control procedure700may exit. If the control circuit determines that the actuation portion has not been released at718, the control circuit may return to716to continue to check whether the second time period (e.g., the second timeout) has expired. Once the second time period expires (e.g., before the actuation portion is released), the control circuit may generate fourth control data (e.g., for controlling a fourth characteristic of the loads) at722, after which the control procedure700may exit. It should be noted that one or more of the steps described herein in association with the control procedure700may be omitted without affecting the basic features of the proposed techniques. Similarly, one or more extra steps may be added to the control procedure700to facilitate those basic features. FIGS.8A and8Bshow simplified flowcharts of an example control procedure800that may be executed by a control circuit of a control device (e.g., the control circuit530of the control device500and/or the control circuit614of the control device600) for controlling multiple characteristics of one or more electrical loads, such as lighting loads. The control circuit may use the control procedure800to determine a depth that a front surface of an actuation portion (e.g., the front surface215,335of the actuation portion216,336) is pressed towards a faceplate (e.g., the faceplate212) to detect a first-depth actuation (e.g., the first-depth actuation231) or a second-depth actuation (e.g., the second-depth actuation233) of the front surface of the actuation portion. That is, the control circuit may determine a plane in which the front surface of the actuation portion resides during the first-depth actuation and/or the second-depth actuation. The control device may operate differently (e.g., control different characteristics of the lighting loads and/or change operating modes) based on which of the first-depth actuation and the second-depth actuation are applied to the front surface of the actuation portion and/or on how long the front surface of the actuation portion is maintained in the corresponding planes, for example, as described herein. As shown inFIG.8A, the control procedure800may begin at802when a first-depth actuation of the actuation portion is detected by the control circuit, that is, when the control circuit detects that the front surface of the actuation portion is pressed from an idle plane (e.g., the idle plane230) into a first plane (e.g., the first plane232). Upon detecting the first-depth actuation of the actuation portion, the control circuit may start a timer at804, and determine whether the control device is associated with any lighting loads at806. Further, in some examples, the control circuit may be asleep (e.g., in a low power mode) upon detecting the first-depth actuation, and the control circuit may wake up from the sleep state upon detecting the first-depth actuation of the actuation portion216. If the control circuit determines that the load control device is associated with at least one lighting load at806, then the control circuit may transmit a query (e.g., a query message) to determine the intensity levels of the one or more lighting loads at808. For example, the control circuit may transmit (e.g., wirelessly transmit) a message to one or more of the associated lighting loads and/or to a central controller querying the intensity levels of the associated lighting loads. At810, the control circuit may determine whether the lighting loads are off. If the control circuit determines that the lighting loads are off at810, then the control circuit may transmit a command to turn on the lighting loads at812(e.g., transmit a comment to instruct the lighting loads to go to a preset intensity level). At814, the control circuit may determine whether a second-depth actuation of the actuation portion has been detected, that is, when the control circuit detects that the front surface of the actuation portion is placed into a second plane (e.g., the second plane234). If the control circuit does not detect a second-depth actuation of the actuation portion, the control circuit may determine whether the actuation portion has returned to the idle plane at816(e.g., determine whether the user has released the actuation portion and is no longer pressing the actuation portion into the faceplate). If the control circuit does not detect a second-depth actuation of the actuation portion at814, before the actuation portion is release at816, then the control procedure800may end. If the control circuit determines that one or more of the lighting loads are on at810, the control circuit may determine whether a second-depth actuation of the actuation portion has been detected at818. If the control circuit does not detect a second-depth actuation at818, the control circuit may determine whether the actuation portion is released at820prior to a first timeout (e.g., approximately three seconds) at822. If the actuation portion is released prior to the first timeout, the control circuit may transmit a command to turn off the lighting loads at824, and the control procedure800may exit. If the actuation portion is not released prior to the first timeout, the control circuit may determine whether the actuation portion is placed in the second plane (e.g., detect a second detent of the actuation portion) at830. When the first timeout is reached at822, the control circuit may generate a preset animation at826(e.g., by blinking one or more visual indicators, such as the light bar218) and store a preset level for the lighting loads at828, before the procedure800exits. For example, the control circuit may determine the present intensity levels of the associated lighting loads and store the present intensity levels of the lighting loads as a preset at834. The preset may be used, for example, at812during future actuations of the actuation portion. Referring toFIG.8B, if the control circuit detects the second-depth actuation of the actuation portion at814or818, the control circuit may determine if the front surface of the actuation portion has returned to the idle plane at830(e.g., determine whether the user has released the actuation portion and is no longer pressing the actuation portion towards the faceplate). If the actuation portion has not been released at830, the control circuit may determine if a second timeout (e.g., six seconds) has occurred at832. The second timeout may be determined based on when the timer started at804. When the control circuit detects the second-depth actuation of the actuation portion, but the second timeout has not occurred at832, the control device may provide an association animation at834(e.g., by blinking or strobing one or more visual indicators, such as the light bar218). If the second timeout has not occurred by the time the actuation portion is released at830, then the control procedure800may exit. However, if the second timeout occurs prior to the actuation portion being released (e.g., the user presses the actuation portion into the second plane for at least the amount of time of the second timeout), the control circuit may execute an association procedure at836. During the association procedure, the control device may be associated with one or more electrical loads. It should be noted that if the control circuit determines that the control device is not associated with any electrical loads at806, the control device proceed to814, and possibly to836to perform the association procedure. After the control circuit executes the association procedure at822, the control procedure800may exit. It should be noted that one or more of the steps described herein in association with the control procedure800may be omitted without affecting the basic features of the proposed techniques. Similarly, one or more extra steps may be added to the control procedure800to facilitate those basic features. Although described with reference to color and intensity, the control circuit (e.g., via the control procedure700and/or800) may generate control signals for adjusting any type of characteristic of an electrical load in response to a rotation of the rotating mechanism when the rotating mechanism is in a particular plane. For example, the characteristics may be any of intensity, color (e.g., color temperature), volume, music selection, HVAC mode (e.g., air conditioning on/off, heat on/off, temperature, fan speed, etc.), ceiling fan speed, relative height/location of a motorized window treatment, or any of adjustable characteristics of the electrical loads described herein. Further, although described with reference to controlling a single electrical load, the control circuit may be configured to control a characteristic of one or more electricals load in response to a rotation of the rotating mechanism in the first plane, and another potentially different characteristic of one or more potentially different electrical loads in response to a rotation of the rotating mechanism in the second plane (e.g., and a third characteristic of one or more potentially different electrical loads in response to a rotation of the rotating mechanism in the third plane, etc.). | 80,348 |
11942288 | BEST MODE FOR CARRYING OUT THE INVENTION The present invention will now be described in detail with reference to embodiments thereof as illustrated in the accompanying drawings. Referring to the drawings,FIGS.1to6show an emergency stop switch (or operation switch unit) with an operation support function and an operation support system employing the emergency stop switch according to an embodiment of the present invention. In these drawings,FIGS.1to3illustrate an entire operation support system.FIGS.4and5illustrate a schematic structure of the emergency stop switch.FIG.6illustrates a schematic block diagram of the operation support system. As shown inFIGS.1to3, the operation support system1includes a robot R. A worker (or an operator) P is near the robot R. The robot R may be a collaborative (or a cooperative) robot that performs work in collaboration (or cooperation) with the worker P. During operation, the robot R may pick up a work W on a sub-table T′ by a hand at a distal end of a robot arm Ra and put it sequentially at a predetermined position in a tray t disposed on a work table T. On the other hand, the worked P may put the work W sequentially at a vacant position on the sub-table T′ during operation of the robot R. A programmable display device50may be disposed on the work table T. The programmable display device50may have a display such as an LCD (Liquid Crystal Display) or an organic EL (electroluminescence) display and store a control program of the robot R. Safety laser scanners51may be disposed on a side surface, for example, respective opposite side surfaces, and a rear surface of the table T. Each of the laser scanners51detects an approach of the worker P or other persons. An emergency stop switch (or operation switch unit)2with an operation support function is disposed on a front surface of the table T to emergently stop the robot R. The worker P has a portable (or wearable) wireless terminal (or remote operation terminal)4mounted on a wrist of a hand. The wireless terminal4performs a remote control of the emergency stop button (or operation switch)21of the emergency stop switch2and it includes a push button40operable by the other hand or finger of the worker P and a belt45holding the push button40and wrapped around the wrist of the worker P. A graphical light53may be fitted near the table T. The graphical light53informs the worker P of an advance information of the robot R by irradiating a next mobile spot with a light where the robot hand at a distal end of the robot arm Ra moves to. A two-dimensional code scanner54may be disposed on the sub-table T′ to read a two-dimensional code, or a work information assigned to the work W. Then, the internal structure of the emergency stop switch2will be explained hereinafter in reference toFIGS.4and5. FIG.4shows the state of non-operation of the emergency stop switch andFIG.5shows the state of operation of the emergency stop switch. In these drawings, hatching is omitted for illustration purposes. As shown inFIGS.4and5, the emergency stop switch2includes the following elements: a case (or housing)20; an emergency stop button (or operation switch)21that is provided at one end of the case20, that is slidably supported in the axial direction in the case20, and that has a pressure surface (or manual operation surface)21ato be pushed (or manually operated) by the worker P; a shaft portion (or operation shaft)22that extends axially in the case20, that is connected to a rear surface on the opposite side of the pressure surface21aof the emergency stop button21and that is provided so as to move linked with the operation of the emergency stop button21; a movable contact23fitted to a distal end of the shaft portion22and movable in a moving direction of the shaft portion22; and a fixed contact24that is fixedly attached to an internal wall surface of the case20, that is disposed opposite the movable contact23and that makes contact with and separates from the movable contact23. In this exemplification, the contact of the emergency stop switch2is composed of a pair of movable contacts23and a pair of fixed contacts24. The emergency stop button21is disposed on one end side of the emergency stop switch2and the contact is disposed on the other end side of the emergency stop switch2. The emergency stop button21is provided so as to switch the state of the contact. The respective fixed contacts24have respective terminal strips351,352connected thereto. The emergency stop switch2further comprises an electromagnetic solenoid (or actuating part)3provided inside the case20to actuate the emergency stop button21; a reception part (or detection part)32fitted to an external wall surface of the case20and receiving a radio signal from the wireless terminal4(that is, detecting the remote operation); and a control circuit33that controls a drive of the solenoid3on the basis of the remote signal received (or detected) by the reception part32. The solenoid3is disposed between the contact and the emergency stop button21. Also, the solenoid3includes a solenoid body (or electromagnetic coil portion)30. The solenoid body30holds the shaft portion22slidably in an axial direction. The solenoid body30acts on the shaft portion22to move axially. The control circuit33is connected to the solenoid3through a lead wire34. The shaft portion22has a flange part22aprotruding radially outwardly in the middle of the shaft portion22. On the internal wall surface of the case20, a projection part20aprojecting radially inwardly is provided. The projection part20ais disposed opposite the flange part22avia a predetermined axial distance from the flange part22a. Between the flange part22aand the projection part20a, a coil spring (or a basing means)25is disposed in a compressed state. One end of the coil spring25is in contact and engagement with the flange part22ato move along with the shaft portion22. The other end of the coil spring25is in contact and engagement with the projecting part20ato be connected to the case20. The coil spring25imparts an elastic repulsion (or biasing force) to the projecting part20aand the flange part22a. Such an elastic repulsion biases the movable contact23away from the fixed contact24, that is, in a contact-opening direction (or to the side from an ON state to an OFF state of the emergency stop button21, i.e. to the right side ofFIG.4). In this example, the axial line of the coil spring25coincides with the axial line of the shaft portion22. The elastic repulsion of the coil spring25acts in a push direction (or operation direction) of the emergency stop button21and in an operative direction of the solenoid3relative to the shaft portion22. Also, at the time of non-operation (or before operation) of the emergency stop switch2shown inFIG.4, the coil spring25is in a maximum compressive state between the projecting part20aand the flange part22a. The elastic repulsion of the coil spring25is at a maximum value and the coil spring25holds the greatest elastic energy. To the contrary, at the time of operation of the emergency stop switch2shown inFIG.5, the coil spring25extends axially from the state ofFIG.4. The elastic repulsion of the coil spring25decreases and thus the elastic energy of the coil spring25reduces. The shaft portion22includes a protruding part22bthat protrudes radially outwardly in the vicinity of the emergency stop button21. The protruding part22bhas a trapezoidal shape with a pair of inclined surfaces in a longitudinal section. On the other hand, there are provided a pair of engagement members26in the case20. Each of the engagement members26has a pair of inclined surfaces that are engageable with the corresponding inclined surfaces of the protruding part22b. Each of the engagement members26is biased toward the corresponding protruding part22bby an elastic repulsion of a spring27disposed in the case20. At the time of non-operation shown inFIG.4, the left-hand-side inclined surface of the engagement member26as shown in the drawing engages with the right-hand-side inclined surface of the protruding part22bas shown in the drawing, whereas at the time of operation shown inFIG.5, the right-hand-side inclined surface of the engagement member26as shown in the drawing engages with the left-hand-side inclined surface of the protruding part22bas shown in the drawing. In such a way, in order for the emergency stop button21to be pushed, the protruding part22bof the shaft portion22needs to securely climb over the corresponding engagement member26. Therefore, the protruding part22b, the engagement member26and the spring27constitute a safety Lock® mechanism2A of the emergency stop switch2in which the contact will not open unless the emergency stop button21is operated securely. A part of the case20that accommodates the electromagnetic solenoid3, the coil spring25, the protruding part22bof the shaft portion22and the engagement member26corresponds to an operation part20A. The other part of the case20that accommodates the contact composed of the movable contact23and the fixed contact24corresponds to a contact part20B. On one end side of the operation part20A, the emergency stop button21is disposed and on the other end side of the operation part20A, the contact part20B is disposed. Next,FIG.6shows a schematic block diagram of the operation support system1. As shown inFIG.6, the operation support system1includes a computer (PC)100for programming, data-inputting and display-outputting, a programmable logic controller (PLC)101connected to PC100, and a programmable display device (PDD)50connected to PLC101. A robot control program is stored in PLC101/PDD50. Also, the laser scanner (LS)51, the two-dimensional code scanner54, the emergency stop switch2, a robot drive102including an actuator and a motor, the graphical light53, and an emergency stop lamp/buzzer103are connected to PLC101/PDD50. In addition, the constitution of the operation support system1according to the present invention is not limited to that ofFIG.6. Either PC100, PLC101or PDD50may be omitted. In this example, the portable-type wireless terminal4is composed of a plurality of wireless terminals41,42, . . . (InFIG.6, only two terminals41and42are shown). The wireless terminal41may have a wireless module fitted therein, which includes a push button401, a transmission part411, a reception part421, a display part431, and a control circuit441which the above-mentioned elements are connected to. Similarly, the wireless terminal42may have a wireless module fitted therein, which includes a push button402, a transmission part412, a reception part422, a display part432, and a control circuit442which the above-mentioned elements are connected to. The wireless terminals41and42may be respectively held by workers P1and P2both of whom work near the robot R. Alternatively, the wireless terminal41may be held by the worker P who works near the robot R and the wireless terminal42may be held by a supervisor who supervises the worker P at a place away from the robot R. The transmission parts411and412are provided for transmitting an operation (or stop) signal to operate the emergency stop switch2wirelessly when the pushbuttons401and402are pressed. The transmission parts411and412are transmissible wirelessly relative to the reception part32of the emergency stop switch2. The reception part421(or422) is provided for receiving a stop signal transmitted from the transmission part412(or411) of another wireless terminal42(or41). That is, the transmission parts411,412and the reception parts421,422of the wireless terminals41,42are mutually radio-transmissible. The display parts431,432are provided for display-illumination such as lighting when the worker presses the push buttons401,402, display-illumination such as blinking/flickering when another worker presses the push button first, indication of a radio wave intensity level, alarm-display of a dead battery and a radio communication disabled state, and the like. For example, radio communications that may be used in this embodiment of the present invention are as follows: Wi-Fi® communication, BLUETOOTH® communication, ZIGBEE® communication, BLE (Bluetooth® Low Energy communication) communication, WiMAX® communication, infrared communication, and the like. Next, actions and effects of the present invention will be explained hereinafter. During operation, the robot R is operated in accordance with the robot control program stored in the PLC101/PDD50. The worker P does jobs such as placing the work W on the sub-table T′ in accordance with the predetermined procedures. The robot R performs work in cooperation with the worker P. At this time, as shown inFIG.4, the emergency stop switch2is in the state of non-operation that the emergency stop button21is not pressed. The movable contact23and the fixed contact24are in contact with one other and the contact is in an ON state. When the worker P press-operates (or manually operates) the emergency stop button21of the emergency stop switch2during operation of the robot R, the shaft portion22is pressed inwardly along with the emergency stop button21(that is, in conjunction with the operation of the emergency stop button21). Then, with the movement of the shaft portion22, the inclined surfaces of the protruding parts22bof the shaft portion22climb over the corresponding inclined surfaces of the engagement members26against the elastic repulsion of the spring27, such that thereby the state shown inFIG.4is shifted to the state shown inFIG.5. At this time, the other inclined surfaces of the protruding parts22bof the shaft portion22come into engagement with the other inclined surfaces of the engagement members26. Also, the movable contact23moves along with the shaft portion22and away from the fixed contact24, such that thereby the contact shifts from the ON state to the OFF state. As a result, the operation of the robot R stops. In this case, at the time of movement of the shaft portion22, an electric current is not supplied to the solenoid body30holding the shaft portion22. Therefore, there is no sliding resistance during movement of the shaft portion22, thus allowing for the shaft portion22to move smoothly (that is, without a load). Accordingly, a press-operation of the emergency stop switch2by the worker P can be performed exactly in the same manner as a press-operation of a conventional emergency stop switch without an electromagnetic solenoid. Then, when performing a resetting operation for restoring the emergency stop button21to the original state shown inFIG.4from the state shown inFIG.5, the worker P grasps the emergency stop button21to pull it forward or toward the front side (that is, operate it manually). Then, due to the movement of the shaft portion22, the other inclined surfaces of the protruding parts22bof the shaft portion22climb over the corresponding other inclined surfaces of the engagement members26against the elastic repulsion of the spring27, such that thereby the state shown inFIG.5is shifted to the state shown inFIG.4. At this time, the inclined surfaces of the protruding parts22bof the shaft portion22come into engagement with the inclined surfaces of the engagement members26. Also, the movable contact23moves along with the shaft portion22and comes into contact with the fixed contact24, such that thereby the contact shifts from the OFF state to the ON state. As a result, the operation of the robot R restarts. In addition, regarding the resetting operation of the emergency stop button21, by adopting a locking mechanism such as a push-lock and turn-reset mechanism, the locking state held by the internal locking mechanism (not shown) at the time of push-operation of the emergency stop button21may be unlocked by turning the emergency stop button21. On the other hand, during operation of the robot R, when the worker P presses the push button40(401or402) of the wireless terminal4(41or42), the transmission part411(412) of the wireless terminal4(41or42) transmits an operation (or stop) signal (seeFIG.6). The operation signal transmitted from the wireless terminal4(41or42) is received by the reception part32of the emergency stop switch2and inputted to the control circuit33. Then, an electric current is supplied from the control circuit33to the solenoid body30of the solenoid3, such that thereby the shaft portion22is drawn into the solenoid body30of the solenoid3to move to the right-hand side inFIG.5. At this time, a collaborative relationship between the inclined surfaces of the protruding parts22band the corresponding inclined surfaces of the engagement member26is similar to that of a push-operation of the emergency stop button21. The movable contact23moving along with the shaft portion22travels away from the fixed contact24, such that thereby the contact is shifted from the ON state to the OFF state. As a result, the operation of the robot R stops. At this juncture, the emergency stop button21is in a pushed-in state by moving along with the shaft portion22. Such a state is exactly the same as a state in which the worker P manually press-operates the emergency stop button21. When performing a resetting operation for restoring the emergency stop button21to the original state shown inFIG.4from the state shown inFIG.5, after the electric current supply to the solenoid3has been stopped, the worker P grasps the emergency stop button21to pull it forward or toward the front side (that is, operate it manually) as with the push-operation of the emergency stop button21. Alternatively, as mentioned above, by employing the locking mechanism such as the push-lock and turn-reset mechanism, the locking state held by the internal locking mechanism at the time of push-operation of the emergency stop button21may be unlocked by turning the emergency stop button21. According to the present embodiment, the remote operation of the emergency stop switch2by the wireless terminal4is detected by the reception part32of the emergency stop switch2and the emergency stop switch2is actuated based on the remote operation to open the movable contact23and the fixed contact24that are in contact with one another. Thereby, the emergency stop switch2can be operated even at a place away from the emergency stop switch2. Accordingly, even in the situation that the worker P cannot push the emergency stop button21directly, an operation support of the emergency stop switch2can be performed thus improving an operability and safety. Also, according to the present embodiment, the electromagnetic solenoid3is disposed between the contact and the emergency stop button21, that is, the contact is disposed on the opposite side of the emergency stop button21with the solenoid interposed therebetween. The contact can thus be disposed on the end side of the case20of the emergency stop switch2. Thereby, a connection with the contact can be made using short terminal strips351,352, thus simplifying the structure to reduce a cost and improving reliability. To the contrary, in the case that the contact is disposed at a position away from the end of the case20of the emergency stop switch2, when connecting the contact with a terminal strip on the end side of the case20, an internal wiring is needed thus making the structure complicated to increase a cost, such that thereby reliability may be decreased. Moreover, according to the present embodiment, the coil spring25biases the movable contact23to the opening side relative to the fixed contact24at all times (that is, before and after operations of the emergency stop switch2). Accordingly, especially after operation of the emergency stop switch2, when a malfunction of the emergency stop switch2occurs such that the movable contact23returns to the state in contact with the fixed contact24, both of the contacts23,24are biased to open by the action of an elastic repulsion of the coil spring25and the contacts23,24can be maintained in an open state. Therefore, the movable contact23and the fixed contact24are not made contacted to one other thus securing safety. Furthermore, according to the present embodiment, since the elastic repulsion of the coil spring25is imparted in a push direction of the emergency stop button21, when the movable contact23is caused to forcibly open relative to the fixed contact24by a push operation of the emergency stop button21, the elastic repulsion of the coil spring25acts in the same direction as the push direction of the emergency stop button21. As a result, the movable contact23can be caused to open relative to the fixed contact24more securely. Also, since the elastic repulsion of the coil spring25acts in an actuating direction of the solenoid3relative to the shaft portion22, a load can be relieved at the time of operating the emergency stop button21by the solenoid3, thereby decreasing an output of the solenoid3and reducing a cost. According to the present embodiment, the elastic repulsion of the coil spring25after operation of the emergency stop switch2is decreased relative to the elastic repulsion of the coil spring25before operation of the emergency stop switch2. Therefore, after operation of the emergency stop switch2, an elastic energy held by the coil spring25is decreased and thus the elastic energy of the coil spring25after opening of the contact is lower than the elastic energy of the coil spring25before opening of the contact. As a result, even in the case that the emergency stop switch2has malfunctioned after operation of the emergency stop switch2, the movable contact23and the fixed contact24will not return to the state in contact with one other thus further enhancing safety. In the present embodiment, as a most preferred embodiment, an example was shown in which an action direction of the elastic repulsion of the coil spring25coincides with an action direction of the solenoid3, but both action directions do not entirely coincide with one other. For example, the elastic repulsion of the coil spring25may act at an angle to the action direction of the solenoid3. Even in such a case, an axial component of the elastic repulsion coincides with the action direction of the solenoid3, which can be expected a certain degree of effect. Similarly, in the present embodiment, as a most preferred embodiment, an example was shown in which the action direction of the elastic repulsion of the coil spring25coincides with a push direction of the emergency stop button21, but both action directions do not entirely coincide with one other. For example, the elastic repulsion of the coil spring25may act at an angle to the axial direction of the shaft portion22. Even in such a case, the axial component of the elastic repulsion coincides with the push direction of the emergency stop button21, which can be expected a certain degree of effect. In the present embodiment, in preparation for the case that the solenoid body30cannot draw the shaft portion22inwardly due to a contact welding or the like of the movable contact23and the fixed contact24, a buzzer, a speaker or an indicating lamp may be installed in order to give notice to surrounding workers by means of voice or light. First Alternative Embodiment In the above-mentioned first embodiment, an example was shown in which the electromagnetic solenoid3is disposed between the coil spring25(and the safety Lock® mechanism2A) and the contact, but the application of the present invention is not restricted to such an example. FIGS.7and8show an emergency stop switch (i.e. operation switch unit) according to a first alternative embodiment of the present invention.FIG.7illustrates the state of non-operation of the emergency stop switch, which corresponds toFIG.4of the above-mentioned first embodiment, andFIG.8illustrates the state of operation (or manual/remote operation) of the emergency stop switch, which corresponds toFIG.5of the above-mentioned first embodiment. In FIGS. and8, like reference numbers indicate identical or functionally similar elements to those in the above-mentioned first embodiment. As shown inFIGS.7and8, the electromagnetic solenoid3is disposed between the emergency stop button21and the coil spring25(and the safety Lock® mechanism2A), which is in common with the above-mentioned first embodiment in that the contact is disposed on the opposite side of the emergency stop button21with the solenoid3interposed therebetween. Therefore, the effect of the first alternative embodiment is similar to that of the above-mentioned first embodiment and thus the detailed explanation is omitted here. However, regarding the position of the solenoid3, the first alternative embodiment differs from the above-mentioned first embodiment in that the solenoid3is located on the front side (or to the left side of the drawing) of the safety Lock® mechanism2A inFIG.7whereas the solenoid3is located on the back side (or to the right side of the drawing) of the safety Lock® mechanism2A inFIG.4. In the above-mentioned first embodiment, the solenoid3acts on the protruding parts22bof the shaft portion22so as to be drawn relative to the engagement members26, whereas in the first alternative embodiment the solenoid3acts on the protruding parts22bof the shaft portion22so as to be pushed relative to the engagement members26. Second Alternative Embodiment In the above-mentioned first embodiment and the first alternative embodiment, an example was shown in which the safety Lock® mechanism2A is disposed immediately adjacent (that is, abutting on) the coil spring25, but the application of the present invention is not limited to such an embodiment. The safety Lock® mechanism2A may be disposed at a distance from the coil spring25. In that case, the solenoid3may be disposed between the safety Lock® mechanism2A and the coil spring25. Third Alternative Embodiment In the above-mentioned first embodiment and the first and second alternative embodiments, an example was shown in which the movable contact23is so structured as to move along the moving direction of the shaft portion22, but the application of the present invention is not restricted to such an example.FIGS.9and10show an emergency stop switch (or an operation switch unit) according to a third embodiment of the present invention.FIG.9illustrates the state of non-operation of the emergency stop switch, which corresponds toFIG.4of the above-mentioned first embodiment, andFIG.10illustrates the state of operation (or manual/remote operation) of the emergency stop switch, which corresponds toFIG.5of the above-mentioned first embodiment. InFIGS.9and10, like reference numbers indicate identical or functionally similar elements to those in the above-mentioned first embodiment. In the third alternative embodiment, as shown inFIGS.9and10, the distal end part of the shaft portion22is not straight but crank-shaped. That is, the distal end part of the shaft portion22is composed of a first shaft portion22A extending linearly in the axial direction, a second shaft portion22B extending from the distal end of the first shaft portion22A at an angle to the axial direction of the first shaft portion22A, and a third shaft portion22C extending from the distal end of the second shaft portion22B parallel to the axial direction of the first shaft portion22A. These first to third shaft portions22A to22C are integrated with one another. By such a structure, between the first shaft portion22A and the second shaft portion22B, a stepped portion (or inclined portion/engagement recess)22b1is formed. Between the second shaft portion22B and the third shaft portion22C, a stepped portion (or inclined portion/engagement recess)22b2is formed. In this exemplification, the stepped portion22b1is formed of a single inclined surface and the stepped portion22b2is formed of two inclined surfaces that intersect. On the other hand, a first contact281and a second contact282are disposed opposite one another with the distal end part of the shaft portion22interposed therebetween. The first and second contacts281and282are shiftable in the direction intersecting (in this example, perpendicular to) the axial direction of the first shaft portion22A and the third shaft portion22C, that is, in the direction intersecting (in this example, perpendicular to) the moving direction of the shaft portion22. By such a motion, the contact is so structured as to be switched. The first and second contacts281,282are connected to the terminal strips351,352, respectively. The first contact281has a projecting part (i.e. inclined part/engagement projection) formed of for example, inclined surfaces, which is provided to come into contact and engagement with the stepped portion22b2of the shaft portion22. Likewise, the second contact282has a projecting part (i.e. inclined part/engagement projection) formed of inclined surfaces, which is provided to come into contact and engagement with the stepped portion22b1of the shaft portion22. The first contact281is biased toward the shaft portion22through the elastic repulsion of the spring291. Similarly, the second contact282is biased toward the shaft portion22through the elastic repulsion of the spring292. A part of the case20that accommodates the first and second contacts281and282corresponds to the contact part20B. As shown inFIG.9, in the state of non-operation of the emergency stop switch2, the first contact281extends toward the shaft portion22by the elastic repulsion of the spring291and the projecting part contacts and engages with the stepped portion22b2, such that thereby the first contact281is in an ON state. To the contrary, the second contact282is retracted on the side of the case20against the elastic repulsion of the spring292and the projecting part contacts the outer peripheral surface of the third shaft portion22C, such that thereby the second contact28sis in an OFF state. In such a way, when the first contact281is in the ON state and the second contact282is in the OFF state, the contact of the emergency stop switch2is in the ON state. As shown inFIG.10, in the state of operation (i.e. manual operation/remote operation) of the emergency stop switch2, the first contact281is retracted on the side of the case20against the elastic repulsion of the spring291and the projecting part contacts the outer peripheral surface of the first shaft portion22A, such that thereby the first contact281is in an OFF state. To the contrary, the second contact282extends toward the shaft portion22by the elastic repulsion of the spring292and the projecting part contacts the outer peripheral surface of the first shaft portion22A, such that thereby the second contact282is in an ON state. In such a way, when the first contact281is in the OFF state and the second contact282is in the ON state, the contact of the emergency stop switch2is in the OFF state. At the time of manual operation or remote operation of the emergency stop switch2, the emergency stop switch2moves onto the state of operation shown inFIG.10from the state of non-operation shown inFIG.9. At this time, the first contact281climbs over the stepped portion22b2to contact the outer peripheral surface of the first shaft portion22A, and the second contact282travels over the stepped portion22b1to contact the outer peripheral surface of the first shaft portion22A. Also, at the time of resetting of the emergency stop switch2, the emergency stop switch2moves onto the state of non-operation shown inFIG.9from the state of operation shown inFIG.10. At this time, the second contact282climbs over the stepped portion22b1to contact the outer peripheral surface of the third shaft portion22C, and the first contact281contacts and engages with the stepped portion22b2. According to the third alternative embodiment, the remote operation of the emergency stop switch2is detected by the reception part32of the emergency stop switch2and the emergency stop switch2is actuated based on the remote operation to move the shaft portion22, such that thereby the ON/OFF states of the first and second contacts281,282are changed to switch the contact of the emergency stop switch2into the OFF state. Thereby, the emergency stop switch2can be operated even at a place away from the emergency stop switch2. Accordingly, even in the situation that the worker P cannot push the emergency stop button21directly, an operation support of the emergency stop switch2can be performed, thus improving an operability and safety. Also, according to this alternative embodiment, as with the above-mentioned first embodiment, the electromagnetic solenoid3is disposed between the contact and the emergency stop button21, that is, the contact is disposed on the opposite side of the emergency stop button21with the solenoid interposed therebetween. The contact can thus be disposed on the end side of the case20of the emergency stop switch2. Thereby, a connection with the contact can be made using short terminal strips351,352, thus simplifying the structure to reduce a cost and improving reliability. To the contrary, in the case that the contact is disposed at a position away from the end of the case20of the emergency stop switch2, when connecting the contact with a terminal strip on the end side of the case20, an internal wiring is needed thus making the structure complicated to increase a cost, such that thereby reliability may be decreased. Moreover, according to this alternative embodiment, the coil spring25biases the contact of the emergency stop switch2to the OFF state from the ON state at all times (that is, before and after operations of the emergency stop switch2). Accordingly, especially after operation of the emergency stop switch2, even when a malfunction of the emergency stop switch2occurs such that the contact returns to the ON state, the contact is biased to the OFF state by the action of an elastic repulsion of the coil spring25to maintain the contact in the OFF state. Thereby, the contact will not turn on thus improving safety. Furthermore, according to this alternative embodiment, since the elastic repulsion of the coil spring25is imparted in a push direction of the emergency stop button21, when the contact is made forcibly in the OFF state by a push operation of the emergency stop button21, the elastic repulsion of the coil spring25acts in the same direction as the push direction of the emergency stop button21. As a result, the contact can be made in the OFF state more securely. Also, since the elastic repulsion of the coil spring25acts in an actuating direction of the solenoid3relative to the shaft portion22, a load can be relieved at the time of operating the emergency stop button21by the solenoid3, thereby decreasing an output of the solenoid3and reducing a cost. According to this alternative embodiment, the elastic repulsion of the coil spring25after operation of the emergency stop switch2is decreased relative to the elastic repulsion of the coil spring25before operation of the emergency stop switch2. Therefore, after operation of the emergency stop switch2, an elastic energy held by the coil spring25is decreased and thus the elastic energy of the coil spring25after turning-off of the contact is lower than the elastic energy of the coil spring25before turning-off of the contact. As a result, even in the case that the emergency stop switch2has malfunctioned after operation of the emergency stop switch2, the contact will not return to the ON state again thus enhancing safety. Fourth Alternative Embodiment FIGS.11to13show an emergency stop switch (or operation switch unit) according to a fourth alternative embodiment of the present invention.FIG.11illustrates the state of non-operation of the emergency stop switch, which corresponds toFIG.9of the third alternative embodiment,FIG.12illustrates the state of operation (or manual/remote operation) of the emergency stop switch, which corresponds toFIG.10of the third alternative embodiment, andFIG.13illustrates an intermediate state between the non-operational state and the operational state of the emergency stop switch. InFIGS.11to13, like reference numbers indicate identical or functionally similar elements to those in the third alternative embodiment. As shown inFIGS.11to13, in this fourth alternative embodiment, the distal end part of the shaft portion22is crank-shaped as with the third alternative embodiment, but the distal end part is further lengthened than that of the third alternative embodiment. That is, similar to the third alternative embodiment, the distal end part of the shaft portion22includes a first shaft portion22A extending linearly in the axial direction, a second shaft portion22B extending from the distal end of the first shaft portion22A at an angle to the axial direction of the first shaft portion22A, and a third shaft portion22C extending from the distal end of the second shaft portion22B parallel to the axial direction of the first shaft portion22A. These first to third shaft portions22A to22C are integrated with one another. Between the first shaft portion22A and the second shaft portion22B, a stepped portion (or inclined portion/engagement recess)22b1is formed. Between the second shaft portion22B and the third shaft portion22C, a stepped portion (or inclined portion/engagement recess)22b2is formed. However, the third shaft portion22C is further lengthened than that of the third alternative embodiment. At a lengthened part of the third shaft portion22C, engagement recesses (or stepped portions/inclined portions)22b3,22b4are formed. The engagement recesses22b3,22b4are disposed on the opposite side of the outer peripheral surface of the third shaft portion22C. In this exemplification, the engagement recess22b3may have a trapezoidal-shape in a longitudinal section and the engagement recess22b4may have a triangular-shape formed of two inclined surfaces intersecting one another in a longitudinal section. The central position of the engagement recess22b4is located in front of (that is, inFIGS.11to13, to the left side of) the central position of the engagement recess22b3. On the other hand, a third contact283and a fourth contact284are disposed opposite one another with the third shaft portion22C interposed therebetween. The third and fourth contacts283,284are shiftable in the direction intersecting (in this example, parallel to) the axial direction of the third shaft portion22C, that is, in the direction intersecting (in this example, perpendicular to) the moving direction of the shaft portion22. The shift of the third and fourth contacts283,284causes the contact to be switched. The first and second contacts281,282have respective terminal strips351,352connected thereto and the third and fourth contacts283,284have respective terminal strips361,362connected thereto. The third contact283has a projecting part (or inclined part/engagement projection) formed of for example, inclined surfaces, which is provided to contact and engage with the engagement recess22b4of the third shaft portion22C. Likewise, the fourth contact284has a projecting part (or inclined part/engagement projection) formed of inclined surfaces, which is provided to contact and engage with the engagement recess22b3of the third shaft portion22C. The third contact283is biased toward the third shaft portion22C by an elastic repulsion of a spring293. Similarly, the fourth contact284is biased toward the third shaft portion22C by an elastic repulsion of a spring294. A part of the case20that accommodates the first and second contacts281,282and the third and fourth contacts283,284corresponds to the contact portion20B. As shown inFIG.11, in the state of non-operation of the emergency stop switch2, the first contact281extends toward the shaft portion22by the elastic repulsion of the spring291and the projecting part contacts and engages with the stepped portion22b2, such that thereby the first contact281is in an ON state. The second contact282is retracted on the side of the case20against the elastic repulsion of the spring292and the projecting part contacts the outer peripheral surface of the third shaft portion22C, such that thereby the second contact28sis in an OFF state. Also, the third and fourth contacts283,284are retracted on the side of the case20against the elastic repulsions of the springs293,294and the projecting parts contact the outer peripheral surface of the third shaft portion22C, such that thereby both contacts are in an OFF state. In such a way, when the first contact281is in the ON state and the second contact282is in the OFF state, and also the third contact283is in the OFF state, the contact of the emergency stop switch2is in the ON state. As shown inFIG.12, in the state of operation (i.e. manual operation/remote operation) of the emergency stop switch2, the first contact281is retracted on the side of the case20against the elastic repulsion of the spring291and the projecting part contacts the outer peripheral surface of the first shaft portion22A, such that thereby the first contact281is in an OFF state. The second contact282extends toward the shaft portion22by the elastic repulsion of the spring292and the projecting part contacts the outer peripheral surface of the first shaft portion22A, such that thereby the second contact282is in an ON state. Also, the third contact283extends toward the shaft portion22by the elastic repulsion of the spring293and the projecting part contacts and engages with the engagement recess22b4, such that thereby the third contact283is in an ON state. The fourth contact284is retracted on the side of the case20against the elastic repulsion of the spring294and the projecting part contacts the outer peripheral surface of the third shaft portion22C, such that thereby the fourth contact284is in an OFF state. In such a manner, when the first contact281is in the OFF state and the second contact282is in the ON state, and also the third contact283is in the ON state, the contact of the emergency stop switch2is in the OFF state. As shown inFIG.13, at the time of operation (or manual operation/remote operation) of the emergency stop switch and in the state of the intermediate position of the emergency stop button21, the protruding part22bof the shaft portion22does not fully climb over the engagement member26that is engaged with the protruding part22b. At this time, in the embodiment shown inFIG.13, the first contact281is retracted on the side of the case20against the elastic repulsion of the spring291and the projecting part contacts the outer peripheral surface of the first shaft portion22A, such that thereby the first contact281is in the OFF state. The second contact282extends toward the shaft portion22by the elastic repulsion of the spring292and the projecting part contacts the stepped part22b1and the outer peripheral surface of the first shaft portion22A, such that thereby the second contact282is in the ON state. The third contact283is retracted on the side of the case20against the elastic repulsion of the spring293and the projecting part contacts the outer peripheral surface of the third shaft portion22C, such that thereby the third contact283is in the OFF state. The fourth contact284extends toward the shaft portion22by the elastic repulsion of the spring294and the projecting part contacts and engages with the engagement recess22b3of the third shaft portion20C, such that thereby the fourth contact284is in an ON state. In this way, when at least the fourth contact284is in the ON state, the emergency stop switch2is in the state of the intermediate position. At this juncture, for example, in the case that the ON state of the fourth contact284continues for more than a definite period of time, the system may determine the emergency stop switch2as an operation malfunction (i.e. error) to perform such a process as to output an error signal and to display an error indication on the display of the programmable display device50and the wireless terminal4and also an indicating lamp or an warning lamp. In a manual operation or a remote operation of the emergency stop switch2, the emergency stop switch2moves onto the state of operation shown inFIG.12from the state of non-operation shown inFIG.11. At this juncture, the first contact281climbs over the stepped part22b2to contact the outer peripheral surface of the first shaft portion22A and the second contact282passes through the stepped part22b1to contact the outer peripheral surface of the first shaft portion22A. The third contact283contacts and engages with the engagement recess22b4and the fourth contact284passes through the engagement recess22b3to contact the outer peripheral surface of the third shaft portion22C. Also, in a reset operation of the emergency stop switch2, the emergency stop switch2moves onto the state of non-operation shown inFIG.11from the state of operation shown inFIG.12. At this juncture, the first contact281contacts and engages with the stepped part22b2and the second contact282climbs over the stepped part22b1to contact the outer peripheral surface of the third shaft portion22C. The third contact283climbs over the engagement recess22b4to contact the outer peripheral surface of the third shaft portion22C and the fourth contact284passes through the engagement recess22b3to contact the outer peripheral surface of the third shaft portion22C. According to the fourth alternative embodiment, the remote operation of the emergency stop switch2is detected by the reception part32of the emergency stop switch2and the emergency stop switch2is actuated based on the remote operation to move the shaft portion22, such that thereby the ON/OFF states of the first to fourth contacts281to284are changed to switch the contact of the emergency stop switch2into the OFF state. Thereby, the emergency stop switch2can be operated even at a place away from the emergency stop switch2. Accordingly, even in the situation that the worker P cannot push the emergency stop button21directly, an operation support of the emergency stop switch2can be performed, thus improving an operability and safety. Also, according to this alternative embodiment, as with the above-mentioned first embodiment, the electromagnetic solenoid3is disposed between the contact and the emergency stop button21, that is, the contact is disposed on the opposite side of the emergency stop button21with the solenoid3interposed therebetween. The contact can thus be disposed on the end side of the case20of the emergency stop switch2. Thereby, a connection with the contact can be made using short terminal strips351,352,361,362thus simplifying the structure to reduce a cost and improving reliability. Moreover, according to this alternative embodiment, since the contact is provided to detect the intermediate state between the ON state and the OFF state of the emergency stop switch2, the operation malfunction, etc. of the emergency stop switch2, for example, at the time of the remote operation can be detected, thus improving reliability as an emergency stop switch. Also, since a contact is provided aside from the main contacts281,282, various axial positions of the shaft portion22can be detected and thus different operation state of the emergency stop switch2can be detected, thus allowing for a delicate control. Furthermore, according to this alternative embodiment, the coil spring25biases the contact of the emergency stop switch2to the OFF state from the ON state at all times (that is, before and after operations of the emergency stop switch2). Accordingly, especially after operation of the emergency stop switch2, even when a malfunction of the emergency stop switch2occurs such that the contact returns to the ON state, the contact of the emergency stop switch2is biased to the OFF state by the action of an elastic repulsion of the coil spring25to maintain the contact in the OFF state. Thereby, the contact is not made in the ON state thus improving safety. According to this alternative embodiment, since the elastic repulsion of the coil spring25is imparted in a push direction of the emergency stop button21, when the contact is made forcibly in the OFF state by a push operation of the emergency stop button21, the elastic repulsion of the coil spring25acts in the same direction as the push direction of the emergency stop button21. As a result, the contact can be made in the OFF state more securely. Also, since the elastic repulsion of the coil spring25acts in an actuating direction of the solenoid3relative to the shaft portion22, a load can be relieved at the time of operating the emergency stop button21by the solenoid3, thereby decreasing an output of the solenoid3and reducing a cost. According to this alternative embodiment, the elastic repulsion of the coil spring25after operation of the emergency stop switch2is decreased relative to the elastic repulsion of the coil spring25before operation of the emergency stop switch2. Therefore, after operation of the emergency stop switch2, an elastic energy held by the coil spring25is decreased and thus the elastic energy of the coil spring25after turning-off of the contact is lower than the elastic energy of the coil spring25before turning-off of the contact. As a result, even in the case that the emergency stop switch2has malfunctioned after operation of the emergency stop switch2, the contact will not return to the ON state again thus enhancing safety. In addition, as the shape of the distal end part of the shaft portion22, various shapes may be conceivable other than the shape shown inFIGS.11to13. The shape is not necessarily a crank-shape. For example, on the opposite sides of the centerline of a straight shaft, trapezoidal convex parts in longitudinal section may be formed integrally with the straight shaft and the positions thereof are shifted in the axial direction. In this case, four contacts disposed on opposite sides of the straight shaft may contact the convex parts or contact the outer peripheral surface of the straight shaft, such that thereby the contact is switched. Also, in this case, by adjusting the positions and numbers of the respective convex parts, and the inclination of the inclined surface, an even more delicate control is possible. Moreover, the initial state of the respective contacts and the ON/OFF state after switching of the respective contacts may be made opposite the states ofFIGS.11to13. Fifth Alternative Embodiment In the above-mentioned first embodiment, an example was shown in which one contact composed of a combination of the movable contact23and the fixed contact23is provided at an end portion of the case20of the emergency stop switch2, but the application of the present invention is not restricted to such an example.FIG.14illustrates an emergency stop switch (or operation switch unit) according to a fifth embodiment of the present invention.FIG.14shows the state of operation (or manual operation/remote operation) of the emergency stop switch, which corresponds toFIG.5of the above-mentioned first embodiment. InFIG.14, like reference numbers indicate identical or functionally similar elements to those in the above-mentioned first embodiment. As shown inFIG.14, in this alternative fifth embodiment, another contact is added. That is, at an end portion of the case20of the emergency stop switch2, a shaft extension part22′ is coaxially provided at the distal end of the shaft portion22to extend the shaft portion22. At the distal end of the shaft extension part22′, a pair of movable contacts232are fitted. On the other hand, at the inside wall of the case20, a pair of fixed contacts242are fixedly attached that are disposed opposite the respective movable contacts232and that open and close relative to the respective movable contacts232. Terminal strips361,362are connected to the respective fixed contacts242. A portion of the case20that accommodates a main contact composed of the movable contacts231and the fixed contacts241and an extension contact composed of the movable contacts232and the fixed contacts242corresponds to a contact part20B. In this way, since the extension contact may be provided on the end side of the case20of the emergency stop switch2, adjacent to the original main contact23,24(or231,241), the extension of a contact is conducted easily. In this fifth alternative embodiment, an example was shown in which one extension contact was provided, but the number of extension contacts may be two or more. Incidentally, in the fourth alternative embodiment as well, the third and fourth contacts283,284disposed opposite one another with the third shaft portion22C interposed therebetween correspond to the extension contact. Sixth Alternative Embodiment In the above-mentioned first embodiment and the first to fifth embodiments, an example was shown in which the emergency stop switch2is composed of the operation part20A and the contact part20B, but the contact part20B may be detachable (or releasably attachable) relative to the operation part20A.FIGS.15and16illustrate a schematic structure of an example of the emergency stop switch2in which the contact part20B is provided detachable relative to the operation part20A.FIG.15shows the state in which the contact part20B is separated from the operation part20A, andFIG.16shows the state in which the contact part20B is fitted to the operation part20A. Here, a detachable mechanism with a locking function is taken as an example. InFIGS.15and16, like reference numbers indicate identical or functionally similar elements to those in the above-mentioned first embodiment. As shown inFIG.15, the operation part20A includes a case201and the contact part20B includes a case202. The end portion of the case201has a coupling part201athat is to be coupled to the end portion of the case202. The coupling part201ais detachably fitted to the end portion of the case202through an engagement means such as an engagement piece (not shown) and the like. Also, the case201has a cylindrical slider201bfitted thereto slidably movable in the axial direction. The end of the shaft portion22is connected to the slider201band thus the slider201bis adapted to move back and forth in the axial direction along with the shaft portion22. On the outer peripheral surface of the slider201b, the end of a pin201cis fixedly attached that protrudes radially outwardly. The case202has a cylindrical movable block202afitted there to slidably movable in the axial direction. The movable block202ais connected to an end of the support shaft202band a pair of movable contacts23are fitted to the other end of the support shaft202b. Also, in the case202, a pair of fixed contacts24are disposed opposite the respective movable contacts23and have respective terminal strips351,352connected thereto. A coil spring202c in the compressed state is fitted around the support shaft202b. An end of the coil spring202c presses against the side of the movable contact23and the other end thereof presses against a partition wall202d provided in the case202c. The partition wall202d has a through hole202eformed therein that the support shaft202bis inserted into. The support shaft202bhas for example, a square shape in cross section and the through hole202ehas a corresponding square hole. By such a structure, the support shaft202bis axially slidable but circumferentially unrotatable. The movable block202ahas a bent groove202fformed therein that is engageable with the pin201c. The bent groove202fis formed of an axial groove s that opens to the end of the movable block202a, a circumferential groove t located away from the axial groove s, and a diagonal groove u that is connected to the axial groove s and the circumferential groove t. The pin201c is adapted to travel along the bent groove202d. When fitting the contact part20B to the operation part20A, from the state shown inFIG.15, the contact part20B is moved toward the operation part20A, the coupling part201aof the case201is inserted into the end of the case202, the pin201c of the slider201bof the operation part20A is inserted into the groove s of the bent groove202fof the movable block202aof the contact part20B. From this state, the contact part20B is rotated in the direction shown by an arrow mark R1. Then, with the rotation of the contact part20B, the pin201c travels along the groove s to the groove u of the bent groove202f. At this time, with the travel of the pin201c, the slider201b moves into the interior of the movable block202aand along with the movement of the slider201bthe movable block202amoves toward the case20A. As a result of this, the shaft portion202band the movable contact23move toward the case201against the elastic repulsion of the coil spring202c and the movable contact23comes into contact with the fixed contact24(seeFIG.16). In such a manner, the contact part20B is fitted to the operation part20A. At this juncture, the elastic repulsion of the coil spring202c is imparted to the movable block202a, such that thereby a force resulting from the elastic repulsion of the coil spring202c acts the movable block202ato return to the side of the case202. However, since the pin201c is engaged with the circumferential groove t of the bent groove202f, the pin201c will not be disengaged from the groove t and thus the contact part20B is locked relative to the operation part20A. Then, to the contrary, when separating the contact part20B from the operation part20A, from the state shown inFIG.16, the contact part20B is rotated in the direction shown by an arrow mark R2opposite the rotational direction mentioned above. Then, the pin201c travels along the groove t through the groove u to the groove s of the bent groove202f, such that thereby the contact part20B is unlocked relative to the operation part20A and the contact part20B comes off from the operation part20A (seeFIG.15). Additionally, as shown inFIG.16, in the state that the contact part20B is fitted to the operation part20A, the movable contact23moves back and forth through the slider201b, the movable block202aand the support shaft202b according to the reciprocating motion of the shaft portion22. Thereby, the movable contact23is connected/separated (or closes/opens) relative to the fixed contact24to cause the contact of the emergency stop switch to switch. According to this sixth alternative embodiment, the coil spring202cbiases the movable contact23to the opening side relative to the fixed contact24at all times. Accordingly, especially after operation of the emergency stop switch2, even in the case that a mal function of the emergency stop switch2has occurred such that the movable contact23returns to the state in contact with the fixed contact24, both of the contacts23,24are biased to open by the action of the elastic repulsions of the coil spring202c as well as the coil spring25(seeFIGS.4and5), such that thereby the contacts23,24can be securely maintained in an open state. Therefore, both of the contacts23,24can be further securely prevented from contacting one another thus further securing safety. According to this alternative embodiment, since the elastic repulsion of the coil spring202c is imparted in a push direction of the emergency stop button21(FIGS.4and5), when the movable contact23is caused to forcibly open relative to the fixed contact24by a push operation of the emergency stop button21, the elastic repulsion of the coil spring202cas well as the elastic repulsion of the coil spring25(FIGS.4and5) acts in the same direction as the push direction of the emergency stop button21. As a result, the movable contact23can be made separated from the fixed contact24more securely. Also, since the elastic repulsion of the coil spring202c acts in the actuating direction of the electromagnetic solenoid3(FIGS.4and5) relative to the shaft portion22, a load can be relieved at the time of actuating the emergency stop button21by the solenoid3, thereby decreasing an output of the solenoid3and reducing a cost. According to this alternative embodiment, the elastic repulsion of the coil spring202c after operation of the emergency stop button21(FIGS.4and5) is decreased relative to the elastic repulsion of the coil spring202cbefore operation of the emergency stop button21. Therefore, after operation of the emergency stop button21, an elastic energy held by the coil spring202cis decreased and thus the elastic energy of the coil spring202c after opening of the contact is lower than the elastic energy of the coil spring202cbefore opening of the contact. As a result, even in the case that the emergency stop switch2has malfunctioned after operation of the emergency stop button21, the movable contact23and the fixed contact24will not return to the state in contact with one other thus further enhancing safety. Seventh Alternative Embodiment FIGS.17and18illustrate an operation unit with an operation support function according to a seventh alternative embodiment of the present invention.FIG.17is a longitudinal sectional view of the operation unit andFIG.18is a longitudinal sectional view showing the state in which the operation unit ofFIG.17is coupled to one another. In these drawings, like reference numbers indicate identical or functionally similar elements to those in the above-mentioned first embodiment and the sixth alternative embodiments. As shown inFIG.17, an operation unit20C has a shaft portion (or subordinate operation shaft)221extending axially and an electromagnetic solenoid (or actuating part)3into which the shaft portion221is inserted. A solenoid body (or electromagnetic coil portion)30of the electromagnetic solenoid3supports the shaft portion221slidably in the axial direction. The solenoid body30functions to cause the shaft portion221to move in the axial direction. On the external wall surface of the operation unit20C, there are provided a reception part (or detection part)32for receiving a radio signal (that is, detecting a remote control) from the wireless terminal4and a control circuit33for controlling the drive of the electromagnetic solenoid3based on the remote signal received (or detected) by the reception part32. The control circuit33is connected to the electromagnetic solenoid3through a lead wire34. At an end of the operation unit20C, a slider201b is provided slidably in the axial direction. The slider201bis coupled to an end of the shaft portion221. On the outer peripheral surface of the slider201b, an end of the pin (or engagement means)201cis fixedly attached that protrudes radially outwardly. At the other end of the operation unit20C, a movable block202ais provided slidably in the axial direction. The movable block202ais coupled to the other end of the shaft portion221. By such a structure, the slider201band the movable block202amove back and forth in the axial direction according to the reciprocating motion of the shaft portion221. Also, the movable block202ahas a bent groove (or engagement means)202fformed therein that the pin201cis engageable with. The bent groove202f is composed of an axial groove s that opens at the end of the movable block202a, a circumferential groove t disposed away from the groove s, and a diagonal groove u that communicates with the axial groove s and the circumferential groove t. The pin201cis movable along the bent groove202f. The operation unit20C is inserted and used, for example, between the operation part (or external unit)20A inFIG.15and the contact part20B. At this time, the pin201c of the slider201bof the operation part20A is releasably engaged with the bent groove202fof the movable block202aof the operation unit20C. That is, the shaft portion (or subordinate operation shaft)221of the operation unit20C is releasably engageable with the shaft portion (or primary operation shaft)22of the operation part20A. Also, the pin201c of the slider201bof the operation unit20C is releasably engaged with the bent groove202fof the movable block202aof the contact part20B. In this case, when the shaft portion22of the operation part20A is manually operated, the shaft portion221of the operation unit20C moves in the axial direction through the slider201bof the operation unit20A and the movable block202aof the operation unit20C. Accordingly, through the slider201bof the operation unit20C and the movable block202aof the contact part20B, the support shaft202bof the contact part20B moves to cause the contact to be switched. On the other hand, when performing a remote operation of the shaft portion221of the operation unit20C, an operation signal transmitted from the wireless terminal4is received by the reception part32and inputted in the control circuit33, such that thereby an electric current is supplied to the solenoid body30of the electromagnetic solenoid3from the control circuit33. The shaft portion221thus moves axially in the solenoid body30. Then, through the slider201bof the operation unit20C and the movable block202aof the contact part20B, the support shaft202bof the contact part20B moves to cause the contact to be switched. At this time, the shaft portion22of the operation part20A moves axially as with the manual operation. In such a manner, the shaft portion221of the operation unit20C can be operated even at a place away from the operation unit20C, thereby performing an operation support to improve operability and safety. Also, since the shaft portion (or subordinate operation shaft)221is provided releasably engageable with the shaft portion22of the operation part (or external unit)20A having the shaft portion (or primary operation shaft)22that moves linked with the operation of the emergency stop button (or operation switch)21, by engaging the shaft portion221with the shaft portion22of the operation part20A, the operation support of the emergency stop button21of the operation part20A can be performed. FIG.18illustrates the state in which the pin201cof the slider201bof the operation support unit20C2is engaged with the bent groove202fof the movable block202aof the operation support unit20C1and two operation support units20C1,20C2are coupled to one another. In this way, it is possible to couple a plurality of operation support units20C to one another. In this case, since each of the operation support units20C has an electromagnetic solenoid3, a great drive force can be obtained in performing a remote operation of the respective shaft portions22. Next,FIG.19shows a variant of the contact part20B. InFIG.19, like reference numbers indicate identical or functionally similar elements to those inFIG.15. As shown inFIG.19, at the end portion on the contact-side of the contact part201B, the slider201b is provided movably in the axial direction. An end of a support shaft203bdisposed coaxially with the support shaft202bis connected to the slider201band the other end of the support shaft203bis connected to the back side of the movable contact23. On the outer circumferential surface of the slider201b, the end of the pin201cis fixedly attached that protrudes radially outwardly. The contact part201B is inserted and used, for example, between the operation part20A inFIG.15and the contact part20B. At this juncture, the pin201cof the slider201bof the operation part20A is releasably engaged with the bent groove202fof the movable block202aof the contact part201B, and the pin201c of the slider201bof the contact part201B is releasably engaged with the bent groove202fof the movable block202aof the contact part20B. In this way, the contact part of the emergency stop switch2can be extended. In this case, the movement of the shaft portion22of the operation part20A is transmitted to the respective movable contacts23via the support shafts202b,203b. In addition, the contact part201B can be used in lieu of the contact part20B inFIG.15. FIG.20shows the state in which two contact parts201B,202B are coupled to one another by engaging the pin201c of the slider201bof the contact part202B with the bent groove202fof the movable block202aof the contact part201B. In such a manner, a plurality of contact parts20B can be coupled to one another thus facilitating the expansion of the contact part. Eighth Alternative Embodiment In the above-mentioned first embodiment, as an actuating part to actuate the emergency stop button21, the electromagnetic solenoid3was taken as an example, but the application of the present invention is not restricted to such an example. As an actuating part, a mechanism other than the electromagnetic solenoid3(e.g. a reciprocating mechanism, etc. such as an electric cylinder or a rack-and-pinion, etc.) may be employed. Ninth Alternative Embodiment In the above-mentioned first embodiment, as an operation switch unit, the emergency stop switch was taken as an example, but the application of the present invention is not restricted to such an example. Other stop switch such as a temporary stop switch and the like may be used. Also, a switch that deals with discrete values such as a selector switch to speed-control by switching speed, lever switch, cam switch, foot switch and the like may be used. Therefore, the signal transmitted from the transmission part411,412of the wireless terminal4(41,42) includes not only a stop signal but also other operation signals in general. Additionally, in those switches, regarding resetting as well as actuation of the operation switch, a wireless remote control may be performed using an electromagnetic solenoid, etc. Tenth Alternative Embodiment In the above-mentioned first embodiment, as a remote operation part and a detection part, the wireless terminal4and the reception part32were respectively taken as examples, but the application of the present invention is not restricted to such examples. The remote operation part and the detector part may include the following combinations: the combination of optical signal and a photoelectric sensor; the combination of audio signal and a microphone; the combination of video signal and a camera; the combination of an operation instrument such as a lever that operates a linear/rod-like long member such as a wire and a movable member that follows the movement of the distal end of the long member; the combination of a nozzle spouting compressed air and a receiving member that receives compressed air from the nozzle; and the combination of a gun that fires bullets such as BB bullets and a target member that is hit by the bullet fired by the gun, etc. Other Alternative Embodiment The above-mentioned first embodiment and the respective alternative embodiments should be considered in all respects only as illustrative and not restrictive. Those skilled in the art to which the invention pertains may make modifications and other embodiments employing the principles of this invention without departing from its spirit or essential characteristics particularly upon considering the foregoing teachings, even if there are no explicit explanations in the description. Other Applicable Example In the above-mentioned first embodiment and the respective alternative embodiments, a collaborative robot was taken as an example as an apparatus that the emergency stop switch of the present invention is applied to, but the present invention also has application to industrial robots other than the collaborative robot. Also, the application of the present invention is not restricted to a vertically articulated robot but is applicable to other robots such as a SCARA robot and a parallel link robot and also to an AGV (Automated Guided Vehicle). Furthermore, the application of the present invention is not limited to the field of FA (Factory Automation) (i.e. manufacturing industry) but may be the field of industrial vehicles and construction vehicles including special vehicles such as a power shovel and the like (i.e. construction/civil work industry), restaurant business, food industry, medicine and distribution industry. INDUSTRIAL APPLICABILITY The present invention is of use to an operation switch unit and an operation support system with an operation support function that can perform operation function of the operation switch. DESCRIPTION OF REFERENCE NUMERALS 1: operation support system2: emergency stop switch (operation switch unit)21: emergency stop button (operation switch)22: shaft portion (operation shaft)23: movable contact24: fixed contact25: coil spring (biasing means)281-284: contact3: electromagnetic solenoid (actuating part)32: reception part (detection part)4: wireless terminal (remote operation part) | 72,485 |
11942289 | MODE FOR IMPLEMENTING THE INVENTION A vacuum interrupter and a vacuum breaker provided with the vacuum interrupter according to an embodiment of the present invention are each totally different from one in which the thickness of the peripheral wall of a vacuum container is simply increased or a reinforcing member is simply provided, in a configuration shown in, for example,FIG.6. That is, in the vacuum interrupter and the vacuum breaker according to the present embodiment, in a fixed-side flange, an annular expansion portion is formed between a flange middle portion and a flange outer peripheral edge portion of the fixed-side flange, and has an annular shape extending along the outer periphery of the flange middle portion, and has a shape expanding in the axial outer side direction of the vacuum container, and, in a movable-side flange, an annular expansion portion is formed between a flange middle portion and a flange outer peripheral edge portion of the movable-side flange, and has an annular shape extending along the outer periphery of the flange middle portion, and has a shape expanding in the axial outer side direction of the vacuum container. Here, when focusing on a case where a vacuum interrupter9shown inFIG.6is arranged inside a sealed container filled with an insulation medium gas, as shown in outline arrows inFIG.7(A), due to the pressure difference between the inside of a vacuum container91and the insulation medium gas, external pressure acts on the vacuum interrupter91. In this case, in a cylindrical body90, a dynamic effect (hereinafter is simply referred to as an arch structural effect) by convex arch structure against the acting direction of the external pressure can be obtained, and the external pressure is easily dispersed in the circumferential direction of the cylindrical body90. However, in a fixed-side flange91a, as shown inFIG.7(B), the part between a flange middle portion94aand a flange outer peripheral edge portion96aand the part between a flange middle portion94band a flange peripheral edge portion96bare flat, and the above arch structural effect cannot be obtained. Consequently, when the mechanical strength of the fixed-side flange91ais low, for example, the parts having the flat structure are easily deformed in the direction shown by black arrows inFIG.7(B). Such a phenomenon also occurs to the movable-side flange91bat the same time. On the other hand, in the fixed-side flange and the movable-side flange in the present embodiment, as compared with the configuration shown inFIG.6, by the annular expansion portions formed between the flange middle portions and the flange outer peripheral edge portions respectively, the arch structural effect can be easily obtained. That is, in the vacuum container of the vacuum interrupter in the present embodiment, as compared with the configuration shown inFIG.6, mechanical strength against external pressure can be easily improved. Then, the vacuum interrupter contributes to exhibit desired characteristics (such as insulation performance and breaking performance). In the present embodiment, as mentioned above, the annular expansion portions are formed at the respective fixed-side flange and movable-side flange, and it is sufficient to have a configuration which is capable of obtaining the arch structural effect, and design change is possible by appropriately applying common general knowledge of various fields (such as a vacuum breaker field) while appropriately referring to prior art references as needed. As one example thereof, an embodiment shown in the following can be cited. In addition, in the following embodiment, for convenience, the vacuum container inner side direction of the axial direction is simply referred to as an axial inner side direction, and the vacuum container outer side direction of the axial direction is simply referred to as an axial outer side direction (expansion directions of annular expansion portions). EMBODIMENT <Configuration Example of Vacuum Interrupter> FIG.1is a drawing for explaining the schematic configuration of a vacuum interrupter1A that is an embodiment of the present invention. In the vacuum interrupter1A, a vacuum container1is used in which the fixed side in the axial direction of an insulating cylindrical body10is sealed with a fixed-side flange11a, and the movable side in the axial direction of the insulating cylindrical body10is sealed with a movable-side flange11b. The cylindrical body10is provided with, as main components, a cylindrical middle shield (arc shield)20surrounding the outer peripheral sides of the after-mentioned fixed electrode13aand movable electrode13b, a fixed-side insulating portion21aconnected with the fixed side in the axial direction of the middle shield20, and a movable-side insulating portion21bconnected with the movable side in the axial direction of the middle shield20. The middle shield20is provided with, in the middle part thereof, a fixed-side extending portion20awhich extends from the middle part toward the fixed side in the axial direction and is superimposed with the inner peripheral side of the fixed-side insulating portion21a, and a movable-side extending portion20bwhich extends from the middle part toward the movable side in the axial direction and is superimposed with the inner peripheral side of the movable-side insulating portion21b. A middle portion3aof the fixed-side flange11ais provided with a columnar fixed-side energizing shaft12aextending from the middle portion3ain the axial inner side direction. A fixed electrode13ahaving, for example, a flat plate shape is supported on an end portion in the axial inner side direction of the fixed-side energizing shaft12a. An outer peripheral edge portion4aof the fixed-side flange11ahas a shape bent in the axial inner side direction, and is supported on an end surface2aaof the fixed-side insulating portion21a. An annular expansion portion5awhich is formed in an annular shape extending along the outer periphery of the middle portion3a, and has a shape expanding in the axial outer side direction is formed between the middle portion3aand the outer peripheral edge portion4aof the fixed-side flange11a. The annular expansion portion5ainFIG.1includes an inner peripheral side annular wall51awhich is positioned from a distal end portion50ain the expansion direction of the annular expansion portion5atoward the middle portion3aside, and has a shape of which the diameter increases as it goes in the expansion direction, and an outer peripheral side annular wall52awhich is positioned from the distal end portion50atoward the outer peripheral edge portion4aside, and has a shape of which the diameter decreases as it goes in the expansion direction. In addition, on the outer peripheral edge portion4aside of the fixed-side flange11a, a cylindrical fixed-side electric field relaxation shield22aextending from the outer peripheral edge portion4aside in the axial inner side direction is provided so as to surround the outer peripheral side of the fixed-side energizing shaft12a. The movable-side flange11bis provided with a columnar movable-side energizing shaft12bwhich extends in the axial direction while passing through the movable-side flange11bin the axial direction. The movable-side energizing shaft12bis supported on the vacuum container1inner side of the movable-side flange11bvia a cylindrical bellows14which is extensible in the axial direction and is arranged coaxially with the movable-side energizing shaft12b. Accordingly, the movable-side energizing shaft12bis movable in the axial direction. The movable-side energizing shaft12binFIG.1is provided with a cylindrical bellows shield14aso as to surround and cover the outer peripheral side of the bellows14. In addition, a movable electrode13bhaving, for example, a flat plate shape is supported on an end portion on the vacuum container1inner side of the movable-side energizing shaft12b, and is configured to come into contact with and separate from the fixed electrode13ain accordance with the movement in the axial direction of the movable-side energizing shaft12b. An outer peripheral edge portion4bof the movable-side flange11bhas a shape bent in the axial inner side direction, and is supported on an end surface2bbof the movable-side insulating portion21b. An annular expansion portion5bwhich is formed in an annular shape extending along the outer periphery of a middle portion3bof the movable-side flange11b, and has a shape expanding in the axial outer side direction is formed between the middle portion3band an outer peripheral edge portion4bof the movable-side flange11b. The annular expansion portion5binFIG.1includes an inner peripheral side annular wall51bwhich is positioned from a distal end portion50bin the expansion direction of the annular expansion portion5btoward the middle portion3bside, and has a shape of which the diameter increases as it goes in the expansion direction, and an outer peripheral side annular wall52bwhich is positioned from the distal end portion50btoward the outer peripheral edge portion4bside, and has a shape of which the diameter decreases as it goes in the expansion direction. In addition, on the outer peripheral edge portion4bside of the movable-side flange11b, a cylindrical movable-side electric field relaxation shield22bextending from the outer peripheral edge portion4bside in the axial inner side direction is provided so as to surround the outer peripheral side of the movable-side energizing shaft12b. According to the vacuum interrupter1A shown inFIG.1, by the annular expansion portion5aof the fixed-side flange11aand the annular expansion portion5bof the movable-side flange11b, an arch structural effect can be obtained, and mechanical strength against external pressure is easily enhanced. <Configuration Example of Fixed-Side Flange11aand Movable-Side Flange11b> As mentioned above, if each of the fixed-side flange11aand the movable-side flange11bformed with the annular expansion portions5aand5brespectively is one which is capable of obtaining an arch structural effect, various modes can be applied, and, for example, one formed by appropriately using a material applied to a common metal flange can be cited. As a specific example, although the fixed-side flange11aand the movable-side flange11bshown inFIG.2can be cited, it is not limited to those, and design modification can also be performed. For example, the middle portions3aand3bcan be appropriately designed according to a shape or the like of the fixed-side extending portion20aand the movable-side insulating portion21b. For example, the shape of each of the annular expansion portions5aand5bcan also be appropriately designed in consideration of the whole shape of each of the fixed-side flange11aand the movable-side flange11b, so as to obtain an arch structural effect. Specifically, an interior angle θ between the inner peripheral side annular wall51aand the outer peripheral side annular wall52aand an interior angle θ between the inner peripheral side annular wall51band the outer peripheral side annular wall52bare each designed so as to be in the range of 90°-150°. If each of these interior angles θ is too large (for example, over 150°), it can be considered that an arch structural effect is hardly obtained. On the other hand, if each of these interior angles θ is too small (for example, smaller than 90°), it might have an influence on electric characteristics (such as an influence on an electric field characteristic). However, in this case, each of the fixed-side flange11aand the movable-side flange11bis designed so as to suppress the influence (for example, various sub-shields are disposed). In addition, a diameter L1of each of the distal end portions50aand50bis set to be approximately 60% of a diameter L of each of the outer peripheral edge portions4aand4b(namely, L1/L=0.6). Further, if the following formula is satisfied, it can be considered that a sufficient arch structural effect can be obtained. 0.5L≤L1≤0.7L According to the configuration shown inFIG.2, a load F1applied to the inner peripheral side annular wall51aor51bby external pressure is dispersed to a component f11in the axial inner side direction and a component f12in the direction on the outer peripheral edge portion4aor4bside. That is, the component f12of the load F1is supported by the outer peripheral side annular wall52aor52b, thereby easily withstanding the load F1. Similarly, a load F2applied to the outer peripheral annular wall52aor52bby external pressure is dispersed to a component f21in the axial inner side direction and a component f22in the direction of the middle portion3aor3bside. That is, the component f22of the load F2is supported by the inner peripheral side annular wall51aor51b, thereby easily withstanding the load F2. <One Example of Structural Analysis> Next, a three-dimensional analytic model D1of the vacuum interrupter1A and a three-dimensional analytic model D2of the vacuum interrupter9which were simplified into half-size symmetrical models as shown inFIG.3(A)andFIG.3(B)were created by CAE analysis, and structural analysis in case where a load (external pressure) was applied to each of the analytic modes D1and D2was conducted, and the results shown inFIG.4(A)andFIG.4(B)were obtained. In addition, as a constraint condition of each of the analytic models D1and D2, an asymmetrical model constraint condition was given to a half-size symmetrical surface, and each of the cylindrical bodies10and90has simplified structure formed by ceramic, and a complete fixed condition was given to a part thereof. In addition, the interior angle θ was set so as to satisfy 120° and the relationship between the diameters L and L1was set so as to satisfy the relationship of L1/L=0.6 As material physical properties, since the Young's modulus and the Poisson's ratio were required, a general numerical value of oxygen-free copper was applied to each of the fixed-side flanges11aand91a, the movable-side flanges11band91b, the fixed-side energizing shafts12aand92aand the movable-side energizing shafts12band92b, and an actual measurement value (290 GPa) was applied to the cylindrical bodies10and90. In addition, a simplified structure as shown inFIGS.3(A) and3(B)was applied to the fixed-side energizing shafts12aand92aand the movable-side energizing shafts12band92a. Further, a load was set to 1.1 MPa in consideration of the pressure difference between the inner side and the outer side of each of the vacuum containers1and91. First, according toFIG.4(B), in the analytic model D2, the largest displacement appeared at the fixed-side energizing shaft92aand the movable-side energizing shaft92band around them, and its displacement amount was 1.231 mm. On the other hand, according toFIG.4(A), in the analytic model D1, although, similar to the analytic model D2, the largest displacement appeared at the fixed-side energizing shaft12aand the movable-side energizing shaft12band around them, its displacement amount was 0.327 mm. Therefore, as compared with the analytic model D2, in the analytic model D1, approximately 73% of a stress relaxation effect was obtained. That is, according to the vacuum interrupter1A, as compared with the vacuum interrupter9, it can be understood that mechanical strength against external pressure is high. In addition, by optimizing the structure of the annular expansion portions5aand5b(for example, by optimizing the interior angle θ, or the area ratios of the inner peripheral side annular walls51aand51band the outer peripheral side annular walls52aand52b), there is a possibility that the mechanical strength can be enhanced further. <Application Example of Vacuum Interrupter> If, in a vacuum breaker or the like, at least one vacuum interrupter1A is accommodated inside a sealed container (in the after-mentionedFIG.5, the grounding tank71) which is filled with an insulation medium gas, and desired characteristics (such as insulation performance and breaking performance) can be exhibited by appropriately operating the movable-side energizing shaft12b, various modes can be applied. Specifically, a configuration shown inFIG.5can be cited. FIG.5is one for explaining the schematic configuration of the vacuum breaker7in an embodiment. In addition, the use of the same reference number designates the same components as those inFIG.1, and redundant explanation is omitted. For example, the after-mentioned vacuum interrupter1B has the same configuration as that of the vacuum interrupter1A, and its detailed explanation is appropriately omitted. The vacuum breaker7includes a grounding tank71, a pair of vacuum interrupters1A and1B accommodated inside the grounding tank71, and a link mechanism72interposed between the vacuum interrupters1A and1B so as to open and close the vacuum interrupters1A and1B. The grounding tank71is one formed by using, for example, a cylindrical metal container, and has a structure which is capable of accommodating the vacuum interrupters1A and1B so as to be arranged on the same line in a posture in which movable-side flanges11bof the respective vacuum interrupters1A and1B face each other. The inside of the grounding tank71is filled with, for example, an insulation medium gas (such as dry air, nitrogen gas or SF6). The link mechanism72includes a link72a, a link72band links72c, and is accommodated in a link mechanism case72d. One end portion of the link72ais rotatably supported inside the link mechanism case72d, and the other end portion of the link72ais supported rotatably to a movable-side energizing shaft12bof the vacuum interrupter1A. In addition, one end portion of the link72cis rotatably provided to the link72a, and the other end portion of the link72cis rotatably supported on one end portion of an insulation operation rod73configured for the opening and closing operation of the vacuum interrupter1A. Similarly, one end portion of the link72bis rotatably supported inside the link mechanism case72d, and the other end portion of the link72bis supported rotatably to a movable-side energizing shaft12bof the vacuum interrupter1B. In addition, one end portion of the link72cis rotatably supported on the link72b, and the other end portion of the link72cis rotatably supported on one end portion of the insulation operation rod73. The link mechanism case72daccommodates the link mechanism72so as to electrically connect the movable-side energizing shafts12bof the respective vacuum interrupters1A and1B. In addition, the link mechanism case72dis supported via a support insulating tube73awhich is interposed between the movable-side flanges11bof the respective vacuum interrupters1A,1B, and is provided on the inner peripheral surface of the grounding tank71. The insulation operation rod73is provided so as to be inserted through the side portions of the link mechanism case72d, the support insulating tube73aand the grounding tank71. The insertion portion of the insulation operation rod73which is the outer peripheral side of the grounding tank71is provided with an operation part74. The operation part74accommodates a converting mechanism75, and is configured so as to convert the rotation motion of a rotation shaft75ainto the liner motion of the insulation operation rod73via the converting mechanism75. One end of the rotation shaft75ais exposed from the outer peripheral side of the operation part74via a rotation seal part75b. With this, in the outside of the operation part74, an operation mechanism (not shown) for operating the insulation operation rod73and an insulation operation rod (not shown) of another phrase can be driven in linkage with the rotation shaft75a. In the vacuum interrupter1A, a conductor coupling part76aelectrically conducted to the fixed-side energizing shaft12ais provided on the vacuum container1outer side of the fixed-side flange11a, and is supported on the inner peripheral surface of the grounding tank71via a support insulator77a. In addition, a conductor79ais connected to the conductor coupling part76avia a conductor metal fitting78a. Similar to the vacuum interrupter1A side, in the vacuum interrupter1B, a conductor coupling part76belectrically conducted to the fixed-side energizing shaft12ais provided on the vacuum container1outer side of the fixed-side flange11a, and is supported on the inner peripheral surface of the grounding tank71via a support insulator77b. In addition, a conductor79bis connected to the conductor coupling part76bvia a conductor metal fitting78b. The conductor79ais provided in a state of protruding from the inside of the grounding tank71toward the outside of the grounding tank71, and a bushing80ais provided in the area surrounding the conductor79a. The bushing80ais supported on the grounding tank71, and the distal end portion on the protruding direction side of the bushing80ais provided with a bushing terminal81aelectrically conducted to the conductor79a. Similar to the conductor79aside, the conductor79bis provided in a state of protruding from the inside of the grounding tank71toward the outside of the grounding tank71, and a bushing80bis provided in the area surrounding the conductor79b. The bushing80bis supported on the grounding tank71, and the distal end portion on the protruding direction side of the bushing80bis provided with a bushing terminal81belectrically conducted to the conductor79b. The outer peripheral side of the fixed-side insulating portion21aof the vacuum interrupter1A and the outer peripheral side of the fixed-side insulating portion21aof the vacuum interrupter1B are respectively provided with cylindrical outer-peripheral-side sub shields82aand82bsurrounding the outer peripheral sides of the fixed-side insulating portions21arespectively. The outer-peripheral-side sub shield82ais superimposed with the middle shield20of the vacuum interrupter1A in the radial direction of the middle shield20, and the outer-peripheral-side sub shield82bis superimposed with the middle shield20of the vacuum interrupter1B in the radial direction of the middle shield20. In the input operation of the vacuum breaker7inFIG.5, based on, for example, a desired input command, it is performed by the movement of the insulation operation rod73toward the inside direction (upper direction inFIG.5) of the grounding tank71by a driving mechanism not shown (for example, a driving mechanism connected to the insulation operation rod73). That is, the link72cconnected to the link72amoves while rotating (inFIG.5, rising while rotating right) in accordance with the movement of the insulation operation rod73. In accordance with this movement of the link72c, the link72amoves the movable-side energizing shaft12bof the vacuum interrupter1A toward the fixed electrode13aside along the axial direction. Consequently, the fixed electrode13aand the movable electrode13bof the vacuum interrupter1A are electrically connected to each other. Similarly, the link72cconnected to the link72bmoves while rotating (inFIG.5, rising while rotating left) in accordance with the movement of the insulation operation rod73. In accordance with this movement of the link72c, the link72bmoves the movable-side energizing shaft12bof the vacuum interrupter1B toward the fixed electrode13aside along the axial direction. Consequently, the fixed electrode13aand the movable electrode13bof the vacuum interrupter1B are electrically connected to each other. On the other hand, a cutoff operation is performed by the movement of the insulation operation rod73toward the outside direction of the grounding tank71(lower direction inFIG.5). That is, by the operation reverse to the input operation, the movable-side energizing shaft12bof the vacuum interrupter1A moves in the direction separating from the vacuum interrupter1A along the axial direction, and the movable electrode13bseparates from the fixed electrode13aof the vacuum interrupter1A. Similarly, the movable-side energizing shaft12bof the vacuum interrupter1B moves in the direction separating from the vacuum interrupter1B along the axial direction, and the movable electrode13bseparates from the fixed electrode13aof the vacuum interrupter1B. In each of the vacuum interrupters1A and1B, in case of performing such an input operation and a cutoff operation mentioned above, even if the movable-side energizing shaft12bmoves, the vacuum state inside the vacuum container1is maintained by the extensible bellows14. The bellows14of each of the vacuum interrupters1A and1B is one which is capable of withstanding the differential pressure between the vacuum on the outer peripheral side and an insulation medium gas on the inner peripheral side to a certain extent. According to such a configuration shown inFIG.5, in the vacuum interrupters1A and1B accommodated in the grounding tank71, mechanical strength which is capable of withstanding the external pressure can be obtained, and, for example, the pressure of the insulation medium gas inside the grounding tank71can be increased. For example, an insulation medium gas (for example, dry air) was filled in the grounding tank71, the pressure inside the grounding tank71was set to a pressure higher than 0.9 MPa, and the vacuum breaker7of which the rated voltage was 154 kV was configured and operated. Consequently, it was confirmed that a desired characteristic was exhibited. As the above, although only the described embodiment of the present invention has been explained in detail, it is obvious by a skilled person in the art that various modifications and the like can be made to the disclosed embodiment without departing from the scope and spirit of the present invention, and it is obvious that such a modification and the like belong to the scope of the claims. | 25,812 |
11942290 | DETAILED DESCRIPTION OF THE INVENTION FIG.1shows a vacuum interrupter1known in the prior art with an interrupter chamber2enclosed by a housing5, in which are disposed a fixed contact3and a moving contact4. The fixed contact3is located at one end of a fixed contact rod10, which is vacuum-tight by virtue of a first metallic cover7, for example is routed out of the vacuum interrupter1by soldering fixed contact rod10and cover7. The moving contact4sits at one end of a moving contact rod9, which is guided in a displaceable and non-rotatable manner by means of a bearing13, the latter being fixed to a second cover8, and is routed out of the vacuum interrupter1through the second cover8. By means of the moving contact rod9, the moving contact4can be brought into contact with the fixed contact3in a closing process and moved to a spacing from the fixed contact3in an opening process. The covers7,8together with an insulating material cylinder6disposed between them, which can be made of ceramic material, form the vacuum-tight housing5of the vacuum interrupter1. The lead-through of the moving contact rod9through the second cover8is kept vacuum-tight by means of a metal bellows12, the first end of which is attached to an internal circumference of a circular insertion opening17, which is disposed in a cover base16of the second cover8, and the second end of which is connected to a projection11, designated as bellows cap, of the moving contact rod9, e.g. by soldered/brazed connections. The bearing13comprises a perforated disk-shaped bearing flange14and a tubular guide part15which is attached concentrically to the bearing flange14and is connected to the latter; the bearing13may be made integrally. The bearing13can be made of plastics material. The bearing flange14is centered and fixed to the cover base16, e.g. with the aid of a threaded connection as shown in U.S. Pat. No. 4,071,727A (Crouch et al.), or with the aid of a bearing cap as shown inFIG.2. FIG.2shows a sectional view of a connection of a bellows12according to a first known design embodiment. A cover base16has a circular insertion opening17which is enclosed by a circular encircling edge of the cover base16. Inserted into the insertion opening17of the cover base16is a guide part15of a bearing13of a moving contact rod9, which comprises a bearing flange14and the guide part15, as illustrated inFIG.1. The bellows12has a centering appendage122formed by a tubular end piece of the bellows12that runs parallel to the longitudinal axis129of the bellows12. The external circumference of the centering appendage122bears on the circular encircling edge of the cover base16, which encloses the insertion opening17of the cover flange16. In this way, the bellows12is centered relative to the insertion opening17of the cover base16. For fixing, the bellows12is soldered/brazed to the cover base16in the regions of the centering appendage122and a flank121of the last bellows corrugation125before the centering appendage122that runs out to the centering appendage122. Although this design embodiment allows simple centering of the bellows12relative to the cover base16, it does mean that, for the purpose of fixing the bearing flange14to the cover base16, another component, e.g. a threaded device or, as shown inFIG.2, a bearing cap18attached to the cover base16, in which the bearing flange14and thus the bearing13are inserted and held so as not to be displaceable, is required. FIG.3shows a sectional view of a connection of a bellows12according to a second known embodiment, in which the bellows12is configured as inFIG.2. As in the design embodiment shown inFIG.2, the cover base16also in this design embodiment has a circular insertion opening17which is enclosed by a circular encircling edge of the cover base16. In contrast to the design embodiment shown inFIG.2, the end face161of the cover base16in the design embodiment illustrated inFIG.3, has along its edge that encloses the insertion opening17, a shoulder with a recess that forms a radial width L and has been generated by a subtractive manufacturing method, for example. In the region of the recess, the cover base16has a smaller thickness than outside of this region. The annular face160of the cover base16formed by the recess and offset from the level of the end face161forms a centering face160on which the end, more precisely the end side, of the centering appendage122of the bellows12bears. The external circumference of the centering appendage122bears on an edge that forms a shoulder between the centering surface160and the end face161of the cover base16. The bellows12in the region of this edge and/or in the region of the centering face160is soldered/brazed to the cover flange16. This type of centering of the bellows12is more complex than the type shown inFIG.2, but has the advantage that the cover base16can extend further in the direction of the moving contact rod9, specifically by the radial width L beyond the external circumference of the centering appendage122of the bellows12inwards in the direction of the longitudinal axis129of the bellows12. The accessibility of the edge of the cover base16enclosing the insertion opening17and the independence of the design of this edge from the shape of the centering appendage122of the bellows12opens up the possibility of attaching the bearing13to the cover base16in a different way than in the embodiment shown inFIG.2, e.g. by a bayonet fastener or by a snap-in hook, potentially made of plastics material, as shown in DE 10 2008 018 531 B3. FIG.4shows a sectional view of a connection of a bellows according to a first design embodiment of the invention. Aside from the elements shown inFIGS.2and3, the bellows12additionally has a bellows base123which terminates the centering appendage122and has a through-opening126that is generated by stamping or laser cutting, for example, cf.FIG.5. The centering and fixing of the bellows12on and to the cover base16takes place, as shown inFIG.2, by the cylindrical centering appendage122, to which the bellows base123is attached, and the flank121of the last bellows corrugation125, which runs out to the centering appendage122. In order to fix the bellows12in such a way that the longitudinal axis19of the moving contact rod9coincides with the longitudinal axis129of the bellows12, the bellows12is soldered/brazed to the cover base16in the region of the centering appendage122and/or in the region of the flank121of the last bellows corrugation125before the centering appendage122that runs out to the centering appendage122. The region of the bellows base123of the bellows12enclosing the through-opening126assumes the function of the cover base16fromFIG.3, drawn inwards beyond the external circumference of the centering appendage122of the bellows12, and enables the bearing13to be fastened to the bellows base123of the bellows12. An additional component for fixing the bearing flange14to the cover flange16, e.g. a threaded device or a bearing cap, is therefore not required. FIG.5shows a plan view from above of a bellows base123which has a through-opening126and by way of which a bayonet fastener can be implemented. Distributed in 60-degree segments along the circumference of the through-opening126, there are alternating three protrusions127and three recesses128of the edge of the bellows base123that encloses the through-opening126, whereby the protrusions and recesses are viewed in relation to the longitudinal axis129of the bellows12, and the protrusions127have a first radius R1, and the recesses128have a second radius R2which is greater than the first radius R1measured from the longitudinal axis of the bellows12. The bearing13, which has on the external circumference of its guide part15a contour that corresponds to the protrusions and recesses127,128, can be inserted into the through-opening126and can be mechanically connected to the bellows12(=bayonet fastener) by way of a rotation about the longitudinal axis129of the bellows12relative to the bellows12. FIG.6shows a sectional view of a connection of a bellows according to a second design embodiment of the invention. In comparison to the design embodiment of the bellows12shown inFIG.4, the bellows12has been formed even more extensively here, so that the bellows12has a bellows bushing124in the form of a tubular appendage so as to adjoin the bellows base123extending transversely to the longitudinal axis19of the bellows12. This bellows bushing124assumes the function of a bearing for the moving contact rod9, i.e. the guidance and positioning of the moving contact rod9by allowing the moving contact rod9to slide along an inner wall of the bellows bushing124. Since in this way the bellows12per se forms the bearing of the moving contact rod9, a separate bearing for the moving contact rod9, as required in the design embodiment shown inFIG.4, is unnecessary. | 8,879 |
11942291 | DETAILED DESCRIPTION The above objects, features and advantages will be described in detail later with reference to the accompanying drawings. Accordingly, a person with ordinary knowledge in the technical field to which the present disclosure belongs will be able to easily implement the technical idea of the present disclosure. In describing the present disclosure, when it is determined that a detailed description of a identified component related to the present disclosure may unnecessarily obscure gist the present disclosure, the detailed description is omitted. Hereinafter, a preferred embodiment according to the present disclosure will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to indicate the same or similar elements. In addition, it will also be understood that when a first element or layer is referred to as being present “on” or “beneath” a second element or layer, the first element may be disposed directly on or beneath the second element or may be disposed indirectly on or beneath the second element with a third element or layer being disposed between the first and second elements or layers. It will be understood that when an element or layer is referred to as being “connected to”, or “coupled to” another element or layer, it may be directly on, connected to, or coupled to the other element or layer, or one or more intervening elements or layers may be present. In addition, it will also be understood that when an element or layer is referred to as being “between” two elements or layers, it may be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present. FIG.2is a partial cross-sectional view showing a vacuum circuit breaker to which a movement sensing device according to a first embodiment of the present disclosure is applied.FIG.3is an exploded perspective view showing the movement sensing device according toFIG.2.FIG.4is an enlarged perspective view showing a sensing target of the movement sensing device according toFIG.3.FIG.5is an exploded perspective view showing the sensing target according toFIG.4.FIG.6is a graph showing an output waveform of the movement sensing device according toFIG.3and a stroke waveform of the vacuum circuit breaker. As shown inFIG.2, a movement sensing device800for a vacuum circuit breaker according to an embodiment of the present disclosure is installed in a location at which the device800may check a contact state of a vacuum circuit breaker A to detect contact movement characteristics. A brief description of main components of the vacuum circuit breaker A is as follows. Hereinafter, only some components of the vacuum circuit breaker related to an embodiment of the present disclosure will be briefly described. The vacuum circuit breaker A includes a main circuit100including a vacuum interrupter130, a push rod assembly200and a main shaft300for transmitting power to a contact of the vacuum interrupter130, and a mechanism assembly400that generates a driving force and is connected to the main shaft300to deliver the driving force thereto. The components of the vacuum circuit breaker A described above are installed on a track assembly700. The main circuit100has a housing110and the vacuum interrupter130installed inside the housing110. The vacuum interrupter130includes an insulating container132having a receiving space defined therein, a fixed electrode134fixedly received in a upper portion of the insulating container132, and a fixed contact134adisposed at an end of the fixed electrode134, a movable electrode136installed in a lower portion of the insulating container132to be movable up and down, and a movable contact136adisposed at an end of the movable electrode136. An arc shield132athat creates vacuum is housed inside the insulating container132. The arc shield132asurrounds the fixed electrode134and the fixed contact134a, and the movable electrode136and the movable contact136a. The movable contact136amay be brought into in an inserted state in which the movable contact136acomes into contact with the fixed contact134aunder movement of the movable electrode136or may be brought into a withdrawn state (open state: current blocking state) in which the movable contact136ais spaced from the fixed contact134a. The movable electrode136ascends or descends under movement of the push rod assembly200. The push rod assembly200inserts or withdraws the movable electrode136. The push rod assembly200includes a movable rod210connected to the movable electrode136and a push rod230connected to the main shaft300, and a rod housing250having a top coupled to the movable rod210and a bottom coupled to the push rod230, and an inserting spring270which is accommodated inside the rod housing250and is compressed by the push rod230and or is restored. The main shaft300is connected to the bottom of the push rod230. The rod housing250has an exterior appearance of an approximately cylindrical shape. An upper end of the rod housing250to which the movable rod210is coupled may have a smaller diameter than that of a portion of the rod housing in which the inserting spring270is accommodated. A lower end of the rod housing250is open. A cylindrical receiving space is defined in the rod housing therein. The inserting spring270is inserted inside the receiving space of the rod housing250. The push rod230supports the inserting spring270such that the spring is not removed from the rod housing, and one end of the push rod is fixedly disposed inside the receiving space. The rod housing250may have a coupling structure to which a sensing target830corresponding to a sensor module810to be described later is coupled. This will be described later. The main shaft300is connected to the mechanism assembly400and transmits the power generated from the mechanism assembly400to the push rod assembly200. The main shaft300may have a plate shape with a predefined area. One end of the main shaft300is pivotally coupled to a bottom of a power transmission structure of the mechanism assembly400. The opposite end of the main shaft300is coupled to the push rod230. The main shaft300may have a shape decreasing in size as it extends from one end coupled to the mechanism assembly400to the opposite end coupled to the push rod230. That is, as shown inFIG.2, the main shaft300may have a similar shape such as a water droplet shape with a larger diameter at one side thereof than that at the opposite side thereof. One end of the main shaft300coupled to the mechanism assembly400is defined as a first rotatable portion310, and the opposite end thereof is defined as a second rotatable portion330. The main shaft300may be pivotally coupled to a drive link not shown in the drawing. The main shaft300is exposed out of a lower bracket510of the mechanism assembly400. The first rotatable portion310of the main shaft300rotates clockwise or counterclockwise along an arrow direction B under the driving force transmitted from the mechanism assembly400. When the first rotatable portion310rotates counterclockwise, the second rotatable portion330rises up along an arrow direction C. When the push rod230rises up, the inserting spring270is compressed such that the push rod230pushes up the movable rod210. When the movable rod210rises up, the movable contact136arises up and becomes an inserted state in which the movable contact contacts the fixed contact134a. Conversely, when the first rotatable portion310rotates clockwise, the second rotatable portion330descends along the arrow direction C. When the push rod230descends, the inserting spring270is restored and the push rod230descends to its original position. When the movable rod210descends, the movable contact136adescends and becomes an open or withdrawn state in which the movable contact is removed from the fixed contact134a. As described above, when the movable rod210is raised or lowered by raising or lowering the push rod230, the movable contact136acontacts or is removed from the fixed contact134a. When the push rod230ascends, the rod housing250ascends together with the push rod. The rod housing250is a relatively accessible part compared to the push rod230. Therefore, in accordance with the present disclosure, the movement sensing device800is installed on the rod housing250and a portion adjacent thereto to detect a movement state of the push rod230. Accordingly, the device800may detect the inserted or withdrawn timing of the movable contact136aand thus determine whether there is an abnormal operation or performance degradation of the breaker based on the detection result. As shown inFIG.3toFIG.5, the movement sensing device800includes the sensor module810for sensing the movement of the push rod230, and a sensing target830formed on the rod housing250to allow the sensor module810to sense the movement of the push rod230. The movement sensing device800may further include brackets850and870for installing the sensor module810. Each of the brackets850and870is not limited in shape as long as the bracket couples the sensor module810to the housing110of the vacuum circuit breaker A. The sensor module810includes a light-emitter812that emits light, a light-receiver814that receives the light emitting from the light-emitter812, and a circuit816that controls the light-emitter812and the light-receiver814and processes a signal. The light-emitter812and the light-receiver814are installed side by side and on one side of the circuit816. The sensor module810is also installed such that the light-emitter812and the light-receiver814face toward the rod housing250. The light-emitter812of the sensor module810emits light in a direction of an arrow D. The sensor module810is configured such that the light-receiver814detects light emitting from the light-emitter and then reflected back from the sensing target830. Therefore, as shown inFIG.4, the sensor module810should be installed in a position where the light-emitter812and the light-receiver814face toward the push rod assembly200, and thus the light emits toward and is reflected from the sensing target830which will be described later. This will be described later. Because a photocurrent proportional to light intensity detected by the light-receiver814flows in the circuit816, an amount of the current varies based on an amount of the reflected and returned light. As the amount of the reflected and returned light increases, the amount of the current generated in the circuit816increases. The circuit816may process the photocurrent and output a current value or a voltage value signal converted from the current value. The sensor module810detects the amount of the light emitting from the light-emitter812and reflected from an object and incident onto the light-receiver814. Thus, the amount of the light emitting from the light-emitter812and reflected from the sensing target and incident onto the light-receiver814decreases as a distance between the sensor module810and the object increases. Thus, when the amount of the light incident on the light-receiver814decreases, the amount of the photocurrent decreases. Thus, the distance the object and the sensor module810may be detected based on the current amount. Further, when the amount of the reflected light incident on the light-receiver814is zero, the photocurrent value becomes 0. Therefore, the device800may use the sensor module810to determine whether there is an object at a sensed position. Therefore, a direction in which the sensor module810emits light, and then the light is reflected becomes a sensing direction. The sensor module810may detect a displacement in the same direction as the sensing direction. The distance between the sensor module810and a sensing target or whether the sensing target is present at a target position may be determined using a separate processing device (not shown). The processing device may be implemented as a device that may process and analyze a signal from the circuit816, such as a separately installed controller, a user terminal, or an external server. The circuit816may transmit the processed current value to the processing device or convert the current value into the voltage value and transmit the voltage thereto. Alternatively, the circuit816may send the current value to the processing device which in turn may converting the current value to the voltage value. Then, the processing device may determine presence or absence of the sensing target. In this embodiment, the light-emitter812emits light to the sensing target830, and then the emitting light is reflected from the sensing target830and is then incident on the light-receiver814. That is, the sensor module810is associated with the sensing target830. The sensing target830includes a slit body832disposed on an outer circumferential face of the rod housing250, a slit plate834formed on the slit body832, and a plurality of sensed slit834aformed in the slit plate834. The slit body832may be removably coupled to or fixed to the rod housing250. The sensing target830reflects the light emitting from the sensor module810. Therefore, as shown inFIG.4, the sensing target830should be installed on the rod housing such that the sensing target faces toward the light-emitter812and light-receiver814of the sensor module810. In more detail, the light-emitter812and the light-receiver814of the sensor module810face toward a plate surface of the slit plate834. The slit body832has a plate shape with a predefined thickness and a predefined length, and is inserted into the rod housing250. The slit plate834having the sensed slits834adefined therein protrudes from the slit body832. That is, a combination of the slit body832and the slit plate834has an approximately ‘T’ shape. Therefore, in a state where the slit body832is coupled to the rod housing250, only the slit plate834protrudes from an outer face of the rod housing250. To this end, the slit body832may have a curved shape to have a curvature corresponding to a curvature of the rod housing250. That is, the slit body832may have a streamline shaped cross-section. Each of an inner circumferential face and an outer circumferential face of the slit body may have a curvature corresponding to a curvature of the rod housing250. Because the slit body832has a thickness, a thickness of the rod housing250may have a thickness sufficient to allow the slit body832to be sufficiently inserted herein. The slit plate834protrudes from an outer circumferential face of the slit body832and along a length direction thereof. The slit plate834has a bar shape protruding outwards and in a vertical direction and from the outer circumferential face of the slit body832. The plurality of sensed slits834aextend through a plate face of the slit plate834and are arranged along a longitudinal direction of the plate. The sensed slit834aincludes a plurality of horizontal slits with reference toFIG.5. The sensed slits834aextends through the slit plate834and are arranged and spaced from each other by an equal spacing. In this embodiment, a spacing between the sensed slits834a(in the longitudinal direction of the slit plate) may be larger than a width of the sensed slit834a(in the longitudinal direction of the slit plate). When the light emitting from the light-emitter812meets the slit plate834and then is reflected therefrom and then is incident onto the light-receiver814. When the light meets the sensed slit834a, the light passes through the sensed slit834a. Accordingly, signals generated in the circuit816in the former and latter cases are different from each other. This will be described later. In one example, a coupling structure for coupling the sensing target830to the rod housing is formed at the rod housing250. As shown inFIG.5, a portion of the rod housing250corresponding to a receiving space (hereinafter, a spring receiving space) is cut away to form a receiving slit252. The slit body832of the sensing target830is inserted into the receiving slit252. The inserting spring270and the push rod230are combined with each other while the slit body832is coupled to the receiving slit252. While all of the slit body832, the inserting spring270and the push rod230are coupled to the rod housing250, a fixing portion290is coupled thereto prevent separation of the slit body832from the housing. The receiving slit252extends along a longitudinal direction of the push rod230and through a wall of the rod housing250. That is, the receiving slit252is formed between the inner circumferential face and the outer circumferential face of the rod housing250and in the spring receiving space250a. The receiving slit252has a shape and a size corresponding to those of the slit body832so that the slit body832may be inserted into the slit252. One end of the receiving slit252is open and is in communication with an open end of the spring receiving space250a. The opposite end of the receiving slit252contacts one end of the slit body832to block the movement of the slit body832. Further, in an area of the receiving slit252, a slit hole252ais cut away to expose the slit plate834out of the rod housing250. The slit hole252ahas a length enough to expose the slit plate834. Using the above structure, the slit body832is inserted from the open end of the receiving slit252and upwards and along a length direction, and then is fixed by the fixing portion290. At this time, the slit plate834is in an exposed state out of the slit hole252a. The inserting spring270and the push rod230are combined to each other and inserted into the rod housing while the slit body832is inserted into the receiving slit252. Then, the fixing portion290is inserted and fixed to the rod housing250. The fixing portion290has a stopper structure having a ring-shaped hollow body, and a portion protruding from the body and inserted into the spring receiving space250a. It is desirable that the hollow is sized such that the fixing portion does not interfere with the movement of the push rod230. The fixing portion290is coupled to the rod housing250to prevent the slit body832from being removed from and out of the receiving slit252. The protrusion of the fixing portion290may have a predefined thickness and may have an outer diameter corresponding to an inner diameter of the rod housing250. A detailed description of a method for sensing and monitoring contact movement characteristics using the movement sensing device for the vacuum circuit breaker according to an embodiment of the present disclosure having the above configuration is as follows. When the push rod230rises up toward a top ofFIG.2under movement of the main shaft300, the sensor module810detects a position of the sensing target830mounted on the rod housing250and indirectly detects the position of the push rod230. The light-emitter812of the sensor module810emits light continuously. The sensing target830present in the sensing direction of the emitting light has the sensed slit834a, and thus the light is reflected from the slit plate or transmits through the sensed slit. When the rod housing250rises up due to a vertical level increase of the push rod230, the light may sequentially meet a topmost sensed slit834a, a next topmost sensed slit834a, and so on defined in the slit plate834. The sensed slit834atransmits light therethrough. A portion of the slit plate834between the sensed slit834ablocks light so that the light is reflected therefrom. Therefore, while the rod housing250is rising up, the passing-through and blocking of the light emitting from the light-emitter812are sequentially repeated. Thus, a graph shown inFIG.6is derived. As shown inFIG.6, when the light emitting from the light-emitter812is blocked by the plate surface of the slit plate834, the light is reflected therefrom and incident on the light-receiver814of the sensor module810. Therefore, an output voltage of the sensor module810is maintained at a constant value while the light is reflected therefrom. When the light emitting from the light-emitter812passes through the surface of the slit plate834and reaches the sensed slit834a, the light passes through the sensed slit834a. Therefore, no light is reflected and incident to the light-receiver814, so that the output voltage of the sensor module810becomes zero. While the light transmits through the slit, the output voltage of sensor module810continues to be zero. Because the sensed slits834aare arranged in the slit plate834and spaced from each other by a regular spacing, a section in which the output voltage is a constant non-zero value and a section in which the output voltage is zero are alternatively repeated. Therefore, the output voltage of sensor module810is shown as an upper graph form ofFIG.6. The push rod230moves by the main shaft300, and the movable electrode136moves by the push rod230. The movable contact136ais disposed at an end of the movable electrode136. Thus, the movement of the main shaft300is associated with the movement of the movable electrode136. Therefore, a stroke graph (a lower graph ofFIG.7) of the movable contact136amay be obtained based on an output voltage waveform graph of the sensor module810and the spacing between the sensed slits834a. The stroke of the movable contact136ameans a speed when the movable contact136ahits the fixed contact134a. Thus, the movement characteristics of the movable contact136amay be monitored in a normal operation state. When a graph different from that of the normal operation state is derived, the controller or the user may determine a current situation as a problematic situation such as a contact error. In an event of malfunction or performance degradation of the main shaft300, the push rod230, or the movable contact136a, an output voltage waveform interval over an operation time of the sensor module810or a slope of a stroke graph of the movable contact136ais different from a graph in a normal situation. Therefore, the movement sensing device800according to the present disclosure may be used to detect an abnormal movement or performance degradation of the main shaft300or the push rod230and the movable contact136a. The sensor module810may operate to continuously monitor the movement of the sensing target830, or may operate only in the contact closed or inserted state. In the above-described embodiment, a structure in which both the light-emitter812and the light-receiver814of the sensor module810are installed on the circuit816, and face toward the sensing target830has been described. However, in another example, the light-emitter812and the light-receiver814may be disposed to face toward each other while the sensing target830is interposed therebetween. In the above-described embodiment, an example in which the sensing target has the slits has been described. However, the sensing target may be implemented in a different form. Detailed descriptions of the same component or configuration as that of the above-described embodiment will be omitted. FIG.7is an exploded perspective view showing a movement sensing device in accordance with a second embodiment of the present disclosure.FIG.8is an exploded perspective view showing a movement sensing device according to a third embodiment of the present disclosure.FIG.9is a graph showing an output waveform of each of the movement sensing devices according toFIG.7andFIG.8and a stroke waveform of the vacuum circuit breaker. As shown inFIG.7, another movement sensing device800according to the second embodiment of the present disclosure includes the sensor module810identical with that of the first embodiment, and a sensing target830′. The sensing target830′ has a body832′ and protrusions834′. The body832′ has the same shape as the slit body832of the first embodiment, and has a plate shape having the same curvature as the curvature of the outer circumferential face of the rod housing250. The plurality of protrusions834′ protrude from an outer circumferential face of the body832′ and arranged along the longitudinal direction of a slit hole252a. The protrusion834′ may protrude from an outer face of the body832′ and may be formed in a form of a cuboid or a cube. The protrusion834′ has a predefined size. The plurality of protrusions are arranged and spaced from each other by a preset spacing. As in the first embodiment, the body832′ is inserted into the slit hole252aof the receiving slit, and the protrusions834′ protrude out of the slit hole252a. Alternatively, as shown inFIG.8, a body832″ may surround an outer circumferential face of the rod housing250and extend in a vertical direction. In this case, the body832″ is not inserted into the receiving slit252of the rod housing250, but is coupled to an outer circumferential face of the rod housing250. Therefore, the rod housing250is free of the receiving slit252. In this connection, a protrusion834″ may have the same structure as that of the second embodiment. The sensor module810faces toward the sensing target830′ or830″ according to the second or third embodiment of the present disclosure as shown inFIG.4, and more specifically, faces a side face of the protrusion834′ or834″. In the sensing targets830′ and830″ according to the second and third embodiments of the present disclosure, light may pass through a space between the protrusions834′ and a space between the protrusions834″. The protrusions834′ and834″ may block the light and thus, the light may be reflected therefrom. Therefore, while the rod housing250rises up, the passing-through and blocking of the light emitting from the light-emitter812are alternately repeated. Thus, a graph shown inFIG.9is derived. Therefore, in a similar manner to the first embodiment, the movement sensing device according to each of the second and third embodiment may detect movement abnormality or performance degradation of the main shaft300, the push rod230, and the movable contact136a. Alternatively, although not shown in the drawings, the sensor module810faces toward the sensing target830′ or830″ according to the second or third embodiment of the present disclosure and faces a front face of the protrusion834′ or834″. In this connection, a difference between a sensed value detected by the sensor module810based on a distance thereof to the protrusion834′ or834″ and a sensed value detected by the sensor module810based on a distance thereof to a space between the protrusions834′ or a space between the protrusions834″ may occur. In other words, the distance between the space between the protrusions834′ or the space between the protrusions834″ and the sensor module810larger than the distance between the sensor module810and the protrusion834′ or834″. Thus, the sensed value detected by the sensor module810based on the distance thereof to the protrusion834′ or834″ may be greater than the sensed value detected by the sensor module810based on the distance thereof to the space between the protrusions834′ or the space between the protrusions834″. Therefore, in a similar manner to the first embodiment, the movement sensing device according to each of the second and third embodiment may detect movement abnormality or performance degradation of the main shaft300, the push rod230, and the movable contact136a. The present disclosure as described above may be subjected to various substitutions, modifications and changes within the scope that does not depart from the technical spirit of the present disclosure by those of ordinary skill in the technical field to which the present disclosure belongs. Thus, the present disclosure is not limited to the above-described embodiments and the attached drawings. | 27,678 |
11942292 | DETAILED DESCRIPTION The above objects, features and advantages will be described in detail later with reference to the accompanying drawings. Accordingly, a person with ordinary knowledge in the technical field to which the present disclosure belongs will be able to easily implement the technical idea of the present disclosure. In describing the present disclosure, when it is determined that a detailed description of a identified component related to the present disclosure may unnecessarily obscure gist the present disclosure, the detailed description is omitted. Hereinafter, a preferred embodiment according to the present disclosure will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to indicate the same or similar elements. In addition, it will also be understood that when a first element or layer is referred to as being present “on” or “beneath” a second element or layer, the first element may be disposed directly on or beneath the second element or may be disposed indirectly on or beneath the second element with a third element or layer being disposed between the first and second elements or layers. It will be understood that when an element or layer is referred to as being “connected to”, or “coupled to” another element or layer, it may be directly on, connected to, or coupled to the other element or layer, or one or more intervening elements or layers may be present. In addition, it will also be understood that when an element or layer is referred to as being “between” two elements or layers, it may be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present. FIG.1is a perspective view showing a vacuum circuit breaker to which a contact monitoring module according to an embodiment of the present disclosure is applied.FIG.2is a perspective view showing a portion of an inside of the vacuum circuit breaker according toFIG.1.FIG.3is a cross-sectional view showing a portion of an inside of the vacuum circuit breaker according toFIG.1.FIG.4is an enlarged side view of main components of the vacuum circuit breaker according toFIG.1.FIG.5is a perspective view showing an installed state of the contact monitoring module according toFIG.2at another angle.FIG.6is a side view of main components showing a contact open or withdrawn state of the vacuum circuit breaker according to the present disclosure.FIG.7is a side view of main components showing a contact closed or inserted state of the vacuum circuit breaker according to the present disclosure.FIG.8is a side view of main components showing a maximum contact wear state of the vacuum circuit breaker according to the present disclosure. Referring toFIG.1andFIG.2, a vacuum circuit breaker10according to an embodiment of the present disclosure includes a body100in which a mechanism assembly (not shown) for generating a driving force is installed, an insulating housing200installed on one side of the body100, a vacuum interrupter module300accommodated in the insulating housing200, and a vehicle400movably supporting the body100and the insulating housing200. The vehicle400is inserted into or withdrawn from a cradle (not shown), and thus the vacuum interrupter module300contacts or is removed from a bus terminal (not shown) and a load terminal (not shown). A contact monitoring module500for the vacuum circuit breaker is installed under the vacuum interrupter module300to monitor contact wear. The body100receives the mechanism assembly therein that generates a driving force. The driving force generated by the mechanism assembly is transmitted to an outside of the body100via a plurality of links and shafts. The driving force is transmitted to the vacuum interrupter module300via a main lever360as a bottom portion of the vacuum interrupter module300. The body100is mounted on a top face of the vehicle400, and the insulating housing200is coupled to one side of the body. The insulating housing200is mounted on a top face of the vehicle400while accommodating therein the vacuum interrupter module300. The insulating housing200includes a plurality of insulating housings corresponding to a plurality of vacuum interrupter modules300. A terminal of the vacuum interrupter module300is exposed through one open side of the insulating housing200. As shown inFIG.2andFIG.3, the vacuum interrupter module300includes a vacuum interrupter310having a contact therein, a push rod assembly320for inserting or withdrawing the contact, a connecting rod330that transmits a driving force of the push rod assembly320to the vacuum interrupter310, and an upper terminal assembly340and a lower terminal assembly350connected to the connecting rod330and respectively coupled to a top and a bottom of the vacuum interrupter310. The upper terminal assembly340and the lower terminal assembly350are electrically connected to the bus terminal (not shown) and the load terminal (not shown) of the cradle (not shown). The main lever360is connected to a bottom of the push rod assembly320to transmit the driving force to the push rod assembly320. The vacuum interrupter310includes an insulating container312having an accommodating space defined therein, a fixed electrode314fixed to an inner top face of the insulating container312, a fixed contact314aprovided at an end of the fixed electrode314, a movable electrode316movably installed on an inner bottom face of the insulating container312, and a movable contact316athat is provided at an end of the movable electrode316. An arc shield312athat generates a vacuum is accommodated inside the insulating container312. The arc shield312asurrounds the fixed electrode314and the fixed contact314a, and the movable electrode316and the movable contact316a. The movable contact316amay be brought into in an inserted state in which the movable contact316acomes into contact with the fixed contact314aunder movement of the movable electrode316or may be brought into a withdrawn state (open state) in which the movable contact316ais spaced from the fixed contact314a. The movable electrode316ascends or descends under movement of the push rod assembly320. The push rod assembly320inserts or withdraws the movable electrode316. The push rod assembly320includes a push rod322that transmits the power of the main lever360to the movable electrode316, a rod spring324that elastically supports the push rod322, and a rod housing326that receives the push rod322and a portion of the rod spring324. The push rod322is connected to the movable electrode316via the connecting rod330. The push rod322is raised or lowered by the main lever360to raise or lower the connecting rod330. The connecting rod330is raised or lowered by the push rod322to raise or lower the movable electrode316. A state in which the movable electrode316rises up such that the movable contact316acomes into contact with the fixed contact314ais referred to as a “contact closed or inserted’ state. Conversely, a state in which the movable electrode316descends such that the movable contact316ais removed from the fixed contact314ais refereed to a ‘contact open or withdrawn’ state. In the contact closed or inserted state, the fixed contact314aand the movable contact316aare in electrical contact with each other while in the contact open or withdrawn state, the fixed contact314aand the movable contact316aare removed from each other to block the current. The vacuum circuit breaker10becomes the contact open or withdrawn state when an accident current occurs, thereby blocking the accident current. The push rod assembly320is driven via the main lever360installed under the push rod322. The main lever360is connected to the mechanism assembly and transmits the power generated from the mechanism assembly to the push rod assembly320. The main lever360has one end coupled to an output shaft112of the mechanism assembly and the opposite end extending toward the opposite side of the mechanism assembly thereto. The push rod322is connected to a certain point of the main lever360. The push rod322has to be raised and lowered by the main lever360. Thus, in order to move the push rod322with a small force, it is preferable that the push rod322is far away from the output shaft112of the mechanism assembly. In accordance with the present disclosure, an example in which the main lever360is divided into three portions and the push rod322is connected to a left end of a right portion among the three portions is shown with reference toFIG.5. A detailed structure of the main lever360is as follows. As shown inFIG.3toFIG.5, the main lever360includes a first link361and a second link362, a plurality of connecting pins363for connecting the first link361and second link362to each other, a connector364that connects the first link361and the second link362to the push rod322, and a fastening member365that is coupled to the connector364. The first link361and the second link362have the same shape and are disposed to face toward each other. Each of the first link361and the second link362is embodied as a flat bar with a predefined length. Each of both opposing ends of each of the first link361and the second link362is formed in a semicircular shape and has a through-hole defined therein into which the connecting pin is inserted. The connecting pin363has a cylindrical shape and has a length sized such that the pin passes through an end of each of the first link361and the second link362. The connecting pins363may include two connecting pins which may be respectively inserted into both ends of each of the first link361and the second link362. The connecting pin363pivotably supports the first link361and the second link362. Although not shown in detail in the drawings, one of the pair of connecting pins363may be connected to the mechanism assembly, and the other thereof may be coupled to the insulating housing200. The connecting pin363connected to the mechanism assembly may be directly connected to the output shaft112. Further, the main lever360near the connecting pin363may be connected to the output shaft112. Accordingly, one end of each of the first link361and the second link362is raised or lowered by the output shaft112of the mechanism assembly110. As one end of each of the first link361and the second link362ascends and descends, the main lever360is displaced. Thus, the contact monitoring module500which will be described later detects this displacement. This will be described later. The connector364is disposed between to the first link361and the second link362and is coupled to the first link361and the second link362. The connector364is coupled to the push rod322by the fastening member365. Therefore, the fastening member365has to pass through the connector364. Thus, the connector364has a larger size than that of the fastening member365. The contact monitoring module500is installed on the connector364. Therefore, the connector364is sized such that the fastening member365and the contact monitoring module500may be mounted thereon. Further, the connector364should raise or lower the push rod322in conjunction with motion of the first link361and the second link362. To this end, the connector364must be pivotally coupled to the first link361and the second link362. The connector364may have a cylindrical coupling pin364aat each of both ends thereof such that the connector is pivotably coupled to the first link361and the second link362. Inserting the coupling pin364ainto the first link361and the second link362may allow the connector364to be pivotably coupled to the first link361and the second link362. A fixture (not shown) such as an ‘E-ring’ may be additionally coupled to an end of each of the connecting pin363and the coupling pin364aso that the pins are not removed from the first link361and the second link362while being inserted into the links. In order to measure an amount of movement of the push rod322, a vertical displacement of the push rod322must be detected. To this end, as described above, the contact monitoring module500capable of detecting the vertical displacement is installed under the push rod assembly320. As shown inFIG.4andFIG.5, the aforementioned contact monitoring module500is coupled to the connector364of the main lever360to detect the displacement of the push rod322. The main lever360is coupled to the push rod322, and the push rod322moves along a longitudinal direction of the vacuum interrupter310. The push rod322is connected to the movable electrode316via the connecting rod330. Therefore, when the push rod322moves upward or downward, the movable electrode316also rises up or descends. As the movable contact of the movable electrode316is repeatedly inserted, the contact wear amount increases. Thus, a vertical level of the movable contact gradually rises up toward the fixed contact314a. Accordingly, a difference between displacements of the push rod322in the contact open or withdrawn state and the contact closed or inserted state in the longitudinal direction of the vacuum interrupter310(perpendicular to a plate surface of the vehicle) may occur. Therefore, the contact monitoring module500may detect the displacement of the push rod322to indirectly monitor the wear amount of the contact of the vacuum interrupter310. The contact monitoring module500includes a sensor holder510coupled to the vehicle400and a linear sensor530connecting the sensor holder510and connector364to each other. One end of the sensor holder510is fixed to a top face of the vehicle400, and the opposite end thereof is connected to the linear sensor530. The sensor holder510serves to mechanically support the linear sensor530. At the same time, the sensor holder510functions as a processing function of a signal from the linear sensor530. To this end, the sensor holder510may include a circuit (not shown) for the signal processing therein. The sensor holder510may process a detection signal of the linear sensor530and output the processing result to an external component. An output signal output from the sensor holder510may vary depending on the displacement value of the linear sensor530. Therefore, the signal output from the sensor holder510may be used to calculate the displacement. The signal output from the sensor holder510may be transmitted to an external data processing device or a smart terminal of a manager as not shown in the drawing. The linear sensor530may be embodied as a sensor having a cylindrical exterior appearance, and capable of detecting a displacement in a longitudinal direction. However, the linear sensor530is not limited to the sensor having the above-described exterior appearance, and may be substituted with a sensor of another type as along as displacement in a linear direction may be measured thereby. One end of the linear sensor530is connected to the sensor holder510and the opposite end thereof is connected to the connector364of the main lever360. Because the connector364is connected to a lower end of the push rod322, the linear sensor530is installed on the connector364to detect the displacement of the push rod322. The linear sensor530detects a displacement that changes when being ascending or descending and transmits a displacement value signal to the sensor holder510. The linear sensor530may be embodied as a sensor having a variable length along a longitudinal direction of the exterior appearance, and capable of detecting a variable displacement. The linear sensor530may be embodied as a sensor that detects a movement distance itself or detects a resistance value or a current value that varies based on a displacement. The linear sensor530may be applied regardless of a type thereof as long as it may detect the displacement difference occurring along the longitudinal direction. Hereinafter, a method of monitoring the contact wear amount using the contact monitoring module500will be described. In this embodiment, referring toFIG.6, a position of a right connecting pin363among the connecting pins363of the main lever360is defined as P1, a connecting point between the push rod322and the main lever360is defined as P2, and a position of a left connecting pin363of the connecting pins363is defined as P3. The push rod assembly320moves in a vertical direction as an up-down direction inFIG.5. The push rod322does not rise up in the contact open or withdrawn state, such that the push rod always maintains the same position. In the contact open or withdrawn state, a distance from a top surface of vehicle400to P3is defined as L1. A distance from the top surface of vehicle400to P1is defined as L2. Therefore, a stroke (a displacement in the vertical direction) of the main lever360becomes (L2−L1). Further, a stroke of the vacuum interrupter310becomes a displacement difference ΔS between P1and P2. As shown inFIG.7, in a first inserted state, the push rod assembly320has a certain amount of a vertical displacement. Because P1is fixed on the insulating housing200, the position of P1in the first contact closed or inserted state is the same as the position in the contact open or withdrawn state. At this time, because the main lever360is connected to the output shaft112of the mechanism assembly, P3rises up as the main lever360rises up. Because the push rod322is raised by the main lever360, the push rod is raised up by a preset distance between the fixed contact314aand the movable contact316a. Accordingly, P2also rises up. In the first contact closed or inserted state, the stroke of the main lever360is the same as that in the contact open or withdrawn state. Further, in the first contact closed or inserted state, ΔS is equal to a distance between fixed contact314aand the movable contact316a(it is assumed that in the first contact closed or inserted state, the contact wear amount is zero). However, as shown inFIG.8, when the contact wear amount increases as the contact is repeatedly closed or inserted, the push rod assembly320rises up in the vertical direction by the increase in the contact wear amount. When the contact is repeatedly closed or inserted, the position of P2rises up gradually. Thus, the stroke (L2−L1) of the main lever360gradually increases. Further, when the contact is opened or withdrawn, P2gradually rises upwardly beyond the position of P. Thus, ΔS also increases. The contact monitoring module500is mounted on a bottom face of the connector364to measure a displacement of P2. Therefore, when the push rod322gradually rises up due to the increase in the contact wear amount as the contact is repeatedly closed or inserted, ΔS gradually increases. A ΔS value when the contact wear amount is zero may be set as a reference value, based on a distance between the fixed contact314aand the movable contact316a. When a current ΔS value is larger than the reference value, a difference value therebetween may be determined as the contact wear amount. Therefore, when the contact wear amount exceeds a preset value, this situation may be notified to a manager. A subject which performs the determinations and controls as descried above may be an external data processing device connected to the sensor holder510or a manager connected thereto. The contact monitoring module for the vacuum circuit breaker according to the present disclosure may directly measure the wear amount of the contact, and thus may monitor the contact wear amount in real time. Further, the contact monitoring module for the vacuum circuit breaker according to the present disclosure may determine the contact wear amount before the contact wear amount exceeds a threshold, and thus may determine an appropriate maintenance time. Accordingly, reliability and performance of the vacuum circuit breaker may be improved. The present disclosure as described above may be subjected to various substitutions, modifications and changes within the scope that does not depart from the technical spirit of the present disclosure by those of ordinary skill in the technical field to which the present disclosure belongs. Thus, the present disclosure is not limited to the above-described embodiments and the attached drawings. | 20,176 |
11942293 | Identical reference numbers designate elements or components with identical functions. In so far as elements or components correspond to one another in terms of their function in different figures, the description thereof is not repeated for each of the following figures. For the sake of clarity elements might not appear with corresponding reference symbols in all figures possibly. DETAILED DESCRIPTION FIG.1illustrates a side view of an embodiment of a system1for controlling a vacuum interrupter30of a power diverter switch.FIG.2illustrates another side view of the system1andFIG.3shows a perspective view of some components of the system1. The system1includes a main driving shaft10which is coupled to a control cam13and which is configured to drive the control cam13. The vacuum interrupter (VI)30which is configured to separate electrical contacts in a vacuum by use of a contact rod31. A transmission unit20which is configured to transmit the force generated by the main driving shaft10to the contact rod31. The transmission unit20comprises a plurality of rollable guiding elements and a lever mechanism21,22,23,24which is coupled to both the control cam13and the contact rod31of the vacuum interrupter30. The guiding elements are formed as rolling bearings25. Thus, a rotation of the control cam13generated by the main driving shaft10causes a movement of the contact rod31due to a guided movement of the lever mechanism21,22,23,24by means of rolling of the bearings25. The system1realizes a component of a power diverter switch for an on-load tap changer. The diverter switch further comprises a lower supporting steel plate14and an upper insulating plate12on which is mounted a stationary contact board11, carrying the VI30. The control cam13is fastened to the main driving shaft10. The lever mechanism of the transmission unit20comprises a cylindrical element24and a lever23perpendicularly connected thereto. The cylindrical element24is further connected to the contact rod31of the VI30. The cylindrical element24is guided by two groups of rolling bearings25distanced one above the other forming an upper and a lower guiding unit of guiding elements. According to the illustrated embodiments, each group consists of four bearings25located at an angle of approximately 90° relative to each other with respect to a central axis L2of the cylindrical element24and/or the VI30. Thus, the illustrated embodiment of the system1comprises eight rolling bearings25to provide stable and reliable guidance. Thus, with respect to the central axis L2the transmission unit20counteracts an unwanted tilt of the cylindrical element24and contributes to a secure and reliable movement of the contact rod31and separation of the electrical contacts of the VI30. The bearings25are mounted on a stationary hollow holder29with a slot on one side, in which the perpendicular lever23can move. The system1comprises two further bearings which are mounted on the lever23and which realize a first lever bearing21and a second lever bearing22. The control cam13is a specially shaped cylindrical cam and is configured to act on the first lever bearing21by applying a force parallel to the central axis L2of the VI30. The second lever bearing22is configured to move between two guiding pins28with a relative small gap such that the second lever bearing22touches only one guiding pin28or the other (seeFIG.3). Alternatively, the guiding pins28and the second lever bearing22can be arranged at the opposite side of the cylindrical element24, for example, with respect to the central axis L2interacting with an elongated lever23. Such a mechanism respectively enables to prevent unwanted rotation of the contact rod31around its axis which corresponds to the central axis L2. Moreover, in order to contribute to a space-saving design of the system1two contact springs27are placed on both sides of the stationary holder29with the bearings25. These contact springs27are driven by the contact rod31using a common strap (seeFIG.2). The described system1provides a reliable mechanism for direct control of the vacuum interrupter30in the power diverter switch for an on-load tap changer. The structure of the system1is clear and enables a simple driving mechanism for the VI30without any hinges, due to the described structure of the transmission unit20. The contact rod31of the VI30is guided straight between the two sets of four rolling bearings25, which can be formed as rollers and/or bushings alternatively. Thus, it is possible for the point of application of the force needed to open the VI30to be displaced away from its longitudinal axis L2. The main driving shaft drives the control cam13which acts on the first lever bearing21that is mounted on the cylindrical guided part realized by the cylindrical element24with perpendicular lever23. Such a mechanism enables a simple but reliable way of actuating the contact rod31—directly, without any additional elements with the corresponding unwanted gaps and unwanted wear in hinges, for example. There is only rolling friction and no friction in sliding present in this mechanism due to the rollable guiding elements and the hingeless lever mechanism. The described rollable bearings25beneficially operate using a small predetermined gap between the bearings25and the cylindrical element24such that there is a slight guiding contact to one of the upper and/or lower bearings25, at least. In particular, such a system1is suitable when an interaxial distance between the central axis L2of the VI30and a central axis L1of the main driving shaft10must be minimal or relatively small. Moreover, due to the possibility of saving hinges the influence of low temperatures is reduced as well because hinges deteriorate their performance at low temperatures around −20° C. to −40° C., for example. REFERENCE NUMERALS 1system for controlling a vacuum interrupter10main driving shaft11stationary contact board12insulating plate13control cam14supporting plate20transmission unit21first lever bearing22second lever bearing23lever24cylindrical element25rolling bearing26stationary holder27contact spring28guiding pin29stationary holder30vacuum interrupter31contact rodL2longitudinal axis of the main driving shaftL2longitudinal axis of the cylindrical element/vacuum interrupter | 6,298 |
11942294 | DETAILED DESCRIPTION In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawing. It should be understood that, when it is described that an element is “coupled” or “connected” to another element, the element may be “directly coupled” or “directly connected” to the other element or “coupled” or “connected” to the other element through a third element. In contrast, it should be understood that, when it is described that an element is “directly coupled” or “directly connected” to another element, there are no intervening elements. Please refer toFIG.1,FIG.2andFIG.3.FIG.1is a first perspective view (without the heat conducting material) of a high-safety lamp tube in accordance with a first embodiment of the present invention.FIG.2is a second perspective view (with the heat conducting material) of the high-safety lamp tube in accordance with the first embodiment of the present invention.FIG.3is a cross-sectional view of the high-safety lamp tube in accordance with the first embodiment of the present invention. As shown inFIG.1, the high-safety lamp tube1includes a main body11, a circuit board12, a thermal fuse13and a heat conducting material14. The circuit board12is disposed in the main body11. The circuit board12includes a circuit loop121, a first heat generating element122and a plurality of second heat generating elements123(there may be one or more second heat generating elements123; the quantity of the second heat generating elements123shown in the drawings is just for example instead of limitation). The first heat generating element122is electrically connected to the circuit loop121via the thermal fuse13. In one embodiment, the first heat generating element122may be, but not limited to, a varistor, a coil, a transformer, a cooper pin, a control chip or other similar components. In one embodiment, the second heat generating elements123may be, but not limited to, varistors, coils, transformers, cooper pins, control chips or other similar components. The aforementioned control chip may be, but not limited to, a central processing unit (CPU), a microcontroller (CMU), an application specific integrated circuit (ASIC) or other slimier components. In one embodiment, the circuit board12may be, but not limited to, a driving power source circuit board for a lamp tube. In another embodiment, the circuit board12may also be a circuit board for various electronic devices or household appliances. The first heat generating element122is electrically connected to the circuit loop121via the thermal fuse13. In this embodiment, the thermal fuse13is connected to the circuit loop121in series. When the thermal fuse13has blown, the circuit loop121can be electrically disconnected from the heat generating element122. As shown inFIG.2andFIG.3, the heat conducting material14is disposed on the circuit board12and covers the thermal fuse13, the first heat generating element122and the second heat generating elements123. In one embodiment, the heat conducting material14is a thermal grease, a thermal gel, a thermal clay or other similar materials. When the temperature of the first heat generating element122increases, the thermal energy generated thereby can be directly conducted to the thermal fuse13. When the temperature of the thermal fuse13increases to a predetermined temperature, the thermal fuse is blown in order to electrically disconnect the first heat generating element122from the circuit loop121in order to protect the circuit board12. When the temperatures of the second heat generating elements123increase, the thermal energies generated thereby can be conducted to the thermal fuse13via the heat conducting material14. When the temperature of the thermal fuse13increases to the predetermined temperature, the thermal fuse13is blown so as to electrically disconnected the above elements from the circuit loop121with a view to protect the circuit board12. Via the above structure, the heat conducting material14can simultaneously cover the first heat generating element122, the second heat generating elements123and a part of the circuit loop121. As a result, the protection range of the thermal fuse13can be effectively increased. According to this embodiment, the thermal fuse13can protect multiple heat generating elements without increasing the quantity of the thermal fuse13. In this way, the protection range of the thermal fuse13can be extended from two points to an area in order to prevent several heat generating elements from being overheated, so the protection range of the thermal fuse13can be effectively increased and the safety of the lamp tube1can be enhanced. In addition, the covering area of the heat conducting material14can be adjusted by the user so as to change the protection range of the thermal fuse13according to actual requirements. Thus, the thermal fuse13can be more flexible in use. The embodiment just exemplifies the present invention and is not intended to limit the scope of the present invention; any equivalent modification and variation according to the spirit of the present invention is to be also included within the scope of the following claims and their equivalents. It is worthy to point out that thermal runaway may happen in some electronic components of the circuit board of a currently available lamp tube due to various factors. However, the lamp tube usually has no more than one thermal fuse, so cannot provide any protection mechanism for the above situation. On the contrary, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can cover a plurality of heat generating elements and a thermal fuse by a heat conducting material. Thus, the protection range of the thermal fuse can be increased from two points to an area in order to avoid an accident occurs because these heat generating elements are overheated. Accordingly, the safety of the lamp tube can be effectively enhanced. Besides, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can adjust the covering area of the heat conducting material, so the user can change the protection range according to actual requirements. Thus, the method can be more flexible in use. Moreover, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can not only be applicable to various types of lamp tubes, but also can be applicable to various electronic devices or household appliances. Thus, the method can be more comprehensive in application. Furthermore, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can achieve the desired technical effects without significantly increasing the cost, so the method can not only conform to actual requirements, but also can have high practicality. As described above, the high-safety lamp tube and the method for increasing the protection range of the thermal fuse can surely achieve great technical effects and conform to the requirements of actual applications. Please refer toFIG.4, which is a flow chart of a method for increasing the protection range of a thermal fuse in accordance with the first embodiment of the present invention. As shown inFIG.4, the method of this embodiment includes the following steps: Step S41: disposing the thermal fuse on a circuit board including a circuit loop, a first heat generating element and a second heat generating element, and electrically connecting the second heat generating element to the circuit loop. Step S42: electrically connecting the first heat generating element to the circuit loop via the thermal fuse. Step S43: disposing a heat conducting material on the circuit board. Step S44: making the heat conducting material cover the thermal fuse, the first heat generating element and the second heat generating element. In this step, the heat conducting material is spread over a part of the surface of the circuit board, such that the heat conducting material can cover the thermal fuse, the first heat generating element and the second heat generating elements. Step S45: pressing the heat conducting material to make the thickness of the heat conducting material be uniform. In this step, the thickness of the heat conducting material can be more uniform by pressing the heat conducting material, such that the thermal energy can be swiftly and evenly conducted to the thermal fuse via the heat conducting material. The embodiment just exemplifies the present invention and is not intended to limit the scope of the present invention; any equivalent modification and variation according to the spirit of the present invention is to be also included within the scope of the following claims and their equivalents. Please refer toFIG.5,FIG.6andFIG.7.FIG.5is a first perspective view (without the heat conducting material) of a high-safety lamp tube in accordance with a second embodiment of the present invention.FIG.6is a second perspective view (with the heat conducting material) of the high-safety lamp tube in accordance with the second embodiment of the present invention.FIG.7is a cross-sectional view of the high-safety lamp tube in accordance with the second embodiment of the present invention. As shown inFIG.5, the high-safety lamp tube1includes a main body11, a circuit board12, a thermal fuse13and a heat conducting material14. The circuit board12is disposed in the main body11. The circuit board12includes a circuit loop121, a first heat generating element122and a plurality of second heat generating elements123(there may be one or more second heat generating elements123; the quantity of the second heat generating elements123shown in the drawings is just for example instead of limitation). The first heat generating element122is electrically connected to the circuit loop121via the thermal fuse13and the second heat generating elements123are electrically connected to the circuit loop121. The first heat generating element122is electrically connected to the circuit loop121via the thermal fuse13. In this embodiment, the adhesive layer AD covers a part of the surface of the first heat generating element122and the thermal fuse13is adhered to the first heat generating element122via the adhesive layer AD. The contact area between the adhesive layer AD and the first heat generating element122is greater than the contact area between the thermal fuse13and the adhesive layer AD. In one embodiment, the adhesive layer AD may be, but not limited to, phenolic resins, urea-formaldehyde resins, polyvinyl acetate resins, polyethylene-vinyl acetate resins, polyacrylic resins, polyurethane, hot-melt adhesive, etc. When the thermal fuse13is blown, the circuit loop121can be electrically disconnected from the first heat generating element122. As shown inFIG.6andFIG.7, the heat conducting material14is disposed on the circuit board12and covers the thermal fuse13, the first heat generating element122and the second heat generating elements123. The heat conducting material14contacts a part of the adhesive layer AD. When the temperature of the first heat generating element122increases, the thermal energy generated thereby can be directly conducted to the thermal fuse13via the adhesive layer AD in a short time. When the temperature of the thermal fuse13increases to a predetermined temperature, the thermal fuse13is blown to electrically disconnect the first heat generating element122from the circuit loop121with a view to protect the circuit board12. When the temperatures of the second heat generating elements123increase, the thermal energies generated thereby can be conducted to the thermal fuse13via the heat conducting material14. Besides, as the heat conducting material14contacts a part of the adhesive layer AD, the heat conducting speed can be effectively increased. When the temperature of the thermal fuse13increases to the predetermined temperature, the thermal fuse13is blown to electrically disconnect the above elements from the circuit loop121so as to protect the circuit board12. In this embodiment, the thermal fuse13is adhered to the first heat generating element122via the adhesive layer AD. Besides, the contact area between the adhesive layer AD and the first heat generating element122is greater than the contact area between the thermal fuse13and the adhesive layer AD. Accordingly, if the first heat generating element122tends to generate a large amount of thermal energy, the above structure can more effectively avoid that the circuit board12is damaged because the first heat generating element122is overheated. Further, the above structure can also effectively avoid that the second heat generating elements123are overheated. The embodiment just exemplifies the present invention and is not intended to limit the scope of the present invention; any equivalent modification and variation according to the spirit of the present invention is to be also included within the scope of the following claims and their equivalents. Please refer toFIG.8, which is a flow chart of a method for increasing the protection range of a thermal fuse in accordance with the second embodiment of the present invention. As shown inFIG.8, the method of this embodiment includes the following steps: Step S81: disposing the thermal fuse on a circuit board including a circuit loop, a first heat generating element and a second heat generating element, and electrically connecting the second heat generating element to the circuit loop. Step S82: electrically connecting the first heat generating element to the circuit loop via the thermal fuse. Step S83: adhering the thermal fuse to the first heat generating element via an adhesive layer. Step S84: disposing a heat conducting material on the circuit board. Step S85: making the heat conducting material cover the thermal fuse, the first heat generating element and the second heat generating element. Step S86: pressing the heat conducting material to make the thickness of the heat conducting material to be uniform. Although the operations of the method(s) herein are shown and described in a particular order, the order of the operations of each method may be altered so that certain operations may be performed in an inverse order or so that certain operations may be performed, at least in part, concurrently with other operations. In another embodiment, instructions or sub-operations of distinct operations may be implemented in an intermittent and/or alternating manner. To sum up, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can cover a plurality of heat generating elements and a thermal fuse by a heat conducting material. Thus, the protection range of the thermal fuse can be increased from two points to an area in order to avoid an accident occurs because these heat generating elements are overheated. Accordingly, the safety of the lamp tube can be effectively enhanced. Besides, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can adjust the covering area of the heat conducting material, so the user can change the protection range according to actual requirements. Thus, the method can be more flexible in use. Moreover, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can not only be applicable to various types of lamp tubes, but also can be applicable to various electronic devices or household appliances. Thus, the method can be more comprehensive in application. Furthermore, according to one embodiment of the present invention, the method for increasing the protection range of the thermal fuse can achieve the desired technical effects without significantly increasing the cost, so the method can not only conform to actual requirements, but also can have high practicality. Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims. | 16,697 |
11942295 | DETAILED DESCRIPTION OF THE EMBODIMENT(S) Exemplary embodiments of the present disclosure will be described hereinafter in detail with reference to the attached drawings, wherein like reference numerals refer to like elements. The present disclosure may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein; rather, these embodiments are provided so that the present disclosure will convey the concept of the disclosure to those skilled in the art. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawing. A relay according to an embodiment, as shown inFIGS.1and2, comprises a housing1, an electric contact system10, and an electromagnetic system20. The electric contact system10is provided in the housing1and includes a static contact310,320with a static contact portion311,321and a movable contact400with a movable contact portion411,421. The electromagnetic system20is provided in the housing1and configured to drive the movable contact400to move between a closed position where the movable contact400is in electrical contact with the static contact310,320and an opened position where the movable contact400is separated from the static contact310,320. As shown inFIGS.1-3, in an embodiment, the electric contact system10further comprises a rotating member100. The movable contact400is mounted on the rotating member100and may be rotated with the rotating member100between the closed position (shown inFIG.2) and the opened position (shown inFIG.3). As shown inFIG.2, when the movable contact400is rotated to the closed position, the movable contact400is in electrical contact with the static contact310,320. As shown inFIG.3, when the movable contact400is rotated to the opened position, the movable contact400is separated from the static contact310,320. As shown inFIGS.2-3, in an embodiment, the electric contact system10further comprises a magnetic blowing arc-extinguish device610,620,710,720comprising a permanent magnet610,620. The permanent magnet610,620is statically provided near the static contact310,320and configured to lengthen an electric arc between the static contact portion311,321and the movable contact portion411,421by an electromagnetic force to extinguish the electric arc. As shown inFIGS.2-3, in an embodiment, the electric contact system10further comprises an isolation arc-extinguish device210,220adapted to push the electric arc toward the permanent magnet610,620, so as to force the electric arc to move to the vicinity of the permanent magnet610,620and improve an effect of magnetic blowing arc-extinguish. As shown inFIGS.2-3, in an embodiment, the magnetic blowing arc-extinguish device610,710,620,720further comprises a magnetic yoke710,720. The permanent magnet610,620and the static contact310,320are disposed in an accommodation space surrounded by the magnetic yoke710,720, so as to reduce magnetic leakage and increase an intensity of electromagnetic induction in the accommodation space. As shown inFIGS.2-3, in an embodiment, the isolation arc-extinguish device210,220has an arc-extinguishing sheet201,202, and is meshed with the rotating member100. The isolation arc-extinguish device210,220is rotated by the rotating member100. As shown inFIG.2, in an embodiment, when the movable contact400is rotated to the closed position, the arc-extinguishing sheet201,202is rotated out of a contact region of the movable contact portion411,421and the static contact portion311,321, so as to allow the movable contact portion411,421to bring into electrical contact with the static contact portion311,321. As shown inFIG.3, in an embodiment, when the movable contact400is rotated to the opened position, the arc-extinguishing sheet201,202is rotated into the contact region of the movable contact portion411,421and the static contact portion311,321, so as to electrically isolate the movable contact portion411,421from the static contact portion311,321and cut off the electric arc. As shown inFIGS.2and3, in an embodiment, while the movable contact400is rotated from the connected position toward the opened position, the arc-extinguishing sheet201,202pushes the electric arc toward the permanent magnet610,620, so as to force the electric arc to move to the vicinity of the permanent magnet610,620and improve the effect of magnetic blowing arc-extinguish. As shown inFIGS.2and3, in an embodiment, the electric contact system10further comprises a static insulation isolating wall501,502. When the movable contact400is rotated to the opened position, the static insulation isolating wall501,502and the arc-extinguishing sheet201,202bring into contact with each other or only a slit is formed therebetween, so as to accelerate the cut-off of the electric arc. As shown inFIGS.2and3, in an embodiment, the electric contact system10further comprises an insulation base500. The insulation isolating wall501,502is formed on the insulation base500. The rotating member100and the isolation arc-extinguish device210,220are rotatably mounted on the insulation base500. As shown inFIGS.2and3, in an embodiment, an insulation fixing wall510,520is formed on the insulation base500. The magnetic yoke710,720and the permanent magnet610,620are clamped and fixed between the insulation fixing wall510,520and the insulation isolating wall501,502. As shown inFIGS.2and3, in an embodiment, one end711,721of the magnetic yoke710,720is inserted into a slot of the insulation fixing wall510,520, and the other end712,722of the magnetic yoke710,720is located at a side of the static contact310,320that is opposite to the static contact portion311,321. The permanent magnet610,620is embedded in a mounting chamber defined by the magnetic yoke710,720, the insulation fixing wall510,520and the insulation isolating wall501,502. As shown inFIGS.2and3, in an embodiment, the static contact310,320comprises a first static contact310and a second static contact320, and the movable contact400is provided between the first static contact310and the second static contact320. The first static contact310has a first static contact portion311, and the second static contact320has a second static contact portion321. A first end410of the movable contact400has a first movable contact portion411for being in electrical contact with the first static contact portion311; and a second end420of the movable contact400has a second movable contact portion421for being in electrical contact with the second static contact portion321. As shown inFIGS.2and3, in an embodiment, the magnetic blowing arc-extinguish device610,710,620,720comprises a first magnetic blowing arc-extinguish device610,710and a second magnetic blowing arc-extinguish device620,720. The first magnetic blowing arc-extinguish device610,710comprises a first permanent magnet610statically disposed in the vicinity of the first static contact310to extinguish a first electric arc between the first static contact portion311and the first movable contact portion411. The second magnetic blowing arc-extinguish device620,720comprises a second permanent magnet620statically disposed in the vicinity of the second static contact320to extinguish a second electric arc between the second static contact portion321and the second movable contact portion421. As shown inFIGS.2and3, in an embodiment, the first magnetic blowing arc-extinguish device610,710further comprises a first magnetic yoke710. The first permanent magnet610and the first static contact310are disposed in a first accommodation space surrounded by the first magnetic yoke710, so as to reduce magnetic leakage and increase an intensity of electromagnetic induction in the first accommodation space. The second magnetic blowing arc-extinguish device620,720further comprises a second magnetic yoke720. The second permanent magnet620and the second static contact320are disposed in a second accommodation space surrounded by the second magnetic yoke720, so as to reduce magnetic leakage and increase an intensity of electromagnetic induction in the second accommodation space. As shown inFIGS.2and3, in an embodiment, the isolation arc-extinguish device210,220comprises a first isolation arc-extinguish device210and a second isolation arc-extinguish device220. The first isolation arc-extinguish device210has a first arc-extinguishing sheet201, and the second isolation arc-extinguish device220has a second arc-extinguishing sheet202. As shown inFIG.3, in an embodiment, when the movable contact400is rotated to the opened position, the first arc-extinguishing sheet201is rotated into a contact region of the first movable contact portion411and the first static contact portion311, so as to electrically isolate the first movable contact portion411from the first static contact portion311and cut off the first electric arc. As shown inFIG.3, in an embodiment, when the movable contact400is rotated to the opened position, the second arc-extinguishing sheet202is rotated into a contact region of the second movable contact portion421and the second static contact portion321, so as to electrically isolate the second movable contact portion421from the second static contact portion321and cut off the second electric arc. As shown inFIGS.2and3, in an embodiment, while the movable contact400is rotated from the closed position toward the opened position, the first arc-extinguishing sheet201pushes the first electric arc toward the first permanent magnet610, so as to force the first electric arc to move to the vicinity of the first permanent magnet610. As shown inFIGS.2and3, in an embodiment, while the movable contact400is rotated from the closed position toward the opened position, the second arc-extinguishing sheet202pushes the second electric arc toward the second permanent magnet620, so as to force the second electric arc to move to the vicinity of the second permanent magnet620. As shown inFIG.2, in an embodiment, when the movable contact400is rotated to the closed position, the first arc-extinguishing sheet201is rotated out of the contact region of the first movable contact portion411and the first static contact portion311, so as to allow the first movable contact portion411to bring into electrical contact with the first static contact portion311. As shown inFIG.2, in an embodiment, when the movable contact400is rotated to the closed position, the second arc-extinguishing sheet202is rotated out of the contact region of the second movable contact portion421and the second static contact portion321, so as to allow the second movable contact portion421to bring into electrical contact with the second static contact portion321. As shown inFIGS.2and3, in an embodiment, the insulation isolating wall501,502comprises a first insulation isolating wall501and a second insulation isolating wall502. As shown inFIG.3, in an embodiment, when the movable contact400is rotated to the opened position, the first arc-extinguishing sheet201and the first insulation isolating wall501are in contact with each other or only a slit is formed therebetween, so as to accelerate the cut-off of the first electric arc. As shown inFIG.3, in an embodiment, when the movable contact400is rotated to the opened position, the second arc-extinguishing sheet202and the second insulation isolating wall502are in contact with each other or only a slit is formed therebetween, so as to accelerate the cut-off of the second electric arc. As shown inFIGS.2and3, in an embodiment, the insulation fixing wall510,520comprises a first insulation fixing wall510and a second insulation fixing wall520. The first magnetic yoke710and the first permanent magnet610are clamped and fixed between the first insulation fixing wall510and the first insulation isolating wall501. The second magnetic yoke720and the second permanent magnet620are clamped and fixed between the second insulation fixing wall520and the second insulation isolating wall502. As shown inFIGS.2and3, in an embodiment, one end711of the first magnetic yoke710is inserted into a slot of the first insulation fixing wall510, and the other end712of the first magnetic yoke710is located at a side of the first static contact310that is opposite to the first static contact portion311. One end721of the second magnetic yoke720is inserted into a slot of the second insulation fixing wall520, and the other end722of the second magnetic yoke720is located at a side of the second static contact320that is opposite to the second static contact portion321. The first permanent magnet610is embedded in a first mounting chamber defined by the first magnetic yoke710, the first insulation fixing wall510and the first insulation isolating wall501. The second permanent magnet620is embedded in a second mounting chamber defined by the second magnetic yoke720, the second insulation fixing wall520and the second insulation isolating wall502. In the aforementioned embodiments of the present disclosure, the arc-extinguishing sheet201,202rapidly lengthens the electric arc and forces the electric arc to move to the vicinity of the permanent magnet610,620, increasing a magnetic blow-out path, while isolating an electric arc-generating path by the arc-extinguishing sheet201,202and the insulation isolating wall501,502, effectively improving the effect of arc extinguishing, and greatly accelerating the speed of arc extinguishing. As shown inFIG.1, in an embodiment, a separation wall1ais formed in the housing1to divide an inner space of the housing1into an upper space and a lower space. The electric contact system10is provided in the upper space of the housing1, and the electromagnetic system20is provided in the lower space of the housing1. As shown inFIGS.1-3, in an embodiment, the electric contact system10further comprises a rotating seat110and a torsion spring101. The rotating seat110is rotatably mounted on the separation wall1a. Two ends of the torsion spring101are connected to the rotating seat110and the rotating member100, respectively, so that the rotating seat110and the rotating member100are elastically connected together. The electromagnetic system20is adapted to drive the rotating seat110to rotate. The rotating seat110is adapted to drive the rotating member100to rotate by the torsion spring101. The torsion spring101is adapted to apply a contact pressure between the movable contact portion411,412and the static contact portion311,321. As shown inFIGS.1-3, in an embodiment, the electric contact system10further comprises a reset spring102. Two ends of the reset spring102are connected to the separation wall1aand the rotating seat110, respectively, so that the separation wall1aand the rotating seat110are elastically connected together. When a torque applied on the rotating seat110by the electromagnetic system20is removed, the reset spring102drives the rotating seat110to its initial position, so that the movable contact400is rapidly rotated from the closed position to the opened position. As shown inFIGS.4-5and7, in an embodiment, the electromagnetic system20mainly comprises a magnetic yoke2100, a coil2200, a lower iron core2310, a top plate2400, an upper iron core2320, an armature2500, and a magnetic isolation ring2600. The coil2200is mounted in the magnetic yoke2100. The lower iron core2310is accommodated in a lower portion of the coil2200and fixed to the magnetic yoke2100. The top plate2400is located above the coil2200and fixed to the magnetic yoke2100. The upper iron core2320has a lower portion which is accommodated in the coil2200and an upper portion which passes through the top plate2400. The armature2500is located above the top plate2400and fixedly connected to the upper iron core2320. The magnetic isolation ring2600is disposed between the upper iron core2320and the top plate2400to electromagnetically isolate the upper core2320from the top plate2400. The upper iron core2320is configured to be movable in a vertical direction Z with respect to the magnetic isolation ring2600. A central axis R of the upper iron core2320is parallel to the vertical direction Z. The upper iron core2320is rotatable about its central axis R. The upper iron core2320is connected to the rotating seat110, so as to drive the rotating seat110to rotate. As shown inFIGS.5and7, in an embodiment, a plurality of first curved grooves2510are formed in a bottom surface of the armature2500. A plurality of second curved grooves2410, mated with the plurality of first curved grooves2510respectively, are formed in a top surface of the top plate2400. The plurality of first curved grooves2510are evenly spaced around the central axis R of the upper iron core2320. A ball2700is provided in each first curved groove2510. The ball2700is configured to roll in the first curved groove2510and the mating second curved groove2410. As shown inFIGS.4-8, in an embodiment, each first curved groove2510has a depth gradually deepened from a first end2510ato a second end2510bthereof, such that a force F applied on the armature2500by the ball2700is inclined to the central axis R of the upper iron core2320to drive the armature2500to rotate around the central axis R. Thereby, as clearly shown inFIG.6, the force F applied to the armature500by the ball700may be decomposed into a first component force F1parallel to the central axis R of the upper iron core2320and a second component force F2perpendicular to the central axis R of the upper iron core2320. As a result, the second component force F2may drive the armature500to rotate around the central axis R. In an exemplary embodiment of the present disclosure, the armature2500is movable between an initial position (the position shown inFIG.7) and a final position (the position shown inFIG.8). When the armature2500is moved from the initial position shown inFIG.7to the final position shown inFIG.8, the armature2500is moved downward for a predetermined distance in the vertical direction Z while rotating for a predetermined angle around the central axis R. As shown inFIGS.4-8, in an embodiment, when the armature2500is moved from the initial position shown inFIG.7to the final position shown inFIG.8, the armature2500rotates around the central axis R for the predetermined angle which is equal to the sum of central angles of the first curved groove2510and the second curved groove2410. That is, when the armature2500is moved from the initial position shown inFIG.7to the final position shown inFIG.8, the armature2500rotates around the central axis R for an arc length which is equal to the sum of arc lengths of the first curved groove2510and the second curved groove2410in the circumferential direction of the upper iron core2320. In one embodiment of the present disclosure, when the armature2500is moved to the initial position shown inFIGS.5-7, the ball2700is located in the first end2510aof the first curved groove2510. When the armature2500is moved to the final position shown inFIG.8, the ball2700is located in the second end2510bof the first curved groove2510. As shown inFIGS.5-6, in an embodiment, each second curved groove2410has a depth gradually increasing from the first end2410ato the second end2410bthereof. As shown inFIG.7, when the armature2500is moved to the initial position, the ball2700is located in the first end2410aof the second curved groove2410. As shown inFIG.8, when the armature2500is moved to the final position, the ball2700is located in the second end2410bof the second curved groove2410. As shown inFIGS.5-6, in an embodiment, when the armature2500is moved to the initial position, the first end2510aof the first curved groove2510and the first end2410aof the second curved groove2410are adjacent to each other, while the second end2510bof the first curved groove2510and the second end2410bof the second curved groove2410are far away from each other. As shown inFIGS.5-6, in an embodiment, when the armature2500is moved to the final position, the second end2510bof the first curved groove2510and the second end2410bof the second curved groove2410are adjacent to each other, while the first end2510aof the first curved groove2510and the first end2410aof the second curved groove2410are far away from each other. As shown inFIG.7, in an embodiment, a first air gap g1is provided between the armature2500and the top plate2400, and a second air gap g2is provided between the upper iron core2320and the lower iron core2310. As shown inFIGS.5and7-8, in an embodiment, as the armature2500is moved from the initial position to the final position, the first air gap g1and the second air gap g2are decreased gradually. As the armature2500is moved from the final position to the initial position, the first air gap g1and the second air gap g2are increased gradually. As shown inFIGS.7-8, in an embodiment, the upper iron core2320, the second air gap g2, the lower iron core2310, the magnetic yoke2100, the top plate2400, the first air gap g1, and the armature2500are arranged to form a main magnetic circuit of the electromagnetic system20. As shown inFIG.4, the coil2200has terminals2201,2202adapted to be electrically connected to positive and negative electrodes of the power supply, respectively. When the coil2200is energized, the magnetic flux generated by the coil2200passes through the aforementioned main magnetic circuit. Due to the presence of the first air gap g1and the second air gap g2, the lower iron core2310and the top plate2400respectively attract the upper iron core2320and the armature2500downward in the vertical direction Z, so that while the upper iron core2320and the armature2500are driven to move downward in the vertical direction Z, the upper iron core2320and the armature2500are rotating around the central axis R under the push of the balls2700. In one embodiment of the present disclosure, when the coil2200is energized, while the armature2500is moved from the initial position to the final position, the armature2500drives the balls2700to roll to the second ends2510b,2410bof the first curved groove2510and the second curved groove2410due to friction. When the armature2500is moved to the final position, the coil2200is de-energized so that the armature2500may be moved from the final position to the initial position by the return spring. In the embodiment shown inFIGS.7-8, when the coil2200is de-energized, the residual magnetic flux rapidly decreases due to the presence of the second air gap g2, and the armature2500will be quickly returned to the initial position by the return spring. At the same time, due to friction, the armature2500drives the balls2700to roll to the first ends2510aand2410aof the first curved groove2510and the second curved groove2410. In an exemplary embodiment of the present disclosure, the aforementioned ball2700may be a spherical ball or a cylindrical ball. As shown inFIG.7, in an embodiment, the coil2200includes a support frame2220and a wire2210wound on the support frame2220. The upper iron core2320and the lower iron core2310are disposed in a hollow accommodation space of the support frame2220of the coil2200, and the magnetic isolation ring2600is supported on the upper end surface of the support frame2220of the coil2200. In the foregoing exemplary embodiments of the present disclosure, the armature2500is provided with first curved grooves2510, and the first curved groove2510is provided with a ball2700. The depth of the first curved groove2510is deepened gradually from the first end2510ato the second end2510bthereof. Therefore, when the armature2500is moved downward in the vertical direction Z by the electromagnetic attraction force, the direction of the force applied by the balls2700on the armature2500is inclined to the vertical direction Z, so that the armature2500is driven to rotate. The electromagnetic system of the present disclosure may have larger torque and higher efficiency with the same size. In addition, the electromagnetic system of the present disclosure has a simple structure and a very low manufacturing cost. As shown inFIG.1, in an embodiment, air-cooling fins1care formed on an outer wall of the housing1to improve the heat dissipation performance of the relay and prevent the electromagnetic system20from overheating. In an embodiment, the relay may further comprise a detection module adapted to detect a position of the movable contact400. The detection module may comprise a detection circuit, and a movable terminal and a static terminal which are mounted on the housing1. A pushing portion may be formed on the rotating member100, the pushing portion is adapted to drive the movable terminal to move between a first position in electrical contact with the static terminal and a second position separated from the static terminal. When the movable contact400is rotated to the closed position, the pushing portion drives the movable terminal to the first position in electrical contact with the static terminal, so that the detection circuit is connected. In this way, if the detection circuit is connected, the movable contact400may be judged to be in the closed position. When the movable contact400is rotated to the opened position, the pushing portion drives the movable terminal to the second position separated from the static terminal, so that the detection circuit is disconnected. In this way, if the detection circuit is disconnected, the movable contact400may be judged to be in the opened position. As shown inFIG.1, in an embodiment, the static contact310,320has a plate-like base310a,320afixed on a top cover of the housing1. The electromagnetic system20further comprises a bolt310b,320belectrically connected to the base310a,320aof the static contact310,320. The bolt310b,320bis adapted to electrically connect the static contact310,320to a power supply wire of an electric equipment. A contact area between static contact310,320and the housing1may be increased by the plate-like base310a,320aand the bolt310,320b, thus the heat dissipation area of static contact310,320may be increased. As shown inFIG.1, in an embodiment, an installation hole1bfor mounting the relay to the electric equipment is formed in a bottom portion or a side portion of the housing1. In an exemplary embodiment of the present disclosure, the relay may be a high voltage direct current relay. It should be appreciated for those skilled in this art that the above embodiments are intended to be illustrative, and not restrictive. For example, many modifications may be made to the above embodiments by those skilled in this art, and various features described in different embodiments may be freely combined with each other without conflicting in configuration or principle. Although several exemplary embodiments have been shown and described, it would be appreciated by those skilled in the art that various changes or modifications may be made in these embodiments without departing from the principles and spirit of the disclosure, the scope of which is defined in the claims and their equivalents. | 27,308 |
11942296 | DETAILED DESCRIPTION OF THE INVENTION FIG.1illustrates a contactor100in accordance with an exemplary embodiment.FIG.2is a sectional view of the contactor100in accordance with an exemplary embodiment illustrating internal components of the contactor100. The contactor100is an electrical switch or relay that safely connects and disconnects one or more electrical circuits to protect the flow of power through the system. The contactor100may be used in various applications such as HVAC, power supply, locomotives, elevator control, motor control, aerospace applications, hybrid electric vehicles, fuel-cell vehicles, charging systems, and the like. The contactor100includes a housing110(removed inFIG.2to illustrate the internal components of the contactor100) having an outer wall111surrounding a cavity112. The housing110may be a multi-piece housing in various embodiments. The housing110includes a base114and a header116extending from the base114. Optionally, the base114may be configured to be coupled to another component. For example, the base114may include mounting brackets for securing the contactor100to the other component. In the illustrated embodiment, the base114is provided at a bottom of the contactor100and the header116is located above the base114; however, the housing110may have other orientations in alternative embodiments. The housing110includes a cover118(FIG.1) for closing the cavity112. For example, the cover118may be coupled to the top of the header116. Optionally, the cover118may be sealed to the header116. The outer wall111along the header116may be cylindrical defining a cylindrical cavity112in various embodiments. The cavity112may be at least partially filled with epoxy for sealing the housing110and internal components. The contactor100includes first and second fixed contacts120,122,122received in the cavity112and a movable contact124movable within the cavity112between a mated position and an unmated position. The movable contact124electrically connects the fixed contacts120,122in the mated position. The fixed contacts120,122are fixed to the housing110. For example, the fixed contacts120,122may be coupled to the header116and/or the cover118. In an exemplary embodiment, a contact holder126is used to hold the fixed contacts120,122. The contact holder126is received in the cavity112and coupled to the housing110. The contact holder126may be removable from the cavity112when the cover118is removed from the header116. The contact holder126defines an enclosure128. The fixed contacts120,122extend into the enclosure128. The movable contact124is located in the enclosure128. The outer wall111surrounds the enclosure128. The fixed contacts120,122each include an outer end defining a terminating end130and an inner end defining a mating end132. In various embodiments, the fixed contacts120,122each have a transition portion134with one or more bends135. In the illustrated embodiment, the fixed contacts120,122are S-shaped having the terminating end130parallel to the mating end132. Other shapes are possible in alternative embodiments. For example, the fixed contacts120,122may be planar without any bends. The terminating end130is configured to be terminated to another component, such as a wire or a terminal, such as a line in or a line out wire. In an exemplary embodiment, the terminating end130is exposed at the exterior of the contactor100for terminating to the other component. The terminating end130may be threaded to receive a nut. In the illustrated embodiment, the terminating end130extends through the cover118and is located above the cover118. The mating end132is located within the cavity112for connection with the movable contact124, such as when the contactor100is energized. In the illustrated embodiment, the mating end132is generally flat or planar, such as for engaging the movable contact124. However, the mating end132may have other shapes in alternative embodiments. In other various embodiments, the terminating ends130may be located inside the housing110. For example, the wires may extend into the housing110for termination to the terminating ends130. In an exemplary embodiment, the contactor100includes a flexible busbar140electrically connecting the first fixed contact120and the movable contact124. The flexible busbar140flexes as the movable contact124moves between the mated position and the unmated position. In an exemplary embodiment, the flexible busbar140includes a flexible braid142having braided conductors. A first mating end144of the flexible busbar140is connected to the first fixed contact120. A second mating end146of the flexible busbar140is connected to the movable contact124. The first and second mating ends144,146may be welded to the first fixed contact120and the movable contact124, respectively. The movable contact124remains connected to the first fixed contact120through the flexible busbar140as the movable contact124moves between the mated position and the unmated position. However, in alternative embodiments, the contactor100may be provided without the flexible busbar140. Rather, the movable contact124may be movable toward and away from the first fixed contact120to mate and unmate from the first fixed contact120in a similar manner as the second fixed contact122. The contactor100includes a coil assembly190in the cavity112operated to move the movable contact124between the unmated position and the mated position. The coil assembly190includes a winding or coil192wound around a core194to form an electromagnetic field. The coil assembly190includes a plunger (not shown) coupled to the core194. The movable contact124is coupled to the plunger and is movable with the plunger when the coil assembly190is operated. When the electromagnetic field is generated, the plunger is driven in the mating direction. The mating force may be controlled based on the strength of the electromagnetic field. The coil assembly190includes a spring198for returning the movable contact124to the unmated position when the coil assembly190is deenergized. Optionally, the contactor100may include an arc suppressor (not shown) for suppressing electrical arc of the electrical circuit. The arc suppressor may be located in the cavity112of the housing110. In an exemplary embodiment, the arc suppressor includes magnets creating magnetic fields in the enclosure128for suppressing arc created between the movable contact124and the fixed contacts120,122. In an exemplary embodiment, the contact holder126may be sealed, such as using epoxy, and may be filled with an inert gas for arc suppression. In an exemplary embodiment, the contactor100includes a magnetic shroud300that provides a magnetic holding force to hold the movable contact124in the mated position. The magnetic holding force provides additional holding force in addition to the holding force provided by the energized coil assembly190. The magnetic holding force is an attractive force used to overcome repulsive forces between the movable contact124and the second fixed contact122, such as repulsive Holms forces induced by the current flow through the contacts122,124. The magnetic shroud300is coupled to the second fixed contact122and/or the movable contact124. For example, an upper shroud302may be coupled to the second fixed contact122and a lower shroud304may be coupled to the movable contact124. The upper shroud302is configured to be magnetically coupled to the lower shroud304, such as when the current flows through the contacts122,124to create a magnetic field for the shrouds302,304. An attractive force is generated between the shrouds302,304to help hold the movable contact124in the mated position with the second fixed contact122. FIG.3is a top perspective view of a movable contact assembly150in accordance with an exemplary embodiment. The movable contact assembly150includes the movable contact124and a movable contact holder152. The movable contact assembly150may include the flexible busbar140(shown inFIG.2). The movable contact holder152is used to position the movable contact124in the housing110of the contactor100(shown inFIG.2). For example, the movable contact holder152may hold the movable contact124in a planar orientation, such as a horizontal orientation, as the movable contact124moves within the housing110. In an exemplary embodiment, the lower shroud304is coupled to the movable contact124and/or the movable contact holder152. The lower shroud304is movable with the movable contact124and/or the movable contact holder152. The movable contact124is manufactured from a conductive material, such as a metal material. The movable contact124may be stamped or cut into a predetermined size and shape, which may affect the amount of current passing through the movable contact124and the amount of electrical resistance for the current transferred through the movable contact124. The movable contact124includes a main body160having a first plate162at a first end164of the movable contact124and a second plate166at a second end168of the movable contact124. The movable contact124include an opening170in the main body160. The opening170may be coupled to the coil assembly190(shown inFIG.2), such as the plunger. In the illustrated embodiment, the movable contact124is I-shaped, wherein the movable contact124is wider (between the sides174,178) at the first and second plates162,166and narrower along the central portion of the main body160. The movable contact124includes a first pocket172along a first side174of the movable contact124and a second pocket176along a second side178of the movable contact124. The plates162,166provide greater surface area for mating with the flexible busbar140and the second fixed contact122(shown inFIG.2). The movable contact124may have other shapes in alternative embodiments, such as a rectangular shape having a constant width. The movable contact124includes mounting tabs180extending into the pockets172,176. The movable contact holder152is coupled to the mounting tabs180at the first and second sides174,178. The lower shroud304may be received in the first and second pockets172,176and coupled to the mounting tabs180. The movable contact124includes an upper surface182and a lower surface184. In an exemplary embodiment, the lower shroud304extends along the lower surface184. The lower shroud304may be aligned with the opening170. In an exemplary embodiment, the flexible busbar140is configured to be coupled to the lower surface184of the first plate162at the first end164. However, the flexible busbar140may be coupled to the upper surface182in alternative embodiments. In an exemplary embodiment, the movable contact124includes mating contact pads186at the upper surface182along the second plate166at the second end168. The mating contact pads186are configured to be mated to and unmated from the second fixed contact122. Each mating contact pad186includes a mating interface188forming the point of contact with the second fixed contact122. Electrical paths are created between the movable contact124and the second fixed contact122through the mating contact pads186. In the illustrated embodiment, the mating interfaces188are generally planar. However, the mating contact pads186may have other shapes in alternative embodiments, such as being bumps having a convex shape. In an exemplary embodiment, the movable contact124includes three of the mating contact pads186arranged in a triangular orientation. Greater or fewer mating contact pads186may be provided in alternative embodiments. The mating contact pads186may be arranged in a different orientation in alternative embodiments. In an exemplary embodiment, the mating contact pads186may be located adjacent the perimeter of the movable contact124, such as at the first and second sides174,178and at the second end168, such as to increase the spacing between the mating contact pads186. In an exemplary embodiment, the movable contact holder152is a stamped and formed part. The movable contact holder152may be coupled to the coil assembly190, such as the plunger, to position the movable contact124as the movable contact124is moved between the mated position and the unmated position. The movable contact holder152includes a base200, mounting arms202extending from the base200, and support arms204extending from the base200. The lower shroud304may be located between the base200of the movable contact holder152and the lower surface184of the movable contact124. The mounting arms202are used to secure the movable contact holder152to the movable contact124. The mounting arms202are secured to the mounting tabs180at the first and second sides174,178of the movable contact124. The support arms204are used to position the movable contact124within the housing110of the contactor100(shown inFIG.2) during mating and unmating. The support arms204engage the lower surface184of the movable contact124to press upward against the lower surface184. FIG.4is a bottom perspective view of a portion of the contactor100showing the movable contact assembly150in an unmated position relative to the fixed contacts120,122.FIG.4illustrates the flexible busbar140between the first fixed contact120and the movable contact124. The movable contact124is unmated from the second fixed contact122.FIG.4illustrates the upper and lower shrouds302,304coupled to the second fixed contact122and the movable contact124. In an exemplary embodiment, the second fixed contact122includes a mating tab136at the mating end132. The upper shroud302is coupled to the mating tab136. The mating tab136is oriented parallel to the movable contact124. For example, the mating tab136may be oriented horizontally. The second fixed contact122includes one or more mating tab pads138at a bottom of the mating tab136. The mating tab pads138are configured to be mated to and unmated from the mating contact pads186of the movable contact124. Each mating tab pad138includes a mating interface forming the point of contact with the corresponding mating contact pad186. Electrical paths are created between the movable contact124and the second fixed contact122through the mating contact pads186and the mating tab pads138. Current flows through the movable contact124and the second fixed contact122when mated. The current generates a magnetic field. The magnetic shroud300generates a magnetically attractive force between the upper and lower shrouds302,304when the magnetic field is generated to hold the movable contact124in the mated position. The magnetic holding force overcomes the repulsive forces, such as any repulsive Holms forces generated by the current flowing through the movable contact124and the second fixed contact122, to reduce the risk of undesirable separation between the contacts122,124. In an exemplary embodiment, the mating contact pads186and mating tab pads138creates multiple points of contact and multiple electrical paths through the second fixed contact122and the movable contact124. For example, parallel electrical paths may be created, such as a first electrical path through the second fixed contact122and a second electrical path through the movable contact124. The parallel electrical paths may generate a magnetically attractive force, which tends to hold the movable contact124in the mated position and may reduce the risk of undesirable separation or vibrations in the contacts. In the illustrated embodiment, the mating interfaces are generally planar. However, the mating tab pads138may have other shapes in alternative embodiments, such as being bumps having a convex shape. In an exemplary embodiment, the second fixed contact122includes three of the mating tab pads138arranged in a triangular orientation. Greater or fewer mating tab pads138may be provided in alternative embodiments. The mating tab pads138may be arranged in a different orientation in alternative embodiments. In an exemplary embodiment, the mating tab pads138may be located adjacent the edges of the second fixed contact122, such as at the opposite sides and at the end, such as to increase the spacing between the mating tab pads138. When the movable contact124is in the unmated position, the movable contact pads186are spaced apart from the mating tab pads138. The movable contact pads186and the mating tab pads138define a separable interface between the movable contact124and the second fixed contact122. However, the movable contact124remains electrically connected to the first fixed contact120through the flexible busbar140. The flexible busbar140forms a permanent connection between the movable contact124and the first fixed contact120. The flexible busbar140is connected to the movable contact124and the first fixed contact120in the mated position and the flexible busbar140is connected to the movable contact124and the first fixed contact120in the unmated position. In an exemplary embodiment, the flexible busbar140has a generally rectangular cross-section. For example, the flexible busbar140is plate-like or sheet-like having an upper surface240and a lower surface242extending between first and second sides244,246. The sides244,246extend between the first and second mating ends144,146. The flexible busbar140has a length between the mating ends144,146and a width250between the sides244,246. Optionally, the width250may be approximately equal to the length. The flexible busbar140has a thickness252between the upper surface240and the lower surface242. In an exemplary embodiment, the flexible busbar140is wide and thin. For example, the width250may be at least ten times the thickness252. As such, the flexible busbar140is configured to move and bend as the movable contact124is moved between the mated position and the unmated position. The shape of the flexible busbar140changes as the movable contact124is moved between the mated position and the unmated position. FIG.5is a schematic view of a portion of the contactor100showing the movable contact124in a mated position relative to the second fixed contact122.FIG.6is an exploded schematic view of a portion of the contactor100showing the movable contact124and the second fixed contact122.FIGS.5and6show the movable contact124and the second fixed contact122as planar, rectangular contacts; however, the movable contact124and the second fixed contact122may have other shapes, such as the shapes illustrated inFIG.4.FIGS.5and6illustrate the upper and lower shrouds302,304for magnetically coupling the second fixed contact122and the movable contact124. The second fixed contact122includes an upper surface137and a lower surface139. The movable contact124includes the upper surface182and the lower surface184. The lower surface139of the second fixed contact122faces the upper surface182of the movable contact124. The mating tab pads138(shown inFIG.4) are at the lower surface139and face the movable contact pads186at the upper surface182. In the mated position, the mating tab pads138are connected to the movable contact pads186to create electrical paths between the second fixed contact122and the movable contact124. Current flows through the second fixed contact122and the movable contact124in the mated position. When current passes through the interface, a repulsive Holms force is generated at the interface. The Holms forces increase as the current increases, tending to cause the second fixed contact122and the movable contact124to separate. The magnetic shroud300is provided to overcome the repulsive Holms forces and prevent the second fixed contact122and the movable contact124from unintentionally opening. For example, the magnetic shroud300uses the magnetic field generated by the current flow through the second fixed contact122and the movable contact124to hold the second fixed contact122and the movable contact124in the closed or mated position when current is flowing through the circuit. The attractive magnetic forces may be proportional to the current. For example, as the current increases, the attractive magnetic force also increases. The magnetic shroud300includes the upper shroud302and the lower shroud304. The upper shroud302is coupled to the second fixed contact122and a lower shroud304is coupled to the movable contact124. In the illustrated embodiment, the upper shroud302is cup-shaped to receive the second fixed contact122. For example, the upper shroud302may be U-shaped. The upper shroud302extends along the sides of the second fixed contact122and along the upper surface137of the second fixed contact122. In the illustrated embodiment, the lower shroud304is cup-shaped to receive the movable contact124. For example, the lower shroud304may be U-shaped. The lower shroud304extends along the sides of the movable contact124and along the lower surface184of the movable contact124. In an exemplary embodiment, the upper shroud302includes an upper wall310, a first upper sidewall312, and a second upper sidewall314. The upper sidewalls312,314extend from the bottom of the upper wall310to form an upper cavity316below the upper wall310and between the upper sidewalls312,314. The upper cavity316receives the second fixed contact122. The upper cavity316may be open at the front and rear to allow the second fixed contact122to extend forward and rearward from the upper shroud302. However, in other embodiments, a front wall may be provided between the sidewalls312,314, such as to engage the end of the second fixed contact122. The upper sidewalls312,314extend to upper edges318at the distal ends of the upper sidewalls312,314. The upper edges318face the lower shroud304. In the illustrated embodiment, the upper cavity316is open between the upper edges318. The second fixed contact122may be loaded into the upper cavity316through the open bottom of the upper shroud302. However, in alternative embodiments, the upper shroud302may be enclosed. For example, a lower wall may extend across the bottom to form a rectangular upper shroud, which may receive the end of the second fixed contact122, such as through openings at the front and rear of the upper shroud302. In an exemplary embodiment, the lower shroud304includes a lower wall320, a first lower sidewall322, and a second lower sidewall324. The lower sidewalls322,324extend from the top of the lower wall320to form a lower cavity326above the lower wall320and between the lower sidewalls322,324. The lower cavity326receives the movable contact124. The lower cavity326may be open at the front and rear to allow the movable contact124to extend forward and rearward from the lower shroud304. However, in other embodiments, a front wall may be provided between the sidewalls322,324, such as to engage the end of the movable contact124. The lower sidewalls322,324extend to lower edges328at the distal ends of the lower sidewalls322,324. The lower edges328face the upper shroud302. In the illustrated embodiment, the lower cavity326is open between the lower edges328. The movable contact124may be loaded into the lower cavity326through the open top of the lower shroud304. However, in alternative embodiments, the lower shroud304may be enclosed. For example, an upper wall may extend across the top to form a rectangular lower shroud, which may receive the end of the movable contact124, such as through openings at the front and rear of the lower shroud304. FIG.7is a cross sectional view of a portion of the contactor100showing the movable contact124in a mated position relative to the second fixed contact122.FIG.7illustrates the upper and lower shrouds302,304magnetically coupling the second fixed contact122and the movable contact124. The magnetic shroud300includes a core330, such as defined by the upper cavity316and the lower cavity326. The magnetic shroud300forms a magnetic field around the core330. The second fixed contact122and the movable contact124are located in the core330and held in the mated position by the magnetic attractive forces of the upper and lower shrouds302,304. When mated, the mating tab pad(s)138at the lower surface139of the second fixed contact122engages the movable contact pad(s)186at the upper surface182of the movable contact124. Electrical paths are created between the second fixed contact122and the movable contact124through the pads138,186to allow current to flow through the second fixed contact122and the movable contact124. The magnetic shroud300is provided to overcome the repulsive Holms forces and prevent the second fixed contact122and the movable contact124from unintentionally opening. The magnetic field generated by the current flowing through the second fixed contact122and the movable contact124generates attractive magnetic forces between the upper and lower shrouds302,304, which increases as the current through the circuit increases. The upper shroud302is coupled to the second fixed contact122and extends along the sides of the second fixed contact122and along the upper surface137of the second fixed contact122. The upper shroud302may be coupled to the second fixed contact122using fasteners, clips, epoxy or other securing elements. Alternatively, the upper shroud302may be coupled to the second fixed contact122by an interference fit. The lower shroud304is coupled to the movable contact124and extends along the sides of the movable contact124and along the lower surface184of the movable contact124. The lower shroud304may be coupled to the movable contact124using fasteners, clips, epoxy or other securing elements. Alternatively, the lower shroud304may be coupled to the movable contact124by an interference fit. The upper edges318of the upper shroud302faces the lower edges328of the lower shroud304across a gap332. The upper shroud302is magnetically attracted to the lower shroud304across the gap332. The magnetic attractive force is proportional to the current passing through the circuit (for example, passing between the second fixed contact122and the movable contact124). The magnetic attractive force may be controlled (for example, increased/decreased) by changing the current flowing through the circuit. The magnetic attractive force may be controlled by selecting the material of the upper shroud302and/or the lower shroud304. In various embodiments, the upper and lower shrouds302,304may be manufactured from the same material. For example, the upper and lower shrouds302,304may be manufactured from a low carbon iron material, steel, or other ferrous material. The magnetic attractive force may be controlled by controlling the size (for example, length, width, height, thickness, and the like) of the upper and lower shrouds302,304. The magnetic attractive force may be controlled by controlling the spacing between the upper and lower shrouds302,304, such as the size of the gap332and/or the heights of the sidewalls312,314,324,326and/or the spacing between the upper wall310and the lower wall320. FIG.8illustrates a contactor400in accordance with an exemplary embodiment.FIG.9is a simplified view of the contactor400in accordance with an exemplary embodiment illustrating internal components of the contactor400. The contactor400is similar to the contactor100; however, the contactor400is shaped differently and includes contacts that are shaped differently. The contactor400includes a magnetic shroud600(FIG.9) used to magnetically hold the contacts in mated positions when the contactor is energized. The contactor400may be an electrical switch or relay. The contactor400includes a housing410(removed inFIG.10to illustrate the internal components of the contactor400) having an outer wall411surrounding a cavity412. The housing410may be a multi-piece housing in various embodiments. The outer wall411may have a rectangular cross-section in various embodiments. The contactor400includes first and second fixed contacts420,422,422received in the cavity412and a movable contact424movable within the cavity412between a mated position and an unmated position. The movable contact424electrically connects the fixed contacts420,422in the mated position. The fixed contacts420,422are fixed to the housing410. In an exemplary embodiment, a contact holder426is used to hold the fixed contacts420,422. The contact holder426is received in the cavity412and coupled to the housing410. The fixed contacts420,422each include an outer end defining a terminating end430and an inner end defining a mating end432. In the illustrated embodiment, the fixed contacts420,422are generally planar and may be oriented parallel to each other. Other shapes are possible in alternative embodiments. The terminating end430is configured to be terminated to another component, such as a wire or a terminal, such as a line in or a line out wire. In an exemplary embodiment, the terminating end430is exposed at the exterior of the contactor400for terminating to the other component. In the illustrated embodiment, the terminating end430extends to the exterior of the contact holder426. The mating end432is located within the cavity412for connection with the movable contact424. In the illustrated embodiment, the mating end432is located inside the contact holder426. In an exemplary embodiment, the contactor400includes a flexible busbar440electrically connecting the first fixed contact420and the movable contact424. The flexible busbar440flexes as the movable contact424moves between the mated position and the unmated position. The movable contact424remains connected to the first fixed contact420through the flexible busbar440as the movable contact424moves between the mated position and the unmated position. However, the contactor400may be provided without the flexible busbar440in alternative embodiments. In such embodiments, the movable contact424may separate from both the first and second fixed contacts420,422. The contactor400includes a coil assembly490in the cavity412operated to move the movable contact424between the unmated position and the mated position. The coil assembly490is energized to move the movable contact424to the mated position. For example, the coil assembly490forms an electromagnetic field to move the movable contact424. When mated, current is able to flow through the fixed contacts420,422through the flexible busbar440and the movable contact424. The current generates repulsive Holms forces between the second fixed contact422and the movable contact424. The current also generates a magnetic field used by the magnetic shroud600to overcome the repulsive forces. In an exemplary embodiment, the magnetic shroud600provides a magnetic holding force to hold the movable contact424in the mated position. The magnetic holding force provides additional holding force in addition to the holding force provided by the energized coil assembly490. The magnetic holding force is an attractive force used to overcome repulsive forces between the movable contact424and the second fixed contact422, such as repulsive Holms forces induced by the current flow through the contacts422,424. In an exemplary embodiment, the magnetic shroud600includes an upper shroud602coupled to the second fixed contact422and a lower shroud604may be coupled to the movable contact424. The upper shroud602is configured to be magnetically coupled to the lower shroud604when the current flows through the contacts422,424to create a magnetic field for the shrouds602,604. An attractive force is generated between the shrouds602,604to help hold the movable contact424in the mated position with the second fixed contact422. FIG.10is an exploded view of the contactor400in accordance with an exemplary embodiment illustrating internal components of the contactor400.FIG.11is an enlarged view of a portion of the contactor400showing the second fixed contact422and the upper shroud602in accordance with an exemplary embodiment.FIG.12is an enlarged view of a portion of the contactor400showing the movable contact424and the lower shroud604in accordance with an exemplary embodiment. The contactor400includes a contact assembly including the first and second fixed contacts420,422, the movable contact424, and the flexible busbar440.FIG.10shows the magnetic shroud600, which is configured to be coupled to the second fixed contact422and the movable contact424to create an attractive magnetic force to help hold the movable contact424in the mated position with the second fixed contact422, whileFIG.11shows the upper shroud602andFIG.12shows the lower shroud604of the magnetic shroud600. The contactor400includes a movable contact assembly450, which includes the movable contact424and a movable contact holder452. The movable contact holder452positions the movable contact424in the housing410of the contactor400. In an exemplary embodiment, the lower shroud604is coupled to the movable contact424and/or the movable contact holder452. The lower shroud604is movable with the movable contact424and/or the movable contact holder452. The movable contact424includes a main body460having a first plate462at a first end464of the movable contact424and a second plate466at a second end468of the movable contact424. The movable contact424includes a first pocket472along a first side474of the movable contact424and a second pocket476along a second side478of the movable contact424. The movable contact424includes mounting tabs480extending into the pockets472,476. The movable contact holder452is coupled to the mounting tabs480at the first and second sides474,478. The lower shroud604may be received in the first and second pockets472,476and coupled to the mounting tabs480. The movable contact424includes an upper surface482and a lower surface484. In an exemplary embodiment, the lower shroud604extends along the lower surface484. In an exemplary embodiment, the movable contact424includes mating contact pads486at the upper surface482configured to be mated to and unmated from the second fixed contact422. In an exemplary embodiment, the movable contact holder452is a stamped and formed part. The movable contact holder452may be coupled to the coil assembly490, such as the plunger, to position the movable contact424as the movable contact424is moved between the mated position and the unmated position. The movable contact holder452includes a base500, mounting arms502extending from the base500, and support arms504extending from the base500. The lower shroud604may be located between the base500of the movable contact holder452and the lower surface484of the movable contact424. The mounting arms502are used to secure the movable contact holder452to the movable contact424. The mounting arms502are secured to the mounting tabs480at the first and second sides474,478of the movable contact424. The support arms504are used to position the movable contact424within the housing410of the contactor400(shown inFIG.5) during mating and unmating. The support arms504engage the lower surface484of the movable contact424to press upward against the lower surface484. In an exemplary embodiment, the second fixed contact422includes a mating tab436at the mating end432. The second fixed contact422includes an upper surface437and a lower surface439. The upper shroud602is coupled to the upper surface437at the mating tab436. The mating tab436is oriented parallel to the movable contact424. For example, the mating tab436may be oriented horizontally. The second fixed contact422includes one or more mating tab pads438(shown in phantom) at a bottom of the mating tab436. The mating tab pads438are configured to be mated to and unmated from the mating contact pads486of the movable contact424. Electrical paths are created between the movable contact424and the second fixed contact422through the mating contact pads486and the mating tab pads438. Current flows through the movable contact424and the second fixed contact422when mated. The current generates a magnetic field. The magnetic shroud600generates a magnetically attractive force between the upper and lower shrouds602,604when the magnetic field is generated to hold the movable contact424in the mated position. The magnetic holding force overcomes the repulsive forces, such as any repulsive Holms forces generated by the current flowing through the movable contact424and the second fixed contact422, to reduce the risk of undesirable separation between the contacts422,424. The magnetic shroud600includes the upper shroud602(FIG.11) and the lower shroud604(FIG.12). The upper shroud602is coupled to the second fixed contact422and the lower shroud604is coupled to the movable contact424. In the illustrated embodiment, the upper shroud602is cup-shaped to receive the second fixed contact422. For example, the upper shroud602may be U-shaped. The upper shroud602extends along the sides of the second fixed contact422and along the upper surface437of the second fixed contact422. In the illustrated embodiment, the lower shroud604is cup-shaped to receive the movable contact424. For example, the lower shroud604may be U-shaped. The lower shroud604extends along the sides of the movable contact424and along the lower surface484of the movable contact424. In an exemplary embodiment, the upper shroud602includes an upper wall610, a first upper sidewall612, and a second upper sidewall614. The upper sidewalls612,614extend from the bottom of the upper wall610to form an upper cavity616below the upper wall610and between the upper sidewalls612,614. The upper cavity616receives the second fixed contact422. The upper sidewalls612,614extend to upper edges618at the distal ends of the upper sidewalls612,614. The upper edges618face the lower shroud604. In the illustrated embodiment, the upper cavity616is open between the upper edges618. The upper shroud602is coupled to the second fixed contact422and extends along the sides of the second fixed contact422and along the upper surface437of the second fixed contact422. The upper shroud602may be coupled to the second fixed contact422using fasteners, clips, epoxy or other securing elements. Alternatively, the upper shroud602may be coupled to the second fixed contact422by an interference fit. In an exemplary embodiment, the lower shroud604includes a lower wall620, a first lower sidewall622, and a second lower sidewall624. In the illustrated embodiment, the lower wall620includes an opening621configured to receive a portion of the coil assembly490, such as the plunger and/or the spring. The lower sidewalls622,624extend from the top of the lower wall620to form a lower cavity626above the lower wall620and between the lower sidewalls622,624. The lower cavity626receives the movable contact424. The lower sidewalls622,624extend to lower edges628at the distal ends of the lower sidewalls622,624. The lower edges628face the upper shroud602. In the illustrated embodiment, the lower cavity626is open between the lower edges628. The lower shroud604is coupled to the movable contact424and extends along the sides of the movable contact424and along the lower surface484of the movable contact424. The lower shroud604may be coupled to the movable contact424using fasteners, clips, epoxy or other securing elements. Alternatively, the lower shroud604may be coupled to the movable contact424by an interference fit. During operation, the magnetic shroud600forms a magnetic field around the contacts422,424. The magnetic shroud600is provided to overcome the repulsive Holms forces and prevent the second fixed contact422and the movable contact424from unintentionally opening. The magnetic field generated by the current flowing through the second fixed contact422and the movable contact424generates attractive magnetic forces between the upper and lower shrouds602,604, which increases as the current through the circuit increases. The movable contact424is held in the mated position by the magnetic attractive forces of the upper and lower shrouds602,604. The upper edges618of the upper shroud602faces the lower edges628of the lower shroud604across a gap. The upper shroud602is magnetically attracted to the lower shroud604across the gap. The magnetic attractive force is proportional to the current passing through the circuit (for example, passing between the second fixed contact422and the movable contact424). It is to be understood that the above description is intended to be illustrative, and not restrictive. For example, the above-described embodiments (and/or aspects thereof) may be used in combination with each other. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from its scope. Dimensions, types of materials, orientations of the various components, and the number and positions of the various components described herein are intended to define parameters of certain embodiments, and are by no means limiting and are merely exemplary embodiments. Many other embodiments and modifications within the spirit and scope of the claims will be apparent to those of skill in the art upon reviewing the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein.” Moreover, in the following claims, the terms “first,” “second,” and “third,” etc. are used merely as labels, and are not intended to impose numerical requirements on their objects. Further, the limitations of the following claims are not written in means-plus-function format and are not intended to be interpreted based on 35 U.S.C. § 112(f), unless and until such claim limitations expressly use the phrase “means for” followed by a statement of function void of further structure. | 41,630 |
11942297 | DETAILED DESCRIPTION Hereinbelow, a relay according to the embodiment will be described with reference to the drawings.FIG.1is a side sectional view showing a relay1according to the first embodiment. As shown inFIG.1, the relay1includes a case2, a contact device3, and a drive device4. In the following description, each direction of up/down/left/right respectively means up/down/left/right inFIG.1. Further, the front-back direction is assumed to mean a direction perpendicular to the paper surface ofFIG.1. However, the definitions of these directions do not limit the arrangement direction of the relay1. The case2houses the contact device3and the drive device4. The case2is made of an insulating resin. The case2includes a case body2aand a lid2b. The contact device3and the drive device4are arranged in the case body2a. The lid2bis separate from the case body2a. The lid2bis attached to the case body2a. The case body2aincludes a contact case18, an outer case19, and an inner case20. In the contact case18, the inside of the case2is divided into a first storage portion S1 and a second storage portion S2. The contact device3is arranged in the first storage portion S1. The drive device4is arranged in the second storage portion S2. The outer case19houses the contact case18inside. The inner case20is attached to the contact case18. The inner case20will be described in detail later. The contact device3includes a first fixed terminal5, a second fixed terminal6, a movable contact piece7, and a contact piece holder8. The first fixed terminal5, the second fixed terminal6, and the movable contact piece7are formed of a conductive material such as copper. The first fixed terminal5includes a first fixed contact11. The second fixed terminal6includes a second fixed contact12. The first fixed contact11and the second fixed contact12are arranged apart from each other in the left-right direction. The movable contact piece7extends in the left-right direction. In the present embodiment, the longitudinal direction of the movable contact piece7coincides with the left-right direction. The movable contact piece7includes a first movable contact13and a second movable contact14. The first movable contact13and the second movable contact14are arranged apart from each other in the left-right direction. The first movable contact13is arranged opposite the first fixed contact11. The second movable contact14is arranged opposite the second fixed contact12. The movable contact piece7includes a first end portion7aand a second end portion7b. The first end portion7ais one end portion of the movable contact piece7in the left-right direction. The second end portion7bis the other end portion of the movable contact piece7in the left-right direction. In the present embodiment, the first end portion7ais the left end portion of the movable contact piece7. The second end portion7bis the right end portion of the movable contact piece7. The first movable contact13is arranged between the center of the movable contact piece7in the left-right direction and the first end portion7a. The second movable contact14is arranged between the center of the movable contact piece7in the left-right direction and the second end portion7b. The movable contact piece7is arranged so as to be movable in the up-down direction. Specifically, the movable contact piece7is arranged to be movable in a contact direction Z1 and a separating direction Z2. The contact direction Z1 is the direction in which the first movable contact13and the second movable contact14come into contact with the first fixed contact11and the second fixed contact12(downward inFIG.1). The separating direction Z2 is the direction in which the first movable contact13and the second movable contact14are separated from the first fixed contact11and the second fixed contact12(upward inFIG.1). The contact piece holder8holds the movable contact piece7. The contact piece holder8holds the movable contact piece7at the center of the movable contact piece7in the left-right direction. The contact piece holder8includes a drive shaft15, a holder16, and a contact spring17. The drive shaft15extends in the up-down direction. The drive shaft15connects the movable contact piece7and the drive device4. The drive shaft15is movably arranged in the contact direction Z1 and the separating direction Z2. The holder16is connected to the movable contact piece7and holds the movable contact piece7. The contact spring17is arranged between the drive shaft15and the holder16. The drive shaft15is connected to the holder16via the contact spring17. The first fixed terminal5includes a first contact support portion21, a first intermediate portion22, and a first external connection portion24. The first fixed contact11is provided in the first contact support portion21. The first contact support portion21extends from the first fixed contact11to the outer side in the left-right direction. Note that outer side in the left-right direction means a direction away from the central axis of the drive shaft15in the left-right direction. Inner side in the left-right direction means a direction approaching the central axis of the drive shaft15in the left-right direction. The first intermediate portion22is located between the first contact support portion21and the first external connection portion24. The first intermediate portion22is arranged on the outer side of the first fixed contact11in the longitudinal direction of the movable contact piece7. The first intermediate portion22extends from the first contact support portion21in a direction parallel to the moving direction of the movable contact piece7, that is, in the up-down direction. Specifically, the first intermediate portion22extends upward from the first contact support portion21. The first external connection portion24extends to the left from the first intermediate portion22. The first external connection portion24projects to the outer side of the case2. The first fixed terminal5has a bent shape between the first contact support portion21and the first intermediate portion22and between the first intermediate portion22and the first external connection portion24. The first contact support portion21, the first intermediate portion22, and the first external connection portion24may be integrally formed. Alternatively, the first contact support portion21, the first intermediate portion22, and the first external connection portion24may be separate bodies from each other and connected to each other by a fixing means such as welding. The second fixed terminal6includes a second contact support portion31, a second intermediate portion32, and a second external connection portion34. The second fixed contact12is provided in the second contact support portion31. The second fixed terminal6has a shape that is left-right symmetrical with the first fixed terminal5. The second contact support portion31, the second intermediate portion32, and the second external connection portion34correspond to the first contact support portion21, the first intermediate portion22, and the first external connection portion24, respectively. Accordingly, a detailed description of the second fixed terminal6will be omitted. The drive device4generates a driving force for operating the movable contact piece7. The drive device4operates the movable contact piece7by an electromagnetic force. The drive device4moves the movable contact piece7in the contact direction Z1 and the separating direction Z2. The drive device4is arranged below the movable contact piece7. The drive device4includes a coil41, a spool42, an iron core43, a return spring44, and a yoke45. The coil41is wound around the spool42. The coil41and the spool42are arranged coaxially with the drive shaft15. The spool42has a hole42athat penetrates in the axial direction of the spool42. The iron core43and the return spring44are inserted into the hole42aof the spool42. The yoke45is connected to the iron core43. The yoke45includes a first yoke45aand a second yoke45b. The first yoke45ais arranged between the contact device3and the spool42. The second yoke45bis connected to the first yoke45a. The second yoke45bhas a U-shape. The second yoke45bis arranged on both sides of the coil41and on the opposite side of the first yoke45awith respect to the coil41. The iron core43includes a fixed iron core43a, a movable iron core43b, and a ring iron core43c. The fixed iron core43ais fixed to the second yoke45b. The ring iron core43cis in contact with the first yoke45a. The movable iron core43bis separate from the fixed iron core43aand the ring iron core43c. The movable iron core43bis movably arranged in the contact direction Z1 and the separating direction Z2. The movable iron core43bmoves within the ring iron core43c. The movable iron core43bis connected to the drive shaft15. The return spring44is arranged between the movable iron core43band the fixed iron core43a. The return spring44biases the movable iron core43bin the separating direction Z2. Next, the operation of the relay1will be described. When the coil41is not excited due to no electric current being passed therethrough, the drive shaft15is in a pressed state in the separating direction Z2 by the elastic force of the return spring44together with the movable iron core43b. Therefore, the movable contact piece7is also in a pressed state in the separating direction Z2, and as shown inFIG.1, the first movable contact13and the second movable contact14assume an open state separated from the first fixed contact11and the second fixed contact12. When the coil41is excited by an electric current being passed therethrough, the movable iron core43bmoves in the contact direction Z1 against the elastic force of the return spring44due to the electromagnetic force of the coil41. Thereby, the drive shaft15, the holder16, and the movable contact piece7all move in the contact direction Z1, whereby the first movable contact13and the second movable contact14assume a closed state in contact with the first fixed contact11and the second fixed contact12. When the electric current to the coil41is stopped and the coil41is demagnetized, the drive shaft15is pressed in the separating direction Z2 by the elastic force of the return spring44together with the movable iron core43b. For that reason, the movable contact piece7is also pressed in the separating direction Z2, whereby the first movable contact13and the second movable contact14return to the open state. FIG.2is a plan view showing a configuration of the relay1in the contact case18. InFIG.2, the positions of the movable contact piece7and the drive shaft15are indicated by a dashed line. As shown inFIGS.1and2, the relay1includes a first magnet51, a second magnet52, and a third magnet53. The first magnet51, the second magnet52, and the third magnet53are permanent magnets for extinguishing an arc generated between the contacts. The first magnet51and the second magnet52are arranged apart from each other in the left-right direction. The first magnet51is arranged on one side of the movable contact piece7in the left-right direction. The second magnet52is arranged on one side of the movable contact piece7in the left-right direction. Specifically, the first magnet51is arranged to the left of the movable contact piece7. The second magnet52is arranged to the right of the movable contact piece7. The first magnet51and the second magnet52are arranged so that their same poles face each other. Specifically, the first magnet51includes an S-pole surface51S that opposes the movable contact piece7and an N-pole surface51N on the opposite side of the S-pole surface51S. The second magnet52includes an S-pole surface52S opposing the movable contact piece7and an N-pole surface52N on the opposite side of the S-pole surface52S. The third magnet53is arranged opposite the front-back direction with respect to the movable contact piece7. In the present embodiment, the front-back direction coincides with the width direction of the movable contact piece7that intersects the longitudinal direction of the movable contact piece7. The third magnet53includes an N-pole surface53N opposing the movable contact piece7and an S-pole surface53S on the opposite side of the N-pole surface53N. The relay1includes a yoke47. The yoke47connects the first magnet51, the second magnet52, and the third magnet53. Specifically, the yoke47is connected to the N-pole surface51N of the first magnet51, the N-pole surface52N of the second magnet52, and the S-pole surface53S of the third magnet53. Due to the arrangement of the first magnet51, the second magnet52, and the third magnet53as described above, as shown inFIG.3, a magnetic flux B1heading to the outer side in the left-right direction is generated at a position between the first fixed contact11and the first movable contact13(hereinafter referred to as “first contact position P1”). Further, a magnetic flux B2heading to the outer side in the left-right direction is generated at a position between the second fixed contact12and the second movable contact14(hereinafter referred to as “second contact position P2”). Specifically, the magnetic flux B1in the direction from the center in the left-right direction to the first end portion7ais generated between the first fixed contact11and the first movable contact13. The magnetic flux B2in the direction from the center in the left-right direction to the second end portion7bis generated between the second fixed contact12and the second movable contact14. Accordingly, when an electric current flows from the first movable contact13to the second movable contact14(from left to right inFIG.3) in the movable contact piece7, a Lorentz force indicated by the arrow F1acts at the first contact position P1. Further, a Lorentz force indicated by the arrow F2acts at the second contact position P2. When an electric current flows from the second movable contact14to the first movable contact13(from right to left inFIG.3) in the movable contact piece7, a Lorentz force indicated by the arrow F3acts at the first contact position P1. Further, a Lorentz force indicated by the arrow F4acts at the second contact position P2. As described above, when the Lorentz forces F1and F2or the Lorentz forces F3and F4act on an arc, the arc is stretched in the directions indicated by the arrows F1-F4. Thereby, the arc is quickly extinguished. Hereinafter, the direction of the Lorentz force (F1-F4) acting on the arc by the magnetic force of the first to third magnets51-53is referred to as the “first extension direction (F1-F4)”. In the present embodiment, the first extension direction (F1-F4) is the width direction of the movable contact piece, that is, the front-back direction. Specifically, the first extension direction (F1) is the direction of the Lorentz force acting on an arc at the first contact position P1 by the magnetic fields of the first to third magnets51-53when an electric current flows from the first movable contact13to the second movable contact14in the movable contact piece7. The first extension direction (F2) is the direction of the Lorentz force acting on an arc at the second contact position P2 by the magnetic fields of the first to third magnets51-53when an electric current flows from the first movable contact13to the second movable contact14in the movable contact piece7. The first extension direction (F3) is the direction of the Lorentz force acting on an arc at the first contact position P1 by the magnetic fields of the first to third magnets51-53when an electric current flows from the second movable contact14to the first movable contact13in the movable contact piece7. The first extension direction (F4) is the direction of the Lorentz force acting on an arc at the second contact position P2 by the magnetic fields of the first to third magnets51-53when an electric current flows from the second movable contact14to the first movable contact13in the movable contact piece7. Further, as shown inFIG.4, at the first contact position P1, the Lorentz force F5due to the self-magnetic field of the first fixed terminal5acts on the arc. Specifically, due to the electric current flowing through the first intermediate portion22, the Lorentz force F5acts on the arc in a direction different from the first extension direction (F1-F4) at the first contact position P1. For example, when an electric current flows from the first movable contact13to the second movable contact14in the movable contact piece7, at the first contact position P1, the Lorentz force F5heading to the inner side in the left-right direction acts on the arc due to the magnetic field generated by the electric current flowing through the first intermediate portion22. In this case, a resultant force F1′ of the Lorentz forces F1and F5acts on the arc. Accordingly, the arc is stretched in the direction of the resultant force F1′ of the Lorentz forces. Similarly, at the second contact position P2, an electric current flows through the second intermediate portion32, whereby the Lorentz force F6heading to the inner side in the left-right direction acts on the arc at the second contact position P2. Therefore, a resultant force F2′ of the Lorentz forces F2and F6acts on the arc. Accordingly, the arc is stretched in the direction of the Lorentz force resultant force F2′. Hereinbelow, the directions of the Lorentz forces F5and F6acting on the arc by the magnetic field generated by the electric current flowing in the first intermediate portion22are referred to as the second extension directions (F5and F6). In the present embodiment, the second extension directions (F5, F6) are directions heading to the inner side in the longitudinal direction of the movable contact piece. Specifically, the second extension direction (F5) is the direction of the Lorentz force acting on the arc at the first contact position P1 due to the magnetic field generated by the electric current flowing in the first intermediate portion22. The second extension direction (F6) is the direction of the Lorentz force acting on the arc at the second contact position P2 due to the magnetic field generated by the electric current flowing through the second intermediate portion32. As shown inFIG.2, the relay1includes a first wall portion61, a second wall portion62, a third wall portion63, and a fourth wall portion64for extinguishing an arc stretched as described above. The first to fourth wall portions61-64are provided in the inner case20.FIG.5is an exploded perspective view of the inner case20and the contact case18.FIG.6is a perspective view of the inner case20as viewed from below. As shown inFIG.6, the inner case20is separate from the contact case18. The inner case20is formed of an arc-extinguishing material that generates an arc-extinguishing gas by the heat of the arc. The inner case20may be formed of, for example, a thermosetting resin such as an unsaturated polyester resin or a melamine resin. Alternatively, the inner case20may be formed of a thermoplastic resin such as a polyolefin resin, a polyamide resin, or a polyacetal resin. Alternatively, the inner case20may be made of another arc-extinguishing material. The inner case20includes a top surface26, a first side wall27, and a second side wall28. The top surface26covers the first storage portion S1 in the contact case18from above. The first side wall27and the second side wall28are arranged apart from each other in the front-back direction. The first side wall27and the second side wall28extend downward from the top surface26. The first wall portion61and the second wall portion62are located on the inner surface of the first side wall27. The third wall portion63and the fourth wall portion64are provided on the inner surface of the second side wall28. FIG.7is an enlarged plan view showing the surrounding structures of the first wall portion61and the second wall portion62. As shown inFIG.7, the first wall portion61is arranged separated from the movable contact piece7in the first extension direction (F1) by the arc-extinguishing space A1. The first wall portion61is arranged at a position opposing the first contact position P1 in the first extension direction (F1). The first wall portion61includes a first wall surface71, a second wall surface72, and a first connecting wall surface81. The first wall surface71is arranged facing the arc-extinguishing space A1. The first wall surface71is arranged opposite the first extension direction (F1) with respect to the first movable contact13and the first fixed contact11. That is, when viewed from the front-back direction, the first wall surface71overlaps the first movable contact13and the first fixed contact11. The first wall surface71has a flat shape extending in the left-right direction. The second wall surface72is arranged facing the arc-extinguishing space A1. The second wall surface72is arranged in the second extension direction (F5) with respect to the first wall surface71. The second wall surface72is arranged opposite the first extension direction (F1) with respect to the first movable contact13and the first fixed contact11. That is, when viewed from the front-back direction, the second wall surface72overlaps the first movable contact13and the first fixed contact11. The second wall surface72has a flat shape extending in the left-right direction. The second wall surface72is arranged farther from the movable contact piece7than the first wall surface71in the first extension direction (F1). Therefore, in the first extension direction (F1), the distance from the movable contact piece7to the second wall surface72is larger than the distance from the movable contact piece7to the first wall surface71. The first connecting wall surface81is arranged between the first wall surface71and the second wall surface72. The first connecting wall surface81is connected to the first wall surface71and the second wall surface72. The first connecting wall surface81extends in the front-back direction, that is, in the first extension direction (F1). The first wall portion61has a stepped shape on the first connecting wall surface81. The second wall portion62has a shape symmetrical to the first wall portion61in the left-right direction. The second wall portion62is arranged separated from the movable contact piece7in the first extension direction (F2) by the arc-extinguishing space A2. The second wall portion62is arranged at a position opposing the second contact position P2 in the first extension direction (F2). The second wall portion62includes a third wall surface73, a fourth wall surface74, and a second connecting wall surface82. The fourth wall surface74is arranged apart from the movable contact piece7with respect to the third wall surface73in the first extension direction (F2). The third wall surface73, the fourth wall surface74, and the second connecting wall surface82are symmetrical in the left-right direction with the first wall surface71, the second wall surface72, and the first connecting wall surface81, respectively, and thereby detailed descriptions thereof are omitted. FIG.8is an enlarged plan view showing the surrounding structures of the third wall portion63and the fourth wall portion64. The third wall portion63has a shape symmetrical with that of the first wall portion61in the front-back direction. As shown inFIG.8, the third wall portion63is arranged separated from the movable contact piece7in the first extension direction (F3) by the arc-extinguishing space A3. The third wall portion63includes a fifth wall surface75, a sixth wall surface76, and a third connecting wall surface83. The sixth wall surface76is arranged apart from the movable contact piece7with respect to the fifth wall surface75in the first extension direction (F3). Because the fifth wall surface75, the sixth wall surface76, and the third connecting wall surface83are symmetrical in the front-back direction with the first wall surface71, the second wall surface72, and the first connecting wall surface81, respectively, detailed descriptions thereof are omitted. The fourth wall portion64has a shape symmetrical to the third wall portion63in the left-right direction. The fourth wall portion64is arranged separated from the movable contact piece7in the first extension direction (F4) by the arc-extinguishing space A4. The fourth wall portion64includes a seventh wall surface77, an eighth wall surface78, and a fourth connecting wall surface84. The eighth wall surface78is arranged farther from the movable contact piece7than the seventh wall surface77in the first extension direction (F4). Because the seventh wall surface77, the eighth wall surface78, and the fourth connecting wall surface84are symmetrical in the left-right direction with the fifth wall surface75, the sixth wall surface76, and the third connecting wall surface83, respectively, detailed descriptions thereof are omitted. In the relay1according to the first embodiment described above, when the electric current flowing through the contacts is small, the arc is stretched toward the first wall surface71. Further, when the electric current flowing through the contacts is large, the arc is stretched toward the second wall surface72.FIG.9is an enlarged view of the periphery of the first wall portion61. For example, when the electric current flowing through the contacts is 100 A, the Lorentz force F5in the second extension direction (F5) is smaller than the Lorentz force F1in the first extension direction (F1). For that reason, the arc is stretched from the starting point O1 of the arc in the direction indicated by the arrow C1inFIG.9. Thereby, the arc is stretched toward the first wall surface71. The starting point O1 of the arc shown inFIG.9is the center of the contact portion between the first fixed contact11and the first movable contact13. However, the starting point O1 of the arc is not limited to the center of the contact portion between the first fixed contact11and the first movable contact13, and may be at another position. For example, when the electric current flowing through the contacts is 3000 A, the Lorentz force F5in the second extension direction (F5) is larger than when the electric current is 100 A. Therefore, the arc is stretched from the starting point O1 of the arc in the direction indicated by the arrow C2inFIG.9. Thereby, the arc is stretched toward the second wall surface72. Here, the distance from the movable contact piece7to the second wall surface72is larger than the distance from the movable contact piece7to the first wall surface71. For that reason, when the electric current is large, a space sufficiently large for stretching the arc can be secured between the second wall surface72and the movable contact piece7. In other words, the distance from the movable contact piece7to the first wall surface71is smaller than the distance from the movable contact piece7to the second wall surface72. Therefore, even if the electric current is small, the stretched arc can be pressed against the first wall surface71with sufficient force. Thereby, the arc can be extinguished appropriately. As described above, in the relay1according to the present embodiment, it is possible to appropriately extinguish an arc in accordance with the magnitude of the electric current flowing through the contacts by appropriately setting the positions of the first wall surface71and the second wall surface72of the first wall portion61with respect to the movable contact piece7. The first wall portion61is provided in the inner case20which is separate from the contact case18. Accordingly, the formation of the first wall portion61becomes easy. The first wall portion61is formed of an arc-extinguishing material that generates an arc-extinguishing gas by the heat of the arc. Therefore, when the arc is pressed against the first wall portion61with a sufficient force, the arc can be extinguished more appropriately. Further, the same effect as that of the first wall portion61described above can be obtained for the second to fourth wall portions62-64. Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the gist of the invention. For example, the configuration of the drive device4may be changed. The shape or arrangement of the coil41, the spool42, the iron core43, the return spring44, or the yoke45may be changed. The shape or arrangement of the case2may be changed. The shape or arrangement of the first fixed terminal5, the second fixed terminal6, and the movable contact piece7may be changed. For example, the first external connection portion24and the second external connection portion34may project upward from the case2. Alternatively, the first external connection portion24and the second external connection portion34may protrude from the case2in the front-back direction. The arrangement or polarity of the first to third magnets51-53is not limited to that of the above embodiment, and may be changed. The first fixed contact11may be separate from the first fixed terminal5or may be integrated therewith. The second fixed contact12may be separate from the second fixed terminal6or may be integrated therewith. The first movable contact13may be separate from the movable contact piece7or may be integrated therewith. The second movable contact14may be separate from the movable contact piece7or may be integrated therewith. In the above embodiment, the drive device4pulls the drive shaft15from the coil41side, whereby the movable contact piece7moves in the contact direction Z1. Further, when the drive device4pushes the drive shaft15from the coil41side, the movable contact piece7moves in the separating direction Z2. However, the operating direction of the drive shaft15for opening and closing the contacts may be opposite to that of the above embodiment. That is, the movable contact piece7may move in the separating direction Z2 by the drive device4pulling the drive shaft15to the coil41side. The movable contact piece7may move in the contact direction Z1 by the drive device4pushing the drive shaft15from the coil41side. That is, the contact direction Z1 and the separating direction Z2 may be turned upside down from the above-described embodiment. The shape or arrangement of the first to fourth wall portions61-64may be changed. The shape or arrangement of the first to eighth wall surfaces71-78may be changed. The shape or arrangement of the first to fourth connecting wall surfaces81-84may be changed. For example, in the above embodiment, the first to fourth wall portions61-64are integrally provided on the inner case20. However, the first to fourth wall portions61-64may be separate bodies from each other. The first to fourth wall portions61-64may be provided separately from the inner case20. A part of the first to fourth wall portions61-64may be omitted. FIG.10is a schematic view showing the first wall portion61according to a first modification. As shown inFIG.10, the first connecting wall surface81may be inclined so that the distance from the movable contact piece7increases toward the second extension direction (F5). In this case, as shown by the arrow C3inFIG.10, when the arc is stretched between the first wall surface71and the second wall surface72, the arc can be appropriately extinguished. FIG.11is a schematic view showing the first wall portion61according to the second modification. As shown inFIG.11, the first connecting wall surface81may extend in the second extension direction (F5) in the same manner as the first wall surface71and the second wall surface72. The first connecting wall surface81may be arranged between the first wall surface71and the second wall surface72in the first extension direction (F1). The first wall portion61may have a plurality of stepped shapes due to the first wall surface71, the first connecting wall surface81, and the second wall surface72. As for the first connecting wall surface81, the distance from the movable contact piece7to the first connecting wall surface81may be larger than the distance from the movable contact piece7to the first wall surface71, and may be smaller than the distance from the movable contact piece7to the second wall surface72. In this case, as shown by the arrow C3, when the arc is stretched between the first wall surface71and the second wall surface72, the arc can be appropriately extinguished. FIG.12is a schematic view showing the first wall portion61according to the third modification. As shown inFIG.12, the distance from the movable contact piece7to the second wall surface72may be smaller than the distance from the movable contact piece7to the first wall surface71. That is, in the first extension direction (F1), the second wall surface72may be arranged closer to the movable contact piece7than the first wall surface71. In this case, when the electric current is large but the voltage is small, the stretched arc can be pressed against the second wall surface72with sufficient force. For example, when an electric current of 800 V and 400 A flows through the contacts, the Lorentz force F5in the second extension direction is smaller than the Lorentz force F1in the first extension direction. For that reason, the arc is stretched from the starting point 01 of the arc in the direction indicated by the arrow C4inFIG.12. Thereby, the arc is stretched toward the first wall surface71. For example, when an electric current of 400 V and 3,500 A flows through the contacts, the Lorentz force F5in the second extension direction is larger than when the electric current is 400 A. For that reason, the arc is stretched from the starting point 01 of the arc in the direction indicated by the arrow C5inFIG.12. Thereby, the arc is stretched toward the second wall surface72. However, in the first extension direction, the second wall surface72is arranged closer to the movable contact piece7than the first wall surface71. Therefore, even if the voltage is small, the stretched arc can be pressed against the second wall surface72with sufficient force. Thereby, the arc can be appropriately extinguished. FIG.13is a schematic view showing the first wall portion61according to the fourth modification. As shown inFIG.13, the first connecting wall surface81may be inclined so that the distance from the movable contact piece7becomes smaller toward the second extension direction (F5). FIG.14is a schematic view showing the first wall portion61according to the fifth modification. As shown inFIG.14, the distance from the movable contact piece7to the first connecting wall surface81may be larger than the distance from the movable contact piece7to the second wall surface72, and may be smaller the distance from the movable contact piece7to the first wall surface71. Although modifications of the first wall portion61have been described above, the second to fourth wall portions62-64may be modified in the same manner as the aforementioned modifications. REFERENCE NUMERALS 4Drive device5First fixed terminal7Movable contact piece11First fixed contact13First movable contact18Contact case21First contact support portion22First intermediate portion51First magnet61First wall portion71First wall surface72Second wall surface81First connecting wall surfaceA1Arc-extinguishing spaceF1First extension directionF5Second extension direction | 35,444 |
11942298 | In the exemplary embodiments and figures, identical, similar or identically-functioning elements can be provided in each case with the same reference numerals. The illustrated elements and their size ratios with respect to one another are not to be regarded as being true to scale, on the contrary individual elements, such as for example, layers, components, structural elements and regions can be illustrated in an excessively large manner in order to improve the presentability and/or to improve the understanding of the invention. DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS FIGS.1A and1Billustrate a switching device100that can be used for example to switch strong electrical currents and/or high electrical voltages and can be a relay or a contactor, for example a power contactor.FIG.1Aillustrates a three-dimensional sectional view, whereasFIG.1Billustrates a two-dimensional sectional view. The description below relates equally toFIGS.1A and1B. The different geometries are only exemplary and not to be understood as limiting and can also be embodied in an alternative manner. The switching device wo comprises in a housing1two stationary contacts2,3and a movable contact4. The movable contact4is embodied as a contact plate. The stationary contacts2,3together with the movable contact4form the switching contacts. Alternatively to the illustrated number of contacts, other numbers of stationary and/or movable contacts are also possible. The housing1is used primarily as a contact protection for the components that are arranged inside and comprises or is embodied from a synthetic material, for example PBT or glass fiber-filled PBT. The contacts2,3,4can for example comprise or be embodied from Cu, a Cu alloy, or a mixture of copper comprising at least one further metal, for example W, Ni and/or Cr. Figures1A and1Billustrate the switching device wo in an idle state in which the movable contact4is at a distance from the stationary contacts2,3with the result that the contacts2,3,4are galvanically separated from one another. The illustrated design of the switching contacts and in particular their geometries are to be understood as a mere example and not as limiting. Alternatively, the switching contacts can also be embodied differently. For example, it can be possible that only one of the switching contacts is embodied in a stationary manner. The switching device wo comprises a movable armature5that fundamentally performs the switching movement. The armature5comprises a magnetic core6, for example comprising or embodied from a ferromagnetic material. Furthermore, the armature5comprises a shaft7that is guided through the magnetic core6and is fixedly connected at one shaft end to the magnetic core6. At the other shaft end that lies opposite the magnetic core6, the armature5comprises the movable contact4that is likewise connected to the shaft7. The shaft7can preferably be manufactured comprising or embodied from high-grade steel. The magnetic core6is surrounded by a coil8. A current flow in the coil8which can be switched on from the outside by means of a control current circuit generates a movement of the magnetic core6and consequently of the entire armature5in the axial direction, until the movable contact4contacts the stationary contacts2,3. In the illustrated view, the armature moves upwards. The armature5consequently moves from a first position, which corresponds to the illustrated idle position and simultaneously the separated state, in other words non-conducting and thus switched-off state, into a second position that corresponds to the active, in other words conducting and thus switched-on, state. In the active state, the contacts2,3,4are connected to one another in a galvanic manner. In a different embodiment, the armature5can alternatively also perform a rotational movement. The armature5can be embodied in particular as a pulling armature or a folding armature. If the current flow in the coil8is interrupted, the armature5is moved by means of one or multiple springs10back into the first position. In the illustrated view, the armature5consequently moves back downwards. The switching device wo is then located back in the idle state in which the contacts2,3,4are open. As the contacts2,3,4open, it is possible for a flashover to occur which can damage the contact surfaces. As a consequence, there is the risk that the contacts2,3,4remain “stuck” to one another by virtue of becoming welded as a result of the flashover and can no longer be separated from one another. Consequently, the switching device is then in the switched-on state although the current in the coil is switched off and consequently the load current circuit must have been separated. In order to prevent flashovers of this type occurring or in order at least to support the procedure of extinguishing flashovers that occur, the contacts2,3,4are arranged in a gas atmosphere with the result that the switching device wo is embodied as a gas-filled relay or gas-filled contactor. For this purpose, the contacts2,3,4are arranged in a switching chamber11, which is formed by means of a switching chamber wall12and a switching chamber base13, in a gas-tight region16that is formed by means of a hermetically sealed part. The gas-tight region16completely surrounds the armature5and the contacts2,3,4apart from parts of the stationary contacts2,3that are provided for the external terminal. The gas-tight region16and consequently also the switching chamber11are filled with a gas14. The gas-tight region16is formed fundamentally by means of parts of the switching chamber11, of the yoke9and additional walls. The gas14that can be filled into the gas-tight region16by means of a gas-filling port15within the scope of producing the switching device100can particularly preferably contain hydrogen, for example with 50% or more H2in an inert gas or even with 100% H2, since hydrogen-containing gas can promote the procedure of extinguishing flashovers. Furthermore, so-called blowout magnets (not illustrated) can be provided inside or outside the switching chamber11, in other words permanent magnets that extend the flashover path and consequently can improve the procedure of extinguishing the flashovers. The switching chamber wall12and the switching chamber base13can be manufactured for example comprising or embodied from a metal oxide such as Al2O3. Furthermore, synthetic materials that have sufficiently high temperature stability are suitable, for example a PEEK, a PE and/or a glass-filled PBT. Alternatively or in addition, the switching chamber11can comprise at least in part also a POM, in particular having the structure (CH2O)n. In order to obtain information regarding the actual position of the movable contact4and consequently for example with regard to a possible stuck contactor, the switching device100comprises further components that for the sake of clarity are not illustrated infigures1A and1Band are described in connection withFIGS.2and3A to3C. The switching device100comprises in particular furthermore a permanent magnet17and a magnetically-operated switch19. Furthermore, the switching device wo comprises in the illustrated exemplary embodiment a signal processing device20. Alternatively thereto, the switching device in accordance with a further embodiment can also not comprise a signal processing device. Fundamentally only the components and parts of the switching device100that are shown infigures1A and1Band form the gas-tight region16of the switching device100are illustrated inFIG.2. Exemplary embodiments for the signal processing device20and parts thereof are illustrated inFIGS.3Ato3C. Insofar as not otherwise described, the components and parts illustrated inFIG.2and also components and parts of the switching device100not illustrated inFIG.2in comparison to thefigures1A and1Bcorrespond to components and parts that are described in connection withFIGS.1A and1B. The permanent magnet17is arranged together with the contacts2,3,4and the armature5within the gas-tight region16and is in particular attached thereto at the end of the armature5that is remote from the movable contact4. As a consequence, the permanent magnet17can be moved by means of the armature5jointly with the movable contact4. As illustrated inFIG.2, the permanent magnet17can be embodied as a ring magnet and can be attached to the magnetic core6of the armature5. Alternatively thereto, the permanent magnet17can also be embodied as a rod magnet or disc magnet and alternatively or in addition also be attached to the shaft7. Alternatively to the illustrated arrangement of the permanent magnet17in a symmetrical manner with regard to the shaft7, the permanent magnet17can also be arranged and attached at a different position, in particular if as a consequence the functionality described below together with the magnetically-operated switch19can be improved. The magnetically-operated switch19is arranged together with the signal processing device20outside the gas-tight region16within the housing (not illustrated inFIG.2) of the switching device100. It is particularly preferred that the magnetically-operated switch19and the signal processing device20can be connected to one another and furthermore can be arranged on a common printed circuit board, as indicated by the broken line inFIG.2. The magnetically-operated switch19is a Hall switch as described above in the general part and comprises a current output which depending upon the state of the Hall switch is provided with a first current or a second current. In particular, the magnetically-operated switch19is embodied as a Hall switch that is sensitive to the magnetic south pole of the permanent magnet17that is arranged accordingly with its south pole facing the magnetically-operated switch19. According to the operating principle described above in the general part, the magnetically-operated switch19is otherwise relatively insensitive to interference fields. For the operation of the magnetically-operated switch19, said magnetically-operated switch is permanently connected to a voltage supply (not illustrated) at least during the period of use of the switching device100, as is described in detail in connection withFIGS.3A to3C. By virtue of the fact that the permanent magnet17is attached to the armature5, the permanent magnet17can be moved as described above simultaneously as a result of the switching movement of the armature5as the switching device100is switched, and as the switching device100is switched on into its active switched state said permanent magnet is moved away from the magnetically-operated switch19and as the switching device100is switched off into its non-active switched state said permanent magnet is moved back toward said magnetically-operated switch19with the result that in the case of the switched-on state of the switching device100the permanent magnet17is at a greater distance from the magnetically-operated switch19than in the case of the switched-off state of the switching device100. Accordingly, the magnetic field that is generated by the permanent magnet17at the site of the magnetically-operated switch19in the case of the switched-on state of the switching device100is weaker than in the case of the switched-off state of the switching device100. In particular, in the case of the switched-off state of the switching device loo, a first magnetic field strength that is produced by means of the permanent magnet17prevails at the site of the magnetically-operated switch19and in the case of the switched-on state of the switching device100a second magnetic field prevails, wherein the magnetic field strength as described above in the general part relates in particular to the component of the prevailing magnetic field which the magnetically-operated switch is sensitive to. The magnetically-operated switch19is configured and dimensioned in such a manner that during operation in dependence upon a distance the permanent magnet17is from the magnetically-operated switch19, the magnetically-operated switch19is in a first state or in a second state. This means in other words that in the case of the switched-off state of the switching device100the magnetic field produced by means of the permanent magnet17at the site of the magnetically-operated switch19is stronger than a threshold magnetic field and in the case of the switched-on state of the switching device100is less than a threshold magnetic field, wherein the threshold magnetic field indicates the magnetic field strength that is detected by the magnetically-operated switch, at which the magnetically-operated switch19switches from the first state into the second state or conversely. Merely as an example, the state in which the magnetically-operated switch19is in the case of the switched-off state of the switching device100, in other words if the permanent magnet17is at a small distance from the magnetically-operated switch19, is referred to as the first state of the magnetically-operated switch19, whereas the state in which the magnetically-operated switch19in the case of the switched-on state of the switching device100, in other words if the permanent magnet17is at a great distance from the magnetically-operated switch19, is referred to as the second state. The magnetically-operated switch19generates in the first state a first current and in the second state a second current that is different to the first current. The magnetically-operated switch19can be embodied particularly preferably in such a manner that if the switching device100is switched off, the first current is less than the second current if the switching device100is switched on. For example, the first current can be in the range of 5 to 7 mA and the second current can be in the range of 12 to 17 mA. By virtue of detecting the state of the magnetically-operated switch19, in other words for example as a result of a current measurement at the output of the magnetically-operated switch19, it is consequently possible to directly detect the state of the switching device100. In particular, it is possible in a simple manner to detect if the switching device wo is still in the active state due to a stuck contactor although the current for the coil that moves the armature5has already been switched off and the switching device wo would accordingly have to be in the non-active state. As previously mentioned, the switching device wo in accordance with the illustrated exemplary embodiment comprises furthermore a signal processing device20that is connected to the magnetically-operated switch19. The signal processing device20can be provided and configured in particular for measuring the current that is generated by the magnetically-operated switch19. As is illustrated inFIG.3A, the magnetically-operated switch19comprises a terminal190with which the magnetically-operated switch19is connected to a voltage supply and thus can be put into operation. The signal processing device20comprises a measuring resistor201that is connected in series to the magnetically-operated switch19. In particular, this means that the measuring resistor201is connected to the output of the magnetically-operated switch19with the result that the current that is generated by the magnetically-operated switch flows through the measuring resistor201. Since the magnetically-operated switch19generates a first current or a second current depending upon its state as previously described, the voltage drop at the measuring resistor201can assume relative to the magnetically-operated switch19accordingly two values depending upon the state of the magnetically-operated switch19and consequently upon the position of the permanent magnet. By virtue of measuring the voltage at the measuring resistor201, which is indicated by the arrow, it is consequently possible to conclude the switched state of the switching device100. FIG.3Billustrates a further development of the signal processing device20in accordance with a further exemplary embodiment. In comparison to the previous exemplary embodiment, the signal processing device20comprises in a branch parallel to the measuring branch that is formed by means of the magnetically-operated switch19and the measuring resistor201that is connected thereto in a reference branch a Zener diode202that can be connected via a terminal200to a voltage supply, said Zener diode generating a reference voltage. A comparator203that can be an operational amplifier and can be connected via a further terminal200to a voltage supply compares the voltage drop at the measuring resistor201with the voltage drop at the Zener diode202. As illustrated, it can be advantageous if the Zener diode202is connected via a resistor204to the voltage supply. In particular, the comparator203comprises two inputs2031and2032and the prescribed voltages of the measuring branch and the reference branch are present at said inputs. By virtue of the illustrated arrangement, it is possible to realize that the circuit comprising a magnetically-operated switch19and signal processing device20operates with an arbitrary supply voltage in a wide range. In particular, the magnetically-operated switch19, the Zener diode202and the comparator203can be connected to a common supply voltage via the terminals190,200. The supply voltage can preferably provide a voltage that is greater than or equal to 3 V and less than or equal to 24 V. For example, it is possible for the voltage that is provided by the voltage supply to be a vehicle electrical system voltage of a motor vehicle that can be 12 V or 24 V. The comparator203comprises an output2033, which in dependence upon the voltage at the measuring resistor201can assume the as described two values in accordance with the states of the magnetically-operated switch19, can in comparison to the reference voltage at the Zener diode202accordingly adopt two different states. Furthermore, the signal processing device comprises an electronic switch207having a control input that is connected to the output2033of the comparator203. It is particularly preferred that the electronic switch207can be as illustrated a field effect transistor that is preferably connected to the output of the comparator203via a voltage divider that is formed by means of resistors205,206. The voltage divider is embodied in such a manner that an unambiguous high and low signal is generated for the control input of the electronic switch207. The components of the signal processing device20are configured together with the magnetically-operated switch19in particular in such a manner that the electronic switch207is in an open state, in other words in a blocking state or a state in which it exhibits at least a high resistance, if the switching device is in the non-active switched state, and said electronic switch is in a closed state, in other words conducting state or at state in which it exhibits at least a low resistance, if the switching device is in the active switched state. In short, the electronic switch207that is embodied as a field effect transistor consequently exhibits a low resistance if the permanent magnet moves away from the magnetically-operated switch, and it exhibits a high resistance if the permanent magnet moves sufficiently close to the magnetically-operated switch with the result that the electronic switch207demonstrates the same behavior as the switching device100. In particular, the electronic switch207behaves in the same manner as a reed switch but without requiring mechanical parts which are necessary in the case of the reed switch. As illustrated inFIG.3C, the electronic switch207can be connected for example in such a manner that it is possible depending upon the switched state to generate by means of a terminal208an output voltage at a voltage source between the terminals209or also an output voltage is not present since in the blocking state there is no terminal to ground with the result that the state of the electronic switch207can be detected. The features and exemplary embodiments described in conjunction with the figures can be combined with one another according to further exemplary embodiments, even if not all combinations have been explicitly described. Furthermore, the exemplary embodiments described in conjunction with the figures may alternatively or additionally include further features in accordance with the description in the general part. The invention is not restricted to the exemplary embodiments by the description on the basis of said exemplary embodiments. Rather, the invention encompasses any novel feature and any combination of features, which in particular includes any combination of features in the patent claims, even if this feature or this combination is not itself explicitly specified in the patent claims or exemplary embodiments. | 20,863 |
11942299 | DETAILED DESCRIPTION OF THE DRAWINGS FIG.1illustrates, in an isometric perspective view, a low-voltage molded case circuit breaker (1a,1b,1c,1d), object of the present invention, of the type that comprises at least one operating handle (2a), positioned preferably centrally relative to the front operating face of said molded case circuit breaker (1a,1b,1c,1d), aligned to an “XY” plane, said operating handle (2a) of the molded case circuit breaker (1a,1b,1c,1d) being subject to a translation movement relative to the front operating face and on the “XY” plane and in rotary trajectory internally, in a schematic “Z” rotary shaft so as to change the state of electric conduction of an electrical circuit between the “ON” and “OFF” states, or present another state, such as “TRIP” for example, comprising an external case (3,3′) comprising a base case (3a), an intermediate case (3b,3b′) and a cover (3c,3c′), where said molded case circuit breaker (1c,1d) presents an electronic controller (W) housed inside said external case (3). FIG.2illustrates, in an exploded schematic isometric perspective view, parts of said molded case circuit breaker (1a,1b) ofFIG.1, according to a first and second preferred embodiments of the present invention, comprising an operating and tripping mechanism (2) comprising an operating handle (2a) of said molded case circuit breaker (1a,1b), standard in the state of the art, said operating and tripping mechanism (2) comprising for said first preferred embodiment of the present invention of said thermomagnetic circuit breaker (1a) an equalization shaft (2b) of the rotary contact system (4q) best observed inFIG.4, and two positioning shafts (2c), fixed on a central unipolar switching module (4), jointly with a other two side unipolar switching modules (4′,4″) preferably identical to said central unipolar switching module (4), comprising a case (4ab), besides a tripping set (8) and a base case (3a). Said unipolar switching modules (4,4′,4″) constructed in parallelepiped format comprising a case (4ab) comprising a first cavity (4a) and a second cavity (4b), made of insulating material preferably inversely identical made of insulating material, forming a case (4ab), comprising an anterior side face (4c), posterior side face (4d), bottom face (4e), top face (4f) comprising a recess (4m) and a recess (4x), side positioning holes (4h,4g,4h,4j), curved hole (4i), vertical positioning rails (41) and fastening elements (4k) between said first insulating cavity (4a) and said second insulating cavity (4b). Internal components can also be seen which stand out through the first and second insulating cavities (4a,4b), like the first electrical connection terminal (4n), a thermomagnetic tripping set (4r), comprising magnetic trip lever (4ra), a support hole (4rb) for a return spring (not represented), a bimetallic strip (4rc) comprising an adjustment element (4rd) and a second electric connection terminal (4p). ThisFIG.2additionally presents said tripping set (8), comprising a thermomagnetic tripping bar (8a), a thermal adjustment button (8d), an adjustment bar of the magnetic trip (8c) comprising a magnetic adjustment button (8b) and an engagement hook (8e) for a return spring (not represented) of the said magnetic trip lever (4ra), guide rails (8f), a traverse seat (8g), a seat base (8h) and a return spring (8k) of the trip trigger (8i) to trigger the trip of the operating and tripping mechanism (2) best seen inFIG.4, and side locking shafts (8j) for the unipolar circuit switching modules (4′,4″). Practically identically to the way in which the first preferred embodiment was presented, the second preferred embodiment of the present invention presents said thermomagnetic circuit breaker (1b), comprising an operating mechanism (2′) comprising an operating handle (2a′) and additionally including a curved hole (4i′) and a second equalization shaft (2b′) represented by a centerline also inFIG.3, of the double rotary contact system (9d) best observed inFIG.7, and two positioning shafts (2c′), fixed on a central unipolar switching module (9), jointly with a other two side unipolar switching modules (9′,9″) preferably identical to said central unipolar switching module (9), besides a tripping set (8) and a base case (3a). Said unipolar switching modules (9,9′,9″) constructed in parallelepiped format comprising a first cavity (9a) and a second cavity (9b), made of insulating material preferably inversely identical made of insulating material, forming a case (9ab), better viewed with a details in theFIG.7. FIG.3illustrates, in an isometric right side perspective view, said operating mechanism (2,2′) and said tripping set (8) fixed to said central unipolar switching module (4,9) of said molded case circuit breaker (1a,1b) viewed in theFIG.1, according to a first and second preferred embodiment of the present invention, said operating mechanism (2,2′) comprising an equalization shaft (2b) of the simple rotary contact system (4q) seen inFIG.4, and additionally, it is represented a second equalization shaft (2b′) represented by a centerline of said double rotary contact system (9d) seen inFIG.7, locking shafts (2c,2c′) and parallel flanges (2d,2d′), said tripping set (8), in greater details, comprises locking shafts (8j), vertical positioning rod (81), said thermomagnetic tripping bar (8a) comprising a contact face (8aa) and a traverse seat (8g) positioned and supported on the top face (4f) of the central unipolar switching module (4,9). FIG.4illustrates, cross-sectionally on the “XY” plane, said molded case circuit breaker (1a) according to a first preferred embodiment of the present invention, including insulating base case (3a), insulating intermediate case (3b) and insulating cover (3c) in parallelepiped format, comprising a first cavity (4a) of said a case (4ab), including a first electric connection terminal (4n) electrically connected to a thermomagnetic tripping set (4r) through a fastening element (4rg), comprising a shunt bar (4re), a magnetic yoke (4rf) fixed to said shunt bar (4re), said bimetallic strip (4rc) including said adjustment element (4rd), a magnetic trip lever (4ra), a strand (4t), a simple rotary contact system (4q), comprising, a rotary traverse bar (4qa) comprising a movable contact (4qb) and spring (4qc) included in a pivoting support chamber (4qd) including a pivot shaft (4qe) and a through hole (4qf) to said equalization shaft (2b) of said rotary contact system (4q), said equalization shaft (2b) best seen inFIGS.2and3, wherein the said rotary contact system (4q) being associated to an arc extinguishing system (4u), a grid (4ua) and to a fixed contact (4v) electrically connected to a second electric connection terminal (4p), said tripping set (8), comprising said face (8aa) of said thermomagnetic tripping bar (8a), a magnetic adjustment button (8b) and a trip trigger (8i), for trigger off the trip of the operating and tripping mechanism (2), among other components, where said operating handle (2a) of the molded case circuit breaker (1a) is seen in the “OFF” position. FIG.5illustrates, in a slanted top view parts of the molded case circuit breaker (1a,1b) ofFIG.1, in a first and second preferred embodiments of the present invention, in “OFF” position, where said operating and tripping mechanism (2,2′), tripping set (8) are presented, comprising a thermomagnetic tripping bar (8a), a thermal adjustment button (8d), a magnetic trip adjustment bar (8c), comprising a magnetic adjustment button (8b), a central unipolar switching module (4,9), accompanied by the unipolar side switching modules (4′,4″,9′,9″), a base case (3a), grids (4ua,9fa) and the second electrical connection terminals (4p,9g), according to a first and second preferred embodiments of the present invention. FIG.6illustrates, in front side view the first cavity (4a) of said case (4ab) of the unipolar switching module (4,4′,4″), comprising an entry hole (4aa) for said first electric connection terminal (4n) seen inFIGS.2and4, guide channels (4ah) for said magnetic trip lever (4ra) seen inFIG.2, a non-through hole (4ad) for supporting said pivot shaft (4qe) seen inFIG.4and a curved guide (4ae) bearing and limiting the movement of said pivoting support chamber (4qd) of said rotary contact system (4q), seen inFIG.4, structural reinforcements (4af), an exit hole (4ag) through to the passage of said magnetic trip lever (4ra) and of said bimetallic strip (4rc) of said thermomagnetic tripping set (4r) and an exit hole (4ac) for a second electric connection terminal (4p) seen inFIGS.2and4, side positioning holes (4h,4j) and a curved hole (4i), respectively, for the locking shafts (2c) of the mechanism and equalization shaft (2b) of the rotary contact system (4q) seen inFIGS.2and4, according to a first preferred embodiment of the present invention. A second cavity (4b) inversely identical is provided as seen inFIG.2, including on the other side to the equivalent inverted recess cavity (not represented) identical to said first cavity (4a) on the inner face of the second cavity (4b). FIG.7illustrates, in a cross-section view, a unipolar switching module (9), of said multipolar molded case circuit breaker (1b) according to a second preferred embodiment of the present invention, in particular the representation of said central unipolar switching module (9), where the said modules (9,9′,9″) preferably being identical and sidewardly coupleable to each other, comprising a first cavity (9a) and a second cavity inversely identical (9b) seen inFIG.2, a first electric connection terminal (9n) comprising a termination extension (9ca) comprising a first fixed contact (9c), a double rotary contact system (9d), comprising a first movable contact (9da), a rotary traverse bar (9db), a second movable contact (9dc), springs (9dd,9de), a pivoting support chamber (9df), through holes (9dg) to said equalization shafts (2b) and said second equalization shaft (2b′) of said double rotary contact system (9d) associated to arc extinguishing systems (9e,9f), grids (9ea,9fa), a second fixed contact (9ga) of a second electric connection terminal (9g), said first electric connection terminal (9n) is electrically coupled through of a fastening element (9rg) to said thermomagnetic tripping set (9r), comprising a shunt bar (9re), magnetic yoke (9rf), a magnetic trip lever (9ra) and a bimetallic strip (9rc) including an adjustment screw (9rd). Said unipolar switching module (9,9′,9″) in parallelepiped format comprises a case (9ab) comprising a first cavity (9a) and a second cavity (9b) inversely identical seen inFIG.2, made of insulating material comprising an anterior side face (9v), anterior side face (9o), bottom face (9s), top face (9t) comprising a recess (9u) and a recess (9x), as well as an exit hole (9ag) passing to the passage of said magnetic trip lever (9ra) and of said bimetallic strip (9rc) of said thermomagnetic tripping set (9r). FIG.8illustrates, in a cross-section view, a unipolar switching module (10) of said multipolar molded case circuit breaker (1c) according to a third preferred embodiment of the present invention, in particular the representation of said central unipolar switching module (10), where the said modules (10,10′,10″) preferably being identical and sidewardly coupleable to each other, a first side electric connection terminal (10n), a strand (10c), a simple rotary contact system (10d), comprising a rotary traverse bar (10da) comprising a movable contact (10db) and spring (10dc) included in a pivoting support chamber (10dd) including a pivot shaft (lode) and a through hole (10df) to said equalization shaft (2b) of said rotary contact system (10d), said equalization shaft (2b) best seen inFIGS.2and3, said rotary contact system (10d) being associated to an arc extinguishing system (10e), a grid (10ea) and to a fixed contact (10ga) electrically connected to a second electric connection terminal (10g), and magnetically coupled to said first side electric connection terminal (10n) is a current measurer and power supply set (10h) of said electronic controller (W) seen inFIG.1, where said current measurer and power supply set (10h) comprising a current sensor (10ha), a current transformer set (10hb), comprising a magnetic core (10hc) and a power terminal (10k) of a power current coil (10hd), accessed by a through exit hole (10ka). Said unipolar switching module (10,10′,10″) in parallelepiped format comprises an insulating case (10ab) comprising a first cavity (10a) and a second cavity (10b) inversely identical to the cavity (10a), seen inFIG.10, made of insulating material comprising an anterior side face (10u), posterior side face (10v), bottom face (10x), top face (10t) comprising a recess (10za). FIG.9illustrates, in a cross-section view, a unipolar switching module (11) of said multipolar molded case circuit breaker (1d) according to a fourth preferred embodiment of the present invention, in particular the representation of said unipolar central switching module (11), said modules (11,11′,11″) preferably being identical and coupled sidewardly to each other, a first electric connection terminal (11n), comprising a first fixed contact (11j), a double rotary contact system (11d), comprised by a first movable contact (11da), a rotary traverse bar (11db), a second movable contact (11dc), springs (11dd,11de), a pivoting support chamber (11df), through holes (11dg), said double rotary contact system (11d) associated to arc extinguishing systems (11e,11f), grids (11ea,11fa), a second fixed contact (11ha) of a second electric connection terminal (11h), and magnetically coupled to said first electric connection terminal (11n) is a current measurement and power supply set (11i) of said electronic controller (W), said measurer and power supply set (11i) comprising a current sensor (Ilia), a current transformer set (11ib), comprising a magnetic core (11ic), a power terminal (11p) and a power current coil (11id), accessed by a through exit hole (11pa). Said unipolar switching module (11,11′,11″) in parallelepiped format comprises an insulating case (11ab) comprising a first cavity (11a) and a second cavity (11b) inversely identical to the cavity (11a) seen inFIG.10, made of insulating material comprising an anterior side face (11k), posterior side face (111), bottom face (11m), top face (11g) comprising a recess (11o). FIG.10illustrates, in an exploded schematic isometric perspective view, parts of the molded case circuit breaker (1c,1d) ofFIG.1, according to a third and fourth preferred embodiments of the invention, comprising an operating and tripping mechanism (2′) comprising an operating handle (2a′) of said circuit breaker (1c,1d), standard in the state of the art, said operating and tripping mechanism (2′) comprising for said third preferred embodiment of the present invention of said electronic circuit breaker (1c) an equalization shaft (2b′) of the rotary contact system (10d) best viewed inFIG.8, and two positioning shafts (2c′), fixed on a central unipolar switching module (10), jointly with a other two side unipolar switching modules (10′,10″) preferably identical to said central unipolar switching module (10), comprising a case (10ab) and a base case (3a). Said unipolar switching modules (10,10′,10″) constructed in parallelepiped format comprise a case (10ab), comprising a first cavity (10a) and a second cavity (10b) preferably inversely identical made of insulating material, comprising an anterior side face (10u), posterior side face (10v), bottom face (10x), top face (10t) comprising a recess (10za), positioning side holes (10q), curved hole (10r), and fastening elements (10s) between said first insulating cavity (10a) and said second insulating cavity (10b). It is also possible to see internal components that stand out through of the first and second insulating cavities (10a,10b), like the first side connection terminal (10n), and a power terminal (10k) of a power current coil (10hd) seen inFIG.8by way of a through exit hole (10ka), said power current coil (10hd) is connected to said solid state electronic controller (W) seen inFIG.1. Practically identically to how the third preferred embodiment was presented, the fourth preferred embodiment of the present invention presents said electronic circuit breaker (1d), comprising an operating mechanism (2′) comprising an operating handle (2a′) and additionally including a curved hole (11r′) and a second equalization shaft (2b′), of the double rotary contact system (11d) best observed inFIG.9, and two positioning shafts (2c′), fixed on a unipolar central switching module (11), jointly with a other two side unipolar switching modules (11′,11″) preferably identical to said unipolar central switching module (11) and a base case (3a). The external dimension of the modules (10,10′,10″,11,11′,11″) is identical to all the modules (4,4′,4″,9,9′,9″) as seen inFIGS.2and10, for using identical fastening elements (4k,10s), equalization shafts (2b,2b′) and positioning shafts (2c,2c′). FIG.11presents in top perspective a tripping set (12) comprising, trip coil (13), schematically coupled to said operating and tripping mechanism (2,2′) seen inFIG.10of said circuit breaker (1c,1d), comprising said handle (2a,2a′), flanges (2d,2d′), repositioning latch (2e), a shaft (2f), said trip coil (13), comprising a side ledge (13a), a lever (13b), a actuator latch (13c), and a trigger support (13d) connected to an actuator (13f), power terminals (13e) of a coil winding, in addition to an armature encasing a magnet with a case and a cylindrical core, comprising a compression spring, among other components (not represented), according to a third and fourth preferred embodiments of the present invention. FIG.12shows in an isometric perspective view a circuit breaker (1c,1d) without a top cover (3c′) for presenting the detailing of a seat (14a) for said trip coil (13) seen inFIG.11, which is fixed in the cooperation between snap fittings (14b,14c) on the seat (14a) of said circuit breaker (1c,1d). In this Figure, it is also possible to note said repositioning latch (2e), trigger support (13d), comprising said actuator latch (13c), a lever (13b) mounted on the external case (3′) without said cover (3c′) of said circuit breaker (1c,1d), according to a third and fourth preferred embodiments of the present invention. OPERATION OF THE INVENTION In the state of the art, the search for advantageous arrangements are constant in both operation and manufacturing. Despite this, an assembly arrangement not obtained so far refers to assembly preparations, use of synergistic components both using thermomagnetic and electronic technology, already known, but that allow greater flexibility of assemblies and use of standardized components between them, without this burdening costs or leading to the use of dedicated components for each choice of arrangement. In this way the solution presented seeks to solve this in a way, wherein several configurations are permissible using the same philosophy and preparation, thus facilitating a range of pre-assemblies and administration of components in an organized way and that allows the use of various components throughout this range in a standardized and versatile way. The molded case circuit breaker (1a,1b) according to a first and second preferred embodiments of the present invention now detailed, meets a first objective of the invention, in the sense of providing unipolar circuit switching modules (4,4′,4″,9,9′,9″) constructed to facilitate the assembly of components of a low-voltage molded case circuit breaker, provided with a different construction concept to others from the state of the art, its main fundament being the fact that the components of the unipolar switching module (4,4′,4″,9,9′,9″) comprising at least one said thermomagnetic tripping set (4r,9r), said rotary contact system (4q,9d) best seen inFIGS.4and7and said arc extinguishing system (4u,9e,9f) are disposed in a prior set inside a first and a second cavity (4a,4b), inversely identical which are conceived so as to pre-position the internal working components through of holes (4h,4j,4i,4aa,4ac,4ad,4ae,4ag), guides (4ah) and other housing hollows of said unipolar switching module (4,4′,4″) using a simple rotary contact system (4q) seen inFIG.4. Accommodating the internal components of said unipolar switching module (9,9′,9″) occurs in a similar manner by means of a prior set inside a first and a second cavity (9a,9b) similarly to said first and second cavity (4a,4b), for said unipolar circuit switching modules (9,9′,9″) where the pre-positioning of the internal components is through of holes (not represented) equivalent to said holes (4h,4j,4i,4aa,4ac,4ad,4ae,4ag), guides (4ah) and other housing hollows similar to said unipolar switching module (4,4′,4″), using the same concept for said double rotary contact system (9d). A second objective achieved by the invention is to use a same case (4ab,9ab) for unipolar thermomagnetic trip switching modules (4,4′,4″,9,9′,9″), wherein the second cavity (4b,9b) is inversely identical to said first cavity (4a,9a), which together form said insulating case of said unipolar thermomagnetic switching modules (4,4′,4″,9,9′,9″) of said low-voltage circuit breaker (1a,1b), and also use a same external case (3), comprising a base case (3a), intermediate case (3b) and cover (3c) which serves all unipolar circuit switching modules (4,4′,4″,9,9′,9″), due to their outer construction being identical to all the modules for using identical fastening elements (4k,10s),), equalization shafts (2b,2b′) and positioning shafts (2c,2c′). A third objective achieved by the invention is to use a same case (10ab,11ab) for unipolar electronic trip switching modules (10,10′,10″,11,11′,11″), wherein the second cavity (10b,11b) is inversely identical to said first cavity (10a,11a) which together form said insulating case (10ab,11ab) of said unipolar electronic circuit switching modules (10,10′,10″,11,11′,11″) of said low-voltage circuit breaker (1c,1d), and also use a same outer case (3′) comprising base case (3a), intermediate case (3b′) and cover (3c′) which serves all unipolar switching modules (10,10′,10″,11,11′,11″), due to their external construction being identical to all the modules for using identical fastening elements (4k,10s), equalization shafts (2b,2b′) and positioning shafts (2c,2c′), and said base case (3a) is interchangeable between said unipolar thermomagnetic trip switching modules (4,4′,4″,9,9′,9″). A fourth objective of the invention is achieved by using a same external cavity (4a,4b,9a,9b,10a,10b,11a,11b) for unipolar thermomagnetic/electronic trip switching modules (4,4′,4″,9,9′,9″,10,10′,10″,11,11′,11″) which externally have identical dimensions, in a first, second, third and fourth preferred embodiment of the invention respectively, in different nominal current ranges, due to the modular concept proposed, where it is possible to make the prior assemblies, with a predetermined values of nominal current range, regardless of the range for the thermomagnetic tripping set (4r,9r), facilitating the administration of inventories for subsequent final assembly, as said unipolar thermomagnetic trip switching modules (4,4′,4″,9,9′,9″) and/or unipolar electronic circuit switching modules (10,10′,10″,11,11′,11″) are stable, interchangeable, sidewardly fixed to each other, containing rotary contact systems (4q,9d,10d,11d) in equalized form, through said equalization shaft (2b) and alternatively associated said second equalization shaft (2b′), where said operating and tripping mechanism (2,2′), fixed on the upper part of said central unipolar switching module (4,9,10,11), which comprises two positioning shafts (2c,2c′) are introduced into the side positioning holes (4h,4j) of the first or second insulating cavities (4a,4b,9a,9b,10a,10b,11a,11b) and between the unipolar side switching modules (4,4′,4″,9,9′,9″,10,10′,10″,11,11′,11″), allowing an equalization shaft (2b) and alternatively associated said second equalization shaft (2b′) of the rotary contact system (4q,9d,10d,11d) to command the action of any one of the rotary contact systems (4q,9d,10d,11d) coupled sidewardly, comprised in said unipolar switching modules (4′,4″,9′,9″,10′,10″,11′,11″) in an identical manner, when said operating and tripping mechanism (2,2′) is triggered, both by the operator in “ON/OFF” operations, and in any anomalous pre-configured situation arising from said thermomagnetic tripping bar (8a) pre-configured by the thermal adjustment button (8d), or from the magnetic trip lever (4ra,9ra), in any anomalous pre-configured situation by means of a magnetic adjustment button (8b) jointly with a said thermomagnetic tripping bar (8a) of said tripping set (8) or also from the current measurer and power supply set (10h,11i), which are electrically coupled by means of a power terminal (10k,11p) to an electronic controller (W), incorporated inside the molded case circuit breaker (1c,1d) and capable of promoting an electronic trip, triggering the opening of the rotary contact system (10d,11d) thereof, through said operating and tripping mechanism (2) automatically. A fifth objective of the present invention is achieved by providing a breaker switching device with a lesser number of components than the state of the art, when noting the options that use unipolar switching modules (4′,4″,9′,9″,10′,10″,11′,11″), as it does not require additional thermomagnetic or electronic trips in specific modules, when compared to that presented in the state of the art, which is situated outside the switching modules, which implies the use of additional fastening elements, such as hooks and complex docking support between each other. A sixth objective of the invention is achieved by providing a switching device, such as a low-voltage molded case circuit breaker (1a,1b,1c,1d), satisfying the above requirements, being compact in its longitudinal measure and simplified, maintaining the structural rigidity, due to the elimination of factors such as the use of fastening elements such as hooks and complex docking support, which by their connection nature, weaken the structure. Besides the objectives proposed already achieved by the invention now proposed a tripping set (8) is provided, easily coupleable to the unipolar switching module (4,4′,4″,9,9′,9″), where it is positioned vertically through the said seat base (8h) and of said traverse seat (8g) on the top face (4f,9t) and longitudinally through the vertical positioning rod (81) which encases in the recess (4x,9x), in any one of the unipolar switching modules (4,4′,4″,9,9′,9″), being additionally positioned vertically through the vertical positioning rails (41) and the guide rails (8f). Side locking shafts (8j) are additionally provided in said tripping set (8), which behave as stand-bys and which at the time wherein the unipolar switching modules (4,4′,4″,9,9′,9″) are positioned side by side, former are positioned in the positioning holes (4g) of the first or second insulating cavities (4a,4b,9a,9b), whereby promoting for this positioner set a fast locking of said tripping set (8) in the3possible displacement shafts. Lastly, the unipolar thermomagnetic switching modules (4,4′,4″,9,9′,9″) or the electronic unipolar switching modules (10,10′,10″,11,11′,11″) chosen according to a set pre-arrangement, coupled to the operating and tripping mechanism (2,2′) and a tripping set (8) or alternatively an electronic controller (W) are introduced into the outer case (3,3′), specifically at the base case (3a), so as jointly with the intermediate case (3b,3b′) and said cover (3c,3c′), to form said low-voltage molded case circuit breaker (1a,1b,1c,1d), constituting a double insulating case. Said operating and tripping mechanism (2,2′) comprises an operating handle (2a,2a′), whose rotational articulation transmits to the equalization shaft (2b) or alternatively a second equalization shaft (2b′) to said rotary contact systems (4q,9d,10d,11d) the force necessary to open and close to command the action of any one of said rotary contact systems (4q,9d,10d,11d) of said circuit breaker (1a,1b,1c,1d), by means of handles, locking elements and springs (not represented) known in the state of the art. Additionally, when a failure occurs, notably an overcurrent or a short-circuit, the contacts are provided to open automatically, due to the action of a trip device as preferably the thermomagnetic tripping set (4r), acting jointly with the operating and tripping mechanism (2,2′). Alternatively and according to a third and fourth embodiments of the invention, from said current measurer and power supply set (10h,11i) associated with a said solid state electronic controller (W), it is possible to control said trip coil (13) coupled to said operating and tripping mechanism (2,2′) comprising a shaft (2f) associated to said lever (13b) capable of transmitting a displacement movement of the trigger support (13d) comprising actuator latch (13c) from the actuator (13f), wherein said trip coil (13), its said coil winding of the power terminals (13e) being electrically powered from said solid state electronic controller (W), wherein said trip coil (13) comprising an armature, encase a magnet with a casing and a cylindrical core, comprising compression spring, among other components (not represented), which assist the movement of said actuator (13c), in the ratio of external components of said trip coil (13), where said core (not represented) when energized from a signal of said solid state electronic controller (W), move said actuator (13f), associated to said trigger support (13d) and lever (13b) to provoke a displacement of the internal trigger and trip mechanism (2,2′) and disarm said circuit breaker (1c,1d), to an intermediary position between the closed position “ON” and the open position “OFF”, for a “TRIP” state of said circuit breaker (1c,1d), breaking an associated electrical circuit. After said “TRIP”, the prior “OFF” (re-arm) movement to a restart wherein said associated circuit breaker (1c,1d) associated can be “ON”, or “OFF” (re-armed), after said associated circuit breaker (1c,1d) associated is tripped, is carried out wherein said side ledge (13a) of said trip coil (13) is associated with a said repositioning latch (2e) of said handle (2a,2a′), when said handle (2a,2a′) of said operating and tripping mechanism (2,2′) returns to the initial position after a trip and repositions said trip coil (13) for a new trigger, conducting said lever (13b), trigger support (13d) and actuator (13f) to an initial position capable of a new trip of said trip coil (13). The circuit breakers (1a,1b,1c,1d), including the reception of auxiliary trip devices which can be disarm devices like auxiliary trip coils of the subtension type or auxiliary remote trip coils have already been achieved or proposed. Another proposal included designing unipolar thermomagnetic switching modules (4,4′,4″,9,9′,9″) or unipolar electronic trip switching modules (10,10′,10″,11,11′,11″). A unipolar switching module (4,4′,4″,9,9′,9″,10′,10″,11,11′,11″) of this kind generally comprises a certain number of parts which are common to both kinds of unipolar switching modules. Other parts of the unipolar switching module are, however, specific for the unipolar switching module (4,4′,4″,9,9′,9″) and other different parts are specific for electronic trip unipolar switching module (10,10′,10″,11,11′,11″). Additionally, certain parts are common to both kinds of modules, such as for example preferably the rotary contact system (4q,9d,10d,11d) or said arc-extinguishing system (4u,9e,9f,10e,11e,11f) and their grids (4ua,9ea,9fa,10ea,11ea,11fa), and also a base case (3a), among others. The fact that a large number of parts are different in these two types of devices is a disadvantage as this leads to a relatively high manufacturing cost and with a set cost that is also relatively high. Another object achieved of the present invention is to propose a circuit breaker (1a,1b,1c,1d), being able to constitute a switching device containing unipolar thermomagnetic switching modules (4,4′,4″,9,9′,9″) or containing unipolar electronic trip switching modules (10,10′,10″,11,11′,11″) to which almost all the parts that constitute said circuit breaker (1a,1b,1c,1d) are identical for both, which may be constructed. It should obviously be understood that other modifications and variations made to this invention are considered to be within the scope of the present invention. | 32,710 |
11942300 | DETAILED DESCRIPTION A surface mount device cylindrical fuse is disclosed with a pre-molded shield. The pre-molded shield covers a portion of the cylindrical housing of the cylindrical fuse as well as some of its end caps (terminals). Flexible enough to snap over the cylindrical fuse, the pre-molded shield has a top flat surface to facilitate retrieval of the shielded cylindrical fuse during pick-and-place automation operations. The bottom portion of the pre-molded shield is also planar and limits rotation of the cylindrical fuse on a flat surface, which also facilitates pick-and-place automation. For the sake of convenience and clarity, terms such as “top”, “bottom”, “upper”, “lower”, “vertical”, “horizontal”, “lateral”, “transverse”, “radial”, “inner”, “outer”, “left”, and “right” may be used herein to describe the relative placement and orientation of the features and components, each with respect to the geometry and orientation of other features and components appearing in the perspective, exploded perspective, and cross-sectional views provided herein. Said terminology is not intended to be limiting and includes the words specifically mentioned, derivatives therein, and words of similar import. FIG.1is a representative drawing of a cylindrical fuse100, according to the prior art. The cylindrical fuse100is disposed on a flat surface102, such as a printed circuit board (PCB). The cylindrical fuse100includes a body104inside which a fusible element is disposed (not shown), and two end caps (terminals)106a-106b(collectively, “end caps106”). The body104is cylindrical, and thus can roll on the flat or even on a nearly flat surface102. Like the body104, the end caps106are cylindrical where they join the body, resulting in a longer cylindrical shape for the cylindrical fuse100. Also known as a round body fuse, the cylindrical fuse100is a type of surface mount device (SMD) in which the end caps106, as the terminals of the fuse, are soldered onto pads of a PCB. Because of the cylindrical shape, the cylindrical fuse100is capable of and likely to roll on an axis orthogonal to the body104. The cylindrical fuse100may rotate in a first direction108aor a second direction108b, as the two directions constitute an axis orthogonal to the body104of the cylindrical fuse. Put another way, the first direction108ais 180° from the second direction108b. The cylindrical fuse100may rotate more than 360°, that is, in at least a complete rotation around the body104in either direction108aor108b. Depending on the size of the flat surface102, the cylindrical fuse100may rotate multiple times. Left unattended, the cylindrical fuse100may rotate, in either direction108aor108b, eventually falling off the flat surface102. Automation is ubiquitous in PCB assembly, and fuses are no exception. One pick-and-place automation technique involves picking up and moving a component to a desired location on the PCB. Because cylindrical fuses tend to roll when placed on a flat surface, they are not suitable for these pick-and-place assembly operations because the machine expects the cylindrical fuses to remain in one location (not move) during retrieval. FIGS.2A-2Bare representative drawings of a fuse assembly consisting of a cylindrical fuse with a pre-molded shield200(hereinafter, “shielded cylindrical fuse200”), according to exemplary embodiments.FIG.2Ais an exploded perspective top view andFIG.2Bis an exploded perspective bottom view of the shielded cylindrical fuse200. The shielded cylindrical fuse200is made up of a cylindrical fuse202and a pre-molded shield212suitable for attaching to and substantially surrounding the cylindrical fuse. As before, the cylindrical fuse202includes a body204which is cylindrical and two end caps (terminals)206a-b(collectively, “end caps206”), with one end cap206abeing disposed at one end of the body204and the other end cap206being disposed at a second, opposite end of the body. The body204constitutes a housing of the fusible element (not shown) of the cylindrical fuse202. Like the cylindrical fuse100, the cylindrical fuse202is a SMD round body fuse in which the end caps206, as the terminals of the fuse, are soldered onto pads of a PCB. In exemplary embodiments, the pre-molded shield212consists of a body214, a flat portion216, and two cap covers218aand218b(collectively, “cap covers218”). The cap covers218are disposed on either end of the body214, with cap cover218abeing at a first end of the pre-molded shield212and also adjacent a first side of the body214, and the cap cover218bbeing adjacent a second, opposite side of the body214. In exemplary embodiments, the flat portion216is a portion of the pre-molded shield212that is planar. In exemplary embodiments, the flat portion216is equidistant a first edge and a second edge of the cylindrical body214. In some embodiments, the flat portion216does not occupy either of the cap covers218but is instead sandwiched between cap cover218aand218b. In exemplary embodiments, the cap covers218and the body214of the pre-molded shield212are all cylindrical in shape. In exemplary embodiments, the pre-molded shield212substantially surrounds and covers the cylindrical fuse202but does not completely surround and cover the cylindrical fuse. In exemplary embodiments, the pre-molded shield212surrounds and circumferentially covers more than half the cylindrical fuse202. In some embodiments, the pre-molded shield212circumferentially covers between 65% (234°) and 85% (306°) of the cylindrical fuse202. In a preferred embodiment, the pre-molded shield212circumferentially covers approximately 75% (270°) of the cylindrical fuse202. In addition to substantially covering the body204of the cylindrical fuse202, in exemplary embodiments, the pre-molded shield212also partially covers the end caps206of the cylindrical fuse. In exemplary embodiments, the cap covers218of the pre-molded shield212are sized to fit over the end cap portions208. In exemplary embodiments, the cap covers218of the pre-molded shield212have a slightly larger diameter than that of the body214. In exemplary embodiments, the pre-molded shield212further includes stop regions222a-d(collectively, “stop regions222”). The stop regions222are the portion of the pre-molded shield212that limit the rotational movement of the cylindrical fuse202on a flat surface once the pre-molded shield is placed over the cylindrical fuse. In exemplary embodiments, the flat portion216is located opposite the stop regions222and is equidistant therebetween. As used herein, the phrase, “limit rotation” is defined herein to mean that the cylindrical fuse202is prevented from rotating as it would be able to without the pre-molded shield212. In some embodiments, to limit rotation of the cylindrical fuse202means the cylindrical fuse cannot rotate more than 126° around its circumference, due to having a pre-molded shield212that surrounds 65% of the cylindrical fuse, which is equivalent to limiting its movement to no more than 63° in one direction. In some embodiments, to limit rotation of the cylindrical fuse202means the cylindrical fuse cannot rotate more than 90° around its circumference, due to having a pre-molded shield212that surrounds 75% of the cylindrical fuse, which is equivalent to limiting its movement to no more than 45° in one direction. In exemplary embodiments, to limit rotation of the cylindrical fuse202means the cylindrical fuse cannot rotate more than 54° around its circumference, due to having a pre-molded shield212that surrounds 85% of the cylindrical fuse, which is equivalent to limiting its movement to no more than 27° in one direction. In exemplary embodiments, the stop regions222are disposed on the two edges of each cap cover218. Since the pre-molded shield212does not fully surround the cylindrical fuse202, the body214and cap cover218each have two edges at opposite ends of the open cylindrical structure of the pre-molded shield. Thus, as illustrated inFIG.2B, stop region222ais disposed at first edge of cap cover218awhile stop region222bis disposed at a second edge of cap cover218a. Thus, stop region222ais on one side of the open cylindrical structure whereas stop region222bis at the second, opposite side of the open cylindrical structure, and both stop region222aand222bare part of the same cap cover218a. Stop region222cis disposed at a first edge of cap cover218bwhile stop region222dis disposed at a second edge of cap cover218b. Thus, stop region222cis on one side of the open cylindrical structure whereas stop region222dis at the second, opposite side of the open cylindrical structure, and both stop region222cand222dare part of the same cap cover218b. In exemplary embodiments, assembly of the cylindrical fuse202is completed before the pre-molded shield212is added thereon. Thus, the two end caps206are added to either side of the body204, which houses the fusible element. After the two end caps206are assembled, the pre-molded shield212is affixed to the cylindrical fuse202. In exemplary embodiments, the pre-molded shield212is somewhat flexible, and expands slightly at the open end (including the stop regions222) to enable the pre-molded shield to be pushed onto the cylindrical fuse202. Once the stop regions222are disposed more than halfway over the body204of the cylindrical fuse202, with the halfway point having the highest diameter, the pre-molded shield212conforms back to its original shape, thus forming a tight coupling to the cylindrical fuse, without need of adhesive. In exemplary embodiments, the pre-molded shield212is not thereafter removed from the cylindrical fuse202, as the shielded cylindrical fuse200functions as intended with the pre-molded shield thereon. FIG.3is a representative drawing of the pre-molded shield212to be attached to the cylindrical fuse202and forming the shielded cylindrical fuse200ofFIGS.2A-2B, according to exemplary embodiments. In the bottom perspective view, the stop regions222are clearly shown. The bottom of the pre-molded shield212form a second flat surface (besides the flat portion216), as indicated by a plane302(dashed lines). Body ends304aand304b(collectively, “body ends304”) are also in the plane302and are thus planar to the stop regions222. The body ends304may thus also be thought of as “stop regions”. As shown inFIGS.5A-5C, below, the stop regions222and body ends304in the plane302control the rotation of the shielded cylindrical fuse200on a flat surface. FIGS.4A-4Care representative drawings of the shielded cylindrical fuse200ofFIGS.2A-2B, according to exemplary embodiments.FIG.4Ais a top perspective view,FIG.4Bis a side view, andFIG.4Cis a bottom perspective view of the shielded cylindrical fuse200. InFIG.4A, the flat portion216of the pre-molded shield212has a height, h. The flat portion216simplifies the labeling of the shielded cylindrical fuse200, as labels print more easily on flat surfaces (as compared to cylindrical surfaces). The cylindrical shape of the cylindrical fuse100poses handling difficulties such as rolling and potential displacement during board mounting. In exemplary embodiments, in addition to providing a surface for marking, the flat portion216enables the pick-and-place device to grip the shielded cylindrical fuse200. In exemplary embodiments, the height, h, is selected to accommodate the characteristics of the pick-and-place machinery, where the height, h, is sufficient for the pick-and-place machinery to grab, grip, clasp, or otherwise retrieve the shielded cylindrical fuse200from a surface. The pre-molded shield212can also facilitate the marking of the cylindrical fuse202to facilitate pick-and-place applications. The pre-molded shield212thus enables the shielded cylindrical fuse200to be used in high-speed pick-and-place applications. As the name suggests, the pre-molded shield212is made as a unitary structure using a mold, including but not limited to injection molded plastic, thermoform, and so on. The cap covers218of the pre-molded shield212have a circumference that is slightly larger than that of the body214. In some embodiments, the body214of the pre-molded shield212has a diameter, d1, and the cap covers218have a diameter, d2, where d1<d2. Also, in exemplary embodiments, the diameter, d2, of the cap covers218is interference fit to the diameter, d1, of the body plus the height, h, of the flat portion216, as shown inFIG.4A, such that the flat portion216is disposed within the circumference of the cap covers218. Further, the body204of the cylindrical fuse202has a diameter that is interference fit to the diameter, d1and the end caps206have a diameter that is interference fit to the diameter, d2. As shown particularly inFIG.4C, the cap covers218of the pre-molded shield212cover a portion of the end caps206, in some embodiments. The size of the cap covers218may vary, depending on how much of the end caps206are to be covered. FIGS.5A-5Care representative drawings of the shielded cylindrical fuse200, according to exemplary embodiments. The side views of the cylindrical fuse200are shown in a first position (FIG.5A), a second position (FIG.5B), and a third position (FIG.5C). The plane302(thick dashed lines) fromFIG.3as well as a flat surface, s (thin dashed lines) are shown. The pre-molded shield212of the shielded cylindrical fuse200controls the amount of rotation on the flat surface, s, that will occur. In exemplary embodiments, with the pre-molded shield212, the cylindrical fuse202will not rotate 360°, as does the prior art cylindrical fuse100(FIG.1). In exemplary embodiments, the circumferential coverage of the pre-molded shield212on the cylindrical fuse202is adjustable, based on how much control over movement of the shielded cylindrical fuse200is desired. For example, assume that the shielded cylindrical fuse200inFIGS.5A-5Crolls x inches on the flat surface, s, and the pre-molded shield212covers 75% (270°) of the cylindrical fuse202. If the environment calls for the shielded cylindrical fuse200to roll y inches, where y<x, then the pre-molded shield212may be designed to cover 85% (306°) of the cylindrical fuse202. By having the stop regions222lower on the cylindrical fuse102, such as at locations502aand502binFIG.5A, the shielded cylindrical fuse200will rotate less, thus moving y inches. Or if the environment enables the shielded cylindrical fuse200to roll z inches, where z>x, then the pre-molded shield212may be designed to cover 65% (234°) of the cylindrical fuse202. By having the stop regions222higher on the cylindrical fuse102, such as at locations504aand504binFIG.5A, the shielded cylindrical fuse200will rotate more, thus moving z inches. FIGS.6and7are representative tables600and700showing results of empirical tests performed on the shielded cylindrical fuse200, according to exemplary embodiments. Since the pre-molded shield212is designed to be permanently coupled with the cylindrical fuse202, the tests were run to ensure that the cylindrical fuse202operates as designed. In Table600, the resistance and blow time were measured for ten fuses experiencing a 300% current overload, which is enough to cause the fuses to break. A maximum resistance of 11.415 ohms and a maximum blow time of 0.012 seconds were noted, which is well within the specification for the cylindrical fuse. In Table700, pre- and post-run resistances were measured so that a resistance shift could be measured. A maximum resistance shift of 2.96% was recorded, which is also within specification for the cylindrical fuse. The right side of Table700shows that the ten fuses were subjected to a life test in which 110% current was issued for four hours, where 110% is not enough to break the fuse. All fuses were able to survive the four-hour life test, with a maximum resistance shift of only 2.96%. The results of Tables600and700are consistent with measurements taken of similar cylindrical fuses without the pre-molded shield. FIG.8is a representative graph800of the tests performed on the shielded cylindrical fuse, according to exemplary embodiments. The graph800is a plot of the data in Table600, with the dots at the bottom showing the blow times for each fuse. Tables600and700and the graph800show that the cylindrical fuse is not negatively impacted from having the pre-molded shield thereon. FIG.9is a flow diagram900of a method of attaching the pre-molded212to a cylindrical fuse, such as the cylindrical fuse202ofFIGS.2A-2B, according to exemplary embodiments. Recall that the pre-molded shield212is made of a flexible material that bends at its end region, namely, where the stop regions222and body ends304are located. The pre-molded shield212is first positioned over the cylindrical fuse202so that the cap covers218are positioned over the end caps (terminals)206of the cylindrical fuse (block902). Stop regions222aand222b,222cand222d, and body ends304aand304bare a first distance from one another. The pre-molded shield212is next pushed over the cylindrical fuse202until the stop regions222and body ends304move away from one another (block902), due to the flexibility of the pre-molded shield212. More particularly, stop regions222aand222bmove apart from one another, similarly, stop regions222cand222dmove apart from one another, and body ends304aand304bmove apart from one another, until they are all a second distance from one another, the second distance being greater than the first distance. This is due to the fact that the stop regions222aand222b, stop regions222cand222d, and body ends304aand304b, when at the first distance from one another in their resting state, the first distance is smaller than the diameter of the cylindrical fuse202. The pre-molded shield212is further pushed so that respective opposing stop regions and body ends move back to their original position (block906). At this point, the stop regions222and body ends304are disposed more than halfway over the cylindrical fuse202, where the halfway point of the fuse is where the dimension of the fuse is greatest (its diameter). Because the dimension of the cylindrical fuse202gets smaller as the pre-molded shield212passes the halfway point, the opposing stop regions222and body ends304return to their original position. At this point, the pre-molded shield212is attached to the cylindrical fuse202. Lateral adjustments to the pre-molded shield212, now attached to the cylindrical fuse202, may be made, in some embodiments, to ensure that the cap covers218are disposed over respective end caps206of the cylindrical fuse (block908) and to ensure that the pre-molded shield is centered over the cylindrical fuse. Lateral adjustment is movement of the pre-molded shield212left or right along the axis of the cylindrical fuse202, as shown by the arrow, l, inFIG.4C. As used herein, an element or step recited in the singular and proceeded with the word “a” or “an” should be understood as not excluding plural elements or steps, unless such exclusion is explicitly recited. Furthermore, references to “one embodiment” of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features. While the present disclosure refers to certain embodiments, numerous modifications, alterations, and changes to the described embodiments are possible without departing from the sphere and scope of the present disclosure, as defined in the appended claim(s). Accordingly, it is intended that the present disclosure is not limited to the described embodiments, but that it has the full scope defined by the language of the following claims, and equivalents thereof. | 19,624 |
11942301 | Repeat use of reference characters throughout the present specification and appended drawings is intended to represent same or analogous features, elements, or steps of the presently disclosed subject matter. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As discussed in the Summary of the Subject Matter section, the presently disclosed subject matter is generally concerned with apparatus and methodologies generally relating to lawn mower security systems, and more particularly to providing the ability to safeguard ride-on style lawn mowers against unauthorized cranking of its engine if the mowers have push/pull mower deck or power-takeoff (PTO) switch technology. Selected combinations of aspects of the presently disclosed technology correspond to a plurality of different embodiments of the presently disclosed subject matter. It should be noted that each of the exemplary embodiments presented and discussed herein should not insinuate limitations of the presently disclosed subject matter. Features or steps illustrated or described as part of one embodiment may be used in combination with aspects of one or more other embodiments to yield yet further embodiments. Additionally, certain features may be interchanged with similar devices or features not expressly mentioned which perform the same or similar function or functions. Reference will now be made in detail to the presently preferred exemplary embodiments of the subject apparatus and associated and/or related methodology. FIGS.1A through1Cillustrate generally front perspective views of different prior art ride-on mowers generally10, but each of which have PTO or mower deck switches generally12. In present embodiments of presently disclosed subject matter, security system features may be practiced in combination with such switch12and its associated mower safety/control systems so as to externally safeguard such equipment from unauthorized operation and/or theft, all without any modifications to such existing features or the mowers themselves. In particular, mowers with such switches12generally have safety and/or interlock features which prevent the mower engine from being cranked while the mower blades or mower deck is engaged for operation. FIGS.2A and2Billustrate respective side elevation and top perspective views of isolated, enlarged illustrations of representative prior art mower deck or PTO switches12, such as provided in the prior art mowers10ofFIGS.1A through1C, and with which the presently disclosed subject matter may be practiced in combination so as to externally safeguard such equipment and/or mower from unauthorized operation and/or theft. As noted above, exemplary PTO or mower deck switch12has a control knob generally14. As shown inFIG.2A, knob14may assume (under operator control) a position which is relatively pulled up (as shown by dotted line image14′) in order to engage the associated mower features. Conversely, as will be understood by those of ordinary skill in the art, such knob14may be pushed down (by the operator) in order to disengage the mower features. Stated another way, switch12with its knob14interacts with overall safety or interlocking features of mower10to effectively prevent the ability to crank mower10whenever the mower deck switch12is positioned for engaging the mower. In other words, if the mower switch is positioned for engagement in the pulled up position illustrated by knob14′, mower10is prevented from being cranked, even by someone who has a key and is otherwise authorized to operate the mower10. Stated another way, knob14must be in the pushed down solid line position ofFIG.2Ain order for the mower to be able to be cranked. As also represented inFIGS.2A and2B, switch12is an electrical switch, with electrical contacts for interconnection with electrical circuits of mower10as part of the existing and known safety/interlock features referenced herein. FIG.3Aillustrates a generally side perspective view of an exemplary existing ride-on mower10having a mower deck or PTO switch (not seen), and shown in combination with a presently disclosed security device generally16combined in association with (mounted on) such switch.FIG.3Billustrates a generally enlarged perspective view of another exemplary existing ride-on mower10having a mower deck or PTO switch (not seen), and shown in combination with a presently disclosed security device generally16operatively combined in association with such switch. When security device16is mounted (locked into position) as illustrated inFIG.3B, the engine of mower10is prevented from being cranked because the switch enclosed by device16can not be pushed in to the required position for cranking. Instead, such enclosed switch is forced to remain in its pulled out position, which interlocks against cranking the engine. When switch14is pulled out (dotted line position14′ ofFIG.2A), the blades can be rotated by the engine (as represented by the curved arrow representation ofFIG.2B).FIG.3Billustrates a cylinder lock feature generally18(with an inserted associated key set) by which the device16is secured into the illustrated position. FIG.3Cshows an enlarged view of two major components generally20and22of the presently disclosed security device generally16as shown inFIGS.3A and3C, but separated from each other and from the mower deck or PTO switch12of an exemplary existing ride-on mower10. As otherwise disclosed herewith in conjunction with other Figures, the two components20and22when combined form an interior chamber for receiving knob14of switch12, but also blocking the ability to push in knob14. Also as otherwise disclosed, component22includes a protruding metal loop which is inserted into a receptacle portion of component20and then selectively engaged by a feature of associated cylinder lock18in order to secure components20and22together and in place surrounding control knob14or switch12. FIG.4Arepresents one exemplary step in presently disclosed methodology of applying and/or removing a presently disclosed security device16to the mower deck or PTO switch with knob14of an exemplary existing ride-on mower10, such as represented in subjectFIG.3A.FIG.4Brepresents another exemplary step in presently disclosed methodology of applying and/or removing a presently disclosed security device16to the mower deck or PTO switch with knob14of an exemplary existing ride-on mower10, such as represented in subjectFIG.3A. In particular, perFIG.4A, a component20of a presently disclosed device is partially received about a knob14, with the lower portion of a knob-receiving chamber situated between a lower side of the knob14and a portion of the mower, to prevent knob14from being pushed in to its engaged position. A cylinder lock18is represented as partially received into a receiving portion of component20.FIG.4Brepresents the second component22also being brought into position for surrounding knob14, but not yet positioned so that components20and22fully enclose the knob14. Since they are not fully positioned for closure, again cylinder lock18is shown only partially disposed into component20. WhileFIGS.4A and4Brepresent the consecutive application of first component20and then component22, those of ordinary skill in the art will understand from the completion disclosure herewith that such Figures equally represent the steps of removing components20and22from knob14, first with the components being separated from each other (FIG.4B) and then with one of the components (22) being removed entirely from the other (FIG.4A). FIGS.5A and5Billustrate in various perspective views a collection of elements which together provide a presently disclosed lawn mower security system for use with the mower deck or PTO switch of an exemplary existing ride-on mower, such as represented in subjectFIG.3A. In particular, each ofFIGS.5A and5Billustrate in various positions the matable components20and22as well as the cylinder lock feature generally18, all as otherwise described herein. In general,FIG.5Aillustrates a generally side perspective view of component20, including representation of a lower curved lip or region generally24against which knob14may in part be trapped to secure it from moving into its pushed in position. Matable component22is shown in a generally side perspective view, and illustrating a metal loop member generally26protruding therefrom, for interaction with component20. FIG.5Balso shows generally side perspective views for each of components20and22, but generally showing the sides thereof respectively opposite those as seen inFIG.5A. Accordingly, while metal loop member generally26is again seen, a curved lower lip or region generally28of component22is also shown. Such curved region28of component22operates generally in a complementary position opposite curved region24of component20whenever such matable components20and22are brought together, in order to help capture knob14. A cylindrical opening generally30is formed by component20on such opposite side thereof, for receiving correspondingly sized cylindrical lock feature18. Such lock18includes an actuator component generally32as otherwise discussed herein, as well as an associated key set34. As further discussed herein in conjunction with other present Figures, a set screw generally36or similar may be used for securing cylindrical lock18into component20. That means that cylindrical lock18can be readily replaced by an authorized user, for changing out the keys, or for other reasons. However, the seated location of such set screw is concealed from external access whenever components20and22are mated and joined together for protecting against unauthorized operation of an enclosed knob14. FIG.6Aillustrates an exemplary cylinder lock18and key set34which may be practiced in some embodiments of a combination with presently disclosed subject matter.FIG.6Billustrates an enlarged side view of the exemplary cylinder lock18of presentFIG.6A, with an actuator element32thereof in an extended position.FIG.6Cis an end view of the exemplary cylinder lock18of presentFIG.6B, looking into the actuator32end thereof. It will be understood by those of ordinary skill in the art that cylindrical lock18also includes another retractable element portion38which actually receives one of the members of the key set34. Operation of the key set34within retractable element38allows such retractable portion to be seated generally flush with, or close to flush with, an edge surface generally40of lock18, to in turn cause actuator element32to be extended, into the respective positions of elements32and38as represented by presentFIG.6B. In such positions, the extended actuator element32may engage an opening in metal loop26of component22, for securing components20and22together, as otherwise understood from the complete disclosure herewith. FIG.7Aillustrates one external side view of two main security components20and22separated from each other, but with a partially installed cylinder lock feature18, all in accordance with presently disclosed subject matter. Components20and22are positioned opposite to each other as needed in order to mate them with metal loop feature26entering into component20to be secured by an extendable actuator portion of lock18.FIG.7Billustrates another side view of the exemplary subject matter of presentFIG.7Abut combined together, including installation of the associated cylinder lock feature18, and with one member of an associated key set34seated therein. For ease of illustration, a knob14is not illustrated in the combined security device features illustrated inFIG.7B. As shown inFIG.7A, components20and22respectively include enlarged regions generally42and44. When components20and22are operatively mated together, such enlarged regions42and44are situated opposite one another, to form a composite enlarged region for receiving a knob14, as otherwise discussed herein. FIGS.8A through8Eillustrate respective perspective and side views of one exemplary main component generally22of a presently disclosed security device, and intended to be joined to another main component20thereof, at least in part through interaction of a protruding metal loop26of such one main component22variously represented in suchFIGS.8A through8E. In particular, such metal loop26includes an opening46defined by the extended portion of member26. Such opening46is sized for being a close fit with the diameter of actuator32of lock18. In other words, with actuator32received into opening46, the components20and22are mateably but removably (with a key) secured together. The concave side of convex enlarged feature44of component22forms a cavity generally48which cooperates with a portion of component20for receiving an associated knob14, as otherwise discussed herein. A terminal side of such cavity48with curved region28forms a wall or edge50which serves as a stop against knob14being depressed or pushed in into a disengaged position thereof. FIGS.9A through9Fillustrate respective perspective and side views of another exemplary main component20of a presently disclosed security device, intended to be joined to the exemplary main component22ofFIGS.8A through8E, and interacting with an exemplary cylinder lock18as otherwise disclosed herein, with such interaction further represented in subjectFIGS.9A,9B, and9F. Such lock18feature is not present in the illustrations ofFIGS.9C,9D, and9E. In particular, opening30of component20is an elongated cylindrical opening designed to accommodate cylinder lock18. Interior opening generally52within component20is designed to accommodate protruding metal loop feature26of component22. As represented byFIG.9B, the extendable actuator32of lock18may be extended in order to engage loop26within opening52, to secure components20and22together. A smaller preferably threaded opening54may be provided in the interior of component20, to receive a set screw generally36therein, by which the seated body of a lock18may be secured within elongated opening30of component20. Such interior position means that it is concealed from external access, once the two components20and22are mated and locked together. An enlarged interior chamber or region generally56is formed, generally opposite the external enlarged region42of component20. When components20and22are joined, such region56cooperates with region48of component22in order to form an interior chamber for receiving and entrapping knob14. Similar to the stop wall50of such region48, region56has a stop wall58formed to interact with associated knob14to restrict its travel, and to prevent knob14from being pushed in to a disengaged position. So, together, stop walls50and58help to prevent an associated mower engine from being started. FIGS.10A through10Dillustrate various further perspective and side views of the exemplary component20subject matter of presentFIGS.9A through9Fbut in isolation and with no interaction with an exemplary cylinder lock18. In particular,FIG.10Crepresents that an additional channel60is formed passing from interior region56of component20. The diameter of such channel60is much smaller than that of region56, with the difference between the two helping to define the stop wall58which otherwise surrounds channel60. As otherwise understood from the complete disclosure herewith, knob14has a reduced diameter portion generally62(seeFIG.2A) which interconnects the knob14together with the remainder of switch12. Channel60provides a passage for such knob14, when cooperating with the a similar, corresponding feature formed in component22. FIGS.11A through11Dillustrate various perspective and side views, representing in isolation the two main components20and22ofFIGS.8A through8E and9A through9Fjoined together with an associated, interacting exemplary cylinder lock12, to collectively comprise a presently disclosed security device generally16, but not as mounted on a mower deck or PTO switch of an exemplary existing ride-on mower. Particularly as represented inFIG.11A, a channel generally64is formed in component22, for operative association with channel60of component20, for passage therethrough of reduced diameter portion62below knob14. Otherwise,FIGS.11A and11Bin particular illustrate various relatively smooth seams66formed by joined, mated components20and22. In such way, presently disclosed security device16presents an object which is difficult to pry open or remove, whenever properly seated on a knob14. Such security device may be formed of a variety of security materials, but generally relatively heavier-gauge metals are preferred. Such tough metal construction means that the security device16when properly applied disables the mower operation by locking out access to the PTO switch, which is otherwise forcibly placed into an engaged position, which prevents the mower engine from being cranked. Advantageously, the presently disclosed security device makes use of the mower's existing safety, interlock features, but without having to modify any portion of the mower. Furthermore, the mower once again operates completely normally once the security device is removed. As will be understood from the complete disclosure herewith, once a selected cylinder lock18is seated into a component20and secured by a set screw36or similar element, the two components20and22may be seated around an associated PTO or mower deck switch knob14and mated together, with actuator32of the lock18secured into opening46of the loop26of component22. With Through proper sizing of the components and their respective features, such combination causes knob14to be captured in its engaged position (knob pulled up or out), which otherwise forces the mower safety interlock to prevent mower engine operation. Such physical features may be simply reversed by using the lock key set34to withdraw the actuator32from the opening46of loop26, so that components20and22may be separated. As desired, security device16may then be reapplied once the mower is finished being operated. Those of ordinary skill in the art will understand from the complete disclosure herewith the various aspects of corresponding and/or associated methodology, both with providing and installing the presently disclosed subject matter, and with its use in practice. Throughout, repeat use of the same reference numbers as in other figures is intended to represent similar or same features or steps, with pertinent discussion applicable thereto. Also, the exemplary illustrations are intended as representative only, and variations in such arrangements, and uses of different materials or sizes of particular elements, while maintaining an effective controlled security system, are intended to come with the spirit and scope of the present disclosure. The presently disclosed subject matter is also intended to encompass variations such as reversal of parts or mere changes as needed in sizes of components for various installations. While the presently disclosed subject matter has been described in detail with respect to specific embodiments thereof, it will be appreciated that those skilled in the art, upon attaining an understanding of the foregoing, may readily produce alterations to, variations of, and/or equivalents to such embodiments. Accordingly, the scope of the present disclosure is by way of example rather than by way of limitation, and the subject disclosure does not preclude inclusion of such modifications, variations, and/or additions to the presently disclosed subject matter as would be readily apparent to one of ordinary skill in the art. | 19,576 |
11942302 | DETAILED DESCRIPTION Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the invention. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the invention as recited in the appended claims. For example, although some embodiments are described in the context of utilizing charged-particle beams, the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photo detection, x-ray detection, etc. The enhanced computing power of electronic devices, while reducing the physical size of the devices, can be accomplished by significantly increasing the packing density of circuit components such as, transistors, capacitors, diodes, etc. on an IC chip. For example, in a smart phone, an IC chip (which is the size of a thumbnail) may include over 2 billion transistors, the size of each transistor being less than 1/1000th of a human hair. Not surprisingly, semiconductor IC manufacturing is a complex process, with hundreds of individual steps. Errors in even one step have the potential to dramatically affect the functioning of the final product. Even one “killer defect” can cause device failure. The goal of the manufacturing process is to improve the overall yield of the process. For example, for a 50-step process to get 75% yield, each individual step must have a yield greater than 99.4%, and if the individual step yield is 95%, the overall process yield drops to 7%. As the geometries shrink and the IC chip industry migrates to three-dimensional (3D) architectures (such as, NAND gates, Fin field-effect transistors (FinFETs), and advanced dynamic random-access memory (DRAM)), finding defects is becoming more challenging and expensive at each lower node. While high process yield is desirable in an IC chip manufacturing facility, it is also essential to maintain a high wafer throughput, defined as the number of wafers processed per hour. High process yields, and high wafer throughput can be impacted by the presence of defects, especially when operator intervention is involved. Thus, detection and identification of micro and nano-sized defects by inspection tools (such as, a SEM) may be essential for maintaining high yields, high throughput, and low cost. Semiconductor chips are fabricated in an extremely clean and controlled environment that has a very low level of pollutants such as dust, airborne particles, aerosol particles, and chemical vapors. More specifically, a semiconductor cleanroom is required to have a controlled level of contamination that is specified by the number of particles per cubic foot at a specified particle size. A typical chip manufacturing cleanroom contains 1-10 particles per cubic foot of air, each particle being less than 5 um in diameter. For comparison, the ambient air outside in a typical city environment contains approximately 1.25 billion particles per cubic foot, each particle having an average size of ˜200 um in diameter. A speck of dust as small as 1 um, on a wafer in process may span across thousands of transistors located on the chip, which could potentially render the entire chip useless. In some cases, a speck of dust on a reticle or a photomask that is used to create repeating patterns on the wafer may cause recurring physical or electrical defects. For example, one or more metal wires connecting transistors in a single chip may overlap or may be undesirably connected through the dust particle, causing a short in the circuit throughout the entire chip. Identifying and characterizing each defect or defect type while maintaining high throughput may improve process yield and product reliability. One component of improving yield is monitoring the chip making process to ensure that it is producing a sufficient number of functional integrated circuits. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection can be carried out using a scanning electron microscope (SEM). A SEM can be used to image these extremely small structures, in effect, taking a “picture” of the structures of the wafer. The image can be used to determine if the structure was formed properly and also if it was formed in the proper location. If the structure is defective, then the process can be adjusted so the defect is less likely to recur. The working principle of the SEM is similar to a camera. The camera takes a picture by receiving and recording brightness and colors of light reflected or emitted from people or objects. The SEM takes a “picture” by receiving and recording energies of electrons reflected or emitted from the structures. Before taking such a “picture,” an electron beam may be provided onto the structures, and when the electrons are reflected or emitted (“exiting”) from the structures, a detector of the SEM may receive and record the energies of those electrons to generate an image. To take such a “picture,” some SEMs use a single electron beam (referred to as a “single-beam SEM”), while some SEMs use multiple electron beams (referred to as a “multi-beam SEM”) to take multiple “pictures” of the wafer. By using multiple electron beams, the SEM may provide more electron beams onto the structures for obtaining these multiple “pictures,” resulting in more electrons exiting from the structures. Accordingly, the detector may receive more exiting electrons simultaneously, and generate the image of the structures with a higher efficiency and a faster speed. Although a multiple charged-particle beam imaging system, such as a multi-beam SEM, may be useful in detecting micro and nano-sized defects while maintaining the high throughput; the overall impact on efficiency of beam usage, structural complexity of the system, and productivity cannot be overlooked. For example, splitting an electron beam to form multiple beamlets using micro-electromechanical systems (MEMS) aperture arrays may result in an inefficient usage of beam electrons because only a portion of the electrons may be allowed to pass through the apertures, while the remaining electrons are blocked off and unutilized. Generating multiple probe spots from multiple electron beams may require additional lenses and components, adding to the structural and operational complexity of the multi-beam apparatus. In particular, the additional lenses may have to be aligned with the system and noise-shielded as well. In addition, maintaining the beam quality for each of the individual beams or beamlets, expressed at least by high peak current, small beam cross-section, and a low beam energy spread within the beam may be challenging. A routine defect detection and identification operation during wafer inspection using SEM may require dynamic adjustment of magnification and resolution. For example, a low-resolution scan may be performed to locate a defect, and a high-resolution scan may then be performed to identify or characterize the located defect. Such an operation requires manually adjusting scan parameters such as, for example, magnification, focus, field-of-view, beam energy, among other things. Besides manual interference from a skilled operator, the operation may be time consuming and susceptible to judgment error, adversely affecting the throughput and inspection yield. The charged-particle beam imaging system (e.g., a single-beam SEM or a multi-beam SEM) may use a continuous or pulsed electron beam for scanning. A continuous beam is a continuous stream of electrons, similar to a water stream coming out of a hose. For multi-beam imaging systems that may generate a plurality of beamlets, continuous beamlets are continuous streamlets of electrons, similar to the many water streamlets coming out of a shower head. In contrast, a pulsed beam includes electrons clustered into bunches or pulses, with no electron between each pulse, similar to bullets out of a machine gun. For multi-beam imaging systems that may generate a plurality of beamlets, pulsed beamlets include, in each beamlet, electrons clustered into pulses, similar to bullets coming out of multiple machine guns arrange as an array and all firing at the same time. The charged-particle beam imaging system may use a pulsed charged-particle source to generate a pulsed beam. In one aspect of the present disclosure, a multi-beam apparatus including a deflector, a detector, and a controller may be used to form multiple charged-particle beams for observing a sample. A high frequency pulsed charged-particle source may generate multiple charged-particle pulses that may be clustered to form bunches, also referred to herein as beams of charged-particle pulses. A deflector may be configured to receive and deflect the beams of high frequency charged-particle pulses and each of the deflected beams may form a probing spot on the sample. Upon interacting with the sample, each charged-particle beam may generate a signal comprising information related with the sample. A detector may be configured to detect the signals generated from the multiple probe spots. The multi-beam apparatus may comprise a controller configured to obtain timing information related with the formation of the deflected charged-particle beams and detection of the signal generated by the corresponding beam. The controller may then associate the detected signal with the deflected charged-particle beam based on the obtained timing information. Some of the advantages of some embodiments of the claimed multi-beam apparatus include, but are not limited to, efficient beam usage, higher productivity, fast switching between low-resolution and high-resolution inspection, high beam quality, high wafer processing and inspection throughput. In addition, by forming the beams of charged-particle pulses, the number of the beamlets in a unit area may be increased without incurring significant Coulomb effect (explained below) because the pulses of different charged-particle beams may be staggered, thus allowing more efficient utilization of the high frequency pulsed charged-particle source. The Coulomb effect is an electric interaction between charged particles. In the electric interaction, particles with like charges repel each other, while particles with opposite charges attract each other. In a multi-beam apparatus, the Coulomb effect may occur between beamlets of charged particles. For example, when the beamlets are electron beams, electrons in the beamlets may repel each other when they are too close, thus affecting the travel speeds and directions of each other. That may cause deterioration of the performance of the multi-beam apparatus. Typically, in a multi-beam apparatus, beamlets may be converged to cross each other and form a common crossover (or “crossover area”) before reaching the sample. As demands for imaging throughput increases, the multi-beam apparatus may generate and use more beamlets for scanning. As the number of beamlets increase, more beamlets may cross the common crossover, and the Coulomb effect may become more significant. In a multi-beam apparatus capable of providing a large number of beamlets, the Coulomb effect may become a dominant factor that limits the imaging resolution. When the required energy of the beamlets is fixed, it is extremely challenging to control the Coulomb effect. In another aspect of the present disclosure, a multi-beam apparatus including multiple cluster generators may be used for reducing the Coulomb effect. The cluster generators may be used to generate clusters of charged particles, such as by compressing the pulsed beamlets using cavities having electric fields along the moving direction of the beamlets. Each cluster generator may receive and cluster a beamlet. The cluster generators may be coordinated to release or eject the generated clusters in a predetermined time-space order, such that the clusters of different beamlets may enter the common crossover in sequence (e.g., one by one, with only one or zero cluster being in the common crossover at any point in time), as shown inFIG.8B. That is, at a given time, there is at most one cluster passing through the common crossover. Such an arrangement may reduce the possibilities of incurring the Coulomb effect and reduce the strength of the Coulomb effect. In an ideal scenario, the strength of the Coulomb effect in a multi-beam apparatus may be reduced to the level of a single-beam apparatus. In addition, such an arrangement may accommodate more beams (e.g., generated from more charged-particle sources) in the multi-beam apparatus, thus significantly increasing the imaging throughput. Moreover, as more beams are added to pursue faster inspection speeds and better inspection image quality, more challenges may arise. Typically, a single charged-particle source is used for generating charged particles (e.g., electrons), and an array of apertures is used for generating the beams of charged particles. The charged-particle source generates charged particles that are accelerated and shed onto the array of apertures, and the array of apertures may split them into beams. However, several problems would occur if this existing design is used to generate a higher number of beams. Due to the limited capability of the single charged-particle source, the current of the emission of the charged-particles may have an upper limit, which may limit the brightness of the generated inspection image of each beam. To accommodate the increasing demand of high throughputs of the multi-beam apparatus, more beams are needed. And to generate more beams, the number of the apertures may have to be increased. In that case, more electric connections are needed for those apertures, and electric routing for those apertures becomes significantly more complex. Also, the apertures typically work under high voltages (e.g., 100 V). Because more connections are confined within a limited space, a risk of electric breakdowns between electric connections of the electric routing may greatly increase. Further, as the distances between the apertures shrink, the distance between the generated beams also shrink, which may cause more significant Coulomb effect between the beams. In another aspect of the present disclosure, a multi-beam apparatus including multiple charged-particle sources (e.g., electron sources), and multiple deflectors may be used for providing multiple charged-particle beams. The charged-particle sources may produce beams of charged particles, and the deflectors may receive, deflect and release them as parallel beams. The deflectors may deflect the received beams in a manner such that the released beams may be more concentrated (e.g., distances between the beams are shortened) yet remain parallel. Because the deflectors may concentrate beams, the charged-particle sources may be spaced more distantly, reducing the complexity of the electric routing and risk of electric breakdowns. No aperture plate is used for producing the beams, further reducing the complexity of the electric routing and risk of electric breakdowns. In such a way, the beams of clusters may be deflected by the deflectors to become more condensed to enable a high and scalable brightness and a uniform current. The multiple deflectors may create a scalable approach to mitigate the Coulomb effect. In some cases, the deflectors may also cluster the beams and release them such that the clusters pass through the crossover area in sequence (e.g., one by one). In such a way, the Coulomb effect may be mitigated because there is at most one cluster passing through the crossover area. Moreover, in a multi-beam apparatus, more challenges may result from a “cross-talk” problem, in which charged-particles of one beamlet may reach a destination corresponding to another beamlet, as explained below. In a multi-beam apparatus, multiple beamlets may be incident onto an inspected sample, each beamlet forming a spot with a sized cross section (or “spot size”). The beamlets interact with materials of the sample within a region with a depth (referred to as “interaction volume”). An interaction volume of a beamlet may be larger than a spot size of the beamlet. That is, the interaction volumes of the beamlets may overlap. Exiting electrons corresponding to a beamlet may exit from anywhere in the corresponding interaction volume. Due to the overlap between the interaction volumes, the exiting charged-particle beams may have overlaps. Typically, the detector detecting the exiting charged-particle beams may include multiple detection elements (e.g., sub-detectors). Typically, each detection element may detect secondary electrons generated based on a particular beamlet. Because the exiting charged-particle beams may have overlaps, charged-particles of one exiting beam may reach a detection element corresponding to another beamlet, hence incurring the cross-talk problem. This is only one example as to how crosstalk may occur, and crosstalk may occur in several other ways. To accommodate the increasing high throughput demand of the multi-beam apparatus, more beamlets are needed. However, as the number of beamlets increase, the number of corresponding detection elements may also increase, which may cause not only increasing complexity and cost of building the detector system, but also a more significant cross-talk problem. In another aspect of the present disclosure, a multi-beam apparatus including a first deflector, a second deflector, multiple detectors, and a controller may be used for charged-particle detection. The first deflector may be used for forming a first number of beams of charged-particle pulses. Because the charged-particle pulses are deflected by the first deflector at different times, the pulses of the formed charged-particle beams may reach the inspected sample at different times. Charged-particle beams may exit from the probing spots, which may be deflected by the second deflector to form a second number of exiting charged-particle beams. If the detector can differentiate fine temporal details, the detector may then differentiate which pulse comes from which probing spot based on the times of the pulses of the exiting charged-particle beams arriving at the detector, the times of the pulses entering the second deflector, and the times of the pulses entering the first deflector. By doing so, the needed detection elements may be reduced, the complexity and cost of building the detector may be lowered, and the cross-talk problem may be alleviated. Essentially, this approach converts a spatial problem into a temporal problem. Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings, the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described. As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a database may include A or B, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. While this disclosure uses electrons to describe some embodiments and examples, it is to be understood that any description related to the electrons may be equivalently applicable to any type of charged particles (e.g., ions, protons, subatomic particles, or the like). FIG.1illustrates an exemplary electron beam inspection (EBI) system1consistent with embodiments of the present disclosure. EBI system1may be used for imaging. As shown inFIG.1, EBI system1includes a main chamber10, a load/lock chamber20, an electron beam tool100, and an equipment front end module (EFEM)30. Electron beam tool100is located within main chamber10. EFEM30includes a first loading port30aand a second loading port30b. EFEM30may include additional loading port(s). First loading port30aand second loading port30breceive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples may be used interchangeably). A “lot” is a plurality of wafers that may be loaded for processing as a batch. One or more robotic arms (not shown) in EFEM30may transport the wafers to load/lock chamber20. Load/lock chamber20is connected to a load/lock vacuum pump system (not shown), which removes gas molecules in load/lock chamber20to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load/lock chamber20to main chamber10. Main chamber10is connected to a main chamber vacuum pump system (not shown), which removes gas molecules in main chamber10to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by electron beam tool100. Electron beam tool100may be a single-beam system or a multi-beam system. While the present disclosure provides examples of main chamber10housing an electron beam inspection system, it should be noted that aspects of the disclosure in their broadest sense, are not limited to a chamber housing an electron beam inspection system. Rather, it is appreciated that the foregoing principles may be applied to other chambers as well. Reference is now made toFIG.2, which is a schematic diagram illustrating an exemplary electron beam tool100including a multi-beam inspection tool that is part of the EBI system1ofFIG.1, consistent with embodiments of the present disclosure. Multi-beam electron beam tool100(also referred to herein as apparatus100) comprises an electron source101, a gun aperture plate171with a gun aperture103, a condenser lens110, a source conversion unit120, a primary projection system130, a motorized stage109, and a sample holder107supported by motorized stage109to hold a sample190(e.g., a wafer or a photomask) to be inspected. Multi-beam electron beam tool100may further comprise a secondary projection system150and an electron detection device140. Primary projection system130may comprise an objective lens131. Electron detection device140may comprise a plurality of detection elements140_1,140_2, and140_3. A beam separator160and a deflection scanning unit132may be positioned inside primary projection system130. Electron source101, gun aperture plate171, condenser lens110, source conversion unit120, beam separator160, deflection scanning unit132, and primary projection system130may be aligned with a primary optical axis100_1of apparatus100. Secondary projection system150and electron detection device140may be aligned with a secondary optical axis150_1of apparatus100. Electron source101may comprise a cathode (not shown) and an extractor or anode (not shown), in which, during operation, electron source101is configured to emit primary electrons from the cathode and the primary electrons are extracted or accelerated by the extractor or the anode to form a primary electron beam102that forms a primary beam crossover (virtual or real)101s. Primary electron beam102may be visualized as being emitted from primary beam crossover101s. Source conversion unit120may comprise an image-forming element array (not shown), an aberration compensator array (not shown), a beam-limit aperture array (not shown), and a pre-bending micro-deflector array (not shown). In some embodiments, the pre-bending micro-deflector array deflects a plurality of primary beamlets102_1,102_2,102_3of primary electron beam102to normally enter the beam-limit aperture array, the image-forming element array, and an aberration compensator array. In some embodiment, condenser lens110is designed to focus primary electron beam102to become a parallel beam and be normally incident onto source conversion unit120. The image-forming element array may comprise a plurality of micro-deflectors or micro-lenses to influence the plurality of primary beamlets102_1,102_2,1023of primary electron beam102and to form a plurality of parallel images (virtual or real) of primary beam crossover101s, one for each of the primary beamlets102_1,102_2, and102_3. In some embodiments, the aberration compensator array may comprise a field curvature compensator array (not shown) and an astigmatism compensator array (not shown). The field curvature compensator array may comprise a plurality of micro-lenses to compensate field curvature aberrations of the primary beamlets102_1,102_2, and102_3. The astigmatism compensator array may comprise a plurality of micro-stigmators to compensate astigmatism aberrations of the primary beamlets1021,102_2, and102_3. The beam-limit aperture array may be configured to limit diameters of individual primary beamlets1021,102_2, and102_3.FIG.2shows three primary beamlets1021,102_2, and102_3as an example, and it is appreciated that source conversion unit120may be configured to form any number of primary beamlets. Condenser lens110is configured to focus primary electron beam102. Condenser lens110may further be configured to adjust electric currents of primary beamlets102_1,102_2, and102_3downstream from source conversion unit120by varying the focusing power of condenser lens110. Alternatively, the electric currents may be changed by altering the radial sizes of beam-limit apertures within the beam-limit aperture array corresponding to the individual primary beamlets. The electric currents may be changed by both altering the radial sizes of beam-limit apertures and the focusing power of condenser lens110. Condenser lens110may be an adjustable condenser lens that may be configured so that the position of its first principle plane is adjustable. The adjustable condenser lens may be configured to be magnetic, which may result in off-axis beamlets102_2and102_3illuminating source conversion unit120with rotation angles. The rotation angles change with the focusing power or the position of the first principal plane of the adjustable condenser lens. Condenser lens110may be an anti-rotation condenser lens that may be configured to keep the rotation angles unchanged while the focusing power of condenser lens110is changed. In some embodiments, condenser lens110may be an adjustable anti-rotation condenser lens, in which the rotation angles do not change when a focusing power and a position of a first principal plane of condenser lens110are varied. Objective lens131may be configured to focus beamlets1021,102_2, and102_3onto a sample190for inspection and may form, in the current embodiments, three probe spots102_1s,102_2s, and102_3son the surface of sample190. Gun aperture plate171, in operation, is configured to block off peripheral electrons of primary electron beam102to reduce Coulomb effect. The Coulomb effect may enlarge the size of each of probe spots102_1s,102_2s, and102_3sof primary beamlets102_1,102_2,102_3, and therefore deteriorate inspection resolution. Beam separator160may, for example, be a Wien filter comprising an electrostatic deflector generating an electrostatic dipole field and a magnetic dipole field (not shown inFIG.2). In operation, beam separator160may be configured to exert an electrostatic force by electrostatic dipole field on individual electrons of primary beamlets102_1,102_2, and102_3. The electrostatic force is equal in magnitude but opposite in direction to the magnetic force exerted by magnetic dipole field of beam separator160on the individual electrons. Primary beamlets102_1,102_2, and102_3may therefore pass at least substantially straight through beam separator160with at least substantially zero deflection angles. Deflection scanning unit132, in operation, is configured to deflect primary beamlets102_1,102_2, and102_3to scan probe spots102_1s,102_2s, and102_3sacross individual scanning areas in a section of the surface of sample190. In response to incidence of primary beamlets102_1,102_2, and102_3on probe spots102_1s,102_2s, and102_3son sample190, electrons emerge from sample190and generate three secondary electron beams102_1se,102_2se, and102_3se. Each of secondary electron beams102_1se,102_2se, and102_3setypically comprise secondary electrons (having electron energy≤50 eV) and backscattered electrons (having electron energy between 50 eV and the landing energy of primary beamlets102_1,102_2, and102_3). Beam separator160is configured to deflect secondary electron beams102_1se,102_2se, and102_3setowards secondary projection system150. Secondary projection system150subsequently focuses secondary electron beams102_1se,102_2se, and102_3seonto detection elements140_1,140_2, and140_3of electron detection device140. Detection elements140_1,140_2, and140_3are arranged to detect corresponding secondary electron beams102_1se,102_2se, and102_3seand generate corresponding signals which are sent to a controller or a signal processing system (not shown), e.g., to construct images of the corresponding scanned areas of sample190. In some embodiments, detection elements140_1,140_2, and140_3detect corresponding secondary electron beams102_1se,102_2se, and102_3se, respectively, and generate corresponding intensity signal outputs (not shown) to an image processing system (not shown). In some embodiments, each of detection elements140_1,140_2, and140_3may comprise one or more pixels. The intensity signal output of a detection element may be a sum of signals generated by all the pixels within the detection element. AlthoughFIG.2shows that apparatus100uses three primary electron beams, it is appreciated that apparatus100may use two or more number of primary electron beams. The present disclosure does not limit the number of primary electron beams used in apparatus100. Reference is now made toFIG.3, which illustrates a multi-beam apparatus300for observing a sample using a timing control mechanism, consistent with embodiments of the present disclosure. In some embodiments, the multi-beam apparatus300may be electron beam tool100as shown inFIG.2. As shown inFIG.3, multi-beam apparatus300may comprise a primary electron source301, deflected electron beams305_1and305_2, an acceleration cavity310, a bunching cavity320, a deflection cavity330, a condenser lens340, a detector350, a primary projection system360, a beam raster system370, a controller380, and a sample390. As illustrated inFIG.3, primary electron source301, acceleration cavity310, bunching cavity320, deflection cavity330, condenser lens340, primary projection system360, beam raster system370, and sample390may be aligned with a primary optical axis302of multi-beam apparatus300. Primary electron source301may be a continuous electron source or a pulsed electron source. In some embodiments, primary electron source301of multi-beam apparatus300may be electron source101of electron beam tool100, which may be used to generate a continuous electron beam. In some embodiments, primary electron source301may be a pulsed electron source, which may be used to generate a pulsed electron beam. Primary electron source301can generate charged particle pulses in any of several ways. In some embodiments, primary electron source301may be a laser induced pulsed source, such as one that uses a pulsed laser to excite electrons in an emitter and resultantly generate electron pulses. In some embodiments, primary electron source301may be a voltage controlled pulsed source, such as one that uses a pulsed voltage to excite electrons and generate electron pulses. In some embodiments, primary electron source301may comprise a superconducting radio-frequency (SCRF) photoinjector, a normal conducting radio-frequency (NCRF) photoinjector, or a high voltage direct current photoemission gun (e.g., electron source101inFIG.2) followed by an RF accelerating module photoinjector. Further, primary electron source301may be any combination of the above discussed components. In some embodiments, a photoinjector may include a photocathode, an electron gun powered by radio-frequency (RF) or biased at a high voltage, a laser and optical system producing a desired pulse structure, an RF source, and a timing and synchronization system. High quantum efficiency photocathodes may be useful for the operation of photoinjector driven electron accelerators with high average current and high brightness beams. In some embodiments, the photocathodes for conventional NCRF photoinjectors may comprise metallic photocathodes such as copper (Cu), lead (Pb), or magnesium (Mg). The NCRF photoinjectors may comprise a low duty factor gun (0.1%), or a high duty factor gun (25%). The photocathodes for SCRF photoinjectors may comprise semiconductor photocathodes made of alkali antimonides, bi-alkali antimonides, multi-alkali antimonides, gallium arsenide (GaAs), gallium nitride (GaN), cesium iodide (CsI), cesium telluride (Cs2Te), CsK2Sb, Na2KSb, Cs3Sb, or the like. In some embodiments, the source frequency, defined herein as the frequency of the RF signal applied to the photoinjector to generate electron pulses may be in the range of 100 MHz to 10 GHz. It is to be appreciated that source frequency may be 1.3 GHz or 3 GHz. In some embodiments, primary electron source301may be a pulsed electron source, and acceleration cavity310may receive charged-particle pulses generated by primary electron source301and accelerate them to eject a pulsed primary electron beam. In some embodiments, primary electron source301may be a continuous electron source, and acceleration cavity310may receive a charged-particle stream generated by primary electron source301and accelerate them to eject a continuous primary electron beam. For example, acceleration cavity310may comprise a linear particle accelerator configured to accelerate charged particles of the received electrons (e.g., electron pulses or a continuous electron stream) to a high speed by subjecting them to a series of oscillating electric potentials along a linear beamline. In a linear accelerator such as acceleration cavity310, electrons may be accelerated by the action of RF electromagnetic waves. Relatively low energy electrons are injected into acceleration cavity310and gain energy as they travel down the structure. In some embodiments, acceleration cavity310may include corrugations, diaphragms, or baffles, causing the RF waves to travel at a velocity determined by the corrugations and accelerator dimensions. In most electron linear accelerators, very high frequency waves, usually of wavelength of around 10 cm (i.e. around 3 GHz) are made to propagate down the accelerating structure in the same direction as the electrons. In some embodiments, when primary electron source301is a pulsed electron source, the RF wave propagating within acceleration cavity310may be matched with the source frequency of the incoming electron pulses from primary electron source301. In some embodiments, the electric field component in the RF wave may act on the injected electrons, initially by forming them into a bunch, then accelerating them down the structure of acceleration cavity310. Each cycle of the RF electric field may increase the energy of the particles so that when they emerge out of acceleration cavity310, the effect may be the same as if they were accelerated by a static electric field. In some embodiments, acceleration cavity310may additionally function as a lens. For example, besides accelerating charged particles or forming them into bunches, acceleration cavity may also divert traveling directions of the charged particles, such as converging them into a downstream component (e.g., bunching cavity320). In some embodiments, multi-beam apparatus300may comprise bunching cavity320(also referred to herein as an RF chopper system) configured to receive and modify the primary electron beam from acceleration cavity310. For example, when primary electron source301is a pulsed electron source, bunching cavity320may modify the period of electron pulses. The electron pulses generated by acceleration cavity310may be reduced (“compressed”). For example, the electron pulses may be compressed to 100 fs (femtoseconds), or a frequency of 10 THz (terahertz) to allow for fast electron beam imaging. Other electron pulse periods or frequencies may be used, as appropriate. For another example, when primary electron source301is a continuous electron source, bunching cavity320may generate a pulsed primary electron beam from the received continuous primary electron beam. It should be noted that, when primary electron source301is a pulsed electron source, bunching cavity320may be optional in multi-beam apparatus300. In some embodiments, when primary electron source301is a pulsed electron source, an RF chopper system of bunching cavity320may “chop” out a fraction of the pulses such that the pulses are at the proper repetition frequency or sub-harmonics thereof. AlthoughFIG.3illustrates bunching cavity320disposed downstream from acceleration cavity310, it is to be appreciated that bunching cavity320may be disposed upstream from acceleration cavity310such that the period of the electron pulses generated by primary electron source301may be adjusted to match the frequency of RF waves in acceleration cavity310. In some embodiments, one or more bunching cavities may be used, as appropriate. In some embodiments, when primary electron source301is a pulsed electron source, bunching cavity320may additionally function as a cluster generator. That is, bunching cavity320may further group charged-particle pulses into clusters. Each cluster may include one or more consecutive pulses such that intra-cluster distances may be shorter than inter-cluster distances. In some embodiments, multi-beam apparatus300may comprise deflection cavity330configured to receive a beam of electron pulses from bunching cavity320and deflect individual pulses of the beam to different directions to form a plurality of deflected charged-particle beams, such as deflected electron beams305_1and305_2. Deflected electron beams305_1and305_2may be similar to one or more of primary beamlets102_1,102_2, and102_3inFIG.2. An electron beam, as used herein, may comprise a group or a “bunch” of electron pulses having a frequency (e.g., in a range of 100 MHz to 10 GHz). Deflection cavity330may comprise one or more beam deflectors configured to direct the bunches of electron pulses generated by bunching cavity320. In some embodiments, deflection cavity330may receive electron pulses from bunching cavity320and deflect individual pulses into a plurality of directions to form deflected electron beams305_1and305_2. It should be noted that any deflector described herein, including deflectors in deflection cavity330, may direct charged particles (e.g., electrons) to either change their moving directions (via deflection) or keep their moving directions unchanged. That is, the deflectors may apply a “neutral” effect on charged particles when directing them. In some embodiments, the deflectors described herein, including deflectors in deflection cavity330, may be RF cavities or implementations other than RF cavities (e.g., MEMS deflectors). In some embodiments, deflection cavity330may operate in synchronization with primary electron source301. In particular, deflection cavity330may be operated at an operating frequency synchronous with the source frequency, such that the operating frequency and the source frequency are related based on the equation 1 below: v1=1n(v2)Equation1 where v1 is the operating frequency, v2 is the source frequency, and n is a positive integer. As used herein, source frequency is the frequency of the RF source or primary electron source301, operating frequency is the frequency of deflection cavity330, and n indicates the number of deflected charged-particle beams to be generated. For example, for a source frequency of 4 GHz and n=2, the operating frequency of deflection cavity330may be 2 GHz. In other words, if the source frequency is 4 GHz and deflection cavity330is operated at 2 GHz, deflection cavity330may generate two deflected electron beams, such as305_1and305_2, as illustrated inFIG.3. The frequency of each of deflected electron beams305_1and305_2may be 2 GHz. It is to be appreciated that any number of deflected electron beams may be generated, as desired. In some embodiments, deflected electron beams305_1and305_2may be deflected symmetrically-off primary optical axis302, as shown inFIG.3. For example,305_1and3052may be deflected such that the angle subtended by the primary axis of305_1and primary axis of305_2may be 180° and primary optical axis302bisects the subtended angle. In some embodiments, according to Equation 1, for a source frequency of 4 GHz and the operating frequency of deflection cavity330of 1 GHz, four deflected electron beams may be generated, each having a frequency of 1 GHz. In other words, the operating frequency of deflection cavity330may be selected based on the number of deflected electron beams desired. Each deflected electron beam (e.g., deflected electron beams305_1and305_2) may travel downstream from deflection cavity330towards sample390to generate a corresponding probe spot on sample390. In some embodiments, multi-beam apparatus300may comprise more than one deflection cavities. For example, a second deflection cavity (not shown) configured to generate deflected electron beams may be disposed perpendicular to deflection cavity330. In such a configuration, the probe spots formed by deflected electron beams generated by second deflection cavity may be perpendicular to probe spots formed by deflected electron beams such as305_1and305_2, generated by deflection cavity330. Such an arrangement may result in a two-dimensional pattern of probe spots formed on sample390. In some embodiments, the number and pattern of probe spots on sample390may be determined by, but not limited to, the number of deflectors within deflection cavity330, the number of deflection cavities, the operating frequency of deflection cavity330, the spatial arrangement of deflectors or deflection cavities, etc. In some embodiments, a two-dimensional pattern of probe spots may comprise a square matrix, a rectangular matrix, an array, or a Lissajous pattern. A Lissajous pattern or a Lissajous curve, as used herein, may be defined as the pattern produced by the intersection of two sinusoidal curves, the axes of which are perpendicular to each other. In some embodiments, a one-dimensional pattern of probe spots may be generated, for example, a number of linearly arranged probe spots on sample390. In some embodiments, a de-bunching cavity (not illustrated) may be used to de-compress the electron pulses, as appropriate. One or more de-bunching cavities may be employed in multi-beam apparatus300to suit the application or sample being investigated. Referring back toFIG.3, multi-beam apparatus300may comprise condenser lens340. Condenser lens340of multi-beam apparatus300is substantially similar to condenser lens110of electron beam tool100illustrated inFIG.2. Condenser lens340may be positioned downstream from deflection cavity330and configured to converge deflected electron beams305_1and305_2, such that they cross-over along primary optical axis302, on a plane perpendicular to primary optical axis302. Condenser lens340may be configured to focus each of deflected electron beams305_1and305_2. It is appreciated that condenser lens340may be configured to focus and converge any number of deflected charged-particle beams as appropriate. Multi-beam apparatus300may comprise detector350. In some embodiments, detector350is similar to detection device140ofFIG.2. Detector350may be configured to detect, but not limited to, secondary electrons, back-scattered electrons, transmitted electron, X-rays, auger electrons, etc. depending on factors such as the accelerating voltage, sample density, among other things. Secondary electrons, for example, may be generated from the probe spots on sample390formed by deflected electron beams305_1and305_2. In some embodiments, detector350may comprise solid-state detectors containing p-n junctions for detecting back-scattered electrons, or an Everhart-Thornley detector for secondary electrons. A secondary electron detector, such as Everhart-Thornley detector may include a scintillator inside a Faraday cage, which is positively charged and configured to attract the secondary electrons. The scintillator may then be used to accelerate the electrons and convert them to light signals before reaching a photomultiplier for amplification. Detector350may be positioned at an angle to increase the detection efficiency of detecting secondary electrons. In some embodiments, multi-beam apparatus300may comprise primary projection system360. Primary projection system360, also referred to as an electron optical system, may comprise a single-lens system or a multi-lens system. Multi-beam apparatus300ofFIG.3comprises a single-lens system, whereas multi-beam apparatus400ofFIG.4describes a multi-lens system. Primary projection system360may include objective lens131ofFIG.2. In some embodiments, primary projection system360comprising objective lens131may be configured to focus each deflected electron beams305_1and305_2onto sample390. Primary projection system360may comprise more than one objective lens131, as illustrated inFIG.4(described later). To obtain a higher resolution of images formed by a charged-particle beam (such as, primary electron beam102ofFIG.2) objective lens131may be an electromagnetic compound lens in which the sample may be immersed in the magnetic field of objective lens131. In some embodiments, objective lens131may include a magnetic lens and an electrostatic lens (not illustrated). The magnetic lens may be configured to focus the charged-particle beam, or each primary beamlet in a multi-beam apparatus (such as, electron beam tool100ofFIG.2), at relatively low aberrations to generate relatively small probe spots on a sample. The electrostatic lens may be configured to influence the landing energy of the charged-particle beam or each primary beamlet to ensure that the primary charged-particles land on the sample at a relatively low kinetic energy and pass through the apparatus with a relatively high kinetic energy. In some embodiments, objective lens131may be configured to be an “immersion lens.” As a result, the sample may be immersed both in an electrostatic field E (electrostatic immersion) of the electrostatic lens and a magnetic field B (magnetic immersion) of the magnetic lens. Electrostatic immersion and magnetic immersion may reduce aberrations of objective lens131. As electrostatic and magnetic fields get stronger, the aberrations of objective lens131may become smaller. Electrostatic field E, however, should be limited to within a safe range in order to avoid discharging or arcing on the sample. Due to this limitation of the field strength of electrostatic field E, further enhancement of the magnetic field strength in an immersion configuration may allow a further reduction in the aberrations of objective lens131, and thereby improve image resolution. Referring back toFIG.3, in some embodiments, deflected electron beams305_1and305_2may arrive on surface of sample390, in an at least a substantially perpendicular direction. Magnetic immersion, however, may influence the landing angles of all primary modified beamlets landing on sample390. In particular, magnetic field B may cause each electron in a modified beamlet to obtain an angular velocity θ(1), as shown in equation (2) below: r2θ(1)=12emr2B+CEquation2 wherein C is a constant related to an initial angular velocity of the electron, r is a position shift from optical axis of objective lens131, and e and m are the charge and the mass of the electron, respectively. For the electron to land on sample390in a perpendicular manner, angular velocity θ(1)must be zero on sample390. In some embodiments, magnetic lens may be configured to operate in a non-magnetic immersion mode, and magnetic field B is zero (or substantially zero) or below the preset ratio value on sample390. If an electron enters magnetic field B along a meridional path, its corresponding constant C is zero and its angular velocity θ(1)will be zero or substantially zero on sample390. Objective lens131may have a real front focal point on its front focal plane. When the chief rays (or center rays) of off-axis deflected electron beams305_1and305_2enter objective lens131along some specific meridional paths, the chief rays can pass through the real front focal point and off-axis deflected electron beams305_1and305_2can land perpendicular on sample390. Accordingly, deflected electron beams305_1and305_2may overlap together on the front focal plane and form a relatively sharp beamlet crossover centering at the real front focal point. In other embodiments, magnetic lens may be configured to operate in magnetic immersion mode in which magnetic field B is not zero on sample390. Therefore, angular velocity θ(1)of an electron may be zero (or substantially zero) on sample390if its corresponding constant C is not zero when the electron enters magnetic field B and complies with the condition in equation (3): C=-12emr2BEquation3 When C is not equal to zero, the electron enters magnetic field B along a skew path and cannot cross primary optical axis before entering magnetic field B. Hence, an electron can perpendicularly land on sample390only if entering magnetic field B along a specific skew path, and the electron cannot really cross primary optical axis during passing through magnetic field B. Accordingly, objective lens131may have a virtual front focal point. When the chief rays (or center rays) of off-axis deflected electron beams305_1and305_2enter objective lens131along some specific skew paths, they can virtually pass through virtual front focal point and land perpendicular on sample390. Under this scenario, off-axis deflected electron beams305_1and305_2are closest to each other on principal plane of objective lens131, and each off-axis deflected electron beams305_1and305_2has a radial shift from primary optical axis302. The deflected electron beams305_1and305_2, therefore only partially overlap with each other on principal plane and form a partial overlap beamlet crossover on principal plane. Moreover, radial shift increases as magnetic field B on sample390increases. Current density is lower in the partial overlap beamlet crossover than in the foregoing sharp beamlet crossover. Therefore, the Coulomb interaction effect between deflected electron beams305_1and305_2in magnetic immersion mode is relatively low, thereby further contributing to the small sizes of probe spots. In some embodiments, multi-beam apparatus300may include beam raster system370configured to scan deflected electron beams305_1and305_2on sample390. Beam raster system370may be positioned downstream from primary projection system360, as shown inFIG.3. Alternatively, beam raster system370may be positioned between condenser lens340and primary projection system360. Beam raster system370may be configured to raster or scan the received deflected electron beams305_1and305_2on sample390in a predefined pattern, as appropriate. In some embodiments, beam raster system370may be aligned with primary optical axis302. Referring back toFIG.3, multi-beam apparatus300may comprise controller380configured to synchronize the relevant components of apparatus300, such as, but not limited to, RF cavity including acceleration cavity310, bunching cavity320, and deflection cavity330, detection systems including detector350, and beam raster system370, etc. In some embodiments, controller380may be electronically connected to electron beam tool100. Controller380may be a computer configured to execute various controls of EBI system1. For example, controller380may be connected to various parts of EBI system1ofFIG.1, such as source conversion unit120, electron detection device140, primary projection system130, or motorized stage109. In some embodiments, as explained in further details below, controller380may perform various image and signal processing functions. Controller380may also generate various control signals to govern operations of the charged particle beam inspection system. In some embodiments, controller380may include one or more processors (not shown). A processor may be an electronic device capable of manipulating or processing information. For example, the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controllers, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field-Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network. In some embodiments, controller380may further include one or more memories (not shown). A memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device. The codes may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks. The memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network. In some embodiments, controller380may comprise image processing system that includes an image acquirer (not shown), a storage (not shown). The image acquirer may comprise one or more processors. For example, the image acquirer may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, and the like, or a combination thereof. The image acquirer may be communicatively coupled to detector350through a medium such as an electrical conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, among others, or a combination thereof. In some embodiments, the image acquirer may receive a signal from detector350and may construct an image. The image acquirer may thus acquire images of sample390. The image acquirer may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, and the like. The image acquirer may be configured to perform adjustments of brightness and contrast, etc. of acquired images. In some embodiments, the storage may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer readable memory, and the like. The storage may be coupled with the image acquirer and may be used for saving scanned raw image data as original images, and post-processed images. In some embodiments, the image acquirer may acquire one or more images of a sample based on an imaging signal received from detector350. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas. The single image may be stored in the storage. The single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of sample390. The acquired images may comprise multiple images of a single imaging area of sample390sampled multiple times over a time sequence. The multiple images may be stored in the storage. In some embodiments, controller380may be configured to perform image processing steps with the multiple images of the same location of sample390. In some embodiments, controller380may include measurement circuitries (e.g., analog-to-digital converters) to obtain a distribution of the detected secondary electrons. The electron distribution data collected during a detection time window, in combination with corresponding scan path data of each of deflected electron beams305_1and305_2incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection. The reconstructed images can be used to reveal various features of the internal or external structures of sample390, and thereby can be used to reveal any defects that may exist in the wafer. In some embodiments, sample390may be placed in multi-beam apparatus300in a way similar to sample190in electron beam tool100. For example, controller380may control motorized stage (e.g., such motorized stage109ofFIG.2) to move sample390during inspection of sample390. In some embodiments, controller380may enable motorized stage109to move sample390in a direction continuously at a constant speed. In other embodiments, controller380may enable motorized stage109to change the speed of the movement of sample390overtime depending on the steps of scanning process. In some embodiments, controller380may be configured to control injection by triggering primary electron source301and activating acceleration cavity310and bunching cavity320at appropriate times. Also, beam diagnostic components (not illustrated) including, but not limited to, beam position monitors, current transformers, profile monitors, etc. may be synchronized to the passage of the charged-particle beam with high precision and fine time resolution, defined as “fast timing”. In some embodiments, controller380may be a timing controller configured to timestamp control system processes such as, but not limited to, formation of a plurality of deflected charged-particle beams, detection of multiple signals comprising secondary electrons generated from the probe spots, correlating measurements and timing information of formation of deflected electron beams and detection of signals, etc. In some embodiments, as illustrated inFIG.3, controller380may be configured to communicate with each of acceleration cavity310, bunching cavity320, deflection cavity330, detector350, and beam raster system370. In some embodiments, controller380may be configured to communicate with and control operation of other components, such as beam optical components, electromagnetic lens, beam collimators, sample stage, position monitors, etc. In some embodiments, controller380may include, but is not limited to, timing circuit components comprising digital and analog circuits, microprocessors, data storage module, communications module including data ports, display module, sequencing circuits, etc. Controller380may communicate with an external computer or a processor as well. Reference is now made toFIG.4, which illustrates a multi-beam apparatus400using a multi-lens system, consistent with embodiments of the present disclosure. Multi-beam apparatus400may comprise primary electron source301, deflected electron beams305_1and3052, acceleration cavity310, bunching cavity320, deflection cavity330, condenser lens340, detector350, primary projection system360, beam raster system370, controller380, and sample390. Multi-beam apparatus400may include a beam aperture array410comprising a plurality of apertures or holes. In some embodiments, as shown inFIG.4, beam aperture array410may be placed between condenser lens340and detector350. Beam aperture array410may comprise a matrix of uniform apertures, for example, each of the apertures of beam aperture array410may be uniform in cross-section, shape, or size. In some embodiments, the apertures may be arranged in a linear, circular, rectangular, spiral, zig-zag, serpentine, triangular pattern, or combinations thereof. In some embodiments, the apertures within beam aperture array410may be non-uniform in shape, size or cross-section. It is appreciated that apertures of beam aperture array410may be laid out randomly across the array. Other suitable layouts and configurations of the apertures may be used as well. In some embodiments, beam aperture array410may comprise a metal, a ceramic, a plastic, an alloy, a composite, a semiconductor, or any suitable material that is vacuum-compatible and can be processed to form apertures. The apertures of beam aperture array410may be fabricated using photolithography, embossing, ultraprecision laser machining, injection molding, mechanical drilling, etc. or any suitable technique. In some embodiments, the pattern of apertures of beam aperture array410may be predefined and the information related with the aperture pattern such as, but not limited to, number, pitch, size, location, arrangement, cross-section, etc. may be retrievably stored in a database or data storage module of controller380, or the like. In some embodiments, controller380may be configured to synchronize timing and deflection of electron beams based on the aperture pattern. In some embodiments, the operating frequency of deflection cavity330may also be adjusted based on the number or pitch of apertures arranged in beam aperture array410. As illustrated inFIG.4, primary projection system360may include a plurality of objective lens131for each deflected electron beam. Each objective lens131may be aligned with primary axis of a corresponding deflected electron beam305_1or305_2. Such a configuration may allow each deflected electron beam (e.g., deflected electron beams305_1and305_2) to be focused and manipulated independently. The chromatic and spherical aberrations of round lenses may be the main factors limiting resolution in charged-particle beam systems such as multi-beam apparatus300ofFIG.3or multi-beam apparatus ofFIG.4. Astigmatism may result from misalignment or from limitations in manufacturing tolerances and can be compensated by electric or magnetic stigmators. However, in contrast to light optics, the chromatic and spherical aberrations cannot be corrected by lens combinations. Independent of type and geometry of a round lens, the spherical aberration coefficient and the chromatic aberration coefficient are always positive. This fundamental property of electron-optical round lenses is referred to as Scherzer's theorem. As a consequence, the electron beam paths in multi-beam apparatus300may be restricted by very small aperture diaphragms. It is to be appreciated that the preconditions for validity of Scherzer's theorem or occurrence of spherical aberration are: round lenses, real images, static fields (time-independent), and no space charge. Typically, chromatic aberration correction may be obtained using either a monochromator, an electron mirror, or crossed electric and magnetic quadrupoles acting as Wien filters. For spherical aberration correction, it is necessary to break the rotational symmetry. This can be accomplished by using electromagnetic multipole lenses such as, but not limited to, dipoles, quadrupoles, sextupoles, octopoles, etc. In some embodiments, multi-beam apparatus400may use time-varying electric fields (time-dependent) to manipulate and focus each deflected electron beam, thus allowing for correction of spherical aberration. This may enable larger opening angles and larger beam currents to be used, also providing larger field-of-view in electron microscopes, such as multi-beam apparatus300ofFIG.3. FIG.5Aillustrates a low frequency scan pattern510for observing samples using multi-beam apparatus300or400, consistent with embodiments of the present disclosure. Low frequency scan pattern510may comprise a one-dimensional pattern or a two-dimensional pattern. In some embodiments, two-dimensional patterns may include a matrix, an array, or a Lissajous pattern (as illustrated inFIG.5A), or combinations thereof. In some embodiments, a low frequency scan as shown inFIG.5A, comprises multiple probe spots arranged in a pattern forming two sinusoidal curves, the axes of which are mutually perpendicular. Such a scan comprising a plurality of probe spots may be useful in large-area scanning of a sample, such as sample390. FIGS.5B and5Cillustrate high frequency scan patterns520and530, for observing samples using multi-beam apparatus300or400, consistent with embodiments of the present disclosure. Although high frequency scan patterns520and530are one-dimensional, two-dimensional patterns may also be used. The frequency for high frequency scans may be adjusted by adjusting either the source frequency of accelerated electron pulses, the operating frequency of deflection cavity330, or both. Reference is now made toFIGS.6A and6B, which illustrate high frequency scan pattern610and low frequency scan pattern620, respectively, for observing samples using multi-beam apparatus300or400, consistent with embodiments of the present disclosure.FIG.6Aillustrates a one-dimensional high frequency scan pattern610with two probe points.FIG.6Billustrates a two-dimensional low frequency scan pattern620performed on each of probe points shown in high frequency scan pattern610ofFIG.6A. In some embodiments, the frequency of the scan may be adjusted by changing the operating frequency of deflection cavity330, or changing source frequency using RF choppers, or using a de-bunching cavity, or other appropriate means. The scan frequency can be lowered, increased, or quickly switched between low and high, based on the requirement and application. For example, a user may perform a large area scan of sample390using low scan frequency to locate a target region of interest or a feature on a wafer, and upon locating the feature, may switch to a high frequency scan for a deeper analysis of the identified feature. In some embodiments, for example, a user may perform a high frequency scan with fewer points (e.g., high frequency scan pattern610) to locate a feature on sample390. The user may add a two-dimensional low frequency scan pattern620to locally inspect the identified feature. In some embodiments, low frequency scan pattern620may be, but is not limited to, serpentine, circular spirals, rectangular spirals, concentric circles, etc. The tunability between fast low-resolution inspection and target localization or high-resolution inspection, efficient beam usage, higher productivity, simple modification of existing technology, and high inspection throughput may be some of the advantages of the embodiments of this disclosure. An image manipulation software may be used to generate an image from the Lissajous pattern to a representative x-y coordinate system, enabled by the timing information obtained by controller380. In other words, the timing information allows for interpretation of the plurality of signals received from a Lissajous pattern of probe spots corresponding to the region of sample390investigated. It is to be appreciated that commonly known and available image manipulation or image processing software/application may be used. FIG.7is a process flowchart of an exemplary method700of observing a sample using a multi-beam apparatus (e.g., multi-beam apparatus300ofFIG.3), consistent with embodiments of the present disclosure. The method700may include forming a plurality of deflected charged-particle beams; detecting a plurality of signals generated by the plurality of deflected charged-particle beams; and associating timing information related with formation of deflected charged-particle beams and signals. In step710, a deflection cavity (e.g., deflection cavity330ofFIG.3), also referred to herein as a deflector, may be configured to form a plurality of deflected charged-particle beams from a primary charged-particle beam comprising a plurality of charged-particle pulses. For example, the primary charged-particle beam may be a pulsed electron beam exiting bunching cavity320inFIG.3, and the deflected charged-particle beams may be deflected electron beams305_1and305_2ofFIG.3. In the context of this disclosure, as described earlier, the deflected charged-particle beams comprise bunches of charged-particle pulses, rather than a continuous beam of charged-particles. The charged-particle pulses may be generated from a primary charged-particle source (e.g., primary electron source301ofFIG.3). The primary electron source may comprise, among others, a superconducting radio-frequency photoinjector, a normal conducting radio-frequency photoinjector, a high voltage direct current photoemission gun followed by an RF accelerating module photoinjector, or combinations thereof. The multi-beam apparatus300may include an RF cavity or a laser-trigger based cavity including, but not limited to, an acceleration cavity (e.g., acceleration cavity310ofFIG.3), a bunching cavity (e.g., bunching cavity320ofFIG.3), and the deflection cavity. The RF cavity may include one or more of each of the acceleration, bunching and deflection cavities. An electron beam formed by the deflection cavity may be characterized as a beam comprising a “bunch” of electron pulses having high frequency. The frequency of the electron pulses of an electron beam may be based on the operating frequency of the deflectors and the source frequency of the RF powered electron source. The electron pulse frequency may be in the range of 100 MHz to 10 GHz. In some embodiments, a plurality of deflection cavities may be used to generate a plurality of deflected electron beams. For example, a first and a second deflection cavity, each generating two deflected electron beams, may be disposed perpendicular to each other such that a rectangular matrix of four probe spots may be formed on sample390. It is to be appreciated that a number of combinations of deflection cavities, their arrangement, and operating frequency may be possible as well. In step720, a detector (e.g., detector350ofFIG.3) may be configured to detect a plurality of signals generated from electrons exiting from a plurality of probe spots formed by the plurality of deflected electron beams. In some embodiments, in response to incidence of primary beamlets (e.g., primary beamlets1021,1022, and102_3inFIG.2) on the plurality of probe spots (e.g., probe spots102_1s,102_2s, and102_3sinFIG.2) on a sample (e.g., sample190inFIG.2), electrons exit from the sample and form exiting electron beams (e.g., secondary electron beams102_1se,102_2se, and102_3seinFIG.2). The exiting electrons may include, for example, secondary electrons, back-scattered electrons, transmitted electrons, auger electrons, or the like. The exiting electron beams may be deflected (e.g., by beam separator160inFIG.2) towards a detection device (e.g., electron detection device140inFIG.2) through a secondary projection system (e.g., secondary projection system150inFIG.2). Secondary projection system150may focus the exiting beams onto the detection device. The detection device may include one or more detection elements (e.g., detection elements140_1,140_2, and140_3inFIG.2), which may be arranged to detect corresponding exiting beams and generate corresponding signals that are sent to a controller or a signal processing system (not shown) to construct images of the corresponding scanned areas of the sample. In step730, a controller (e.g., controller380ofFIG.3) may be configured to obtain a first timing information related with formation of the deflected electron beam of the plurality of deflected electron beams. The controller may be configured to communicate with the deflection cavity to obtain the first timing information. The first timing information may include, but is not limited to, a time of deflection of a charged-particle pulse of the deflected beam or time of deflection, a time of formation of a charged-particle pulse of the primary charged-particle beam, a frequency or a period of the electron beam, or an average number of electron pulses in the beam, etc. For example, the time of deflection of the charged-particle pulse of the deflected charged-particle beam may include a timestamp when a deflector (e.g., deflection cavity330inFIG.2) directs a charged-particle pulse of the deflected charged-particle beam (e.g., a compressed beam exiting bunching cavity320) into a direction to form a portion of the deflected beam (e.g., deflected electron beam305_1inFIG.2). The first timing information may also include timestamps when the pulses of the pulsed primary electron beam are generated (e.g., by bunching cavity320inFIG.3). If the electron source is a laser induced pulsed source, the first timing information may also include timestamps when a laser illuminates the pulsed source for boosting electron emission. For another example, if a primary electron beam is a continuous beam, the first timing information may include timestamps when an RF cavity converts a portion of the continuous beam into a pulse of electrons. The first timing information may be obtained by the controller controlling the deflector. In some embodiments, the first timing information may be retrievably stored in a data storage module of the controller. It is appreciated that step730may occur during or after the forming of a plurality of deflected charged particle beams at step710. In step740, the controller may be configured to obtain a second timing information related with detection of a signal of the plurality of signals from the plurality of probe spots formed by the plurality of deflected electron beams. The controller may be configured to communicate with the detector to obtain timing information including, but not limited to, time of detection of a signal, energy of the electron, etc. The second timing information related with the detection of a signal may be retrievably stored in the data storage module of the controller. The first and the second timing information may be stored in a remote accessible location such as a server, computer, processor, external memory modules, etc. as well, in communication with the controller. It is appreciated that step740may occur during or after the detecting the plurality of signals at step720. In step750, the controller may be configured to associate the detected signal and the corresponding deflected electron beam based on the obtained first and second timing information. The timing information related with formation of the deflected electron beam and the detection of the corresponding signal stored in the controller may enable conversion of the plurality of detection signals to a visual representation of the region of sample390being investigated, by an image manipulation tool such as, but not limited to an image processing software, an image manipulation application, etc. In some embodiments, the controller may be configured to obtain timing information through timing signals. A timing signal, as referred to herein, may be an electric pulse, a voltage signal, a current signal, etc. based on the component generating the signal or generated by the clock of the processor of the controller. The controller may be further configured to synchronize the timing of relevant components of the multi-beam apparatus including, but not limited to, primary electron source, acceleration cavity, deflection cavity, bunching cavity, detector, beam raster system, etc. The timing of injection of pulses into the acceleration cavity, bunching of electron pulses by the bunching cavity, deflection of the formed bunches, etc. may have to be synchronized for an efficient operation of the multi-beam apparatus based on RF powered beams. Reference is now made toFIGS.8A-8B, which illustrate two exemplary methods of controlling charged particles to enter a crossover area (or “common area”) in a multi-beam apparatus, consistent with embodiments of the present disclosure.FIG.8Ashows a first method of controlling charged particles (e.g., electrons) of beams802,804, and806to enter a crossover area808near an objective lens810. In some embodiments, objective lens810may be objective lens131inFIG.2.FIG.8Ashows beams802,804, and806as pulsed beams as an example. In some embodiments, beams802,804, and806may also be continuous beams, in which electrons travel like a stream. For ease of explanation without causing ambiguity, beams802,804, and806will be described as pulsed beams hereinafter unless specified otherwise. However, it should be noted that any description related to beams802,804, and806may be equivalently applicable to pulsed beams and continuous beams. The pulses of charged particles are shown as round dots along the direction of beams802,804, and806. Beams802,804, and806cross each other at crossover area808. Crossover area808is a position in space. In some embodiments, crossover area808may be near, on, or in objective lens810. As can be seen inFIG.8A, at a given time, there may be more than one beam that crosses crossover area808, in which charged particles from different beams may come across each other. That is, when beams802,804, and806are pulsed beams (as shown inFIG.8A), there is time when more than one pulse of charged particles cross at or are near crossover area808. When beams802,804, and806are continuous beams (not shown), there is time when electrons from at least two of beams802,804, and806cross at or are near crossover area808. This may lead to significant Coulomb effect. The Coulomb effect may occur between the beamlets in two directions: a longitudinal direction (i.e., along the travel direction of the charged particles) and a transversal direction (i.e., perpendicular to the travel direction of the charged particles). In a longitudinal direction, the Coulomb effect may occur between charged particles of the same beamlet if they are too close. For example, if a beamlet is a pulsed beamlet in which charged particles are bunched into pulses, the longitudinal Coulomb effect may occur if the pulses are too compressed. In a transversal direction, the Coulomb effect may occur between charged particles of neighboring beamlets if they are too close. For example, if the neighboring beamlets are too close to each other, the transversal Coulomb effect may occur. The longitudinal Coulomb effect may cause the energy of the same-beam charged particles to become less uniform, which may further cause chromatic aberration in generated inspection images. The transversal Coulomb effect may enlarge the cross-sectional size of the beamlet (e.g., due to repelling of the charged particles with like charges). Both the longitudinal and the transversal Coulomb effect may enlarge the sizes of the probing spots on the sample and deteriorate imaging resolution. Typically, the major contribution of the deterioration comes from the transversal Coulomb effect. For example, in some embodiments, inFIG.8A, when the multi-beam apparatus provides50beams and each beam has a current of 10 nano-Ampere (nA), the Coulomb effect at crossover area808may contribute to an enlargement of a spot size for 12.1 nanometer (nm) on a surface of a sample (e.g., a silicon wafer). The spot size may be determined as a line of 50% signal strength enclosing a portion of full width of detected signals (“FW50 method”). Without the Coulomb effect, a beam spot may be of a size 10 nm. With the Coulomb effect, the beam spot may be of a size 15.7 nm. That amounts to about a 60% increase of the spot size. Also, in this example, the Coulomb effect at crossover area808may contribute to an increase of energy spread of the pulses for about 0.1 electron volt (eV), as compared with a typical energy spread of 0.5-0.7 eV for a beam in a high-resolution multi-beam SEM. That amounts to 14-20% increase of the energy spread. Due to the Coulomb effect, it could set limits for the multi-beam apparatus in this example to achieve a higher imaging resolution. FIG.8Billustrates another method of controlling charged particles of beams812,814, and816to enter crossover area808near objective lens810. In beams812,814, and816, pulses of charged particles are grouped into clusters (shown as triplet round dots), such as, for example, by acceleration cavity310or bunching cavity320inFIG.3. Each cluster may include one or more consecutive pulses such that intra-cluster distances may be shorter than inter-cluster distances. The clusters are released in a predetermined time-space order (e.g., staggering) such that they may enter crossover area808in sequence (e.g., one by one, with only one or zero cluster being in crossover area808at any point in time). For example, near crossover area808, a cluster818from beam812may enter crossover area808first, followed by a cluster820from beam816, and then followed by a cluster822from beam814. That is, the number of clusters that simultaneously cross crossover area808may be limited. In some embodiments, at a given time, there may be at most N (an integer) cluster crossing crossover area808. For example, N may be 1. In such cases, the Coulomb effect may be significantly reduced, especially the transversal Coulomb effect. FIGS.9A-9Billustrate an exemplary cluster generator for clustering charged particles, consistent with embodiments of the present disclosure. In some embodiments, the cluster generator inFIGS.9A-9Bmay be acceleration cavity310or bunching cavity320inFIG.3. InFIG.9A, the cluster generator is a cluster cavity902. It should be noted that the cluster generator may be implemented as forms other than cavities. A dynamic electric field904is provided inside cluster cavity902, the direction of which is represented by the black arrows. Electric field904may have a direction parallel to (e.g., along or against) the moving direction of a beam (e.g., beam812,814, or816). That is, electric field904may accelerate or decelerate charged particles when it is non-zero. In some embodiments, electric field904may change periodically. For example, electric field904may be sinusoidal, and its direction may change to be up and down in cycles. It is noted that electric field904may vary in any suitable manner for clustering charged particles, and this disclosure does not have limitations on that aspect. FIG.9Bshows how two charged particles are clustered by cluster cavity902. InFIG.9B, vertical sections of cluster cavity902are shown along a timeline at three timestamps t1, t2, and t3. Before t1, charged pulses908and906move downward toward cluster cavity902, roughly at the same speed. A charged pulse may include one or more charged particles. At t1, charged pulse906enters cluster cavity902, while charged pulse908is outside cluster cavity902. Electric field904may be provided to decelerate charged pulse906, indicated by the solid arrow attached to charged pulse906. At t2, charged pulse906exits or is about to exit cluster cavity902with decreased speed, and charged pulse908enters cluster cavity902. At t2, electric field904may be provided to accelerate (e.g., by reversing the direction of electric field904at t1) or not decelerate (e.g., by setting a zero amplitude for electric field904) charged pulse908, indicated by the dashed arrow. By doing so, charged pulse908may move faster than charged pulse906and close the distance between them. At t3, both charged pulses906and908exit cluster cavity902, and charged pulse908catches up with charged pulse906. That is, a cluster of charged pulses906and908is formed. In some embodiments, to ensure that the charged pulses in the formed cluster have substantially similar speed, before charged pulse908exits cluster cavity902, electric field904may decelerate charged pulse908such that when the deceleration stops, charged pulse908not only catches up with charged pulse906, but also has substantially similar speed with charged pulse906. In some embodiments, electric field904may be provided dynamically (e.g., changing in cycles) such that more than two charged particles may form a cluster. For example, when multiple charged particles enter cluster cavity902in sequence, electric field904may alternate between a deceleration field and a neutral field (e.g., with a zero amplitude), by which the distances between the charged pulses may decrease and form a cluster when they exit cluster cavity902. In some embodiments, a cluster generator (e.g., cluster cavity902) may receive one beam (e.g., beam812,814, or816) of charged pulses. When the electric field of the cluster generator varies in cycles, the frequency of such cycles may depend on a scan frequency of the multi-beam apparatus and the number of the beams provided by the multi-beam apparatus. For example, when the scan frequency is 10 MHz, and the number of provided beams is 10, the frequency of the electric field of the cluster generator may be set to be higher than 100 MHz (e.g., to the order of 1 GHz). To achieve the time-space order of clusters as shown inFIG.8B, multiple cluster generators may be used for clustering multiple beams.FIG.10illustrates an exemplary set of cluster generators releasing charged-particle clusters in a time-space order, consistent with embodiments of the present disclosure. InFIG.10, the cluster generators may be cluster cavities1002,1004, and1006similar to cluster cavity902. Cluster cavities1002,1004, and1006receive charged-particle beams1008,1010, and1012(shown as discrete black dots), respectively. Each of cluster cavities1002,1004, and1006may turn its received beam into clusters (shown as triplet black dots) and release or eject the clusters in accordance with a time-space order. For example,FIG.10shows six timestamps t1 to t6, with t1 being the earliest one and t6 being the latest one. In some embodiments, the intervals between t1 to t6 may be equal. In some embodiments, cluster cavities1002,1004, and1006may release clusters in an alternate way. For example, at t1, cluster cavity1006releases a cluster. At t2, cluster cavity1002releases a cluster. At t3, cluster cavity1004releases a cluster. At t4, cluster cavity1006releases a cluster. At t5, cluster cavity1002releases a cluster. At t6, cluster cavity1004releases a cluster. In addition, the longitudinal distance between the released clusters may also be equal. The longitudinal distance is the difference of positions along the moving direction of the clusters. For example, the longitudinal distances between the clusters released from t1 to t6 may be equal, as indicated by the equidistant dashed boxes enclosing each cluster inFIG.10. In some embodiments, the time-space order may be the temporal and spatial relationship between the released clusters as shown and described inFIG.10. AlthoughFIG.10shows that cluster cavities1002,1004, and1006are positioned in a line, it should be noted that this is an example embodiment only, and other positional or spatial arrangements of the cluster cavities are possible. For example, they may be positioned along a line, in a triangle, have different relative longitudinal distances (e.g., not positioned on the same plane), or any spatial configuration in three-dimensional space. It should also be noted that the number of the cluster cavities may depend on the number of beams provided by the multi-beam apparatus and not be limited to three, as shown inFIG.10. In some embodiments, besides the implementations ofFIGS.9A-10, the charged particles may be grouped into clusters using different manners.FIG.11illustrates an exemplary arrangement of first and second cluster generators for clustering charged particles, consistent with embodiments of the present disclosure.FIG.11shows a cluster cavity1102and a cluster cavity1104as the first cluster generator and the second cluster generator, respectively. Cluster cavity1102is provided with a dynamic electric field1106. Cluster cavity1104is provided with a dynamic electric field1108. In some embodiments, cluster cavities1102and1104may be implemented similar to cluster cavity902inFIGS.9A-9B, and electric fields1106and1108may be implemented similar to electric field904. InFIG.11, cluster cavity1104may be arranged as downstream from cluster cavity1102. In some embodiments, cluster cavities1102and1104may be arranged coaxially about an axis1110, such that a beam may enter and exit them along its path. Cluster cavities1102and1104may have the same or different features or configurations (e.g., sizes, height, diameters, geometries, or the like). For example, maximum amplitudes and frequencies of electric fields1106and1108may be the same or different. InFIG.11, a charged pulse1112and a charged pulse1114may be clustered in the following way. Vertical sections of cluster cavity1102are shown along a timeline at three timestamps t1, t2, and t3. Vertical sections of cluster cavity1104are shown along a timeline at three timestamps t4, t5, and t6, with t4 being later than t3. Before t1, charged pulses1112and1114move downward toward cluster cavity1102, roughly at the same speed. At t1, charged pulse1112enters cluster cavity1102, while charged pulse1114is outside cluster cavity1102. Electric field1106may be provided to decelerate charged pulse1112, indicated by the solid arrow attached to charged pulse1112. At t2, charged pulse1112exits or is about to exit cluster cavity1102with decreased speed, and charged pulse1114enters cluster cavity1102. At t2, electric field1106may be provided to decelerate or not accelerate charged pulse1114, indicated by the dashed arrow. For example, at t2, the direction of electric field1106may be the same as at t1, and its amplitude may be smaller than that at t1. By doing so, charged pulse1114may move faster than charged pulse1112and close the distance between them. At t3, both charged pulses1112and1114exit cluster cavity1102, and charged pulse1114catches up with charged pulse1112. That is, a cluster of charged pulses1112and1114is formed. In some embodiments, at t3, the speed of charged pulse1114may be still higher than that of charged pulse1112, and the formed cluster may disperse again after a certain amount of time. In those cases, the energy spread (e.g., longitudinal energy spread) of the cluster may be enlarged. For reducing the energy spread, cluster cavity1104may be used to equalize the speeds of charged pulses1112and1114after the cluster is formed. In some embodiments, cluster cavity1104may be arranged at a position such that, before t (when the cluster reaches cluster cavity1104), second charged pulse1114has surpassed charged pulse1112along the path of the cluster. At t4, charged pulse1114enters cluster cavity1104, while charged pulse1112is outside cluster cavity1104. Electric field1108may be provided to decelerate charged pulse1114, indicated by the dashed arrow attached to charged pulse1114. At t5, charged pulse1114exits or is about to exit cluster cavity1104with decreased speed, and charged pulse1112enters cluster cavity1104. At t5, electric field1108may be provided to decelerate or not accelerate charged pulse1112, indicated by the solid arrow. For example, at t5, the direction of electric field1108may be the same as at t4, and its amplitude may be smaller than that at t4. By doing so, charged pulse1112may move faster than charged pulse1114such that the distance between them become close, and the speeds of them become substantially similar when electric field1108stops decelerating charged pulse1112. At t6, both charged pulses1112and1114exit cluster cavity1104, and charged pulse1114not only catches up with charged pulse1112, but also has substantially similar speed with charged pulse1112. That is, a cluster of charged pulses1112and1114having substantially similar speed is formed. The charged pulses in a cluster may be deemed as having substantially similar speed when the relative speed between the charged pulses is zero or within a predetermined percentage (e.g., 1%, 3%, 5%, 10%, or any reasonable percentage). In some embodiments, electric fields1106and1108may be provided dynamically (e.g., changing in cycles) such that more than two charged particles may form a cluster. For example, when multiple charged particles enter first and second cluster cavities1102and1104in sequence, electric fields1106and1108may alternate between a deceleration field and a neutral field (e.g., with a zero amplitude), by which the distances between the charged pulses may decrease and form a cluster when they exit first and second cluster cavities1102and1104. The frequencies of electric fields1106and1108may depend on a scan frequency of the multi-beam apparatus and the number of the beams provided by the multi-beam apparatus. It should be noted that, electric fields1106and1108may also have other implementations, such as applying an acceleration field for accelerating charged pulse1114in cluster cavity1102or accelerating charged pulse1112in second cluster cavity1114, similar to cluster cavity902. This disclosure does not limit on that aspect as long as the speeds of the charged pulses of the generated clusters may be adjusted to be substantially similar. In some embodiments, stray charged particles may exist near the formed cluster, which may enlarge the energy spread (e.g., transversal energy spread) of the cluster. Stray charged particles are charged particles not clustered by the cluster generators. In some embodiments, a filtering system may be used to remove or reduce the stray charged particles. FIG.12illustrate an exemplary arrangement of a cluster generator1202and a filtering system for reducing stray charged particles, consistent with embodiments of the present disclosure. The cluster generator1202may be implemented similar to cluster cavities902,1002,1004, and1006, or1102and1104inFIGS.9A-11. Cluster generator1202may be provided with a dynamic electric field1204for clustering charged particles. Electric field1204may be implemented similar to electric fields904,1106, or1108. Cluster generator1202may receive beams of charged particles and generate clusters1206, indicated by round dots downstream from cluster generator1202. Stray charged particles1208may exist around the generated clusters, indicated by a grayscale band. The filtering system may include a filter cavity1210arranged downstream from cluster generator1202. In some embodiments, cluster generator1202and filter cavity1210may be arranged coaxially about the path of clusters1206. Filter cavity1210may be provided with a dynamic electromagnetic field1212for deflecting stray charged particles1208. An “electromagnetic field” may include a pure electric field, a pure magnetic field, or a combination of an electric field and a magnetic field. Electromagnetic field1212may be configured to not affect the moving direction of clusters1206. In some embodiments, electromagnetic field1212may be a dynamic electric field, a dynamic magnetic field, or a combination of them. For example, electromagnetic field1212may be configured such that, when a cluster enters filter cavity1210, the moving direction of the cluster may be kept unchanged (e.g., by setting a zero amplitude of electromagnetic field1212). When stray charged particles1208enters filter cavity1210, electromagnetic field1212may be set as non-zero and deflect the moving directions of the stray charged particles1208. For example, as shown inFIG.12, clusters1206may move along a downward direction without being affected by electromagnetic field1212when passing through filter cavity1210. However, stray charged particles1208may be deflected to the left or right by electromagnetic field1212when passing through filter cavity1210, and may be blocked or absorbed by a wall of filter cavity1210. In some embodiments, the direction of electromagnetic field1212may change perpendicular to the moving direction of cluster1206. For example, electromagnetic field1212may be a dynamic electric field, the direction of which changes perpendicular to the moving direction of clusters1206. For another example, electromagnetic field1212may be a dynamic magnetic field, the direction of which changes perpendicular to the moving direction of clusters. In some embodiments, the frequency of electromagnetic field1212may depend on distances between clusters1206, a frequency of cluster generator1202(which further depend on the scan frequency of the multi-beam apparatus and the number of beams provided by the multi-beam apparatus), strength or amplitude of electromagnetic field1212, the speeds of clusters1206and stray charged particles1208, the number or density of stray charged particles1208, or the like. In some embodiments, to further remove the deflected charged particles1208, the filtering system may further include an aperture plate1214downstream from filter cavity1210. In some embodiments, aperture plate1214may include an aperture1216on the path of clusters1206. Cluster generator1202, filter cavity1210, and aperture1216may be arranged coaxially about the path of clusters1206. Aperture1216may have a size S that allows clusters1206to pass and block all or majority of the stray charged particles1208. As shown inFIG.12, the deflected stray charged particles1208are blocked by aperture plate1214, and cluster1206may pass through aperture1216. By doing so, transversal energy spread of clusters1206may be significantly reduced. In some embodiments, by applying the filtering system, the energy spread of the clusters introduced by the cluster generator (e.g., cluster generator1202) may be reduced to about 0.1 eV. It should be noted that embodiments inFIGS.10-12may be modified, combined, or rearranged such that elements of them may be combined in any manner for actual applications. For example, additional cluster cavities (e.g., cavity1104inFIG.11) may be arranged downstream from cluster cavities (e.g., cluster cavities1002,1004, and1006inFIG.10), respectively. For another example, filtering systems (e.g., including at least one of filter cavity1210and aperture plate1214) may be arranged downstream from cluster cavities1002,1004, and1006inFIG.10or cluster cavity1104inFIG.11, respectively. For another example, filter cavity1210may be arranged between cluster cavity1102and cluster cavity1104, and aperture plate1214may be arranged as downstream from cluster cavity1104inFIG.11. Other variations and modifications are also possible, and this disclosure does not limit on that aspect. FIG.13is a flowchart showing an exemplary method1300of reducing interaction of charged particles in a charged-particle beam of a multi-beam apparatus, consistent with embodiments of the present disclosure. Method1300may be performed by a controller that may be coupled with a charged particle beam apparatus (e.g., EBI system1). For example, the controller may be controller380inFIGS.3-4. The controller may be programmed to implement method1300. At step1302, a first cluster cavity receives a first set of charged particles to form a first cluster of charged particles. At step1304, a second cluster cavity receives a second set of charged particles to form a second cluster of charged particles. In some embodiments, the first set of charged particles and the second set of charged particles may be charged-particle pulses. In some embodiments, the first set of charged particles and the second set of charged particles may be continuous charged-particle streams. In some embodiments, the first cluster cavity may be provided with a first dynamic electric field, and the second cluster cavity may be provided with a second dynamic electric field. In some embodiments, the first cluster cavity may be one of cluster cavities1002,1004, and1006inFIG.10(e.g., cluster cavity1002), and the first beam may be a corresponding beam of beams1008,1010, and1012(e.g., beam1008). The second cluster cavity may be another one of cluster cavities1002,1004, and1006inFIG.10(e.g., cluster cavity1004), and the second beam may be a corresponding beam of beams1008,1010, and1012(e.g., beam1010). In some embodiments, the controller may control a direction of the first dynamic electric field to change parallel to a direction of the first beam, and a direction of the second dynamic electric field to change parallel to a direction of the second beam. For example, the first and second dynamic electric fields may change in a direction as shown and described inFIGS.9A-9B. In some embodiments, the controller may control at least one of the direction of the first dynamic electric field or the direction of the second dynamic electric field to change in a first cycle. For example, the direction of the first dynamic electric field, the direction of the second dynamic electric field, or both may be changed periodically. In some embodiments, the first cycle may be determined based on at least one of a scan frequency of the multi-beam apparatus or a number of the beams. Still referring toFIG.13, at step1304, the first cluster cavity forms a first cluster of charged particles using at least two charged particles in the first beam and at least the first dynamic electric field, and the second cluster cavity forms a second cluster of charged particles using at least two charged particles in the second beam and at least the second dynamic electric field. In some embodiments, the first cluster may be the released cluster at t2 inFIG.10, and the second cluster may be the released cluster at t3 inFIG.10. The first and second clusters may be formed in a way as shown and described inFIGS.9A-12. In some embodiments, the at least two charged particles may include the first charged particle (e.g., charged particle906inFIG.9B) and the second charged particle (e.g., charged particle908inFIG.9B). The controller may cause the first dynamic electric field (e.g., electric field904inFIG.9B) to decelerate a first charged particle before a second charged particle enters the first cluster cavity (e.g., as what occurs at t1 inFIG.9B). When the second charged particle enters the first cluster cavity, the controller may control the first dynamic electric field for causing the second charged particle to move faster than the first charged particle. For example, the controller may control the first dynamic electric field to accelerate the second charged particle, as what occurs at t2 inFIG.9B. For another example, the controller may control the first dynamic electric field to neither accelerate nor decelerate the second charged particle, such as by setting an amplitude of the first dynamic electric field to be zero. For another example, the controller may control the first dynamic electric field to decelerate the second charged particle in a lesser degree than decelerating the first charged particle, as what occurs at t2 inFIG.11. In some embodiments, to reduce energy spread of the formed clusters, additional cluster cavities may be used to uniformize the moving speeds of the charged particles in the clusters. For example, the moving speeds of the charged particles of the same cluster may be uniformized in accordance with a manner shown and described inFIG.11. In some embodiments, when forming the first cluster, the controller may receive the first cluster in a third cluster cavity (e.g., cluster cavity1104inFIG.11) downstream from the first cluster cavity (e.g., cluster cavity1102inFIG.11). The first cluster may be formed by the first cluster cavity. The controller may cause the first charged particle (e.g., charged particle1112inFIG.11) and the second charged particle (e.g., charged particle1114inFIG.11) to move in a substantially similar speed (e.g., an equal speed or different speeds within a predetermined range) using a third dynamic electric field (e.g., electric field1108inFIG.11) in the third cluster cavity, as what occurs at t4-t6 shown and described inFIG.11. For example, the controller may cause the third dynamic electric field to decelerate the second charged particle (e.g., charged particle1114) to move at the substantially similar speed, as what occurs at t4 inFIG.11. In some embodiments, the controller may coordinate the third dynamic electric field and the first dynamic electric field to change. For example, the controller may control a direction of the third dynamic electric field (e.g., electric field1108inFIG.11) to change parallel to a direction of the first beam (e.g., a downward direction along axis1110inFIG.11). In some embodiments, the controller may change the direction of the third dynamic electric field in a second cycle. For example, the second cycle (e.g., a cycle of electric field1108) may be different from or the same as the first cycle (e.g., a cycle of electric field1106), as shown and described inFIG.11. In some embodiments, the controller may determine the second cycle based on at least one of the scan frequency of the multi-beam apparatus, the number of the beams, or the first cycle. It should be noted that the uniformization approach of the moving speeds of the charged particles in the first cluster is also applicable to the second cluster for uniformizing the moving speeds of the charged particles in the second cluster. In some embodiments, to reduce energy spread of the formed clusters, a filtering system may be used to remove or reduce stray charged particles near the clusters. For example, the stray charged particles may be removed or reduced in accordance with a manner as shown and described inFIG.12. In some embodiments, a filter cavity (e.g., filter cavity1210) downstream from the first cluster cavity (e.g., cluster generator1202) may receive the cluster (e.g., one of clusters1206) and a first stray charged particle (e.g., one of stray charged particles1208). A dynamic electromagnetic field (e.g., electromagnetic field1212) in the filter cavity may filter the first stray charged particle. In some embodiments, the dynamic electromagnetic field may include at least one of a third dynamic electric field or a dynamic magnetic field. The third dynamic electric field may be different from the first and second dynamic electric fields (e.g., electric fields1106and1108, respectively). In some embodiments, the controller may cause a direction of the dynamic electromagnetic field (e.g., electromagnetic field1212) to change perpendicular to the direction of the first beam. For example, for filtering the first stray charged particle, when the first cluster is in the filter cavity (e.g., when the cluster is passing through the filter cavity), the controller may cause the dynamic electromagnetic field not to direct the cluster, such as by setting its amplitude to be zero. When the cluster is not in the filter cavity (e.g., before the cluster entering the filter cavity or after the cluster exiting the filter cavity), the controller may cause the dynamic electromagnetic field to direct the first stray charged particle away from the direction of the first beam, as shown and described inFIG.12. In some embodiments, the controller may coordinate the dynamic electromagnetic field (e.g., electromagnetic field1212) and the first dynamic electric field (e.g., electric field1204) to change. For example, the controller may change the direction of the dynamic electromagnetic field in a third cycle. The third cycle may be different from or the same as the first and second cycles. In some embodiments, the controller may determine the third cycle based on at least one of the scan frequency of the multi-beam apparatus, the number of the beams, the first cycle, or the second cycle. In some embodiments, for further reducing the energy spread of the formed clusters, the filtering system may further include an aperture plate to remove more stray charged particles. For example, as shown and described inFIG.12, an aperture plate (e.g., aperture plate1214) having an aperture (e.g., aperture1216) downstream from the filter cavity (e.g., filter cavity1210) may filter a second stray charged particle. The second stray charged particle may be different from the first stray charged particle. In some embodiments, the filter cavity and the aperture plate may be upstream or downstream from the third cluster cavity. For example, the filter cavity (e.g., filter cavity1210) and the aperture plate (e.g., aperture plate1214) may be positioned between the first cluster cavity (e.g., cluster cavity1102inFIG.11) and the third cluster cavity (e.g., cluster cavity1104inFIG.11). For another example, both the filter cavity (e.g., filter cavity1210) and the aperture plate (e.g., aperture plate1214) may be positioned downstream from the third cluster cavity (e.g., cluster cavity1104inFIG.11). In some embodiments, the third cluster cavity may be between the filter cavity and the aperture plate. For example, the third cluster cavity (e.g., cluster cavity1104inFIG.11) may be positioned downstream from the filter cavity (e.g., filter cavity1210) and upstream from the aperture plate (e.g., aperture plate1214). It should be noted that the filtering approach for the stray charged particles (e.g., the first and second stray charged particles) is also applicable to the second cluster for removing or reducing the stray charged particles in the second cluster. Still referring toFIG.13, at step1306, the controller causes the first cluster and the second cluster to pass a downstream position in a predetermined time-space order. The downstream position may be a crossover area (e.g., crossover area808inFIGS.8A-8B). In some embodiments, the crossover area may be determined as a position that may achieve small (e.g., as small as possible within condition constraints) aberrations of an objective lens (e.g., objective lens810inFIGS.8A-8B). For example, the controller may control the first and second cluster cavities to release the first and the second clusters in the predetermined time-space order. In some embodiments, the predetermined time-space order may include that the first cluster and the second cluster pass the downstream position in sequence. In some embodiments, the predetermined time-space order may be that at most one of the first cluster and the second cluster passes the downstream position at any time. In some embodiments, the downstream position may be near or in an objective lens in the multi-beam apparatus. For example, the downstream position may be crossover area808near objective lens810inFIGS.8A-8B. In some embodiments, the downstream position may be deemed as “near” the objective lens when it is located outside of the objective lens in the order of millimeters (e.g., smaller than or equal to 20 millimeters). In some embodiments, at steps1302-1304, a plurality of cluster cavities may receive respective sets of charged particles in each cluster cavity to form a plurality of beams, and each beam may include clusters of charged particles. Further, at step1306, the controller may cause the clusters of the plurality of beams to pass the downstream position in the predetermined time-space order. Moreover, in some cases, the predetermined time-space order at step1306may be that the clusters of the plurality of beams pass the downstream position in non-overlapping sequence. For example, the predetermined time-space order may be that at most one of the clusters of the plurality of beams passes the downstream position at any time. In some embodiments, the controller may coordinate the first dynamic electric field and the second dynamic electric field to change. For example, the controller may coordinate the electric field of cluster cavity1002and the electric field of cluster cavity1004to change such that the first cluster released at t2 and the second cluster released at t3 may be in a time-space order shown inFIG.10. In some embodiments, the controller may cause the first cluster to exit the first cluster cavity and the second cluster to exit the second cluster cavity in an alternate manner, and the first cluster and the second cluster pass the downstream position in the alternate manner. For example, as shown and described inFIG.10, the first cluster exits the first cluster cavity (e.g., cluster cavity1002) at t2 before the second cluster exits the second cluster cavity (e.g., cluster cavity1104) at t3, in an alternate manner. That is, the first and second cluster cavities may release the first and second clusters in sequence (e.g., one by one). The first cluster and the second cluster may pass the downstream position (e.g., crossover area808inFIG.8B) in the same alternate manner. That is, if the second cluster follows the first cluster when exiting the first and second cluster cavities, the second cluster would also follow the first cluster when passing the downstream position. Reference is now made toFIG.14.FIG.14illustrates an exemplary multi-beam apparatus1400for providing multiple charged-particle beams, consistent with embodiments of the present disclosure. InFIG.14, charged-particle sources1402,1404, and1406are configured to generate pulsed bunches of charged particles (e.g., electrons), forming beams1414,1416, and1418. In some embodiments, beams1414,1416, and1418may be pulsed, such as beams802,804, and806inFIG.8A. In some embodiments, beams1414,1416, and1418may be clustered, such as beams812,814, and816inFIG.8B. Each beam is indicated by circles with different shades inFIG.11. In some embodiments, each of charged-particle sources1402,1404, and1406may be primary electron source101inFIG.2or primary electron source301inFIGS.3-4. Charged-particle sources1402,1404, and1406may match with deflectors1408,1410, and1412, respectively. Deflectors1408,1410, and1412may deflect beams1414,1416, and1418to make them converged as they approach charged-particle accelerator1420. A charged-particle accelerator1420(e.g., acceleration cavity310inFIGS.3-4) receives beams1414,1416, and1418and accelerates the charged particles to increase their energy, and eject them towards beam concentrator1422. In some embodiments, beam concentrator1422may function as a combination of acceleration cavity310, bunching cavity320, and deflection cavity330inFIGS.3-4, capable of accelerating the charged-particle beams (e.g., beams1414,1416, and1418) and converging each beam toward beam concentrator1422. Beam concentrator1422may include multiple deflectors (e.g., radio-frequency cavities or MEMS deflectors) implemented similar to deflection cavity330, including deflectors1424,1426, and1428. In some embodiments, the deflectors may be arranged to form an array. In some embodiments, each deflector may receive and deflect a beam in a manner that the beams exiting beam concentrator1422become parallel again. For example, inFIG.14, deflector1424,1426, and1428can receive and deflect beams1414,1416, and1418, respectively, although it is appreciated that a deflector (e.g., deflector1426) on the optical axis of multi-beam apparatus1400may not perform any deflection. In some embodiments, a deflector may receive more than one beam. In some embodiments, deflector1424,1426, and1428may be MEMS deflectors. In some embodiments, deflector1424,1426, and1428may be electric cavities (e.g., RF cavities) that are provided with dynamic electric fields. For example, the dynamic electric fields may be similar to electromagnetic field1212inFIG.12that change perpendicular to the moving direction of a beam. The dynamic electric fields may change deflection angles of beams1414,1416, and1418. Beams1414,1416, and1418may eventually reach a surface of a sample1436after being projected by projection lenses1432. Deflectors1424,1426, and1428may deflect beams1414,1416, and1418such that the outgoing beams1414,1416, and1418from deflectors1424,1426, and1428may be parallel, and distances between them may be shorter than distances between charged-particle sources1402,1404, and1406. For example, as shown inFIG.14, the distances between charged-particle sources1402,1404, and1406are greater than the distances between beams1414,1416, and1418exiting deflectors1424,1426, and1428. Such a design may integrate more charged-particle sources into a multi-beam apparatus for providing more beams to accommodate the increasing demands of imaging throughput and brightness, yet avoiding the problems of complex designs of electric routing for an aperture plate (functioning as a beam splitter) because no aperture plate may be used (replaced by the deflectors), and the problems of increasing risks of electric breakdowns because the electric routing of the charged-particle sources now have greater distances in between. Also, deflectors1424,1426, and1428may release beams1414,1416, and1418in a predetermined time-space order to reduce the Coulomb effect. For example, deflectors1424,1426, and1428may release pulses or clusters in an alternate manner (e.g., one by one), such that a pulse or cluster may exit deflectors1424,1426, and1428in sequence (e.g., one at a time). The predetermined time-space order may be in a manner as shown and described inFIG.10. Beams1414,1416, and1418may be converged downstream from at a crossover area1434near projection lenses1432. Crossover area1434may be similar to crossover area808inFIGS.8A-8B. Projection lenses1432may be similar to objective lens810inFIGS.8A-8B. For example, a controller (e.g., controller380inFIGS.3-4) may coordinate deflectors1424,1426, and1428(e.g., RF cavities or MEMS deflectors) and determine one of deflectors1424,1426, and1428to deflect a beam towards crossover area1434. The controller may control deflectors1424,1426, and1428to release pulses or clusters in sequence (e.g., one pulse or cluster being released at a time), and the pulses or clusters may pass crossover area1434in sequence (e.g., one by one, with only one or zero cluster being in crossover area1434at any point in time). As shown inFIG.14, the distances between beams1414,1416, and1418after exiting deflectors1424,1426, and1428are more concentrated than distances between them before entering accelerator1420, in which more concentrated beams may contribute to higher brightness of the beams and higher throughput of the multi-beam apparatus1400. Also, by deflecting beams1414,1416, and1418such that pulses or clusters of beams1414,1416, and1418pass through crossover area1434in sequence (e.g., one by one), the Coulomb effect may be significantly reduced because there is at most one pulse or cluster passing crossover area1434. In some embodiments, deflectors1424,1426, and1428may be created out of a slab or module. For example, deflectors1424,1426, and1428may be created as cavities on the slab or module. Power supply may be connected to deflectors1424,1426, and1428for providing a dynamic electric field in each deflector. For example, an AC voltage may be provided to each of the deflectors in beam concentrator1422. The dynamic electric field may change in cycles, such as sinusoidally. In some embodiments, the cycle may depend on symmetry of beam concentrator1422, symmetry of the deflectors, or material choices of the deflectors. Although deflectors1424,1426, and1428are shown as equidistant and placed in a line inFIG.14, it should be noted that any number of deflectors may be configured at any position in three-dimensional space. For example, four deflectors may be arranged in beam concentrator1422if there are four charged-particle sources. For another example, the deflectors may be placed at different planes (i.e., they are at different longitudinal distances along the direction of the beams). In some embodiments, beam concentrator1422may further include cluster generators (not shown inFIG.14) for clustering beams1414,1416, and1418. For example, the cluster generators may be separate components implemented similar to cluster cavities1002,1004, and1006inFIG.10. The cluster generators may be arranged upstream or downstream from deflectors1424,1426, and1428. That is, the beams may be clustered before being deflected or be deflected before being clustered. In some embodiments, a cluster generator and a deflector (e.g., one of deflectors1424,1426, and1428) may be implemented as a single component, such as a single electric cavity provided with two different dynamic electric fields (e.g., a longitudinal dynamic electric field for clustering and a transversal dynamic electric field for deflecting), in which the single component may generate clusters and deflect them into different paths to form different beams of clusters, effectively making multiple beams out of a single component. In some embodiments, the number of beams and their paths may depend on parameters (e.g., frequencies) of at least one of the deflectors (e.g., deflectors1424,1426, and1428) or the cluster generators. In some embodiments, accelerator1420may be optional for multi-beam apparatus1400. In some embodiments, the relative positions of charged-particle accelerator1420and deflector and concentrator1422may be switched. That is, the clusters may be formed before being accelerated. In some embodiments, an aperture array1430may be arranged downstream from beam concentrator1422for further filtering beams1414,1416, and1418(e.g., by removing stray charged particles in a manner similar to aperture plate1214inFIG.12), by which imaging aberrations may be reduced. In some embodiments, aperture array1430may be a MEMS aperture array. In some embodiments, aperture array1430may be optional (i.e., may be omitted) for multi-beam apparatus1400. By using multiple charged-particle sources matched with multiple deflectors, multi-beam apparatus1400may provide a higher number of beams, higher throughput, scalable brightness (e.g., by adding or reducing charged-particle sources as needed), limited Coulomb effect, lower risks of electric breakdowns, and less complexity and costs for building the system. FIG.15is a flowchart showing an exemplary method1500of providing multiple charged-particle beams in a multi-beam apparatus, consistent with embodiments of the present disclosure. Method1500may be performed by a controller that may be coupled with a charged particle beam apparatus (e.g., multi-beam apparatus1400). For example, the controller may be controller380inFIG.34. The controller may be programmed to implement method1500. At step1502, at least one deflector system receives a first beam of pulsed charged particles from a first charged-particle source and a second beam of pulsed charged particles from a second charged-particle source. For example, the at least one deflector system may be one or more of deflectors1424,1426, and1428inFIG.14. For example, the first and second charged-particle sources may be charged-particle sources1402and1404, respectively. The first and second beams may be, for example, beams1414and1416, respectively. In some embodiments, the at least one deflector system may include a radio-frequency cavity deflector. For example, the at least one deflector system may include deflection cavity330inFIGS.3-4. In some embodiments, the first charged-particle source and the second charged-particle source may be charged-particle pulse generators. For example, a pulse generator may include a charged-particle emitter and a pulse laser generator. When the first charged-particle source and the second charged-particle source are the charged-particle pulse generators, the first beam and the second beam may be pulsed beams of charged particles. In some embodiments, the first beam and the second beam may be clustered, such as in a way as shown and described inFIGS.8B-13. In those embodiments, the first beam and the second beam may be beams of clustered charged particles before entering the at least one deflector system. In some embodiments, the at least one deflector system may include multiple deflectors, and each deflector may receive one beam of charged-particles. For example, the at least one deflector system may include a first deflector (e.g., deflector1424) and a second deflector (e.g., deflector1426) and may receive the first beam (e.g., beam1414) in the first deflector and the second beam (e.g., beam1416) in the second deflector. In some embodiments, if the deflector responds sufficiently fast, it may deflect beams from different charged-particle sources. In some embodiments, the at least one deflector system may include one or more deflectors, and each deflector may receive one or more beams of charged particles. For example, the at least one deflector system may include a single deflector, and the single deflector may receive the first beam and the second beam. The at least one deflector system may be arranged in the three-dimensional space in any suitable manner for deflecting the beams. For example, when the at least one deflector system includes the first deflector and the second deflector, the first deflector and the second deflector may be arranged to be on a same plane. The plane may be perpendicular to paths of the beams before entering them, such as shown and described inFIG.14. For another example, when the at least one deflector system includes the first deflector and the second deflector, the first deflector and the second deflector may be arranged to be on different planes. Still referring toFIG.15, at step1504, the at least one deflector system deflects the first beam and the second beam in a predetermined time-space order. The first beam and the second beam pass a downstream position in an alternate matter (e.g., in sequence). In some embodiments, the downstream position may be crossover area1434inFIG.14. For example, the at least one deflector system may deflect the first beam and the second beam in a way as shown and described inFIG.14. In some embodiments, the predetermined time-space order may include that a distance between the first beam and the second beam decreases after the first beam and the second beam are released. For example, as shown inFIG.14, the first beam and the second beam may be beams1414and1416, respectively, and the distance between beams1414and1416before they enter deflectors1424and1426, respectively, is greater than the distance between them after they exit deflectors1424and1426, respectively. In some embodiments, the predetermined time-space order may include that the first beam and the second beam are parallel after the first beam and the second beam are released. For example, as shown inFIG.14, the first beam and the second beam may be beams1414and1416, respectively, they are parallel after exiting deflectors1424and1426, respectively. In some embodiments, the at least one deflector system may release pulses or clusters from the first beam and the second beam in sequence. For example, as shown inFIG.14, deflectors1424and1426may release pulses or clusters of beams1414and1416in sequence, in which deflector1424releases a pulse or cluster of beam1414first (as indicated by a dense-dotted circle downstream from deflector1424), and deflector1426releases a pulse or cluster of beam1416second (as indicated by a sparse-dotted circle downstream from deflector1426). In some embodiments, the at least one deflector system may release at most one pulse or cluster at a given time. That is, the pulses or clusters of different beams may be released one by one. In some embodiments, the at least one deflector system may direct the first beam in a first direction and the second beam in a second direction. For example, as shown inFIG.14, deflector1424may deflect beam1414in a first direction (indicated by a large angle between the directions of beam1414before entering and after exiting deflector1424), and deflector1426may deflect beam1416in a second direction (indicated by a substantially zero angle between the directions of beam1416before entering and after exiting deflector1426). In some embodiments, after the first beam and the second beam are released, an aperture plate (e.g., an aperture plate providing aperture array1430) downstream from the at least one deflector system may receive them. The aperture plate may include a first aperture and a second aperture. The first aperture may receive the first beam, and the second aperture may receive the second beam. In some embodiments, the at least one deflector system may not only deflect the received beams, but also cluster them into beams of clusters. For example, the at least one deflector system may be provided with clustering electric fields (e.g., electric field904,1106,1108, or1204inFIGS.9-12) in addition to deflecting electric fields (e.g., electromagnetic field1212inFIG.12), and the received beams may be clustered while being deflected. For example, the at least one deflector system may form a first cluster of charged particles using the first beam and a second cluster of charged particles using the second beam. The at least one deflector system may then release the first cluster and the second cluster in the predetermined time-space order. In some embodiments, the at least one deflector system may release the first cluster and the second cluster in sequence, and the first cluster and the second cluster may pass the downstream position in sequence. Reference is now made toFIGS.16A-16C, which illustrate exemplary subsystems1600A-1600C of a multi-beam apparatus for charged-particle detection, consistent with embodiments of the present disclosure. The multi-beam apparatus may be, for example, the multiple electron beam system inFIG.3orFIG.4. FIG.16Ais a schematic diagram of an exemplary subsystem1600A of a multi-beam apparatus. In some embodiments, the charged particles may be electrons. Subsystem1600A may include at least primary electron source1602, a first deflector1606, and a first projection lens system1614. Primary electron source1602may emit primary electrons. In some embodiments, primary electron source1602may be primary electron source301inFIGS.3-4. In some embodiments, primary electron source1602may include multiple charged-particle sources, such as charged-particle sources1402,1404, and1406. The primary electrons may be bunched (e.g., by bunching cavity320inFIGS.3-4) into multiple primary electron pulses, including pulses1604. Pulses1604may be accelerated and projected along directions indicated by arrows inFIG.16A. In some embodiments, pulses1604may be clustered, such as beams812,814, and816as showed inFIG.8B. For ease of explanation without causing ambiguity, pulses1604described hereinafter include clustered electrons or un-clustered electrons unless explicitly specified. [01%] In some embodiments, first deflector1606may be a MEMS deflector. In some embodiments, first deflector1606may be a radio-frequency cavity deflector. In some embodiments, first deflector1606may be deflection cavity330inFIGS.3-4or one or more of deflectors1424,1426, and1428inFIG.14. First deflector1606may deflect pulses1604to form a first number (e.g., an integer N1) of deflected electron pulse beams, including incident beams1608,1610, and1612, pulses of which are indicated by circles of different shades inFIG.16A. For example, the leading pulse of pulses1604is deflected to form incident beam1612, the trailing pulse of pulses1604is deflected to form incident beam1608, and the intermediate pulse of pulses1604may be deflected (or allowed to pass through) to form incident beam1610. It can be seen fromFIG.16Athat pulses1604are deflected by first deflector1606at different timestamps. Such timestamps (e.g., timestamps of entering first deflector1606or timestamps of being directed by first deflector1606) may be recorded by a controller (e.g., controller380inFIGS.3-4) as first timing information. The first timing information may further include any information related with formation of deflected electron beams including incident beams1608,1610, and1612. In some embodiments, first projection lens system1614may include at least one of condenser lens340, primary projection system360, or beam raster system370inFIGS.3-4. First projection lens system1614may project and focus the N1 deflected electron beams onto a sample1622, including incident beams1608,1610, and1612. The cross-sections of the N1 deflected electron beams on the surface of sample1622form the N1 probing spots, including probing spots1616,1618, and1620, corresponding to incident beams1608,1610, and1612, respectively. FIG.16Bis a schematic diagram of an exemplary subsystem1600B of the multi-beam apparatus. Subsystem1600B may include at least second deflector1630, second projection lens system1638, and detector1644. As shown inFIG.16A, incident beams1608,1610, and1612may be incident onto sample1622at probing spots1616,1618, and1620and interact in corresponding interaction volumes (not shown) under the surface of sample1622. Reflected or emitted electrons (“exiting electrons”), including secondary electrons (“SEs”) and backscattered electrons (“BSEs”), may exit from the interaction volumes along directions indicated by arrows inFIG.16Band form initial exiting beams1624,1626, and1628. Initial exiting beams1624,1626, and1628exit from probing spots1616,1618, and1620, respectively. As shown inFIG.16B, the pulses (indicated as ellipses of different shades) of initial exiting beams1624,1626, and1628have larger cross-section than pulses1604, indicating that the exiting electrons may exit from anywhere in the interaction volumes that are larger than the probing spots. This may lead to the cross-talk problem. In some embodiments, second deflector1630may be a MEMS deflector. In some embodiments, second deflector1630may be a radio-frequency cavity deflector. In some embodiments, second deflector1630may be a deflection cavity similar to deflection cavity330inFIGS.3-4or one or more of deflectors1424,1426, and1428inFIG.14. Second deflector1630may deflect the N1 initial exiting beams (including initial exiting beams1624,1626, and1628) to form a second number (e.g., an integer N2) of deflected exiting beams, including deflected exiting beams1632,1634, and1636, indicated as ellipses of different shades. Initial exiting beams1624,1626, and1628may be deflected to form deflected exiting beams1632,1634, and1636, respectively. For example, the pulses in initial exiting beam1624may be deflected to form deflected exiting beam1632, the pulses in initial exiting beam1626may be deflected to form deflected exiting beam1634, and the pulses in initial exiting beam1628may be deflected to form deflected exiting beam1636. In some embodiments, the N2 deflected exiting beams may be smaller than or equal to the N1 deflected exiting beams. In other words, pulses of different initial exiting beams may be deflected into the same deflected exiting beam. For example, the pulses in initial exiting beam1628and at least one pulse of another initial exiting beam (not shown) may be deflected to form deflected exiting beam1636. It can be seen fromFIGS.16A-16Bthat the pulses of initial exiting beams1624,1626, and1628leave the surface of sample1622in a sequence the same as pulses1604. For example, the leading pulse of pulses1604firstly reaches sample1622at probing spot1620, from which a pulse of initial exiting beam1628firstly leaves sample1622. The intermediate pulse of pulses1604secondly reaches sample1622at probing spot1618, from which a pulse of initial exiting beam1626secondly leaves sample1622. The trailing pulse of pulses1604thirdly reaches sample1622at probing spot1616, from which a pulse of initial exiting beam1624thirdly leaves sample1622. That is, the pulses of initial exiting beams1624,1626, and1628enter second deflector1630at different timestamps, in the same order as pulses of the respectively corresponding incident beams that hit sample1622. Such timestamps (e.g., timestamps of entering second deflector1630or timestamps of being directed by second deflector1630) may be recorded by the controller (e.g., controller380inFIGS.3-4) as second timing information. The second timing information may further include any information related with arrival of the initial exiting beams (including initial exiting beams1624,1626, and1628) at second deflector1630. In some embodiments, second projection lens system1638may include at least one of a condenser lens1640or a secondary projection system1642. In some embodiments, condenser lens1640may be similar to condenser lens340. In some embodiments, secondary projection system1642may be similar to first projection lens system1614. In some embodiments, condenser lens1640may be omitted. In some embodiments, second projection lens system1638may include components beyond condenser lens1640and secondary projection system1642. In some embodiments, second projection lens system1638may share one or more components with first projection lens system1614. In some embodiments, second projection lens system1638may be first projection lens system1614itself. Second projection lens system1638may project and focus the N2 deflected exiting beams (including deflected exiting beams1632,1634, and1636) onto a surface of detector1644. Detector1644may include a third number (e.g., an integer N3) of detection elements corresponding to the N2 exiting beams, including detection elements1646,1648, and1650. Detection elements may be units or sub-detectors of the same detector, or individual detectors of a detector array. In some embodiments, detector1644may be similar to electron detection device140inFIG.2or detector350inFIGS.3-4. In some embodiments, detector1644may be a detector array. In some embodiments, detection elements1646,1648, and1650may be detection elements140_2,140_1, and140_3, respectively. Each detection element may detect a deflected exiting beam. For example, detection elements1646,1648, and1650may detect deflected exiting beams1632,1634, and1636, respectively. Because the pulses of the deflected exiting beams do not arrive at detector1644simultaneously, in some embodiments, the number (e.g., N3) of the detection elements may be smaller than or equal to the number (e.g., N2) of the deflected exiting beams. That is, one detection element may detect pulses of different deflected exiting beams. For example, detection element1650may detect pulses of deflected exiting beam1636and pulses of another deflected exiting beam (not shown). By reducing the number of detection elements, the complexity and cost of building the multi-beam apparatus may be further lowered. In an embodiment, N3 may be as small as 1, as shown inFIG.16C. That is, all deflected exiting beams may be detected by a single detection element. It can be seen fromFIGS.16A and16Bthat the pulses of deflected exiting beams1632,1634, and1636arrive at the surface of detector1644in a sequence the same as the pulses of incident beams reaching sample1622and the pulses of initial exiting beams reaching second deflector1630. For example, the leading pulse of pulses1604firstly reaches sample1622at probing spot1620, from which a pulse of initial exiting beam1628firstly leaves sample1622, and a pulse of deflected exiting beam1636firstly reaches detection element1650. The intermediate pulse of pulses1604secondly reaches sample1622at probing spot1618, from which a pulse of initial exiting beam1626secondly leaves sample1622, and a pulse of deflected exiting beam1634secondly reaches detection element1648. The trailing pulse of pulses1604thirdly reaches sample1622at probing spot1616, from which a pulse of initial exiting beam1624thirdly leaves sample1622, and a pulse of deflected beam1632thirdly reaches detection element1646. That is, the pulses of deflected exiting beams1632,1634, and1636enter detector1644at different timestamps. Such timestamps (e.g., timestamps of entering detector1644or timestamps of being detected by any detection element of detector1644) may be recorded by the controller (e.g., controller380inFIGS.3-4) as third timing information. The third timing information may further include any information related with arrival of the deflected exiting beams (including deflected exiting beams1632,1634, and1636) at detector1644. Because the pulses of the deflected exiting beams arrive at detector1644at different timestamps, although the cross-section of them overlaps, they do not interfere with each other, and thus the issues related to cross-talk may be greatly alleviated. For example, when a pulse reaches detector1644, there may be more than one responding detection elements that generate signals, similar to a cross-talk situation. However, based on the priori knowledge that the pulses reach detector1644one at a time no matter which exiting beam they are from, the controller may determine deposited charge or energy of the responding detection elements, and further identify the detection element (“arrival detection element”) with the most deposited charge or energy as the actual arrival position where the pulse reaches. After identifying the arrival detection element that the pulse reaches, the controller may further determine a travel distance of the pulse between second deflector1630and the arrival detection element by, for example, inquiring a database storing predetermined distances between second deflector1630and the detection elements of detector1644. Based on the first timing information (e.g., the timestamps of pulses1604arriving at first deflector system1606), the second timing information (e.g., the timestamps of the pulses of initial exiting beams1624,1626, and1628arriving at second deflector1630), and the third timing information (e.g., the timestamps of deflected exiting beams1632,1634, and1636arriving at detector1644), the controller may determine which pulse comes from which deflected exiting beam, which initial exiting beam, and which incident beam. For example, the multi-beam apparatus (including subsystems1600A and1600B) may operate in a vacuum, in which the travel speed of electrons may be substantially constant. Also, the relative distances between different components of the multi-beam apparatus may be predetermined or measured, such as the distance between first deflector system1606and the surface of sample1622, the distance between the surface of sample1622and second deflector1630, and the distances between second deflector1630and surfaces of the detection elements of detector1644. Because of the substantial constant travel speed of the electrons and the known distances, for a pulse of electrons, its first timing information, second timing information, and third timing information may be related. For example, for a pulse from incident beam1608, initial exiting beam1624, and deflected exiting beam1632, the difference between its arrival time at second deflector1630and its arrival time at first deflector system1606may be a quotient of a sum of the distance between first deflector system1606and the surface of sample1622(e.g., probing spot1616) and the distance between the surface of sample1622(e.g., probing spot1616) and second deflector1630divided by the travel speed of electrons. For another example, for the same pulse in the previous example, the difference between its arrival time at detector1644and its arrival time at second deflector1630may be a quotient of a sum of the distance between the surface of sample1622(e.g., probing spot1616) and second deflector1630and the distance between second deflector1630and the surface of detector1644divided by the travel speed of electrons. By finding arrival times related by the above relationships among the first, second, and third timing information, the controller may differentiate different initial exiting beams, and thus may be able to generate SEM images respectively associated with the differentiated initial exiting beams. It should be noted that the above-mentioned relationships between the travel speed, the known distances between components of the multi-beam apparatus, and the first, second, and third timing information are examples only, and this disclosure does not limit that aspect. In some embodiments, the number (e.g., N3) of the detection elements and the number (e.g., N2) of the deflected exiting beams may depend on temporal resolution of detector1644. It should be noted that the longitudinal time spread of the pulses (i.e., the time consumed for all electrons in a pulse to reach a surface perpendicular to a path of the pulse) may be so small (e.g., smaller than 0.5 picosecond) that the longitudinal time spread of the same pulse may be deemed as substantially zero compared with a difference between arrival times of any two consecutive pulses. FIG.16Cis a schematic diagram of an exemplary subsystem1600C of the multi-beam apparatus. Subsystem1600C is the same as subsystem1600B except that subsystem1600C includes a detector1652, in which one detection element may receive pulses from more than one deflected exiting beams. In some embodiments, the number (e.g., N3) of detection elements of detector1652may be one. For example, if detector1652has only one detection element with sufficiently high temporal resolution, even though second deflector1630deflects all deflected exiting beams to the detection element, detector1652may still be able to differentiate arrival times of all the pulses, and further differentiate which pulse comes from which initial exiting beam. In some embodiments, electrons having different energies may be further directed by second deflector1630into different detectors or detection elements. Typically, SEs have lower energy (e.g., smaller than 50 eV) than BSEs, and may result better SEM image resolution to show fine surface structures. Though BSEs have higher energies and may result worse SEM image resolution, it may reflect information of deeper structures under the surface. Therefore, it may be beneficial to differentiate SEs and BSEs for SEM image generation. In a substantial vacuum environment, the energy of electrons may be dominantly in the form of kinetic energy. As long as an electron has substantially no energy dissipation (e.g., due to collision with other particles, electric accelerations, electric decelerations, or the like), the electron may travel at a substantially constant speed. The higher the energy of the electron, the higher the travel speed the electron may have. That is, for the same pulse (including SEs and BSEs) of an initial exiting beam, the arrival times of SEs may lag the arrival times of BSEs, the difference of which may be represented as an “intra-pulse” temporal gap. The intra-pulse temporal gap may be smaller than an “inter-pulse” temporal gap between arrival times of different pulses, based on which the controller may determine whether two arrival times are associated with electrons of the same pulse or different pulses. If the controller determines that a temporal gap of arrival times is smaller enough (e.g., smaller than or equal to a predetermined threshold) to be deem as an intra-pulse gap, the controller may further determine that the first arrival electrons are BSEs and the second arrival electrons are SEs. In some embodiments, based on such determination, the controller may control the second deflector1630to deflect the SEs and the BSEs within the same pulse into different detection elements of detector1644. Based on the separately detected SEs and BSEs, SEM images for different purposes may be generated accordingly. In some embodiments, a Wien filter may also be used for separating SEs and BSEs such that SEs and BSEs may reach different detection elements. For example, the Wien filter may be positioned downstream from second deflector1630and act as a stand-alone SE/BSE separator. That is, second deflector1630does not deflect SEs and BSEs in this example. For another example, the Wien filter may be positioned upstream or downstream from second deflector1630and cooperate with second deflector1630for further separating the SEs and BSEs. That is, SEs and BSEs may be deflected or separated by second deflector1630and the Wien filter in this example. FIG.17is a flowchart showing an exemplary method1700for charged-particle detection using a multi-beam apparatus, consistent with embodiments of the present disclosure. Method1700may be performed by a controller that may be coupled with a charged particle beam apparatus (e.g., EBI system1). For example, the controller may be controller380inFIG.34. The controller may be programmed to implement method1700. At step1702, the controller controls a deflector system to direct a first charged-particle pulse and a second charged-particle pulse to a detection element of a detector. The first charged-particle pulse may be emitted from a first probing spot. The second charged-particle pulse may be emitted from a second probing spot. In some embodiments, the charged particles may be electrons. For example, the deflector system may be second deflector1630inFIG.16B. The first and second charged-particle pulses may be any two pulses of deflected exiting beams (e.g., deflected exiting beams1632,1634, and1636inFIG.16B). For example, the first charged-particle pulse may be a pulse of deflected exiting beam1632, and the second charged-particle pulse may be a pulse of deflected exiting beam1634. The detector may be detector1644or detector1652inFIGS.16B-16C. The detection element may be any of detection elements1646,1648, and1650. The first and second probing spots may be any two of probing spots1616,1618, and1620inFIGS.16A-16C, such as, for example, probing spots1616and1618, respectively. In some embodiments, the controller may control the deflector system to direct a first number (e.g., an integer N1) of charged-particle pulses (e.g., including the first and second charged-particle pulses) to a second number (e.g., an integer N2) of detection elements of the detector. For example, as shown inFIGS.16B-16C, the controller may control second deflector1630to direct N1 charged particle pulses from deflected exiting beams1632,1634, and1636to N2 detection elements of detector1644. In some embodiments, N1 may be greater than or equal to N2. In some embodiments, N2 may be greater than or equal to one. For example, as shown inFIG.16C, N2 may be 1. At step1704, the controller obtains first timestamp associated with when the first charged-particle pulse is directed by the deflector system, second timestamp associated with when the first charged-particle pulse is detected by the detection element, third timestamp associated with when the second charged-particle pulse is directed by the deflector system, and fourth timestamp associated with when the second charged-particle pulse is detected by the detection element. For example, the first and third time stamps may be included in the second timing information described in association withFIGS.16A-16C. The second and fourth timestamps may be included in the third timing information described in association withFIGS.16A-16C. In some embodiments, any one of the first or second charged-particle pulses may include at least one of SEs or BSEs. In some embodiments, using the deflector system (e.g., second deflector1630), at least one of a pulse of SEs or a pulse of BSEs may be formed based on time of the SEs and the BSEs arriving at the deflector system. For example, second deflector1630may deflect SEs and BSEs based on the in-pulse temporal gap as described in parts associated withFIG.16B. In some embodiments, the controller may obtain at least one of a first signal generated from the pulse of SEs or a second signal generated from the pulse of BSEs. In some embodiments, the first signal and the second signal may be generated by different detection elements (e.g., detection elements1646,1648, and1650). For example, the detector may include a first detection element (e.g., detection element1646) generating the first signal and a second detection element (e.g., detection element1648) generating the second signal. In some embodiments, the first signal and the second signal may be generated by the same detection element (e.g., detector1652). For example, the first signal and the second signal are generated at different timestamps by the detector1652. Still referring toFIG.17, at step1706, the controller identifies a first exiting beam based on associating the first timestamp and the second timestamp, and a second exiting beam based on associating the third timestamp and the fourth timestamp. For example, the controller may identify the first exiting beam starting from probing spot1616, passing through second deflector1630, and arriving at detection element1646based on at least the first and second timestamps. The controller may also identify the second exiting beam starting from probing spot1618, passing through second deflector1630, and arriving at detection element1648based on at least the third and fourth timestamps. In some embodiments, before controlling the deflector system to direct the first and second charged-particle pulses, the controller may control an incident deflector system to form a first incident charged-particle pulse and a second incident charged-particle pulse. The controller may further obtain fifth timestamp associated with when the first incident charged-particle pulse is formed, and a sixth timestamp associated with when the second incident charged-particle pulse is formed. The controller may then identify the first exiting beam based on associating the first timestamp, the second timestamp, and the fifth timestamp, and the second exiting beam based on associating the third timestamp, the fourth timestamp, and the sixth timestamp. The first and second incident charged-particle pulses may be incident at the first and second probing spots (e.g., probing sports1616and1618), respectively, on a surface of a sample. For example, the incident deflector system may be first deflector system1606inFIG.16A. The first and second incident charged-particle pulses may be any two incident charged-particle pulses of incident beams, such as incident beams1608,1610, and1612inFIG.16A. In some embodiments, the incident deflector system may be the deflector system. In some embodiments, the incident deflector system may not be the deflector system. In some embodiments, the controller may communicate with at least one of the deflector system, the incident deflector system, or the detector. In some embodiments, at least one of the deflector system (e.g., second deflector1630) or the incident deflector system (e.g., first deflector system1606) may include a radio-frequency cavity deflector. In some embodiments, using an electron optical system, the first and second charged-particle pulses may be focused on the detection element. For example, the electron optical system may be second projection lens system1638inFIGS.16B-16C. In some embodiments, the deflector system (e.g., second deflector1630) may be upstream from the electron optical system. In some embodiments, the deflector system may be downstream from the electron optical system. In some embodiments, the deflector system may be in the electron optical system. For example, as shown inFIGS.16B-16C, second projection lens system1638may include second deflector1630and secondary projection system1642, and second deflector1630is between condenser lens1640and secondary projection system1642. The embodiments may further be described using the following clauses: 1. A multi-beam apparatus for observing a sample, comprising: a deflector configured to form a plurality of deflected charged-particle beams from a primary charged-particle beam comprising a plurality of charged-particle pulses; a detector configured to detect a plurality of signals generated from a plurality of probe spots formed by the plurality of deflected charged-particle beams; and a controller configured to: obtain a first timing information related with formation of a deflected charged-particle beam of the plurality of charged-particle beams; obtain a second timing information related with detection of a signal of the plurality of signals; and associate the signal with the deflected charged-particle beam based on the obtained first and second timing information. 2. The multi-beam apparatus of clause 1, further comprising a charged-particle source, an acceleration cavity, and a bunching cavity. 3. The multi-beam apparatus of clause 2, wherein the charged-particle source comprises a pulsed radio-frequency source having a source frequency in a range of 100 MHz to 10 GHz. 4. The multi-beam apparatus of any one of clauses 1-3, wherein the deflector comprises one or more charged-particle deflectors, each of the one or more charged-particle deflectors forming the plurality of deflected charged-particle beams based on an operating frequency. 5. The multi-beam apparatus of clause 4, wherein the deflector is synchronized with the charged-particle source such that the operating frequency and the source frequency are related by the equation: v1=1n(v2) where v1 is the operating frequency, v2 is the source frequency, and n is a positive integer. 6. The multi-beam apparatus of any one of clauses 1-5, further comprising: an electron optical system; and a charged-particle beam scanning system configured to scan each of the plurality of deflected charged-particle beams on the sample. 7. The multi-beam apparatus of clause 6, wherein the electron optical system comprises one of a single-lens system or a multiple-lens system. 8. The multi-beam apparatus of any one of clauses 6 and 7, wherein the controller is further configured to communicate with at least one of the deflector, the charged-particle beam scanning system, and the detector. 9. The multi-beam apparatus of any one of clauses 1-8, wherein the plurality of probe spots formed by the plurality of deflected charged-particle beams comprise one of a one-dimensional or a two-dimensional pattern. 10. The multi-beam apparatus of clause 9, wherein the two-dimensional pattern comprises a Lissajous pattern, a matrix, or an array. 11. The multi-beam apparatus of any of preceding clauses, wherein the first time information comprises at least one of a time of deflection of a charged-particle pulse of the deflected charged-particle beam, a time of formation of a charged-particle pulse of the primary charged-particle beam, a frequency or a period of the deflected charged-particle beam, or an average number of electron pulses in the deflected charged-particle beam. 12. The multi-beam apparatus of clause 11, wherein the time of deflection of the charged-particle pulse of the deflected charged-particle beam comprises a timestamp when the deflector directs the charged-particle pulse of the deflected charged-particle beam into a direction to form a portion of the deflected charged-particle beam. 13. A method for observing a sample in a multi-beam apparatus, the method comprising: forming, using a deflector, a plurality of deflected charged-particle beams from a primary charged-particle beam comprising a plurality of charged-particle pulses; detecting, using a detector, a plurality of signals generated from a plurality of probe spots formed by the plurality of deflected charged-particle beams; obtaining, using a controller, a first timing information related with formation of a deflected charged-particle beam of the plurality of charged-particle beams, and a second timing information related with detection of a signal of the plurality of signals; and associating, using the controller, the signal with the deflected charged-particle beam based on the obtained first and second timing information. 14. The method of clause 13, wherein a pulsed radio-frequency charged-particle source is configured to generate the plurality of charged-particle pulses having a source frequency in a range of 100 MHz to 10 GHz. 15. The method of any one of clauses 13 and 14, wherein the deflector comprises one or more charged-particle deflectors, each of the one or more charged-particle deflectors forming the plurality of deflected charged-particle beams based on an operating frequency. 16. The method of clause 11, wherein the deflector is synchronized with the charged-particle source such that the operating frequency and the source frequency are related by the equation: v1=1n(v2) where v1 is the operating frequency, v2 is the source frequency, and n is a positive integer. 17. The method of any one of clauses 13-16, further comprising focusing the plurality of deflected charged-particle beams on the sample using an electron optical system. 18. The method of any one of clauses 13-17, further comprising scanning each of the plurality of deflected charged-particle beams on the sample using a charged-particle beam scanning system. 19. The method of any one of clauses 18, further comprising communicating, via the controller, with at least one of the deflector, the charged-particle beam scanning system, and the detector. 20. The method of any one of clauses 13-19, wherein the plurality of probe spots formed by the plurality of deflected charged-particle beams comprise one of a one-dimensional or a two-dimensional pattern. 21. The method of clause 20, wherein the two-dimensional pattern comprises a Lissajous pattern, a matrix, or an array. 22. The method of any of clauses 13-21, wherein the first time information comprises at least one of time of formation of the deflected charged-particle beam, a frequency or a period of the deflected charged-particle beam, or an average number of electron pulses in the deflected charged-particle beam. 23. The method of clause 22, wherein the time of formation of the deflected charged-particle beam comprises a timestamp when the deflector directs a charged-particle pulse into a direction to form the deflected charged-particle beam. 24. A controller of a multi-beam apparatus, comprising: a memory storing a set of instructions; and a processor configured to execute the set of instructions to cause the controller to: obtain a first timing information related with formation of a deflected charged-particle beam of a plurality of charged-particle beams; obtain a second timing information related with detection of a signal of a plurality of signals; and associate the signal with the deflected charged-particle beam based on the obtained first and second timing information. 25. A non-transitory computer readable medium storing a set of instructions that is executable by one or more processors of a multi-beam apparatus to cause the multi-beam apparatus to perform a method to observe a sample, the method comprising: forming a plurality of deflected charged-particle beams from a primary charged-particle beam comprising a plurality of charged-particle pulses; detecting a plurality of signals generated from a plurality of probe spots formed by the plurality of deflected charged-particle beams; obtaining a first timing information related with formation of a deflected charged-particle beam of the plurality of charged-particle beams, and a second timing information related with detection of a signal of the plurality of signals; and associating the signal with the deflected charged-particle beam based on the obtained first and second timing information. 26. The non-transitory computer readable medium of clause 25, wherein the set of instructions that is executable by one or more processors of a multi-beam apparatus cause the multi-beam apparatus to further perform: focusing the plurality of deflected charged-particle beams on the sample using an electron optical system; and scanning each of the plurality of focused deflected charged-particle beams on the sample using a charged-particle beam scanning system. modify the associated beam current of each of the plurality of beamlets; and focus each of the plurality of beamlets on a focal plane. 27. A multi-beam apparatus comprising: a charged-particle source configured to generate a primary charged-particle beam comprising a plurality of charged-particle pulses; a bunching cavity configured to form a plurality of charged-particle beams from the primary charged-particle beam; and a deflector configured to deflect the plurality of charged-particle beams to form a plurality of probe spots on a sample. 28. The apparatus of clause 27, further comprising a detector configured to detect a plurality of signals generated from the plurality of probe spots formed by the plurality of deflected charged-particle beams. 29. The apparatus of any one of clauses 27 and 28, further comprising a controller configured to: obtain a first timing information related with formation of the deflected charged-particle beam of the plurality of charged-particle beams; obtain a second timing information related with detection of a signal of the plurality of signals; and associate the signal with the deflected charged-particle beam based on the obtained first and second timing information. 30. The apparatus of clause 29, wherein the first time information comprises at least one of time of formation of the deflected charged-particle beam, a frequency or a period of the deflected charged-particle beam, or an average number of electron pulses in the deflected charged-particle beam. 31. The apparatus of clause 30, wherein the time of formation of the deflected charged-particle beam comprises a timestamp when the deflector directs a charged-particle pulse into a direction to form the deflected charged-particle beam. 32. The apparatus of any one of clauses 27-29, wherein the charged-particle source comprises a pulsed radio-frequency source having a source frequency in a range of 100 MHz to 10 GHz. 33. The apparatus of any one of clauses 27-32, wherein the deflector comprises one or more charged-particle deflectors, each of the one or more charged-particle deflectors deflecting the plurality of charged-particle beams based on an operating frequency. 34. A method for observing a sample in a multi-beam apparatus, the method comprising: generating a primary charged-particle beam comprising a plurality of charged-particle pulses from a charged-particle source; forming, using a bunching cavity, a plurality of charged-particle beams from the primary charged-particle beam; and deflecting, using a deflector, the plurality of charged-particle beams to form a plurality of probe spots on a sample. 35. The method of clause 34, further comprising detecting the plurality of signals generated from the plurality of probe spots formed by the plurality of deflected charged-particle beams. 36. The method of any one of clauses 34 and 35, further comprising: obtaining, using a controller, a first timing information related with formation of the deflected charged-particle beam of the plurality of charged-particle beams; obtaining, using the controller, a second timing information related with detection of a signal of the plurality of signals; and associating, using the controller, the signal with the deflected charged-particle beam based on the obtained first and second timing information. 37. The method of clause 36, wherein the first time information comprises at least one of time of formation of the deflected charged-particle beam, a frequency or a period of the deflected charged-particle beam, or an average number of electron pulses in the deflected charged-particle beam. 38. The method of clause 37, wherein the time of formation of the deflected charged-particle beam comprises a timestamp when the deflector directs a charged-particle pulse into a direction to form the deflected charged-particle beam. 39. The method of any one of clauses 34-36, wherein the charged-particle source comprises a pulsed radio-frequency source configured to generate the plurality of charged-particle pulses having a source frequency in a range of 100 MHz to 10 GHz 40. The method of any one of clauses 34-39, wherein the deflector comprises one or more charged-particle deflectors, each of the one or more charged-particle deflectors deflecting the plurality of charged-particle beams based on an operating frequency. 41. An apparatus for observing a sample, comprising: a deflector configured to deflect a plurality of pulses of charged particles to a plurality of probe spots on a sample; a detector configured to detect a plurality of signals from the sample that result from the plurality of pulses interacting with the sample; and a controller configured to correlate a particular detected signal to a particular probe spot on the sample based on a correlation between a time that the particular signal generated from the particular probe spot was detected and a time that a particular charged particle pulse forming the particular probe spot was deflected. 42. The apparatus of clause 41, further comprising a charged particle source, an acceleration cavity, and a bunching cavity. 43. The apparatus of clause 42, wherein the charged-particle source comprises a pulsed radio-frequency source having a source frequency in a range of 100 MHz to 10 GHz. 44. The apparatus of any one of clauses 41-43, wherein the deflector comprises one or more charged-particle deflectors, each of the one or more charged-particle deflectors deflecting the plurality of pulses of charged particles based on an operating frequency. 45. The apparatus of clause 44, the deflector is synchronized with the charged-particle source such that the operating frequency and the source frequency are related by the equation: v1=1n(v2) where v1 is the operating frequency, v2 is the source frequency, and n is a positive integer. 46. The apparatus of any one of clauses 41-45, further comprising: an electron optical system; and a charged particle beam scanning system configured to scan each of the plurality of deflected pulses of charged particles on the sample. 47. The apparatus of clause 46, wherein the electron optical system comprises one of a single-lens system or a multiple-lens system. 48. The apparatus of any one of clauses 46 and 47, wherein the controller is further configured to communicate with at least one of the deflector, the charged-particle beam scanning system, and the detector. 49. A multi-beam apparatus for charged-particle detection, comprising: a deflector system configured to direct charged-particle pulses; a detector having a detection element, the detection element configured to detect the charged-particle pulses; and a controller having a circuitry configured to:control the deflector system to direct a first charged-particle pulse and a second charged-particle pulse to the detection element, wherein the first charged-particle pulse is emitted from a first probing spot, and the second charged-particle pulse is emitted from a second probing spot;obtain a first timestamp associated with when the first charged-particle pulse is directed by the deflector system, a second timestamp associated with when the first charged-particle pulse is detected by the detection element, a third timestamp associated with when the second charged-particle pulse is directed by the deflector system, and a fourth timestamp associated with when the second charged-particle pulse is detected by the detection element; andidentify a first exiting beam based on the first timestamp and the second timestamp, and a second exiting beam based on the third timestamp and the fourth timestamp. 50. The multi-beam apparatus of clause 49, wherein the circuitry configured to control the deflector system to direct the first charged-particle pulse and the second charged-particle pulse is further configured to: control the deflector system to direct N charged-particle pulses to M detection elements of the detector, wherein the N charged-particle pulses comprise the first charged-particle pulse and the second charged-particle pulse, and wherein N and M are integers. 51. The multi-beam apparatus of clause 50, wherein the N is greater than or equal to M. 52. The multi-beam apparatus of any one of clauses 50-51, wherein M is greater than or equal to one. 53. The multi-beam apparatus of clause 51, wherein N is equal to one. 54. The multi-beam apparatus of any one of clauses 50-52, wherein the circuitry is further configured to: before controlling the deflector system to direct the first charged-particle pulse and the second charged-particle pulse, control an incident deflector system to form a first incident charged-particle pulse and a second incident charged-particle pulse, wherein the first incident charged-particle pulse is configured to be incident at the first probing spot on a surface of a sample, and the second incident charged-particle pulse is configured to be incident at the second probing spot on the surface of the sample; obtain fifth timestamp associated with forming of the first incident charged-particle pulse, and a sixth timestamp associated with forming of the second incident charged-particle pulse; and identify the first exiting beam based on the first timestamp, the second timestamp, and the fifth timestamp, and the second exiting beam based on the third timestamp, the fourth timestamp, and the sixth timestamp. 55. The multi-beam apparatus of clause 54, wherein the circuitry is further configured to communicate with at least one of the deflector system, the incident deflector system, or the detector. 56. The multi-beam apparatus of any one of clauses 54-55, wherein at least one of the deflector system or the deflector system comprises a radio-frequency cavity deflector. 57. The multi-beam apparatus of any one of clauses 49-56, wherein any one of the first charged-particle pulse and the second charged-particle pulse comprises at least one of secondary electrons or backscattered electrons. 58. The multi-beam apparatus of clause 57, wherein the deflector system is further configured to form at least one of a pulse of secondary electrons or a pulse of backscattered electrons based on time of the secondary electrons and the backscattered electrons arriving at the deflector system. 59. The multi-beam apparatus of clause 58, wherein the circuitry is further configured to obtain at least one of a first signal generated from the pulse of secondary electrons or a second signal generated from the pulse of backscattered electrons. 60. The multi-beam apparatus of clause 59, wherein the detector comprises a first detection element configured to generate the first signal and a second detection element configured to generate the second signal. 61. The multi-beam apparatus of clause 59, wherein the detection element is configured to generate the first signal and the second signal are generated at different timestamps. 62. The multi-beam apparatus of any one of clauses 49-63, further comprising: an electron optical system configured to focus the first charged-particle pulse and the second charged-particle pulse on the detection element. 63. The multi-beam apparatus of clause 62, wherein the deflector system is upstream from the electron optical system. 64. The multi-beam apparatus of clause 62, wherein the deflector system is downstream from the electron optical system. 65. The multi-beam apparatus of clause 62, wherein the deflector system is in the electron optical system. 66. A method for charged-particle detection in a multi-beam apparatus, the method comprising: controlling a deflector system to direct a first charged-particle pulse and a second charged-particle pulse to a detection element of a detector; obtaining, using a controller, a first timestamp associated with when the first charged-particle pulse is directed by the deflector system, a second timestamp associated with when the first charged-particle pulse is detected by the detection element, a third timestamp associated with when the second charged-particle pulse is directed by the deflector system, and a fourth timestamp associated with when the second charged-particle pulse is detected by the detection element; and identifying, using a controller, a first exiting beam based on the first timestamp and the second timestamp, and a second exiting beam based on the third timestamp and the fourth timestamp. 67. The method of clause 66, wherein the first charged-particle is emitted from a first probing spot, and the second charged-particle is emitted from a second probing spot. 68. The method of any of clauses 66-67, wherein controlling the deflector system to direct the first charged-particle pulse and the second charged-particle pulse comprises: controlling the deflector system to direct N charged-particle pulses to M detection elements of the detector, wherein the N charged-particle pulses comprise the first charged-particle pulse and the second charged-particle pulse, and wherein N and M are integers. 69. The method of clause 68, wherein N is greater than or equal to M. 70. The method of any one of clauses 68-69, wherein M is greater than or equal to one. 71. The method of clause 69, wherein N is equal to one. 72. The method of any one of clauses 66-70, further comprising: before controlling the deflector system to direct the first charged-particle pulse and the second charged-particle pulse, controlling an incident deflector system to form a first incident charged-particle pulse and a second incident charged-particle pulse, wherein the first incident charged-particle pulse is configured to be incident at the first probing spot on a surface of a sample, and the second incident charged-particle pulse is configured to be incident at the second probing spot on the surface of the sample; obtaining fifth timestamp associated with when the first incident charged-particle pulse is formed, and a sixth timestamp associated with when the second incident charged-particle pulse is formed; and identifying the first exiting beam based on the first timestamp, the second timestamp, and the fifth timestamp, and the second exiting beam based on the third timestamp, the fourth timestamp, and the sixth timestamp. 73. The method of clause 72, further comprising: communicating, by the controller, with at least one of the deflector system, the incident deflector system, or the detector. 74. The method of any one of clauses 72-73, wherein at least one of the deflector system or the incident deflector system comprises a radio-frequency cavity deflector. 75. The method of any one of clauses 66-74, wherein any one of the first charged-particle pulse and the second charged-particle pulse comprises at least one of secondary electrons or backscattered electrons. 76. The method of clause 75, further comprising: forming, using the deflector system, at least one of a pulse of secondary electrons or a pulse of backscattered electrons based on time of the secondary electrons and the backscattered electrons arriving at the deflector system. 77. The method of clause 76, further comprising: obtaining at least one of a first signal generated from the pulse of secondary electrons or a second signal generated from the pulse of backscattered electrons. 78. The method of clause 77, wherein the detector comprises a first detection element generating the first signal and a second detection element generating the second signal. 79. The method of clause 77, wherein the first signal and the second signal are generated at different timestamps by the detection element. 80. The method of any one of clauses 66-79, further comprising: focusing the first charged-particle pulse and the second charged-particle pulse on the detection element using an electron optical system. 81. The method of any one of clauses 80, wherein the deflector system is upstream from the electron optical system. 82. The method of any one of clauses 80, wherein the deflector system is downstream from the electron optical system. 83. The method of any one of clauses 80, wherein the deflector system is in the electron optical system. 84. A non-transitory computer readable medium storing a set of instructions that is executable by one or more processors of a multi-beam apparatus to cause the multi-beam apparatus to perform a method for charged-particle detection, the method comprising: controlling a deflector system to direct a first charged-particle pulse and a second charged-particle pulse to a detection element of a detector; obtaining, using a controller, first timestamp associated with when the first charged-particle pulse is directed by the deflector system, second timestamp associated with when the first charged-particle pulse is detected by the detection element, third timestamp associated with when the second charged-particle pulse is directed by the deflector system, and fourth timestamp associated with when the second charged-particle pulse is detected by the detection element; and identifying, using a controller, a first exiting beam based on associating the first timestamp and the second timestamp, and a second exiting beam based on associating the third timestamp and the fourth timestamp. 85. A multi-beam apparatus for reducing interaction of charged particles, the apparatus comprising: a first cluster cavity configured to receive a first set of charged particles to form a first cluster of charged particles; a second cluster cavity configured to receive a second set of charged particles to form a second cluster of charged particles; and a controller having a circuitry configured to cause the first cluster and the second cluster to pass a downstream position in a predetermined time-space order. 86. The multi-beam apparatus of clause 85, wherein the first set of charged particles and the second set of charged particles comprise charged-particle pulses. 87. The multi-beam apparatus of clause 85, wherein the first set of charged particles and the second set of charged particles comprise a continuous charged-particle stream. 88. The multi-beam apparatus of any of clauses 85-87, wherein the predetermined time-space order comprises that the first cluster and the second cluster pass the downstream position in sequence. 89. The multi-beam apparatus of clause 88, wherein the predetermined time-space order comprises that at most one of the first cluster and the second cluster passes the downstream position at any time. 90. The multi-beam apparatus of any of clauses 85-89, further comprising: a plurality of cluster cavities configured to receive respective sets of charged particles by each cluster cavity to form a plurality of beams, whereineach beam comprises clusters of charged particles, andthe controller is configured to cause the clusters of the plurality of beams to pass the downstream position in the predetermined time-space order. 91. The multi-beam apparatus of clause 90, wherein the predetermined time-space order comprises that the clusters of the plurality of beams pass the downstream position in non-overlapping sequence. 92. The multi-beam apparatus of clause 91, wherein the predetermined time-space order comprises that at most one of the clusters of the plurality of beams passes the downstream position at any time. 93. The multi-beam apparatus of any one of clauses 85-92, further comprising an objective lens, wherein the downstream position is near or in the objective lens. 94. The multi-beam apparatus of any one of clauses 85-93, wherein the first cluster cavity is provided with a first dynamic electric field, and the second cluster cavity is provided with a second dynamic electric field. 95. The multi-beam apparatus of clause 94, wherein the controller is further configured to: coordinate the first dynamic electric field and the second dynamic electric field to change. 96. The multi-beam apparatus of any one of clauses 94-95, wherein the controller is further configured to: change a direction of the first dynamic electric field parallel to a direction of the first cluster, and a direction of the second dynamic electric field parallel to a direction of the second cluster. 97. The multi-beam apparatus of clause 96, wherein the controller is further configured to: change at least one of the direction of the first dynamic electric field or the direction of the second dynamic electric field in a first cycle. 98. The multi-beam apparatus of clause 96, wherein the controller is further configured to: determine the first cycle based on at least one of a scan frequency of the multi-beam apparatus or a number of beams. 99. The multi-beam apparatus of any one of clauses 94-98, wherein the controller is further configured to: cause the first dynamic electric field to decelerate a first charged particle before a second charged particle enters the first cluster cavity, wherein the at least two charged particles comprise the first charged particle and the second charged particle; and when the second charged particle enters the first cluster cavity, control the first dynamic electric field for causing the second charged particle to move faster than the first charged particle. 100. The multi-beam apparatus of clause 99, wherein the controller configured to control the first dynamic electric field is further configured to perform one of: accelerating the second charged particle; neither accelerating nor decelerating the second charged particle; or decelerating the second charged particle in a lesser degree than decelerating the first charged particle. 101. The multi-beam apparatus of any one of clauses 99-100, further comprising: a third cluster cavity downstream from the first cluster cavity and being provided with a third dynamic electric field, configured to receive the first cluster, wherein the controller is further configured to cause, using the third dynamic electric field, the first charged particle and the second charged particle to move in a substantially similar speed. 102. The multi-beam apparatus of clause 101 wherein the controller is further configured to: cause the third dynamic electric field to decelerate the second charged particle to move at the substantially similar speed. 103. The multi-beam apparatus of any one of clauses 101-102, wherein the controller is further configured to: coordinate the third dynamic electric field and the first dynamic electric field to change. 104. The multi-beam apparatus of any one of clauses 101-103, wherein the controller is further configured to: change a direction of the third dynamic electric field parallel to a direction of the first cluster. 105. The multi-beam apparatus of clause 104 wherein the controller is further configured to: change the direction of the third dynamic electric field in a second cycle. 106. The multi-beam apparatus of clause 105, wherein the controller is further configured to: determine the second cycle based on at least one of the scan frequency of the multi-beam apparatus, the number of the beams, or the first cycle. 107. The multi-beam apparatus of any one of clauses 94-106, further comprising: a filter cavity downstream from the first cluster cavity and being provided with a dynamic electromagnetic field, wherein the filter cavity is configured to receive the first cluster and a first stray charged particle, the dynamic electromagnetic field comprising at least one of a third dynamic electric field or a dynamic magnetic field; wherein the controller is further configured to control the filter cavity to filter the first stray charged particle using the dynamic electromagnetic field. 108. The multi-beam apparatus of clause 107, wherein the controller is further configured to: change a direction of the dynamic electromagnetic field perpendicular to the direction of the first cluster. 109. The multi-beam apparatus of any one of clauses 107-108, wherein the controller is further configured to: when the first cluster is in the filter cavity, cause the dynamic electromagnetic field not to direct the first cluster; and when the first cluster is not in the filter cavity, cause the dynamic electromagnetic field to direct the first stray charged particle away from the direction of the first cluster. 110. The multi-beam apparatus of any one of clauses 107-109, wherein the controller is further configured to: coordinate the dynamic electromagnetic field and the first dynamic electric field to change. 111. The multi-beam apparatus of any one of clauses 108-110, wherein the controller is further configured to: change the direction of the dynamic electromagnetic field in a third cycle. 112. The multi-beam apparatus of clause 111, wherein the controller is further configured to: determine the third cycle based on at least one of the scan frequency of the multi-beam apparatus, the number of the beams, the first cycle, or the second cycle. 113. The multi-beam apparatus of any one of clauses 107-112, further comprising: an aperture plate downstream from the filter cavity and configured to filter a second stray charged particle. 114. The multi-beam apparatus of any one of clauses 111-113, wherein the filter cavity and the aperture plate are upstream from or downstream from the third cluster cavity. 115. The multi-beam apparatus of any one of clauses 111-113, wherein the third cluster cavity is between the filter cavity and the aperture plate. 116. The multi-beam apparatus of any one of clauses 85-115, wherein the controller is further configured to: cause the first cluster to exit the first cluster cavity and the second cluster to exit the second cluster cavity in an alternate manner, wherein the first cluster and the second cluster pass the downstream position in the alternate manner. 117. A method for reducing interaction of charged particles in a charged-particle beam of a multi-beam apparatus, the method comprising: receiving a first set of charged particles in a first cluster cavity to form a first cluster of charged particles; receiving a second set of charged particles in a second cluster cavity to form a second cluster of charged particles; and causing the first cluster and the second cluster to pass a downstream position in a predetermined time-space order. 118. The method of clause 117, wherein the first set of charged particles and the second set of charged particles comprise charged-particle pulses. 119. The method of clause 117 wherein the first set of charged particles and the second set of charged particles comprise a continuous charged-particle stream. 120. The method of any of clauses 117-119, wherein the predetermined time-space order comprises that the first cluster and the second cluster pass the downstream position in sequence. 121. The method of clause 120 wherein the predetermined time-space order comprises that at most one of the first cluster and the second cluster passes the downstream position at any time. 122. The method of any of clauses 117-121, further comprising: receiving respective sets of charged particles in each cluster cavity of a plurality of cluster cavities to form a plurality of beams, each beam comprising clusters of charged particles; and causing the clusters of the plurality of beams to pass the downstream position in the predetermined time-space order. 123. The method of clause 122, wherein the predetermined time-space order comprises that the clusters of the plurality of beams pass the downstream position in non-overlapping sequence. 124. The method of clause 123, wherein the predetermined time-space order comprises that at most one of the clusters of the plurality of beams passes the downstream position at any time. 125. The method of any one of clauses 117-124, wherein the downstream position is near or in an objective lens in the multi-beam apparatus. 126. The method of any one of clauses 117-125, wherein the first cluster cavity is provided with a first dynamic electric field, and the second cluster cavity is provided with a second dynamic electric field. 127. The method of clause 126, further comprising: coordinating the first dynamic electric field and the second dynamic electric field to change. 128. The method of any one of clauses 126-127, further comprising: changing a direction of the first dynamic electric field parallel to a direction of the first cluster, and a direction of the second dynamic electric field parallel to a direction of the second cluster. 129. The method of clause 128, further comprising: changing at least one of the direction of the first dynamic electric field or the direction of the second dynamic electric field in a first cycle. 130. The method of clause 129, further comprising: determining the first cycle based on at least one of a scan frequency of the multi-beam apparatus or a number of beams. 131. The method of any one of clauses 126-130, wherein the receiving the first set of pulses of charged particles in the first cluster cavity to form the first cluster of charged particles comprises: causing the first dynamic electric field to decelerate a first charged particle before a second charged particle enters the first cluster cavity, wherein the at least two charged particles comprise the first charged particle and the second charged particle; and when the second charged particle enters the first cluster cavity, controlling the first dynamic electric field for causing the second charged particle to move faster than the first charged particle. 132. The method of clause 131, wherein controlling the first dynamic electric field for causing the second charged particle to move faster than the first charged particle comprises one of: accelerating the second charged particle; neither accelerating nor decelerating the second charged particle; or decelerating the second charged particle in a lesser degree than decelerating the first charged particle. 133. The method of any one of clauses 131-132, wherein the forming the first cluster of charged particles comprises: receiving the first cluster in a third cluster cavity downstream from the first cluster cavity; and causing, using a third dynamic electric field in the third cluster cavity, the first charged particle and the second charged particle to move in a substantially similar speed. 134. The method of clause 133, wherein the causing the first charged particle and the second charged particle to move in the substantially similar speed comprises: causing the third dynamic electric field to decelerate the second charged particle to move at the substantially similar speed. 135. The method of any one of clauses 133-134, further comprising: coordinating the third dynamic electric field and the first dynamic electric field to change. 136. The method of any one of clauses 133-135, further comprising: changing a direction of the third dynamic electric field parallel to a direction of the first cluster. 137. The method of clause 136, further comprising: changing the direction of the third dynamic electric field in a second cycle. 138. The method of clause 137, further comprising: determining the second cycle based on at least one of the scan frequency of the multi-beam apparatus, the number of the beams, or the first cycle. 139. The method of any one of clauses 126-138, wherein the receiving the first set of pulses of charged particles in the first cluster cavity to form the first cluster of charged particles further comprises: receiving the first cluster and a first stray charged particle in a filter cavity downstream from the first cluster cavity; and filtering the first stray charged particle using a dynamic electromagnetic field in the filter cavity, the dynamic electromagnetic field comprising at least one of a third dynamic electric field or a dynamic magnetic field. 140. The method of clause 139, further comprising: changing a direction of the dynamic electromagnetic field perpendicular to the direction of the first cluster. 141. The method of any one of clauses 139-140, wherein the filtering the first stray charged particle comprises: when the first cluster is in the filter cavity, causing the dynamic electromagnetic field not to direct the first cluster; and when the first cluster is not in the filter cavity, causing the dynamic electromagnetic field to direct the first stray charged particle away from the direction of the first cluster. 142. The method of any one of clauses 139-141, further comprising: coordinating the dynamic electromagnetic field and the first dynamic electric field to change. 143. The method of any one of clauses 140-142, further comprising: changing the direction of the dynamic electromagnetic field in a third cycle. 144. The method of clause 143, further comprising: determining the third cycle based on at least one of the scan frequency of the multi-beam apparatus, the number of the beams, the first cycle, or the second cycle. 145. The method of any one of clauses 139-144, wherein the forming the first cluster of charged particles further comprises: filtering a second stray charged particle using an aperture plate downstream from the filter cavity. 146. The method of any one of clauses 133-145, wherein the filter cavity and the aperture plate are upstream from or downstream from the third cluster cavity. 147. The method of any one of clauses 133-145, wherein the third cluster cavity is between the filter cavity and the aperture plate. 148. The method of any one of clauses 117-147, wherein the causing the first cluster and the second cluster to pass the downstream position comprises: causing the first cluster to exit the first cluster cavity and the second cluster to exit the second cluster cavity in an alternate manner, wherein the first cluster and the second cluster pass the downstream position in the alternate manner. 149. A non-transitory computer readable medium storing a set of instructions that is executable by one or more processors of a multi-beam apparatus to cause the multi-beam apparatus to perform a method for reducing interaction of charged particles in a charged-particle beam, the method comprising: receiving a first set of charged particles in a first cluster cavity to form a first cluster of charged particles; receiving a second set of charged particles in a second cluster cavity to form a second cluster of charged particles; and causing the first cluster and the second cluster to pass a downstream position in a predetermined time-space order. 150. A multi-beam apparatus, the multi-beam apparatus comprising: a first charged-particle source; a second charged-particle source; and at least one deflector system downstream from the first charged-particle source and the second charged-particle source, configured to:receive a first beam of pulsed charged particles from the first charged-particle source and a second beam of pulsed charged particles from the second charged-particle source; anddirect the first beam and the second beam in a predetermined time-space order, wherein the first beam and the second beam pass a downstream position in sequence. 151. The multi-beam apparatus of clause 150, wherein the first charged-particle source and the second charged-particle source are charged-particle pulse generators. 152. The multi-beam apparatus of clause 151, wherein a pulse generator comprises a charged-particle emitter and a pulse laser generator. 153. The multi-beam apparatus of any one of clauses 150-152, wherein the first beam and the second beam are beams of clustered charged particles. 154. The multi-beam apparatus of any one of clauses 150-153, wherein the at least one deflector system comprises a radio-frequency cavity deflector. 155. The multi-beam apparatus of any one of clauses 150-154, wherein the at least one deflector system comprises a first deflector receiving the first beam and a second deflector receiving the second beam. 156. The multi-beam apparatus of any one of clauses 150-154, wherein the at least one deflector system comprises a deflector receiving the first beam and the second beam. 157. The multi-beam apparatus of any one of clauses 155-156, wherein the first deflector and the second deflector are arranged to be on a same plane. 158. The multi-beam apparatus of any one of clauses 155-157, wherein the first deflector and the second deflector are arranged to be on different planes. 159. The multi-beam apparatus of any one of clauses 150-158, wherein the at least one deflector system is further configured to: release the first beam and the second beam in sequence. 160. The multi-beam apparatus of any one of clauses 150-159, wherein the at least one deflector system is further configured to: direct the first beam in a first direction and the second beam in a second direction. 161. The multi-beam apparatus of any one of clauses 150-160, wherein the predetermined time-space order comprises that a distance between the first beam and the second beam decreases after the at least one deflector system releases the first beam and the second beam. 162. The multi-beam apparatus of any one of clauses 150-161, wherein the predetermined time-space order comprises that the first beam and the second beam are parallel after the at least one deflector system releases the first beam and the second beam. 163. The multi-beam apparatus of any one of clauses 150-162, further comprising: an aperture plate downstream from the at least one deflector system, comprising a first aperture and a second aperture, wherein the first aperture receives the first beam, and the second aperture receives the second beam. 164. The multi-beam apparatus of any one of clauses 150-163, wherein the at least one deflector system is further configured to: form a first cluster of charged particles using the first beam and a second cluster of charged particles using the second beam; and release the first cluster and the second cluster in the predetermined time-space order. 165. The multi-beam apparatus of clause 164, wherein the at least one deflector system is further configured to: release the first cluster and the second cluster in sequence, wherein the first cluster and the second cluster pass the downstream position in sequence. 166. A method for providing multiple charged-particle beams in a multi-beam apparatus, the method comprises: receiving, in at least one deflector system, a first beam of pulsed charged particles from a first charged-particle source and a second beam of pulsed charged particles from a second charged-particle source; and directing the first beam and the second beam in a predetermined time-space order, wherein the first beam and the second beam pass a downstream position in sequence. 167. The method of clause 166, wherein the first charged-particle source and the second charged-particle source are charged-particle pulse generators. 168. The method of clause 167, wherein a pulse generator comprises a charged-particle emitter and a pulse laser generator. 169. The method of any one of clauses 166-168, wherein the first beam and the second beam are beams of clustered charged particles. 170. The method of any one of clauses 166-169, wherein the at least one deflector system comprises a radio-frequency cavity deflector. 171. The method of any one of clauses 166-170, wherein the receiving the first beam and the second beam comprises: receiving the first beam in a first deflector and the second beam in a second deflector, wherein the at least one deflector system comprises the first deflector and the second deflector. 172. The method of any one of clauses 166-170, wherein the receiving the first beam and the second beam comprises: receiving the first beam and the second beam in a deflector, wherein the at least one deflector system comprises the deflector. 173. The method of any one of clauses 171-172, wherein the first deflector and the second deflector are arranged to be on a same plane. 174. The method of any one of clauses 171-173, wherein the first deflector and the second deflector are arranged to be on different planes. 175. The method of any one of clauses 166-174, wherein the directing the first beam and the second beam in the predetermined time-space order comprises: releasing the first beam and the second beam in sequence. 176. The method of any one of clauses 166-175, wherein the directing the first beam and the second beam in the predetermined time-space order comprises: directing the first beam in a first direction and the second beam in a second direction. 177. The method of any one of clauses 166-176, wherein the predetermined time-space order comprises that a distance between the first beam and the second beam decreases after the at least one deflector system releases the first beam and the second beam. 178. The method of any one of clauses 166-177, wherein the predetermined time-space order comprises that the first beam and the second beam are parallel after the first beam and the second beam are released. 179. The method of any one of clauses 166-178, further comprising: receiving the first beam by a first aperture and the second beam by a second aperture, wherein the first aperture and the second aperture are in an aperture plate downstream from the at least one deflector system. 180. The method of any one of clauses 166-179, wherein the directing the first beam and the second beam in the predetermined time-space order comprises: forming a first cluster of charged particles using the first beam and a second cluster of charged particles using the second beam; and releasing the first cluster and the second cluster in the predetermined time-space order. 181. The method of clause 180, wherein the releasing the first cluster and the second cluster in the predetermined time-space order comprises: releasing the first cluster and the second cluster in sequence, wherein the first cluster and the second cluster pass the downstream position in sequence. 182. A non-transitory computer readable medium storing a set of instructions that is executable by one or more processors of a multi-beam apparatus to cause the multi-beam apparatus to perform a method for providing multiple charged-particle beams, the method comprising: receiving, in at least one deflector system, a first beam of pulsed charged particles from a first charged-particle source and a second beam of pulsed charged particles from a second charged-particle source; and directing the first beam and the second beam in a predetermined time-space order, wherein the first beam and the second beam pass a downstream position in sequence. The controller may comprise switching circuits, timing control circuits, processors, data storage modules, analog and digital circuit components, input and output ports, a communication module, etc. A non-transitory computer readable medium may be provided that stores instructions for a processor to carry out pulse generation, pulse detection, image inspection, image acquisition, stage positioning, beam focusing, electric field adjustment, beam bending, etc. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), and Erasable Programmable Read Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same. It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof. The present disclosure has been described in connection with various embodiments, other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims. The descriptions above are intended to be illustrative, not limiting. Thus, it will be apparent to one skilled in the art that modifications may be made as described without departing from the scope of the claims set out below. | 209,025 |
11942303 | DETAILED DESCRIPTION Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the invention. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the invention as recited in the appended claims. For example, although some embodiments are described in the context of utilizing electron beams, the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photo detection, x-ray detection, etc. The enhanced computing power of electronic devices, while reducing the physical size of the devices, can be accomplished by significantly increasing the packing density of circuit components such as, transistors, capacitors, diodes, etc. on an IC chip. For example, in a smart phone, an IC chip (which is the size of a thumbnail) may include over 2 billion transistors, the size of each transistor being less than 1/1000th of a human hair. Not surprisingly, semiconductor IC manufacturing is a complex process, with hundreds of individual steps. Errors in even one step have the potential to dramatically affect the functioning of the final product. Even one “killer defect” can cause device failure. The goal of the manufacturing process is to improve the overall yield of the process. For example, for a 50-step process to get 75% yield, each individual step must have a yield greater than 99.4%, and if the individual step yield is 95%, the overall process yield drops to 7%. While high process yield is desirable in an IC chip manufacturing facility, it is also essential to maintain a high wafer throughput, defined as the number of wafers processed per hour. High process yields, and high wafer throughput can be impacted by the presence of defects, especially when operator intervention is involved. Thus, detection and identification of micro and nano-sized defects by inspection tools (such as, a SEM) may be essential for maintaining high yields and low cost. Moreover, as IC chips are manufactured, multiple layers are placed on top of each other during the manufacturing process. Accordingly, it is also important to be able to inspect the three-dimensional structure of the IC chip in an efficient manner to that can maintain high process yields and high wafer throughput. In a charged-particle beam imaging or inspection system, such as, for example, a SEM, the charged-particle beam may be focused on the wafer to produce an image of the layout for the IC chip. As more and more layers are deposited onto the IC chip, charged-particle beams focused on the sides of structures of the IC chip can provide a three-dimensional view of the components on the IC chip for inspection. To accomplish this, the charged-particle beam can be directed at the IC chip at an angle that is relative to a line perpendicular to the surface of the chip. But directing a charged-particle at such an angle can be accomplished in different ways. Some methods use a single charged-particle beam and rotate the stage that holds the IC chip so that the beam can image side walls of structures of the IC chip as the stage rotates. However, this method is slow and requires complex mechanical movement and adjustment of the stage which prevents the use of this method for real-time inspection. Other systems include deflecting a single-charged particle beam to illuminate the sides of structures an IC chip. But these methods only work for small inspection angles and provide significantly degraded results as the inspection angle increases. None of the present systems provide for real time stereo or three-dimensional imaging while also providing effective imaging resolution at larger imaging angles (e.g., over 30). To meet the need for high resolution, three-dimensional imaging at larger imaging angles and in real-time, the charged-particle beam system can utilize multiple particle beams for imaging the different parts of the IC chip. For example, different charged-particle beams can be used to image the top, left, right, front, and back of the IC chip or structures on the IC chip. Images for these various portions of the IC chip can be taken rapidly in sequence and combined to create the three-dimensional image. Because of the speed at which the system can take and combine the different images, the system can still operate in real time for the purposes of IC chip inspection even when imaging each surface of the IC chip sequentially. By operating in real time, the feedback produced by the inspection system can be captured and processed without slowing the manufacturing process and reducing wafer throughput. A first charged-particle beam can be emitted directly toward the IC chip as shown inFIG.3Aby electron beam305. This particle beam can pass through a condenser lens and through an optical lens that focuses the charged particle beam on the top of the chip providing a top-down view of the IC chip. Additional charged-particle beams can be emitted by the inspection tool. These beams can be initially angled away from the IC chip as shown by the electron beams303and307inFIGS.3A-3C. Deflectors can then deflect the charged-particle beams back toward the IC chip. The charged-particle beams can pass through both a condenser lens and an objective lens that focus the charged-particle beam onto a side of structures of the IC chip as shown inFIGS.3B and3C. The condenser lens can be moved and rotated to align axially with the charged-particle beam it is focusing, as shown inFIGS.3A-3C. This alignment eliminates the introduction of off-axis aberration from the condenser lens. In some instances, instead of moving, the condenser lens can include separate lenses—one for each charged-particle beam that is oriented to axially align with that particular beam, using, for example, the lens structure shown inFIG.4. The objective lens can also move side to side so that the center of the objective lens can align with the charged-particle it is focusing. By aligning the center of the objective lens with the charged-particle beam, inspection system can reduce the amount of off-axis aberration introduced by the objective lens. As with the condenser lens, in some instances multiple objective lenses can be used with each one being axially aligned with one of the charged-particle beams to prevent off-axis aberration. Because multiple charged-particle beams illuminating the IC chip at the same time would distort the acquired image, a blocking plate and deflectors can be used to block all but one of the charged-particle beams at any point in time. In this way, an inspection tool can use a sequence of configurations (e.g., a sequence of each of the configurations shown inFIGS.3A,3B, and3C) to capture sequential images of the IC chip. After capturing the first image, the inspection tool can adjust the configuration to capture the next image. This process can continue until the inspection tool has captured all the necessary images for creating the three-dimensional image of the IC chip. For the example configuration shown inFIGS.3A-3C, the inspection tool can sequentially capture three images of the IC chip—one image of the top of the IC chip and an image of each of two opposite sides of structures of the IC chip. These images can then be combined to create the three-dimensional image of the IC chip. The inspection tool can utilize electrostatic or magnetic condenser and objective lenses to focus the electron beam. Additionally, separate lenses can be used to eliminate the time necessary to move and position the lenses each time a different charged-particle beam is used for imaging. The response time of the deflectors and the lenses are fast enough that the sequence of images needed for the inspection of the IC chip can be captured in real time in order to maintain high wafer throughput. Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings, the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described. As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a database may include A or B, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. Reference is now made toFIG.1, which illustrates an exemplary electron beam inspection system consistent with embodiments of the present disclosure. Although the present disclosure refers to an electron beam inspection system, it is understood that the present disclosure can apply more generally to charged-particle beam inspection systems and the use description of electron beams is exemplary. In some embodiments, electron beam inspection system is an electron beam inspection (EBI) system100. In some embodiments, electron beam inspection as shown inFIG.1, electron beam inspection system1includes a main chamber10, a load/lock chamber20, a charged-particle beam tool100, and an equipment front end module (EFEM)30. Electron beam tool100is located within main chamber10. EFEM30includes a first loading port30aand a second loading port30b. EFEM30may include additional loading port(s). First loading port30aand second loading port30breceive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (a sample can be a wafer or other component, or can be a portion of the wafer or the other component, and the terms sample and wafer can both refer to a same component, can refer to different portions of a same component, or can refer to different components). One or more robot arms (not shown) in EFEM30transport the wafers to load/lock chamber20. Load/lock chamber20is connected to a load/lock vacuum pump system (not shown), which removes gas molecules in load/lock chamber20to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robot arms (not shown) transport the wafer from load/lock chamber20to main chamber10. Main chamber10is connected to a main chamber vacuum pump system (not shown), which removes gas molecules in main chamber10to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by electron beam tool100. While the present disclosure provides examples of main chamber10housing an electron beam inspection system, it should be noted that aspects of the disclosure in their broadest sense, are not limited to a chamber housing an electron beam inspection system. Rather, it is appreciated that the foregoing principles may be applied to other chambers as well. A controller50is electronically connected to electron beam tool100. Controller50may be a computer configured to execute various controls of the electron beam inspection system. Controller50may also include a processing circuitry configured to execute various signal and image processing functions. While controller50is shown inFIG.1as being outside of the structure that includes main chamber10, load lock chamber20, and EFEM30, it is appreciated that controller50may be part of the structure. While the present disclosure provides examples of main chamber10housing an electron beam inspection tool100, it should be noted that aspects of the disclosure in their broadest sense are not limited to a chamber housing an electron beam inspection tool. Rather, it is appreciated that the foregoing principles may also be applied to other tools that operate under the second pressure. Reference is now made toFIG.2, which illustrates a schematic diagram illustrating an exemplary electron beam tool or, in some embodiments, an electron-beam tool, that can be a part of the exemplary electron beam inspection system1ofFIG.1, consistent with embodiments of the present disclosure. Electron beam tool100(also referred to herein as apparatus100) comprises an electron beam source101, a gun aperture plate171with a gun aperture103, a condenser lens110, a source conversion unit120, a primary projection optical system130, a sample stage (not shown inFIG.2), a secondary optical system150, and an electron detection device140. Primary projection optical system130can comprise an objective lens131. Electron detection device140can comprise a plurality of detection elements140_1,140_2, and140_3. Beam separator160and deflection scanning unit132can be placed inside primary projection optical system130. It may be appreciated that other commonly known components of apparatus100may be added/omitted as appropriate. Electron source101, gun aperture plate171, condenser lens110, source conversion unit120, beam separator160, deflection scanning unit132, and primary projection optical system130can be aligned with a primary optical axis100_1of apparatus100. Secondary optical system150and electron detection device140can be aligned with a secondary optical axis150_1of apparatus100. Electron source101can comprise a cathode, an extractor or an anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form a primary electron beam102that forms a crossover (virtual or real)101s. Primary electron beam102can be visualized as being emitted from crossover101s. Source conversion unit120can comprise an image-forming element array (not shown inFIG.2). The image-forming element array can comprise a plurality of micro-deflectors or micro-lenses to form a plurality of parallel images (virtual or real) of crossover101swith a plurality of beamlets of primary electron beam102.FIG.2shows three beamlets102_1,102_2, and102_3as an example, and it is appreciated that the source conversion unit120can handle any number of beamlets. Controller50ofFIG.1may be connected to various parts of charged particle beam inspection system100ofFIG.1, such as source conversion unit120, electron detection device140, primary projection optical system130, or a motorized stage (not shown). In some embodiments, as explained in further details below, controller50may perform various image and signal processing functions. Controller50may also generate various control signals to govern operations of the charged particle beam inspection system. Condenser lens110can focus primary electron beam102. The electric currents of beamlets102_1,102_2, and102_3downstream of source conversion unit120can be varied by adjusting the focusing power of condenser lens110or by changing the radial sizes of the corresponding beam-limit apertures within the beam-limit aperture array. Objective lens131can focus beamlets102_1,102_2, and102_3onto a sample190for inspection and can form three probe spots102_1s,102_2s, and102_3son surface of sample190. Gun aperture plate171can block off peripheral electrons of primary electron beam102not in use to reduce Coulomb effect. The Coulomb effect can enlarge the size of each of probe spots102_1s,102_2s, and102_3s, and therefore deteriorate inspection resolution. Beam separator160can be a beam separator of Wien filter type comprising an electrostatic deflector generating an electrostatic dipole field μl and a magnetic dipole field B1(both of which are not shown inFIG.2). If they are applied, the force exerted by electrostatic dipole field μl on an electron of beamlets102_1,102_2, and102_3is equal in magnitude and opposite in direction to the force exerted on the electron by magnetic dipole field B1. Beamlets102_1,102_2, and102_3can therefore pass straight through beam separator160with zero deflection angles. Deflection scanning unit132can deflect beamlets102_1,102_2, and102_3to scan probe spots102_1s,102_2s, and102_3sover three small scanned areas in a section of the surface of sample190. In response to incidence of beamlets102_1,102_2, and102_3at probe spots102_1s,102_2s, and102_3s, three secondary electron beams102_1se,102_2se, and102_3secan be emitted from sample190. Each of secondary electron beams102_1se,102_2se, and102_3secan comprise electron beams with a distribution of energies including secondary electrons (energies ≤50 eV), and backscattered electrons (energies between 50 eV and landing energies of beamlets102_1,102_2, and102_3). Beam separator160can direct secondary charged-particle beams102_1se,102_2se, and102_3setowards secondary optical system150. Secondary optical system150can focus secondary electron beams102_1se,102_2se, and102_3seonto detection elements140_1,140_2, and140_3of electron detection device140. Detection elements140_1,140_2, and140_3can detect corresponding secondary electron beams102_1se,102_2se, and102_3seand generate corresponding signals, which are sent to controller50or a signal processing system (not shown), e.g. to construct images of the corresponding scanned areas of sample190. In some embodiments, detection elements140_1,140_2, and140_3detect corresponding secondary electron beams102_1se,102_2se, and102_3se, respectively, and generate corresponding intensity signal outputs (not shown) to an image processing system (e.g., controller50). In some embodiments, each detection element140_1,140_2, and140_3may comprise one or more pixels. The intensity signal output of a detection element may be a sum of signals generated by all the pixels within the detection element. In some embodiments, controller50may comprise image processing system that includes an image acquirer (not shown), a storage (not shown). The image acquirer may comprise one or more processors. For example, the image acquirer may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, and the like, or a combination thereof. The image acquirer may be communicatively coupled to electron detection device140through a medium such as an electrical conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, among others, or a combination thereof. In some embodiments, the image acquirer may receive a signal from electron detection device140and may construct an image. The image acquirer may thus acquire images of sample190. The image acquirer may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, and the like. The image acquirer may be configured to perform adjustments of brightness and contrast, etc. of acquired images. In some embodiments, the storage may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer readable memory, and the like. The storage may be coupled with the image acquirer and may be used for saving scanned raw image data as original images, and post-processed images. In some embodiments, the image acquirer may acquire one or more images of a sample based on an imaging signal received from electron detection device140. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas. The single image may be stored in the storage. The single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of sample190. The acquired images may comprise multiple images of a single imaging area of sample190sampled multiple times over a time sequence. The multiple images may be stored in the storage. In some embodiments, controller50may be configured to perform image processing steps with the multiple images of the same location of sample190. In some embodiments, controller50may include measurement circuitries (e.g., analog-to-digital converters) to obtain a distribution of the detected secondary electrons. The electron distribution data collected during a detection time window, in combination with corresponding scan path data of primary electron beam102incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection. The reconstructed images can be used to reveal various features of the internal or external structures of sample190, and thereby can be used to reveal any defects that may exist in the wafer. Reference is now made toFIGS.3A-3C, which are schematic diagrams of an exemplary electron beam tool300that can use multiple charged-particle beams for stereo or three-dimensional imaging of a sample, e.g. a wafer. Each ofFIGS.3A,3B, and3Cshow electron beam tool in a different state. In some embodiments, electron beam tool300can be EBI tool100ofFIG.2. Electron beam tool300includes electron source301that can emit electron beams303,305, and307. Electron beams can pass through aperture array310that focuses the beams toward deflectors313,315, and317. In some embodiments, electron beam source301can emit a single electron beam and further include a deflector to deflect the single electron beam along the path shown by electron beams303,305, and307. Deflectors313,315, and317can direct electron beams in different directions. In some embodiments any of deflectors313,315, and317can direct a corresponding electron beam (e.g., electron beam303,305, or307) into blocking plate320. Blocking plate320can block one or more of the electron beams303,305, and307. In some embodiments, blocking plate320is moveable (e.g., via controller50ofFIG.1) and can be moved to block different electron beams303,305, and307at different times. In some embodiments, blocking plate320is designed so that only one of electron beam303,305, and307can be unblocked at a time. Electron beam tool300can further include condenser lens330. Condenser lens330can be condenser lens110ofFIG.2. Condenser lens330can focus any of electron beams303,305, and307. As shown inFIGS.3A,3B, and3C, condenser lens330can move from side to side and can rotate to properly align with any of electron beams303,305, and307that are not blocked by blocking plate320. In some embodiments, condenser lens330can include multiple condenser lenses. In these embodiments, each electron beam (e.g., electron beam303,305, and307) uses a separate, fixed-position condenser lens. For example, this structure is shown inFIG.4. In some embodiments, the central beam305that passes through condenser lens330ofFIG.3Ais an axial beam that is manipulated, such as by electron source301or deflector315, to impact sample360substantially perpendicularly. The left beam303that passes through left condenser lens330ofFIG.3Cand the right beam307that passes through condenser lens330ofFIG.3Bare manipulated or deflected, such as by electron source301or deflectors313or317, to cause the beams to impact sample360at a tilt relative to the axial beam. In some embodiments, the tilt is equal to or greater than three degrees relative to the axial beam, to enable improved imaging of the side walls of a structure on sample360. In other embodiments, the tilt is equal to or greater than five degrees relative to the axial beam, also to enable improved imaging of the side walls of a structure on sample360. Further, in some embodiments a subset of the condenser lenses are tilted relative to the axial beam to coincide with a corresponding one of the tilted beamlets. For example, the left condenser lens330is tilted to coincide with the path of left beam330ofFIG.3Cand the right condenser lens330is tilted to coincide with the path of right beam330ofFIG.3B. FIG.4is a schematic diagram of an exemplary lens400. Lens400can be a magnetic lens, electrostatic lens, or a combination of the two. Lens400can use deflectors lens elements440A-440C to direct an electron beam. Lens400can be used as, for example, condenser lens330ofFIGS.3A-3Cand objective lens340ofFIGS.3A-3Cand described in more detail below. Lens400can include channels410,420, and430, through which an electron beam (e.g., electron beam303,305, or307) can pass. As the electron beam passes through one of channels410,420, and430, lens elements440A-440C can focus the electron beam. The lens elements can create a lens structure or effect like that shown as effective lenses443,445, and447. The structure of lens400can be used for condenser lens330, describe above in relation toFIGS.3A-3C, and can be used for objective lens340, described in more detail below in relation toFIGS.3A-3C. Referring back toFIGS.3A-3C, electron beams303,305, and307can pass through condenser lens330to objective lens340. Objective lens340can focus any of electron beams303,305, and307on the sample360on a wafer. In some embodiments, electron beam tool300can include deflectors350to correct off-axis aberrations that can occur from electron beams303,305, and307not being axially aligned with objective lens340. Deflectors350can be magnetic deflectors, electrostatic deflectors, or a combination of both technologies. Deflectors350can shift the focusing field of objective lens340(e.g., using Moving Objective Lens (“MOL”) technology). Accordingly, objective lens340is moveable, and moving the objective lens ensures that each electron beam goes through the center of objective lens340(as shown through each ofFIGS.3A-3C), leading to smaller aberrations even for large tilting angles. In some embodiments, objective lens340can be multiple objective lenses. In these embodiments, each of the objective lenses of objective lens340can be axially aligned with one of electron beams303,305, and307, thereby minimizing off-axis aberrations from being introduced. As described above, objective lens340can use the structure of lens400described in reference toFIG.4above. After being focused by objective lens340, electron beams303,305, and307can illuminate sample360on the wafer, which can allow electron beam tool300to generate an image of the sample. As described above,FIGS.3A-3Cillustrate exemplary electron beam tool300. AlthoughFIGS.3A-3Cillustrate the same components, each can demonstrate a particular configuration of electron beam tool300and each configuration is described in more detail below. During operation, only one configuration, (e.g., a configuration shown inFIG.3A,3B, or3C) can be active at a time. Electron beam tool300can move through the configurations shown inFIGS.3A-3Csequentially to allow imaging of the top and sides of structures of sample360on the wafer. It is appreciated that a specific sequence of configurations is not necessary, only that each of the configurations occur in the sequence to allow electron beam tool300to generate a stereo or three-dimensional image of sample360. Reference is now made toFIG.3A, which is an exemplary configuration of electron beam tool300. In the configuration shown inFIG.3A, electron beam tool300can image the top of sample360on a wafer. In the configuration ofFIG.3A, blocking plate320can be positioned to block electron beams303and307. Deflectors313and317can also direct or deflect electron beams303and307, respectively, into blocking plate320. As used herein, directing an electron beam can mean making minor changes to the path of an electron beam. In some embodiments deflecting an electron beam can mean causing a larger change in the direction of an electron beam. Moreover, directing an electron beam can be the same as deflecting an electron beam. Electron beam305can pass through deflector315that can direct electron beam305past blocking plate320to condenser330. Condenser330can focus electron beam305through objective lens340. As described above, condenser330, objective lens340, and deflectors350can work in conjunction (e.g., via controller50ofFIG.1) to direct electron beam305to sample360on the wafer. In this configuration, electron beam305can intersect the top of sample360, producing an image of the top of sample360. Reference is now made toFIG.3B, which is an exemplary configuration of electron beam tool300. In the configuration shown inFIG.3B, electron beam tool300can image one side wall of structures of sample360on a wafer. In the configuration ofFIG.3B, blocking plate320can be positioned to block electron beams303and305. Deflectors313and315can also direct electron beams303and305, respectively, into blocking plate320. Electron beam307can pass through deflector317, that can direct electron beam307past blocking plate320to condenser330. Condenser330can focus electron beam307through objective lens340, which has been shifted to the right (e.g., to be centered on line377) from its original location (e.g., centered on line373) to allow beam307to go through the center of objective lens340, thereby minimizing aberrations. As described above condenser330, objective lens340, and deflectors350can work in conjunction to direct electron beam307to sample wafer360. In this configuration, electron beam307can intersect the side walls of structures of sample360producing an image of the side walls of the structures. The configuration shown inFIG.3Bcan direct the electron beam at large angles that can provide increased resolution for the imaging of the side walls of structures of sample360while also limited aberration produced by the condenser lens330and objective lens340. Reference is now made toFIG.3C, which is an exemplary configuration of electron beam tool300. In the configuration shown inFIG.3C, electron beam tool300can image a side wall of a structure of sample360on a wafer. In the configuration ofFIG.3C, blocking plate320can be positioned to block electron beams305and307. Deflectors315and317can also direct electron beams305and307, respectively, into blocking plate320. Electron beam303can pass through deflector313that can direct electron beam303past blocking plate320to condenser330. Condenser330can focus electron beam303through objective lens340, which has been shifted to the left (e.g., to be centered on line377) from its original location (e.g., centered on line373) to allow beam303to go through the center of objective lens340, thereby minimizing aberrations. As described above condenser330, objective lens340, and deflectors350can work in conjunction to direct electron beam303to sample wafer360. In this configuration, electron beam303can intersect the side walls of structures of sample wafer360, producing an image of the side walls of the structures. The configuration shown inFIG.3Bcan direct the electron beam at large angles that can provide increased resolution for the imaging of the side walls of structures of sample360, while also limiting aberration produced by the condenser lens330and objective lens340. Moreover, the configuration shown inFIG.3Ccan produce an image of the opposite side of that shown in the configuration ofFIG.3B. Electron beam tool300, using the three configurations shown in reference toFIGS.3A-3Ccan, in sequence, produce images of the top and two sides of structures of sample360. Using these images, EBI system100can construct a stereo or three-dimensional image of sample360that can show the three-dimensional structure of sample360. Reference is now made toFIG.5, which illustrates a flowchart of an exemplary method for real-time stereo imaging using multiple electron beams A controller (e.g. controller50ofFIG.1) may be programmed to implement one or more blocks of the flowchart ofFIG.5. The controller may be coupled with a charged-particle beam apparatus (e.g., EBI tool100ofFIG.2). The controller may control operations of the charged-particle beam apparatus. In a step S101, the method can begin. At step S102, the charged-particle beam apparatus can generate a first, second, and third charged-particle beams (e.g., electron beams303,305, and307ofFIGS.3A-3C) using, for example, electron beam source301ofFIGS.3A-3C. The three charged-particle beams can be directed in different directions. In some embodiments, the three charged-particle beams are emitted parallel to each other. In some embodiments, the three charged-particle beams are generated independently of each other. In other embodiments, the three charged-particle beams can come from a single beam. In these embodiments, each single beam can be directed using a deflector to generate three beams, one of which can be active at any point in time. In step S103, the method can use a blocking plate, e.g., blocking plate320ofFIGS.3A-3C, to block the first and third charged-particle beams. In embodiments where the three charged-particle beams are generated from a single particle beam and a deflector, as described above, only the second charged-particle beam can be active instead of requiring a blocking plate. Blocking the first and third charged-particle beams can produce a configuration like that shown inFIG.3Awhere the second charged-particle beam (e.g., electron beam305ofFIG.3A) reaches the sample (e.g., sample360ofFIG.3A). In step S104, the second charged-particle beam can image the top of the sample wafer. The second charged-particle beam (e.g., electron beam305ofFIG.3A) can pass through a condenser (e.g., condenser330ofFIG.3A) to focus the charged-particle beam on an objective lens (e.g., objective lens340ofFIG.3A) that can focus the charged-particle beam on the sample wafer. The image of the top of the sample wafer illuminated by the second charged-particle beam can be acquired by the charged-particle beam apparatus. In step S105, after acquiring the image of the top of the sample wafer, the charged-particle beam apparatus can block the first and second charged-particle beams (e.g., electron beams303and305ofFIG.3B) and allow the third charged-particle beam (e.g., electron beam307ofFIG.3B) to pass as shown in the configuration ofFIG.3B. In some embodiment, the blocking plate (e.g., blocking plate320ofFIG.3B) can be repositioned to block the first and second charged-particle beams and to allow the third charged-particle beam to pass. In some embodiments, one or more deflectors (e.g., deflectors313and315ofFIG.3B) can deflect the first and second charged-particle beams into the blocking plate. The third charged-particle beam can be emitted at an angle away from sample wafer to a deflector (e.g., deflector317ofFIG.3B). In step S106, a deflector (e.g., deflector317ofFIG.3B) can deflect the third charged-particle beam (e.g., electron beam307ofFIG.3B) at an angle toward the side walls of structures of the sample. The third charged-particle beam (e.g., electron beam307ofFIG.3B) can pass through a condenser (e.g., condenser330ofFIG.3B) to focus the charged-particle beam on an objective lens (e.g., objective lens340ofFIG.3B) that can focus the charged-particle beam on the sample. In some embodiments, the condenser lens can be repositioned and angled to be axially aligned with the third charged-particle beam. In other embodiments, a separate condenser lens from that used for the second charged-particle beam can be used. As explained earlier, the objective lens can be moveable as shown inFIGS.3A-3Cor fixed as shown inFIG.4. For example, the objective lens can be positioned (e.g., by deflectors350ofFIG.3B) to reduce off-axis aberrations created by the intersection of the third charged-particle beam and the objective lens. In other embodiments (e.g., the embodiment ofFIG.4), a separate objective lens from that used for the second charged particle beam can be used that is axially aligned with the third charged particle beam to reduce any aberration. The image of the side walls of structures of the sample illuminated by the third charged-particle beam can be acquired by the charged-particle beam apparatus. In step S107, the third charged particle beam can image the side walls of structures of the sample wafer. The third charged-particle beam (e.g., electron beam307ofFIG.3B) can be deflected by a deflector (e.g., deflector317ofFIG.3B) and pass through a condenser (e.g., condenser330ofFIG.3B) to focus the charged-particle beam on an objective lens (e.g., objective lens340ofFIG.3B) that can focus the charged-particle beam on the sample wafer. The image of the side walls of structures of the sample illuminated by the third charged-particle beam can be acquired by the charged-particle beam apparatus. In step S108, after acquiring the image of the side walls of the structures of the sample, the charged-particle beam apparatus can block the second and third charged-particle beams (e.g., electron beams305and307ofFIG.3C) and allow the first charged-particle beam (e.g. electron beam303) to pass as shown in the configuration shown inFIG.3C, In some embodiments, the blocking plate (e.g., blocking plate320ofFIG.3C) can be repositioned to block the second and third charged-particle beams and can allow the first charged-particle beam to pass. In some embodiments, one or more deflectors (e.g., deflectors315and317ofFIG.3C) can deflect the first and second charged-particle beams into the blocking plate. The first charged-particle beam can be emitted at an angle away from the sample to a deflector (e.g., deflector313ofFIG.3C). In step S109, a deflector (e.g., deflector313ofFIG.3C) can deflect the first charged-particle beam (e.g., electron beam303ofFIG.3F) at an angle toward the other side wall of structures of the sample that were not previously imaged. The first charged-particle beam (e.g., electron beam303ofFIG.3C) can pass through a condenser (e.g., condenser330ofFIG.3C) to focus the charged-particle beam on an objective lens (e.g., objective lens340ofFIG.3C) that can focus the charged-particle beam on the sample wafer. In some embodiments, the condenser can be repositioned and angled to be axially aligned with the first charged-particle beam. In other embodiments, a separate condenser lens from that used for the second and third charged-particle beam can be used. In some embodiments the objective lens can be positioned (e.g., by deflectors350ofFIG.3C) to reduce off-axis aberrations created by the intersection of the first charged-particle beam and the objective lens. In other embodiments a separate objective lens from that used for the second and third charged particle beam can be used that is axially aligned with the first charged particle beam to reduce any aberration. The image of the side wall of the structures of the sample wafer, not already imaged, illuminated by the first charged-particle beam can be acquired by the charged-particle beam apparatus. In step S110, the first charged particle beam can image the other side wall of the structures of the sample. The first charged-particle beam (e.g., electron beam303ofFIG.3C) can be deflected by a deflector (e.g., deflector313ofFIG.3C) and pass through a condenser (e.g., condenser330ofFIG.3C) to focus the charged-particle beam on an objective lens (e.g., objective lens340ofFIG.3C) that can focus the charged-particle beam on the sample. The image of the side wall of the structures of the sample illuminated by the first charged-particle beam can be acquired by the charged-particle beam apparatus. The process can end in step S111and the charged particle beam apparatus (e.g., EBI tool100ofFIG.2) can construct a three-dimensional or stereo image of the sample using the image of the top and two sides of the structures of the sample. It is appreciated that the specific order in which the top and two sides of the structures of the sample are imaged is not important and can be done in any sequential order. The previously described process is one exemplary order for creating a three-dimensional or stereo image of sample wafer. It is also appreciated that reference in the present disclosure to structures of the sample can include both a single structure or multiple structures. The embodiments may further be described using the following clauses: 1. A multi-beam apparatus configured to emit multiple charged-particle beams for imaging two sides of a structure of a sample, the apparatus comprising: a deflector array including a first deflector and configured to receive a first charged-particle beam and a second charged-particle beam; a blocking plate configured to block one of the first charged-particle beams and the second charged-particle beam; and a controller having circuitry and configured to change the configuration of the apparatus to transition between a first mode and a second mode, wherein:in the first mode:the deflector array is configured to deflect the second charged-particle beam to image a first side of the structure, andthe blocking plate is configured to block the first charged-particle beam, andin the second mode:the first deflector is configured to deflect the first charged-particle beam to image a second side of the structure, andthe blocking plate is configured to block the second charged-particle beam. 2. A multi-beam apparatus configured to emit multiple charged-particle beams for imaging a top of and a side of a structure of a sample, the apparatus comprising: a deflector array including a first deflector and configured to receive a first charged-particle beam and a second charged-particle beam; a blocking plate configured to block one of the first charged-particle beams and the second charged-particle beam; and a controller having circuitry and configured to change the configuration of the apparatus to transition between a first mode and a second mode, wherein:in the first mode:the deflector array is configured to direct the second charged-particle beam to image the top of the structure, and the blocking plate is configured to block the first charged-particle beam, andin the second mode: the first deflector is configured to deflect the first charged-particle beam to image the side of the structure, and the blocking plate is configured to block the second charged-particle beam. 3. The apparatus of any one of clauses 1 and 2, further comprising an objective lens. 4. The apparatus of clause 3, wherein the objective lens is one of an electrostatic lens or a magnetic lens. 5. The apparatus of clause 3 wherein the objective lens is a combination of a magnetic lens and an electrostatic lens. 6. The apparatus of any one of clauses 3-5 wherein the objective lens is a moveable objective lens. 7. The apparatus of any one of clauses 2-6, wherein the direction of the second charged-particle beam by the deflector array includes a deflection of the second charged-particle beam. 8. The apparatus of any of clauses 1-7, further comprising a condenser lens. 9. The apparatus of clause 8, wherein the condenser lens is an electrostatic lens. 10. The apparatus of clause 8, wherein the condenser lens is a magnetic lens. 11. The apparatus of clause 8 wherein the condenser lens is a combination of a magnetic lens and an electrostatic lens. 12. The apparatus of any one of clauses 8-11 wherein the condenser lens is movable and rotatable to axially align with the first charged-particle beam or the second charged-particle beam. 13. The apparatus of any one of clauses 1-12 wherein each of the first charged-particle beam and second charged-particle beam are focused using separate objective lenses. 14. The apparatus of any one of clauses 1-13 wherein each of the first charged-particle beam and second charged-particle beam are focused using separate condenser lenses. 15. The apparatus of any one of clauses 1-14 wherein the deflector array includes a second deflector configured to deflect the second charged-particle beam into the blocking plate when operating the first mode. 16. The apparatus of any one of clauses 2-15, wherein the deflector array is configured to receive a third charged-particle beam and includes a third deflector configured to deflect the third charged-particle beam into the blocking plate when operating in either the first or second modes. 17. The apparatus of clause 15, wherein the controller is configured to change the configuration of the apparatus to transitions between the first mode, the second mode, and a third mode, wherein in the third mode,the third deflector is configured to direct the third charged-particle beam to image a second side different from the side of the structure, and the blocking plate is configured to block the first and second charged-particle beams. 18. The apparatus of clause 1, wherein: the deflector array is configured to receive a third charged-particle beam and includes a third deflector configured to deflect the third charged-particle beam into the blocking plate when operating in either the first or second modes; and the controller is configured to change the configuration of the apparatus to transitions between the first mode, the second mode, and a third mode, whereinin the third mode, the third deflector is configured to direct the third charged-particle beam to image a top of the structure, and the blocking plate is configured to block the first and second charged-particle beams. 19. The apparatus of any one of clauses 1-18, wherein the controller is further configured to: acquire an image from each portion of the structure; combine the acquired images into a stereo image of the structure. 20. A method for imaging two sides of a structure of a sample using a charged-particle beam tool, the method comprising: transitioning to a first mode, the transition comprising: deflecting, using a deflector array, a second charged-particle beam to a first side of the structure; blocking, using a blocking plate, the first charged-particle beam. imaging the first side of the structure; and transitioning to a second mode, the transition comprising: deflecting, using a first deflector of the deflector array, the first charged-particle beam to a second side of the structure; blocking, using the blocking plate, the second charged-particle beam; and imaging the side of the structure. 21. A method for imaging a top of and a side of a structure of a sample using a charged-particle beam tool, the method comprising: transitioning to a first mode, the transition comprising: directing, using a deflector array, a second charged-particle beam to the top of the structure; blocking, using a blocking plate, the first charged-particle beam. imaging the top of the structure; and transitioning to a second mode, the transition comprising: deflecting, using a first deflector of the deflecting array, the first charged-particle beam to the side of the structure; blocking, using the blocking plate, the second charged-particle beam; and imaging the side of the structure. 22. The method of any one of clauses 20 and 21, further comprising: focusing the second charged-particle beam on a portion of the structure using a condenser lens. 23. The method of any one of clauses 20-22, further comprising focusing the second charged-particle beam on a portion of the structure using an objective lens. 24. The method of any one of clauses 20-23, further comprising focusing the first charged-particle beam on a portion of the structure using a condenser lens. 25. The method of any one of clauses 20-24, further comprising focusing the second charged-particle beam on a portion of the sample using an objective lens. 26. The method of any one of clauses 20-25, further comprising moving the condensing lens to be aligned with the second charged-particle beam. 27. The method of any one of clauses 20-26, further comprising rotating the condensing lens to be axially aligned with the second charged-particle beam. 28. The method of any one of clauses 20-27, further comprising moving the condensing lens to be aligned with the first charged-particle beam. 29. The method of any one of clauses 20-25 and 28, further comprising rotating the condensing lens to be axially aligned with the first charged-particle beam. 30. The method of any one of clauses 20-29, further comprising moving the objective lens to be aligned with the second charged-particle beam. 31. The method of any one of clauses 20-30, further comprising moving the objective lens to be aligned with the first charged-particle beam. 32. The method of any one of clauses 20-31, wherein blocking the second charged-particle beam further comprises deflecting the second charged-particle beam to the blocking plate. 33. The method of any one of clauses 20-32, wherein blocking the first charged particle beam further comprises deflecting the first charged-particle beam to the blocking plate. 34. The method of any one of clauses 21-33, further comprising: transitioning to a third mode, the transition comprising:deflecting, using a deflector array, a third charged-particle beam to a second side of the structure;blocking, using a blocking plate, the first charged-particle beam and the second charged-particle beam;imaging the second side of the structure. 35. The method of clause 20, further comprising:transitioning to a third mode, the transition comprising:deflecting, using a deflector array, a third charged-particle beam to a top of the structure;blocking, using a blocking plate, the first charged-particle beam and the second charged-particle beam;imaging the top of the structure. 36. The method of any one of clauses 20-35, further comprising:combining images from imaging into a stereo image of the structure. 37. A non-transitory computer readable medium storing a set of instructions that is executable by one or more processors of a system to cause the system to perform a method comprising:transitioning to a first mode, the transition comprising:deflecting, using a deflector array, a second charged-particle beam to a first side of a structure of a sample;blocking, using a blocking plate, the first charged-particle beam.imaging the first side of the structure; andtransitioning to a second mode, the transition comprising; anddeflecting, using a first deflector of the deflector array, the first charged-particle beam to a second side of the structure;blocking, using the blocking plate, the second charged-particle beam; andimaging the second side of the structure. 38. A non-transitory computer readable medium storing a set of instructions that is executable by one or more processors of a system to cause the system to perform a method comprising: transitioning to a first mode, the transition comprising: directing, using a deflector array, a second charged-particle beam to a top of a structure of a sample; blocking, using a blocking plate, the first charged-particle beam. imaging the top of the structure; and transitioning to a second mode, the transition comprising; and deflecting, using a first deflector of the deflector array, the first charged-particle beam to a side of the structure; blocking, using the blocking plate, the second charged-particle beam; and imaging the side of the structure. 39. The computer readable medium of any one of clauses 37 and 38, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform: focusing the second charged-particle beam on a portion of the structure using a condenser lens. 40. The computer readable medium of any one of clauses 37-39, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform focusing the second charged-particle beam on a portion of the structure using an objective lens. 41. The computer readable medium of any one of clauses 37-40, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform focusing the first charged-particle beam on a portion of the structure using a condenser lens. 42. The computer readable medium of any one of clauses 37-41, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform focusing the second charged-particle beam on a portion of the structure using an objective lens. 43. The computer readable medium of any one of clauses 37-42, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform moving the condensing lens to be aligned with the second charged-particle beam. 44. The computer readable medium of any one of clauses 37-43, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform rotating the condensing lens to be axially aligned with the second charged-particle beam. 45. The computer readable medium of any one of clauses 37-44, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform moving the condensing lens to be aligned with the first charged-particle beam. 46. The computer readable medium of any one of clauses 37-42 and 45, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform rotating the condensing lens to be axially aligned with the first charged-particle beam. 47. The computer readable medium of any one of clauses 37-46, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform moving the objective lens to be aligned with the second charged-particle beam. 48. The computer readable medium of any one of clauses 37-47, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform moving the objective lens to be aligned with the first charged-particle beam. 49. The computer readable medium of any one of clauses 37-48, wherein blocking the second charged-particle beam further comprises deflecting the second charged-particle beam to the blocking plate. 50. The computer readable medium of any one of clauses 37-49, wherein blocking the first charged particle beam further comprises deflecting the first charged-particle beam to the blocking plate. 51. The computer readable medium of any one of clauses 38-50, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform:transitioning to a third mode, the transition comprising:using a deflector array, deflect a third charged-particle beam to a second side of the structure;using a blocking plate, blocking the first charged-particle beam and the second charged-particle beam;imaging the second side of the structure. 52. The computer readable medium of clause 37, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform:transitioning to a third mode, the transition comprising:using a deflector array, deflect a third charged-particle beam to a top of the structure;using a blocking plate, blocking the first charged-particle beam and the second charged-particle beam;imaging the top of the structure. 53. The computer readable medium of any one of clauses 37-52, wherein the set of instructions that is executable by one or more processors of a system to cause the system to further perform: combining images from imaging into a stereo image of the structure. 54. A scanning electron microscope (SEM) system, comprising: a charged particle source for providing charged particles to enable a plurality of beamlets, a first beamlet being an axial beam manipulated to impact a sample substantially perpendicularly;a plurality of deflectors, wherein a subset of the deflectors are configured to deflect a subset of the beamlets to cause each of the subset of beamlets to impact the sample at a tilt relative to the axial beam; anda plurality of condensers, wherein each of a subset of the condensers has an axis tilted to coincide with a path of a different one of the subset of beamlets. 55. The SEM system of clause 54, wherein the sample includes one or more structures. 56. The SEM system of any one of clauses 54 and 55, wherein the first beamlet is further configured to, based on the impact with the sample, image the top of the one or more structures. 57. The SEM system of any one of clauses 54-56, wherein each of the subset of beamlets is further configured to, based on impact with the sample, image a side of the one or more structures. 58. The SEM system of any one of clauses 54-57, wherein the sample is a wafer and the one or more structures are components of an integrated circuit manufactured on the wafer. 59. The SEM system of any one of clauses 54-58, further comprising: a Moving Objective Lens (MOL) that can be configured to shift the focusing field of the objective lens. 60. The SEM system of clause 59, wherein the MOL is configured to shift the focusing field of the objective lens to coincide, at different times, with each of the beamlets. 61. The SEM of any one of clauses 54-60, wherein the objective lens is one of an electrostatic lens, a magnetic lens, or both. 62. The SEM system of any one of clauses 54-61, wherein the first beamlet has a path that is straight and perpendicular to the sample. 63. The SEM system of any one of clauses 54-62, wherein each of the condensers is an electrostatic lens, a magnetic lens, or both. 64. The SEM system of any one of clauses 54-63, further comprising: a controller having circuitry and configured to process images based on the plurality of beamlets to enable a real time display of a three dimensional representation of the sample. 65. The SEM system of any one of clauses 54-64, wherein each of the subset of deflectors is configured to deflect a different beamlet of the subset of beamlets to cause each beamlet of the subset of beamlets to impact the sample at a different tilt relative to the axial beam. 66. The SEM system of any one of clauses 54-65, further comprising a blocking mechanism configured to prevent all but one of the beamlets from impacting the sample. 67. The SEM system of any one of clauses 54-66, wherein the tilt relative to the axial beam is greater than or equal to three degrees. 68. The SEM system of any one of clauses 54-66, wherein the tilt relative to the axial beam is greater than or equal to five degrees. A non-transitory computer readable medium may be provided that stores instructions for a processor that can be part of, for example EBI tool100ofFIG.2, to carry out thermal sensing, flow sensing, image inspection, image acquisition, stage positioning, beam focusing, electric field adjustment, cleaning, hardening, heat treatment, material removal, and polishing, etc. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), and Erasable Programmable Read Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), cloud storage, a cache, a register, any other memory chip or cartridge, and networked versions of the same. The block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer hardware or software products according to various exemplary embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should be understood that in some alternative implementations, functions indicated in a block may occur out of the order noted in the figures. For example, two blocks shown in succession may be executed or implemented substantially concurrently, or two blocks may sometimes be executed in reverse order, depending upon the functionality involved. Some blocks may also be omitted. It should also be understood that each block of the block diagrams, and combination of the blocks, may be implemented by special purpose hardware-based systems that perform the specified functions or acts, or by combinations of special purpose hardware and computer instructions. It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof. The present disclosure has been described in connection with various embodiments, other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims. The descriptions above are intended to be illustrative, not limiting. Thus, it will be apparent to one skilled in the art that modifications may be made as described without departing from the scope of the claims set out below. | 61,705 |
11942304 | DESCRIPTION OF EMBODIMENTS Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the invention. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the subject matter as recited in the appended claims. Embodiments of the present disclosure provide a detector having an array architecture. The detector may enable field reconfiguration of sensing elements included on an array surface of the detector. The detector may comprise switching elements, such as switches formed between pairs of sensing elements which control the connection between the two sensing elements of the pair. Switches configured to connect two sensing elements can be formed within a sensing layer of a detector array. In this manner, the detector array eliminates the need for a separate switch matrix. Switching elements may comprise a transistor, such as a MOSFET. A MOSFET may have a gate that is controlled by logical elements. The sensing elements can form an arbitrary number of groups with arbitrary shapes and an arbitrary number of sensing elements in each group. A control circuit for each switch may be located beside each corresponding switch. The control circuit may comprise logical elements. The switch between pairs of sensing elements can be addressed by row control and/or line control wires. An array of sensing elements can be formed as a sensor layer in a substrate. The control circuit may be formed as a circuit layer in a substrate. In an arrangement consistent with aspects of the present disclosure, interconnections in the circuit layer can be simplified. Output signal of each group of sensing elements can be routed through multiple output wires connected to the group. The output wires, together with connections between sensing elements formed by the switches in the group, can form a network having a low equivalent output serial resistance and serial inductance. For example, in some embodiments, a control circuit may form a network that has reduced equivalent output serial resistance and serial inductance compared to a conventional area detector array. Output impedance of grouped sensing elements can be reduced such that wide band operation is facilitated. Embodiments of the present disclosure provide an electron beam tool with an electron detector. A circuit layer may be provided which is coupled with the electron detector. The electron detector can be configured to receive backscattered primary electrons and secondary electrons emitted from a sample. The received electrons form one or more beam spots on a surface of the detector. The surface of the detector can include a plurality of electron sensing elements configured to generate electrical signals in response to receiving the electrons. In some embodiments, the circuit layer may comprise pre-processing circuitry and signal processing circuitry that are used to configure grouping of the plurality of electron sensing elements. For example, the pre-processing circuitry and signal processing circuitry can be configured to generate indications related to the magnitude of the generated electrical signals. Such circuitry may comprise logic blocks, such as a gate associated with two sensing elements of the plurality of sensing elements. The gate may be controlled such that the two sensing elements are connected or disconnected via the switching element between the two sensing elements. Electrical signals generated from the sensing elements may be configured to pass through the switching element. Determinations may be made based on electrical signals from the sensing elements. Post-processing circuitry may be configured to interact with a controller configured to acquire an image of beams or beamlets based on the output of the sensing elements. The controller may reconstruct an image of the beam. The controller may be configured to determine beam boundaries based on the reconstructed image, for example primary and secondary boundaries of a beam spot. Further implementations of post-processing circuitry may comprise one or more circuits that can be configured to determine, based on generated indications from the pre-processing circuitry, which of the electron sensing elements lie within a boundary of a beam spot, for example a primary boundary. Processing may be carried out to generate a value representing the intensity of a beam spot based on the determined primary boundary. In some embodiments, a grouping can be used to determine which of the electron sensing elements lie outside the primary boundary of the beam spot. Noise signals may be estimated based on the output of sensing elements determined to be outside the primary boundary. Post-processing circuitry can compensate for the estimated noise signals when generating the intensity data of the beam spot. Grouping of sensing elements may be based on electrical signals generated by the sensing elements in response to being hit by electrons of an electron beam. Grouping may be based on electrical signals passing through the switching element connecting neighboring sensing elements. Grouping may also be based on determinations by post-processing circuitry. For example, in some embodiments, primary and/or secondary beam spot boundaries may be determined based on output signals of the sensing elements. Local control logic associated with a pixel may generate an indication of the signal level of the corresponding sensing element. This indication can be used to determine whether two adjacent sensing elements should be connected by the switching element. In this manner, groups can be formed. Based on the formed groups of sensing elements, a primary boundary can be determined. Furthermore, in some embodiments, gradient information can be obtained and used to determine a secondary boundary. Electrons of an incident electron beam may have different properties, e.g., different energy due to different generation processes. Distribution or concentrations of electrons with different properties may vary at different locations. Thus, within an electron beam, an intensity pattern in the detected electron beam spot may correspond to primary or secondary boundaries. Primary and secondary beam spot boundaries can be used to group output signals of corresponding electron sensing elements. The groups can be formed so that their geometrical arrangement matches the pattern of the corresponding electron beam spot. As an example, a portion of the electron beam spot detected by electron sensing elements within the secondary beam boundary may consist almost entirely of backscattered electrons while a portion of the electron beam spot detected by electron sensing elements between the primary and secondary beam boundaries may consist almost entirely of secondary electrons. The formed groups can therefore yield intensity information of the entire detected beam and also the intensity information corresponding to the backscattered and secondary electron portions of the electron beam. Accordingly, some embodiments can provide information about the detected electron beam spots and properties of the sample under investigation. As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a database can include A or B, then, unless specifically stated otherwise or infeasible, the database can include A, or B, or A and B. As a second example, if it is stated that a database can include A, B, or C, then, unless specifically stated otherwise or infeasible, the database can include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. Reference will now be made in detail to the example embodiments, which are illustrated in the accompanying drawings. Although the following embodiments are described in the context of utilizing electron beams, the disclosure is not so limited. Other types of charged particle beams can be similarly applied. Furthermore, detectors consistent with aspects of the present disclosure are applicable in environments for sensing x-rays, photons, and other forms of energy. Reference is now made toFIG.1, which illustrates an exemplary electron beam inspection (EBI) system100consistent with embodiments of the present disclosure. As shown inFIG.1, EBI system100includes a main chamber101a load/lock chamber102, an electron beam tool104, and an equipment front end module (EFEM)106. Electron beam tool104is located within main chamber101. EFEM106includes a first loading port106aand a second loading port106b. EFEM106may include additional loading port(s). First loading port106aand second loading port106breceive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples are collectively referred to as “wafers” hereafter). One or more robot arms (not shown) in EFEM106may transport the wafers to load/lock chamber102. Load/lock chamber102is connected to a load/lock vacuum pump system (not shown) which removes gas molecules in load/lock chamber102to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robot arms (not shown) may transport the wafer from load/lock chamber102to main chamber101. Main chamber101is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber101to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by electron beam tool104. Electron beam tool104may be a single-beam system or a multi-beam system. A controller109is electronically connected to the electron beam tool104. The controller109may be a computer configured to execute various controls of the EBI system. Reference is now made toFIG.2, which illustrates an electron beam tool104(also referred to herein as apparatus104) comprising an electron source202, a gun aperture204, a condenser lens206, a primary electron beam210emitted from electron source202, a source conversion unit212, a plurality of beamlets214,216, and218of primary electron beam210, a primary projection optical system220, a wafer stage (not shown inFIG.2), multiple secondary electron beams236,238, and240, a secondary optical system242, and an electron detection device244. Primary projection optical system220can comprise a beam separator222, deflection scanning unit226, and objective lens228. Electron detection device244can comprise detection sub-regions246,248, and250. Electron source202, gun aperture204, condenser lens206, source conversion unit212, beam separator222, deflection scanning unit226, and objective lens228can be aligned with a primary optical axis260of apparatus104. Secondary optical system242and electron detection device244can be aligned with a secondary optical axis252of apparatus104. Electron source202can comprise a cathode, an extractor or an anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form a primary electron beam210with a crossover (virtual or real)208. Primary electron beam210can be visualized as being emitted from crossover208. Gun aperture204can block off peripheral electrons of primary electron beam210to reduce Coulomb effect. The Coulomb effect can cause an increase in size of probe spots270,272, and274. Source conversion unit212can comprise an array of image-forming elements (not shown inFIG.2) and an array of beam-limit apertures (not shown inFIG.2). The array of image-forming elements can comprise an array of micro-deflectors or micro-lenses. The array of image-forming elements can form a plurality of parallel images (virtual or real) of crossover208with a plurality of beamlets214,216, and218of primary electron beam210. The array of beam-limit apertures can limit the plurality of beamlets214,216, and218. Condenser lens206can focus primary electron beam210. The electric currents of beamlets214,216, and218downstream of source conversion unit212can be varied by adjusting the focusing power of condenser lens206or by changing the radial sizes of the corresponding beam-limit apertures within the array of beam-limit apertures. Objective lens228can focus beamlets214,216, and218onto a wafer230for inspection and can form a plurality of probe spots270,272, and274on surface of wafer230. Beam separator222can be a beam separator of Wien filter type generating an electrostatic dipole field and a magnetic dipole field. In some embodiments, if they are applied, the force exerted by electrostatic dipole field on an electron of beamlets214,216, and218can be equal in magnitude and opposite in direction to the force exerted on the electron by magnetic dipole field. Beamlets214,216, and218can therefore pass straight through beam separator222with zero deflection angle. However, the total dispersion of beamlets214,216, and218generated by beam separator222can also be non-zero. Beam separator222can separate secondary electron beams236,238, and240from beamlets214,216, and218and direct secondary electron beams236,238, and240towards secondary optical system242. Deflection scanning unit226can deflect beamlets214,216, and218to scan probe spots270,272, and274over a surface area of wafer230. In response to incidence of beamlets214,216, and218at probe spots270,272, and274, secondary electron beams236,238, and240can be emitted from wafer230. Secondary electron beams236,238, and240can comprise electrons with a distribution of energies including secondary electrons (energies≤50 eV) and backscattered electrons (energies between 50 eV and landing energies of beamlets214,216, and218). Secondary optical system242can focus secondary electron beams236,238, and240onto detection sub-regions246,248, and250of electron detection device244. Detection sub-regions246,248, and250may be configured to detect corresponding secondary electron beams236,238, and240and generate corresponding signals used to reconstruct an image of surface area of wafer230. Reference is now made toFIG.3A, which illustrates an exemplary structure of a sensor surface300that can form a detection surface of electron detection device244. Sensor surface300can be divided into four regions302A-D (2×2 rectangular grid), each region302capable of receiving a corresponding beam spot304emitted from a particular location from wafer230. All beam spots304A-D may exhibit an ideal round shape and have no loci offset. While four regions are displayed, it is appreciated that any plurality of regions could be used. Furthermore, a division of sensor surface300into four regions is arbitrary. An arbitrary selection of sensing elements306can be taken to form a particular region. Detection sub-regions246,248,250in detector244may be constituted by such regions. Each sensor region can comprise an array of electron sensing elements306. The electron sensing elements may comprise, for example, a PIN diode, avalanche diode, electron multiplier tube (EMT), etc., and combinations thereof. Moreover, it is appreciated that whileFIG.3Ashows each region302being separated from each other as predefined regions having their own sensing elements306, these predefined regions may not exist, e.g., such as surface sensor400ofFIG.3C. For example, instead of having4predefined regions each having81sensing elements (a 9×9 grid of sensing elements), a sensor surface could have one 18×18 grid of sensing elements, still capable of sensing four beam spots. Electron sensing elements306can generate a current signal commensurate with the electrons received in the sensor region. A pre-processing circuit can convert the generated current signal into a voltage signal (representing the intensity of received electron beam spot). The pre-processing circuit may comprise, for example, a high speed transimpedance amplifier. A processing system can generate an intensity signal of the electron beam spot by, for example, summing the currents generated by the electron sensing elements located within a sensor region, correlate the intensity signal with a scan path data of the primary electron beam incident on the wafer, and construct an image of the wafer based on the correlation. While electron sensing element306is described as receiving electrons from an electron beam, in the case of other types of detectors, a sensor surface may be configured to generate a signal in response to receiving other types of irradiation. For example, a detector may react to charged particles having a particular charge. Also, a detector may be sensitive to flux, spatial distribution, spectrum, or other measurable properties. Thus, a detector sensing element may be configured to generate a signal in response to receiving a certain type or level of energy, for example, electrons having a predetermined amount of energy. In some embodiments, the processing system can selectively sum the signals generated by some of the electron sensing elements306to generate an intensity value of a beam spot. The selection can be based on a determination of which of the electron sensing elements are located within the beam spot. In some embodiments, the processing system can identify which of the electron sensing elements are located outside a beam spot, and which of the electron sensing elements are located within the beam spot, by identifying a boundary of the beam spot. For example, referring toFIG.3B, the processing system can identify primary boundaries312A,312B and secondary boundaries314A,314B for beam spots304A and304B, respectively. Primary boundary312can be configured to enclose a set of electron sensing elements306of which the signal outputs are to be included to determine an intensity of the beam spot. Secondary boundary314can be configured to enclose a center portion of the beam spot, and can be used to provide certain geometric information of the beam spot. The geometric information may include, for example, a shape of the beam spot, one or more loci of the beam spot, etc. Here, the loci may refer to a predetermined location within the beam spot, such as a center. The processing system may also determine primary boundary312based on secondary boundary314. Moreover, based on the loci information, the processing system can also track a drift in the location of a beam spot304due to, for example, imperfections within the electron optics components or the electron optics system. Imperfections may be those introduced during manufacturing or assembling processes. Furthermore, there may be drift introduced during long-term operation of the system. The processing system can update the boundary determinations, and the set of electron sensing elements to be included in the intensity determination, to mitigate the effects of the drifting on the accuracy of intensity determination. Further, the processing system may track shifts in the electron beam spots. The selection of the electron sensing elements306that are used to form each set of electron sensing elements surrounded by primary or secondary boundaries312and314can be determined by a designated electron collection ratio of each beam spot, which is related to the overall image signal strength and signal to noise ratio, the signal crosstalk of the adjacent electron beams, and the corresponding shape and locus of each electron beam spot. Selection of electron sensing elements may be controlled by processing circuitry located adjacent to the sensing elements or by an external controller, for example. The formation of each set may be static or may vary dynamically. Shape and locus variation information of beam spots may be used, for example, to monitor performance of the electron optical system (e.g., primary projection optical system220). Information collected regarding the positioning and shape of the beam can be used, for example, in making adjustments to the electron optical system. Accordingly, whileFIG.3Bshows beam spot304B having a shape deviating from a round shape, such types of deviations such as location, shape, and grid information due to drift in the electron optical system or imperfections of the components in the electron optical system can be compensated for. Reference is now made toFIG.3D, which illustrates an exemplary structure of a sensor surface500which can be used on electron detection device244. Sensor surface500has an array structure comprising a plurality of sensing elements, including sensing elements501,502,503, and so on, each capable of receiving at least a part of a beam spot. Sensing elements501,502,503may be configured to generate an electrical signal in response to receiving energy. The sensing element may comprise, for example, a PIN diode, avalanche diode, electron multiplier tube (EMT), and the like, and combinations thereof. For example, sensing elements501,502,503may be electron sensing elements. Electron sensing elements can generate a current signal commensurate with the electrons received in the sensor active area. A processing circuit can convert the generated current signal into a voltage signal (representing the intensity of the received electron beam spot). A processing system can generate an intensity signal of the electron beam spot by, for example, summing the currents generated by the electron sensing elements located within a sensor region, correlate the intensity signal with a scan path data of the primary electron beam incident on the wafer, and construct an image of the wafer based on the correlation. FIG.3Eillustrates an enlarged portion of a region shown inFIG.3D.FIG.4Ashows an exemplary structure of sensor elements taken along a cross section in the thickness direction of the detector array of the portion A indicated inFIG.3DandFIG.3E. As illustrated inFIG.4A, sensing elements501,502,503may be configured as a PIN diode device3000. PIN diode device3000may comprise a metal layer3010as a top layer. Metal layer3010is a layer for receiving electrons incident on the electron detection device244. Thus, metal layer3010is configured as a detection surface. A material of metal layer3010may be aluminum, for example. When aluminum is used in metal layer3010, an oxidized layer may be formed on the exterior of the surface so as to protect electron detection device244. PIN diode device3000may also comprise metal layer3050as a bottom layer. A material of metal layer3050may be copper, for example. Metal layer3050may comprise output lines for carrying induced current from each of the sensing elements501,502,503. PIN diode device3000may include a semiconductor device. For example, a semiconductor device constituting a PIN diode device may be manufactured as a substrate with a plurality of layers. Thus, sensing elements501,502,503may be contiguous in the cross sectional direction. Switching regions3009may be integral with the sensing elements. Additionally, sensing elements501,502,503, and/or switching regions3009may be configured as a plurality of discrete semiconductor devices. The discrete semiconductor devices may be configured to be directly adjacent each other. Thus, even when sensing elements are configured to be discrete, an isolation area can be eliminated and dead area can be reduced. In operation of PIN diode device3000, a P+ region3020is formed adjacent to metal layer3010. P+ region3020may be a p-type semiconductor layer. An intrinsic region3030is formed adjacent to P+ region3020. Intrinsic region3030may be an intrinsic semiconductor layer. An N+ region3040is formed adjacent to intrinsic region3030. N+ region3040may be an n-type semiconductor layer. A sensor layer of electron detection device244is formed as the layers of metal layer3010, P+ region3020, intrinsic region3030, N+ region3040, and metal layer3050. PIN diode device3000comprises a switching region3009formed between two adjacent sensing elements. As shown inFIG.4A, a switching region3009is formed between sensing elements501and502, and another switching region3009is formed between sensing elements502and503. A switch may be formed in the switching region3009. As an example, an enhancement mode MOSFET3001may be formed in the sensor layer of PIN diode device3000at switching region3009. MOSFET3001may comprise a P+ region3002, gate3004, and gate oxide3003. MOSFET3001is configured as a “normally open” type switch. In enhancement mode, voltage applied to gate3004increases conductivity of the device. Thus, without activating MOSFET3001, the switch between sensing elements502and503is OFF and sensing elements502and503are thereby not connected through MOSFET3001. By activating MOSFET3001, the switch between sensing elements is turned ON and sensing elements501and502are connected through MOSFET3001. For example, PIN diode device3000may be configured with MOSFETs operable in a turn ON state3098and a turn OFF state3099. MOSFET3001can be controlled through gate3004. A process of fabricating a MOSFET, such as MOSFET3001, may comprise etching, for example, among other techniques. In operation, when electrons are incident on the top surface of metal layer3010, intrinsic region3030is flooded with charge carriers from P+ region3020. As can be seen inFIG.4A, when two adjacent sensing elements, for example501and502are connected, all of the area under the metal layer3010in the region irradiated will be activated, including the area in switching region3009. Thus, two adjacent sensing elements can be grouped together for collecting current in response to incident electrons, while dead area between adjacent sensing elements can be eliminated. An isolation area need not be provided to separate adjacent sensing elements, for example501and502, in the cross sectional direction. As seen in the plane view ofFIG.3E, switching region3009A between sensing elements501and502is an activate area used for sensing. Switching region3009B between an active sensing element502and an inactive sensing element503, meanwhile, is not an active area used for sensing. Switching regions3009may span substantially a whole length of respective sensing elements. For example, a sensing element may have a rectangular shape extending in a first direction X and a second direction Y. The rectangular shaped sensing element may have a first side extending in the first direction and a second side extending in the second direction. A switching region3009may extend an entire length of the first side. Another switching region3009may extend an entire length of the second side. Additionally, switching regions may extend a length shorter than the first or second sides. The switching regions may be directly adjacent to the sensing element such that an active area can be made contiguous. It should be appreciated that PIN diodes can be realized in various configurations employing different arrangements of p- and n-type semiconductors. For example, various forms of a diode device3100, diode device3200, diode device3300, and diode device3400are illustrated inFIG.4B,FIG.4C,FIG.4D, andFIG.4E, respectively. Various combinations of sensor diodes and MOSFETs between the diodes are illustrated. InFIG.4BandFIG.4E, a MOSFET may be turned off when Vgs=0, and turned on when |Vgs|>|Vth|. In some instances, for example as shown inFIG.4CandFIG.4D, a depletion mode MOSFET can be used for a switch. For example,FIG.4Bshows diode device3100comprising metal3110, N+ region3120, intrinsic3130, P+ region3140, metal3150, enhancement mode MOSFET3101, N+ region3102, gate oxide3103, gate3104, and gate3105. Diode device3100may be configured with MOSFETs operable in a turn ON state3198and a turn OFF state3199. For example,FIG.4Cshows diode device3200comprising metal3210, P+ region3220, intrinsic3230, N+ region3240, metal3250, depletion mode MOSFET3201, P+ region3202, gate oxide3203, gate3204, and gate3205. Diode device3200may be configured with MOSFETs operable in a turn ON state3298and a turn OFF state3299. For example,FIG.4Dshows diode device3300comprising metal3310, N+ region3320, intrinsic3330, P+ region3340, metal3350, depletion mode MOSFET3301, N+ region3302, gate oxide3303, gate3304, and gate3305. Diode device3300may be configured with MOSFETs operable in a turn ON state3398and a turn OFF state3399. For example,FIG.4Eshows diode device3400comprising metal3410, P+ region3420, intrinsic3430, N+ region3440, metal3450, enhancement mode MOSFET3401, P+ region3402, gate oxide3403, gate3404, and gate3405. Diode device3400may be configured with MOSFETs operable in a turn ON state3498and a turn OFF state3499. While the above descriptions discuss a metal or metal layers, it is apparent that alternatives could be used, for example, a conductive material. When a detector having a sensor layer formed of a plurality of sensing elements includes a switching region between adjacent sensing elements, dead area can be reduced. For example, when two adjacent elements are connected, a switching region therebetween is included in an active area for sensing. As shall be discussed later, current induced by electrons incident on the surface of the detector above the switching region are included in an output signal. Thus, surface area that might otherwise be provided as isolation area separating individual pixels can be reclaimed as active sensing area. Larger sensing area can increase detection rate and provide better signal to noise ratio (SNR). Furthermore, eliminating isolation areas enables more pixels to be formed in a given area. Accordingly, a higher pixel count can be achieved. As shown inFIG.3E, a cross shaped area525may be provided. Area525may be an isolation area to isolate the corners of pixels from pixels which are across from each other in diagonal directions. Various shapes may be used instead of a cross. For example, area525may be provided as a square. Area525may also be provided as a diagonal line, so as to separate diagonal pixels with as small an area as possible. In some embodiments, area525can be eliminated to further reduce dead area. Although sensor surface500is depicted as having a rectangular grid arrangement, various geometric arrangements may be used. For example, sensing elements may be arranged in a hexagonal grid. Accordingly, individual sensing elements may have correspondingly different sizes and shapes. Sensing elements may also be arranged with octagonal tiling, triangular tiling, rhombic tiling, etc. Sensing elements need not be provided as uniform shapes and with regular packing. For example, pentagonal tiling with semiregular hexagons may be used. It is to be understood that these examples are exemplary, and various modifications may be applied. Reference is now made toFIG.5, which illustrates a simplified illustration of a layer structure of a detector600. Detector600may be provided as detector244as shown inFIG.2. Detector600may be configured to have a plurality of layers stacked in a thickness direction, which may be substantially parallel to an incidence direction of an electron beam. The plurality of layers may include a sensor layer610and a circuit layer620. Sensor layer610may be provided with sensor surface500, as described above. Sensing elements, for example sensing elements611,612, and613may be provided in sensing layer610. Switching elements619may be provided between adjacent sensing elements in the cross sectional direction. Switching elements619may be embedded in sensing layer610. For example, sensor layer610may be configured as a diode where sensing elements611,612, and613are similar to sensing elements501,502, and503, as discussed above. Furthermore, switching elements619may be configured as transistors, such as MOSFET3001. Each of sensing elements611,612,613may comprise outputs for making electrical connections to circuit layer620. Outputs may be integrated with switching elements619, or may be provided separately. Outputs may be integrated in a bottom layer of sensor layer610which may be a metal layer, such as that similar to metal layer3050. Circuit layer620is provided adjacent to sensor layer610. Circuit layer620comprises line wires and various electronic circuit components. Circuit layer620may comprise a processing system. Circuit layer620may be configured to receive the output current detected in sensor layer610. A circuit schematic is shown inFIG.6A. A dashed line represents a division between a sensor die701and a circuit die702. A layout such as that shown in circuit die702, for example, may represent a circuit provided in circuit layer620. A layout such as that shown in sensor die701, for example, may represent a plurality of sensing elements with a switching element therebetween. For example, sensor layer610may be configured in a sensor die. A further circuit schematic is shown inFIG.6B. A layout shown in circuit die702may include an additional comparator771, as shall be discussed later. A simplified circuit diagram is shown inFIG.7. As shown inFIG.7, a plurality of pixels P1, P2, P3, P4may be provided. Pixels P1, P2, P3, P4may represent pixels of a sensing array, each of which may be associated with a sensing element. In an exemplary process of detecting signal intensity from a sensing element, a sensing element in a sensor layer is configured to gather current induced by incident charged particles. Other types of energy conversion may be used. Current is output from the sensing element to a circuit layer configured to analyze the output from the sensing element. The circuit layer may comprise a wiring layout and a plurality of electronic components to analyze the output from the sensing element. A process of signal intensity detection will be discussed with reference toFIG.6A. One pixel may be associated with one sensing element of a sensing array. Thus, a first pixel is configured to generate a PIN diode current711. At the start of a process for PIN diode signal intensity detection, a switch721and a switch731are set to be open, while a switch741is set to be closed. Thus, voltage of a capacitor735can be reset to Vref2. Next, switch721and switch741are set to be open, while switch731is set to be closed. In this state, capacitor735begins charging and generates a voltage. Capacitor735may be configured to charge for a predetermined period of time, for example t_charge, after which switch731is set to be open. Then, comparator736compares the voltage at capacitor735to a reference value Vref1. Reference value Vref1 may be set as a predetermined signal level. Based on the reference value, a circuit may be configured to output a signal that indicates that the sensing element is gathering current from an incident electron beam. Thus, the reference value may be a suitable value that indicates that the signal level from the PIN diode is high enough to be considered to be gathering current from an incident electron beam included within a beam spot. In comparator736, if voltage from capacitor735is higher than Vref1, an output signal is sent to block750. Vref1 can be set so that each sensing element can be controlled to be included within an outer boundary of a beam spot. The value t_charge can be determined based on local logic or an external circuit, for example through a data line752communicating with block750. Logic blocks and circuitry components may be set so that functions such as signal intensity detection and pixel grouping determination can occur locally. However, signal intensity of each sensing element can be collected and determinations can be made via an external path. For example, an analog signal path and ADC may communicate with an external controller via an analog signal line and a data line. As described herein, each pixel in a sensing array may be associated with a sensing element that generates current based on incident electrons on the sensing element, and communicates with a circuit layer. Pixels may be connected to circuitry such as that discussed above with reference to the first pixel configured to generate PIN diode current711. Thus, a second pixel may be configured to generate a PIN diode current712, and so on. PIN diode current712may be connected to corresponding circuit elements, for example, switch721b, switch731b, switch741b, capacitor735b, comparator736b, block750b, etc. Generation and setting of a status indicator will be discussed, again with reference toFIG.6A. Using the output current from the sensing element, the circuit layer is configured to generate a status indicator. The status indicator may be configured to trigger a function for implementing grouping of pixels. Various methods for achieving sensing element grouping can be provided. In a first method for grouping, sensing element grouping may be achieved according to a signal strength flag in a local logic circuit. If a first pixel and a second pixel have a strong signal strength, the two pixels may be grouped. For example, PIN diode current711and PIN diode current712may both have high current values. Namely, voltage at capacitor735and voltage at capacitor735bmay both be higher than Vref1. Then, a switch767is set to be closed so as to merge the two pixels. If at least one of the first pixel and the second pixel has a weak signal, that is, either voltage at capacitor735or capacitor735bis less than Vref1, switch767is set to be open so that the two pixels are not merged. Switch767is configured as an element to implement a switch between two sensing elements. Switch767is located in sensor die701. Switch767may be embedded in sensor die701. Switch767may be configured as a transistor, such as MOSFET3001. Switch767may be triggered by local logic in the circuit die702. Output from comparator736and output from comparator736bmay be routed to a block for activating switch767. For example, as illustrated inFIG.6A, an AND gate760is provided. AND gate760is arranged in circuit die702. AND gate760is associated with two pixels, and is associated with one switch between the two pixels. Output from comparator736and736bmay be routed, directly or through other blocks, to AND gate760. Based on signals input to AND gate760, for example status indicator751and status indicator751b, AND gate760is configured to toggle switch767. When switch767is a transistor, such as a field effect transistor, the switch may be toggled by application of voltage to its gate. For example, in the configuration ofFIG.4A, voltage may be applied to gate3004. While an AND gate is illustrated, it should be appreciated that various components may be used to achieve switching of a switch arranged between sensing elements based on output signals from the sensing elements. For example,FIG.7is a simplified circuit diagram illustrating an arrangement of four pixels in an array. In the array, a first pixel P1may be configured to generate a PIN diode current711, and output a status signal S1based thereon. Status signal S1may correspond to status indicator75L A second pixel P2may be configured to generate PIN diode current712, and output a status signal S2based thereon. Status signal S2may correspond to status indicator751b. Status signal S1from first pixel P1and status signal S2from second pixel P2are input to an AND gate760. Status signal S1and status signal S2can be generated based on signals generated at each of pixel P1and pixel P2, for example, a current signal may be induced by electrons incident on the surface of the pixel. Status signal S1may be generated based on whether current at pixel P1reaches a predetermined threshold. Similarly, status signal S2may be generated based on whether current at pixel P2reaches a predetermined threshold. AND gate760outputs a signal based on status signal S1and status signal S2to switch767. Thus, switch767is configured to be controlled based on input signals generated from at least two pixels. Such an input signal may be a voltage. It will be apparent that various other blocks or electrical components could be used to achieve control of switch767. Similar components may be provided for other pixels of the array. For example, a switch767dis provided between pixel P3and pixel P4. Pixel P3and pixel P4may be configured to output status signals S3and S4, respectively, similar to pixels P1and P2. Furthermore, a pixel may be in communication with multiple other pixels. For example, in addition to switch767configured to connect pixels P1and P2, a switch767bmay be provided between pixels P1and P3, and so on. Status signal S1may be configured to be sent to multiple neighboring pixels. In a second method for grouping, sensing element grouping may be achieved according to external logic circuits. For example, inFIGS.6A and6B, block750may be a digital logic block. Block750may communicate with external components via data line752and an address signal753. Status indicator751can be overwritten by external logic circuitry via data line752to control the status of switch767. Such external logic circuitry may also be provided in circuit die702, or may be provided as a separate system attached to block750by an input/output device. In some embodiments, local control logic associated with each pixel generates an indication of signal level of its corresponding sensing element. This indication can be used to determine whether two adjacent sensing elements should be connected by the MOSFET formed between them. In this way, groups of sensing elements can be formed. Based on the formed groups, a primary boundary can be formed. To generate gradient information on signal intensity, additional comparator771may be provided, as shown inFIG.6B. A result from comparator771can be fed to logic blocks750and750b. With an arrangement including comparator771, processing may be carried out to generate a value representing the intensity of a beam spot based on the determined primary boundary. Grouping can be carried out based on which electron sensing elements are determined to lie outside the primary boundary of the beam spot. In electron beam imaging, beamlet image acquisition may be carried out. A process of image acquisition will be discussed with reference toFIG.6A. Initially, switch721and switch731are set to be open, while switch741is set to be closed. For each row of a detector array, switch721(or a corresponding switch) is set to be closed, one-by-one. By sequentially closing switch721and corresponding switches, electronic scanning of a detector surface can be carried out. Scanning may be implemented to read the analog signal of each pixel. For example, analog output line722may be configured to be read by an analog path, output to external devices, or sent to an analog-to-digital converter (ADC). Based on signals output from analog output line722, image reconstruction of beams or beamlets can be achieved. A controller may be used to conduct image acquisition based on the reconstructed image. The reconstructed image can be used to determine the boundary of a group of sensing elements. For example, one group can be defined to correspond to one beamlet. Summed signal intensity of the sensing elements in the group is thus representative of the current of the one beamlet. The reconstructed image can also be used to evaluate the performance of the electron optical system. For example, primary projection optical system220and/or secondary optical system242may be adjusted based on the reconstructed image. The reconstructed image may be used to compensate for imperfections or drift in electron optical sub-systems. Moreover, a low impedance output path of current signal from groups of pixels can be achieved. For example, a plurality of switches, such as switch721, may be provided for a plurality of pixels in the same group. Pixels of the same group may be in close proximity. A plurality of analog signal lines, such as analog output line722, may be routed to a grouped output Additionally, the plurality of analog signal lines may be connected when they are grouped to the same group of the plurality of pixels. While an example has been discussed with reference to electron beam inspection systems, it should be noted that for photo image sensor applications, a buffer can be added after switch721to improve performance. In an exemplary embodiment of a detector array, individual sensing elements in the detector array can be enabled or disabled. In normal operation for electron beam imaging, certain sensing elements may be enabled to detect incident beam current. For example, with reference toFIG.6A, a pixel may be enabled when voltage at capacitor735is greater than or equal to Vref1. A pixel may also be enabled by external logic circuits, for example in an override mode. In override mode, switch721may be open or closed depending on a control signal from external logic to decide the signal output routing. In override mode, switch731may be set to be open and switch741may be set to be closed. A pixel may be disabled when voltage at capacitor735is lower than Vref1. A pixel may also be disabled by external logic circuits, for example in an override mode. In an override mode for disabling, switch721may be set to be open. Switch731and switch741may be set to be closed. Operation in override modes may be conducted when, for example, it is determined that crosstalk is present in the sensing elements. Crosstalk can occur when a beam partially overlaps with an adjacent beam due to aberration, dispersion, and the like. In some embodiments, a processing system can detect the occurrence of partial overlapping based on primary or secondary beam spot boundaries. The processing system can exclude outputs from some sensing elements that are located in the area where beam spots overlap when determining intensity values of beam spots. Reference is now made toFIG.8, which illustrates a diagram relating location data of sensing elements. A detector array may comprise a plurality of sensing elements arranged to form J×K pixels having M×N channels. A single sensing element may be represented by pixel P1. Pixel P1has an address column AC_1. Pixel P2has an address column AC_2, and so on. For example, in the exemplary array having J×K pixels, pixel PJKhas an address column AC_J and an address row AR_K. Each column may have an analog column. For example, pixel P1has analog column AnC_1, which carries output current from the sensing element of pixel P1. Each sensing element can be selected by address column and address row signals. For example, pixel P1may be addressed by AC_1and AR_1. Data can be read and written by data row signals to each local logic circuit associated with each sensing element. For example, data can be sent to and received from pixel P1via data row DR_1. Digital logic DL may control data read/write, etc. Analog signal from each sensing element may travel through corresponding analog column lines to reach a multiplexer Mux. Multiplexer Mux may be located in the detector array. Multiplexer Mux may also be external to the detector array. Multiplexer Mux may have J inputs and M×N outputs. Pixels can be identified and grouped by their respective address line information. Any two pixels in a detector array can be in communication. Thus, grouping between any arbitrary number of pixels, in any arbitrary locations, can be achieved. Location information of the plurality of sensing elements may be used in various ways. For example, location information may be correlated with beam intensity to determine boundaries of beam spots. Additionally, based on the locations of the electron sensing elements that give rise to signal intensity comparator decisions, the processing system can identify a location on the sensor surface where a transition between the intensity gradients occurs. Intensity gradient information can be used for determinations involving primary and secondary boundaries. In some embodiments, location data may also be used to operate in override modes to control switching elements between two pixels independently of local logic. A processing system, for example, a processor embedded in circuit die702or externally connected may perform processing to determine identified locations as part of a beam boundary. The processing system may comprise an arrangement of comparators configured to perform processing based on voltage comparisons for each row and column of electron sensing elements to determine a set of locations on the detector array surface that may make up a beam boundary. In some embodiments, the processing system can also improve the fidelity of image reconstruction by compensating for the effect of noise signals using boundary information. The processing system can exclude signals received from outputs of electron sensing elements that are determined to be located outside a beam primary boundary. This can improve fidelity of image reconstruction by eliminating the random noise signals from electron sensing elements outside the primary boundary. InFIG.8, lines interconnecting a plurality of sensing elements, for example lines illustrated as AC_1, AR_1, DR_1, AnC_1, etc. may be wire lines patterned by printing a conductive material on a substrate. Wire lines can be manufactured in various manners, such as by normal processes used in fabricating a MOSFET. The wire lines may be part of a circuit layer of a detector array. Reference is now made toFIG.9, which illustrates a detection system900using a detector array comprising a plurality of sensing elements. A detector array may be provided having a detector sensor surface500that can be used on electron detection device244. The detector array may comprise J×K pixels, and have M×N outputs to be connected with a multiplexer, for example multiplexer Mux. The detector array may be constructed as a substrate including a sensor layer and a circuit layer, as discussed herein. The detector array may be connected to a signal conditioning circuit array910. Signal conditioning circuit array910may have M×N inputs and outputs so as to match the detector array. Signal conditioning circuit array910may be connected to a parallel analog signal processing path920for providing gain and offset control. Parallel analog signal processing path920may have M×N inputs and outputs so as to match the detector array. Parallel analog signal processing path920may be connected to a parallel ADC930, which may have M×N inputs and outputs so as to match the detector array. Parallel ADC930may be connected to digital control unit940. Digital control unit940may comprise a controller941which can communicate with parallel analog signal processing path920, parallel analog signal processing path920, and with the detector array. Digital control unit940may send and receive communications from a deflection and image control (DIC) unit via a control signal and a transmitter TX. An external controller, such as controller941, may be configured to execute imaging control. For example, controller941may be configured to generate an image of detected beamlets. Furthermore, grouping can be determined on the basis of primary and secondary beam spot boundaries. In some embodiments, a switching matrix need not be provided in detection system900. Since switches are integrated in the detector array, for example in a sensor layer of the detector array, a construction which is more apt for being scaled up can be achieved. Furthermore, since J×K pixels are initially grouped in M×N groups in the detector, the number of output may be reduced. Output from a plurality of pixels that are grouped may have a common output. For example, an arrangement having M×N outputs can be achieved. The total number of outputs may be largely reduced compared to conventional detector arrays. The detector array may comprise its own memory so that the detector array can store an arrangement of the plurality of sensing elements and their associated circuitry. For example, the status of local indication751, and the grouping of sensing elements can be stored in the memory. A state of switches can be stored in the memory. The embodiments may further be described using the following clauses:1. A detector comprising:a substrate comprising a plurality of sensing elements including a first element, a second element, and a switching region configured to connect the first element and the second element,wherein the first element is configured to generate a first signal in response to the first element detecting first charges particles that indicate a beam, and the second element is configured to generate a second signal in response to the second element detecting second charged particles that indicate the beam, andwherein the switching region is configured to be controlled based on the first signal and the second signal.2. The detector of clause 1, further comprising:a sensor die that includes the substrate; anda circuit die that includes one or more circuits configured to control the switching region.3. The detector of any one of clauses 1 and 2, wherein the switching region comprises a switch configured to connect the first element and the second element.4. The detector of any one of clauses 1-3, wherein the substrate comprises a diode configured to transport charge carriers in the switching region.5. The detector of any one of clauses 1-4, whereinthe first element is configured to generate the first signal in response to the first element receiving charged particles with a first predetermined amount of energy, and the second element is configured to generate the second signal in response to receiving charged particles with a second predetermined amount of energy.6. The detector of any one of clauses 1-4, whereinthe first element is configured to generate the first signal in response to the first element receiving electrons with a first predetermined amount of energy, and the second element is configured to generate the second signal in response to receiving electrons with a second predetermined amount of energy.7. The detector of any one of clauses 1-6,wherein, in a thickness direction, the substrate comprises: a top metal layer configured as a detection surface, and a bottom metal layer, andwherein, in a cross section, an entire area between the top metal layer and the bottom metal layer is a charge carrier region.8. The detector of clause 7, wherein the switching region comprises a field effect transistor, the field effect transistor comprises a gate fabricated in the bottom metal layer or a contact of the gate fabricated in the bottom metal layer.9. A detector comprising:a sensor layer comprising:an array of sensing elements including a first element and a second element wherein the first element and the second element are adjacent; anda switching region between the first element and the second element; anda circuit layer comprising one or more circuits electrically connected to the first element and the second element, the one or more circuits configured to:generate a first status indicator when the first element receives charged particles with a predetermined amount of energy,generate a second status indicator when the second element receives charged particles with a predetermined amount of energy; andcontrol the switching region based on the first status indicator and the second status indicator.10. The detector of clause 9, whereinthe circuit is configured to control the switching region between a first state and a second state,wherein in the first state the switching region is part of an active group,wherein in the second state the switching region is part of an inactive group.11. The detector of any one of clauses 9 and 10, wherein the switching region comprises a transistor.12. The detector of any one of clauses 9-11, wherein in a plane view of the substrate, the first element, the second element, and the switching region are contiguous along a first direction in which the first element and the second element are arranged.13. A detector system, comprisinga detector array comprising a plurality of sensing elements including a first element and a second element; and a switching region configured to connect the first element and the second element;one or more circuits configured to generate a first signal in response to the first element detecting first charged particles that indicate a beam, and generate a second signal in response to the second element detecting second charged particles that indicate the beam; anda controller connected to any of the one or more circuits.14. The system of clause 13, whereinthe controller is configured to control the switching region based on an address of at least one of the first element and the second element.15. The system of any one of clauses 13 and 14, whereinthe controller is configured to acquire an image of the beam, and generate a command signal based on the image; andthe one or more circuits are configured to control the switching region based on the command signal.16. The system of any one of clauses 13-15, whereinthe detector array comprises a first number of pixels configured to be grouped in a second number of groups, the second number being less than the first number.17. The system of clause 16, further comprising:a signal conditioning circuit array;a parallel analog signal processing path array;a parallel analog-to-digital converter array; anda digital control unit,wherein the signal conditioning circuit array, the parallel analog signal processing path array, the parallel analog-to-digital converter array, and the digital control unit are connected to the detector array via a plurality of channels, a number of the plurality of channels being greater than or equal to the second number.18. The system of any one of clauses 13-17, wherein the controller is configured to override a local logic of the one or more circuits.19. The system of any one of clauses 13-18, wherein the one or more circuits comprise the controller.20. The system of any one of clauses 13-18, wherein the controller is external to the detector array.21. The system of any one of clauses 13-20, wherein the first element and the second element have a common output.22. The system of clause 17, wherein the number of the plurality of channels is equal to the second number.23. The detector of any one of clauses 5 or 6, wherein the first predetermined energy and the second predetermined energy are a same predetermined energy.24. The detector of any one of clauses 5 or 6, wherein the first predetermined energy and the second predetermined energy are different predetermined energies.25. The detector of clause 5, wherein the charged particles are electrons. The block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer hardware/software products according to various exemplary embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code which comprises one or more executable instructions for implementing the specified logical functions. It should be understood that in some alternative implementations, functions indicated in the block may occur out of the order noted in the Figures. For example, two blocks shown in succession may be executed or implemented substantially concurrently, or two blocks may sometimes be executed in reverse order, depending upon the functionality involved. It should also be understood that each block of the block diagrams, and combination of the blocks, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or by combinations of special purpose hardware and computer instructions. It will be appreciated that the present invention is not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes can be made without departing from the scope thereof. For example, while an exemplary detector has been set forth and described with respect to an electron beam system, a detector consistent with aspects of the present disclosure may be applied in a photo detector system, x-ray detector system, and other detection systems for high energy ionizing particles, etc. Detectors according to aspects of the present disclosure may be applied in a scanning electron microscope (SEM), a CMOS image sensor, a consumer camera, a specialized camera, or industry-use camera, etc. It is intended that the scope of the invention should only be limited by the appended claims. | 60,921 |
11942305 | DETAILED DESCRIPTION In one embodiment, a data generation method includes generating a plurality of parametric elements by dividing, at positions of an extremum and an inflection point, a parametric curve that expresses a shape of a writing pattern and is defined by a plurality of control points arranged in order in a predetermined direction, generating a polygon by extracting, for each of the parametric elements, one or some of the plurality of control points and connecting the extracted control points in order in the predetermined direction, calculating a coverage by the polygon in each of a plurality of rectangular segmented regions obtained by dividing a target to be irradiated with a charged particle beam into a predetermined size, and calculating a coverage of each segmented region in a peripheral part of the writing pattern by finding intersections of each of the plurality of parametric elements and four sides of each of the plurality of segmented regions. Hereinafter, an embodiment of the present invention will be described based on the drawings. In the present embodiment, a configuration will be described, which uses an electron beam as an example of a charged particle beam. However, the charged particle beam is not limited to an electron beam, and may be an ion beam or the like. FIG.1illustrates an outline configuration of a writing device according to an embodiment. As illustrated inFIG.1, the writing device100includes a writing unit150and a control unit160. The writing device100is an example of a multi charged particle beam writing device. The writing unit150includes an electron column102and a writing chamber103. In the electron column102, an electron gun201, a lighting lens202, a shaping aperture array plate203, a blanking aperture array plate204, a reducing lens205, a limiting aperture member206, an objective lens207, and a deflector208are disposed. In the writing chamber103, an XY stage105is disposed. A substrate101on which a pattern is to be written is disposed on the XY stage105. The substrate101is, for example, mask blanks or a semiconductor substrate (silicon wafer). Furthermore, a mirror210for position measurement is disposed on the XY stage105. The control unit160has a control calculator110, a deflection control circuit130, a stage position detector139, and a storage unit140. The storage unit140stores therein writing data supplied from an outside. In the writing data, information on a plurality of figure patterns describing patterns to be formed on the substrate101is defined. The figure patterns include a curve, and a shape thereof is defined, for example, by a cubic B-spline curve, as described later. The control calculator110has an area density calculation unit111, an irradiation time calculation unit112, a data processing unit113, and a writing control unit114. Each unit of the control calculator110may be realized by hardware such as an electric circuit or may be realized by software such as programs that execute these functions. Alternatively, each unit of the control calculator110may be realized by a combination of hardware and software. The stage position detector139irradiates the mirror210with a laser, receives reflected light, and detects a position of the XY stage105by using the principle of laser interferometry. FIG.2is a conceptual diagram illustrating a configuration of the shaping aperture array plate203. As illustrated inFIG.2, the shaping aperture array plate203has a plurality of openings203aformed at predetermined intervals along a lengthwise direction (y direction) and a lateral direction (x direction). The openings203aare preferably rectangles or circles having the same dimension and shape. A part of an electron beam200passes each of the plurality of openings203a, and thus multi-beams20ato20eare formed. The blanking aperture array plate204has passage holes at positions corresponding to the openings203aof the shaping aperture array plate203. A blanker made up of a pair of electrodes is disposed in each passage hole. Of the two electrodes of the blanker, for example, one electrode is grounded and kept at a ground potential, and the other electrode is switched to a ground potential or a potential other than the ground potential. This switches OFF/ON of deflection of a beam passing a passage hole, thereby controlling blanking. In a case where the blanker does not deflect a beam, the beam is ON. In a case where the blanker deflects a beam, the beam is OFF. In this way, the plurality of blankers perform blanking deflection of corresponding beams of multi-beams that have passed the plurality of openings203aof the shaping aperture array plate203. The electron beam200emitted from the electron gun201(emitting unit) illuminates the whole shaping aperture array plate203due to the lighting lens202. The electron beam200illuminates a region including all of the openings203a. The electron beam200passes the plurality of openings203aof the shaping aperture array plate203, and thus a plurality of electron beams (multi beams)20ato20ehaving, for example, a rectangular shape is formed. The multi-beams20ato20epass corresponding blankers of the blanking aperture array plate204. Each of the blankers performs blanking deflection of a beam that is switched off among electron beams that individually pass the blankers. Each of the blankers does not perform blanking deflection of a beam that is switched on. The multi-beams20ato20ethat have passed the blanking aperture array plate204are reduced by the reducing lens205and travel toward a central opening of the limiting aperture member206. A beam that is controlled to a beam off state is deflected by the blanker and travels along a path passing an outside of the opening of the limiting aperture member206and is therefore blocked by the limiting aperture member206. Meanwhile, a beam that is controlled to a beam on state is not deflected by the blanker and therefore passes the opening of the limiting aperture member206. In this way, blanking control is performed by ON/OFF of deflection of the blanker, and thus ON/OFF of a beam is controlled. The blanking aperture array plate204functions as an irradiation time control unit that controls an irradiation time of each beam of multi-beams. The limiting aperture member206allows beams deflected to a beam ON state by the blankers of the blanking aperture array plate204to pass therethrough and blocks beams deflected to a beam OFF state by the blankers of the blanking aperture array plate204. One shot of multi-beams is formed by beams formed from beam ON to beam OFF and having passed the limiting aperture member206. The multi-beams that have passed the limiting aperture member206are focused by the objective lens207and form a pattern image of a desired reduction rate on the substrate101. The beams (whole multi-beams) that have passed the limiting aperture member206are collectively deflected by the deflector208in the same direction and reach a desired position on the substrate101. In a case where the XY stage105is continuously moving, a beam irradiation position is controlled by the deflector208so as to follow movement of the XY stage105at least while the substrate101is irradiated with the beams. The multi-beams that are radiated one time are ideally arranged at intervals obtained by multiplying the intervals at which the plurality of openings203aof the shaping aperture array plate203are arranged by the desired reduction rate. Next, a pattern writing method according to the present embodiment is described with reference to the flowchart illustrated inFIG.3. In a pattern area density calculation step (step S1), the area density calculation unit111virtually divides a writing region of the substrate101to be irradiated with a beam into a plurality of mesh regions. A size of each of the mesh regions is, for example, equivalent to a size of a single beam, and each of the mesh regions becomes a pixel (unit irradiation region). The area density calculation unit111reads out writing data from the storage unit140, calculates a pattern area density (coverage) ρ of each pixel (rectangular segmented region) by using a pattern defined in the writing data, and generates a pixel map that defines a coverage of each pixel. A method for generating the pixel map will be described later. In an irradiation time calculation step (step S2), the irradiation time calculation unit112calculates an irradiation amount ρD0of a beam with which each pixel is irradiated by multiplying the pattern area density ρ with a reference irradiation amount D0. The irradiation time calculation unit112may further multiply a correction coefficient for correcting a proximity effect or the like. The irradiation time calculation unit112calculates an irradiation time of each of the plurality of beams that constitute the multi-beams by dividing the irradiation amount by a current amount of the beam. In an irradiation time control data generation step (step S3), the data processing unit113generates irradiation time control data by rearranging the irradiation time data in a shot order according to a writing sequence. In a data transfer step (step S4), the writing control unit114supplies the irradiation time control data to the deflection control circuit130. The deflection control circuit130supplies the irradiation time control data to each blanker of the blanking aperture array plate204. In a writing step (step S5), the writing control unit114controls the writing unit150to perform writing processing on the substrate101. Each blanker of the blanking aperture array plate204gives a desired exposure amount to each pixel by switching ON/OFF of a beam on the basis of the irradiation time control data. FIG.4is a conceptual diagram for explaining writing operation. As illustrated inFIG.4, the writing region80of the substrate101is, for example, virtually divided into a plurality of stripe regions82having a strip shape of a predetermined width in a y direction (first direction). First, the XY stage105is moved so that an irradiation region (beam array)84that can be irradiated by one irradiation of multi-beams is located at a left end of the first stripe region82, and then writing starts. When the first stripe region82is written, writing is performed in a +x direction relatively by moving the XY stage105in a −x direction. The XY stage105is continuously moved at a predetermined speed. After end of the writing of the first stripe region82, the stage position is moved in the −y direction so that the beam array84is located at a right end of the second stripe region82. Next, writing is performed in the −x direction by moving the XY stage105in the +x direction. In the third stripe region82, writing is performed in the +x direction, and in the fourth stripe region82, writing is performed in the −x direction. A writing time can be shortened by performing writing while alternately changing a direction. Alternatively, the stripe regions82may be always written in the same direction, that is, either the +x direction or the −x direction. Next, a method for generating a pixel map by the area density calculation unit111is described with reference to the flowchart illustrated inFIG.5. The area density calculation unit111reads out writing data from the storage unit140and converts a curve of a figure pattern (writing pattern) defined by a cubic B-spline curve into a cubic Bezier curve (step S101). For example, the cubic B-spline curve illustrated inFIG.6ais converted into a cubic Bezier curve illustrated inFIG.6b.FIG.6cillustrates an example of a conversion formula. A cubic Bezier curve is expressed by four control points, as illustrated inFIG.7a. That is, in the example illustrated inFIG.6b, consecutive combinations of four control points surround a figure. Among the four control points, two control points, specifically, a start point and an end point are located on a curve. A plurality of control points are defined and arranged in order in a predetermined direction (a clockwise direction or a counterclockwise direction) along a periphery of a figure. The area density calculation unit111divides a Bezier curve expressed by four control points into smaller Bezier curves at positions of an extremum and an inflection point (step S102). The inflection point is a point at which curvature=(dPx/dt)(dPy2/dt2)−(dPy/dt)(dPx2/dt2)=0. The extremum is a point at which dPx/dt=0 and dPy/dt=0. Hereinafter, Bezier curves divided at positions of an extremum and an inflection point are referred to as Bezier elements. For example, a Bezier curve illustrated inFIG.7aincludes a single maximal value, a single minimal value, and a single inflection point and is therefore divided into four Bezier elements B1to B4as illustrated inFIG.7b. As illustrated inFIG.7c, each Bezier element is a curve element that monotonically increases or monotonically decreases in an X direction and a Y direction. FIG.8ais identical toFIG.6band illustrates a Bezier curve before division at positions of an extremum and an inflection point.FIG.8billustrates a Bezier curve (Bezier elements) after division. Next, a polygon (hereinafter referred to as an “internal polygon”) is generated by extracting, for each of a plurality of Bezier elements, some of a plurality of control points and connecting the extracted control points by a straight line along an original definition order (a clockwise order or a counterclockwise order along a periphery of a figure) (step S103). In the present embodiment, the internal polygon is generated by extracting a start point and an end point of each of the Bezier elements. For example, the internal polygon such as the one illustrated inFIG.8cis generated by connecting a start point and an end point of each of the Bezier elements illustrated inFIG.8bin the definition order. The generated internal polygon is divided into triangles by a known method (step S104). The generated internal polygon need not be divided into triangles and may be divided by using trapezoids. A first pixel map is generated by calculating a coverage (area density) of each pixel by the internal polygon by using triangles obtained by dividing the internal polygon (step S105). The Bezier elements are classified into eight types illustrated inFIG.9aon the basis of an inclination of a segment connecting a start point and an end point and whether a control point other than the start point and the end point is located on the left or the right of a traveling direction of the segment (step S106). Each of the Bezier elements is rotated and/or inversed so as to become a basic Bezier element illustrated inFIG.9b(step S107). It is determined, for each pixel, whether a boundary line of the pixel intersects a curve of the basic Bezier element (step S108). As illustrated inFIG.10, an intersection is found by solving a third degree equation combining the Bezier curve and a straight line representing the pixel boundary. For example, intersections P1and P2illustrated inFIG.11are found. In a case where an intersection is present on a left side L or a bottom side B of the pixel, a remaining intersection is present on an upper side T or a right side R. In a case where no intersection is present on the left side L and the bottom side B, no intersection is present in this pixel. A maximum number of intersections per pixel is two. By taking this into consideration, intersection determination can be efficiently performed. As illustrated inFIG.12, the intersection determination may be performed by dividing a section from t=0 to t=1 on a curve by Δt, calculating coordinates at each position on the curve, and performing linear interpolation calculation on the basis of values of a point tiexceeding coordinate values of a pixel boundary for which an intersection is to be found by Δt or less and a previous point ti-1. The interpolation calculation is performed for t on the basis of the coordinate values. The calculation of coordinates per Δt may be performed in parallel by using threads of a GPU or the like. In a case where a boundary line of a pixel and a curve of a Bezier element intersect, the pixel is divided into triangular parts (A1and A3) and a fan-shaped part (A2), and an area of each part is calculated, as illustrated inFIG.13. The area of the fan-shaped part is calculated as a line integral between intersections with the pixel. A second pixel map is generated by adding the areas of the triangular parts and the fan-shaped part and calculating a coverage of the pixel (step S109). The calculated coverage is a coverage of a pixel in a peripheral part of a figure (writing pattern). Note that in a case where the Bezier element is located inside a line of the internal polygon, the calculated coverage is multiplied by −1. The second pixel map that has been subjected to inverse operation for rotation and/or inversion in step S107and the first pixel map generated in step S105are added to generate a third pixel map (step S110). This third pixel map is used when the irradiation time calculation unit112calculates an amount of irradiation of a beam with which each pixel is irradiated. As described above, according to the present embodiment, a Bezier curve is divided into small Bezier curves (Bezier elements) at an extremum and an inflection point. Accordingly, the maximum number of intersections of each pixel and the Bezier element is two. This makes it easy to calculate the intersections and a coverage, thereby making it possible to calculate a pixel coverage speedily and accurately. In a case where the method according to the embodiment is not used, a Bezier curve (parametric curve) intersects one side of a segmented region (pixel) plural times or intersects three or more sides in some cases depending on an order of the curve. This makes it necessary to calculate a coverage while considering various ways of intersection, leading to an increase in processing amount. On the other hand, in a case where a parametric curve is divided at an extremum and an inflection point as in the above embodiment, curve elements obtained after the division have a shape that monotonously increases or decreases in one direction. Accordingly, in a case where the curve element intersects four sides (a right side, an upper side, a left side, and a lower side) of a boundary of a segmented region, the number of intersections is two, and the curve element intersects different sides. This simplifies a way of intersection of the curve element and the boundary of the segmented region. As a result, calculation of a coverage becomes easy, and a processing amount can be reduced. Furthermore, the number of elements to be processed is small and approximation is not performed, as compared with conventional coverage calculation using polygon approximation. It is therefore possible to calculate a coverage speedily and accurately. A plurality of Bezier elements generated by division of a Bezier curve can be used as units of parallel processing. For example, the Bezier elements can be effectively used in parallel computation using a GPU, and high-speed processing can be realized. Although an example of conversion into a cubic Bezier curve has been described in the above embodiment, an order of the curve is not limited to 3. Although an example in which an input figure is expressed by a B-spline has been described in the above embodiment, a figure expressed by any of other parametric curves may be input data, as long as the figure can be converted into a Bezier curve. The above processing may be performed by using a parametric curve other than a Bezier curve. The parametric curve is divided at positions of an extremum and an inflection point to generate a plurality of parametric elements. An internal polygon is generated by connecting at least one of a plurality of control points included in each of the parametric elements in order with a line. Intersections of each of the plurality of parametric elements and a pixel boundary are found to calculate a pixel coverage in a peripheral part of a figure. A coverage of each pixel is calculated from this pixel coverage and a pixel coverage by an internal polygon. Although a writing device that writes a pattern on a substrate has been described in the above embodiment, the present invention is also applicable to other irradiation devices such as an inspection device that irradiate a target object with a beam. Although a multi-beam irradiation device that radiate a lot of beams at one time by using multi-beams has been described in the above embodiment, a similar method is also applicable to a single-beam irradiation device that irradiates a target substrate with a single beam. At least part of the control calculator110described in the above embodiments may be implemented in either hardware or software. When implemented in software, a program that realizes at least part of functions of the control calculator110may be stored on a recording medium such as a flexible disk or CD-ROM and read and executed by a computer. The recording medium is not limited to a removable recording medium such as a magnetic disk or optical disk, but may be a non-removable recording medium such as a hard disk device or memory. The program that realizes at least part of the functions of the control calculator110may be distributed through a communication line (including wireless communications) such as the Internet. Further, the program may be encrypted, modulated, or compressed to be distributed through a wired line or wireless line such as the Internet or to be distributed by storing the program on a recording medium. While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions. | 22,285 |
11942306 | Like reference numbers and designations in the various drawings indicate like elements. DETAILED DESCRIPTION FIG.1Ashows a simplified schematic view of a prior art (direct-current) DC plasma reaction chamber (110) that can be used in a DC plasma processing system. Biasing of the DC plasma reaction chamber (110) may be provided by a DC voltage source (150) coupled between an anode, A, and a cathode, C, of the DC plasma reaction chamber (110). During operation, a glow discharge (plasma) may be formed in the chamber (110) based on interaction of a gas and electrons of a current that flows between the anode, A, and the cathode, C. This in turn produces free ions and electrons in the chamber (110). The principle of operation of such DC plasma reaction chamber (110) is well known to a person skilled in the art and therefore related details are omitted in the present disclosure. As shown inFIG.1A, the glow discharge formed in the chamber (110) may include glow regions (G1, G2, G3, G4) that emit significant light, and dark regions (D1, D2, D3, D4) that may not emit light. Such regions may represent different operating characteristics of the DC plasma reaction chamber (110), including, for example, temperature and electric potential. FIG.1Bshows a graph representative of a variation in the (electric) potential, Vpp, of the plasma along an axial direction (direction of longitudinal extension), X, of the chamber (110) during operation. As shown inFIG.1B, the plasma potential, Vpp, varies from a value, Vc, that represents the potential applied to the cathode, C, by the DC voltage source (150ofFIG.1A), to a value, VA, that represents the potential applied to the anode, A, by the DC voltage source (150ofFIG.1A). It should be noted that as shown for example inFIG.1Dlater described, generally the value, VA, is at zero volts (e.g., reference ground) and the value, Vc, is negative (e.g., in a range of about 0 (zero) to −500 volts). With continued reference toFIG.1B, abrupt variation of the potential, Vpp, in the regions (e.g., D1, G1, D2) close to the cathode, C, and in the regions (e.g., G4) close to the anode, A, may correspond to regions of higher operating temperatures of the chamber (110). On the other side, the region G3, also known as the positive column, is a region of quasi uniform/constant potential, Vpp, and of lower operating temperature. For example, considering a segment [XG31, XG32] along the axial direction, X, of the chamber (110) that as shown inFIG.1Bis contained within the positive column region, G3, a variation of the plasma potential, Vpp, across such segment [XG31, XG32] is minimal, or in other words, the potential, Vpp, across the segment [XG31, XG32] may be considered as constant. Accordingly, as shown inFIG.1B, the plasma potential, Vpp, across the segment [XG31, XG32] may be considered as equal to a value VG3. The lower operating temperature and the constant potential value of the plasma in the positive column region, G3, allow use of such region for processing of substrates as shown inFIG.1CandFIG.1D. FIG.1Cshows a simplified schematic view of a DC plasma processing system (100C) comprising a (substrate) stage, S, arranged in the positive column region, G3, of the DC plasma reaction chamber (110). The stage, S, may be designed to support a flat substrate, and therefore may include a top flat/planar surface. The stage, S, shown inFIG.1Cis electrically isolated (not connected to any external electric potential) and therefore, and as known to a person skilled in the art, in the presence of the plasma potential, Vpp, a potential, Vs, develops at the surface of the stage, S, that is referred to as the surface floating potential, VFP. The relationship of the (surface) floating potential, VFP, to the plasma potential, Vpp, is shownFIG.1C. In particular, as shown inFIG.1C, the plasma potential, Vpp, at a region [XG31, XG32] of the chamber (110) where the stage, S, is arranged is equal to VG3, and the floating potential, VFP, is lower than (negative with respect to) the plasma potential VG3. The floating potential, VFP, shown in the graph ofFIG.1Ccan be attributed to the “plasma sheath” that develops in the presence of the stage, S. As known to a person skilled in the art, at the wall or any barrier within the plasma, a negative potential develops with respect to the bulk of the plasma. Consequently, an equilibrium potential drop develops between the bulk of the plasma and the wall or barrier. Such potential drop is confined to a small region of space next to the wall or barrier due to the charge imbalance that develops between the plasma and the wall or barrier. This layer of charge imbalance has a finite thickness, characterized by the Debye Length, and is called the “plasma sheath” or “sheath”. The thickness of such a layer is several Debye lengths thick, a value whose size depends on various characteristics of the plasma. If the dimensions of the bulk plasma (e.g., chamber110) are much greater than the Debye length, for example, then the Debye length depends on the plasma temperature and electron density. In the particular case of the DC plasma operating conditions supported by the teachings according to the present disclosure (e.g., EEMP system near room temperature to moderately above room temperature), the Debye length is in the order of several millimeters (e.g., less than 10 millimeters), and the difference between the potentials VG3and VFPis in the order of several volts (e.g., less than 10 volts). It should be noted that the plasma sheath may develop in the presence of any wall or barrier, whether conductive or not. Accordingly, once a substrate (whether conductive or insulating) is placed atop the stage, S, the same floating potential, VFP, as described above with reference toFIG.1Cmay develop at the surface of the substrate. FIG.1Dshows an exemplary biasing of the stage, S, of the DC plasma processing system ofFIG.1Cvia an external biasing signal generator (180) that is capacitively coupled to the stage, S, by a capacitor Cs. In the exemplary configuration (100D) shown inFIG.1D, the potential, VA, applied to the anode, A, is at zero volts (e.g., coupled to the reference ground, Gnd). Furthermore, as shown inFIG.1D, a biasing signal, VB, applied to the stage, S, by the external biasing signal generator (180) may be referenced to the reference ground potential, Gnd. Although in some prior art implementations the biasing signal, VB, may be DC coupled to the stage, S, teachings according to the present disclosure strictly prohibit such DC coupling to the stage so as to avoid a discharge path for a DC current through any intermediate points in the chamber (110), as such discharge path may substantially change operating conditions within the chamber (110). In the DC plasma processing system shown inFIG.1D, the biasing signal, VB, may be used to control a potential (e.g., surface potential Vs) seen by free electrons and/or ions in the vicinity of the stage, S, or of the substrate when present. Accordingly, energy of the free electrons and/or ions may be controlled to the material specific levels required for (optimum) processing of the substrate. For example, as shown in the left-side graph ofFIG.1E, the biasing signal, VB, generated by the external biasing signal generator (e.g.,180ofFIG.1D) may start from zero and reach in a short period of time (represented by a leading edge slope) a voltage amplitude, VB1. When the voltage amplitude, VB1, is applied (e.g., AC coupled) to the stage, S, during a processing step (a) as shown in the top right-side graph ofFIG.1E, the voltage amplitude, VB1, gets added (or subtracted if negative) to the surface floating potential, VFPa, to generate a surface potential, Vs, at the vicinity of the stage, S. However, because the free electrons and/or ions are at the plasma potential, Vppa, only a portion of the surface potential, Vs, that is above the plasma potential, Vppa, is seen by the free electrons and/or ions. For example, as shown in the top right-side graph ofFIG.1E, the (kinetic) energy of the free electrons and/or ions may be based on a potential difference VKEa=(VB1−ΔVFPa), with ΔVFPa,=(VPPa−VFPa) On the other hand, considering a processing step (b) represented by the bottom right-side graph ofFIG.1E, which may have operating conditions that are different from the operating conditions of the processing step (a), including for example, a different plasma potential, Vppb, or a different floating potential, VFPb, that may cause a different differential ΔVFPb, =(VPPb−VPFb), then for the same applied voltage amplitude, VB1, a different (kinetic) energy of the free electrons and/or ions is obtained. Teachings according to the present disclosure either eliminate variations in the operating conditions within the chamber (e.g.,110ofFIG.1D), and/or compensate for such variations such as to allow, for example, precise control of the energy of the free electrons (and/or ions). It should be noted that variation in the operating conditions may be expected in view of different types of processing (e.g., (a) and (b) ofFIG.1E) performed within the chamber (110), including for example, etching of a substrate with different reactive gasses, cleaning of a substrate or any other process that may alter and/or remove composition/material from the surface of the substrate. It should be noted that, as known by a person skilled in the art, the different operating conditions for performing the different types of processing may further include corresponding variations and/or adjustments to any one of the DC plasma current, temperature, gas mixture or flow rate within the chamber (110). When a substrate is placed atop the surface of the stage, S, the kinetic energy of the free electrons and/or ions acquired through the application of the bias signal, VB, described above may accelerate the free electrons and/or ions towards the surface of the substrate and collide with the substrate to release the kinetic energy onto atoms at the surface of the substrate. Those atoms however are at an energy level that is based on the potential within which they reside, or in other words, based on the floating potential, VFP. Various energy levels of one such atom for the processing type (a) described above with reference toFIG.1Eare shown inFIG.1F, including the energy level, En, of a nucleus of an atom at the surface of the substrate, the energy level, EB, of an electron bound to the nucleus of an atom at the surface of the substrate, and the energy level, Ee, of an electron at the orbit of an electron bound to a nucleus at the surface of the substrate. As can be seen inFIG.1F, the energy level, En, of the nucleus is at the (negative) potential, VFPa, and the energy level, Ee, of the electron is at the (negative) potential (En+EB). In other words, in order to excite the atom to a level that breaks the bond between the electron and the nucleus, an energy equal to, or greater than, the energy level, Ee, of the electron must be imparted onto the atom. Accordingly, considering a plasma processing only via the free electrons, the kinetic energy of the free electrons provided through application of the bias signal, VB, represented inFIG.1Fby the potential difference VKEa=(VB1−ΔVFPa) must be equal to, or greater than, the energy level, Ee. However, since Ee=(En+EB) and Enis based on the a priori unknown floating potential, VFPa, precise control of the kinetic energy of the free electrons to precisely target the energy level, Ee, may not be possible. Although the floating potential (e.g., VFPaofFIG.1F) may be empirically and/or experimentally determined for a given process at stable operating conditions of the DC plasma chamber, any inconsistencies and/or lack of repeatability of such operating conditions may invalidate the determined floating potential. Furthermore, as different types of processes inherently yield to different floating potentials, the task of precisely controlling the kinetic energy of the free electrons to exactly target the energy level of an atom at the surface of the substrate may not be feasible. As a result, some prior art implementations impart kinetic energies onto the atoms at the surface of the substrate that may be substantially larger than a target atom energy level, and therefore may not allow for selectivity (as atoms of different materials/compositions having different energy levels may equally be subjected to energy levels sufficient to break their orbital bonds). Electron enhanced material processing (EEMP) according to the teachings of the present disclosure overcome such shortcoming and therefore allow precise control of the kinetic energy of the free electrons to exactly and selectively target the energy level of an atom at the surface of the substrate. FIG.2Ashows a simplified schematic view of a DC plasma processing system (200A) according to an embodiment of the present disclosure comprising means (250,260) to control the surface potential of the stage, S, when electrically isolated. In other words, these means (250,260) allow for adjustment of the floating potential, VFP. As shown inFIG.2A, the means (250,260) include an adjustable DC voltage source (250) that is coupled to the anode, A, of the DC plasma reaction chamber (110), and a DC current source (260) that is coupled to the cathode, C, of the DC plasma reaction chamber (110). Accordingly, the potential, VA, of the anode, A, may be controlled to be in a range from zero volts and upward (positive) with respect to the reference ground (Gnd at zero volts), and a (drain) current, Ip, that flows between the anode, A, and the cathode, C, through the reaction chamber (110) can be set by the DC current source (260). Accordingly, the potential, Vc, of the cathode, C, is not forced by an external DC voltage source (e.g.,150ofFIG.1D), rather (it is floating and) settles to a (negative) voltage that is based on the adjustable potential V A of the anode A, and the set current, Ip. Such a configuration allows independently control/adjust of the floating potential, VFP, while maintaining the set current, Ip, through the reaction chamber (110) constant to establish and maintain a higher level of process stability and optimization. FIG.2Bshows two graphs representative of control of the surface potential, VFP, of the stage, S, for the DC plasma processing system (200A) described above with reference toFIG.2A. In particular,FIG.2Bshows two graphs distinguished by use of solid or dashed lines, each representing the variation of the plasma potential, Vpp, across the longitudinal extension, X, of the chamber (110) for two different voltages (VA1, VA2) applied to the anode, A, by the adjustable DC voltage source (250). As can be seen inFIG.2B, for a positive step increase, +ΔV12, of the anode potential from the voltage VA1to the voltage VA2, the floating potential (Vpp1, Vpp2) and the cathode potential (Vc1, Vc2) increase by the same positive step, +ΔV12. As a matter of fact, as shown inFIG.2B, the entirety of plasma potential, Vpp, curve shifts positive by the step+ΔV12. In other words, for any longitudinal coordinate, X, in the range [Xc, XA], a corresponding plasma potential, Vpp(X), follows the step increase, +ΔV12. The same behavior applies to negative step variations applied to the anode, A, by the adjustable DC voltage source (250). In other words, control of the anode, A, potential by the adjustable DC voltage source linearly affects the plasma potential, Vpp, at any longitudinal coordinate, X, and therefore, linearly affects the floating potential, VFP, and the voltage, Vs, atop the stage, S, As later described in the present disclosure, such linearity can be used in the EEMP system according to the present teachings to implement a closed loop control subsystem to automatically control the value of the floating potential, VFP, to a preset value (e.g., zero volts) while operating the DC plasma chamber for different types of material processing. FIG.2Cshows two graphs similar to the graphs described above with reference toFIG.2B, including a specific case where the anode voltage, VA1, is equal to zero volts (solid lines). As can be seen inFIG.2B, the floating potential voltage for such case is equal to a negative value, VFP1, and therefore negative with respect to (below) the plasma potential, Vpp. Furthermore, as can be seen inFIG.2C, for a positive step increase, +ΔV13=(VA1−VFP1), of the anode potential, the floating potential can be adjusted to a value, VFP3, that is equal to zero volts. According to an embodiment of the present disclosure, such zeroing of the floating potential, VFP, may allow precise control of the kinetic energy of free electrons in the DC plasma to exactly (and selectively) target energy levels of atoms at the surface of a substrate (whether conductive or insulating) being processed. In other words, and with reference back toFIG.1F, the a priori unknown floating potential that determines the energy level, En, of a nucleus of an atom targeted/selected for processing is removed by zeroing of the floating potential, VFP. In turn, as shown inFIG.4Blater described, this allows to reference the energy level, Ee, of target electrons, the kinetic energy level of the free electrons in the DC plasma (e.g., Vic Fa ofFIG.1F), and the biasing voltage, VB, applied to the stage, S, to the same known and fixed reference of zero volts potential, Gnd. It should be noted that although provision of a known level of the floating potential, VFP, may be provided by zeroing such potential as described above, such zeroing should not be considered as limiting the scope of the present disclosure as other preset/adjusted non-zero values of the floating potential may equally serve as a reference potential for precise control of the kinetic energy of free electrons in the DC plasma to exactly (and selectively) target energy levels of atoms at the surface of a substrate (whether conductive or insulating) being processed. FIG.3Ashows a simplified schematic view of a DC plasma processing system (300A) according to an embodiment of the present disclosure comprising means (250,260ofFIG.2A) to control a surface potential of the stage, S, and means (R,311, VRofFIG.3A) to measure the surface potential, Vs(e.g., floating potential, VFP) atop the stage. As understood by a person skilled in the art, the system (300A) represents an improvement over the system (200A) described above with reference toFIG.2Aby adding the means (R,311, VR) to measure the surface potential, Vs, or in other words, to measure the (surface) floating potential, VFPatop the stage. By enabling such measurement of the floating potential, VFP, adjustment of the DC voltage source (250) as described above with reference toFIGS.2A-2Cmay be performed while monitoring/measuring the surface potential, VFP. This in turn allows precise control of the floating potential, VFP, including, for example, to zero such potential (VFP=0 volts). With continued reference toFIG.3A, the means (R,311, VR) includes a reference plate, R, that is placed within DC plasma chamber (110) at a same (longitudinal coordinate) segment [XG31, XG32] as the stage, S. The reference plate, R, may be fabricated from any conductive material capable of withstanding (internal) operating conditions of the chamber (110), and may have any planar shape, including planar shapes according to, for example, a square, rectangle, circle, pentagon, trapezoid or other. Because the reference plate, R, is arranged in the same region of the stage, S, and therefore in a region of a same substantially constant plasma potential, Vpp, the reference plate, R, sees the same floating potential, VFP, as the stage, S. In other words, by measuring the (surface) potential, VR, at the reference plate, R, the floating potential at the stage, S, can be determined. An insulated conductive wire (311) attached to the reference plate, R, may be used to route/couple the potential, VR, to measurement electronics (e.g., transducer) placed outside the chamber (110). It should be noted that such measurement electronics should not provide a DC current path to the plasma through plate R. With continued reference toFIG.3A, placement of the reference plate, R, may be at any longitudinal extension of the chamber (110) within the segment [XG31, XG32] that is technically feasible and practical. As the chamber (110) may include an access door adjacent the stage, S, on one side of the chamber (110), in some exemplary embodiments the reference plate, R, may be arranged against, or in the vicinity, of a wall of the chamber (110) that is on an opposite side of the access door and stage, S. Furthermore, according to an exemplary embodiment, a center of the reference plate, R, and a center of the stage, S, (e.g., intersection of the two segments that make the T shape of the stage as shown in the figures) may be contained within a line that is perpendicular to the axial direction (e.g., centerline, direction of longitudinal extension) of the chamber (110). Applicants of the present disclosure have verified high accuracy of the means (R,311, VR) in tracking of the floating potential of the stage, S. FIG.3Bshows a simplified schematic view of a DC plasma processing system (300B) according to an embodiment of the present disclosure that is based on the system (300A) ofFIG.3Awith added means (320, CT) for automatic control of the surface potential, VFP, at the stage, S. The means (320, CT) includes control electronics (320) configured to implement a closed loop control system to automatically control the value of the floating potential, VFP, at the stage, S, to a preset value (e.g., zero volts) while operating the DC plasma chamber for different types of processing. In particular, as shown inFIG.3B, the control electronics (320) takes the (surface) potential, VR, of the reference plate, R, as input via a coupling provided by the insulated conductive wire (311), and generates therefrom a control (error) signal, CT, to the adjustable DC voltage source (250) to adjust the voltage, VA, provided to the anode, A, and therefore, as described above with reference toFIGS.2A-2C, adjust the floating potential, VFP, at the stage, S. The control (error) signal, CT, may be generated with respect to a desired target/preset value of the floating potential, VFP, such as, for example, zero volts. A person skilled in the art is well aware of design techniques for implementing the control electronics (320) which are outside the scope of the present disclosure. In particular, a person skilled in the art is well aware of using operational amplifiers or error amplifiers in such control electronics (320), wherein inputs of such amplifiers may be coupled to the potential, VR, and to the desired target/preset value (e.g., zero volts) of the floating potential, VFP, to generate an error signal (e.g., CT) based on a difference of the inputs. FIG.4Ashows a simplified schematic view of a DC plasma processing system (400A) according to an embodiment of the present disclosure that is based on the system ofFIG.3Bwith added biasing means (Cs,480) for biasing of the stage, S. In particular, the biasing means (Cs,480) includes a biasing signal generator (480) that is coupled to the stage, S, through a capacitor, Cs, of the biasing means. In other words, a biasing signal, VB, generated at an output of the biasing signal generator (480) is capacitively coupled to the stage, S, through the capacitor, Cs. As previously described in the present disclosure, such capacitive coupling may allow removal of any DC current path from or into the DC plasma chamber (110), thereby preventing any undesired perturbation of operating conditions of the chamber (110). It should be noted that the biasing signal generator (480) may include, for example, a programmable waveform generator configured to output a waveform of the biasing signal, VB, according to desired characteristics, including for example, amplitude, frequency, duty cycle and/or rising/falling edges/slopes. It is further noted that the stage, S, may include a first conductive portion (e.g., vertical lead connected to the capacitor Cs) for electrical coupling of the biasing signal, VB, to the stage, S, and a second portion of the stage (e.g., horizontal support plate) that may include conductive and/or insulating material. FIG.4Bshows an exemplary biasing signal, VB1, provided to the stage, S, of the DC plasma processing system (400A) ofFIG.4Aand a corresponding surface potential, Vs, generated at the surface of the stage, S. As can be clearly understood by a person skilled in the art, the graphs shown inFIG.4Bcorrespond to a configuration of the system (400) wherein the floating potential, VFP, is adjusted or controlled to be at zero volts. Accordingly, and in view of (or in contrast to) the above description with reference toFIG.1E, the (kinetic) energy of the free electrons and/or ions attracted to the surface of the stage, S, or a substrate thereupon, is based on the potential difference VKE=(VB1−ΔVFP), with ΔVFP=(Vpp−VFP). Accordingly, since in practical substrate processing applications using a DC plasma chamber, a value of ΔVFPmay be substantially smaller (e.g., ratio of 1/50 or smaller) than the value of VKE(e.g., based on the energy level Eeof a target electron perFIG.4C); an approximation VKE=VB1may be considered reasonable. In turn, this allows a simple and straightforward generation of the biasing signal, VB1, provided to the stage, S, for implementation of the electron enhanced material processing (EEMP) according to the teachings of the present disclosure that exactly and selectively targets the energy level of an atom (e.g., bound electron) at the surface of the substrate. With further reference toFIG.4AandFIG.4B, it is noted that excitation of the energy levels of the atoms at the surface of the stage, S, or at the surface of a substrate arranged atop the stage, S, may be primarily based on an instantaneous change in the surface potential, Vs. Accordingly, excitation of the energy levels may be accomplished immediately at the end of the transition of the biasing voltage to the target value, VB1, or in other words, at the end of the slope shown inFIG.4B. FIG.4Cshows exemplary energy levels of atoms at a surface of the stage, S, of the DC plasma processing system (400A) ofFIG.4A.FIG.4Chighlights benefits of the electron enhanced material processing (EEMP) according to the teachings of the present disclosure that allows adjustments to exactly and selectively target the energy level of an atom (e.g., Ee≈VKEperFIG.4C) at the surface of the substrate based on the zeroing of the floating potential, VFP, according the above description with reference toFIGS.2A-2C, further based on the reference plate, R, according to above description with reference toFIG.3A, further based on the (optional) closed loop control system provided by the control electronics (320) according to the above description with reference toFIG.3B, and further based on the capacitive coupling of the biasing signal, VB, provided by the biasing signal generator (480) according to the above description with reference toFIG.4A. FIG.5is a process chart (500) showing various steps of a method according to an embodiment of the present disclosure for processing a surface of a substrate. As shown inFIG.5, such steps comprise: placing a substrate support stage in a region of a DC plasma reaction chamber configured to produce a positive column of the DC plasma, according to step (510); generating a DC plasma by coupling an adjustable DC voltage source and a DC current source respectively to an anode and a cathode of the DC plasma reaction chamber, according to step (520); based on the generating, producing a floating potential at a surface of the substrate support stage, according to step (530); adjusting a potential at the anode via the adjustable DC voltage source while maintaining via the DC current source a constant DC current between the anode and the cathode, according to step (540); and based on the adjusting and the maintaining, setting the floating potential to a potential of a reference ground of the adjustable DC voltage source, according to step (550). FIGS.6A-6Cshow graphs representative of reaction rates of electron enhanced material processing (EEMP) according to the present disclosure for different (categories/types/classes of) materials, including, single crystal or 2-dimensional (2D) materials (FIG.6A) such as for example a semiconductor or insulator material, metals and metal alloys (FIG.6B), and complex materials (FIG.6C) such as polymers, composites, nano-materials or 3-dimensional (3D) materials. In this case, a reaction, or a targeted reaction, may be referred to as the breaking of chemical bonds (e.g., bonds between electrons and nucleus) of atoms of a material at the surface of a substrate that is placed atop the stage (e.g., S ofFIG.4A) responsive to a level of the biasing signal, VB, applied to the stage (e.g., S ofFIG.4A). As can be clearly taken from such graphs, the reaction rate, RR, may be characterized by a reaction threshold voltage, VRTH, a reaction cutoff voltage, VRCO, and a reaction threshold variation voltage, VRTHv. It should be noted that for each material, or type of material, such characteristic voltages may be different and typically part of a priori acquired knowledge base. For example, the VRTH, of a crystal material (e.g.,FIG.6A) may be different from the VRTH, of a metal material (e.g.,FIG.6B) or the VRTHof a complex material (e.g.,FIG.6C), and the VRTHV, of a crystal material (e.g.,FIG.6A) may be different from the VRTHv, of a metal (e.g.,FIG.6B) or a complex material (e.g.,FIG.6C). It should be noted that 2D materials compatible with the electron enhanced material processing (EEMP) according to the present disclosure may include, for example, graphene, boron nitride, molybdenum disulfide, tungsten diselenide, or platinum diselenide; Nano materials compatible with the EEMP according to the present disclosure may include, for example, carbon nanotubes, nano-silver particles, titanium oxide particles, or quantum dots; 3D materials compatible with the EEMP according to the present disclosure may include any 3D structure formed in a material, including for example, a polymer, collagen fiber or a metal such as, for example, titanium, or 3D printed polymer/polymer, polymer/carbon, or polymer/metal microstructures. Single crystals compatible with the EEMP according to the present disclosure may include, semi conducting single crystals, such as, for example, IV silicon, germanium, III-V gallium arsenide, gallium nitride, silicon carbide, indium gallium arsenide, etc., II-VI zinc selenide, and quantum well stacks that contain alternating layers of III-V compound semiconductors, and/or II-VI compound semiconductors. Single crystals compatible with the EEMP according to the present disclosure may further include semi conducting single crystals, such as, for example, quartz, sapphire or diamond. Polymers compatible with the EEMP according to the present disclosure may include, for example, polypropylene, polyethylene, polyether ether ketone, polycarbonate. Composites compatible with the EEMP according to the present disclosure may include, for example, polymers containing metal particles, carbon particles, carbon fibers or carbon nanotubes. Materials and structures enumerated herewith should be considered as nonlimiting with regard to a material compatibility list of the EEMP according to the present teachings, which list can grow as new materials/structures and corresponding binding and reaction energies (that can be targeted with the present EEMP) are obtained, via, for example, advanced methods for computer simulation of chemical bonds. With continued reference toFIGS.6A-6C, when a substrate is placed atop the stage (e.g., S ofFIG.4A), as described above with reference to, for example,FIG.4B, the floating potential (e.g., VFPofFIG.4B) may be adjusted (and controlled) to a known potential (e.g., zero volts or other). Accordingly, the energy levels of the atoms at the surface of the substrate may take the same potential (e.g., as their ground state) and no reaction at the surface of the substrate may be observed, or in other words and as shown inFIGS.6A-6C, the reaction rate, RR, of the targeted bonds (which are at the ground state) is at zero. As the biasing voltage, VB, increases, the reaction rate, RR, of the targeted bonds remains at zero, up to the reaction cutoff voltage, VRCO, after which a small amount (e.g., minority) of the targeted bonds slowly begin to react, or in other words, a minority of the targeted bonds reach their respective excited states. As the biasing voltage, V B, increases beyond the reaction cutoff voltage, VRCO, the reaction rate, RR, slowly increases with gradually more of the targeted bonds reaching their respective excited states. When the biasing voltage, VB, reaches the reaction threshold voltage, VRTH, a majority of the targeted bonds begin to react (e.g., reach their respective excited states) and with further increase of the biasing voltage, VB, the reaction rate, RR, increases according to a (substantially) fixed slope, which continues until the biasing voltage, VB, reaches the reaction threshold variation voltage, VRTHv. Between the reaction threshold voltage, VRTH, and the reaction threshold variation voltage, VRTHv, the reaction rate, RR, increases until (almost) all of the targeted bonds react. As shown inFIGS.6A-6C, further increase of the biasing voltage, VB, beyond the reaction threshold variation voltage, VRTHV, marginally increases the reaction rate, RR, or in other words, to a point of “diminishing returns”. On the other hand, as the biasing voltage, VB, decreases, the reaction rate, RR, follows the same graphs shown inFIGS.6A-6C. In particular, when the biasing voltage, VB, decreases to a level that is below the reaction cutoff voltage, VRCO, the reaction rate, RR, falls to zero as all of the targeted bonds at the surface of the substrate return to their respective ground states. As can be clearly taken from the graphs shown inFIGS.6A-6C, the (substantially) fixed slope of the reaction rate, RR, between the voltages, VRTHand VRTHV, or in other words, the difference between such two voltages, may be a function of a material used in (the surface of) the substrate being processed. In particular, the difference between the voltages, VRTHand VRTHV, may be due: to atomic level imperfections on surface of a single crystal material such as a, semiconductor or insulator (e.g.,FIG.6A); to atomic level imperfections on surface of a metal, metal alloy or nano-material and related grain boundaries (e.g.,FIG.6B); or to presence of 3-dimensional (3D) structures of a polymer, a composite or other 3D material (e.g.,FIG.6C). As described later in the present disclosure, teachings according to the present disclosure describe a waveform to produce a biasing signal having a voltage level, VB, that is specifically targeted to the material used in the substrate such as to control activation (or deactivation) of the reaction governed by the reaction rate, RR, graphs shown in, for example,FIGS.6A-6C. In particular, specific waveforms for each of the materials represented by the reaction rate, RR, graphs ofFIG.6A,FIG.6BandFIG.6Care respectively shown inFIG.7A,FIG.7BandFIG.7C. FIGS.7A-7Cshow graphs representative of waveforms for EEMP biasing signals, V(t), according to some exemplary embodiments of the present disclosure for processing of different materials. In particular,FIG.7Ashows a waveform for processing of a single crystal material such as a semiconductor or insulator;FIG.7Bshows a waveform for processing of a metal, metal alloy or nano-material; andFIG.7Cshows a waveform for processing of a polymer, a composite, or a 3D material. It should be noted that such graphs represent ideal voltage levels (e.g., VB, VBN) of the biasing signal, V(t), for use in the EEMP process according to the present disclosure described above, which may include control of the potential, VFP, to a known level, such as zero volts or other fixed known level, and energizing of free electrons in the DC plasma with voltage/potential levels (e.g., VB) that are referenced to the potential, VFP. Each of the graphs ofFIGS.7A-7Crepresents one cycle, denoted as, TEEMP, of the waveform for the (periodic) biasing signal, V(t). The EEMP processing of a material on a surface of a substrate may be performed by the biasing signal, V(t), generated via a repetition of a predetermined number of cycles, TEEMP, according to a priori acquired process knowledge. Different EEMP processing (e.g., having respective RR characteristics) may be sequentially performed on a same substrate in view of layers of different material in the substrate and/or different operating conditions of the DC plasma reaction chamber and/or (controlled/preset) level of the potential, VFP. With continued reference toFIGS.7A-7C, according to an embodiment of the present disclosure, the cycle, TEEMP, of the waveform of the biasing signal, V(t), may include three distinct phases (e.g., time intervals, time segments, time durations), ΔTBP, ΔTBN, and ΔTBz, respectively including a voltage level that is above zero volts (or the reference voltage level), below zero volts, and equal to zero volts. In other words, during the time interval, ΔTBP, a level, VB, of the biasing signal, V(t), is strictly greater than zero volts (or the reference voltage level); during the time interval, ΔTBN, the level, VBN, of the biasing signal, V(t), is strictly less than zero volts; and during the time interval, ΔTBz, the level of the biasing signal, V(t), is equal to the zero volts. According to an embodiment of the present disclosure, the duration of the cycle, TEEMP, of the waveform shown inFIGS.7A-7Cmay be in a range from 1 μs to 10 μs, or in other words, a frequency of the biasing signal, V(t), may be in a range from 100 KHz to 1 MHz. According to a further embodiment of the present disclosure, the waveform of the biasing signal, V(t), may be free of a DC component, or in other words, an integral over a cycle of the waveform shown inFIGS.7A-7Cmay have a value of zero. Such DC-free characteristic of the waveform according to the present teachings may allow for maintaining an average local surface potential of the substrate during application of the biasing signal, V(t), that is (substantially) equal to the preset/controlled local surface potential (e.g., VFP) of the substrate as described above with reference to, for example,FIGS.2A-4C. In other words, the DC-free characteristic of the waveform may allow application of (substantially) same voltage levels (e.g., VB, VBN) shown inFIGS.7A-7C(to free electrons) on the surface of the substrate. It should be noted that for a case where the potential VFPis adjusted (e.g., preset, controlled) to a (fixed and known) level that is different from zero volts, the waveform may be adjusted to include a DC component that is equal to the level of the potential VFP, or in other words, by replacing the 0V reference inFIGS.7A-7Cwith the adjusted value of the potential VFP. According to an embodiment of the present disclosure, length of each of the time intervals ΔTBP, ΔTBN, and ΔTBzshown inFIGS.7A-7Cmay be based on the type of material (at the surface) of the substrate, including the corresponding reaction rate, RR, described above with reference toFIGS.6A-6C. In particular, a ratio of a length of the time interval ΔTBPto a length of the time interval ΔTBNmay be in a range from (about) 1/10 to (about) 1/1. For example, for a case of a crystal material (e.g.,FIG.7A) the ratio may be about 10/65 (+/−10%); for a case of a metal material (e.g.,FIG.7B) the ratio may be about 1/2 (+/−10%); and for a case of a complex material (e.g.,FIG.7C) the ratio may be about 1/1 (+/−10%). Furthermore, as shown inFIGS.7A-7C, a ratio of a length of the time interval ΔTBzto a length of the entire cycle, TEEMP, may be about 1/4 (+/−10%). According to a nonlimiting embodiment of the present disclosure, the length of the time interval ΔTBzmay be solely based on the length of the entire cycle, TEEMP, and independent from respective lengths of the time intervals ΔTBPand ΔTBN. For an exemplary nonlimiting case shown inFIGS.7A-7C, a ratio of the time intervals (ΔTBP, ΔTBN, ΔTBz) to the length of the entire cycle, TEEMP, may be about (e.g., +/−10%): (10/100, 65/100, 25/100) for a case of a crystal material (e.g.,FIG.7A); (25/100, 50/100, 25/100) for a case of a metal material (e.g.,FIG.7B); and (37.5/100, 37.5/100, 25/100) for a case of a complex material (e.g.,FIG.7C). It should be noted thatFIGS.7A-7Cshow a cycle, TEEMP, having a length of 4 μs (frequency of 250 KHz) which should not be considered as limiting the scope of the present disclosure, since as described above in the present disclosure, such length may be in a range from 1 μs to 10 μs (e.g., frequency of 100 KHz to 1 MHz). With continued reference to the waveform ofFIGS.7A-7C, during the phase, ΔTBP, the waveform may set the biasing voltage, V(t), to a (positive) level (e.g., VB) for activation of the (targeted) EEMP reaction on the surface of the substrate that is based on collision of energized (free) electrons with the targeted bonds at the surface of the substrate (e.g., with a surface material comprising a single crystal forFIG.7A, a metal forFIG.7B, and a complex material forFIG.7C). According to an embodiment of the present disclosure, a length during which the (high) level, VB, of the biasing voltage, V(t), is maintained must be long enough to hold the energized (free) electrons at the surface of the substrate to react with the targeted bonds. It should be noted that such length may not include (portion of) the rising or falling slopes contained in the phase, ΔTBP, shown inFIGS.7A-7C(e.g., during which the biasing voltage (V(t) is not at the target high level, VB). Furthermore, during the phase, ΔTBN, the waveform ofFIGS.7A-7Cmay set the biasing signal, V(t), to a (negative) level, VBN, for deactivation of the EEMP reaction on the surface of the substrate and to further discharge (e.g., repel) any free electrons from the surface of the substrate, thereby neutralizing a charge on the substrate. It should be noted that during the phase, ΔTBN, a kinetic energy may be imparted by the (negative) level, VBN, of the biasing signal, V(t), to free ions in the DC plasma which may therefore cause the energized free ions to slowly move toward the surface of the substrate, thereby further participating in the neutralization of the substrate. It should further be noted that due to their low energy levels, the energized free ions may (must) not cause any reaction with bonds at the surface of the substrate. A magnitude of the voltage level, VBN, of the basing signal, V(t), may therefore be sufficiently high (e.g., more negative) to cause the free ions to move slowly toward the substrate, and a duration of the phase, ΔTBN, may be sufficiently long to cause, in combination with the magnitude of the voltage level, VBN, and duration of the phase, ΔTBP, suppression (or control) of a DC component of the biasing signal V(t) The length of ΔTBNand depth/magnitude of VBNmay be controlled so that the free ions do not have sufficient energy to damage the corrosive layer nor too little energy to reach and neutralize the substrate to zero net charge and net current. During the phase, ΔTBz, the waveform ofFIGS.7A-7Cmay set a voltage level of the biasing signal, V(t), to zero (or at a same preset level of the floating potential, VFP). Accordingly, the phase, ΔTBz, may be used to restore a same initial biasing condition of the substrate for the start of each cycle, TEEMP, of the biasing signal, V(t), such initial biasing condition based on the preset level of the floating potential, VFP. This in turn may allow for a more stable and accurate process (EEMP) when compared to other prior art processes. Accordingly, based on the provided description, each of the phases ΔTBP, ΔTBN, and ΔTBzof the cycle, TEEMP, that describe the waveform of the biasing signal, V(t), may respectively be referred to as: an active (EEMP) reaction phase; a (EEMP) neutralization phase; and an (EEMP) initialization phase, where the latter two phases are inactive phases with respect to the targeted (EEMP) reaction. FIG.8Ashows a graph representative of an idealized waveform for the EEMP biasing signals, V(t), described above with reference toFIGS.7A-7C, including further timing details (e.g., time intervals tBR, tBH, and tBR) that describe respective portions of the waveform during the active phase, ΔTBP. In particular, the time interval, tBR, may define a transition duration of time that takes the biasing signal, V(t), to reach the target high level, VB, from a start value (e.g., V(t)=0) at start of the phase; the time interval, tBH, may define an effective duration of time during which the biasing signal, V(t), is at the target high level, VB; and the time interval, tBF, may define a transition duration of time that takes the biasing signal, V(t), to go back to the start value (e.g., V(t)=0) at the end of the active phase, ΔTBP. In other words, the time interval, tBR, may define the rising (e.g., leading) edge slope of the biasing signal, V(t), to reach the high level, VB, from the start value, and the time interval, tBF, may define the falling (e.g., trailing) edge slope of the biasing signal, V(t), to go back to the start value. With continued reference toFIG.8A, during the time interval, tBH, the biasing signal, V(t) is at the high level, VB, which is above (greater than) the reaction threshold voltage, VRTH, and therefore, as described above with reference to, for example,FIGS.6A-6C, the targeted bonds may reach their respective excited states so long that, as described above with reference to, for example,FIGS.7A-7C, the duration of the time interval, tBH, is sufficiently long to hold the energized (free) electrons on the surface of the substrate to react with the targeted bonds. According to an exemplary embodiment of the present disclosure, a ratio of a length of the time interval, tBH, to a length of the active phase, ΔTBP, may be in a range from about 1/4 (e.g., +/−10%) to about 3/4 (e.g., +/−10%). Accordingly, considering a case for EEMP processing of a single crystal material (e.g.,FIG.6AandFIG.7Adescribed above), with a periodic biasing signal, V(t), having a frequency of 250 KHz, and therefore a length of the cycle, TEEMP, equal to 4 μs, then the length of the time interval, tBH, may be in a range from about 0.1 μs to about 0.3 μs. With further reference toFIG.8A, as the biasing signal, V(t), rises at the start of the active phase, ΔTBP, a level of the biasing signal, V(t), that is above the reaction threshold voltage, VRTH, may be reached during a portion of the time interval, tBR. Likewise, as the biasing signal, V(t), decreases at the end of the time interval, tBH, a level of the biasing signal, V(t), that is above the reaction threshold voltage, VRTH, may be maintained during a portion of the time interval, tBF. Accordingly, in an ideal case where the voltage levels shown inFIG.8Aare effectively seen by the free electrons in the DC plasma, then the portions of the time intervals, tBRand tBF, where the level of the biasing signal, V(t), is above the reaction threshold voltage, VRTH, may be included in the determination (or interpretation) of the reaction rate, RR, graphs described above with reference toFIGS.6A-6C. However, as the rising and falling edge slopes defined by the time intervals, tBRand tBF, may be very steep (high level VBcan be in a range from 10 volts to about 200 volts), said portions of time may be regarded as irrelevant/insignificant when compared to a minimum amount of time required to hold the energized (free) electrons on the surface of the substrate to react with the targeted bonds. FIG.8Bshows a graph representative of a practical waveform for the EEMP biasing signals. Such waveform represents a practically achievable waveform that may be modelled from the ideal waveform described above with reference toFIG.8A. In particular, the practical waveform ofFIG.8Bincludes gradual and curved transitions to/from corresponding steady state levels (e.g., VB, VBN, zero volts) as shown in the figure. Such practical waveform may be generated by an electronic instrument, that may include a power amplifier (e.g., such as for example, coupled to or part of, the biasing signal generator ofFIG.4A), whose output is coupled to a load under perfect matching conditions. However, such perfect matching conditions may not be provided by the capacitive load (e.g., stage S ofFIG.4A) in the DC plasma processing according to the present disclosure, and therefore, as shown inFIG.8C, signal reflections and related distortions may be expected, including ringing, prior to settling to the steady state levels (e.g., VB, VBN, zero volts). The ringing shown inFIG.8Cmay include ringing (e.g., VBu) of the biasing signal, V(t), during the active phase, ΔTBP, prior to settling to the target high level, VB, as well as during the neutralization phase, ΔTBN, prior to settling to the target low level, VBN. As shown inFIG.8C, the ringing during the active phase, ΔTBP, may be represented by an uncertainty voltage spread, VBU, that extends above the target high level, VB, by an overshoot voltage, VBOS, and extends below the target high level, VB, by an undershoot voltage, VBUS. A person skilled in the art will clearly realize that the uncertainty voltage spread, VBU, may perturb activation of the EEMP targeted reaction during the active phase, ΔTBP, as the undershoot voltage, VBUS, may cause a level of the biasing signal, V(t), to fall below the reaction threshold voltage, VRTH, and the overshoot voltage, VBOS, may cause a level of the biasing signal, V(t), to reach a reaction threshold voltage, VRTH, of non-targeted bonds that may be present at the surface of the substrate. On the other hand, the ringing during the neutralization phase, ΔTBN, may not noticeably affect the EEMP process as the free ions are held well below the reaction energy for any ion driven reactions (e.g., thermal chemistry reactions). According to an embodiment of the present disclosure, a reduction of the ringing shown inFIG.8C, including the ringing during the active phase, ΔTBP, may be provided by predistortion (e.g., distortion compensation) of the biasing signal, V(t). FIG.9Ashows graphs representative of a digitized waveform (WF, digital samples marked by circles) for generation of the practical waveform ofFIG.8B, and a corresponding digitized waveform with predistortion (WFp, digital samples marked by squares). In particular, generation of the practical waveform ofFIG.8Bmay be provided by uploading corresponding digital samples of the digitized waveform, WF, to a digital signal generator whose output may be provided to a power amplifier (e.g., such as for example, coupled to or part of, the biasing signal generator ofFIG.4A). Likewise, generation of a corresponding practical waveform with predistortion may be provided by uploading the digital samples of the digitized waveform with predistortion, WFp, to the digital signal generator. With continued reference toFIG.9A, predistortion may be used to alter/equalize the slopes/transitions of the digitized waveform with predistortion, WFp, such as to generate a practical pre-distorted waveform (e.g., WFp) that when subjected to the capacitive loading conditions of the stage (e.g., S ofFIG.4A), as shown inFIG.9B, a reduction in the amount of ringing may be provided. As shown inFIG.9B, use of the predistortion may cause a reduction of the uncertainty voltage spread, VBU, such as during the entire active phase, ΔTBP, a level of the biasing signal, V(t), may remain above the targeted reaction threshold voltage, VRTH, and below any non-targeted reaction threshold voltage, V′RTH. It should be noted that such predistortion may result in a waveform that includes a desired length of the time interval, tBH, during which the biasing signal, V(t), is at the target high level, VB. In other words, the predistortion may preserve the length of the time interval, tBH, described above with reference to, for example,FIG.8A. FIG.10Ashows graphs representative of gain versus frequency (e.g., graph G1) of a band-limited linear power amplifier according to an embodiment of the present disclosure and a gain versus frequency (e.g., graph G2) of a conventional power amplifier. According to an embodiment of the present disclosure, the bandlimited linear power amplifier used for the EEMP processing, may include a gain, G1, that is flat within 0.75 dB in a frequency range from 10 KHz to 10 MHz as shown inFIG.10A. Such operating (passband) range of the bandlimited linear power amplifier is selected in view of the 100 KHz to 1 MHz frequency range of operation of the biasing signal, V(t), such as to reduce any corresponding (higher frequency) harmonics that may be reflected from the capacitive load and generate distortion of the signal, including portion of the ringing (e.g., the uncertainty voltage spread, VBU) shown inFIG.8CandFIG.9B. FIG.10Bshows a graph representative of an analog waveform generated from the digitized waveform with predistortion, WFp, ofFIG.9Athrough the band-limited linear power amplifier ofFIG.10Aunder capacitive loading conditions. In particular, when compared to the waveform described above with reference toFIG.9B, a reduction in the uncertainty voltage spread, VBU, may be observed, indicative of an even larger process window for control/operation of the targeted EEMP reaction. It should be noted that the waveform ofFIG.9Bmay be reproduced by the conventional power amplifier whose gain versus frequency, G2, is shown inFIG.10A. In particular, as shown inFIG.10A, a cut off frequency, fc2, of the conventional power amplifier being substantially greater than a cut off frequency, fc1, of the band-limited linear power amplifier according to the present teachings, may pass the higher frequency harmonics of the biasing signal, V(t), and therefore reproduce such harmonics as distortion. FIG.11is a process chart (1100) showing various steps of a method according to an embodiment of the present disclosure for processing a surface of a substrate. As shown inFIG.11, such steps comprise: placing a substrate on a support stage in a region of a DC plasma reaction chamber configured to produce a positive column of DC plasma, according to step (1110); generating the DC plasma, according to step (1120); presetting a floating potential at the surface of the substrate to a reference potential, according to step (1130), and; capacitively coupling, to the support stage, a periodic biasing signal having a biasing voltage that is referenced to the floating potential, the periodic biasing signal comprising: an active phase having a positive voltage that is based on a known reaction threshold voltage of targeted chemical bonds of atoms at the surface of a substrate; a neutralization phase having a negative voltage; and an initialization phase having a zero voltage, according to step (1140). The various steps of the process chart (1100) ofFIG.11may be used for atomic layer etching (ALE) of a surface of a substrate. Because such steps may target chemical bonds of atoms at the surface of the substrate via low energy electrons (e.g., energy less than 500 eV), surface damage of the substrate beyond those associated with the target chemical bonds may be avoided. The atomic layer etching according to the present disclosure may be based on electron stimulated desorption (ESD), wherein desorption processes are stimulated by electron excitation of quantum transitions (e.g., jump of energy levels) at the surface of the substrate (e.g., wafer), and controlled by material-specific energy thresholds. ESD proceeds by a fundamentally different mechanism than the (traditional) sub-surface collision cascades initiated by momentum transfer from ion bombardment. These material-specific energy thresholds provide the opportunity to tailor/target the electron energy to particular materials, thereby allowing the atomic layer etching according to the present disclosure to achieve high specificity and selectivity between different materials. Low energy electrons (e.g., less than 500 eV), including those part of the wafer scale waves of precisely controlled electrons produced according to the present teachings, can interact with the surface of the substrate placed in, for example, the DC plasma reaction chamber (110) of the DC plasma processing system described above with reference to, for example,FIG.4A. These electrons can induce physical and chemical changes to the surface of the substrate. The atomic layer etching according to the present disclosure includes use of an adsorbed layer on the surface of the substrate to be etched. The adsorbed layer is composed of the reactive species present in the plasma. The creation of the adsorbed layer is purely chemical in nature and may include weak and strong bonding interactions with reactive species and the substrate. Reactive species may include H atoms (radicals), H+, H−, H2, H2+ and H2− (which are defined as the reactive species in this example, H-species). Presence of the adsorbed layer may promote more pronounced physical and chemical changes to the surface of the substrate. The reactive (adsorbed) layer attached to the surface layer below it is defined as the corrosion layer. Conditions created inside the DC plasma reaction chamber (e.g.,110ofFIG.4A) in combination with the low energy electrons arriving at a surface of the substrate can promote the desorption of the corrosion layer that is attached to the substrate as ionic, neutral atomic and/or molecular species (e.g., desorption or removal of a corrosion layer). The above-described process for removal of the corrosion layer (the adsorbed layer along with the surface atom layer below it) using low energy electrons, which may be used in the atomic layer etching (ALE) according to the present disclosure, is referred herein as Electron Stimulated Desorption (ESD). This effect arises from electron excitations, and not from thermal excitations that may arise from bombardment (momentum transfer) by the low energy electrons. It should be noted that momentum transfer from low energy electrons may not provide enough energy to desorb the corrosion layer (the surface species that includes the reactive species bound to the surface atom layer of the substrate, the corrosion layer). Since the mass of the electron is very small compared to the corrosion layer species (surface bound atoms and surface reactive species) it collides with, there is very little energy transfer to the surface bound atom by collision (typically less than 0.1 eV), which is not sufficient to cause removal of the reactive species which may include bonds in a range of about 1 eV to 8 eV. However, electron excitations may have sufficient energy to cause desorption of the (targeted) corrosion layer via ESD. It should be noted that the EEMP process according to the present teachings is distinctly different than known in the art electron-beam-based processes and ion-bombardment processes (e.g., RIE). The EEMP process according to the present disclosure and electron-beam-based processes differ, though both can utilize ESD for the removal of corrosion layer species, the difference lies on the scale on which the two operate. Such beam techniques are highly localized to the millimeter scale at best. In stark contrast, and advantageously, the EEMP process according to the present disclosure can operate on any scale the positive column of a DC plasma can occupy, or made to occupy, including in a range (of width) from millimeters to meters. The EEMP process according to the present teachings and ion-bombardment processes differ in their fundamental mechanism of operation. The EEMP process according to the present teachings operates via ESD. In ESD, arriving electron raise the bond energies of only the corrosion layer species through resonant excitation and destabilizing the corrosion layer species only (no momentum transfer is involved). The corrosion layer species develop a repulsion relative to the underlying substrate (excited state). This results in only the corrosion layer species being repelled (removed) from the substrate with kinetic energy to subsequently enter the positive column (and be swept away). Known in the art Ion bombardment processes, due to the large mass of the ion, impart a momentum transfer to the corrosion layer species via collisions causing a sub-surface collision cascade. At sufficient momentum, this sub-surface collision cascade can eject the corrosion layer species. Basically, these sub-surface momentum cascades invariably leave traces/effects of the removal of the surface layer exist in the newly exposed layer (sub-surface). Interaction from ion-enhanced processes with the sub-surface are undesirable for a smooth finish, maintenance of stoichiometry, ions embedding in the substrate, and collision damage, among others, are negative outcomes that do not exist with EEMP. Electron excitations may result when the electrons arriving at the surface transfer their energy to the bonding electrons of the corrosion layer species, raising their bond energies (resonant excitation of the bonding electron by the arriving electrons), and destabilizing the corrosion layer species on the surface. In this case, the excited corrosion layer species, may move from their stable ground state electron configuration to an excited state configuration that may have a repulsive potential. In turn, an imparted kinetic energy by such repulsive potential upon corrosion layer species may promote their ejection away from the surface of the substrate, thereby completing removal/etching of a top layer of the substrate. As mentioned previously, these ejection thresholds are material dependent so by tuning the energy of the incoming electrons and providing a variety of reactive species, ESD can be affected to a wide range of materials with high specificity and selectivity. Atomic layer etching (ALE) by the electron enhanced material processing (EEMP) according to the present disclosure includes: provision of a substance to be adsorbed by atoms of a top surface atom layer of a substrate to be etched to generate corrosion layer species at the surface of the substrate; generate electrons with energy that targets chemical bonds of the corrosion layer species; and use electron stimulated desorption (ESD) processes to excite the corrosion layer species, thereby ejecting/releasing the corrosion layer species, thereby etching away the top surface atom layer of the substrate. FIG.12A,FIG.12BandFIG.12Cshow various schematics representative of initialization tasks and corresponding states of a DC plasma reaction chamber (e.g.,110ofFIG.4A) in preparation for an atomic layer etching (ALE) of a surface of a substrate, Sub, via the electron enhanced material processing (EEMP) according to the present disclosure. As shown inFIG.12A, and with further reference toFIG.4A, the substrate, Sub, is placed on the stage, S, that as previously described is arranged in a region of the DC plasma reaction chamber (110) that is configured to contain the positive column region, G3. InFIG.12A(and following figures), the substrate, Sub, is represented by atomic layers (L1, L2, L3), each such layer including atoms of a material that makes up the substrate, Sub. In the exemplary nonlimiting case of the substrate, Sub, shown inFIG.12A, three layers (L1, L2, L3) are shown, each layer including atoms, represented by (large) circles. In the exemplary nonlimiting case of the substrate, Sub, shown inFIG.12A, each of the layers (L1, L2, L3) includes silicon atoms, Si, or in other words, the exemplary nonlimiting substrate, Sub, may be considered a silicon substrate. As previously described in the present disclosure, the electron enhanced material processing (EEMP) according to the present disclosure, including its application to atomic layer etching (ALE), may be applicable to different categories/types/classes of materials, and therefore to different substrates including such materials. In other words, the substrate, Sub, may include any of such materials in any one of the layers (e.g., L1, L2, L3, . . . , and beyond). Furthermore, any two such layers may include a same material (i.e., atoms) or different materials (e.g., in adjacent atomic layers). Legends in the top right side ofFIG.12A(and following figures) are associated with symbols used in the figure, the symbols representative of material particles, such as atoms, ions or molecules, that may be present in the plasma reaction chamber (110) during various states/phases of the processing of the substrate, Sub. Such material particles correspond to: a reactant (e.g., soluble) gas, represented by a small circle; a diluent (e.g., solvent) gas represented by a cross; an electron (with legend e−) represented by a dot; an excited state substrate atom of the substrate, Sub, represented by a large circle containing an asterisk; and a ground state atom of the substrate, Sub, represented by a large (empty) circle. Legends associated with such symbols refer to exemplary nonlimiting material particles corresponding to: an exemplary reactant gas that may include hydrogen (H atom, e.g., molecular hydrogen H2); an exemplary diluent gas that may include argon (Ar+); and an exemplary substrate, Sub, that may include excited state (Si*) and ground state (Si) silicon atoms (e.g., atom bonds). As shown inFIG.12A, the silicon substrate, Sub, is placed onto the stage, S, in preparation for the atomic layer etching (ALE) process. In this case, the plasma reaction chamber (110), and therefore the stage, S, and the substrate, Sub, may be under vacuum provided by means that are well known in the art. Other parameters within the plasma reaction chamber that may affect the substrate, Sub, such as for example, temperature (e.g., including of the stage/substrate), may also be set/controlled. Furthermore, absence of any of the material particles (H-species, Ar+, e−, Si*) inFIG.12Ais indicative that DC plasma, and therefore excited state silicon atoms, are not present in the plasma reaction chamber (110). FIG.12Amay represent a state of the atomic layer etching process (ALE) at a time, tOFF, wherein the stage, S, and therefore the substrate, Sub, is not actively biased by the biasing signal generator (e.g.,480ofFIG.4A). Accordingly, as shown inFIG.12A, at the time, tOFF, there is no biasing signal, V(t), coupled to the stage, S, and therefore to the substrate, Sub. As described above in the present disclosure, the biasing signal, V(t), may represent a time varying biasing voltage (e.g., V B ofFIG.4A), that is capacitively coupled to the stage, S. Exemplary waveforms of the biasing signal, V(t), including corresponding voltage levels (e.g., VRTHand VBN) and phases (e.g., ΔTBP, ΔTBN, and ΔTBz), are described above with reference to, for example,FIGS.7-10. FIG.12Bmay represent a state of the atomic layer etching process (ALE) at a time, to, wherein diluent gas (e.g., argon) and reactant gas (e.g., hydrogen) is present in the plasma reaction chamber (110) to generate the (positive column, e.g., at glow region G3) DC plasma. When the DC plasma is generated (e.g., ignited), a portion of the diluent gas and a portion (and not all of the) reactant gas is ionized to generate some the free electrons, e−, shown inFIG.12B. As a result, a distribution of ionic species in the positive column of the DC plasma may include ions of the diluent gas represented inFIG.12Bby Ar+, as well as particles of the reactant gas that may include H-species as represented inFIG.12Band subsequent figures. It should be noted that diluent and reactant gases may be introduced in the plasma reaction chamber (110) either concurrently as a mixture or separately in sequence, and therefore such gases may ionize/ignite within the plasma reaction chamber either concurrently or separately. Furthermore, according to some exemplary embodiments, reactive species (e.g., H-species) may be generated in a separate chamber and subsequently introduced in the plasma reaction chamber (110) to provide the distribution of ionic species shown inFIG.12B. Furthermore, it should be noted that majority of the free electrons, e−, shown inFIG.12Bmay correspond to the current (e.g., Ip ofFIG.4A) that flows between the anode, A, and the cathode, C, of the plasma reaction chamber (110). As described above in the present disclosure, the atomic layer etching (ALE) process according to the present disclosure may not be limited to argon as the diluent gas and hydrogen as the reactant gas. Some nonlimiting exemplary diluent gases may include any one of argon, Ar; neon, Ne; or xenon, Xe. Some nonlimiting exemplary reactant gases may include hydrogen, Hz; chlorine, Cl2; methane, CH4; carbon monoxide, CO; oxygen, O2, or other, either individually or in combination. Furthermore, according to an embodiment of the present disclosure, a ratio of the reactant gas to the diluent gas used (prior to plasma ignition) in the atomic layer etching (ALE) process according to the present disclosure may be in a range from about 2/100 to about 50/100 or greater. As described above in the present disclosure, during the atomic layer etching (ALE) process according to the present teachings, a portion (e.g., from about a few percent to about a hundred percent, e.g., full ionization) of the reactant gas introduced into the chamber (110) may be ionized to generate reactive species (e.g., H-species). Such ionized portion of the reactant gas, as well as a distribution of corresponding reactive species, or in other words relative number of H-species, for the exemplary case of hydrogen, may be controlled via process parameters, including, for example, (magnitude of) the current, Ip, described above with reference to, for example,FIG.4A. it should be noted that although in the present description of the atomic layer etching (ALE) process, the H-species of the ionized reactant gas are being considered (e.g., in the formation of an adsorbed layer), other constituents of the ionized reactant gas (e.g., reactive species), including for example, H+ and/or H− for the exemplary case of hydrogen, may be used instead to provide different etching performances, including, for example, selectivity with respect to a target material/atom and/or substrate surface finish/smoothness. As described above with reference to, for example,FIG.1C, in view of the distribution of the ionic species shown inFIG.12Bthat are indicative of presence of the DC plasma, and therefore of a corresponding plasma potential, Vpp, in the positive column of the DC plasma, a (surface) floating potential, VFP, may develop at the stage, S, and therefore at the surface of the substrate, Sub, ofFIG.12B. As described above with reference to, for example,FIG.5, the floating potential, VFP, may be adjusted to a known reference potential, such as the reference ground potential of the DC plasma processing system (e.g.,FIG.4A) used in the present atomic layer process. It should be noted that adjustment of the floating potential, VFP, may be provided after the distribution of the ionic species in the DC plasma reaction chamber (110) has stabilized (e.g., reached a steady state or equilibrium) and before application of a biasing voltage to the state, S. As shown inFIG.12Bat the time, to, the stage, S, and therefore the substrate, Sub, may be actively biased (e.g., the stage voltage, Vs, is shown inFIG.12Bas the intersection of the stage S with the biasing signal V(t) represented by a thick voltage line, such as Vs=0V) by the biasing signal generator (e.g.,480ofFIG.4A). In other words, at the time, to, the biasing signal generator (e.g.,480ofFIG.4A) may bias the stage, S, and therefore the substrate, Sub, with a voltage provided by the biasing signal, V(t), coupled to the stage, S, and therefore to the substrate, Sub. Because the biasing signal, V(t), may be referenced to the same reference ground potential to which the floating potential, VFP, is adjusted, coupling of the biasing signal, V(t), having as shown inFIG.12Ban amplitude of zero volts (0V) at the time, to, to the stage, S, and therefore the substrate, Sub, may not substantially alter or influence the distribution of ionic species provided in the positive column of the DC plasma. With continued reference toFIG.12B, some of the reactive species (e.g., H-species) can be seen bound (i.e., adsorbed) to atoms (e.g., Si) of the (top) surface layer, L1, of the substrate, Sub. In other words,FIG.12Bshows (start of the) forming of an adsorbed layer (e.g., shown inFIG.12Bas three individual H-species bound to the layer L1) of the reactive species being on the surface layer, L1. The combination of the adsorbed reactive species to the surface layer, L1, may be referred to as a corrosion layer that will be removed by electron stimulated desorption (ESD) to effectively complete etching away of an atomic layer (e.g., L1) of the substrate, Sub. Forming of the corrosion layer may be gradual (yet quick) and based on parameters seen at the location of the stage, S. These may include temperature of the stage, S; pressure in the DC plasma reaction chamber (110); current (e.g., Ip ofFIG.4A) that flows between the anode, A, and the cathode, C, of the plasma reaction chamber (110); and/or flow rate of the DC plasma that may determine resident time of the reactive species (e.g., H-species) in contact with the surface (e.g., layer L1) of the substrate, Sub. In order to etch away the entirety of the surface layer, L1, of the substrate, Sub, each of the atoms (e.g., Si) of the surface layer, L1, may include at least one adsorbed reactive species. This is shown inFIG.12C. FIG.12Cmay represent a state of the atomic layer etching (ALE) process at a time, wherein the corrosion layer is formed. In other words, as shown inFIG.12C, each of the atoms (e.g., Si) of the surface layer, L1, includes (e.g., is adhered to) by at least one adsorbed reactive species (e.g., H-species, forming corrosion layer species comprising any one or more of SiH1, SiH2or SiH3species). It should be noted that a time for the formation of the corrosion layer for the atomic layer etching (ALE) process according to the present teachings is relatively quick and on the order of few microseconds (μs) to about ten microseconds. Such quick formation of the corrosion layer may be mainly attributed to the turning on and continuous presence (e.g., not switched on and off) of the reactive species (e.g., H-species) in the whole of the plasma for the (entirety of the) duration of the atomic layer etching process. This is shown inFIG.12Cwith reference to the (initialization) phase, ΔTBz, previously described with reference to, for example,FIGS.7A/7B/7C. Assuming that the time, to, shown inFIG.12C, corresponds to a start time for the formation of the corrosion layer, then a time period between the time, to, and the time, t1, at which the corrosion layer is formed, is equal to at least the duration of the (initialization) phase, ΔTBz. Once the corrosion layer is formed (e.g., at time t1), the substrate, Sub, is ready for an active phase of the atomic layer etching (ALE) process according to the present disclosure, including electron stimulated desorption (ESD) of the corrosion layer by ESD mechanism. This is represented inFIG.12Cby an upcoming phase, ΔTBP, of the biasing signal, V(t) (e.g., part of the cycle TEEMPdescribed above with reference to, for example,FIGS.7A/7B/7C). FIG.13A,FIG.13B,FIG.13C,FIG.13DandFIG.13Eshow various schematics representative of states of the DC plasma reaction chamber (110) during an active phase of the atomic layer etching (ALE) according to the present disclosure. In other words, during such active phase, the stage, S, may be biased at a voltage, Vs, that corresponds to a positive pulse of the active phase, ΔTBP, of the cycle, TEEMP, of the (waveform of the) biasing signal, V(t), described above with reference to, for example,FIGS.7A/7B/7C. Such states may include states of the active phase, ΔTBP, during the rise and fall times/edges (e.g., tBRand tBFofFIGS.8A/B/C andFIGS.9A/B) of the positive pulse, as well as during the high level (e.g., tBHofFIGS.8A/B/C andFIGS.9A/B) of the positive pulse provided by a (high) positive voltage that corresponds to a target reaction threshold voltage, VRTH. FIG.13Amay represent a state of the atomic layer etching (ALE) process at a time, t2, wherein the corrosion layer is formed (e.g., perFIG.12C) and the stage voltage, Vs, follows (or starts to follow) the rising edge of the positive pulse. In this case, the stage voltage, Vs, may be substantially smaller (e.g., half or less than half) the target reaction threshold voltage, VRTH. However, because the stage voltage, Vs, and therefore the surface of the substrate, Sub, is now at a potential that is positive with respect to the floating potential, VFP, as shown inFIG.13Asome of the (negatively charged) free electrons, e−, are attracted to the stage, S, and therefore travel towards the surface of the substrate, Sub. On the other hand, because the ions (Ar+) of the diluent gas have a mass that may be substantially greater than the mass of the free electrons, e−, then on a timescale of the entire positive pulse (e.g., ΔTBPthat is in the order of few microseconds, e.g., less than 4 μs), their spatial location may be considered as substantially constant as provided, for example, by the ionic distribution represented inFIG.12C. As the positive pulse, and therefore the stage voltage, Vs, increases, more of the free electrons, e−, are attracted to the surface of the substrate, Sub. This is shown inFIG.13B, wherein at a time, t3, the stage voltage, Vs, is closer to, but not equal to, the target reaction threshold voltage, VRTH. In this case, the corrosion layer (i.e., adsorbed H-species to Si atoms of L1) formed at the surface of the substrate, Sub, may be in contact with electrons, e−, having an energy level that is close to, but not equal to, a target reaction energy level required for stimulation of electron transitions in the corrosion layer. Once the positive pulse, and therefore the stage voltage, Vs, reaches the target reaction threshold voltage, VRTH, electrons, e−, at the surface of the substrate, Sub, may have sufficient energy to stimulate electron transitions in the corrosion layer. This is shown inFIG.13C, wherein at a time, t4, the stage voltage, Vs, is equal to the target reaction threshold voltage, V RTH, causing atoms (i.e., corrosion layer species) at the surface layer, L1, of the substrate, Sub, to reach their respective excited states (e.g., Si*, representing excited states of corrosion layer species SiH1, SiH2or SiH3). In other words,FIG.13Cshows the start of the electron stimulated desorption (ESD) process used in the atomic layer etching (ALE) of the present teachings (e.g., via arrival of a wafer-scale wavefront of electrons, E-wave, of uniform density and energy at the surface of the substrate). This E-wave can be smaller than the diameter of the substrate stage and scalable to the dimensions of the positive column. The targeted reaction threshold voltage, VRTH, for the corrosion layer is distinctly different from the reaction threshold voltage for an un-corroded layer (e.g., L1ofFIG.12A). The V RTH for corrosion layer species in the corrosion layer are similar. The V RTH for the ESD as used in the present ALE may be set to the highest V RTH value present in the corrosion layer therefore removing all species found in the corrosion layer. It should be noted that electron stimulation of a transition may be considered as quasi-instantaneous (e.g., a fraction of a microsecond) once a surface species becomes in contact with an electron, e−, at the target reaction energy level. As shown inFIG.13D, at a time, t5, the stage voltage, Vs, is still equal to the target reaction threshold voltage, VRTH, and as a result of the ESD process, the repulsive potential of the corrosion layer species in their respective excited states (e.g., Si* ofFIG.13C) may impart sufficient kinetic energy to the corrosion layer species to eject them from the surface of the substrate, Sub. This is represented inFIG.13Dby ejected corrosion layer species (SiHx)* that is shown away/separate from the surface of the substrate, Sub, and therefore resulting in the disappearance of the surface layer L1from the substrate, Sub. Accordingly, as shown inFIG.13D, a top surface of the substrate, Sub, is now layer, L2, with former top surface, L1, being etched away. It should be noted that a timing for executing the sequence of the states of the atomic layer etching (ALE) process represented inFIGS.13C and13Dmay be in the order of a fraction of a microsecond (μs) and not more than a few microseconds. For example, as described above with reference toFIG.7A, considering a periodic biasing signal, V(t), having a frequency of 250 KHz, and therefore a length of the cycle, TEEMP, equal to 4 μs, then the length of the time interval, tBH, that corresponds to the amount of time the stage voltage, Vs, is equal to the target reaction threshold voltage, VRTH, may be in a range from about 0.1 μs to about 0.3 μs. FIG.13Emay represent a state of the atomic layer etching (ALE) process at a time, t6, wherein the corrosion layer is ejected (e.g., perFIG.13D) and the stage voltage, Vs, follows (or starts to follow) the falling edge of the positive pulse. In this case, the stage voltage, Vs, may be smaller than the target reaction threshold voltage, VRTH, but greater than zero volts. As shown inFIG.13E, once the corrosion layer species are ejected, they may convert to neutral (e.g., gas) molecules (e.g., SiH4) due to the presence of atoms and/or related species of the reactant gas (e.g., H-species) in a region of the DC plasma reaction chamber (110) surrounding the substrate, Sub. This in turn may allow removal of all residues/species of the etched away corrosion layer (e.g., SiH4) by way of, for example, the preestablished flow rate of the dilution gas (e.g., Argon) inside of the DC plasma reaction chamber (110). FIG.13Emay represent the final state of the DC plasma reaction chamber (110) during the active phase of the atomic layer etching (ALE) according to the present disclosure. As described above in the present disclosure, such active phase may be defined buy a positive pulse of the biasing signal V(t) having a duration in length that is equal to the active phase, ΔTBP, of the cycle, TEEMP, of the (waveform of the) biasing signal, V(t), described above with reference to, for example,FIGS.7A/7B/7C. Application of such positive pulse may allow removal of the corrosion layer with no ion bombardment (e.g., as does occur with traditional ALE processes), but rather via ESD mechanism initiated by transfer of energy from low energy electrons to excite species of the corrosion layer, resulting in substantially no heat being generated and no (unwanted) damage to the substrate structure (e.g., lattice). As can be seen inFIGS.13A/13B/13C/13D/13E, a distribution of the ionic species that surround the substrate, Sub, in the DC plasma reaction chamber (110) is perturbed by actively biasing the stage, S, with a stage voltage, Vs, that is greater than zero volts. In particular, electrons, e−, have traveled towards the surface of the substrate, Sub, thereby resulting in a distribution of the ionic species that may be characterized as non-homogenous, or at least different from the steady state (e.g., equilibrium) distribution described above with reference toFIG.12B. As shown inFIG.13E, in order to restore the steady state distribution in the DC plasma reaction chamber (110), an upcoming negative biasing signal (e.g., V(t)=VBN) may be applied to the stage, S, for a sufficiently long duration of time, ΔTBN. FIG.14shows a schematic representative of a state of the DC plasma reaction chamber110) at a time, t7, of a neutralization phase of the atomic layer etching (ALE) according to the present disclosure. During such neutralization phase, the stage, S, may be biased at a negative voltage, Vs=VBN, that corresponds to a negative pulse of the neutralization phase, ΔTBN, of the cycle, TEEMP, of the (waveform of the) biasing signal, V(t), described above with reference to, for example,FIGS.7A/7B/7C. Such negative bias voltage, VBN, may be used to repel electrons, e−, away from the surface of the substrate, Sub, to (gradually but quickly) restore the steady state (ionic) distribution in the DC plasma reaction chamber (110) in preparation for a next layer (e.g., L2) atomic etching. It should be noted that throughout the neutralization phase defined by application of the negative bias voltage, VBN, for the duration of time, ΔTBN, all other process parameters governing presence of the species/plasma within the DC plasma reaction chamber may remain unchanged, including, for example, inflow of diluent and reactant gas, anode/cathode voltage/current, as well as temperature, pressure, and flow rate. In other words, at completion of the neutralization phase, conditions inside of the DC plasma reaction chamber (110) may be substantially the same as the conditions described above at time, to, with reference toFIG.12B. As shown inFIG.14, in order to restore the condition for formation of a corrosion layer on the exposed surface layer, L2, of the substrate, Sub, an upcoming zero biasing signal (e.g., V(t)=0V) may be applied to the stage, S, for a sufficiently long duration of time, ΔTBz, to return the plasma floating potential VFPat the surface of the substrate, Sub, to precisely the same potential (e.g., 0V or other) for every ALE cycle. This in turn may allow precise control and repeatability of the voltage/energy of the electrons in every E-wave brought down to the substrate, Sub, for every ALE cycle according to the present teachings. FIG.15shows a schematic representative of a state of the DC plasma reaction chamber110) at a time, t8, of an initialization phase of the atomic layer etching (ALE) according to the present disclosure. During such initialization phase, the stage, S, may be biased at zero volts, Vs=0V, that corresponds to the initialization phase, ΔTBz, of the cycle, TEEMP, of the (waveform of the) biasing signal, V(t), described above with reference to, for example,FIGS.7A/7B/7C. Such zero volts bias voltage may be applied for a sufficient length to allow formation of the corrosion layer, as described above with reference to, for example,FIG.12BandFIG.12C. In other words, at completion of the initialization phase, conditions inside of the DC plasma reaction chamber (110) may be substantially the same as the conditions described above at time, t1, with reference toFIG.12C. Upon completion of the initialization phase, a new atomic layer etching (ALE) cycle, including the above-described active phase, ΔTBP, neutralization phase, ΔTBN, and initialization phase, ΔTBz, can be initiated for removal of the next atomic layer (e.g., L2). For example, assuming that the time, t8, shown inFIG.15corresponds to the completion of the initialization phase (i.e., a time length equal to ΔTBzhas elapsed since application of the negative bias voltage VBN), then the positive pulse of the active phase of the next ALE cycle can be provided at any time, t8+ΔTstart, wherein the time, ΔTstart, can be as small as zero. In other words, the atomic layer etching (ALE) process according to the present disclosure may remove atomic layers (e.g., L1,12, etc.) of a substrate at a rate that is according to the cycle, TEEMP, described above with reference to, for example,FIGS.7A/7B/7C. It should be noted that in a case where, for example, a different etching performance or a different target reaction (e.g., different reactive species and/or different material atomic layers), may be desired for etching of a next layer of the substrate, conditions inside of the DC reaction chamber (110) and/or the waveform for the biasing signal, V(t), may be changed/selected prior to initiating the next ALE cycle. In addition, the reaction chamber may be purged before introducing different reactant gasses. A time for such change/selection may be varied by inserting a longer initialization bias signal equal to zero volts before the start of the next EEMP cycle and be as short as zero (e.g., ΔTstart=0). As shown in the various figures (e.g.,FIGS.13-15) used to describe the various states of the DC plasma reaction chamber (e.g.,110) during the atomic layer etch (ALE) processing of a substrate (e.g., Sub) according to the present disclosure, in the positive column (e.g., G3) above the stage (e.g., S), a volume of gaseous plasma containing ions (e.g., Ar+ and H-species) and electrons (e.g., e−) of a uniform steady state composition (including fixed/controlled temperature) and with a narrow distribution of electron energies is formed (e.g.,FIGS.12B/12C). When the positive bias is applied to the stage (e.g., S) during the active phase of the ALE cycle (e.g.,FIGS.13A/13B/13C/13D/13E), electrons (e.g., e−) uniformly across the stage are drawn/attracted to the surface of the stage from the volume in the DC plasma reaction chamber (e.g.,110) that is located above the stage. When the negative bias is applied to the stage (e.g., S) during the neutralization phase (e.g.,FIG.14) of the ALE cycle, electrons (e.g., e−) uniformly across the stage are repelled from the surface of the stage back into the volume above the stage. When the zero volts bias voltage is applied to the stage (e.g., S) during the initialization phase (e.g.,FIG.15) of the ALE cycle, initial conditions as described above with reference toFIG.12Care recreated inside, and proximate the stage, of the DC plasma reaction chamber (110). This includes restoring of the floating potential, VFP, to the initial potential, thereby returning the electrons in the plasma volume above the stage to their initial states, which in turn may allow (precise and) consistent control of the energy of the electrons in the E-wave used in each ALE cycle. If such ALE cycle is repeated at a regular pace, then electrons (e.g., e−) arrive with a uniform density and energy across the surface area of the stage (e.g., S) at well-defined intervals. Each arrival of the electrons at the surface of the stage at these intervals (e.g., arrival times) is referred to herein as an “electron wavefront” or a wafer scale wave of precisely controlled electrons (e.g., represented inFIG.13Cby E-wave). A number of embodiments of the disclosure have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the present disclosure. Accordingly, other embodiments are within the scope of the following claims. The examples set forth above are provided to those of ordinary skill in the art as a complete disclosure and description of how to make and use the embodiments of the disclosure and are not intended to limit the scope of what the inventor/inventors regard as their disclosure. Modifications of the above-described modes for carrying out the methods and systems herein disclosed that are obvious to persons of skill in the art are intended to be within the scope of the following claims. All patents and publications mentioned in the specification are indicative of the levels of skill of those skilled in the art to which the disclosure pertains. All references cited in this disclosure are incorporated by reference to the same extent as if each reference had been incorporated by reference in its entirety individually. It is to be understood that the disclosure is not limited to particular methods or systems, which can, of course, vary. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” include plural referents unless the content clearly dictates otherwise. The term “plurality” includes two or more referents unless the content clearly dictates otherwise. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure pertains. | 92,986 |
11942307 | DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS The present disclosure is related to systems and methods for plasma processing of semiconductor substrates. Characteristics of the plasma and the plasma process depend on the characteristics of two electrical signals, known as a radio frequency (RF) source signal and a bias signal, that are generally used to ignite and sustain plasma in a plasma processing chamber. This disclosure describes example embodiments of plasma processing systems and methods where plasma is ignited and sustained by coupling parameterized RF source and time-varying bias signals to RF electrodes of a plasma processing chamber. The plasma processing system includes a processor that executes a program with instructions to configure the system, the program being stored in memory included in the system. On executing the program, the processor sends commands to a timing controller, providing timing parameters selected for adjusting and synchronizing the RF source and bias signal waveforms. With the timing parameters, the timing controller may send appropriate control signals to synchronously control the output signals of electronic equipment that generate the RF source and bias signals coupled to the RF electrodes of the plasma processing chamber. By adjusting and synchronizing the RF source and bias signal waveforms, the timing controller may tune the plasma environment at the surface of the substrate, including the surface inside deep trenches. The example embodiments in this disclosure use RF source signals having either a continuous wave RF (CW-RF) waveform or an RF-burst waveform comprising a train of RF-burst pulses. Each RF-burst pulse has an RF waveform (e.g., an RF sinusoid) that is present during an RF-burst duration of the RF-burst pulse. The RF-burst duration is followed by an RF-burst separation time during which there is no RF source signal. A sum of the RF-burst duration and the RF-burst separation time is one period of the RF-burst waveform, referred to as the RF-burst period. The RF-burst period may be about 1 microsecond to about 10 milliseconds long. The time-varying bias signals have pulsed bipolar-DC waveforms, referred to as B-DC waveforms in this disclosure. The B-DC waveform comprises a high-frequency train of B-DC pulses that include DC pulses of positive and negative polarity, as well as durations of neutral polarity. The various polarities are relative to a reference potential of the RF system defined to be equal to 0 V. The reference potential may be the ground potential or ground. Each B-DC pulse of the pulse train is parameterized with three timing parameters: a negative bias duration (during which the pulse has negative polarity), a positive bias duration (during which the pulse is of positive polarity), and a neutral bias duration (during which the pulse is of neutral polarity). In some embodiments, a fourth timing parameter may be introduced by splitting the neutral bias duration into a first neutral bias pulse segment and a second neutral bias pulse segment separating the negative and positive bias durations, as explained in further detail below. One cycle of the B-DC pulse, which is a sum of the three (or four) timing parameters, may be about 100 nanoseconds to about 400 microseconds long. The B-DC waveform of the bias signal may be a continuous B-DC waveform comprising a continuous train of B-DC pulses or, a B-DC-burst waveform comprising a train of B-DC-burst pulses. Each B-DC-burst pulse comprises a plurality of consecutive B-DC pulses that is present during a B-DC-burst duration followed by a B-DC-burst separation time during which there is no bias signal, a sum of the B-DC-burst duration and the B-DC-burst separation time being one B-DC-burst period. As explained in further detail below, the RF-burst period has to be equal to the B-DC-burst period, and is referred to as burst period in this disclosure. An embodiment of the plasma processing system will first be described withFIG.1. Alternate embodiments of the plasma processing system will be described withFIGS.5A-5B. Alternative embodiments of waveforms of RF source signals and pulsed bipolar-DC (B-DC) bias signals will be described withFIGS.2A-2D. Alternative embodiments of B-DC waveforms of bias signals used in conjunction with continuous wave (CW) RF waveforms of RF source signals will be described withFIGS.3A-3D. Alternative embodiments of B-DC waveforms of bias signals used in conjunction with RF-burst waveforms of RF source signals will be described withFIGS.4A-4C. FIG.1is a schematic of a plasma processing system100comprising a plasma processing chamber110, a CW-RF source signal source120, a continuous B-DC bias signal source130, a timing controller140, and a processor142. The CW-RF source signal source120and the continuous B-DC bias signal source130may be programmable. The timing controller140is configured to receive commands from a processor142which, when executed, programs the continuous B-DC bias signal source130to generate B-DC pulses with the selected timing parameters received from the processor142. The signals from the RF source signal source120and the continuous B-DC bias signal source130are routed through a first chopper124and a second chopper134, respectively, which may be programmable. The first and second choppers124and134may be programmed by the timing controller140to either transmit an incoming signal unmodulated, or modulate the incoming signal with a pulsed gating signal and transmit the modulated signal. The gating signal, generated in the respective first and second choppers124and134, periodically allows the incoming signal to pass through (directly couples input to output) during a burst duration and blocks the signal (decouples output from input) during a burst separation time, a sum of the burst time and the burst separation time being a burst period. A first gating signal in the first chopper124and a second gating signal in the second chopper134have the same burst period, and the two gating signals are synchronously staggered by a constant burst delay. Synchronizing the B-DC-burst waveform with the RF-burst waveform delays the B-DC-burst pulses by a constant burst delay from the RF-burst pulses. The burst delay is used to synchronize the superposition of the RF-burst waveform and the B-DC-burst waveform in the plasma processing chamber110. The two burst times, the burst period, and the burst delay are specified in commands sent to the timing controller140by a processor142of the plasma processing system100, as indicated by a block arrow directed towards the timing controller140inFIG.1. The timing controller executes the instructions to synchronously control an output signal of the first chopper124, an output signal of the second chopper134, and an output signal of the continuous B-DC bias signal source130, as indicated by two block arrows directed from the timing controller140to each of the first and second choppers124and134and a fourth angled block arrow from the timing controller140to the continuous B-DC bias signal source130. In some embodiments, the CW-RF source signal source120may be a low-power source and may be combined with a signal generator such as the programmable chopper124into one unit. The signal generator produces a low power signal by switching the CW-RF signal using control signals received from the timing controller140. The low power signal would then be amplified to full power by an RF power amplifier (not shown inFIG.1). The amplifier may also be combined with the low-power RF source and the signal generator into one unit. Generally, a plasma processing chamber comprises two RF electrodes that may be configured to couple to an RF source signal and/or a bias signal transmitted from outside the plasma processing chamber. An outer wall of a plasma processing chamber typically has a conductive portion coupled to the reference potential (or ground) of the RF system and may be referred to as a ground electrode of the plasma processing chamber. The RF source signal, the bias signal, and the reference potentials relative to which the signals are generated are transmitted to the plasma processing chamber. The RF source signal and the bias signal are coupled to the RF electrodes and the reference potentials are coupled to the ground electrode of the plasma processing chamber. For example, if two coaxial cables are being used to couple the RF source signal and bias signal to the plasma chamber110inFIG.1then each of the two inner conductors of the coaxial cables may be connected to either a top RF electrode116or a bottom RF electrode118. The two outer conductors may be connected to a conductive portion119of the outer wall of the plasma chamber110. The RF source signal may be coupled to a first RF electrode and the bias signal may be coupled between the first RF electrode and a second RF electrode. As mentioned above, in the embodiments described in this disclosure, the bias signals have B-DC waveforms. There are several configurations that may be used to couple the bias signal between the first RF electrode and the second RF electrode, where the RF source is coupled to the first RF electrode. In one embodiment, the bias signal having the B-DC waveform is coupled to the first RF electrode, and the second RF electrode is coupled to the reference potential. In another embodiment, the bias signal having the B-DC waveform is coupled to the second RF electrode. In yet another embodiment, the bias signal having the B-DC waveform is a difference of a first unipolar DC (U-DC) signal and a second U-DC signal. In this embodiment, the first U-DC signal is coupled to the first RF electrode and the second U-DC signal is coupled to the second RF electrode. As explained in further detail below, the selected timing parameters of the B-DC waveform may be achieved by selecting appropriate pulse widths and pulse separation times of the two U-DC signals, along with synchronizing the first U-DC signal with the second U-DC signal by delaying the U-DC pulses of the first U-DC signal by a constant U-DC delay time from the U-DC pulses of the second U-DC signal. The plasma processing chamber110inFIG.1is a vacuum chamber configured as capacitively coupled plasma (CCP) chamber. A CCP chamber may comprise two disc-shaped RF electrodes disposed on opposite sides inside the plasma processing chamber, each RF electrode having a flat surface facing the opposite RF electrode. In the example configuration illustrated inFIG.1, the top RF electrode116is coupled to the RF source signal and the bottom RF electrode118is coupled to the bias signal. The reference potential (indicated by GND inFIG.1) is coupled to the ground electrode of the plasma processing chamber110, which is the conductive portion119of the outer wall. The CCP configuration is selected by example only; some other configuration such as inductively coupled plasma (ICP) may also be used. In the ICP configuration, the RF source signal is coupled to an RF electrode (referred to as an ICP antenna) that is physically separated from the plasma by a thick dielectric window. RF source power is coupled to plasma from the ICP antenna outside the plasma chamber. In some embodiment, the pulsed bipolar-DC waveforms may be used for plasma formed using microwave power instead of RF power. The plasma processing chamber110inFIG.1is configured with gas inlets112and exhausts114coupled to a gas flow system. As known to persons skilled in the art, the gas flow system comprises gas canisters, valves, and vacuum pumps maintaining the flow of the low-pressure gaseous mixture through the plasma processing chamber110. A mixture of process and carrier gases, referred to as feed gas, is introduced through the inlets112and flows through the plasma processing chamber110. The ambient inside the plasma processing chamber110is, generally, maintained at a low pressure and a relatively low temperature compared to typical furnace temperatures, for example, room temperature. The pressure in plasma processing chamber110is typically from about 1 mTorr to about 1 Torr but, some plasma processes may be performed at high pressure (e.g., atmospheric pressure). As the feed gas gets exposed to the electromagnetic fields generated at RF electrodes116and118, a small fraction of the gas molecules may be ionized and form plasma, often referred to as weakly ionized plasma, between the electrodes. In a CCP chamber, (e.g., plasma processing chamber110) energy is transferred from the RF source and bias signals to plasma (e.g., plasma150) by capacitive coupling between the plasma and the RF electrodes. The plasma is also coupled to ground by an impedance of the capacitance between plasma (e.g., plasma150) and a ground electrode of the plasma chamber (e.g., the conductive portion119of the outer wall). As mentioned above, the RF source signal may be a CW-RF or an RF-burst waveform transmitted from the first chopper124. Likewise, the bias signal transmitted from the second chopper134may be a continuous B-DC pulse train or have a B-DC-burst waveform. The bottom RF electrode118in plasma processing chamber110may be included in a substrate holder (e.g., an electrostatic chuck) holding a substrate108, for example, a semiconductor substrate. In some embodiments, a conductive bulk of the substrate108is physically separated from the bottom RF electrode118by a dielectric layer. In some embodiments, the substrate holder (e.g., an electrostatic chuck) may include a dielectric layer between the bottom RF electrode118and the surface of the substrate holder in contact with the back side of the substrate108. The feed gas is generally charge neutral and in thermal equilibrium at a temperature, T, equal to the ambient temperature in the plasma processing chamber110. A portion of the energy imparted to the feed gas dissociates a fraction of the neutral gas molecules and atoms into net neutral, weakly ionized plasma comprising positively charged ions (indicated by “+”) and negatively charged free electrons (indicated by “e”) of plasma150, as illustrated schematically inFIG.1. Further energy may be transferred from the electromagnetic fields to the mobile charged particles as kinetic energy. As explained further below, in general, the kinetic energy has a random component (due to randomizing collisions between the various particles) and a directed component in the direction of an accelerating electric field. The random component may be dominant in a region of low electric field and high frequency of collisions, and the directed component (in the direction of the electric force) may be dominant in a region of high electric field and low frequency of collisions. In addition to generating charged ions and free electrons, a portion of the energy imparted to the feed gas generates neutral radicals (indicated by “R” inFIG.1). A neutral radical is a charge-neutral group of atoms (or an atom) that has unpaired electrons. Because of the presence of unpaired electrons, radicals have high chemical reactivity. Initially, the average kinetic energy per particle of all types of particles is roughly equal to its thermal equilibrium value of ( 3/2) kBT, where T is the ambient temperature in kelvin and kBis the Boltzmann constant. For example, at room temperature, or 300 K, the average kinetic energy of each particle of the feed gas is 39 meV. Once ionized, the charged particles may be accelerated and acquire kinetic energy from the electric field, the acquired energy being an excess kinetic energy. Although the acceleration is directed parallel to the electric field, the momentum gained from the electric field is rapidly scattered in all possible directions because of random collisions with various particles (mostly neutral particles in weakly ionized plasma). Hence, much of the kinetic energy acquired from the electric field in the bulk of the plasma is transferred toward increasing the random component of kinetic energy. For each species of charged particle (ion and electron), the average value of its random component of kinetic energy may be equivalently represented by a respective non-equilibrium effective temperature: an electron temperature, Te, and an ion temperature, Tion. During an initial transient, the effective temperature rises from its initial thermal equilibrium value, T. An increasing energy in excess of the thermal equilibrium value results in an increasing frequency of inelastic collisions till a steady state is established where the excess energy acquired from the electric field is balanced by a loss of excess energy in inelastic collisions. The steady state value of the effective temperature depends on the frequency of inelastic collisions. The collision frequency depends on a probability of inelastic collisions (collisions causing significant energy loss) averaged over the ensemble of particles of the respective species (e.g., free electrons or ions). A lower frequency of inelastic collisions results in a higher effective temperature at which steady state is established. Most of the collisions between free electrons and neutral particles are roughly elastic collisions (negligible energy loss), whereas ions almost always lose energy in collisions (e.g., collisions between an ion and a neutral particle). Accordingly, Teis generally much higher than Tion. The preferential increase in kinetic energy of free electrons is more pronounced at low pressure. Hence, in plasma150inFIG.1, a non-equilibrium steady-state may be established by collisions, in which the random component of the average kinetic energy of an ion is not much higher than that for gas molecules at T=300 K, whereas the randomized average kinetic energy of a free electron may be 100 times higher (e.g., from about 1 eV to about 10 eV). As explained further below, the ions may acquire a high directed kinetic energy (e.g., from about 50 eV to about 1000 eV) as they pass through a region of high electric field before striking the substrate in a plasma process such as sputtering and anisotropic reactive ion etch (RIE) processes, where ions are used to bombard a surface. Generally, the bulk of the plasma, where most of the ions and free electrons are concentrated, is a wide central quasi-neutral region, where the electric field is low because of screening by mobile charges. The quasi-neutral region is surrounded by a depleted and narrow space-charge region of high electric field, known as a plasma sheath. Ordinarily, mobility and diffusivity of the free electrons are much higher than that of the ions. With the positively charged ions being much slower than the negatively charged free electrons, free electrons near the periphery get lost faster from the plasma leaving behind a net positive charge which creates the sheaths around the central quasi-neutral region. The charge distribution in the sheath establishes an electric field in a direction that pushes free electrons back towards the quasi-neutral region and accelerates ions outward toward the conductive portion119and strike the chamber wall and the substrate108. Generally, the charge density and the electric field in the sheath is high relative to the charge density and the electric field in the quasi-neutral region. In the quasi-neutral region, there is a small electric field (small relative to the electric field in the sheath), referred to as the ambipolar electric field, that arises to equilibrate the flow of ions and free electrons to maintain a steady state charge density distribution. Ions and free electrons acquire momentum and kinetic energy from the ambipolar electric field. However, the directed component of the excess momentum and energy is small: the ions and free electrons move randomly in all possible directions colliding relatively frequently with various particles, particularly the large number of neutral particles in weakly ionized plasma. In other words, the distribution of ions and free electrons vs. angle is roughly uniform. Furthermore, because of randomizing collisions, the distribution in energy may be approximated by a Maxwell-Boltzmann distribution function with an elevated temperature representing the non-equilibrium average kinetic energy. Energy balance is achieved mostly by the charged particles (e.g., free electrons and ions) losing energy to the neutral particles in inelastic collisions. The neutral particles are not accelerated by the electric fields; hence remain at a cooler temperature very close to the thermal equilibrium value, T. As explained above, both electrons and ions equilibrate to their respective elevated effective temperatures, Teand Tion, according to their respective rates of energy loss through inelastic collisions. Typically, Te>>Tionwith a ratio of (Te/Tion)>10. Plasma processing is generally performed by physically bombarding an exposed surface of the substrate with a fluence of energetic ions and/or by chemically reacting radicals produced in the plasma, present in the feed gas, and in the substrate material, depending on the plasma process. The physical and chemical interactions may produce volatile byproducts (indicated by “B” inFIG.1) that are pumped out of the plasma processing chamber110through the exhausts114. Although only a small fraction of the neutral feed gas particles are ionized in weakly ionized plasma, the ions and free electrons are indispensable to plasma processing. Collisions between neutral gas molecules and highly energetic free electrons at the higher energy side of the Maxwell-Boltzmann distribution play a major role in generating radicals and ions in the quasi-neutral region of plasma150by dissociating and ionizing feed gas molecules. Low energy “cold” ions from the quasi-neutral region are energized as they enter the narrow plasma sheath close to the substrate and acquire directed kinetic energy from the electric field of the sheath. The ion energy, determined mainly by the potential difference across the sheath, assists radicals to chemically react with other radicals in the gas (e.g., in a chemical vapor deposition (CVD) process) and with the substrate material. Over time, the flow of ions to the substrate may result in undesirable positive charge accumulation. In addition to the role of generating radicals and ions, the negatively charged free electrons may be used to neutralize the positive charge buildup, as explained further below. In this disclosure, methods of plasma processing with innovative RF source signal and B-DC bias signal waveforms are described. Electromagnetic fields, hence the RF source signal and B-DC bias signal waveforms, directly influence the flow and the energy of charged particles in plasma (e.g., free electrons and ions). The effects of the RF source signal and B-DC bias signal waveforms on the neutral species (e.g., the neutral radicals and the byproducts of the chemical and physical interactions) are achieved indirectly through the timing and synchronization of the pulses. For example, in some embodiments, plasma150in the plasma chamber110may be extinguished periodically for durations of about 1 microsecond to about 1 millisecond, and re-ignited to prevent accumulation and re-deposition of reaction byproducts, as described in further detail below. In some embodiment, a neutral bias duration may be adjusted in a range of about 100 nanosecond to about 1 millisecond to achieve a desired ratio of radical fluence to ion fluence to ensure that a sufficient density of radicals are present to react with material sputtered from the substrate by ion bombardment. The neutral bias duration also allows time to replenish the ions extracted from the plasma by the electric field in the sheath. As defined above, the neutral bias duration refers to the duration within a single B-DC pulse in which the bias signal is neutral. It is understood that the bias signal is off during the B-DC-burst separation time. However, by definition, the neutral bias duration includes only the duration in each individual B-DC pulse when the bias polarity is neither positive nor negative relative to the reference potential. For illustrative purposes, the schematic view of the plasma processing chamber110inFIG.1shows a snapshot of plasma150at a time when positively charged ions (indicated by “+”) have been attracted preferentially towards the bottom RF electrode118and the substrate108, while the negatively charged electrons (indicated by “e”) have been repelled in an opposite direction towards the top RF electrode116, possibly under the influence of the bias signal. The neutral radicals (indicated by “R”) may drift with the gas flow or diffuse out towards the RF electrodes but, being charge neutral, the flux of radicals is not modulated by the electromagnetic fields in the plasma processing chamber110. Reaction byproducts (indicated by “B”) are seen near the substrate108. The positively charged ions and the negatively charged electrons may be pushed in opposite directions by an electric field, for example, towards the bottom or the top, depending on the instantaneous polarity of the time-varying bias signal applied between the top RF electrode116and the bottom RF electrode118. As explained in further detail below, this dependence may be exploited in the embodiments described in this disclosure to influence the plasma process by shaping the B-DC waveforms of the bias signal synchronously with the RF source signal. The parameterization and synchronization of the RF source and bias signals are explained with reference toFIGS.2A-2D. FIG.2Aillustrates example plots of the CW-RF waveform2A1output from the CW-RF source signal source120and the continuous B-DC waveform2A2output from the continuous B-DC bias signal source130of the plasma processing system100inFIG.1. InFIG.2A, the CW-RF waveform2A1is a continuous RF sinusoid of a fixed frequency and amplitude. It is understood that, some other continuous RF waveform may also be used, for example, an RF sawtooth waveform. A dashed double arrow “A” indicates one B-DC pulse of the continuous B-DC waveform2A2inFIG.2A. The example B-DC waveform2A2is a pulse train where each B-DC pulse has three pulse segments and the timing parameters are the durations of the three pulse segments indicated by solid double arrows in a magnified plot of the single B-DC pulse2A2′. The parameters are: the negative bias duration212during which the pulse has negative polarity, the positive bias duration214during which the pulse has positive polarity, and the neutral bias duration216during which the pulse has neutral polarity relative to the reference potential (o V). As illustrated in the respective plots inFIG.2A, in the B-DC pulse2A2′, the negative bias duration occurs before the positive bias duration, whereas, it is the opposite in the B-DC pulse2A3. The B-DC pulse2A3may be obtained by simply flipping the polarity of the negative and positive bias segments of the B-DC pulse2A2′. So, in the example configuration of the plasma processing system100illustrated inFIG.1, applying B-DC pulses2A2′ to the bottom RF electrode118would first attract ions to the substrate108(during the negative bias duration212) then, during the positive bias duration214, attract free electrons to neutralize any positive charge buildup. In another embodiment, the connections for the RF source signal and the bias signal may be flipped so the top RF electrode116is coupled to the RF source signal and the bottom RF electrode118is coupled to the bias signal. In this configuration, the B-DC pulse2A3would achieve the same effect as B-DC pulse2A2′ in the configuration illustrated inFIG.1. Accordingly, the continuous B-DC bias signal source130may be programmed to generate B-DC pulses2A3. The bias signal is at roughly 0V (the reference potential) during the neutral bias duration216, allowing time for enough radicals and ions to diffuse to the surface before bombarding the surface with ions again. In some embodiment, the neutral bias duration216may be split into a first neutral bias pulse segment215and a second neutral bias pulse segment217, as illustrated by B-DC pulse2A4inFIG.2A. Although rarely used, the first neutral bias pulse segment215may delay the neutralizing flux of free electrons during a transient ion flow following the end of the negative bias duration212. Although the example B-DC waveform2A2and the B-DC pulses2A2′,2A3, and2A4inFIG.2Adepict equal magnitudes of the negative bias and the positive bias, it is understood that unequal magnitudes may also be used. FIG.2Billustrates plots of the CW-RF waveform2A1, an example gating waveform2B1generated, for example, in the first programmable chopper124(seeFIG.1), and an RF-burst waveform2B2generated by modulating the CW-RF waveform2A1with the gating waveform2B1. As illustrated inFIG.2B, one burst period226of the gating waveform2B1is the sum of one burst duration222and one burst separation time224. The gating signal having the gating waveform2B1allows the CW-RF waveform2A1to pass through during the burst duration222and blocks the CW-RF waveform2A1during the burst separation time224, thereby generating the RF-burst waveform2B2. Generally, the main source of power sustaining the plasma (e.g., plasma150) in a plasma processing chamber (e.g., plasma processing chamber110) is the RF source signal. So, the weakly ionized plasma may be extinguished during the burst separation time224, and be reignited after the start of the next RF-burst pulse. FIG.2Cillustrates plots of the continuous B-DC waveform2A2, another gating waveform2C1generated, for example, in the second chopper134(seeFIG.1), and a B-DC-burst waveform2C2generated by modulating the B-DC waveform2A2with the gating waveform2C1. The gating waveform2C1allows the continuous B-DC waveform2A2to pass through unaltered during the burst duration232and blocks the continuous B-DC waveform2A2during the burst separation time234, thereby generating the B-DC-burst waveform2C2, where each B-DC-burst pulse is a burst of three B-DC pulses, as illustrated inFIG.2C. In various embodiments, a B-DC burst pulse may comprise a single B-DC pulse or a different number of multiple B-DC pulses. It is noted that the same burst period226is used for the gating signal waveform2C1inFIG.2Cas used for the gating signal waveform2B1inFIG.2B. As mentioned above, in the embodiments of plasma processing systems (e.g., plasma processing system100) described in this disclosure, both of the first and second choppers124and134are controlled by the timing controller140to use a single value as the burst period for a B-DC-burst waveform and the burst period for the respective RF-burst waveform. As explained with reference to the plots of the waveforms inFIG.2D, the two burst periods are set to the same value because the RF source signal and the respective bias signal are synchronized by a constant burst delay242. FIG.2Dillustrates plots of a gating waveform2D1and the respective B-DC-burst waveform2D2, along with the gating waveform2B1and the respective RF-burst waveform2B2, also illustrated inFIG.2B. In this example, the burst duration232of the gating waveform2D1is different from the burst duration222of the gating waveform2B1. Likewise, the burst separation time234of the gating waveform2D1is different from the burst separation time224of the gating waveform2B1. However, both of the gating waveforms2B1and2D1have the same burst period226. InFIG.2D, the gating waveform2D1has been delayed by a burst delay242with respect to the gating signal2B1. Accordingly, the B-DC-burst waveform2D2is also delayed by the burst delay242from the RF-burst waveform2B2. It is noted that each B-DC-burst pulse of the B-DC-burst waveform2D2starts at a fixed delay time after the start of each RF-burst pulse of the RF-burst waveform2B2. The constant separation is equal to the burst delay and synchronizes the RF source signal having the RF-burst waveform2B2with the bias signal having the B-DC-burst waveform2D2. The synchronization with a fixed delay has been possible because the burst period226is common to the gating signal waveforms2B1and2D1. FIGS.3A and3Billustrate plots of pairs of RF source and bias signals used in embodiments where the RF source signal has a CW-RF waveform. For each pair, the RF source signal and the bias signal are used in conjunction with each other to sustain plasma for plasma processing. InFIG.3A, the CW-RF waveform3A1is paired with a bias signal having the continuous B-DC waveform3A3comprising a continuous train of B-DC pulses. Each B-DC pulse of the pulse train has three timing parameters: a negative bias duration312, a positive bias duration314, and a neutral bias duration316, similar to the B-DC pulse2A2′ described above with reference toFIG.2A. InFIG.3B, the same CW-RF waveform3B1has been paired with a bias signal having the B-DC-burst waveform3B3comprising a train of B-DC-burst pulses, where each B-DC-burst pulse is a burst of three B-DC pulses. In this example, each of the three B-DC pulses in one burst uses the same three timing parameters used in for the B-DC pulses of the continuous B-DC waveform3A3(seeFIG.3A). In addition, since the B-DC-burst waveform3B3is a train of periodic bursts of three B-DC pulses, it has two more timing parameters, a burst duration332and a burst separation time334, originating from a gating signal waveform3B2that has been used to generate the B-DC-burst waveform3B3. The sum of the burst duration332and the burst separation time334is the burst period326, as indicated inFIG.3B. The three parameters for the B-DC pulses of3A3and3B3, and the two additional parameters for the B-DC-burst pulses may be selected, for example, by processor142and controlled by the timing controller140in plasma processing system100(illustrated inFIG.1). Since the RF-source signal waveform is present continuously, there is no burst delay and no synchronization to be performed. The plasma (e.g., plasma150), which is analogous to an engine generating ions, free electrons, and radicals, is fueled to a large extent by RF power from the RF-source signal. Thus, if the RF source signal has a CW-RF waveform then ions and radicals are being generated continuously in the central quasi-neutral region. These ions and radicals slowly diffuse outward toward the plasma sheath at the edge of the quasi-neutral region. The electric field of the plasma sheath accelerates (or retards) the charged particles (positive ions and negative free electrons) while the neutral radicals continue to diffuse through the sheath toward the substrate (and the chamber walls). The time-varying bias signal may have a strong influence on the electric field in the plasma sheath. In the embodiments described in this disclosure, the bias signals have B-DC waveforms. The different segments of the B-DC pulse influence the interaction of ions, radicals and free electrons, with the substrate in different ways, as explained further below. The removal and/or re-deposition of byproducts of these interactions are also influenced by the parameters of the B-DC waveforms3A3and3B3such as the burst separation time334inFIG.3B. When the substrate (e.g., substrate108) is biased negative, the electric field in the plasma sheath is increased in a direction that accelerates ions from the quasi-neutral region towards the substrate. The ions acquire very high directed kinetic energy resulting in a burst of ions bombarding the surface. A rectangular pulse with very short rise time and fall time may be preferred in order to achieve a narrow spread in the energy distribution of the energetic ions. The duration of this negative polarity bias may not be too short because of the slow response time of the relatively low mobility of ions. On the other hand, there are several reasons why it is undesirable to use a long duration of negative polarity bias. If the negative bias is present for a long time then there is a large fluence of ions that bombard the surface, physically dislodging an amount of material that far exceeds the amount which can chemically react with a low fluence of radicals provided by the slow diffusion of radicals from the plasma to the substrate. With insufficient radicals available to chemically react with the dislodged material, the etch rate is slow, some of the dislodged material may re-deposit randomly instead of being converted to a volatile byproduct, and the etch mechanism being more physical than chemical is also less selective to other exposed materials. Furthermore, the supply of ions may deplete, hence the bombardment with ions may become inefficient with time. Another reason why the duration of the negative polarity bias cannot be too long is that, in some processes, the positive ions may cause charge buildup in the substrate. To neutralize the positive charge buildup, the pulse segment that applies negative bias to the substrate may be followed by a segment that applies positive bias to the substrate. The positively biased substrate attracts negatively charged free electrons to neutralize the positive charge buildup. Electrons being light and highly mobile, the time for which the substrate has positive polarity may be kept short. The neutral bias duration (the duration within a single B-DC pulse when the bias signal has neutral polarity) may be used to adjust the fluence of radicals relative to the fluence of ions in each B-DC pulse. If the neutral bias duration is too short, that is, the ion bursts are too frequent then the ratio of radical to ion fluence may be unacceptably low, particularly in deep trenches, where the surface is further removed from plasma, so the radicals have to diffuse over a longer distance. Since the RF source signal (e.g., the RF source signal having the CW-waveform3B1inFIG.3B) is continuously present, hence radicals are continuously being generated, the burst separation time (e.g., burst separation time334inFIG.3B) also help radicals to diffuse over long distances. Another advantage provided by the burst separation time334is that it allows volatile byproducts of the chemical and physical interactions to be removed by the vacuum pump through the exhausts (e.g., exhausts114inFIG.1). In some embodiments, a volatile byproduct may be unstable and decompose in a secondary chemical reaction to form a solid byproduct that deposits on exposed surfaces and may distort the profile of, for example, sidewall of an etched feature. It is noted that, in some embodiments, solid byproducts may be used to passivate a surface, for example, a trench sidewall. FIGS.4A-4Cillustrate plots of example pairs of RF source and bias signals where both signals have burst-pulse waveforms. Since the RF source signal has an RF-burst waveform, the plasma may be extinguished when the RF-signal is blocked during the RF-burst separation time, thereby “cooling” the free electrons and pausing the generation of ions and radicals. The plasma may be re-ignited and the generation processes renewed when the RF-source signal is applied again at the start of the next burst duration. The RF-burst waveform and the B-DC-burst waveform of each pair are synchronized by a burst delay, similar to the synchronized pair of waveforms (RF-burst waveform2B2and B-DC-burst waveform2D2) inFIG.2D. Each B-DC pulse of the B-DC-burst waveforms4A4,4B4, and4C4(inFIGS.4A,4B, and-4C, respectively) has the same negative pulse duration412, positive pulse duration414, and neutral pulse duration416for illustrative purposes only. InFIG.4A, an RF source signal having an RF-burst waveform4A2is used in conjunction with a bias signal having a B-DC-burst waveform4A4. In this example, a gating waveform4A1is used to generate the RF-burst waveform4A2, and the same waveform is used to generate the B-DC-burst waveform4A4. A burst duration432and a burst separation time434, adding up to a burst period426has been used. In this example embodiment, the burst delay is zero. Using the same gating waveform (e.g., gating waveform4A1) and zero burst delay results in generating a pair of in-phase burst waveforms: RF-burst waveform4A2and B-DC-burst waveform4A4. The example inFIG.4Ais a special case of an in-phase burst waveform. In general, in an in-phase burst waveform, the B-DC-burst waveform is not present in the absence of an RF source signal. Accordingly, the RF burst duration is greater than or equal to the B-DC burst duration and the burst delay may be between zero and the difference between the RF burst duration and the B-DC-burst duration. Having a pulse segment where there is no RF source signal and no bias signal creates a duration for which there may be no byproducts produced. Since the gas flow system operates continuously, the byproducts may be efficiently removed from the plasma processing chamber (e.g., from plasma processing chamber110inFIG.1) by the vacuum pumps of the gas flow system. FIG.4Billustrates an RF-burst waveform4B2, generated using gating waveform4B1. The RF-burst waveform4B2and the gating waveform4B1are same as the respective RF-burst waveform4A2and gating waveform4A1, illustrated inFIG.4A, for illustrative purposes only.FIG.4Balso illustrates a B-DC-burst waveform4B4(and respective gating waveform4B3) used in conjunction with the RF-burst waveform4B2. The burst duration432and burst separation time434(hence the burst period426) of the RF-burst pulse waveform4B2are chosen to be same as those for the B-DC-burst waveform4B4, also for illustrative purposes only. Unlike the example waveforms inFIG.4A, the burst delay442is not zero inFIG.4B. It is noted that, there is no overlap of the B-DC-burst pulses with the RF-burst pulses, as illustrated inFIG.4B. Because there is no overlap of the B-DC-burst pulses with the RF-burst pulses, this example pair of waveform is referred to as out-of-phase burst waveforms. In general, in an out-of-phase burst waveform, the B-DC-burst waveform and the RF source signal are never present simultaneously. Accordingly, the B-DC burst duration is less than or equal to the RF burst separation time and the burst delay is greater than or equal to the RF burst duration and less than or equal to the B-DC-separation time. Consider, for example, the RF source signal having the RF-burst waveform4B2and the bias signal having the B-DC-burst waveform4B4coupled to the top RF electrode114and the bottom RF electrode118, respectively, in the configuration of the plasma processing system100, as illustrated inFIG.1. The burst delay442being greater than the RF-burst duration432, the following sequence of events may occur periodically. Plasma150is ignited at the start of each RF-burst pulse and sustained through the burst duration432, generating ions, free electrons, and radicals. But, in the absence of any bias signal, there are no frequent bursts of very high energy ions bombarding the surface of the substrate, although some ions accelerate through the plasma sheath and strike the surface. However, in the absence of any bias signal, the energy gained by accelerating through the sheath is relatively low. As explained above, the diffusion of radicals and other particle species in the plasma processing chamber110occurs continuously, largely independent of the presence or absence of any bias signal. At the end of the RF-burst pulse, the electron temperature, Te, drops and plasma150extinguishes. Since the burst delay442is greater than the RF-burst duration432, there is a short wait during which there is no RF signal or bias signal. After this short wait, the B-DC-burst pulse starts. Typically, the relaxation times for ions and radicals to reach thermal equilibrium concentrations are relatively long compared to the short wait. So, ions and radicals are present in non-equilibrium concentrations in the plasma processing chamber110during the B-DC-burst duration. A burst of several B-DC pulses at this time may accelerate the ions, the energized ions bombard the substrate, and radicals chemically react with the substrate material and other radicals, forming volatile byproducts. One benefit of accelerating ions when Tehas dropped is that it helps in reducing the random component of the kinetic energy of ions. A reduction in the random component of the kinetic energy of ions (or, equivalently, a drop in ion temperature) reduces the component of ion velocity parallel to the surface of the substrate, thereby bringing the impingement angle closer to the normal to the surface. This results in a narrow spread in the angle distribution of the energetic ions. In other words, more of the high energy ions are directed perpendicular to the surface. A near vertical ion flux help achieve high anisotropy for an RIE process that may be used to form high aspect ratio contact holes, often referred to as HARC etch. The narrow spread in angle is beneficial in avoiding undesirable collisions with sidewalls of deep trenches during a HARC etch process. FIG.4Cillustrates plots of another pair of an RF source signal having an RF-burst waveform4C2generated using a gating waveform4C1in conjunction with a bias signal having a B-DC-burst waveform4C4generated using a gating waveform4C3. For illustrative purposes, except for a burst delay444, all the timing parameters for the waveforms4C1,4C2,4C3, and4C4are set equal to the respective parameters in the respective waveforms inFIGS.4A and4B. InFIG.4C, the burst delay444is greater than zero, and less than or equal to the RF-burst duration432. Thus, a portion of each B-DC-burst pulse overlaps the RF-burst pulse and the remaining duration of B-DC-burst pulse extends beyond the end of the RF-burst pulse. In general, in an overlap burst-waveform, one portion of the B-DC-burst waveform is present during the presence of the RF source signal and the remaining duration of the B-DC waveform is in the absence of the RF source signal. As mentioned above, although the burst delay is greater than zero, it is less than or equal to the RF-burst duration to ensure that there is some overlap. In order to ensure that the B-DC-burst pulse extends into the RF-burst separation time, the burst delay (e.g., burst delay444) is selected such that a sum of the burst delay and the B-DC-burst duration is greater than the RF-burst duration. In order to prevent the B-DC burst waveform to extend beyond the RF burst separation and overlap with the next RF-burst pulse, the burst delay should not exceed the B-DC-burst separation time. Now, consider the sequence of events that take place when the RF source signal (RF-burst waveform4C2) and the bias signal (B-DC-burst waveform4C4) are applied to the top RF electrode116and the bottom RF electrode118, respectively, of the plasma processing chamber110. Plasma150is ignited as the RF-burst pulse starts. Ions, free electrons, and radicals get generated in the absence of any bias signal. During this time, the radicals are diffusing to the substrate but the number of highly energetic ions bombarding the substrate108is low because there is no bias signal to accelerate ions to a very high directed kinetic energy. As illustrated inFIG.4C, at the end of the burst delay444, the B-DC-burst pulse of the bias signal starts. The negative polarity segments of the B-DC pulses accelerate the ions. Energetic ions along with the radicals interact physically and chemically with the substrate producing volatile byproducts. The RF sinusoid and the B-DC pulses are both present till the RF source signal gets blocked at the end of the RF-burst duration432. The presence of the RF source signal maintains the electron temperature, Te, and the ion temperature, Tion, elevated. As soon as the RF source signal turns off, both Teand Tionstarts to drop. As explained above, the random component of ion kinetic energy is undesirable for anisotropic plasma etching, for example, a HARC etch processes. Thus, the duration where the RF source signal is blocked but the bias signal is present provides the advantage of accelerating ions to acquire a very high directed kinetic energy without excessively increasing the random component. Continuation of the B-DC-burst duration beyond the end of the RF-burst pulse, as is illustrated inFIG.4C, allows the etch process to continue during a time when the electron temperature, Te, has dropped. As explained above, this is advantageous for highly anisotropic etching of high aspect ratio trenches (e.g., a HARC etch process). The RF source signal and the bias signal are both blocked in the duration between the end of the B-DC-burst duration and the start of the next RF-burst duration. As described above with reference toFIGS.3B and4A, a time duration when both the RF source and the bias signals are absent may be adjusted to remove volatile byproducts through the exhausts114of the plasma processing chamber110(seeFIG.1). FIGS.5A and5Billustrate two configurations for applying the same bias signal between a first electrode and a second electrode, the bias signal having a B-DC waveform5A1. A difference of a first unipolar DC (U-DC) signal having a first U-DC waveform5B1and a second U-DC signal having a second U-DC waveform5B2may provide a bias signal having a B-DC waveform5A1. InFIGS.5A and5B, the first electrode is the bottom RF electrode118and the second electrode is the top electrode RF116of the plasma processing chamber110. The plasma processing chamber110illustrated inFIGS.5A and5Bis similar to the processing chamber110illustrated inFIG.1. The bottom RF electrode118is included in a substrate holder holding the substrate108. A conductive portion119of the wall of the plasma chamber110is coupled to the reference potential. In the configuration illustrated schematically inFIG.5A, the bottom RF electrode118(the first electrode) is coupled to a bias signal having a B-DC waveform5A1comprising a train of B-DC pulses. The top RF electrode116(the second electrode) is coupled to the reference potential, which is equal to 0 V and indicated as GND. For illustrative purposes the positive bias is +VBV and the negative bias is −VBV, where 0 V is the neutral bias. It is understood that unequal magnitudes may also be used. Each B-DC pulse of the B-DC waveform5A1is similar to the B-DC pulse2A2′ described above with reference toFIG.2A. It is understood that other B-DC pulses such as those similar to2A3or2A4, described with reference toFIG.2A, may also be used. As illustrated inFIG.5A, a B-DC pulse of the B-DC waveform5A1has a negative bias duration512during which the pulse has negative polarity, a positive bias duration514during which the pulse has positive polarity, and a neutral bias duration516during which the pulse has neutral polarity relative to the reference potential. A sum of the three bias durations512,514, and516is a pulse period526of the B-DC pulse of the B-DC waveform5A1. Similar to neutral bias duration216of the B-DC pulse2A2′ inFIG.2A, the neutral bias duration516is a continuous pulse segment, there being no separation between the end of the negative bias duration512and start of the positive bias duration514. In the configuration illustrated schematically inFIG.5B, the bottom RF electrode118is coupled to the first U-DC signal having the first U-DC waveform5B1comprising a train of unipolar pulses of negative polarity. The top RF electrode116is coupled to the second U-DC signal having the second U-DC waveform5B2comprising another train of unipolar pulses also of negative polarity. The pulse width of each U-DC pulse of the first U-DC waveform5B1is selected to be equal to the negative bias duration512and the pulse separation time536is selected such that a sum of the pulse width (the negative bias duration512) and the pulse separation time536is equal to the pulse period526of the B-DC pulse of the B-DC waveform5A1. The pulse width of each U-DC pulse of the second U-DC waveform5B2is selected to be equal to the positive bias duration514and the pulse separation time546is selected such that a sum of the pulse width (the positive bias duration514) and the pulse separation time546is also equal to the pulse period526of the B-DC pulse of the B-DC waveform5A1. It is noted that the B-DC waveform5A1and the first and the second U-DC waveforms5B2and5B3all have equal pulse periods. The first U-DC signal having the first U-DC waveform5B1is synchronized with the second U-DC signal having the second U-DC waveform5B2. The synchronization is achieved by delaying the U-DC pulses of the first U-DC waveform5B1by a constant U-DC delay time544from the U-DC pulses of the second U-DC waveform5B2, as illustrated inFIG.5B. In this example, the constant U-DC delay time544has been selected to be equal to the negative bias duration512of the of the B-DC pulse of the B-DC waveform5A1. This selection matches the timing (or phase) of the difference signal to that of the B-DC waveform5A1. Here, the difference signal is having a difference waveform, where the difference waveform is defined by a difference between the first and the second U-DC waveforms5B1and5B2. The difference waveform exactly matches the B-DC waveform5A1. The exact match results from the particular choice of the constant U-DC delay time544(the choice being the U-DC delay time544inFIG.5Bequal to negative bias duration512inFIG.5A) and because there is no separation between the end of the negative bias duration512and start of the positive bias duration514in the B-DC waveform5A1(the neutral bias duration is a continuous pulse segment). Although the example U-DC waveforms5B1and5B2are of negative polarity, it is understood that the B-DC waveform5A1may also be achieved using a difference between two U-DC waveforms having U-DC pulses of positive polarity. Using the embodiments described in this disclosure, the timing of the pulsed signals may be adjusted and synchronized to tune, for example, plasma properties, the chemical environment, and charging and neutralization of a surface of the substrate with positively charged ions and negatively charged electrons, respectively. The plasma processing methods may be performed using commands from a processor of the plasma processing system including commands sent to a timing controller configured to synchronously adjust the various pulse waveforms of the RF source signal and pulsed B-DC bias signal coupled to electrodes of the plasma processing chamber. Example 1. A method for plasma processing includes: sustaining a plasma in a plasma processing chamber, the plasma processing chamber including a first radio frequency (RF) electrode and a second RF electrode, where sustaining the plasma includes: coupling an RF source signal to the first RF electrode; and coupling a bias signal between the first RF electrode and the second RF electrode, the bias signal having a bipolar DC (B-DC) waveform including a plurality of B-DC pulses, each of the B-DC pulses including: a negative bias duration during which the pulse has negative polarity relative to a reference potential, a positive bias duration during which the pulse has positive polarity relative to the reference potential, and a neutral bias duration during which the pulse has neutral polarity relative to the reference potential. Example 2. The method of example 1, further including coupling a conductive portion of walls of the plasma processing chamber to the reference potential. Example 3. The method of one of examples 1 or 2, further including: coupling the second RF electrode to the reference potential; and coupling the bias signal to the first RF electrode. Example 4. The method of one of examples 1 to 3, further including: coupling the bias signal to the second RF electrode. Example 5. The method of one of examples 1 to 4, where the RF source signal has a continuous wave (CW) RF waveform and the bias signal has a continuous B-DC waveform, the continuous B-DC waveform including a continuous train of B-DC pulses. Example 6. The method of one of examples 1 to 5, where each of the B-DC pulses has a single pulse segment with the neutral polarity relative to the reference potential defined to be the neutral bias duration, the neutral bias duration being continuous in time. Example 7. The method of one of examples 1 to 6, where the neutral bias duration is split into a first neutral bias pulse segment and a second neutral bias pulse segment, the first neutral bias pulse segment separating the end of the negative bias duration from the start of a next positive bias duration, the second neutral bias pulse segment separating the end of the positive bias duration from the start of a next negative bias duration. Example 8. The method of one of examples 1 to 7, where the bias signal has a B-DC-burst waveform including a train of B-DC-burst pulses, where each of the B-DC-burst pulses has a plurality of consecutive B-DC pulses that is present during a B-DC-burst duration followed by a B-DC-burst separation time during which there is no bias signal, a sum of the B-DC-burst duration and the B-DC-burst separation time being defined as a burst period. Example 9. The method of one of examples 1 to 8, where the RF source signal has a continuous wave (CW) RF waveform. Example 10. The method of one of examples 1 to 9, where the RF source signal has an RF-burst waveform including a train of RF-burst pulses, where each of the RF-burst pulses has an RF waveform that is present during an RF-burst duration followed by an RF-burst separation time during which there is no RF source signal; where a sum of the FR-burst duration and the RF-burst separation time is equal to the burst period; and where the method further includes: synchronizing the B-DC-burst waveform with the RF-burst waveform, where the synchronizing is delaying the B-DC-burst pulses by a constant burst delay from the RF-burst pulses. Example 11. The method of one of examples 1 to 10, where the RF-burst duration is greater than or equal to the B-DC-burst duration, and where the burst delay is greater than or equal to zero and less than or equal to a difference between the RF burst duration and the B-DC-burst duration. Example 12. The method of one of examples 1 to 11, where the B-DC burst duration is less than or equal to the RF burst separation time; where the burst delay is greater than or equal to the RF-burst duration and less than or equal to the B-DC-burst separation time. Example 13. The method of one of examples 1 to 12, where the burst delay is greater than zero and less than or equal to the smaller of the RF-burst duration and the B-DC-burst separation time, and where a sum of the burst delay and the B-DC-burst duration is greater than the RF-burst duration. Example 14. A system for plasma processing including: a plasma processing chamber including: a first radio frequency (RF) electrode; a second RF electrode; and a substrate holder configured to hold a semiconductor substrate in the plasma processing chamber; a processor; a non-transitory memory storing a program to be executed in the processor, the program including: instructions to couple an RF source signal to the first RF electrode; and instructions to couple a bias signal between the first RF electrode and the second RF electrode, the bias signal having a bipolar DC (B-DC) waveform including a plurality of B-DC pulses, each of the B-DC pulses including: a negative bias duration during which the pulse has negative polarity relative to a reference potential, a positive bias duration during which the pulse has positive polarity relative to the reference potential, and a neutral bias duration during which the pulse has neutral polarity relative to the reference potential. Example 15. The system of example 14, further including: a continuous wave (CW) RF source signal source; a programmable continuous B-DC bias signal source; a programmable first chopper coupled to the CW-RF source signal source; a programmable second chopper coupled to the continuous B-DC bias signal source; and a timing controller coupled to the continuous B-DC bias signal source, the first chopper, and the second chopper, where the timing controller is configured to receive commands from the processor which, when executed, synchronously controls an output signal of the first chopper, an output signal of the second chopper and, and an output signal of the continuous B-DC bias signal source. Example 16. The system of one of examples 14 or 15, where a configuration of the system includes: the first RF electrode coupled to the output signal from the first chopper and the output signal from the second chopper; and the second RF electrode coupled to the reference potential. Example 17. The system of one of examples 14 to 16, where a configuration of the system includes: the first RF electrode coupled to the output signal from the first chopper; and the second RF electrode coupled to the output signal from the second chopper. Example 18. A method for plasma processing includes: sustaining a plasma in a plasma processing chamber, the plasma processing chamber including a first radio frequency (RF) electrode and a second RF electrode, where sustaining the plasma includes: coupling an RF source signal to the first RF electrode; and coupling a bias signal between the first RF electrode and the second RF electrode, the bias signal having a bipolar DC (B-DC) waveform being a difference of a first unipolar DC (U-DC) waveform and a second unipolar DC waveform, the polarity of the first U-DC waveform being same as the polarity of the second U-DC waveform, and where coupling the bias signal includes: coupling a first U-DC signal to the first RF electrode, the first U-DC signal having the first U-DC waveform including a first plurality of U-DC pulses, where each of the first plurality of U-DC pulses includes: a first U-DC pulse width during which the pulse has a first bias polarity relative to a reference potential; and a first U-DC pulse separation time during which the pulse has a neutral bias polarity substantially equal to the reference potential; coupling a second U-DC signal to the second RF electrode, the second U-DC signal having the second U-DC waveform including a second plurality of U-DC pulses, where each of the second plurality of U-DC pulses includes: a second U-DC pulse width during which the pulse has the first bias polarity relative to the reference potential and; a second U-DC pulse separation time during which the pulse has a neutral bias polarity substantially equal to the reference potential; and synchronizing the first U-DC signal with the second U-DC signal, where the synchronizing is delaying the U-DC pulses of the first U-DC signal by a constant U-DC delay time from the U-DC pulses of the second U-DC signal. Example 19. The method of example 18, further including coupling a conductive portion of a wall of the plasma processing chamber to the reference potential. Example 20. The method of one of examples 18 or 19, where the first bias polarity is a positive bias polarity relative to the reference potential. While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments. | 63,495 |
11942308 | DETAILED DESCRIPTION Embodiments of the present disclosure will be described below with reference to the accompanying drawings. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent to one of ordinary skill in the art that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, systems, and components have not been described in detail so as not to unnecessarily obscure aspects of the various embodiments. <Film Forming Apparatus to which Microwave Plasma Processing Apparatus is Applied> First, an example of a film forming apparatus to which a microwave plasma processing apparatus according to an embodiment of the present disclosure is applied will be described. The film forming apparatus is a PE-ALD apparatus which forms a predetermined film by a plasma enhanced atomic layer deposition (PE-ALD) of alternately supplying a precursor gas and a reaction gas and plasmarizing the reaction gas. FIG.1is a transversal cross-sectional view of the film forming apparatus according to the present embodiment,FIG.2is a vertical cross-sectional view of the film forming apparatus ofFIG.1, taken along line A-A′, andFIG.3is a plan view of the example film forming apparatus according to the present embodiment. As shown inFIGS.1to3, the film forming apparatus includes a processing container11which defines a processing chamber in which a film forming process is performed and which is kept at a vacuum. A rotary table2having a plurality of wafer mounting regions21formed therein is disposed inside the processing container11. In a space defined above a portion of the processing container11through which the rotary table2passes, there are formed an adsorption region R1in which a precursor gas, for example, a Si precursor gas such as dichlorosilane (DCS; SiH2Cl2), is adsorbed onto a wafer W, and a reaction region R2in which a reaction process of reacting the precursor gas adsorbed onto the wafer W with a reaction gas to cause a predetermined reaction, for example, a nitridation process or reduction process, is performed. A precursor gas introduction unit3for introducing the precursor gas into the adsorption region R1is installed above the adsorption region R1in the processing container11. A precursor gas supply source (not shown) is connected to the precursor gas introduction unit3via a pipe. In addition, the precursor gas introduction unit3has an exhaust region (not shown) through which the precursor gas is exhausted and a separation gas supply region (not shown) through which a separation gas composed of an inert gas such as an Ar gas is supplied to separate the precursor gas from the reaction gas in the reaction region R2. The exhaust region and the separation gas supply region are formed at an outer peripheral portion of the precursor gas introduction unit3. Further, a processing gas for performing a plasma-based reaction process is supplied from a processing gas supply source (not shown inFIGS.1to3) into the reaction region R2via a pipe. Examples of the processing gas may include a plasma generation gas such as an Ar gas, and a reaction gas which reacts with the precursor gas, for example, a nitriding gas such as a NH3gas or a N2gas. The reaction region R2is divided into a first region R2-1, a second region R2-2and a third region R2-3in which microwave plasma processing apparatuses100A,100B and100C are respectively installed. The microwave plasma processing apparatuses100A,100B and100C include microwave plasma sources6A,6B, and6C, respectively. The configuration of the microwave plasma processing apparatus100B including the microwave plasma source6B is shown inFIG.2, which will be described in detail later. As shown inFIG.2, the processing container11is a substantially circular flat container composed of a container body13constituting a side wall and bottom portion of the processing container11, and a ceiling plate12for air-tightly closing an opening formed in an upper surface of the container body13. The processing container11is made of, for example, metal such as aluminum. An inner surface of the processing container11is subjected to a plasma-resistant process such as an anodizing process or ceramic thermal spray process. A surface of the rotary table2is subjected to a plasma-resistant process as in the processing container11. A rotary shaft14extending vertically downward is installed at the central portion of the rotary table2. A rotation driving mechanism15for rotating the rotary table2is installed at the lower end of the rotary shaft14. As shown inFIG.1, six wafer mounting regions21are formed in the upper surface of the rotary table2at regular intervals in the circumferential direction. Each of the wafer mounting regions21is configured as a circular recess having a diameter slightly larger than that of the wafer W. The number of wafer mounting regions21is not limited to six. As shown inFIG.2, an annular groove45is formed along the circumferential direction of the rotary table2in the bottom surface of the container body13positioned below the rotary table2. A heater46is installed inside the annular groove45so as to correspond to the arrangement zone of the wafer mounting regions21. The wafer W mounted on the rotary table2is heated to a predetermined temperature by the heater46. For example, a carbon wire heater may be used as the heater46. Further, an opening formed above the annular groove45is closed by a heater cover47which is an annular plate member. As shown inFIGS.1and3, a loading/unloading port101through which the wafer W is loaded and unloaded, is installed in the lateral wall surface of the processing container11. The loading/unloading port101can be opened and closed by a gate valve. The wafer W held by an external transfer mechanism is loaded into the processing container11through the loading/unloading port101. In the rotary table2configured as above, when the rotary table2is rotated by the rotary shaft14, each of the wafer mounting regions21revolves around the rotational center. At that time, the wafer mounting regions21pass through an annular revolution region RAindicated by a dash-dotted line. As shown inFIG.1, the film forming apparatus has an overall control part8. The overall control unit8is configured to control respective components of the film forming apparatus, for example, the rotation driving mechanism15for rotating the rotary table2, the precursor gas supply part, the separation gas supply part, the nitriding gas supply part, respective elements of a microwave generation part69of the microwave plasma sources6A to6C, and so on. The overall control part8includes a CPU (computer) and is composed of a main control part that controls overall functionality, an input device, an output device, a display device and a storage device. A storage medium which stores programs for controlling processes to be executed by the film forming apparatus, namely processing recipes, is set in the storage device. The main control part calls a predetermined processing recipe stored in the storage medium and controls the film forming apparatus to perform a predetermined process based on the called processing recipe. <Microwave Plasma Processing Apparatus> Next, the microwave plasma processing apparatuses in the reaction region R2will be described. As described above, the reaction region R2has the first to third regions R2-1to R2-3where the microwave plasma processing apparatuses100A,100B and100C having the respective microwave plasma sources6A,6B and6C are respectively installed. FIG.4is a cross-sectional view showing the microwave plasma processing apparatus100A. The microwave plasma processing apparatuses100B and100C are essentially identical in configuration with the microwave plasma processing apparatus100A. As shown inFIG.4, the microwave plasma processing apparatus100A includes the microwave plasma source6A, a processing space S defined immediately under the microwave plasma source6A inside the processing container11, a processing gas supply mechanism50for supplying a processing gas into the processing space S, the above-described rotary table2as a support member for supporting the wafer W inside the processing space S, and an exhaust mechanism57for exhausting the interior of the processing space S. The wafer W mounted on the rotary table2passes through the processing space S. The microwave plasma source6A includes the microwave generation part69, a waveguide67which propagates a microwave generated by the microwave generation part69, a mode converter66, a coaxial waveguide65, and an antenna part60which receives the microwave propagating through the coaxial waveguide65and emits the microwave toward the processing space S. Therefore, the microwave plasma processing apparatus100A is configured as an RLSA® microwave plasma processing apparatus. The antenna part60is provided so as to close a substantially triangular opening formed in the ceiling plate12which faces the upper surface of the rotary table2. The microwave generation part69includes an oscillator, a power supply and the like, and generates a microwave having a frequency of, for example, 2.45 GHz. One end of the waveguide67is connected to the microwave generation part69and the other end thereof is connected to the mode converter66which is a connection portion between the waveguide67and the coaxial waveguide65. The coaxial waveguide65extends downward from the mode converter66. The antenna part60is connected to a lower end of the coaxial waveguide65. The frequency of the microwave generation part69is not limited to 2.45 GHz but may be various frequencies such as 8.35 GHz, 1.98 GHz, 860 MHz, 915 MHz, or the like. The waveguide67has a rectangular sectional shape into which the microwave generated by the microwave generation part69propagates in a TE mode. In the mode converter66, the vibration mode of the microwave is converted from the TE mode to a TEM mode. The microwave of the TEM mode propagates through the coaxial waveguide65and is guided to the antenna part60. A tuner68and a detector85composed of a directional coupler and the like is installed in the waveguide67. The tuner68is used to match the impedance of plasma as an internal load of the processing space S with the characteristic impedance of the power supply of the microwave generation part69. The detector85detects a traveling wave and a reflection wave. The antenna part60includes a microwave-transmitting plate61, a slot antenna62, a slow-wave member63and a cooling jacket64having a shielding function and through which a cooling medium such as ethylene glycol flows from a chiller unit. The coaxial waveguide65has an inner conductor651and an outer conductor652installed in a coaxial relationship with the inner conductor651. The inner conductor651has a water cooling path. The coaxial waveguide65is cooled by water flowing through the water cooling path of the inner conductor651and the cooling medium such as ethylene glycol flowing through the cooling jacket64. The inner conductor651is inserted into a hole portion71extending from the upper portion of the cooling jacket64of the antenna part60to the slot antenna62and is connected to the slot antenna62via a connector70. A lower portion of the connector is covered with a cap72. The outer conductor652is attached to the cooling jacket64. The slot antenna62is formed of a substantially triangular metal plate and has a number of slots621formed therein. The slots621may be appropriately set so that the microwave can be efficiently radiated. For example, the slots621are arranged at predetermined intervals in the radial direction from the center of the triangle toward the periphery and in the circumferential direction. Further, adjacent slots621are formed so as to intersect with each other or be orthogonal to each other. The microwave-transmitting plate61, which is made of a dielectric material, for example, ceramics such as alumina or quartz, has a function of transmitting the microwave which is transmitted from the coaxial waveguide65and radiated from the slots621of the slot antenna62, and supplying the microwave to the processing space S to generate surface wave plasma at a position immediately under the microwave-transmitting plate61in the processing space S. The microwave-transmitting plate61has a substantially triangular planar shape capable of blocking an opening formed at the side of the ceiling plate12. An annular concave portion611having a tapered surface formed therein to stably generate plasma by concentrating the energy of the microwave is formed in a lower surface of the microwave-transmitting plate61. The lower surface of the microwave-transmitting plate61may have a planar shape. The slow-wave member63is installed on the slot antenna62and is made of a dielectric material having a dielectric constant higher than a vacuum, for example, ceramics such as alumina. The slow-wave member63is provided to shorten the wavelength of the microwave and has a substantially triangular planar shape corresponding to the microwave-transmitting plate61and the slot antenna62. The cooling jacket64is installed on the slow-wave member63and includes a refrigerant flow path641formed therein. The cooling jacket64is configured to cool the antenna part60by circulating a refrigerant through the refrigerant flow path641. The microwave generated by the microwave generation part69is radiated from the slots621of the slot antenna62via the waveguide67, the mode converter66, the coaxial waveguide65and the slow-wave member63and is supplied through the microwave-transmitting plate61into the processing space S defined under the microwave-transmitting plate61. The processing gas supply mechanism50includes a processing gas supply source51, a pipe52extending from the processing gas supply source51, a peripheral-side gas supply path53formed in the periphery of a portion of the ceiling plate12supporting the microwave-transmitting plate61, and a central-side gas supply path54formed in the center of the portion of the ceiling plate12supporting the microwave-transmitting plate61. The peripheral-side gas supply path53is opened in the upper surface of the ceiling plate12. A leading end of the peripheral-side gas supply path53forms a gas discharge port53athrough which a processing gas is discharged from the peripheral side into the processing space S. The central-side gas supply path54is also opened in the upper surface of the ceiling plate12. A leading end of the central-side gas supply path54forms a gas discharge port54athrough which the processing gas is discharged from the central side into the processing space S. The peripheral-side gas supply path53is formed at a plurality of locations, for example, two locations, at intervals so that the processing gas can be discharged from the plurality of locations at the peripheral side. The pipe52is connected to the openings of the peripheral-side gas supply path53and the central-side gas supply path54. A flow rate controller such as a mass flow controller and an opening/closing valve (all not shown) are installed in the pipe52. When a plurality of processing gases is used, a plurality of processing gas supply sources51may be installed corresponding to the number of processing gases. Pipes may be respectively connected to the plurality of processing gas supply sources51. A flow rate controller and an opening/closing valve may be installed in each of the pipes Examples of the processing gas may include a plasma generation gas such as an Ar gas, a reaction gas reacting with a precursor gas, for example, a nitriding gas such as a NH3gas or a N2gas. When the processing gas is supplied into the processing space S into which the microwave is supplied, microwave plasma is generated and active species of the nitriding gas, for example, NH3radicals (NH3*), is generated as the reaction gas. As the wafer W mounted on the rotary table2passes through the processing space S, the wafer W is subjected to processing by the active species. Alternatively, instead of the nitriding gas, a reducing gas such as a H2gas may be supplied as the reactive gas to perform a reduction process with hydrogen radicals. In some embodiments, a separate gas supply line may be provided to supply the plasma generation gas as the processing gas to a position immediately under the microwave-transmitting plate61. In some embodiments, in the microwave plasma processing apparatuses100A,100B and100C, the same reaction gas may be supplied to perform the same process. For example, a nitriding gas may be supplied to perform a plasma nitriding process as the same process. Alternatively, the same reaction gas may be supplied to perform different processes. For example, a nitriding process may be performed in the microwave plasma processing apparatus100B positioned at the central side, and other processes such as a reducing process may be performed in the microwave plasma processing apparatuses100A and100C. As shown inFIG.1, the exhaust mechanism57for exhausting the processing space in the reaction region R2exhausts the interior of the processing container11through four exhaust ports190A,190B,190C and190D provided at regular intervals in the outer edge portion of the bottom of the container body13of the processing container11. As shown in an enlarged scale inFIG.5, a hole651ais vertically formed in the inner conductor651and the connector70of the coaxial waveguide65. A thermocouple80serving as a temperature detector is inserted into the hole651a. A temperature measurement part80aof the thermocouple80is positioned in a portion corresponding to the connector70and the cap72, which are near the slot antenna62. In some embodiments, the thermocouple80may be installed in a microwave propagation path leading to the slot antenna62, specifically at another position of the inner conductor651of the coaxial waveguide65inside the antenna part60. In some embodiments, the thermocouple80may be installed at a plurality of locations in the microwave propagation path. A sheathed thermocouple, an optical fiber type thermocouple or the like can be suitably used as the thermocouple80serving as the temperature detector. A signal line80bof the thermocouple80is connected to an abnormality detection part81. A temperature signal obtained by the thermocouple80is inputted to the abnormality detection part81. The abnormality detection part81monitors the temperature signal of the thermocouple80and determines the presence or absence of abnormality based on the temperature signal. Specifically, a predetermined detection temperature threshold value is set in the abnormality detection part81. If a detected temperature exceeds the predetermined threshold value, the abnormality detection part81determines that an abnormality has occurred, and issues a command for ensuring the safety of the members in the microwave propagation path. In this embodiment, a first threshold value for a predetermined temperature and a second threshold value higher than the first threshold value are set in the abnormality detection part81. When the temperature signal provided from the thermocouple80exceeds the first threshold value, the abnormality detection part81outputs a warning generation signal to a warning generation part82so that the warning generation part82issues a warning. When the temperature signal provided from the thermocouple80exceeds the second threshold value, the abnormality detection part81outputs an alarm generation signal to the alarm generation part83so that the alarm generation part83issues an alarm. Further, the abnormality detection part81outputs a plasma generation stop signal to the overall control part8so that the overall control part8performs a plasma stop operation (recipe abort). For example, a step in the process recipe is changed to a step in which plasma is not generated. Further, the abnormality detection part81has a function of: receiving signals of a traveling wave and a reflection wave from the detector85, which is composed of a directional coupler and is capable of detecting the traveling wave and the reflection wave; receiving a position of the tuner68(for example, a slug position in case of a slug tuner) from the tuner68; detecting a ratio of the reflection wave to the traveling wave and the position of the tuner68(for example, the slug position in the case of a slug tuner) as detection/adjustment parameters; and outputting a plasma generation stop signal to the overall control part8when respective parameter values exceed a threshold value. Such a function is similar to the related art. <Operation of Film Forming Apparatus> Next, the operation of the film forming apparatus configured as above will be described. In performing the PE-ALD film forming process using the film forming apparatus, first, the gate valve of the loading/unloading port101is opened and a plurality of wafers W is loaded into the processing container11by an external transfer mechanism. The plurality of wafers W is mounted on the wafer mounting regions21of the rotary table2, respectively. The wafers W are transferred while intermittently rotating the rotary table2and are mounted on the respective wafer mounting regions21. Upon completing the mounting of the wafers W, the transfer mechanism is retracted and the gate valve of the loading/unloading port101is closed. At this time, the interior of the processing container11is evacuated to have a predetermined pressure by the exhaust mechanism57in advance. For example, an Ar gas is supplied as a separation gas. Subsequently, the wafers W mounted on the rotary table2are heated at a predetermined set temperature by the heater46based on a detected value of a temperature sensor (not shown). A precursor gas is supplied into the adsorption region R1inside the processing container11, a processing gas including a reaction gas is supplied into the microwave plasma processing apparatuses100A,100B and100C provided in the regions R2-1, R2-2and R2-3of the reaction region R2, and a microwave is supplied from the microwave plasma sources6A to6C. The rotary table2is rotated clockwise at a predetermined speed so that the adsorption of the precursor gas and a plasma-based reaction process are alternately repeated with respect to the wafers W. Thus, a predetermined film is formed by PE-ALD. For example, when a Si precursor gas such as dichlorosilane (DCS; SiH2Cl2) is used as the precursor gas and a nitriding gas such as a NH3gas is used as the reaction gas, the adsorption of Si precursor and the reaction process based on active species of plasmarized nitriding gas are alternately repeated to form a SiN film. At this time, as described above, in the microwave plasma processing apparatuses100A,100B and100C, the same reaction gas may be supplied to perform the same process. For example, a nitriding gas may be supplied to perform a plasma nitriding process as the same process. Alternatively, the same reaction gas may be supplied to perform different processes. For example, a nitriding process may be performed in the microwave plasma processing apparatus100B positioned at the central side and another process such as a reducing process may be performed in the microwave plasma processing apparatuses100A and100C. In addition to the reaction gas, a plasma generation gas such as an Ar gas may be used as the processing gas. A similar process is performed in these apparatuses regardless of which processing gas is used. Hereinafter, the operation of the microwave plasma processing apparatus100A shown inFIG.4will be described on behalf of the microwave plasma processing apparatuses100A,100B and100C. The processing gas including the reaction gas is introduced into the processing space S from the processing gas supply source51of the processing gas supply mechanism50via the pipe52, the peripheral-side gas supply path53and the central-side gas supply path54, and a microwave is introduced into the processing space S to generate microwave plasma. More specifically, a microwave of predetermined power generated by the microwave generation part69propagates through the waveguide67in a TE mode. The TE mode of the microwave is converted to a TEM mode by the mode converter66. The microwave of the TEM mode propagates through the coaxial waveguide65and is radiated into the processing space S via the slow-wave member63, the slots621of the slot antenna62, and the microwave-transmitting plate61. The microwave spreads as a surface wave only in a region immediately under the microwave-transmitting plate61to generate microwave plasma as surface wave plasma. Then, the plasma diffuses downward to become plasma with high electron density and low electron temperature in the arrangement region of the wafers W. At this time, if an ignition failure occurs in the microwave plasma processing apparatuses100A,100B and100C, damage to the members constituting the antenna part60, damage to the wafers being processed, and downtime for restoring the apparatuses may occur. Therefore, there is a need for safety measures to monitor the ignition failure. The microwave plasma processing apparatuses100A,100B and100C of the present embodiment are mounted in the same film forming apparatus as that of the above-described related art and are arranged adjacent each other. This may cause a problem of the occurrence of erroneous detection, and makes it difficult to apply a light emitting sensor as a safety measure to monitor an ignition failure due to problems such as a space restrictions and the size of carbon wire heaters. Accordingly, no light emitting sensor is used. Conventionally, as the safety measure in the case of using no light emitting sensor, a threshold value of a parameter (for example, a ratio of a reflection wave to a travelling wave, a position of a tuner that performs impedance matching, etc.) detected and adjusted inside a microwave plasma source is merely monitored. However, when no light emitting sensor is used only with monitoring of the threshold value, in the case where unexpected matching occurs in an antenna part or micro-discharge occurs in a microwave propagation path, an abnormality may not appear in a parameter detected and adjusted inside the microwave plasma source, which makes it difficult to find an ignition failure beforehand. Therefore, as a result of investigations and studies by the present inventors, it has been found that an abnormality does not appear only when monitoring the threshold value, matching of a microwave at an unexpected place in the antenna part and micro-discharge in the microwave propagation path leading to the slot antenna62increases the resistance at a connection portion of the members of the microwave propagation path, which raises the temperature. Due to such a temperature rise, abnormal discharge is likely to occur, which results in an ignition failure. In view of the forgoing, the temperature rise in the microwave propagation path can be regarded as an indicator of ignition failure. Thus, the ignition failure can be predicted in advance by detecting the temperature of the microwave propagation path leading to the slot antenna62. In addition, it has been found that a sector at which the temperature is likely to rise is portions corresponding to the antenna part60of the microwave propagation path, namely portions of the inner conductor651of the coaxial waveguide65, the connector70and the cap72under the connector70, specifically in the vicinity of the connector70and the cap72, more specifically in the vicinity of the cap72. It has also been found that, in the case where the microwave plasma processing apparatuses are applied to a long-time process like the ALD process of this embodiment, when unexpected matching occurs in the antenna part or micro-discharge occurs, a high-temperature state continues and abnormal discharge occurs, which results in an ignition failure. Therefore, in the present embodiment, the thermocouple80serving as a temperature detector is inserted into the hole651aformed in the inner conductor651of the coaxial waveguide65and the connector70, the temperature measurement part80ais located at a portion corresponding to the connector70and the cap72which is in the vicinity of the slot antenna62to detect the temperature of the portion, and the temperature signal is inputted to the abnormality detection part81. The abnormality detection part81determines the presence or absence of abnormality based on the temperature signal. Specifically, a predetermined threshold value of the temperature is set in the abnormality detection part81. If the temperature exceeds the predetermined threshold value, the abnormality detection part81issues a command for ensuring safety. In this embodiment, a first threshold value of a predetermined temperature and a second threshold value higher than the first threshold value are set in the abnormality detection part81. If the temperature signal provided from the thermocouple80exceeds the first threshold value, the abnormality detection part81outputs a warning generation signal to the warning generation part82so that the warning generation part82issues a warning. If the temperature signal provided from the thermocouple80exceeds the second threshold value, the abnormality detection part81outputs an alarm generation signal to the alarm generation part83so that the alarm generation part83issues an alarm. Further, the abnormality detection part81outputs a plasma generation stop signal to the overall control part8so that the overall control part8stops the generation of plasma. In the step of issuing the warning when the temperature exceeds the first threshold value, the process is continued and the maintenance such as replacement of the members is performed after the completion of the process. As described above, the present inventors focused on the fact that the temperature of the members of the microwave propagation path rises when matching occurs at unexpected places due to contact failure or the like, or light discharge occurs. Thus, it is possible to prevent an ignition failure from being generated in advance by monitoring the temperature of the microwave propagation path, specifically the temperature of the members of the antenna section60, which are more likely to rise in temperature, more specifically the temperature in the vicinity of the connector70and the cap72, which are likely to rise in temperature. As has been done other techniques, the abnormality detection unit81detects the ratio of the travelling wave to the refection wave based on the detected value of the detector85and the position of the tuner68(for example, a slug position in case of a slug tuner) as detection/adjustment parameters, and outputs the plasma generation stop signal to the overall control part8when the parameter values exceed a threshold value. As a result, it is possible to take appropriate safety measures as in the other techniques. Experimental Example Next, experiment examples will be described. Here, as in the above-described embodiment, in a film forming apparatus in which three microwave plasma processing apparatuses are provided adjacent each other, plasma was actually generated by the three microwave plasma processing apparatuses and an experiment was conducted to measure the temperature of a microwave propagation path. Conditions at that time were as follows. 1. Specifications of Processing ContainerTemperature of processing container: 475 degrees C.Pressure of processing container: 2 Torr 2. Specifications of Antenna PartTemperature of antenna part: 80 degrees C. (chiller control)Temperature of water cooling in inner conductor: 25 degrees C. (room temperature)Pressure of coaxial waveguide: atmospheric pressure 3. Process ConditionsType of gas used: Ar/NH3/H2Microwave power: 2.5 kW, 3 kW 4. Temperature Monitoring ThresholdAbnormality warning (first threshold): over 150 degrees C., 2 sec or moreAbnormality alarm (second threshold): over 300 degrees C., 2 sec or more Under these conditions, plasma was generated by the three microwave plasma processing apparatuses and temperatures of cap portions of antenna parts Ant-1, Ant-2 and Ant-3 were measured. The results are shown inFIG.6. As shown inFIG.6, when the microwave power is 2.5 kW, the temperature of the cap portion in any of the antenna parts was 150 degrees C. or less, which is a warning threshold value. However, when the microwave power is 3 kW, the temperature of the cap portion in the antenna part Ant-2 was 162.7 degrees C. exceeding 150 degrees C. As a result of continuing to use the antenna part Ant-2, abnormal discharge occurred in a coaxial waveguide at a later date, resulting in an ignition failure. The present inventors have disassembled and checked the antenna part Ant-2 and have found that discharge traces were observed in such a manner to face each other at the outer side of the inner conductor and the inner side of the outer conductor in the coaxial waveguide. From these results, it was confirmed that an ignition failure can be predicted in advance by measuring the temperature of the microwave propagation path, specifically the temperature of the cap portion under the coaxial waveguide. <Other Applications> Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the above embodiments but various modifications can be made without departing from the spirit of the present disclosure. For example, while in the above-described embodiments, descriptions have been made on the case where the present disclosure is applied to a plurality of microwave plasma processing apparatuses provided in a PE-ALD film forming apparatus, the present disclosure is not limited thereto but may be applied to other microwave plasma processing apparatuses. In addition, while in the above-described embodiments, a thermocouple has been described to be used as a temperature detector, the temperature detector is not limited thereto but may be any temperature sensor known in the art, such as an optical fiber sensor. However, in a case where the temperature detector is covered with metal, such as a sheathed thermocouple, care should be taken not to interfere with microwave propagation by installing the temperature detector in a closed space. There is a case where a portion to be temperature-measured is heated to 100 to 1,000 degrees C. In this case, a material having heat resistance adapted for the heating temperature may be used as a material of the temperature detector. Furthermore, while in the above-described embodiments, the temperature detector has been described to be installed at a portion corresponding to the connector and the cap, the present disclosure is not limited thereto. For example, the temperature detector may be installed at another position in the coaxial waveguide. However, it is desirable that a temperature detection position is a position away from a water cooling portion. In a case where an abnormal discharge risk arises in the coaxial waveguide due to the configuration of the antenna part, the temperature detection position may be on the microwave propagation path other than the coaxial waveguide. According to the present disclosure in some embodiments, in a microwave propagation path leading to a slot antenna, it is possible to detect the rise in temperature when matching or light discharge at an unexpected place due to contact failure or the like, thus preventing an ignition failure in advance. While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosures. Indeed, the embodiments described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the disclosures. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosures. | 36,329 |
11942309 | DETAILED DESCRIPTION The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments. Preliminary note: the flowcharts and block diagrams in the following Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments. In this regard, some blocks in these flowcharts or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions. For the purposes of this disclosure, source generators are those whose energy is primarily directed to generating and sustaining the plasma, while “bias supplies” are those whose energy is primarily directed to generating a surface potential for attracting ions and electrons from the plasma. Described herein are several embodiments of novel bias supplies that may be used to apply a periodic voltage function to a substrate support in a plasma processing chamber. Referring first toFIG.1, shown is an exemplary plasma processing environment (e.g., deposition or etch system) in which bias supplies may be utilized. The plasma processing environment may include many pieces of equipment coupled directly and indirectly to a plasma processing chamber101, within which a volume containing a plasma102and workpiece103(e.g., a wafer) and electrodes104(which may be embedded in a substrate support) are contained. The equipment may include vacuum handling and gas delivery equipment (not shown), one or more bias supplies108, one or more source generators112, and one or more source matching networks113. In many applications, power from a single source generator112is connected to one or multiple source electrodes105. The source generator112may be a higher frequency RF generator (e.g., 13.56 MHz to 120 MHz). The electrode105generically represents what may be implemented with an inductively coupled plasma (ICP) source, a dual capacitively-coupled plasma source (CCP) having a secondary top electrode biased at another RF frequency, a helicon plasma source, a microwave plasma source, a magnetron, or some other independently operated source of plasma energy. In variations of the system depicted inFIG.1, the source generator112and source matching network113may be replaced by, or augmented with, a remote plasma source. And other variations of the system may include only a single bias supply108. While the following disclosure generally refers to plasma-based wafer processing, implementations can include any substrate processing within a plasma chamber. In some instances, objects other than a substrate can be processed using the systems, methods, and apparatus herein disclosed. In other words, this disclosure applies to plasma processing of any object within a sub-atmospheric plasma processing chamber to affect a surface change, subsurface change, deposition or removal by physical or chemical means. Referring toFIG.2, shown is an exemplary bias supply208that may be utilized to implement the bias supplies108described with reference toFIG.1. The bias supply208generally represents many variations of bias supplies described further herein with reference toFIGS.4A,4B,4C,4D,4E,4F, and4Gto apply a periodic voltage function. Thus, reference to the bias supply208generally refers to the bias supply208depicted inFIG.2and the bias supplies408A to408G described further herein. As shown, the bias supply208includes an output210(also referred to as an output node210), a return node212, a resonant switch section220and a power section230, and the resonant switch section220is coupled to the power section230at three nodes: a first node214, a second node216, and a third node218. In general, the bias supply208functions to apply a periodic voltage function between the output node210and the return node212. Current delivered to a load through the output node210is returned to the bias supply208through the return node212that may be common with the load. In many implementations as disclosed further herein, the resonant switch section220is configured to enable a first current pathway between the first node214and the second node216to be periodically connected and disconnected, which results in an application of periodic voltage waveform between the output node210and the return node212. For example, the resonant switch section220may comprise a controllable switch and one or more inductive elements arranged to provide the first current pathway between the first node214and the second node216and a second current pathway between the second node216and the third node218. In addition, the first current pathway and the second current pathway may be configured so that current in the first and second current pathways is unidirectional. As described further herein, the power section230may include a combination of one or more voltage sources and inductive elements. Although not depicted inFIG.2for clarity and simplicity, the bias supply208may be coupled to a controller and/or include a controller that is coupled to the resonant switch section220and or the power section230. Variations of each of the resonant switch section220and the power section230, and details of the interoperation of the resonant switch section220with the power section230, are disclosed further herein, but first, it is helpful to understand aspects of a plasma load. Referring briefly toFIG.3, shown is a schematic drawing that electrically depicts aspects of an exemplary plasma load within the plasma processing chamber101. As shown, the plasma processing chamber101may be represented by a chuck capacitance Cch(that includes a capacitance of a chuck and workpiece103) that is positioned between an input310(also referred to as an input node310) to the plasma processing chamber101and a node representing a sheath voltage, Vs, at a surface of the workpiece103(also referred to as substrate103). In addition, a return node312(which may be a connection to ground) is depicted. The plasma102in the processing chamber is represented by a parallel combination of a sheath capacitance Cs, a diode, and a current source. The diode represents the non-linear, diode-like nature of the plasma sheath that results in rectification of the applied AC field, such that a direct-current (DC) voltage drop, appears between the workpiece103and the plasma102. Referring toFIGS.4A,4B,4C,4D,4E,4F, and4G, shown are bias supplies408A,408B,408C,408D,408E,408F,408G, respectively, that may be utilized to realize the bias supply208, and hence, bias supplies408A to408G may be utilized as the bias supplies108depicted inFIG.1. As shown, each of the bias supplies408A to408G comprises a resonant switch section220in connection with variations of the power section230that comprise one or more voltage sources and inductors arranged in a variety of topologies. More specifically, in each ofFIGS.4A,4B,4C,4D,4E,4F, and4G, the depicted voltage sources, inductors, and interconnections between the voltage sources and inductors make up variations of the power section230. As shown, each of the bias supplies is configured to apply a periodic voltage comprising: an output node210and a return node212, and each of the bias supplies comprises a resonant switch section220that is coupled to a power section at a first node214, a second node216, and a third node218. The power section of each of the bias supplies408A,408B,408C,408D,408E,408F,408G varies from other ones of the bias supplies, but each of the bias supplies408A,408B,408C,408D,408E,408F,408G comprises a first voltage source222coupled between the third node218and the first node214and a second voltage source224coupled to the return node212. As discussed further herein switching action of the resonant switch section220results in an application of the periodic voltage between the output node210and the return node212. In the variation depicted inFIG.4A, a first inductor. Lb, is positioned between the second node216and a negative terminal of the second voltage source224. In addition, an inductance, Lext, is positioned between the second node216and the output node210. The inductance, Lext, may be a stray inductance or an intentionally added inductor. In the variations depicted inFIGS.4B,4C,4D, and4F, the first inductor, Lb, is positioned between the output node210and the second voltage source224. It is also noted that, in the variations depicted inFIGS.4B,4C,4D, and4F, the second node216and the output node210are a common node so that the first inductor, Lb, is positioned between the second node216and the second voltage source224. As shown inFIGS.4B,4C,4D, and4F, the first inductor, Lb, is coupled between the output node210and a negative terminal of the second voltage source224. In the variations ofFIGS.4B and4C, the return node212is a connection point between the first inductor, Lb, and the second voltage source.224In the variations depicted inFIGS.4A,4D, and4E, the positive node of the second voltage source224is coupled to the return node212, and in the variations depicted inFIGS.4B and4C, a negative terminal of the second voltage source224is coupled to the return node. The bias supplies408D,408E depicted inFIGS.4D and4Edepict variations that comprise a third voltage source226where a negative terminal of the third voltage source226is connected to the return node212. In the variation ofFIG.4D, a positive terminal of the third voltage source226is connected to the third node218and the negative terminal of the first voltage source226, and in the variation ofFIG.4E, a positive terminal of the of the third voltage source226is connected to the third node218and the negative terminal of the third voltage source226is coupled to the negative terminal of the first voltage source222. In the example bias supply408D, the third voltage source226adds a DC compensation voltage, which may be used to adjust a chucking force applied by an electrostatic chuck within the plasma processing chamber101. In some modes of operation, the total voltage applied by second voltage source224and the third voltage source226is set to a constant value so that the voltage applied by the second voltage source224is decreased when the voltage applied by the third voltage source226is increased. Referring next toFIG.4F, shown is another example bias supply408F that may be used to implement the bias supply208. As shown, a transformer444is used to apply power to the output node210of the bias supply. The transformer444includes a primary winding (represented by Llp and Lp) and a secondary winding (represented by Lls and Ls). A first node680of the primary winding of the transformer444is coupled to the second node216. A first node682of the secondary winding of the transformer444is coupled to the output node210. And a second node684of the secondary winding of the transformer444is coupled to a secondary-side return node612on the secondary side of the transformer444. The first voltage source222is coupled between the first node214and the third node218of the resonant switch section220. The second voltage source224is coupled between a second node686of the primary winding of the transformer444and the return node212. The bias supply408G shown inFIG.4Gis the same as the bias supply shown inFIG.4Gexcept that an offset-voltage-source, Voffset, is coupled between the second node684of the secondary winding of the transformer444and the secondary-side return node612. More specifically, a positive terminal of the offset-voltage-source, Voffset, is coupled to the secondary-side return node612and a negative terminal offset-voltage-source, Voffset, is coupled to the second node684of the transformer444. Referring next toFIGS.5A,5B, and5C, shown are variations of the resonant switch section220. As shown, the resonant switch section520A,520B,520C comprises the first node214, the second node216, and the third node218, and each of the variations comprises a first current pathway (for current iS1), between the first node214and the second node216. The first current pathway comprises a series combination of a switch, S1, and a diode, D1. In addition, each of the variations of the resonant switch section520A,520B,520C comprises second current pathway (for current iD2), (between the first current pathway and the third node218), which comprises a second diode, D2, and an inductive element, L2. As shown, the resonant switch section520A,520B,520C also comprises driver-controller circuitry223that is coupled to the switch, S1, via a drive signal line544. It should be recognized that each of the diode, D1, and the diode, D2, may be realized by a plurality of diodes. For example, either diode, D1, and/or diode, D2, may be realized by a plurality of series-connected diodes (to enhance voltage capability). Or either diode, D1, and/or diode, D2, may be realized by a plurality of diodes arranged in parallel (to enhance current capability). In the resonant switch section520A the first current pathway comprises a series combination of the switch, S1, an inductive element, L1, and the diode, D1, arranged between the first node214and the second node216. It should be recognized that (because the switch, S1, the diode, D1, and the inductor, L1are arranged in series), the order in which the switch, S1, the diode D1, and the inductor, L1are positioned (between the first node214and the second node216) may vary. In the resonant switch section520B the first current pathway comprises the switch, S1, arranged in series with the diode, D1, and the series combination of the switch, S1, and the diode, D1, is coupled between the first node214and a fourth node221. In addition, the second current path (for iD2) comprises a series combination of the inductor, L2, and the diode, D2, between the fourth node221and the third node218. In addition, the resonant switch section520B comprises an inductor, L3, between the fourth node221and the second node216. Referring toFIG.5C, the resonant switch section520C is similar to the resonant switch section520B except the first current pathway comprises a series combination of the switch, S1, inductive element, L1, and the diode, D1, arranged between the first node214and the fourth node221. It should be recognized that (because the switch, S1, the diode, D1, and the inductor, L1are arranged in series), the order in which the switch, S1, the diode D1, and the inductor, L1are positioned (between the first node214and the fourth node216) may vary. In many implementations, the switch, S1is realized by a field-effect switch such as metal-oxide semiconductor field-effect transistors (MOSFETS), and in some implementations, the switch, S1, is realized by silicon carbide metal-oxide semiconductor field-effect transistors (SiC MOSFETs) or gallium nitride metal-oxide semiconductor field-effect transistors (GaN MOSFETs). As another example, the switch, S1, may be realized by an insulated gate bipolar transistor (IGBT). In these implementations, the driver-controller circuitry223may comprise an electrical driver known in the art that is configured to apply power signals to the switch, S1, via drive signal line544responsive to signals from a controller. It is also contemplated that the controller may be capable of applying a sufficient level of power so that a separate electrical driver may be omitted. It is also contemplated that the drive signal line544may be an optical line to convey optical switching signals. And the switch, S1, may switch in response to the optical signal and/or optical signals that are converted to an electrical drive signal. It should be recognized that the switch, S1, generally represents one or more switches that are capable of closing and opening to connect and disconnect, respectively, the first current pathway between the first node214and the second node216. For example, the switch, S1, may be realized by a plurality of switches arranged is series (for enhanced voltage capability). Or the switch, S1, may be realized by a plurality of switches arranged is parallel (for enhanced current capability). In these variations, one of ordinary skill in the art will recognize that each switch may be synchronously driven by a corresponding drive signal. Referring next toFIGS.6A and6B, shown are graphs depicting operational aspects of the variations of the bias supply208disclosed herein to achieve an asymmetrical periodic voltage between the output node210and the return node212of the bias supply208during a full cycle of an asymmetric periodic voltage, Vo, from the time t0to the time t3. More specifically,FIG.6Adepicts operational aspects of the bias supply208when a voltage (Vrail) of the first voltage source222is less than or equal to zero. AndFIG.6Bdepicts operational aspects of the bias supply208when the voltage (Vrail) of the first voltage source222is greater than zero. Also depicted inFIGS.6A and6Bis a sheath voltage, Vs, that corresponds to the asymmetrical periodic voltage. As shown, the asymmetric periodic voltage achieves a sheath voltage, Vs, that is generally negative to attract ions to impact a surface of the workpiece to enable etching of the workpiece103. As shown inFIG.6A, when the switch, S1, is closed at a time t0, the current pathway (comprising the switch, S1, and diode, D1) connects the first node214to the second node216and unidirectional current, iS1, begins to increase from zero current at the time, t0, and the asymmetrical periodic voltage, V0, (relative to the return node212) applied at the output node210begins to move (over a first portion651of the of the periodic voltage waveform) from a first negative voltage652to a positive peak voltage656. As shown, the current, iS1, increases to a peak value654and then decreases to zero at a time, t1, when the switch, S1, is opened. As depicted, when the switch, S1, is opened, the current, iS1, through the first current pathway drops to zero and the asymmetric periodic voltage drops from the positive peak voltage656. As shown, when the switch, S1, is opened, (during a second portion653of the asymmetrical waveform) unidirectional current, iD2, begins to flow through the second current pathway through the second diode, D2, peaks, and then drops to zero current flow, from time t1to a time t2. As shown, the rise and fall of the unidirectional current, iD2, occurs while the asymmetrical periodic voltage changes (during the second portion653) from the positive peak voltage656to a third. negative, voltage level658. As depicted, during the time from t0to t2, the first portion651of the asymmetric periodic voltage causes the sheath voltage to approach a positive voltage to repel positive charges (that accumulate on the surface of the workpiece while the surface of the workpiece is held at a negative voltage), and the second portion653of the asymmetric periodic voltage causes the sheath voltage to become a desired negative voltage (or range of voltages) to achieve an ion flux that achieves a desired ion energy670. As depicted, after the unidirectional current, iD2, rises and falls back to a level of zero current, the asymmetrical periodic voltage, V0, becomes more negative (as a negative voltage ramp) during a fourth portion661until the switch, S1, is closed again at a time t3. As depicted, a compensation iLb, produced by the second voltage source224, may be provided during a cycle of the asymmetric periodic voltage to compensate for ion current in the plasma chamber101. For example, without the compensation current, iLb, that sheath voltage, Vs, may gradually change to become more positive during the fourth portion of the asymmetric periodic voltage, which creates a broader distribution of ion energies, which may be undesirable. But in some variations, the compensation current, iLb, may intentionally be set to overcompensate or undercompensate for ion current in the plasma chamber101to create a broader distribution of ion energies. In the modes of operation depicted inFIGS.6A and6B, the compensation current, iLb, provides a sheath voltage, Vs, that is substantially constant during the fourth portion661of the asymmetrical periodic voltage, Vo. As shown inFIG.6B, when the voltage, Vrail, from the first voltage source222is greater than zero, the operational aspects of the bias supply208are similar to the operational aspects of the bias supply208when the voltage, Vrail, from the first voltage source222is less than zero except the current, iD2, increases in a ramp-like manner while the switch, S1, is closed so that the current iD2is non-zero when the switch, S1is opened at the time, t1. The methods described in connection with the embodiments disclosed herein may be embodied directly in hardware, in processor-executable code encoded in a non-transitory tangible processor readable storage medium, or in a combination of the two. Referring toFIG.7for example, shown is a block diagram depicting physical components that may be utilized to realize control aspects disclosed herein. As shown, in this embodiment a display1312and nonvolatile memory1320are coupled to a bus1322that is also coupled to random access memory (“RAM”)1324, a processing portion (which includes N processing components)1326, a field programmable gate array (FPGA)1327, and a transceiver component1328that includes N transceivers. Although the components depicted inFIG.7represent physical components,FIG.7is not intended to be a detailed hardware diagram; thus, many of the components depicted inFIG.7may be realized by common constructs or distributed among additional physical components. Moreover, it is contemplated that other existing and yet-to-be developed physical components and architectures may be utilized to implement the functional components described with reference toFIG.7. This display1312generally operates to provide a user interface for a user, and in several implementations, the display is realized by a touchscreen display. In general, the nonvolatile memory1320is non-transitory memory that functions to store (e.g., persistently store) data and processor-executable code (including executable code that is associated with effectuating the methods described herein). In some embodiments for example, the nonvolatile memory1320includes bootloader code, operating system code, file system code, and non-transitory processor-executable code to facilitate the execution of a method of biasing a substrate with the single controlled switch. In many implementations, the nonvolatile memory1320is realized by flash memory (e.g., NAND or ONENAND memory), but it is contemplated that other memory types may be utilized as well. Although it may be possible to execute the code from the nonvolatile memory1320, the executable code in the nonvolatile memory is typically loaded into RAM1324and executed by one or more of the N processing components in the processing portion1326. The N processing components in connection with RAM1324generally operate to execute the instructions stored in nonvolatile memory1320to enable execution of the algorithms and functions disclosed herein. It should be recognized that several algorithms are disclosed herein, but some of these algorithms are not represented in flowcharts. Processor-executable code to effectuate methods described herein may be persistently stored in nonvolatile memory1320and executed by the N processing components in connection with RAM1324. As one of ordinarily skill in the art will appreciate, the processing portion1326may include a video processor, digital signal processor (DSP), micro-controller, graphics processing unit (GPU), or other hardware processing components or combinations of hardware and software processing components (e.g., an FPGA or an FPGA including digital logic processing portions). In addition, or in the alternative, non-transitory FPGA-configuration-instructions may be persistently stored in nonvolatile memory1320and accessed (e.g., during boot up) to configure a field programmable gate array (FPGA) to implement the algorithms disclosed herein. The input component1330may receive signals (e.g., signals indicative of current and voltage obtained at the output of the disclosed bias supplies). In addition, the input component1330may receive phase information and/or a synchronization signal between bias supplies108and source generator112that are indicative of one or more aspects of an environment within a plasma processing chamber101and/or synchronized control between a source generator and the single switch bias supply. The signals received at the input component may include, for example, synchronization signals, power control signals to the various generators and power supply units, or control signals from a user interface. Those of ordinary skill in the art will readily appreciate that any of a variety of types of sensors such as, without limitation, directional couplers and voltage-current (VI) sensors, may be used to sample power parameters, such as voltage and current, and that the signals indicative of the power parameters may be generated in the analog domain and converted to the digital domain. The output component generally operates to provide one or more analog or digital signals to effectuate the opening and closing of the switch, S1. The output component may also control of the voltage sources described herein. The depicted transceiver component1328includes N transceiver chains, which may be used for communicating with external devices via wireless or wireline networks. Each of the N transceiver chains may represent a transceiver associated with a particular communication scheme (e.g., WiFi, Ethernet, Profibus, etc.). As will be appreciated by one skilled in the art, aspects of the present disclosure may be embodied as a system, method or computer program product. Accordingly, aspects of the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, aspects of the present disclosure may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon. As used herein, the recitation of “at least one of A, B or C” is intended to mean “either A, B, C or any combination of A, B and C.” The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. | 27,948 |
11942310 | DESCRIPTION OF EMBODIMENTS <Base Technology> (Basic Configuration) FIG.7is an explanatory view illustrating the basic configuration of an active gas generation apparatus that is a base technology of the present invention.FIG.7illustrates an XYZ orthogonal coordinate system. A gas generation apparatus200of the base technology is an active gas generation apparatus that generates an active gas7(nitrogen radical or the like) obtained by activating a raw material gas5(nitrogen gas or the like) supplied to a discharge space6. The gas generation apparatus200includes, as the main components, a metal housing31, a gas supply port32, an active gas generation electrode group201, and an orifice part40. The metal housing31is a housing for the metal gas generation apparatus200set to the ground potential, and the gas supply port32is attached to an upper portion, so that the raw material gas5is supplied from the gas supply port32to an in-housing space33in the metal housing31. The active gas generation electrode group201is arranged in the in-housing space33in the metal housing31of the gas generation apparatus200. Specifically, the active gas generation electrode group201is arranged on the bottom surface of the metal housing31. The orifice part40is incorporated in part of the bottom surface of the metal housing31. The active gas generation electrode group201includes a combination of a high-voltage application electrode unit1that is a first electrode component and a ground potential electrode unit2that is a second electrode component, the ground potential electrode unit2being provided below the high-voltage application electrode unit1. The high-voltage application electrode unit1includes, as the main components, an electrode dielectric film11that is a first electrode dielectric film and an electrode conductive film10that is a first metal electrode formed on the upper surface of the electrode dielectric film11. The high-voltage application electrode unit1is formed, independently of the electrode conductive film10, on the upper surface of the electrode dielectric film11, and further has a metal auxiliary conductive film12having conductivity. The auxiliary conductive film12is provided between at least one gas ejection hole25and the metal electrode conductive film10in plan view. The metal auxiliary conductive film12may overlap at least the one gas ejection hole25in plan view. The electrode conductive film10and the auxiliary conductive film12are provided on the upper surface of the electrode dielectric film11by using, for example, a sputtering method or a printing-firing method. The ground potential electrode unit2includes, as the main components, an electrode dielectric film21that is a second electrode dielectric film and an electrode conductive film20that is a second metal electrode formed on the lower surface of the electrode dielectric film21. The electrode conductive film20that is made of metal and has conductivity is provided on the lower surface of the electrode dielectric film21by using a sputtering method, a printing-firing method, or the like. The electrode dielectric film11of the high-voltage application electrode unit1and the electrode dielectric film21of the ground potential electrode unit2are installed such that a predetermined constant interval is provided therebetween by a non-illustrated spacer or the like. Then, an AC voltage is applied between the electrode conductive film10and the electrode conductive film20from a high-frequency power supply9. Specifically, an AC voltage is applied to the electrode conductive film10from the high-frequency power supply9, and the electrode conductive film20and the auxiliary conductive film12are set to the ground potential via the metal housing31to which the ground potential is applied. In the dielectric space in which the electrode dielectric film11and the electrode dielectric film21face each other, the discharge space6is provided to include an area where the electrode conductive films10and20overlap each other in plan view. The upper surface of the electrode dielectric film11and the lower surface of the electrode dielectric film21may be flat, or may have a predetermined shape. For example, the upper surface of the electrode dielectric film11may have an uneven shape that serves as an obstacle that prevents creeping discharge from occurring between the electrode conductive film10and the auxiliary conductive film12. The electrode dielectric film21has at least one gas ejection hole25for finally ejecting the active gas7to an external processing space63. The orifice part40is provided below the electrode dielectric film21, and has at least one through hole49corresponding to the at least one gas ejection hole25. The orifice part40is made of one of ceramic, glass, and sapphire. In the gas generation apparatus200having such a configuration, a dielectric barrier discharge is generated in the discharge space6of the active gas generation electrode group201by applying an AC voltage between the electrode conductive films10and20from the high-frequency power supply9. At the same time, the raw material gas5is supplied from the gas supply port32into the in-housing space33of the metal housing31, so that the raw material gas5is made flow from the outer periphery to the inside of the active gas generation electrode group201. Then, the active gas7is generated in the gas generation apparatus200with the raw material gas5in the discharge space6activated, and the generated active gas7flows through an active gas flow path that is a path leading to the at least one gas ejection hole25from the discharge space6in the dielectric space. The active gas7flowing through the active gas flow path is finally supplied to the subsequent processing space63along a gas flow15via the at least one gas ejection hole25and the through hole49of the orifice part40. In the gas generation apparatus200of the base technology, the auxiliary conductive film12is provided to overlap part of the active gas flow path in plan view, as described above. (Effects of Base Technology) As described above, the gas generation apparatus200of the base technology has the following characteristic (1) and characteristic (2). (1) The auxiliary conductive film12is provided to overlap part of the active gas flow path in plan view. (2) The auxiliary conductive film12is set to the ground potential. Since the gas generation apparatus200of the present embodiment has the characteristic (1) and characteristic (2), the electric field strength in the active gas flow path can be released by the auxiliary conductive film12that is an auxiliary conductive film set to the ground potential. As a result, the gas generation apparatus200of the present embodiment has an effect in which the electric field strength in the processing space63provided after (below) the orifice part40can be intentionally weakened without changing the structure of the orifice part40. (Problem of Base Technology) The active gas7to be generated in the gas generation apparatus200of the above-described base technology is generated by a dielectric barrier discharge in the discharge space6between the high-voltage application electrode unit1and the ground potential electrode unit2of a parallel plate type. This active gas7is supplied to the subsequent processing space63as a gas necessary for semiconductor manufacturing. However, the active gas7has a property in which it is unstable and decays in time, that is, deactivates over time, as described above. Examples of the active gas7generated in the discharge space6can include, for example, nitrogen atoms obtained by dissociating a nitrogen molecule gas by electric discharge. The above-described nitrogen atoms disappear due to collision with other gas molecules. That is, the active gas7generated in the discharge space6deactivates (disappears) over time, and hence it is necessary that after the active gas7is generated, the active gas7is quickly supplied to a space in which the active gas7is used, that is, to the processing space63. In the gas generation apparatus200of the base technology, however, the active gas flow path always exists in the dielectric space due to the provision of the auxiliary conductive film12for exhibiting the above effects. The active gas flow path can be shortened by shortening the distance between the electrode conductive film10and the auxiliary conductive film12. However, it is necessary to provide the auxiliary conductive film12so as to overlap the active gas flow path in plan view, and hence there is a limit to shortening of the active gas flow path. As described above, the time during which the active gas7passes through the active gas flow path cannot be sufficiently shortened in the base technology, and hence a problem in which the active gas7deactivates when passing through the active gas flow path cannot be solved. Purposes of a first embodiment and a second embodiment described below are to provide an active gas generation apparatus that can: solve the above-described problem of the base technology; intentionally weaken the electric field strength in a processing space provided after (below) the apparatus; and minimize the deactivation amount of an active gas. First Embodiment (Basic Configuration) FIG.1is an explanatory view illustrating the basic configuration of an active gas generation apparatus101according to a first embodiment of the present invention.FIG.1illustrates an XYZ orthogonal coordinate system. The active gas generation apparatus101of the first embodiment is an active gas generation apparatus that generates an active gas7obtained by activating a raw material gas5supplied to a discharge space6. The active gas generation apparatus101includes, as the main components, a metal housing31and an active gas generation electrode group51. The metal housing31that is made of metal and has conductivity is a housing for the metal active gas generation apparatus101set to the ground potential, and a non-illustrated gas supply port is attached thereto, so that the raw material gas5is supplied from the gas supply port to an in-housing space33of the metal housing31. The metal housing31has a central protrusion31athat partially protrudes upward (+Z direction) such that an active gas passage space31sfor the active gas7is formed in the central area of the bottom. The active gas passage space31spenetrates part of the bottom surface of the metal housing31, and the central protrusion31ais provided around the active gas passage space31s. An active gas generation electrode group51is arranged in the in-housing space33that is a raw material gas supply space in the metal housing31in the active gas generation apparatus101. Specifically, the active gas generation electrode group51is arranged on the central protrusion31aincluding the active gas passage space31sof the metal housing31. The active gas generation electrode group51includes a combination of a high-voltage application electrode unit1that is a first electrode component and a ground potential electrode unit2that is a second electrode component, the ground potential electrode unit2being provided below the high-voltage application electrode unit1. The high-voltage application electrode unit1includes, as the main components, an electrode dielectric film11that is a first electrode dielectric film and an electrode conductive film10that is a first metal electrode formed on the upper surface of the electrode dielectric film11. The high-voltage application electrode unit1further has an auxiliary conductive film12formed, independently of the electrode conductive film10, on the upper surface of the electrode dielectric film11, similarly to the base technology illustrated inFIG.7. The auxiliary conductive film12that is made of metal and has conductivity is provided so as to overlap a gas ejection hole23in plan view. The electrode conductive film10and the auxiliary conductive film12are provided on the upper surface of the electrode dielectric film11by using, for example, a sputtering method or a printing-firing method. The ground potential electrode unit2includes, as the main components, an electrode dielectric film21that is a second electrode dielectric film and an electrode conductive film20that is a second metal electrode formed on the lower surface of the electrode dielectric film21. The active gas generation electrode group51is supported by the central protrusion31aof the metal housing31in such a manner that the electrode conductive film20of the ground potential electrode unit2contacts the upper surface of the central protrusion31a. The electrode conductive film20is provided on the lower surface of the electrode dielectric film21by using a sputtering method, a printing-firing method, or the like. The electrode dielectric film11of the high-voltage application electrode unit1and the electrode dielectric film21of the ground potential electrode unit2are installed such that a predetermined constant interval is provided therebetween by a non-illustrated spacer or the like. This constant interval becomes the gap length of the discharge space6. Then, an AC voltage is applied between the electrode conductive film10and the electrode conductive film20from a high-frequency power supply9. Specifically, an AC voltage is applied from the high-frequency power supply9to the electrode conductive film10, and the metal housing31is set to the ground potential. Additionally, the electrode conductive film20and the auxiliary conductive film12are also set to the ground potential. The electrode conductive film20is set to the ground potential via the metal housing31, and the auxiliary conductive film12is set to the ground potential via the metal housing31or other connection means. In the dielectric space in which the electrode dielectric film11and the electrode dielectric film21face each other, the discharge space6is provided to include an area where the electrode conductive films10and20overlap each other in plan view. The upper surface of the electrode dielectric film11and the lower surface of the electrode dielectric film21may be flat, or may have a predetermined shape. For example, the upper surface of the electrode dielectric film11may have an uneven shape that serves as an obstacle that prevents creeping discharge from occurring between the electrode conductive film10and the auxiliary conductive film12. The electrode dielectric film21has the gas ejection hole23for ejecting the active gas7into the subsequent (lower) processing space63. The active gas passage space31sprovided on the bottom surface of the metal housing31is provided to be located below the gas ejection hole23. Therefore, the active gas7, which has been ejected from the gas ejection hole23via a gas ejection opening65described later, passes through the active gas passage space31sand is supplied to the subsequent (lower) processing space63. In the active gas generation apparatus101having the above-described configuration, the active gas7is generated by activating the raw material gas5in the discharge space6in which a dielectric barrier discharge is generated, and the generated active gas7flows through an active gas flow path that is a path from the discharge space6to the gas ejection hole23in the dielectric space. The ground potential electrode unit2further includes an active gas auxiliary member60provided on the upper surface of the electrode dielectric film21so as to fill part of the active gas flow path. The active gas auxiliary member60has the gas ejection opening65located above the gas ejection hole23. The gas ejection opening65is provided to penetrate the active gas auxiliary member60along the height direction (Z direction) at the center of the active gas auxiliary member60, the gas ejection opening65becoming part of the active gas flow path. The formation height of the active gas auxiliary member60is set to be lower than the distance (gap length) between the electrode dielectric films11and21. Therefore, a little gap (hereinafter, sometimes abbreviated as an “active gas flow gap”) is provided between the upper surface of the active gas auxiliary member60and the lower surface of the electrode dielectric film11of the high-voltage application electrode unit1. As described above, in the active gas generation apparatus101of the first embodiment, the active gas auxiliary member60provided on the upper surface of the electrode dielectric film21fills part of the active gas flow path in the dielectric space, and limits at least part of the active gas flow path to the narrow active gas flow gap. In the active gas generation apparatus101having such a configuration, a dielectric barrier discharge is generated in the discharge space6of the active gas generation electrode group51by applying an AC voltage between the electrode conductive films10and20. At the same time, the raw material gas5is supplied from a non-illustrated gas supply port into the in-housing space33of the metal housing31, so that the raw material gas5is made flow from the outer periphery to the inside of the active gas generation electrode group51. The in-housing space33serves as a raw material gas supply space for supplying the raw material gas5. Then, the active gas7is generated in the active gas generation apparatus101by activating the raw material gas5in the discharge space6, and the generated active gas7flows through the active gas flow path. At this time, the space volume of the active gas flow path is greatly reduced by such an extent that part of the active gas flow gap is filled with the active gas auxiliary member60. The active gas7, which has passed through the active gas flow gap, passes through the gas ejection opening65, the gas ejection hole23, and the active gas passage space31s, and is finally supplied to the subsequent processing space63along the gas flow15. The active gas generation apparatus101has a first characteristic in which: the auxiliary conductive film12to be provided on the upper surface of the electrode dielectric film11is provided to overlap part of the active gas flow path in plan view; and the auxiliary conductive film12is set to the ground potential. Additionally, the ground potential electrode unit2of the active gas generation apparatus101has a second characteristic in which the ground potential electrode unit2includes the active gas auxiliary member60that fills part of the active gas flow path between the discharge space6and the gas ejection hole23in the dielectric space in order to limit to the active gas flow gap. Since the active gas generation apparatus101of the first embodiment has the first characteristic, the electric field strength in the active gas flow path can be released by the auxiliary conductive film12set to the ground potential. Further, the active gas generation apparatus101of the first embodiment has the second characteristic, and hence the space volume of the active gas flow path is reduced by such an extent that the part of the active gas flow path is filled with the active gas auxiliary member60, so that the time during which the active gas7passes through the active gas flow path can be shortened to such an extent that the active gas7does not deactivate. As a result, the active gas generation apparatus101of the first embodiment has effects in which: the electric field strength in the active gas flow path can be released; and the deactivation amount of the active gas passing through the active gas flow path can be minimized. Furthermore, the active gas flow gap formed on the upper surface of the active gas auxiliary member60can be provided with an orifice function by sufficiently narrowing the active gas flow gap, that is, by sufficiently shortening the length in the height direction (Z direction) of the active gas flow gap. By providing an orifice function to the active gas flow gap, a pressure difference can be created between the processing space63after (below) the active gas generation apparatus101and the discharge space6, whereby the pressure in the processing space63can be sufficiently reduced. At this time, the processing space63is set to a sufficiently low electric field strength, and hence dielectric breakdown can be prevented even in the processing space63under a relatively low pressure environment. Additionally, it is not necessary to provide the orifice part40after the gas ejection hole23, as in the base technology illustrated inFIG.7. As specific configurations for achieving the basic configuration of the active gas generation apparatus101of the first embodiment illustrated inFIG.1, a first aspect and a second aspect described below can be considered. (First Aspect) FIG.2is an explanatory view schematically illustrating the entire configuration of an active gas generation electrode group51A of the first aspect in the active gas generation apparatus101of the first embodiment.FIG.2illustrates an XYZ orthogonal coordinate system. The first aspect of the active gas generation apparatus101adopts the active gas generation electrode group51A illustrated inFIG.2, as the active gas generation electrode group51in the basic configuration illustrated inFIG.1. As illustrated inFIG.2, the active gas generation electrode group51A includes a combination of a high-voltage application electrode unit1A that is a first electrode component and a ground potential electrode unit2A that is a second electrode component. The ground potential electrode unit2A is provided below the high-voltage application electrode unit1A. As illustrated inFIG.2, the active gas generation electrode group51A adopts a parallel plate type. The high-voltage application electrode unit1A includes, as the main components, an electrode dielectric film11A that is a first electrode dielectric film and an electrode conductive film10A that is a first metal electrode formed on the upper surface of the electrode dielectric film11A. The high-voltage application electrode unit1A further has an auxiliary conductive film12A formed, independently of the electrode conductive film10A, on the upper surface of the electrode dielectric film11A. As illustrated inFIG.2, the electrode dielectric film11A is formed in a disk shape (cylindrical shape), that is, in a circular shape in plan view, the electrode conductive film10A is formed in an annular shape in plan view, and the auxiliary conductive film12A is formed in a disk shape. The auxiliary conductive film12A is arranged on the central portion of the electrode dielectric film11A so as to overlap a gas ejection hole23A in plan view. The electrode conductive film10A is arranged at a predetermined distance from the outer periphery of the auxiliary conductive film12A so as to surround the periphery of the auxiliary conductive film12A. On the other hand, the ground potential electrode unit2A has, as the main components, an electrode dielectric film21A that is a second electrode dielectric film and an electrode conductive film20A that is a second metal electrode formed on the lower surface of the electrode dielectric film21A. In the dielectric space in which the electrode dielectric film11A and the electrode dielectric film21A face each other, a discharge space6is provided to include an area where the electrode conductive films10A and20A overlap each other in plan view. The electrode dielectric film21A has, in its central portion, a single gas ejection hole23A that is used for ejecting the active gas7to the external processing space63and penetrates the electrode dielectric film21A. The gas ejection hole23A corresponds to the gas ejection hole23in the basic configuration illustrated inFIG.1. The electrode dielectric film21A is formed in a disk shape, the electrode conductive film20A is formed in an annular shape in plan view, and the single gas ejection hole23A is formed in a circular shape in plan view. The gas ejection hole23A is provided at the center of the electrode dielectric film21A in plan view. In the ground potential electrode unit2A, an active gas auxiliary member60A is provided on the upper surface of the electrode dielectric film21A so as to fill part of the active gas flow path, as illustrated inFIG.2. The active gas auxiliary member60A has a gas ejection opening65A located above the gas ejection hole23A. The gas ejection opening65A is provided from the upper surface to the lower surface of the active gas auxiliary member60A so as to penetrate the center of the active gas auxiliary member60A, the gas ejection opening65A becoming part of the active gas flow path. The formation height of the active gas auxiliary member60A is set to be lower than the distance (gap length) between the electrode dielectric films11A and21A. Therefore, the active gas flow gap is provided between the upper surface of the active gas auxiliary member60A and the lower surface of the electrode dielectric film11A of the high-voltage application electrode unit1A. As described above, the active gas auxiliary member60A of the first aspect of the first embodiment fills part of the active gas flow path between the discharge space6and the gas ejection hole23A in the dielectric space in order to limit at least part of the active gas flow path to the narrow active gas flow gap. As described above, the active gas auxiliary member60A has the gas ejection opening65A at its center, and is formed in a disk shape including the gas ejection opening65A. That is, the gas ejection opening65A is provided so as to almost completely overlap the single gas ejection hole23A in plan view. Therefore, the active gas auxiliary member60A is formed in an annular shape in plan view. As described above, the ground potential electrode unit2A of the first aspect of the active gas generation apparatus101further includes the active gas auxiliary member60A that fills part of the active gas flow path in the dielectric space between the electrode dielectric films11A and21A in order to limit at least part of the active gas flow path to the active gas flow gap. The electrode conductive film20A is arranged in an annular shape so as to surround the active gas auxiliary member60A in plan view and so as to be along the outer periphery of the active gas auxiliary member60A in plan view. In the first aspect having the above-described configuration, a path from the discharge space6to the single gas ejection hole23A in the dielectric space formed between the electrode dielectric films11A and21A is defined as the active gas flow path. As illustrated inFIG.2, the auxiliary conductive film12A is arranged at a position where the auxiliary conductive film12A overlaps the gas ejection hole23A in plan view. That is, the auxiliary conductive film12A is arranged to overlap at least part of the active gas flow path in plan view. And, an AC voltage is applied between the electrode conductive film10A and the electrode conductive film20A from the high-frequency power supply9. Specifically, an AC voltage is applied to the electrode conductive film10A from the high-frequency power supply9, and the metal housing31is set to the ground potential. Additionally, the electrode conductive film20A and the auxiliary conductive film12A are also set to the ground potential. The electrode conductive film20A is set to the ground potential via the metal housing31, and the auxiliary conductive film12A is set to the ground potential via the metal housing31or other connection means. As described above, the first aspect of the active gas generation apparatus101has a characteristic in which: the auxiliary conductive film12A is provided to overlap part of the active gas flow path in plan view; and the auxiliary conductive film12A is set to the ground potential. That is, the first aspect of the first embodiment has the first characteristic, similarly to the basic configuration of the first embodiment. The first aspect of the active gas generation apparatus101having such a configuration generates a dielectric barrier discharge in the discharge space6of the active gas generation electrode group51A by applying an AC voltage between the electrode conductive films10A and20A. At the same time, the first aspect of the active gas generation apparatus101supplies the raw material gas5from a non-illustrated gas supply port into the in-housing space33of the metal housing31, so that the raw material gas5is made flow as the gas flow15going in the direction from the outer periphery to the single gas ejection hole23A of the active gas generation electrode group51A. In the first aspect of the active gas generation apparatus101, the active gas7is then generated by activating the raw material gas5in the discharge space6, and the generated active gas7flows through the active gas flow path that is a path from the discharge space6to the single gas ejection hole23A in the dielectric space. At this time, the space volume of the active gas flow path is greatly reduced by such an extent that the part of the active gas flow path is filled with the active gas auxiliary member60A. The active gas7, which has passed through the active gas flow gap, passes through the gas ejection opening65A, the gas ejection hole23A, and the active gas passage space31s, and is finally supplied to the subsequent processing space63along the gas flow15. In the first aspect of the first embodiment, an orifice function can be provided to the active gas flow gap formed on the upper surface of the active gas auxiliary member60A by sufficiently narrowing the active gas flow gap, similarly to the basic configuration of the first embodiment. In the first aspect of the first embodiment, a pressure difference is created between the processing space63after (below) the active gas generation apparatus101and the discharge space6by providing an orifice function to the active gas flow gap, whereby the pressure in the processing space63can be sufficiently reduced. (Second Aspect) FIG.3is an explanatory view schematically illustrating the entire structure of an active gas generation electrode group51B of a second aspect of the active gas generation apparatus101of the first embodiment.FIG.3illustrates an XYZ orthogonal coordinate system. The second aspect of the active gas generation apparatus101adopts the active gas generation electrode group51B illustrated inFIG.3, as the active gas generation electrode group51in the basic configuration illustrated inFIG.1. Hereinafter, the active gas generation electrode group51B of the second aspect will be described with appropriate reference toFIG.3. As illustrated inFIG.3, the active gas generation electrode group51B includes a combination of a high-voltage application electrode unit1B that is a first electrode component and a ground potential electrode unit2B that is a second electrode component. The ground potential electrode unit2B is provided below the high-voltage application electrode unit1B. As illustrated inFIG.3, the active gas generation electrode group51B adopts a parallel plate type. The high-voltage application electrode unit1B includes, as the main components, an electrode dielectric film11B that is a first electrode dielectric film and an electrode conductive film pair10H and10L that are first metal electrodes formed on the upper surface of the electrode dielectric film11B. The high-voltage application electrode unit1B further has an auxiliary conductive film12B formed, independently of the electrode conductive film pair10H and10L, on the upper surface of the electrode dielectric film11B. As illustrated inFIG.3, the electrode dielectric film11B is formed in a rectangular shape having a long side in the X direction in plan view, each of the electrode conductive film pair10H and10L is formed in a rectangular shape having a long side in the Y direction in plan view, and the auxiliary conductive film12B is formed in a rectangular shape having a long side in the Y direction in plan view. The auxiliary conductive film12B is arranged, in plan view, on the center in the X direction of the electrode dielectric film11B. The electrode conductive film pair10H and10L are arranged at a predetermined distance from the auxiliary conductive film12B so as to sandwich the auxiliary conductive film12B. That is, the electrode conductive film10H is arranged on the left side (−X direction side) of the auxiliary conductive film12B, while the electrode conductive film10L is arranged on the right side (+X direction side) of the auxiliary conductive film12B. On the other hand, the ground potential electrode unit2B includes, as the main components, an electrode dielectric film21B that is a second electrode dielectric film and an electrode conductive film pair20H and20L that are second metal electrodes formed on the lower surface of the electrode dielectric film21B. In the dielectric space in which the electrode dielectric film11B and the electrode dielectric film21B face each other, a discharge space6is provided to include an area where the electrode conductive films10H and10L and the electrode conductive films20H and20L respectively overlap each other in plan view. As illustrated inFIG.3, the electrode dielectric film21B is formed in a rectangular shape having a long side in the X direction in plan view. The electrode dielectric film21B has a single gas ejection hole23B for ejecting an active gas7into an external processing space63, the gas ejection hole23B penetrating the electrode dielectric film21B. The single gas ejection hole23B corresponds to the gas ejection hole23in the basic configuration illustrated inFIG.1. The single gas ejection hole23B is formed in a rectangular shape having a long side in the Y direction in plan view. The electrode dielectric film21B is formed in a rectangular shape having a long side in the X direction in plan view, each of the electrode conductive films20H and20L is formed in a rectangular shape having a long side in the Y direction in plan view, and the single gas ejection hole23B is formed in a rectangular shape having a long side in the Y direction in plan view. The gas ejection hole23B is provided at the center of the electrode dielectric film21B in plan view. In the ground potential electrode unit2B, the active gas auxiliary member60B is provided on the upper surface of the electrode dielectric film21B so as to fill part of the active gas flow path, as illustrated inFIG.3. The active gas auxiliary member60B has a gas ejection opening65B located above the gas ejection hole23B. The gas ejection opening65B is provided from the upper surface to the lower surface of the active gas auxiliary member60B so as to penetrate the center of the active gas auxiliary member60B, the gas ejection opening65B becoming part of the active gas flow path. The formation height of the active gas auxiliary member60B is set to be lower than the distance (gap length) between the electrode dielectric films11B and21B. Therefore, the active gas flow gap is provided between the upper surface of the active gas auxiliary member60B and the lower surface of the electrode dielectric film11B of the high-voltage application electrode unit1B. As described above, the active gas auxiliary member60B of the second aspect of the first embodiment fills part of the active gas flow path between the discharge space6and the gas ejection hole23B in the dielectric space in order to limit at least part of the active gas flow path to the narrow active gas flow gap. As described above, the active gas auxiliary member60B has the gas ejection opening65B at its center, and is formed in a rectangular shape including the gas ejection opening65B. That is, the gas ejection opening65B is provided to include the entire of the single gas ejection hole23B in plan view and to overlap the gas ejection hole23B. Therefore, the active gas auxiliary member60B is formed in a rectangular shape including the entire of the gas ejection opening65B in plan view. As described above, the ground potential electrode unit2B of the second aspect of the active gas generation apparatus101further includes the active gas auxiliary member60B that fills part of the active gas flow path in the dielectric space between the electrode dielectric films11B and21B in order to limit at least part of the active gas flow path to the active gas flow gap. The electrode conductive film pair20H and20L are arranged to sandwich the active gas auxiliary member60B. The electrode conductive film20H is arranged on the left side (−X direction side) of the active gas auxiliary member60B, while the electrode conductive film20L is arranged on the right side (+X direction side) of the active gas auxiliary member60B. In the second aspect having the above-described configuration, a path from the discharge space6to the gas ejection hole23B in the dielectric space formed between the electrode dielectric films11B and21B is defined as the active gas flow path. As illustrated inFIG.3, the auxiliary conductive film12B is arranged at a position where the auxiliary conductive film12B overlaps the single gas ejection hole23B in plan view. That is, the auxiliary conductive film12B is arranged to overlap part of the active gas flow path in plan view. And, an AC voltage is applied between the electrode conductive film pair10H and10L and the electrode conductive film pair20H and20L from the high-frequency power supply9. Specifically, an AC voltage is applied to the electrode conductive film pair10H and10L from the high-frequency power supply9, and the metal housing31is set to the ground potential. Additionally, the electrode conductive films20H and20L and the auxiliary conductive film12B are also set to the ground potential. The electrode conductive films20H and20L are set to the ground potential via the metal housing31, and the auxiliary conductive film12B is set to the ground potential via the metal housing31or other connection means. An active gas passage space31sof the metal housing31is provided below the single gas ejection hole23B. Therefore, the active gas7, which has passed through the gas ejection opening65B and the gas ejection hole23B, further passes through the active gas passage space31s, and is supplied to the subsequent (lower) processing space63. As described above, the second aspect of the active gas generation apparatus101has a characteristic in which: the auxiliary conductive film12B is provided to overlap part of the active gas flow path in plan view; and the auxiliary conductive film12B is set to the ground potential. That is, the second aspect of the first embodiment has the first characteristic, similarly to the basic configuration of the first embodiment. The second aspect of the active gas generation apparatus101having such a configuration generates a dielectric barrier discharge in the discharge space6of the active gas generation electrode group51B by applying an AC voltage between the electrode conductive film pair10H and10L and the electrode conductive film pair20H and20L. Additionally, the second aspect of the active gas generation apparatus101supplies the raw material gas5from a non-illustrated gas supply port into the in-housing space33of the metal housing31, so that the raw material gas5is made flow inside along the gas flow15parallel to the X direction from both the ends in the X direction of the active gas generation electrode group51B. In the second aspect of the active gas generation apparatus101, the active gas7is then generated by activating the raw material gas5in the discharge space6, and the generated active gas7flows through an active gas flow path that is a path from the discharge space6to the gas ejection hole23B in the dielectric space. At this time, the space volume of the active gas flow path is greatly reduced by such an extent that the part of the active gas flow path is filled with the active gas auxiliary member60B. The active gas7, which has passed through the active gas flow gap, passes through the gas ejection opening65B, the gas ejection hole23B, and the active gas passage space31s, and is finally supplied to the subsequent processing space63along the gas flow15. In the second aspect of the first embodiment, the active gas flow gap formed on the upper surface of the active gas auxiliary member60B is sufficiently narrowed, whereby an orifice function can be provided to the active gas flow gap, similarly to the basic configuration of the first embodiment. In the second aspect of the first embodiment, a pressure difference is created between the processing space63after (below) the active gas generation apparatus101and the discharge space6by providing an orifice function to the active gas flow gap, whereby the pressure in the processing space63can be sufficiently reduced. Second Embodiment (Basic Configuration) FIG.4is an explanatory view illustrating the basic configuration of an active gas generation apparatus102according to a second embodiment of the present invention.FIG.4illustrates an XYZ orthogonal coordinate system. The active gas generation apparatus102of the second embodiment is an active gas generation apparatus that generates an active gas7obtained by activating a raw material gas5supplied to a discharge space6. Hereinafter, the same configurations and operations as those of the active gas generation apparatus101of the first embodiment illustrated inFIGS.1to3are denoted by the same reference signs, and the description thereof will be appropriately omitted, so the characteristic parts of the active gas generation apparatus102of the second embodiment will be mainly described. The active gas generation apparatus102includes, as the main components, a metal housing31and an active gas generation electrode group52. In the active gas generation apparatus102, the active gas7is generated by activating the raw material gas5in the discharge space6, and the generated active gas7flows through an active gas flow path that is a path from the discharge space6to a gas ejection hole23in the dielectric space. In a ground potential electrode unit2, an active gas auxiliary member60having a gas ejection opening65above the gas ejection hole23is provided on the upper surface of an electrode dielectric film21, similarly to the first embodiment. The active gas auxiliary member60is provided on the upper surface of the electrode dielectric film21such that the narrow active gas flow gap is created between the upper surface of the active gas auxiliary member60and the lower surface of an electrode dielectric film11of a high-voltage application electrode unit1. As described above, the ground potential electrode unit2of the active gas generation apparatus102of the second embodiment further includes the active gas auxiliary member60that fills part of the active gas flow path in the dielectric space in order to limit to the active gas flow gap, similarly to the first embodiment. Additionally, the ground potential electrode unit2of the active gas generation apparatus102further has a raw material gas auxiliary member72on the upper surface of the electrode dielectric film21. In the dielectric space in which the raw material gas5supplied to the in-housing space33flows from the outer periphery of the active gas generation electrode group52to the dielectric space between the electrode dielectric films11,21, a path leading to a point where the raw material gas5reaches the discharge space6is defined as a raw material gas flow path. The formation height of the raw material gas auxiliary member72is set to be lower than the distance (gap length) between the electrode dielectric films11and21, and to be substantially the same as the formation height of the active gas auxiliary member60. Therefore, a gap (hereinafter, may be abbreviated as a “raw material gas flow gap”) is narrowly created between the upper surface of the raw material gas auxiliary member72and the lower surface of the electrode dielectric film11of the high-voltage application electrode unit1. Therefore, the raw material gas auxiliary member72fills part of the raw material gas flow path in the dielectric space, and limits to the raw material gas flow gap. The active gas generation apparatus102having such a configuration generates a dielectric barrier discharge in the discharge space6of the active gas generation electrode group52by applying an AC voltage between the electrode conductive films10and20, and simultaneously supplies the raw material gas5from a non-illustrated gas supply port into the in-housing space33of the metal housing31, so that the raw material gas5is made flow from the outer periphery to the inside of the active gas generation electrode group52. Then, the raw material gas5reaches the discharge space6via the raw material gas flow path of the active gas generation apparatus102. At this time, the raw material gas flow path is limited to the raw material gas flow gap above the raw material gas auxiliary member72. After the raw material gas5reaches the discharge space6, the active gas7is generated by activating the raw material gas5in the discharge space6, and the generated active gas7flows through the active gas flow path. At this time, the active gas flow path is limited to the active gas flow gap above the active gas auxiliary member60. The active gas7, which has passed through the active gas flow gap, passes through the gas ejection opening65, the gas ejection hole23, and the active gas passage space31s, and is finally supplied to the subsequent processing space63along the gas flow15. In the active gas generation apparatus102of the second embodiment, an auxiliary conductive film12is provided to overlap part of the active gas flow path in plan view, as described above. Similarly to the first embodiment, the active gas generation apparatus102of the second embodiment has a first characteristic in which: the auxiliary conductive film12is provided to overlap part of the active gas flow path in plan view; and the auxiliary conductive film12is set to the ground potential. Additionally, the active gas generation apparatus102has a second characteristic in which the active gas generation apparatus102further includes the active gas auxiliary member60that fills part of the active gas flow path between the discharge space6and the gas ejection hole23in the dielectric space in order to limit to the active gas flow gap, similarly to the first embodiment. By having the first and second characteristics, the active gas generation apparatus102of the second embodiment has effects in which: the electric field strength in the active gas flow path can be released; and the deactivation amount of the active gas passing through the active gas flow path can be minimized, similarly to the first embodiment. Additionally, the active gas generation apparatus102of the second embodiment has, in addition to the first and second characteristics, a third characteristic in which the ground potential electrode unit2further includes the raw material gas auxiliary member72that fills part of the raw material gas flow path in the dielectric space in order to limit to the raw material gas flow gap. Since the active gas generation apparatus102of the second embodiment has the third characteristic, the narrow raw material gas flow gap can be formed in at least part of the raw material gas flow path by filling part of the raw material gas flow path with the raw material gas auxiliary member72. By forming the raw material gas flow gap so as to be sufficiently narrow, that is, by sufficiently shortening the length in the height direction (Z direction), an orifice function can be provided to the raw material gas flow gap. With this orifice function, a desired pressure difference can be set between the discharge space6and the in-housing space33outside the discharge space6, that serves as a raw material gas supply space for supplying raw material gas. As a result, in the active gas generation apparatus102of the second embodiment, the pressure in the discharge space6can be set to be relatively low even if the pressure in the in-housing space33, which is located before the discharge space6and serves as the raw material gas supply space, is sufficiently increased. Therefore, dielectric breakdown of the gas in the in-housing space33can be effectively suppressed by sufficiently increasing the pressure in the in-housing space33. Additionally, the active gas generation apparatus102can be downsized by forming the in-housing space33so as to be relatively narrow, while the effect of suppressing dielectric breakdown in the in-housing space33is being maintained. Further, the pressure in the discharge space6can be set to be relatively low by providing an orifice function to the raw material gas flow gap formed above the raw material gas auxiliary member72. A case is considered where for example, nitrogen molecules are converted into nitrogen atoms, as the active gas7. In this case, the nitrogen atoms deactivate due to collision with other nitrogen atoms, and hence the deactivation amount of the nitrogen atoms serving as the active gas7can be effectively reduced by setting the pressure in the discharge space6to be relatively low. As specific configurations by which the basic configuration of the active gas generation apparatus102of the second embodiment illustrated inFIG.4is achieved, a first aspect and a second aspect described below can be considered. (First Aspect) FIG.5is an explanatory view schematically illustrating the entire configuration of an active gas generation electrode group52A of a first aspect of the active gas generation apparatus102of the second embodiment.FIG.5illustrates an XYZ orthogonal coordinate system. The first aspect of the active gas generation apparatus102adopts the active gas generation electrode group52A illustrated inFIG.5, as the active gas generation electrode group52having the basic configuration illustrated inFIG.4. As illustrated inFIG.5, the first aspect of the second embodiment further includes an active gas auxiliary member60A that fills part of the active gas flow path between the discharge space6and the gas ejection hole23A in the dielectric space between the electrode dielectric films11A and21A in order to limit to the active gas flow gap, similarly to the first aspect of the first embodiment. An electrode conductive film20A is arranged along the outer periphery of the active gas auxiliary member60A so as to surround the active gas auxiliary member60A in plan view. Additionally, in the second aspect of the second embodiment, a raw material gas auxiliary member72A corresponding to the raw material gas auxiliary member72in the basic configuration is provided, at a predetermined distance from the active gas auxiliary member60A, on the upper surface of the electrode dielectric film21A so as to surround the electrode conductive film20A in plan view. The raw material gas auxiliary member72A is provided to have an annular shape in plan view along the outer periphery of the electrode dielectric film21A and to have a formation height substantially the same as the active gas auxiliary member60A. The formation height of the raw material gas auxiliary member72A is set to be lower than the distance (gap length) between the electrode dielectric films11A and21A. Therefore, the raw material gas flow gap is provided between the upper surface of the raw material gas auxiliary member72A and the lower surface of the electrode dielectric film11A of the high-voltage application electrode unit1. As described above, the raw material gas auxiliary member72A is provided to fill part of the raw material gas flow path in the dielectric space in order to limit to the raw material gas flow gap. In the first aspect of the second embodiment having the above-described configuration, a path from the discharge space6to a single gas ejection hole23A in the dielectric space formed between the electrode dielectric films11A and21A is defined as the active gas flow path. As illustrated inFIG.5, the auxiliary conductive film12A is arranged at a position where the auxiliary conductive film12A overlaps the gas ejection hole23A in plan view. That is, the auxiliary conductive film12A is arranged to overlap part of the active gas flow path in plan view. And, an AC voltage is applied between the electrode conductive film10A and the electrode conductive film20A from the high-frequency power supply9. Specifically, an AC voltage is applied to the electrode conductive film10A from the high-frequency power supply9, and the metal housing31is set to the ground potential. Additionally, the electrode conductive film20A and the auxiliary conductive film12A are also set to the ground potential. The electrode conductive film20A is set to the ground potential via the metal housing31, and the auxiliary conductive film12A is set to the ground potential via the metal housing31or other connection means. As described above, the first aspect of the active gas generation apparatus102has a characteristic in which: the auxiliary conductive film12A is provided to overlap part of the active gas flow path in plan view; and the auxiliary conductive film12A is set to the ground potential. That is, the first aspect of the second embodiment has the first characteristic, similarly to the basic configuration of the second embodiment. The first aspect of the active gas generation apparatus102having such a configuration generates a dielectric barrier discharge in the discharge space6of the active gas generation electrode group52A by applying an AC voltage between the electrode conductive films10A and20A. At the same time, the first aspect of the active gas generation apparatus102supplies the raw material gas5from a non-illustrated gas supply port into the in-housing space33of the metal housing31, so that the raw material gas5is made flow as the gas flow15going in the direction from the outer periphery to the single gas ejection hole23A of the active gas generation electrode group52A. Then, the raw material gas5reaches the discharge space6via the raw material gas flow path formed above the raw material gas auxiliary member72A, at least part of the raw material gas flow path being limited to the raw material gas flow gap. At this time, by sufficiently narrowing the raw material gas flow gap formed above the raw material gas auxiliary member72A, that is, by sufficiently shortening the length in the height direction (Z direction) of the raw material gas flow gap, an orifice function can be provided to the raw material gas flow gap. With this orifice function, a desired pressure difference can be set between the discharge space6and the in-housing space33outside the discharge space6, that serves as a raw material gas supply space for supplying raw material gas. Therefore, in the first aspect of the second embodiment, the pressure in the discharge space6can be set to be relatively low even if the pressure in the in-housing space33located before the discharge space6is sufficiently increased. In the first aspect of the active gas generation apparatus102, the active gas7is then generated by activating the raw material gas5in the discharge space6, and the generated active gas7flows through the active gas flow path that is a path from the discharge space6to the single gas ejection hole23A in the dielectric space. At this time, the space volume of the active gas flow path is reduced by such an extent that the part of the active gas flow path is filled with the active gas auxiliary member60A. The active gas7, which has passed through the active gas flow gap, passes through the gas ejection opening65A, the single gas ejection hole23A, and the active gas passage space31s, and is finally supplied to the subsequent processing space63along the gas flow15. (Second Aspect) FIG.6is an explanatory view schematically illustrating the entire structure of an active gas generation electrode group52B of a second aspect of the active gas generation apparatus102of the second embodiment.FIG.6illustrates an XYZ orthogonal coordinate system. The second aspect of the active gas generation apparatus102adopts the active gas generation electrode group52B illustrated inFIG.6, as the active gas generation electrode group52in the basic configuration illustrated inFIG.4. Hereinafter, the active gas generation electrode group52B of the second aspect will be described with appropriate reference toFIG.6. As illustrated inFIG.6, the second aspect of the second embodiment further includes an active gas auxiliary member60B that fills part of the active gas flow path in the dielectric space between the electrode dielectric films11B and21B in order to limit to the active gas flow gap, similarly to the second aspect of the first embodiment. The electrode conductive film pair20H and20L are arranged to sandwich the active gas auxiliary member60B. The electrode conductive film20H is arranged on the left side (−X direction side) of the active gas auxiliary member60B, while the electrode conductive film20L is arranged on the right side (+X direction side) of the active gas auxiliary member60B. Additionally, a raw material gas auxiliary member72B corresponding to the raw material gas auxiliary member72in the basic configuration is provided, at a predetermined distance from the active gas auxiliary member60B, on the upper surface of the electrode dielectric film21B so as to surround the active gas auxiliary member60B and the electrode conductive films20H and20L in plan view. The raw material gas auxiliary member72B is provided in a rectangular frame shape in plan view so as to be along the outer periphery of the electrode dielectric film21B. The raw material gas auxiliary member72B is provided on the electrode dielectric film21B so as to have a formation height substantially the same as the active gas auxiliary member60B, so that the raw material gas flow gap is created between the upper surface of the raw material gas auxiliary member72B and the lower surface of the electrode dielectric film11B of the high-voltage application electrode unit1. That is, the formation height of the active gas auxiliary member60B is set to be lower than the distance (gap length) between the electrode dielectric films11B and21B. As described above, the raw material gas auxiliary member72B is provided to fill part of the raw material gas flow path in the dielectric space in order to limit to the raw material gas flow gap. In the second aspect of the second embodiment having the above-described configuration, a path from the discharge space6to the gas ejection hole23B in the dielectric space formed between the electrode dielectric films11B and21B is defined as the active gas flow path. As illustrated inFIG.6, the auxiliary conductive film12B is arranged at a position where the auxiliary conductive film12B overlaps the single gas ejection hole23B in plan view. That is, the auxiliary conductive film12B is arranged to overlap part of the active gas flow path in plan view. And, an AC voltage is applied between the electrode conductive film pair10H and10L and the electrode conductive film pair20H and20L from the high-frequency power supply9. Specifically, an AC voltage is applied to the electrode conductive film pair10H and10L from the high-frequency power supply9, and the metal housing31is set to the ground potential. Additionally, the electrode conductive films20H and20L and the auxiliary conductive film12B are also set to the ground potential. The electrode conductive films20H and20L are set to the ground potential via the metal housing31, and the auxiliary conductive film12B is set to the ground potential via the metal housing31or other connection means. An active gas passage space31sof the metal housing31is provided below the single gas ejection hole23B. Therefore, the active gas7, which has passed through the single gas ejection hole23B, passes through the active gas passage space31s, and is supplied to the subsequent (lower) processing space63. As described above, the second aspect of the active gas generation apparatus102has a characteristic in which: the auxiliary conductive film12B is provided to overlap part of the active gas flow path in plan view; and the auxiliary conductive film12B is set to the ground potential. That is, the second aspect of the second embodiment has the first characteristic, similarly to the basic configuration of the second embodiment. The second aspect of the active gas generation apparatus102having such a configuration generates a dielectric barrier discharge in the discharge space6of the active gas generation electrode group52B by applying an AC voltage between the electrode conductive film pair10H and10L and the electrode conductive film pair20H and20L. At the same time, the second aspect of the active gas generation apparatus102supplies the raw material gas5from a non-illustrated gas supply port into the in-housing space33of the metal housing31, so that the raw material gas5is made flow inside along the gas flow15parallel to the X direction from both the ends in the X direction of the active gas generation electrode group52B. Then, the raw material gas5reaches the discharge space6via the raw material gas flow path formed above the raw material gas auxiliary member72B. At this time, by providing an orifice function by sufficiently narrowing the raw material gas flow gap above the raw material gas auxiliary member72B, a desired pressure difference can be provided between the raw material gas flow path including the in-housing space33and the discharge space6. Therefore, in the second aspect of the second embodiment, the pressure in the discharge space6can be set to be relatively low even if the pressure in the in-housing space33, which is located before the discharge space6and serves as the raw material gas supply space, is sufficiently increased. And, in the second aspect of the active gas generation apparatus102, the active gas7is generated by activating the raw material gas5in the discharge space6, and the generated active gas7flows through the active gas flow path that is a path from the discharge space6to the gas ejection hole23B in the dielectric space. At this time, the space volume of the active gas flow path is greatly reduced by such an extent that the part of the active gas flow path is filled with the active gas auxiliary member60B. The active gas7, which has passed through the active gas flow gap, passes through the gas ejection opening65B, the gas ejection hole23B, and the active gas passage space31s, and is finally supplied to the subsequent processing space63along the gas flow15. <Others> It is desirable that the raw material gas5to be used in the active gas generation apparatuses101and102of the first and second embodiments, respectively, is a gas containing at least one of hydrogen, nitrogen, oxygen, fluorine, and chlorine gas. By using the above-described gas as the raw material gas, the active gas generation apparatuses101and102can perform: a film forming process for a nitride film, an oxide film, etc.; generation of an etching gas and a cleaning gas; and a surface modification process. Hereinafter, this point will be described in detail. If nitrogen or oxygen is used as the raw material gas5, an insulating film such as a nitride film or an oxide film can be formed. If fluorine or chlorine gas is used as the raw material gas5, an activated fluorine gas or chlorine gas can be used as an etching gas or a cleaning gas. If hydrogen or nitrogen is used as the raw material gas5, a surface modification process can be performed in which the surface of a predetermined object such as a substrate is hydrogenated or nitrided by an activated hydrogen gas or nitriding gas. Examples of the material of the active gas auxiliary member60(60A,60B) shown in the above-described embodiments can include insulators such as ceramic or conductors such as metals. When a conductor is used as the active gas auxiliary member60, however, it is desirable to arrange the active gas auxiliary member60by securing a sufficient distance from the discharge space6. It is because: a conductor is easy to discharge, and hence if the active gas auxiliary member60made of a conductor is present near the discharge space6, there is a high possibility that the constituent elements of the active gas auxiliary member60may be ionized and ejected together with the active gas7. Examples of the material of the raw material gas auxiliary member72(72A,72B) can include insulators such as ceramic or conductors such as metals. When the active gas auxiliary member60and the raw material gas auxiliary member72are formed integrally with the electrode dielectric film21(21A,21B), it is desirable that the dielectric to be used as the constituent material of the electrode dielectric film21is used as the constituent material of the active gas auxiliary member60and the raw material gas auxiliary member72. In the above-described embodiments, the active gas auxiliary member60(60A,60B) and the raw material gas auxiliary member72(72A,72B) are formed on the upper surface of the electrode dielectric film21(21A,21B) of the ground potential electrode unit2, but may be formed on the lower surface of the electrode dielectric film11(11A,11B) of the high-voltage application electrode unit1instead of the above formation. In this case, the formation height toward the lower side (−Z direction) of the active gas auxiliary member60is set to be lower than the distance (gap length) between the electrode dielectric films11and21. Therefore, the active gas flow gap is provided between the lower surface of the active gas auxiliary member60and the upper surface of the electrode dielectric film21of the ground potential electrode unit2. By providing the active gas auxiliary member60on the lower surface of the electrode dielectric film11, as described above, the active gas flow path can be limited to the active gas flow gap by filling part of the active gas flow path between the discharge space6and the gas ejection hole23in the dielectric space. Similarly, the formation height toward the lower side of the raw material gas auxiliary member72is set to be lower than the distance (gap length) between the electrode dielectric films11and21. Therefore, the raw material gas flow gap is provided between the lower surface of the active gas auxiliary member60and the upper surface of the electrode dielectric film21of the ground potential electrode unit2. By providing the raw material gas auxiliary member72on the lower surface of the electrode dielectric film11, as described above, the raw material gas flow path can be limited to the raw material gas flow gap by filling part of the raw material gas flow path between the discharge space6and the gas ejection hole23in the dielectric space. Although the present invention has been described in detail, the above description is shown as an example in all aspects and the present invention is not limited thereto. It is to be understood that countless variations that are not shown as examples can be assumed without departing from the scope of the present invention. | 67,204 |
11942311 | DETAILED DESCRIPTION In the drawings, examples are described that comprise one or more embodiments. In this regard, the invention is not limited to the examples described. For example, one or more features of an embodiment can also be realized in another embodiment or even provided in another type of device. Before performing a coating process, such as a coating by means of physical vapor deposition (PVD) or a diamond-like carbon coating, an arc assisted glow discharge process (also ion etching process) can be performed on one or more substrates. In this case, the ion etching process is used to prepare or condition the surfaces, i.e., the substrate surfaces are heated and etched by means of an ion bombardment. This conditioning improves the bonding between the substrate and the coating. InFIG.1, a conventional ion etching system is represented. The system comprises a vacuum chamber1with evaporators7(in the following, the term evaporator short for arc cathode of a cathodic vacuum arc evaporator) arranged on opposite sides of the chamber1. The evaporators7are connected to direct current sources8and can be operated at voltages of 40 V and currents up to 300 A. Shutters or shields12are connected to the walls of the chamber1and are rotatably arranged in such a way that the shutters12can be rotated such that the corresponding electrode7is either shielded or unshielded. A linear electrode13is connected to the chamber and equally spaced from the evaporators7. The linear electrode13can be connected to the current sources11,14via switches15,16,17and has an equal voltage along the electrode3in the operating state. The current sources11,14are additionally connected to the wall of the chamber1and can optionally be connected to a rotatable substrate holder10via the switches15,16. Gas, such as argon, can be admitted to the chamber1from a gas source6through the inlet4via the valve5. When an arc discharge is ignited, electrons are generated by the evaporator7and accelerated toward the linear electrode13. The electrons excite the argon gas atoms and thus generate partially ionized argon atoms, which are deposited on a surface of a substrate9to prepare it for the coating. This system can be adjusted only by means of the direct current sources8,11,14and the rotating substrate holder10. Thus, the system is characterized by limited ionization, limited adjustability of plasma activation by the linear electrode13, and limited adjustability of homogeneity in the chamber1. The embodiment according toFIG.2shows a schematically represented vacuum-tight chamber100, an evaporator110which is provided in the chamber100and which can be arranged directly on the wall of the chamber100. Furthermore, a power supply111is provided, which has a negative pole. This negative pole of the power supply111or the power source111is connected to the evaporator110. Thus, in the present embodiment, the evaporator110is a cathode110. As represented, the evaporator110emits arc electrons, which are first partially extracted and accelerated by the electrode according to the invention, and thus exciting the working gas argon (Ar) (often also neon (Ne) or any other suitable gas or mixture of gases) and consequently creating a plasma. For this purpose, a positive accelerating voltage is applied to the electrode120, which enables an electrode current to the electrode. The control of the electrode can be achieved generally by the voltage or the current, or it can be achieved by the energy consisting of the product of voltage and current. The ions of the plasma then strike a surface of the substrate S, which is preferably provided in a centered manner in the chamber100, in order to prepare and activate its surfaces, for example by cleaning or etching, for a subsequent coating process. Furthermore, a shield115is movably arranged in the chamber100ofFIG.2, so that the shield115can be optionally positioned between the evaporator110and the substrate S. Thus, before the ignition of the cathodic vacuum arc evaporation, the shield115may be either rotated or otherwise moved in front of the evaporator110to protect the substrate S from contamination by the evaporator110during this process. If the cathodic vacuum arc evaporation is not present, the shield can be moved to another suitable position. According toFIG.2, a single electrode120is provided. The electrode120is connected to a positive pole of a power supply121, and consequently the electrode120is an anode120. By using different currents and/or different time intervals at the current source121of the anode120, the plasma that can be generated in the system can be influenced. As represented inFIG.2, the electrons emitted from the evaporator110are guided to the position of the electrodes/anodes120along a first and a second electron path150. Thus, in turn, a plasma that can be generated in the chamber100can be accelerated in the same direction. Due to a suitable positioning of the first electrode120at a desired position, a better easier control of the plasma flow in the chamber100is possible and consequently an improved control of the ion bombardment and etching of the substrate. The embodiment according toFIG.2ashows a schematically represented vacuum-tight chamber100with an analogous structure as the chamber100according to the embodiment according toFIG.2. However, the two-dimensional surface for collecting the electrons emitted from the cathode of the first electrode120aaccording toFIG.2ais rectangular, whereas the two-dimensional surface of the first electrode120according toFIG.2is circular. In this case, the two-dimensional surface for collecting the electrons emitted from the evaporator has a first orthogonal extension and a second orthogonal extension to a surface normal, wherein the first orthogonal extension is perpendicular to the second orthogonal extension, and a length ratio of the first orthogonal extension to the second orthogonal extension is between 0.1 and 1. In the case of the circular electrode120, the first orthogonal extension and the second orthogonal extension correspond in particular to the diameter of the two-dimensional surface. In the case of the rectangular electrode120a, the first orthogonal extension corresponds to a first edge length and the second orthogonal extension corresponds to a second edge length of the two-dimensional surface. The embodiment according toFIG.2bshows a schematically represented vacuum-tight chamber100with an analogous structure as the chamber100according to the embodiment according toFIG.2. However, the embodiment according toFIG.2bcomprises a switch device123coupled between the first electrode120and the power supplies121,122. The power supply121is arranged with the positive pole on switch S1of the switch device123and the power supply122is arranged with the negative pole on switch S2of the switch device123. When switch S1is closed and switch S2is open, the electrode120can be used as a plasma electrode according to the invention (i.e., also as an anode). When switch S1is open and switch S2is closed, the electrode120can be used for (arc) coating processes or sputtering processes (i.e., target). The embodiment according toFIG.2cshows a schematically represented vacuum-tight chamber100with an analogous structure as the chamber100according to the embodiment according toFIG.2. However, the embodiment according toFIG.2ccomprises a switch device123coupled between the first electrode120and the power supply121. The power supply121is arranged with the positive pole on switch S1of the switch device123and with the negative pole on switch S2of the switch device123. Furthermore, the positive pole of the power supply121is connected to a ground via the one switch S3and the negative pole of the power supply121is connected to the ground via the one switch S4. When switch S1is closed, switch S2is open, switch S3is open, and switch S4is closed, the electrode120can be used as a plasma electrode according to the invention. When switch S1is open and switch S2is closed, switch S3is closed, and switch S4is open, the electrode120can be used for (arc) coating processes or sputtering processes. The embodiment according toFIG.3shows the schematically represented vacuum-tight chamber100. In this case, the first electrode120and the second electrode130are connected to a positive pole of the same power supply121or the same power source121. As a consequence, the first electrode120and the second electrode130are a first anode120and a second anode130. By using different currents and/or different time intervals at the current source121of the anodes120and130, the plasma that can be generated in the system can be influenced. Since the common power supply is connected to the first electrode120and the second electrode130, an equal voltage can be applied to the first electrode120and the second electrode130with this arrangement. This current can be applied to both electrodes120,130at the same time and for the same duration. The embodiment according toFIG.4shows the schematically represented vacuum-tight chamber100. In the embodiment according toFIG.4, a first power supply121is arranged at the first electrode120and a second power supply131is arranged at the second electrode130. In this case, the plasma that can be generated in the system can be influenced by using different currents and/or different time intervals at the first power supply121and the second power supply131, in particular as the first power supply can supply the first electrode120with a first current and the second power supply can supply the second electrode130with a second current. Here, the first and second currents can be adjusted independently of each other, so that the distribution of the plasma can be shaped by the first and the second current. Here, the first power supply121may supply the first electrode120with the first current during a first time interval and the second power supply131may supply the second electrode130with the second current during a second time interval. The first and the second time intervals may be separate or overlapping, as desired. In the embodiments according toFIGS.2to4, a single evaporator110in each case is present, whereby a plasma arc is generated with at least one anode120,130. Embodiments of plasma sources are schematically represented inFIGS.3,4and9. In order to be able to better control the flow of electrons in the chamber100(i.e., a vacuum chamber according to the invention, hereinafter referred to as chamber), a plurality of electrodes120,130,140according to the invention having a two-dimensional surface for collecting the electrons emitted from a cathode is provided, which can be arranged in the chamber, unlike in the case of the device comprising a linear electrode according toFIG.1. A very important advantage of this arrangement is the possibility to position the electrodes on one or more walls of the chamber, whereby an improvement of a distribution of the substrates to be treated with plasma in the chamber is made possible. As a result, the area in the chamber for plasma treatment can be better utilized, resulting in higher efficiency. For example, a vacuum-tight chamber100is schematically represented inFIG.3or4. An evaporator110is provided in the chamber100and can be arranged directly in the wall or on the wall of the chamber110. The evaporator110can comprise one or more metals, such as titanium and/or any other metal intended for evaporation. A negative pole of the power supply or power source is connected to the evaporator110, thus connecting the evaporator110in the form of a cathode. For example, when the evaporator110is ignited by means of a trigger unit, arc electrons are emitted which are accelerated by means of the electrode according to the invention and collide with one or more gases such as argon (Ar), neon (Ne) or any other suitable gas or gases which have been admitted into the chamber110, and thus create a plasma. Then, the ions of the plasma bombard the surfaces of the one or more substrates (not shown here) that are provided in the chamber100to prepare their surfaces for a subsequent coating process, for example, by cleaning or etching. One or more shields115are movably provided in the chamber100so that the shield115can be optionally positioned between the evaporator110and the substrate. Thus, the shield115may be either rotated or otherwise moved in front of the evaporator before the ignition of the cathodic vacuum arc evaporation to protect the substrates from contamination by the evaporator110during this process. If the cathodic vacuum arc evaporation is not present, the shield can be moved to another suitable position. According toFIGS.3and4, two electrodes, a first electrode120and a second electrode130are provided in the chamber100. The first and second electrodes120,130are connected to a positive pole of the at least one power supply or current source, and thereby connect the first and second electrodes120,130as first and second anodes. For example, as represented inFIG.3, a common power supply121can be connected to the first electrode120and the second electrode130. In this arrangement, an equal voltage can be applied to the first electrode120and the second electrode130. This voltage can be applied to both electrodes120,130at the same time and for the same duration. As an alternative, according toFIG.4, a first power supply121may supply a current to the first electrode120during a first time interval and a second power supply131may supply a current to the second electrode130during a second time interval. The first and the second time intervals may be separate or overlapping, as desired. In another embodiment, the first electrode120may be connected to a first power supply121and the second electrode130may be connected to a second power supply131. Thus, the first power supply121can supply the first electrode120with a first current and the second power supply131can supply the second electrode130with a second current. By using different currents and/or different time intervals, the plasma generated in the system can be influenced, controlled or even homogenized. As represented inFIGS.3and4, the electrons emitted from the evaporator110flow to the positions of the first and second electrodes120,130. By a suitable positioning of the individual first electrode120and second electrode130at the desired locations, a better control of the plasma flow in the chamber100is possible and consequently an improved control of the ion bombardment and etching of the substrate S.FIG.9illustrates an embodiment in which three individual electrodes, a first electrode120, a second electrode130, and a third electrode140are provided. Thus, a corresponding first, second, and third electron path160results, which in each case is directed toward the first, second, and third electrodes120,130,140. In the schematic drawings according toFIGS.3and4, the electrodes120,130are arranged opposite the evaporator110. However, in the schematic drawing according toFIG.9, the electrodes120,130,140are arranged on different chamber parts. However, it is understood that any suitable positioning of the first, second or optionally third electrode is possible to influence the electron flow in such a way that an improved plasma activation and homogeneity in the chamber can be achieved. Accordingly, any number of electrodes in the chamber is possible to guide the electron flow to a desired path. The evaporator110according toFIGS.3,4and9can be used with an applied current of 100 A; however, any other suitable current may of course be used. FIG.5shows a further embodiment of a chamber200in which several evaporators are provided. The chamber200comprises a first evaporator210and a second evaporator220that are connected as cathodes, i.e., connected to a negative pole of a first power supply211and a second power supply221. The first and second evaporators210,220are provided on the wall of the chamber200. As an alternative, the first or second evaporator210,220may also be arranged on a suitable structure of the wall of the chamber200or in the chamber200. A rotatable or otherwise movable shield230is provided near the first and second evaporator210,220. The shield230may have a size that is sufficient to shield both evaporators210,220. As an alternative, the chamber200may comprise a first and a second shield, which is associated with the first evaporator and the second evaporator210,220, respectively (not shown here). Furthermore, a first electrode240is provided in the chamber200, which is connected as an anode, i.e., connected to the positive pole of a first current source241. As represented by the electron paths260, the electrons emitted from the first evaporator210and the electrons emitted from the second evaporator220flow toward the first electrode240. It is understood that any desired number of evaporators may be used with any desired number of individual electrodes, so that the system may comprise a suitable number of evaporators and a suitable number of electrodes. The embodiment according toFIG.6shows a schematically represented vacuum-tight chamber200with an analogous structure as the chamber200according to the embodiment according toFIG.5. However, the embodiment according toFIG.6differs fromFIG.5in that a first electrode240and a second electrode250are present. In this case, the first electrode240and the second electrode250are connected to a positive pole of the same power supply241or the same power source241. As a consequence, the first electrode240and the second electrode250are switched as a first anode240and a second anode250. Since the common power supply is connected to the first electrode240and the second electrode250, an equal current can be applied to the first electrode240and the second electrode250in this arrangement. This current can be applied to both electrodes240,250at the same time and for the same duration. FIG.6shows a further embodiment of a plasma source in which several evaporators are provided. A chamber200comprises a first evaporator210and a second evaporator220that are connected as cathodes. The first and second evaporator210,220can be provided in the wall of the chamber200or otherwise on the chamber200. As an alternative, the first or second evaporator210,220can be arranged on a suitable structure of the chamber200or in the chamber200. A rotatable or otherwise movable shield230is provided near the first and second evaporator210,220. The shield230may have a size that is sufficient to shield both evaporators210,220. As an alternative, the chamber200can comprise a first and second shield that are associated in each case with the first evaporator110and the second evaporator220. Furthermore, a first electrode240and a second electrode250are provided in the chamber200, both of which are connected as anode. As represented by the electron paths260, the electrons emitted from the first evaporator210flow toward the first electrode240and the electrons emitted from the second evaporator220flow toward the second electrode250. It is understood that any desired number of evaporators can be used with any desired number of individual electrodes. Thus, for example, the system ofFIG.6can comprise two evaporators and four individual electrodes so that electrons flow from the first evaporator210to two individual electrodes and the electrons flow from the second evaporator to two other individual electrodes. The embodiment according toFIG.7shows a schematically represented vacuum-tight chamber200with an analogous structure as the chamber200according to the embodiment according toFIG.6. However, the embodiment according toFIG.7differs fromFIG.6in that a first power supply241is arranged at the first electrode240and a second power supply251is arranged at the second electrode250. Here, the plasma that can be generated in the system can be influenced by using different currents and/or different time intervals at the first power supply241and the second power supply251, in particular as the first power supply can supply the first electrode240with a first current and the second power supply can supply the second electrode250with a second current. In this case, the first and second currents can be independently adjustable, so that the distribution of the plasma can be shaped by the first and second current. Here, the first power supply241may supply the first electrode240with the first current during a first time interval and the second power supply251may supply the second electrode250with the second current during a second time interval. The first and the second time intervals may be separate or overlapping, as desired. In the embodiments according toFIGS.5to7, two evaporators210,220in each case are present with at least one anode240,250. The embodiment according toFIG.8can be used in large systems in particular. Several plasma sources may be provided in the chamber by arranging evaporators311,321,331and electrodes340,350,360along the height of the chamber, this means along the height of the plasma treatment area, the plasma source in each case comprising at least one evaporator and one, two or more individual electrodes. Here, each electrode can be supplied by its own power supply or even a switchable power supply can be used by several electrodes simultaneously. The chamber300ofFIG.8comprises a first evaporator310, a second evaporator320, and a third evaporator330that are connected as cathodes, i.e., connected to a negative pole of a first power supply311, a second power supply321, and a third power supply331. The first, second, and third evaporators310,320, and330are provided on the same wall of the chamber300. As an alternative, the first, second, and third evaporators310,320, and330may also be arranged on a suitable structure of the wall of the chamber300or in the chamber300. Furthermore, first, second, and third evaporators310,320, and330may be arranged on different walls, respectively first and third evaporators310and330on one wall and the second evaporator320on another wall. Three rotatable or otherwise movable shields334,332, and333are in each case provided near the first, second, and third evaporator310,320, and330. As an alternative, the chamber300may comprise a shield which has a size that is sufficient to shield all of the evaporators310,320,330. Furthermore, a first electrode340, a second electrode350and a third electrode360are provided in the chamber300, which are connected as anodes340,350,360, i.e., connected in each case with the positive pole to a first power supply341, a second power supply351and a third power supply361. As represented by the electron paths, the electrons emitted from the first evaporator310, the electrons emitted from the second evaporator320, and the electrons emitted from the third evaporator330flow toward the three anodes340,350,360. In the schematic drawing according toFIG.8, the electrodes340,350,360are arranged opposite the evaporators310,320,330. However, it is understood that any suitable positioning of the first, second and third electrode is possible to influence the electron flow in such a way that an improved plasma activation and homogeneity in the chamber can be achieved. Accordingly, any number of electrodes in the chamber is possible to direct the electron flow to a desired path. The current applied to the evaporators310,320,330can be 100 A, but of course any other suitable current can be used. Thus, in the embodiment according toFIG.8, three evaporators310,320and330are present with three anodes340,350and360. FIG.8ashows a further embodiment of a chamber300, with an analogous structure to the chamber inFIG.8, but the power supplies of the first electrode340, the second electrode350, and the third electrode360are operated at different energies. Inter alia, via the different energies, the homogeneity of a plasma can be improved, as well the distribution of a plasma can also be better controlled by adjusting the energies at the respective power supplies accordingly. As can be recognized fromFIGS.4to8, the substrate S can be biased negatively as well as positively, whereby the positive bias must be less than that of the electrode, as otherwise all electrons will flow to the substrate. Of course, an appropriately biased substrate is also suitable for additional plasma control. Furthermore, a working gas and a process gas are supplied to the chamber100,200in the operating state. Here, the working gas is preferably argon (Ar) and hydrogen (H2), and the process gas is preferably nitrogen (N2). The embodiment according toFIG.9shows a schematically represented vacuum-tight chamber100with an analogous structure as the chamber100according to the embodiment according toFIG.2. However, the embodiment according toFIG.9differs fromFIG.2in that a first electrode120, a second electrode130and a third electrode140are present and in that a first power supply121is arranged at the first electrode120, a second power supply131at the second electrode130and a third power supply141at the third electrode140. In this case, the plasma that can be generated in the system can be influenced by using different energies and/or different time intervals at the first power supply121, the second power supply131, and the third power supply141, in particular as the first power supply121supplies the first electrode120with a first energy and the second power supply131can supply the second electrode130with a second energy and the third power supply141can supply the third electrode140with a third energy. In this case, the first, second, and third energies can be independently adjustable from each other, so that the distribution of the plasma can be shaped by the first, the second, and the third energies. FIG.9illustrates an embodiment in which three individual electrodes, a first electrode120, a second electrode130, and a third electrode140are thus provided. Thus, a corresponding first, second and third electron path160results, which is directed towards the first, second and third electrode120,130,140in each case. In the schematic drawings according toFIG.13, the electrodes120,130,140are arranged opposite the evaporator110. However, it is understood that any suitable positioning of the first, second or optionally third electrode is possible to influence the electron flow in such a way that an improved plasma activation and homogeneity in the chamber can be achieved. Accordingly, any number of electrodes in the chamber is possible to direct the electron flow to a desired path. The embodiment according toFIG.9ashows a schematically represented vacuum-tight chamber100with an analogous structure as the chamber100according to the embodiment according toFIG.9. However, in the embodiment according toFIG.9a, the electrodes120,130,140are not only arranged on chamber walls of the chamber100. The first electrode120is arranged on a chamber wall, the second electrode130is arranged on a chamber ceiling, and the third electrode140is arranged on the chamber floor. The arrangement of the electrodes in the chamber can be adjusted as desired to control, inter alia, a plasma distribution. While various exemplary configurations have been shown and described within the framework of this application, other embodiments with any number of evaporators and any number of electrodes naturally fall within the scope of protection of the invention claimed herein. Furthermore, a vacuum chamber according to the invention can be used for ion etching processes and can be equipped with a plurality of individual electrodes, whereby different electrodes can be supplied with different currents. The same or different currents can be applied to the different electrodes, even at different times, to manipulate the plasma activation and etching as desired. The electron paths150,160,260included in the figures are represented only schematically, since the electron paths150,160,260of course pass by the shields115,230,332,333,334and do not pass through them. InFIGS.2to9a, a magnet for generating a magnetic field (not shown here) is arranged in the vacuum chamber, particularly in the vicinity of the electrodes, or in the vicinity of at least one electrode of this plurality in the case of a plurality of electrodes. This magnet is particularly preferably arranged on the working surface of the electrode. Generally, the magnet may comprise a front-side magnet and/or a rear-side magnet. The front-side magnet is arranged in the area of the working surface for generating a front-side magnetic field and the rear-side magnet is arranged behind the working surface for generating a rear-side magnetic field. When a plurality of electrodes is present, a front-side and/or a rear-side magnet may also be arranged on an electrode or on a subset of the plurality of electrodes. The substrate S can be either negatively or positively biased, wherein the positive bias should be less than that of the electrode, as otherwise all the electrons will flow to the substrate. In the operating state, argon (Ar) and hydrogen (H2) can preferably be supplied as the working gas, and nitrogen (N2) can preferably be supplied as the process gas. Now, we turn toFIGS.10to12, in which embodiments are shown in which magnetic fields can be applied to the individual electrodes of the vacuum chamber. An electron path can be controlled in a magnetic field, which affects the charged particles in the plasma accordingly. More precisely, the diffusion of the charged particles is hindered by the magnetic field. As a result, the loss of electrons and ions is reduced, and the electron density is increased. Typically, electromagnets in the form of coils are positioned around the chamber from one end to an opposite end to create a magnetic field within the chamber. Other conventional systems use permanent magnets that are arranged underneath the substrate and moved to generate the magnetic field. However, none of these configurations allows to control the flow of electrons in such a way that the homogeneity can be adjusted and improved. In the embodiments described here, a magnetic field is applied to each individual electrode.FIG.10shows an embodiment in which an electrode300is arranged adjacent to or within an electromagnet302. For example, the electromagnet302may be a coil that is wound around the electrode30, that is, arranged in the area of a working surface of the electrode. In this case, the magnetic field at the electrode30is front-side. No rear-side magnetic field has been generated. TheFIGS.11to12show embodiments with rear-side magnets320and front-side magnets310. InFIG.11, the electrode30comprises the electromagnetic coil302that is provided near or around the electrode30(i.e., arranged in the area of the working surface and/or at least partially next to the working surface). An electromagnetic coil301is positioned near the electrode30behind the working surface to generate as a rear-side magnet a rear-side magnetic field. The electromagnetic coil may comprise a ferritic core or may not comprise a ferritic core, depending on the desired magnetic field strength. As shown, the two coils301,302are arranged in such a way that they have the same polarity. InFIG.12, the magnetic fields between the electromagnetic coils301and302have an opposite polarity. This change in the polarity of the (rear-side and front-side) magnetic fields can be achieved by changing the direction of the current through the coil301. Thus, the magnetic field can be adjusted on a single coil. The diagram ofFIG.19shows an example of the magnetic field strength (in mT, Y-axis) which was measured perpendicular to the surface (round electrode, 5 cm radius, zero point corresponds to the center of the electrode, X-axis radius starting from the center of the electrode in cm) at a coil current of3A. The middle curve shows the strength of the magnetic field ofFIG.10, where no rear-side magnetic field was generated. The upper curve shows the strength of the magnetic field according toFIG.11, where the magnetic field was generated by coils that are equally polarized; and the lower curve shows the strength of the magnetic field according toFIG.12, in which the magnetic field was generated by coils which are oppositely polarized. In the case of the upper curve, a tunnel field is present, since the upper curve is in the negative range from about ±3.2 and thus the magnetic field has a reversed direction from this radius. However, in the case of the lower curve, the magnetic field emerging from the work surface has only one direction. FIG.13shows another embodiment of the present invention. The system shown inFIG.13, is a vacuum chamber for performing a plasma treatment with a magnetic field configuration for two electrodes. An evaporator450is provided within the chamber and may be directly (at least partially) embedded in or connected to the chamber wall. A negative pole of a 100 A power source may be connected to the evaporator and connects the evaporator thereto as a cathode. Thus, electrons are emitted when the evaporator is ignited and the electrons collide with an argon (Ar) gas that has been introduced into the chamber, thus creating the plasma. The ions in the plasma then bombard the surfaces of one or more substrates not shown, which are arranged in the chamber to be cleaned and/or etched. One or more shields are movably positioned in the chamber in such a way that the shields can be optionally positioned between the evaporator and the substrate. Thus, before the ignition of the cathodic vacuum arc evaporators, the shield may be rotated or otherwise moved in front of the evaporator450to protect the substrate from contaminations. When the arc generated by the cathodic vacuum arc evaporator is not present, the shields can be moved to a non-shielding position. In a chamber according to the invention, at least one single electrode should be provided in the chamber. However, inFIG.13, a first electrode460and a second electrode470are provided, which are connected to a positive pole of a (for example, 80 A) power supply (also a current source) and thus connects the electrodes460,470as anodes. Accordingly, the electrons flow from the evaporator450in the direction of the position of the electrodes460,470. This accelerates the generated plasma in the same direction. A first rear-side magnet480and a second rear-side magnet490are arranged behind the working surfaces of the electrodes460,470for generating a rear-side magnetic field. The rear-side magnetic fields can be applied to the electrodes by means of an electromagnet by arranging an electromagnetic coil behind the working surfaces of the electrodes460,470. When using electrodes with magnetic fields, the substrate current can be increased, in particular doubled, with substantially the same ion etching performance, resulting in increased etching of the substrate (of the substrates). Although only a single evaporator450is shown inFIG.13, any number of evaporators and also electrodes can be used in the system (as already shown in the explanations ofFIGS.5to8a). For example, larger systems and/or larger chambers may require two or more evaporators to generate a larger number of electrons. FIG.14shows an embodiment of a chamber400with a similar structure as the embodiment according toFIG.17. In contrast toFIG.15, the first electrode and the second electrode ofFIG.14are connected to different power supplies (power supply U1and power supply U2). As a result, the polarities of the two coils can be controlled and changed independently of each other, which naturally leads to an improvement in etching homogeneity. Here, in the vacuum chamber400ofFIG.14, a front-side magnet (also magnetic circuit) in each case is arranged at the first electrode460and the second electrode470. Furthermore, a first rear-side magnet480is arranged at the first electrode460and a second rear-side magnet490is arranged at the second electrode470. As described above, the rear-side magnets480,490are connected to different power supplies (power supply1and power supply2). The front-side magnets are arranged in the vacuum chamber400(i.e. under vacuum) while the rear-side magnets480,490are arranged outside the vacuum chamber400(i.e. under atmospheric pressure). It is understood that magnets may comprise permanent magnets. As described above, the vacuum chamber according to the invention should comprise a magnet which is arranged to generate a magnetic field at, next to or around the (two-dimensional) working surface of the electrode in or outside the (vacuum) chamber. In this case, the magnet may comprise a front-side magnet and/or a rear-side magnet. Here, inFIG.15, the front-side magnet302is arranged in the area of the working surface461for generating a front-side magnetic field, and the rear-side magnet301is arranged behind the working surface461for generating a rear-side magnetic field. Of course, the front-side magnet can also be arranged at least partially next to the working surface. Both the front-side magnet and the rear-side magnet can be designed as electromagnets, in particular as coils. By using electromagnets, a temporal control of the magnetic field (rear-side or front-side, in particular resulting magnetic field when using rear-side and front-side) is made possible. Here, the magnetic field can be pulsed as well as its strength can be adjusted with substantially the same field direction and also the field direction can be reversed. By changing the direction of the current in the coil, the polarity of the magnetic field can be adjusted. Particularly preferably, when using the vacuum chamber according to the invention, programs can be predetermined in which the current in the coils changes. In this case, for example, a current of 3 A can be used for a first time interval and a current of 3 A with a reversed current direction can be used for a second time interval. The first and second time interval can be the same but of course also different. The currents can also be of different strengths. In summary, the magnetic field generated by the coil can be controlled by the time, the direction and by the current. The system according to the invention may also comprise a plurality of front-side and/or rear-side magnets, i.e., a front-side and/or rear-side magnetic circuit, which are annularly arranged. For example, as shown inFIG.15, the front-side magnet302may be annular or a plurality of front-side magnets302may be annularly arranged as a magnetic circuit. For example, the plurality may comprise20magnets which are arranged in a particular pattern, wherein each magnet is spaced apart from the other. To generate the front-side magnetic field, a second plurality of permanent magnets may be arranged radially within the first plurality of magnets. The plurality may have an opposite polarity to the second plurality. The rear-side magnet301may also be designed as a plurality of magnets which are arranged behind the working surface461of the electrode in a predeterminable structure. The annular front-side magnet302according toFIG.15has a larger diameter than the round working surface461of the electrode460. In an embodiment of the invention, the diameter of the front-side magnet may be a factor of 1.1 to 2 larger than the diameter of the electrode. In principle, a magnetization of the magnets should be largely parallel to the surface normal of the working surface461. For this purpose, the front-side magnets302may be arranged in front of, as well as next to and around the working surface461. It is also possible that a magnetic circuit consists of two magnets, wherein one pole is arranged in front of the working surface and one pole is arranged next to (above or below) the working surface. In particular, the front-side magnets can also be arranged movably so that they can change their position relative to the working surface. In summary, an arrangement of the magnet (or magnets) is made in such a way that any magnetic field structure (shape and strength) can be generated at the working surface of the two-dimensional electrode. In this regard, it is possible, for example, that the magnetic field strength in the outer area of the working surface is greater than in an inner area of the working surface, but also vice versa. In general, a magnet according to the invention can be designed at least partially as a permanent magnet, whereby all typical magnet materials such as hard ferrites, AlNiCo, NdFeB, SmCo can be used as volume materials or as plastic-bonded magnets. The magnet can be made of a molded body, or it can be segmented. Typical magnetic field strengths which are preferably used in a vacuum chamber according to the invention have a magnetic field strength of a perpendicular component of the magnetic field on the electrode according to the invention between 0.1 and 100 mT, preferably 1 to 50 mT, in particular 2 to 20 mT. In any of the recited embodiments, a substrate holder may be arranged in the chamber. The substrate holder preferably comprises a plurality of high-speed steel substrates that are arranged at different heights in the vertical direction. The substrate holder is rotatably arranged in the chamber so that a substrate holder plate can be rotated about a central axis of the substrate holder. In addition, each vertical arrangement of the substrate is rotatable about its individual axis. The first electrode and, if present, the second electrode have, for example, diameters of 100 mm and are arranged in the chamber at predeterminable vertical positions. In order to observe the effects on the individual electrodes and the magnetic fields during an experiment, measurements can be made on the electrodes at three different heights: at 210 mm corresponding to a lower end of the second electrode B; at 340 mm corresponding to 30 mm above a lower end of the first electrode; and 470 mm corresponding to 60 mm above the upper end of the first electrode A. The etched substrates were steel bodies (100Cr6), which were rotated twice in the vacuum chamber. Now, inFIG.17, a chamber similar to the one described above is represented, wherein front-side magnetic fields are additionally applied to the electrodes. The front-side magnetic fields of the first electrode460(A) and second electrode470(B) have opposite polarities. The magnetic fields can be used to adjust the plasma generation in the vicinity of the first and second electrodes460,470, which can be achieved by changing the direction of the currents applied to the respective coils. When a current of 80 A is applied to the electrodes, a current of 40 A is applied to the first electrode460(A) and a current of 40 A is applied to the second electrode470(B). As can be seen, the currents at the first electrode460(A) and the second electrode470(B) remain close to 40 A when the polarities of the magnetic fields applied to the electrodes460,470are oriented in opposite directions. However, when the applied magnetic fields have the same polarity, the current at the first electrode reaches approximately 80 A, while the current at the second electrode is close to 0 A. This is because the electron current at the second electrode is almost completely shielded in this case. The diagram and table ofFIGS.18and20show the measurements as taken at the predetermined heights on a device according to17. A diagram of the results is shown inFIG.18. The X-axis represents the vertical position above the lower edge of the lower circular electrode B (210 mm), or in other words, the predeterminable height measured in mm, and the Y-axis represents the etching depth in nm. It can be seen from the diagram that the substrates provided at higher vertical positions on the substrate holder show a weaker etching of the substrates than those substrates positioned at lower positions on the substrate holder. The upper line in the diagram shows the embodiment ofFIG.17, while the lower line shows a known system with a linear electrode. According toFIG.17, in which two single electrodes are operated in parallel, a significantly higher etching rate can be observed due to a higher substrate flow in the chamber. However, the homogeneity is not improved, as can be seen from the decrease in etching depth with decreasing height.FIG.19, on the other hand, shows an embodiment in which the homogeneity has been improved compared to the state of the art (lower line) by varying the polarity of the magnets over time. The X-axis represents the vertical position above the lower edge of the lower circular electrode B (210 mm), or in other words, the predeterminable height measured in mm, and the Y-axis represents the etching depth in nm. The first row of the table ofFIG.20, which is labeled “Stand.”, shows the measurement made on a known system with a conventional linear electrode. 80 A was applied to the linear electrode and the substrate current was measured at 1.9 A. The etching depth of the bottom measurement (bot, 210 mm) is 250 nm. The depth at the middle measurement (mid, 340 mm) is 210 nm, which is 84% of the bottom etching depth, and the depth at the top measurement point (top, 470 mm) is 110 nm, which is 48% of the bottom etching depth. The described designs with two single electrodes where only rear-side magnetic fields were applied to the electrodes show enhanced etching due to the increased substrate current of 3.4 A, but the same problems with homogeneity remain. A current of 40 A is applied to each electrode. The etching depth for the bottom measurement (bot, 210 mm) is 420 nm. The etching depth at the middle measurement (mid, 340 mm) is 350 nm (83%) and the depth at the top measurement (top, 470 mm) is 180 nm (43%). The next two lines show the results as obtained when magnetic fields are applied to the electrodes. When fields with the same polarity are applied, the current at the first electrode is 75 A and the current at the second electrode is 5 A. The substrate current is high at 4.5 A and etching depth at the top measurement (470 mm) is 760 nm. The middle measurement (340 mm) is 620 nm (86%) and the bottom measurement (340 mm) is 300 nm (39%). When the polarities are changed by reversing the direction of the current applied to the coil, a reverse effect can be observed on the etching depth. The current applied to the first electrode is 49 A and the current applied to the second electrode is 31 A. The substrate current was measured at 4 A. The largest measured depth in this configuration is found at the bottom measurement (210 mm) at 640 nm. The middle measurement (340 mm) gives 490 nm (76%) and the top measurement (470 mm) is 240 nm (38%). It is desired to achieve a homogeneity in the chamber at which the etching rate is substantially constant over the entire height of the substrate holder. Since the etching profiles show opposite trends from top to bottom at the same polarity of the magnetic field and at the opposite polarity, homogeneity can be achieved by superimposing the etching profiles at specified time intervals. The selected time can be short, such as 1 to 10 revolutions of the substrate holder, or longer if desired. In the example of the configuration according toFIG.17, it was found that a good homogeneity can be achieved when ⅔ of the process time (e.g. 40 min) is used by applying front-side magnetic fields of the same polarity (as in the third row of the results according toFIG.20and upper curveFIG.19) and ⅓ of the process time (20 min) is used by applying front-side magnetic fields of opposite polarity (as shown in the 4th row of the results inFIG.20). While various exemplary configurations have been shown and described within the framework of this application, other embodiments with any number of evaporators and any number of electrodes naturally fall within the scope of protection of the invention claimed herein. Furthermore, an ion etching system according to the invention can be equipped with a plurality of individual electrodes, whereby different electrodes can be supplied with different currents. The same or different currents can be applied to the different electrodes, even at different times, to manipulate the plasma activation and etching as desired. Although quite a number of embodiments have already been described within the framework of the present application, it goes without saying that further variations are possible. For example, the described embodiments may be suitably combined and supplemented or replaced by equivalent features having the same effect. Accordingly, such other solutions also fall within the scope of protection of the claimed invention. | 48,719 |
11942312 | DESCRIPTION OF EMBODIMENTS One embodiment of the present invention is a gas analyzer apparatus, one example of which is a mass spectrometer apparatus. For applications in circumstances where corrosive gases are used, such as monitoring a manufacturing process for semiconductors, a sensor with high resistibility to corrosion is required. As one example of a gas analyzer apparatus, an overview of a quadrupole mass spectrometer will now be described with reference toFIG.1. A quadrupole mass spectrometer (mass spectrometer apparatus, mass spectrometer)99includes an ionizer apparatus (ionizer unit, ionizer or ion source)90that ionizes a gas (gas sample or sample gas)9to be analyzed and an analyzer unit (gas analyzer section)21that analyzes the ionized gas8. The gas analyzer unit21includes a quadrupole portion, which is a filter unit20, and a detector unit (detection unit, for example, a Faraday cup)30that collects arriving gas ions8that have passed between the electrodes of the quadrupole. The quadrupole portion of the filter unit20includes a plurality, typically four, of columnar electrodes that are disposed at predetermined intervals in the circumferential direction and extend in the vertical direction. The mass spectrometer apparatus99includes a vacuum vessel (housing)40that houses the ionizer apparatus90and the gas analyzer unit21. The gas9that has flowed into the housing40is ionized by the ionizer apparatus90. The gas analyzer apparatus99includes an exhaust system60that keeps the housing40at negative pressure (that is, a vacuum). The exhaust system60may include a turbomolecular pump (TMP)61and a Roots pump (RP)62as vacuum pumps. The ionizer apparatus90includes a grid91and a filament92that functions as a cathode for supplying thermions (that is, an electron flow)93. One example of the grid91is constructed by arranging thin metal wires into a grid that is cylindrically shaped. The filament92is connected to metal support pins installed at predetermined intervals in the circumferential direction on a support frame, and is disposed on the outer circumference of the grid91. One example of the filament92is produced by coating the surface of a base material made of iridium with yttrium oxide by performing an electrodeposition treatment. A focusing electrode25is interposed between the filter unit20and the ionizer apparatus90so that ions that are headed toward the quadrupole portion efficiently converge. As one example, the focusing electrode25is electrically connected to the support pins of the filament92so that the potential of the filament92and the potential of the focusing electrode25become equal. A conventional mass spectrometer apparatus99is designed so as to operate with a condition of a pure gas environment, that is, an environment without corrosive gas. One example of a cathode material (filament material) suited to this condition is a Y2O3/Ir filament, where the core material is made of iridium Ir and the electron emitting layer is made of yttrium oxide (yttria, Y2O3). With this filament92, the yttrium Y in the Y2O3reacts with fluorine F or a fluorine-based gas to become yttrium fluoride YF3or yttrium oxyfluoride YOF, which are easy to evaporate. For gases that contain fluorocarbons CFx as components, tungsten W materials are believed to be effective as a filament material (cathode material). However, tungsten W does not have a sufficient working life in a gas or environments such as carbon tetrachloride CCl4, hydrochloric acid HCl, tungsten fluoride WF6, and tungsten chloride WCl6. Also, in an environment containing silicon oil, the filament92may become coated with Si, SiO2, SiN or the like, especially when the mass spectrometer apparatus99is started or stopped, which results in impaired functioning. Although it is possible to perform cleaning with a corrosive gas containing methane fluoride CF4, nitrogen trifluoride NF3, or the like, this may further shorten the working life of the filament92. Inconel600is often used as the grid91. Part of the gas may become deposited on the grid91to form an insulating film, and due to this the correct potential distribution may not be created in the ionizer/ion optical region. At present, electron impact ionization is most commonly used as the ionization method of a mass spectrometer apparatus99. This method requires a thermal filament92as an electron emitter, and there is the possibility of the filament92reacting with the sample gas9or its by-products. In addition, since the filament92also heats parts in the periphery, this may increase the rates of chemical reactions. It is possible to consider using a plasma ion source that does not have a heated part. However, it would be necessary to introduce a support gas, such as argon gas, to generate a plasma torch that serves as the plasma source, and this gas ends up being subjected to gas analysis together with the sample gas9. When thermions are used for plasma generation, as with glow discharge, a filament (cathode) is required, and in the same way as with ionization using thermions, there is the problem of resistance to corrosion. In addition, evaporants from the filament and chemical reactants may also end up being subjected to gas analysis. FIG.2depicts one embodiment of the present invention. The system80depicted inFIG.2includes a processing apparatus70, which includes a processing chamber71where one or more plasma processes are carried out, and a process monitoring apparatus (process monitor)50for monitoring each process carried out in the processing chamber71. The processing apparatus70is an apparatus used for manufacturing and/or processing various products in industries that perform processing and manufacturing, including the chemical industry. The processing apparatus70in the present embodiment includes an apparatus for manufacturing or processing a product using plasma process, and is typically an apparatus that carries out the process of forming various types of films or layers on a substrate78and/or a process of etching the substrate78. Examples of the processing apparatus70include a system that performs CVD (Chemical Vapor Deposition) or PVD (Physical Vapor Deposition). Another example of the processing apparatus70is an apparatus for carrying out a process with a semiconductor as a substrate78. A different example of the processing apparatus70is an apparatus that carries out a process of forming various types of thin films on optical components such as lenses and filters as the substrate78. However, the processing apparatus70is not limited to these examples. The processing apparatus70includes a chamber (processing chamber)71in which the substrate to be processed is placed, a gas supplying apparatus72that supplies gas used for processing (processing gas) to the processing chamber71, and a process control unit75including a function that controls the generation of plasma (processing plasma) for depositing (forming) a film and/or etching inside the processing chamber71. The process control unit75may further include a function for performing control to generate cleaning plasma for cleaning the inside of the processing chamber71. The process monitor50includes a gas analyzer apparatus (gas analyzer)1, which analyzes the gas (sample gas)9supplied from the processing chamber71, and a monitor control unit51, which controls the gas analyzer apparatus1and monitors the internal state of the processing chamber71. The gas analyzer apparatus1includes a plasma generation unit (plasma generator)10, which generates plasma18of the sample gas9to be measured (measurement target) that is supplied from the processing apparatus70, and an analyzer unit21, which analyzes the sample gas9via the generated plasma18. The plasma generation unit10includes a chamber (sample chamber)11, which is provided with a dielectric wall structure12and into which only the sample gas9to be measured is introduced, and a plasma generation mechanism13that generates plasma18in the sample chamber11, which has been depressed (decompressed), using an electric field and/or a magnetic field applied via the dielectric wall structure12. The gas analyzer apparatus1according to the present embodiment is a mass spectrometer and the analyzer unit21includes a filter unit (in the present embodiment, the quadrupole portion)20that filters the ionized sample gas (sample gas ions)8generated as the plasma18by the plasma generation apparatus10according to the mass-to-charge ratio, a focus electrode25that draws some of the plasma18as an ion flow8, a detector unit30that detects the ions that have been filtered, and a vacuum vessel (housing)40that houses the analyzer unit21. The gas analyzer apparatus1includes an exhaust system60that keeps the inside of the housing40under an appropriate negative pressure condition (vacuum condition). The exhaust system60according to the present embodiment includes a turbo molecular pump (TMP)61and a Roots pump62. The exhaust system60also controls the internal pressure of the sample chamber11of the plasma generation apparatus10. The gas analyzer apparatus1further includes a gas input unit19configured so that only the sample gas9from the processing apparatus70flows into the sample chamber11of the plasma generation unit10. Into the sample chamber11that has been decompressed by the exhaust system60, only the sample gas9from the processing apparatus70is introduced or flowed to form the plasma18in the sample chamber11. That is, in the plasma generation unit10, the plasma18to be used for analysis is generated using only the sample gas9without using an assist gas (support gas), such as argon gas. The walls12of the sample chamber11are constructed of a dielectric member (dielectric substance). Examples of dielectrics that are highly durable against plasma include quartz, aluminum oxide (Al2O3) and silicon nitride (SiN3). The plasma generation mechanism13of the plasma generation unit10generates the plasma18inside the sample chamber11using an electric field and/or a magnetic field applied via a dielectric wall structure12without using electrodes and without using a plasma torch. An example of the plasma generation mechanism13is a mechanism that excites the plasma18with high frequency (Radio Frequency or “RF”) power. Examples of RF plasma include methods such as inductively coupled plasma (ICP), dielectric barrier discharge (DBD), and electron cyclotron resonance (ECR). A plasma generation mechanism13for these methods includes a high-frequency power supply15and a coil14disposed around the sample chamber11. The internal pressure of the sample chamber (vessel)11is controlled to become an appropriate negative pressure using the exhaust system60that is shared with the gas analyzer apparatus1, a separate exhaust system, or an exhaust system that is shared with the processing apparatus70. The internal pressure of the sample chamber11may be a pressure that facilitates the generation of plasma, for example, a pressure in a range of 0.01 to 1 kPa. When the internal pressure of the processing chamber71is controlled to become around one to several hundred Pa, the internal pressure of the sample chamber11may be controlled to become a lower pressure, for example, about 0.1 to several tens of Pa, or alternatively kept at 0.1 Pa or higher (or 0.5 Pa or higher) and 10 Pa or lower (or 5 Pa or lower). As one example, the inside of the sample chamber11may be depressurized to about 1 to 10 mTorr (0.13 to 1.3 Pa). By keeping the sample chamber11at the level of depressurization (decompression) described above, it is possible to generate the plasma18at a low temperature with only the sample gas9. For the process monitor50, the substance to be monitored is the sample gas9supplied from the processing chamber71where a plasma process is carried out. This means that inside the sample chamber11, the plasma18can be maintained by merely introducing the sample gas9through the supplying of RF power under appropriate conditions, without using arc discharge or a plasma torch. A magnetic field and an electric field may be used together to generate and confine the plasma18inside the chamber11. By ionizing the sample gas9through the generation of plasma without requiring electrodes that would be depleted, it is possible to solve the problem of reduced working life due to the depletion of electrodes, and in turn to provide a gas analyzer apparatus1that has a longer measurement life and is capable of stabilized measurement. In addition, by eliminating the need for a support gas such as argon gas, it is possible to generate ionized plasma18with only the sample gas9and to supply such plasma to the gas analyzer unit21. This makes it possible to provide the gas analyzer apparatus1that has high measurement accuracy for the sample gas9and is capable of not only identifying gas components but also measuring the respective quantities of the components. This means that with a process monitor (process monitoring apparatus)50equipped with the gas analyzer apparatus1, the internal state of the processing chamber71of the processing apparatus70can be stably and accurately monitored over a long period of time. Also, in the process monitor50, the plasma18of the sample gas9can be generated by the sample chamber11that is dedicated to gas analysis and is independent of the processing chamber71. Accordingly, the plasma18can be generated in the sample chamber11under conditions that differ to the conditions in the processing chamber71and are suited to sampling and analysis of gases. This means that it is possible to monitor the internal state of the processing chamber71via the sample gas9even when process plasma or cleaning plasma is not being generated in the processing chamber71. The sample chamber11may be a small chamber (miniature chamber) of a sufficient size to generate the plasma18, for example, several mm to several tens of mm. By making the capacity of the sample chamber11smaller, a gas analyzer apparatus1that has superior real-time performance can be provided. Even when a light-emitting analyzer unit equipped with an optical spectrometer (optical emission spectrometer) is used as the gas analyzer unit21, it is possible to perform gas analysis by keeping the thickness of the plasma18at several mm to several tens of mm. The total length of the sample chamber11may be 1 to 100 mm and the diameter may be 1 to 100 mm. Alternatively, the total length and diameter of the sample chamber11may be 5 mm or larger or 10 mm or larger, and 80 mm or smaller, 50 mm or smaller, or 30 mm or smaller. The volume of the sample chamber11may be 1 mm3or larger and 105mm3or smaller. Alternatively, the volume of the sample chamber11may be 10 mm3or larger or 30 mm3or larger, or 100 mm3or larger. The volume of the sample chamber11may be 104mm3or smaller, or 103mm3or smaller. The monitor control unit51of the process monitor50includes a plasma control unit (plasma controller, plasma control function)52that controls the plasma generation unit10, a filter control unit (filter controller, filter control function)53that controls the filter unit20, and a detector control unit (detector controller, detector control function)54that controls the detector unit30. The monitor control unit51may be provided with computer resources including memory and a CPU, and the functions of the monitor control unit51may be provided by a program59. The program (program product)59may be provided having been recorded on a suitable recording medium. The plasma control unit52may be provided with a function of controlling the frequency, voltage, and the like of the high-frequency power supply15for generating the plasma18in the sample chamber11, a function of controlling the introducing amount (flow) of the sample gas9using a flow control valve19aprovided in the gas input unit19, and a function of controlling the internal pressure of the sample chamber11using a pressure control valve65provided on a connection line that connects to the exhaust system60. By controlling these factors, the plasma18can be stably generated inside the sample chamber11even when the type of process carried out in the processing chamber71changes and/or the state of a process changes, which makes it possible to continuously analyze and monitor the sample gas9from the processing apparatus70. The analyzer unit21of the present embodiment is a mass spectrometer, and in particular a quadrupole mass spectrometer, and the filter unit20is a quadrupole filter. For this reason, the filter control unit53includes a function as a driving unit (RF/DC unit) that applies high frequencies and direct current to the quadrupole. The filter unit20filters the ionized sample gas8according to mass-to-charge ratio. The detector control unit54detects the components included in the sample gas9by capturing an ion current which is generated in the detector unit (detection unit or collector unit)30, as one example, a Faraday cup, by the ions that have passed through the filter unit20. Atoms (molecules) contained in the sample gas9are scanned by the filter unit20in a predetermined range of atomic mass units (amu), and by determining the ion intensity in the scanned range using the detector unit30, it is possible to quantitatively measure the atoms (molecules) contained in the sample gas9. This means that the monitor control unit51can output (display) the gas components and respective concentrations contained in the sample gas9as a measurement result or monitoring result. The monitor control unit51includes a unit (function)55that displays or outputs these measurement results (or monitoring results). In the processing chamber71, plasma processes are carried out and the sample gas9is supplied therefrom to the gas analyzer apparatus1, and the process control unit75of the processing apparatus70performs control over at least one plasma process carried out in the processing chamber71based on the measurement result provided by the gas analyzer apparatus1. The process control unit75includes a function (endpoint control unit)76for determining the endpoint of the at least one plasma process based on measurement results of by-products of the at least one plasma process produced by the gas analyzer apparatus1. The process control unit75also includes a function74aof controlling an etching process (etching control unit), a function74bof controlling a deposition (film forming) process (film forming control unit, deposition control unit), and a function74cof controlling a cleaning process (cleaning control unit), with the respective end points of these processes being controlled by the endpoint control unit (endpoint control function)76. The process control unit75may be equipped with computer resources including memory and a CPU, and the functions of the process control unit75may be provided by a program79. The program (program product)79may be provided having been recorded on a suitable recording medium. When processing a semiconductor substrate78, for example, the etching control unit74aintroduces an etching gas, such as carbon fluoride CFx, sulfur hexafluoride SF6, nitrogen trifluoride NF3, or silicon tetrafluoride SiF4into the processing chamber71and generates process plasma to etch the substrate78. The endpoint of the etching process can be determined by the endpoint control unit76from measurement results of the gas analyzer apparatus1for the concentration in the sample gas9of a component of the layer to be etched, for example, silicon oxide SiO2, which is a by-product of the etching process. For this particular process, the concentration of SiO2, which is a by-product, is related to the area that has been etched, as one example in a proportional relationship, which makes it possible to accurately determine that the etching of a region with a predetermined depth and/or width has been completed. In particular, by monitoring the etching process by using the gas analyzer apparatus1that has high corrosion resistance, control over the process can be carried out stably and accurately. With the gas analyzer apparatus1, it is possible to measure the components of the etching gas as well as the by-products. Accordingly, the process monitor50can monitor the state of a process using a plurality of monitoring criteria, including monitoring of the state of the etching gas and monitoring of an endpoint. The etching control unit74amay include a model (artificial intelligence, AI) that has been machine-learned to control the progress of an etching process based on a plurality of monitoring criteria obtained from the process monitor50. The same also applies to the other forms of process control described below. For a substrate78on which an endpoint layer is provided, the endpoint control unit76may determine the endpoint of the etching process from the process monitor50detecting components of the endpoint layer as by-products. However, the method of detecting an endpoint is not limited to the methods described above. In the monitoring of endpoints using a conventional plasma process monitor, an endpoint is detected by optically determining the state of the plasma inside the processing chamber71. On the other hand, the monitoring of endpoints using the gas analyzer apparatus1may include real-time monitoring of the concentration of actual by-products performed via plasma that is generated separately to the process plasma, which makes it possible to determine endpoints more accurately. For a film forming (deposition) process that uses the film forming control unit74b, it is possible to determine an endpoint by detecting by-products generated by the plasma used for deposition. In a deposition process (film formation process, film forming process), as examples, TEOS plasma (tetraethyl orthosilicate or tetraethoxysilane) is generated when depositing a SiO2layer on a semiconductor substrate78in the processing chamber71, and plasma containing silane SiH4and ammonia NH3is generated when depositing a silicon nitride SiNx layer. At the endpoint control unit76, the endpoint of the deposition process can be determined from the measurement results of the gas analyzer apparatus1for the concentration in the sample gas9of by-products of the deposition process, for example, hydrides (moisture), hydrocarbons, and carbon oxides. In the case of a film forming process, the concentration of by-products is related, as one example in a proportional relationship, to the area and/or thickness that has been deposited, so that it is possible to accurately determine that the formation of a film with a predetermined area or thickness has been completed. At the same time, in the same way as the etching control described above, it is possible to monitor the state of the process plasma during the film forming process with the process monitor50and possible to control the film forming process according to AI using the monitoring result provided by the process monitor50. Also, by monitoring the process using the gas analyzer apparatus1that is hardly affected by coatings and the like, it is possible to control the film forming or deposition process stably and accurately. In a cleaning process that uses the cleaning control unit74c, it is possible to determine the endpoint from by-products generated by the cleaning plasma. When performing cleaning after the formation of an SiO2layer in the processing chamber71, cleaning plasma containing a corrosive gas, such as nitrogen trifluoride NF3, is generated. The endpoint of the cleaning process can be determined by the gas analyzer apparatus1accurately detecting silicon tetrafluoride SiF4, which is a by-product of the cleaning plasma in this example, via the sample gas9in real time. FIG.3depicts, by way of a flowchart, one example of control of a system80that includes the process monitor50equipped with the gas analyzer apparatus1according to the present embodiment. In step101, a plasma process is commenced by the processing apparatus70. In step102, the gas analyzer apparatus1connected to (fluidly communicated with) the processing chamber71performs monitoring, and in step103, the plasma process carried out in the processing chamber71is controlled based on the measurement results of the gas analyzer apparatus1. In this procedure, when the end point of the plasma process being carried out has been reached or discovered in step104from the measurement results of by-products of the plasma process provided by the gas analyzer apparatus1, the plasma process is terminated in step105. In step106, if a following plasma process is required in the manufacturing or processing procedure of the workpiece, such as a semiconductor substrate, of the processing apparatus70, the processing returns to step101to start the next plasma process. With a manufacturing method or a processing method that includes this type of control method, it is possible to manufacture and provide high-quality products in a minimum processing time using the processing apparatus70. FIG.4depicts another example of an embodiment of the present invention. The basic configuration of this system80is the same as the system80depicted inFIG.2. The gas analyzer apparatus1includes a plasma generation unit10. The gas analyzer apparatus1further includes an energy filter27between the plasma generation unit10and the filter unit (in the present embodiment, a quadrupole unit)20. Although a Bessel-Box type energy filter (energy analyzer) is used in the present embodiment, a CMA (Cylindrical Mirror Analyzer) may be used. The energy filter27is composed of a cylindrical electrode, a disk-shaped electrode (with the same potential as the cylindrical electrode) that is disposed at the center of the cylindrical electrode, and electrodes disposed at both ends of the cylindrical electrode, and operates as a band pass filter that passes only ions having a specific kinetic energy using an electric field produced by the potential difference Vba between the cylindrical electrode and the electrodes at both ends and the potential Vbe of the cylindrical electrode. Soft X-rays generated during the generation of plasma and light generated during gas ionization can be prevented from becoming incident on the ion detector (detector)30by the disk-shaped electrode disposed in the center of the cylindrical electrode, which makes it possible to reduce noise. With this structure, ions and neutral particles that are generated inside and outside the ion generation unit and are parallel to the central axis are not detected. In the plasma generation unit10that generates plasma at a lower voltage than the process, it is not necessary to introduce a support gas, such as argon plasma, which makes it possible to accurately perform quantitative analysis of the sample gas collected from the process. It is also possible to generate plasma continuously instead of generating plasma through pulse discharge using electrodes, and to suppress fluctuations due to the duty ratio of pulses or the like, which further reduces noise and improves the accuracy of the analysis. In addition, by using direct ionization, it is possible to lower the ionization current and suppress the production of fragments. By operating the plasma generation unit10at a low pressure, it is possible to prevent highly reactive components from flowing into the ionization unit and via the ionization unit into the gas analyzer apparatus (mass spectrometer apparatus)1, which extends the measurement life, including analysis of the sample gas9which includes components that are highly corrosive. In addition, since negative ions are formed in addition to positive ions during plasma ionization, it is possible to filter both positive and negative ions to detect components in the gas and thereby perform more accurate analysis. Since the sample gas9is in a state of being confined within the sample chamber11when the sample gas9is ionized, it is possible to increase the ionization area and to improve the ionization efficiency. In addition to this, a large amount of plasma radicals will be supplied to the chamber11and the gas analyzer apparatus1, which suppresses the deposition of oxides and the like. When many parts of the gas analyzer apparatus1including the housing40are made of an Fe—Ni material, in the worst case, components such as HF, HCl, WFx, WClx and the like may react with the Fe—Ni material and disappear. Although it is possible to perform cleaning by drawing plasma produced from a highly corrosive gas, such as CFx, into the gas analyzer apparatus1as cleaning plasma, if many components of the gas analyzer apparatus1are made of metal, the metal may corrode, which would shorten the life of the gas analyzer apparatus1. For this reason, for the components that construct the gas analyzer apparatus1, it is effective to attach or coat with pyrolytic carbon (or pyrolytic graphite (PG)), in place of metal or on metal surfaces. Note that although a quadrupole-type mass spectrometer has been described above as an example, the filter unit20may be an ion trap or another type of filter, such as a Wien filter. The filter unit20is not limited to a mass spectrometry-type, and may be a filter that filters molecules or atoms of a gas using other physical quantities, such as ion mobility. The gas analyzer unit may be an optical analyzer apparatus, such as a light-emitting analyzer unit. Although specific embodiments of the present invention have been described above, various other embodiments and modifications will be conceivable to those of skill in the art without departing from the scope and spirit of the invention. Such other embodiments and modifications are addressed by the scope of the patent claims given below, and the present invention is defined by the scope of these patent claims. | 29,801 |
11942313 | DESCRIPTION OF EMBODIMENTS A liquid chromatograph mass spectrometer (LC-MS) which is a mass spectrometer according to one embodiment of the present invention will be described with reference to the accompanying drawings. Overall Configuration of LC-MS According to the Present Embodiment FIG.1is a schematic block configuration diagram of an LC-MS according to the present embodiment. InFIG.1, a measurement unit1includes a liquid chromatograph unit (LC unit)2and a mass spectrometry unit (MS unit)3. The mass spectrometry unit3includes an ion source31, a mass separator32, and a detector33. Although not illustrated, the liquid chromatograph unit2includes a liquid feeding pump, an injector, a column, and the like. The liquid chromatograph unit2injects a predetermined amount of sample from the injector into a mobile phase fed by the liquid feeding pump, and feeds the sample into the column with a flow of the mobile phase. Various components (compounds) in the sample are temporally separated while passing through the column, eluted from a column outlet, and introduced into the mass spectrometry unit3. In the mass spectrometry unit3, the ion source31ionizes components in the eluate from the column, and the mass separator32separates various generated ions in accordance with a mass-to-charge ratio m/z. The detector33detects ions separated in accordance with the mass-to-charge ratio and generates a detection signal in accordance with the amount of the ions. A controller4controls an operation of the measurement unit1, and includes functional blocks such as a device parameter optimization-time measurement controller41, a device parameter storage unit42, and a measurement controller43. The device parameter optimization-time measurement controller41has a memory in which parameter search data is stored in advance. A data processor5receives data obtained by the measurement unit1to perform various types of data processing, and includes functional blocks such as a data storage unit51, a peak detector52, and a device parameter determiner53. Normally, most of the functional blocks of the controller4and the data processor5can be embodied by using a personal computer as a hardware resource and by causing the computer to execute dedicated control and processing programs installed in the computer. Configuration and Schematic Operation of Ion Source in LC-MS According to the Present Embodiment FIG.2is a schematic configuration diagram of the ion source31in the LC-MS according to the present embodiment. The ion source31is an electrospray ionization (ESI) ion source that is one of atmospheric pressure ion sources, and includes an ESI probe312that ionizes components in the eluate in an ionization chamber311in an approximately atmospheric pressure atmosphere formed inside a chamber310. The ESI probe312includes a capillary3121through which an eluate flows, a nebulizing gas tube3122disposed to surround the capillary3121, a heating gas tube3123disposed to surround the nebulizing gas tube3122, an interface heater3124that heats a distal end of the ESI probe312, and a high-voltage power source3125that applies a high voltage to the capillary3121. The ionization chamber311and an intermediate vacuum chamber (not illustrated) at a next stage communicate with each other through a desolvation tube313. A dry gas tube314for ejecting a dry gas into the ionization chamber311is disposed around the desolvation tube313. A desolvation tube heater315heats the desolvation tube313, the block heater316heats an inside of the ionization chamber311entirely. An ion generation operation in the ion source31will be briefly described. When the eluate containing the sample component reaches the vicinity of the distal end of the capillary3121, a biased charge is applied to the eluate by a DC electric field formed by a high voltage (about several kV at the maximum) applied from the high-voltage power source3125to the capillary3121. The charged eluate is nebulized as fine droplets (charged droplets) into the ionization chamber311with the aid of the nebulizing gas ejected from the nebulizing gas tube3122. The nebulized droplets come into contact with gas molecules in the ionization chamber311and are split to be fine. Since the temperature inside the ionization chamber311is high, the solvents in the droplets are vaporized. Further, since the heating gas ejected from the heating gas tube3123flows to surround a nebulizing flow, the vaporization of the solvents from the droplets is promoted, and the spread of the nebulizing flow decreases. In the process of vaporizing the solvents from the droplets, the component molecules in the droplets have charges and jump out from the droplets to become gas ions. Since a pressure difference arises between both opening ends of the desolvation tube313, a gas flow is formed such that the gas in the ionization chamber311is sucked into the desolvation tube313. The charged droplets in which the ions and the solvents derived from the sample component generated from the nebulizing flow from the distal end of the capillary3121are not completely vaporized e carried by the gas flow and sucked into the desolvation tube313. Since the dry gas is ejected from the dry gas tube314around an inlet opening of the desolvation tube313, the solvents from the charged droplets are exposed to the dry gas so as to be further vaporized. Since the desolvation tube313is heated to a high temperature by the heater315, the vaporization of the solvents from the charged droplets also proceeds in the desolvation tube313. As a result, ions derived from the sample component are efficiently generated and sent to the intermediate vacuum chamber at the next stage. As for the ion source31, device parameters that mainly affect ionization efficiency include the following seven parameters. (1) Interface Temperature (Hereinafter, Occasionally Abbreviated as “IFT” or “I/F Temperature”) This is a temperature around the distal end of the ESI probe312which is mainly heated by the interface heater3124, and the temperature ranges from 100° C. to 400° C. (2) Block Heater Temperature (Hereinafter, Occasionally Abbreviated as “BHT” or “BH Temperature”) This is a temperature around the inlet of the desolvation tube313(an outlet of the dry gas tube314) which is mainly heated by the block heater316, and the temperature ranges from 50° C. to 500° C. (3) Desolvation Tube Temperature (Hereinafter, Occasionally Abbreviated as “DLT” or “DL Temperature”) This is a temperature of the desolvation tube313which is mainly heated by the desolvation tube heater315, and the temperature ranges from 50° C. to 300° C. (4) Interface Voltage (Hereinafter, Occasionally Abbreviated as “IFV” or “I/F Voltage”) This is a high voltage for ion generation applied to the distal end of the ESI probe312(that is, the capillary3121), and the voltage ranges from 1 kV to 5 kV (where, its polarity depends on an ionization mode, and may be either positive or negative). (5) Nebulizing Gas Flow Rate (Hereinafter, Occasionally Abbreviated as “Nebgas”) This is a flow rate of the nebulizing gas flowing around the ejection port at the distal end of the ESI probe312through the nebulizing gas tube3122, and the flow rate ranges from 0 L/min to 3.0 L/min. (6) Heating Gas Flow Rate (Hereinafter, Occasionally Abbreviated as “Heatgas”) This is a flow rate of the high-temperature gas flowing from the periphery of the capillary3121through the heating gas tube3123in the same direction as the nebulizing flow of the droplets, and the flow rate ranges from 0 L/min to 20 L/min. (7) Dry Gas Flow Rate (Hereinafter, Occasionally Abbreviated as “Drygas”) This is a flow rate of the dry gas flowing through the dry gas tube314in the direction opposite to the gas suction direction into the desolvation tube313, and the flow rate ranges from 0 L/min to 20 L/min. Parameters (1), (2), and (3) describe above are parameters in which the physical quantity is temperature (hereinafter, occasionally referred to as “temperature parameters”), parameter (4) is a parameter in which the physical quantity is voltage (hereinafter, occasionally referred to as “voltage parameter”), and parameters (5), (6), and (7) are parameters in which the physical quantity is gas flow rate (hereinafter, occasionally referred to as “gas flow rate parameters”). When the values of the seven parameters are changed, ionization efficiency changes, the amount of ions subjected to mass spectrometry changes, and detection sensitivity (signal strength) in the detector33also changes. Since the degree of change in detection sensitivity and the direction of change depend on the component (compound), the parameter values for each compound needs to be optimized in order to perform highly sensitive measurement. Next, a method of optimizing the device parameters in the LC-MS and a procedure of the method according to the present embodiment will be described.FIG.3is a flowchart illustrating the procedure for optimizing the device parameters. The device parameter optimization-time measurement controller41temporarily sets all the parameter values to initial values (step S1). As the initial values, default values are selected such that detection sensitivity is generally high for various compounds. The device parameter optimization-time measurement controller41then sequentially changes only the temperature parameters to Ltemplevels (Ltempstages) including a low-temperature set to a high-temperature set in which the above-described three temperature parameters (I/F temperature, BH temperature, and DL temperature) are set according to the initial condition, and causes the measurement unit1to execute LC/MS analysis on the sample containing a target compound at each level (step S2). A specific example of the temperatures will be described later. Data obtained by the measurement unit1is temporarily stored in the data storage unit51. The peak detector52creates a chromatogram (total ion chromatogram or extracted ion chromatogram) for each device parameter including different temperature sets based on the obtained data. Then, a peak corresponding to the target compound is detected, and a peak area value is calculated. Since the peak area value reflects the detection sensitivity, the device parameter determiner53compares the peak area values obtained under different temperature conditions, finds a temperature set providing the largest peak area value, and selects the parameter values of the set as the optimum condition of the temperature parameters (step S3). Thereafter, the device parameter optimization-time measurement controller41sets the temperature parameters of the initial condition to the optimum condition, sequentially changes each interface voltage parameter to the Lvoltagelevel, and controls the measurement unit1to perform the LC/MS analysis on the sample containing a target compound at each level (step S4). Data obtained by the measurement unit1is temporarily stored in the data storage unit51, and similarly to step S3, the peak detector52creates a chromatogram based on the obtained data. Then, a peak corresponding to the target compound is detected, and a peak area value is calculated. The device parameter determiner53compares the peak area values obtained under different voltage conditions, finds a voltage value providing the largest peak area value, and selects the found voltage value as the optimum condition of the interface voltage (step S5). The device parameter optimization-time measurement controller41sets the interface voltage of the initial condition to the optimum condition, sequentially changes the nebulizing gas flow rate parameter to the Lnebgaslevel, and controls the measurement unit1to perform the LC/MS analysis on the sample containing the target compound at each level (step S6). Data obtained by the measurement unit1is temporarily stored in the data storage unit51, and similarly to step S3, the peak detector52creates a chromatogram based on the obtained data. Then, a peak corresponding to the target compound is detected, and a peak area value is calculated. The device parameter determiner53compares peak area values obtained under different nebulizing gas flow rate conditions, finds a gas flow rate value providing the largest peak area value, and selects the found gas flow rate value as the optimum condition of the nebulizing gas flow rate (step S7). The device parameter optimization-time measurement controller41sets the nebulizing gas flow rate of the initial condition to the optimum condition, sequentially changes the heating gas flow rate parameter to the Lheatgaslevel, and controls the measurement unit1to perform LC/MS analysis on the sample containing the target compound at each level (step S8). Data obtained by the measurement unit1is temporarily stored in the data storage unit51, and similarly to step S3, the peak detector52creates a chromatogram based on the obtained data. Then, a peak corresponding to the target compound is detected, and a peak area value is calculated. The device parameter determiner53compares peak area values obtained under different heating gas flow rate conditions, finds a gas flow rate value providing the largest peak area value, and selects the found gas flow rate value as the optimum condition of the heating gas flow rate (step S9). The device parameter optimization-time measurement controller41sets the heating gas flow rate of the initial condition to the optimum condition, sequentially changes each dry flow rate parameter to the Ldrygaslevel, and controls the measurement unit1to perform the LC/MS analysis on the sample containing the target compound at each level (step S10). Data obtained by the measurement unit1is temporarily stored in the data storage unit51, and similarly to step S3, the peak detector52creates a chromatogram based on the obtained data. Then, a peak corresponding to the target compound is detected, and a peak area value is calculated. The device parameter determiner53compares peak area values obtained under different dry gas flow rate conditions, finds a gas flow rate value providing the largest peak area value, and selects the found gas flow rate value as the optimum condition of the dry gas flow rate (step S11). As described above, the seven parameters including the set of three temperature parameters are sequentially optimized, and a finally selected value is determined as the optimum value of each parameter (step S12). As described above, in the LC-MS according to the present embodiment, the temperature parameters are optimized prior to the voltage parameter and the gas flow rate parameters when the device parameters are optimized. Further, the three temperature parameters are optimized not independently but collectively. Regarding these points, experiments conducted to confirm the effects and results of the experiment will be described. [Effect of Prior Optimization of Temperature Parameters] An effect of optimizing the temperature parameters prior to the voltage parameter and the gas flow rate parameters will be specifically described. FIGS.4and5are sensitivity maps illustrating distributions of detection sensitivities with respect to three gas flow rate parameters (Nebgas, Heatgas, and Drygas) and a voltage parameter (IFV).FIG.4illustrates the case of the low-temperature set in which the temperature parameter values are generally low, andFIG.5illustrates the case of the high-temperature set in which the temperature parameter values are generally high. InFIGS.4and5, the horizontal axis of one graph (map) is the I/F voltage, the vertical axis is Nebgas, the horizontal axis of the graph matrix is Drygas, and the vertical axis is Heatgas. This example is prepared by actual measurement for dicamba which is a type of herbicide. In the ion source31, generally, the ionization efficiency tends to be higher when the desolvation from the charged droplets in the nebulizing flow is promoted. Therefore, default values of the temperature parameters (that is, the initial values in step S1inFIG.3) are set to relatively high temperatures. However, some compounds show high sensitivity under low-temperature conditions, and dicamba is one of them. WhenFIG.4is compared withFIG.5, it is found thatFIG.4in which the temperature parameters are the low-temperature set generally has a higher sensitivity. That is, in dicamba, under the conditions of the same gas flow rate and voltage, the lower the temperature, the higher the detection sensitivity gets. A point at which the detection sensitivity is maximized in the sensitivity maps illustrated inFIGS.4and5, that is, an optimum solution is indicated by a circle. FromFIGS.4and5, it can be seen that the optimum conditions of the gas flow rates and the voltage are completely different depending on the temperature conditions. This is because the temperature parameters have a great influence on the detection sensitivity, and the optimum values of other parameters such as the gas flow rates and the voltage tend to change greatly depending on the temperature conditions. When the optimum solution inFIG.4is compared with the optimum solution inFIG.5, the detection sensitivity at the optimum solution inFIG.4is considerably higher. Therefore, it is found that the optimum solution inFIG.5is merely a local optimum solution that is not the optimum solution among the all device parameters including the temperature parameters. On the other hand, the optimum solution inFIG.4is a comprehensive optimum solution among all the device parameters including the temperature parameters. In a case where the target compound is a compound having a higher sensitivity under the low-temperature condition than under the high-temperature condition like dicamba, a local optimum solution is achieved as illustrated inFIG.5when the gas flow rate parameters and the voltage parameter are optimized prior to the temperature parameters under the high-temperature condition. As a result, the gas flow rate parameters and the voltage parameter are determined. Thus, even if the temperature parameters are optimized thereafter, the comprehensive optimum solution illustrated inFIG.4cannot be achieved. That is, it is found that the postponement of optimization of the temperature parameters is disadvantageous to finding the comprehensive optimum solution. On the other hand, the LC-MS according to the present embodiment have an effect such that the conditions of higher sensitivity are easily achieved because the temperature parameters having great influence on the detection sensitivity are optimized prior to the gas flow rate parameters and the voltage parameter. In order to confirm the effect of previously optimizing the temperature parameters, the device parameters are optimized under the two search conditions illustrated inFIGS.6B and6B, and the maximum signal strength for each measurement in the optimization process is compared. As is clear fromFIG.6, the values of the respective levels are identical among the seven parameters, and differ only in whether the three temperature parameters are optimized before the other parameters or after the other parameters. However, even if the actual measurement is simply performed under the two search conditions illustrated inFIGS.6A and6Band the signal strength is tried to be compared, correct comparison cannot be performed due to the influences of a temporal change in the signal strength and an observation noise. Therefore, a large amount of data is collected in advance by performing actual measurement while changing the condition of the combination of the device parameters, and the parameters are optimized in accordance with the above two search conditions on the computer for a signal strength model constructed based on the large amount of data. FIG.7is a graph illustrating a change in maximum signal strength in the process of device parameter optimization. In a case where the temperature parameters are optimized earlier, eventually, that is, as a result of searching (measurement) at 30 times, the maximum signal strength is 0.84 (relative value). Meanwhile, in a case where the temperature parameters are optimized later, eventually, the maximum signal strength is only 0.65. From this result, it can be experimentally confirmed that conditions of higher detection sensitivity can be achieved by optimizing the temperature parameters in advance. [Effect of Collectively Optimizing a Plurality of Temperature Parameters] First, validity of collectively optimizing a plurality (three in the above embodiment) of temperature parameters will be described with reference toFIGS.8A and8B.FIGS.8A and8Bare sensitivity maps illustrating distributions of signal strength obtained while actually measuring atrazine and flurbiprofen by independently changing three temperature parameters. The horizontal axis of one graph (map) is the BH temperature, the vertical axis is the DL temperature, and the horizontal axis of the plurality of graphs is the I/F temperature. The other parameters are set to the high sensitivity conditions confirmed in advance. As an example of the temperature parameter set, five sets variously including a low-temperature parameter to a high-temperature parameter are indicated by star marks inFIGS.8A and8B. The star marks with arrows indicate temperature conditions under which the detection sensitivity is maximized in each compound. As is clear fromFIGS.8A and8B, although the optimum temperature conditions are different between atrazine and flurbiprofen, it can be confirmed that a correlation is established between the rise and fall of all three temperature parameters and the signal strength in any compound. From this result, sufficiently high sensitivity can be achieved even if three temperature parameters are optimized collectively as one set. In order to confirm the effect of optimization of the three temperature parameters as a set, the device parameters are optimized under two search conditions illustrated inFIGS.9A and9B, and maximum signal strength for each measurement in the process of the optimization is compared. The five sets of temperature parameters illustrated inFIG.9Bare identical to those indicated by the star marks inFIGS.8A and8B. As is clear fromFIGS.9A and9B, the values of the respective levels are identical in the seven parameters, and a difference is only whether the three temperature parameters are used as the set. However, also in this experiment, as in the confirmation experiment of the effect of previously optimizing the temperature parameters, the parameters are optimized in accordance with the above two search conditions on the computer for the signal strength model constructed based on a large amount of data collected in advance. FIGS.10A and10Bare graphs illustrating a change in the maximum signal strength in the process of the device parameter optimization. In any compound, it can be confirmed that the signal strength equivalent to that in the case of searching while independently changing the temperature parameters can be achieved with a smaller number of measurement times (in this example, 30 times is reduced to 21 times) by making a search while changing the temperature parameter set. In the case of flurbiprofen illustrated inFIG.10B, although a search space is narrowed by arranging the temperature parameters into the set, the signal strength finally achieved is also improved. This is presumably because the optimization of the temperature parameters is reduced from three stages to one stage, thereby reducing the search under an erroneous condition in which a measured value is large but a true value is small due to the influence of an observation noise. [Modifications] The LC-MS according to the above embodiment can be variously modified. Obviously, the numerical values of the device parameters described above are merely examples. The device parameters can be changed appropriately. When an optimum condition is selected in the processing of steps S2to S11inFIG.3, a regression model may be calculated based on the actual measurement data and an optimum condition in the regression model may be selected instead of simply selecting a condition in which the signal strength is maximum from the actual measurement data. In the LC-MS according to the above embodiment, all of the three temperature parameters which are arranged into the set are optimized before the voltage parameter and the gas flow rate parameters. However, in a case where the three temperature parameters are optimized independently, one temperature parameter that has the greatest influence on the ionization efficiency may be optimized prior to the voltage parameter and the gas flow rate parameters. The set may not include all of the three temperature parameters, but the set may include two temperature parameters, and the other one temperature parameter may be optimized separately from the set. The LC-MS according to the above embodiment uses the ESI ion source as the ion source, but may be a mass spectrometer using an ion source in another ionization method, such as an atmospheric pressure chemical ionization (APCI) method, an atmospheric pressure photoionization (APPI) method, a probe electrospray ionization (PESI) method, or an ionization method in a real-time direct analysis (DART) method. The mass spectrometer is not limited to a single type mass spectrometer such as a quadrupole mass spectrometer. Thus, the present invention can be naturally applied to a triple quadrupole mass spectrometer, a quadrupole-time-of-flight mass spectrometer, an ion trap time-of-flight mass spectrometer, and the like. The above-described embodiment and modifications are merely examples of the present invention, and obviously, modifications, corrections, additions, and the like appropriately made within the scope of the gist of the present invention are included in the claims of the present application. [Various Aspects] It is easily understood by those skilled in the art that the above-described exemplary embodiments and modifications of the exemplary embodiments are specific examples of the following aspects. A mass spectrometry method of a first aspect is a mass spectrometry method using a mass spectrometer including an ion source using an atmospheric pressure ionization method for ionizing a component contained in a liquid sample, including, to optimize N parameters that affect ionization efficiency in the ion source, N being an integer of 2 or more:a measurement execution step of repeatedly executing measurement on a sample containing a target component while changing a value of each of the N parameters or a value set of M parameters among the N parameters, in a plurality of stages, M being an integer smaller than N; anda parameter value search step of sequentially finding an optimum value of each of the N parameters or an optimum value set of the M parameters based on a measurement result in the measurement execution step, whereinin the measurement execution step, a value of at least one parameter whose physical quantity is temperature among the N parameters or a value set of the M parameters including the at least one parameter is changed prior to all parameters whose physical quantities are other than temperature among the N parameters, andin the parameter value search step, the at least one parameter whose physical quantity is temperature is optimized prior to all the parameters whose physical quantities are other than temperature. A mass spectrometer including:an ion source using an atmospheric pressure ionization method for ionizing a component contained in a liquid sample;a mass separator configured to separate ions derived from the component contained in the liquid sample in accordance with a mass-to-charge ratio;a detector configured to detect the separated ions;to optimize N parameters that affect ionization efficiency in the ion source, N being an integer of 2 or more,a measurement controller configured to cause the ion source, the mass separator, and the detector to repeatedly execute measurement on a sample containing a target component while changing a value of each of the N parameters or a value set of M parameters among the N parameters, M being an integer smaller than N, in a plurality of stages; anda parameter determiner configured to sequentially find an optimum value of each of the N parameters or an optimum value set of the M parameters based on a result of the measurement executed under control of the measurement controller, whereinthe measurement controller causes measurement to be repeatedly executed while changing a value of at least one parameter whose physical quantity is temperature among the N parameters or a value set of the M parameters including the at least one parameter prior to all parameters whose physical quantities are other than temperature among the N parameters, andthe parameter determiner optimizes the at least one parameter whose physical quantity is temperature prior to all the parameters whose physical quantities are other than temperature. According to the mass spectrometry method and the mass spectrometer of the first aspect, the at least one temperature parameter is optimized prior to a voltage parameter, a gas flow rate parameter, or the like whose physical quantity is other than temperature. Therefore, the at least one temperature parameter can be prevented from reaching a local optimum condition that may not be high sensitivity from an overall viewpoint, and a value of the parameter that is high sensitivity from an overall viewpoint can be found. Accordingly, unnecessary parameter optimization can be avoided, and measurement efficiency can be improved. The amount of samples and consumption materials such as mobile phases used can be reduced, and this is advantageous to a reduction in the measurement cost. A mass spectrometry method and a mass spectrometer of a second aspect can be configured so that, in the mass spectrometry method and the mass spectrometer of the first aspect, all the parameters whose physical quantities are temperatures among the N parameters are optimized prior to all the parameters whose physical quantities are other than temperature. According to the mass spectrometry method and the mass spectrometer of the second aspect, all the temperature parameters are optimized prior to the voltage parameter, the gas flow rate parameter, and the like, and thus, values of the parameters that indicate higher sensitivity from an overall viewpoint can be found. A mass spectrometry method and a mass spectrometer of a third aspect, can be configured so that, in the mass spectrometry method and the mass spectrometer of the first aspect, the N parameters include parameters whose physical quantities are temperature, voltage, and gas flow rate. A mass spectrometry method and a mass spectrometer of a fourth aspect can be configured so that, in the mass spectrometry method and the mass spectrometer of the first aspect, in the measurement execution step, when a value of a parameter whose physical quantity is temperature is changed, the value is monotonously changed within a predetermined range. The meaning of “monotonously change” is a monotonous increase or monotonous decrease. Unlike the voltage and the gas flow rate, the temperature takes time to be stabilized to a changed value. On the other hand, according to the mass spectrometry method and the mass spectrometer of the fourth aspect, when the temperature parameters are changed, the temperatures are monotonously changed without being raised or lowered. Thus, the time required for changing the temperatures can be shortened, and the time required for optimizing the device parameters can also be shortened. A mass spectrometry method and a mass spectrometer of a fifth aspect can be configured so that, in the mass spectrometry method and the mass spectrometer of the fourth aspect, in the measurement execution step, a value of a parameter whose physical quantity is temperature can be monotonously increased when the value is changed. In general, when the temperature is changed, the temperature rise using a heater is faster than the temperature drop through cooling using release or a cooling element. Therefore, according to the mass spectrometry method and the mass spectrometer of the fifth aspect, the time required for changing the temperature can be further shortened, and the time required for optimizing the device parameters can also be shortened. A mass spectrometry method and a mass spectrometer of a sixth aspect, can be configured so that, in the mass spectrometry method and the mass spectrometer of any one of the first to fifth aspects, two or more parameters whose physical quantities are temperatures can be collectively optimized as a parameter set. A mass spectrometry method and a mass spectrometer of a seventh aspect can be configured so that, in the mass spectrometry method and the mass spectrometer of the sixth aspect, all the parameters whose physical quantities are temperature among the N parameters can be arranged into a parameter set. According to the mass spectrometry method and the mass spectrometer of the sixth and seventh aspects, a plurality of parameters whose physical quantities are temperatures are collectively optimized as a set. Thus, a condition of high detection sensitivity can be found with a small number of measurement times. As a result, the time required for optimizing the device parameters can be shortened. As described above, in the mass spectrometry method and the mass spectrometer of the first to seventh aspects, device parameters with high detection sensitivity can be searched for by avoiding reaching a local optimum solution. However, the number of measurement times required for optimizing the parameters is not reduced only by changing the order of optimization of the parameters. As described above, it is necessary to optimize the parameters for each target component or for each condition of the mobile phase. Therefore, for example, when the number of target components is large, the number of measurement times considerably increases even in the sequential method. Therefore, such a situation demands a method that can achieve detection sensitivity equivalent to in the conventional method with a smaller number of measurement times than in the conventional sequential method. An object of a mass spectrometry method and a mass spectrometer of the following aspect is to be capable of searching for a parameter with high detection sensitivity with a smaller number of measurement times than in the conventional exhaustive method and sequential method, thereby improving the measurement efficiency and reducing the amount of samples and consumption materials used. That is, a mass spectrometry method of one aspect is a mass spectrometry method using a mass spectrometer having an ion source using an atmospheric pressure ionization method for ionizing a component contained in a liquid sample including, to optimize N parameters that affect ionization efficiency in the ion source, N being an integer of 2 or more:a measurement execution step of repeatedly executing measurement on a sample containing a target component while sequentially changing values of a set of M parameters including all or some of parameters in which at least one type of physical quantities are identical among the N parameters, M being 1 or more and less than N, and values of other N-M parameters in a plurality of stages; anda parameter value search step of sequentially finding an optimum value set of the M parameters and of the N-M parameters based on a measurement result in the measurement execution step. A mass spectrometer of one aspect is a mass spectrometer including an ion source using an atmospheric pressure ionization method for ionizing a component contained in a liquid sample, a mass separator for separating ions derived from a sample component in accordance with a mass-to-charge ratio, and a detector for detecting the separated ions, the mass spectrometer including, to optimize N parameters that affect ionization efficiency in the ion source, N being an integer of 2 or more:a measurement controller configured to cause the ion source, the mass separator, and the detector to repeatedly execute measurement on a sample containing a target component while changing values of a set of M parameters including all or some of parameters in which at least one physical quantities are identical among the N parameters, M being 1 or more and less than N, and values of other N-M parameters in a plurality of stages; anda parameter determiner configured to sequentially find an optimum value set of the M parameters and of the N-M parameters based on a result of the measurement executed under control of the measurement controller. The physical quantities referred to herein are temperature, voltage, gas flow rate, and the like, as described above. In particular, the detection sensitivity is greatly affected by temperature, and a plurality of temperature conditions have high correlation. Therefore, a parameter set may be formed by arranging all or some of parameters whose physical quantities are temperature. As a result, the condition of high detection sensitivity can be found with a small number of measurement times, and the time required for optimizing the device parameters can be shortened. REFERENCE SIGNS LIST 1. . . Measurement Unit2. . . Liquid Chromatograph Unit (LC Unit)3. . . Mass Spectrometry Unit (MS Unit)31. . . Ion Source310. . . Chamber311. . . Ionization Chamber312. . . ESI Probe3121. . . Capillary3122. . . Nebulizing Gas Tube3123. . . Heating Gas Tube3124. . . Interface Heater3125. . . High-Voltage Power Source313. . . Desolvation Tube314. . . Dry Gas Tube315. . . Desolvation Tube Heater316. . . Block Heater32. . . Mass Separator33. . . Detector4. . . Controller41. . . Device Parameter Optimization-Time Measurement Controller42. . . Device Parameter Storage Unit43. . . Measurement Controller5. . . Data Processor51. . . Data Storage Unit52. . . Peak Detector53. . . Device Parameter Determiner | 38,254 |
11942314 | DESCRIPTION OF EMBODIMENTS An LC-MS which is an embodiment of a mass spectrometer according to the present invention will be described with reference to the accompanying drawings. Overall Configuration of LC-MS of Present Embodiment FIG.1is a schematic block configuration diagram of an LC-MS according to the present embodiment. Referring toFIG.1, a measurement unit1includes a liquid chromatograph unit (LC unit)2and a mass spectrometry unit (MS unit)3. The mass spectrometry unit3includes an ion source31, a mass separation unit32, and a detection unit33. Although not illustrated, the liquid chromatograph unit2includes a liquid feeding pump, an injector, and a column, injects a predetermined amount of sample from the injector into the mobile phase fed by the liquid feeding pump, and feeds the sample into the column on the flow of the mobile phase. Various components (compounds) in the sample are temporally separated while passing through the column, eluted from the column outlet, and introduced into the mass spectrometry unit3. In the mass spectrometry unit3, the ion source31ionizes components in the eluate from the column, and the mass separation unit32separates various generated ions according to the mass-to-charge ratio m/z. The detection unit33detects ions separated according to the mass-to-charge ratio and generates a detection signal according to the amount of ions. A control unit4controls the operation of the measurement unit1, and includes functional blocks such as a first measurement control unit41, a second measurement control unit42, a reference value search time measurement control unit43, a device parameter automatic adjustment time measurement control unit44, a device parameter storage unit45, and a third measurement control unit46. A data processing unit5receives data obtained by the measurement unit1and performs various data processing. The data processing unit5includes functional blocks such as a data storage unit51, a peak detection unit52, a data correction processing unit53, a sensitivity model creation unit54, a device parameter determination unit55, and a reference value determination unit56. Usually, most of the functional blocks of the control unit4and the data processing unit5can be implemented by using a personal computer as a hardware resource and executing dedicated control/processing programs installed in the computer on the computer. Configuration and Schematic Operation of Ion Source in LC-MS According to Present Embodiment FIG.2is a schematic configuration diagram of the ion source31in the LC-MS according to the present embodiment. The ion source31is an ESI ion source and includes an ESI probe312that ionizes components in the eluate in an ionization chamber311that is a substantially atmospheric pressure atmosphere formed inside the chamber310. The ESI probe312includes a capillary3121through which an eluate flows, a nebulizing gas tube3122disposed so as to surround the capillary3121, a heating gas tube3123disposed so as to surround the nebulizing gas tube3122, an interface heater3124that heats the distal end portion of the ESI probe312, and a high-voltage power supply3125that applies a high voltage to the capillary3121. The ionization chamber311and a next-stage intermediate vacuum chamber (not illustrated) communicate with each other through a desolvation tube313. A dry gas tube314for ejecting a dry gas into the ionization chamber311is disposed around the desolvation tube313. The desolvation tube heater315heats the desolvation tube313, and the block heater316heats the entire ionization chamber311. The ion generating operation of the ion source31will be briefly described. When the eluate containing a sample component reaches the vicinity of the distal end of the capillary3121, a biased charge is applied to the eluate by a DC electric field formed by a high voltage (about several kV at the maximum) applied from the high-voltage power supply3125to the capillary3121. The charged eluate is nebulized as fine droplets (charged droplets) into the ionization chamber311with the aid of the nebulizing gas ejected from the nebulizing gas tube3122. The nebulized droplets come into contact with gas molecules in the ionization chamber311and are split and refined. Since the temperature inside the ionization chamber311is high, the solvent in the droplets is vaporized. In addition, since the heating gas ejected from the heating gas tube3123flows so as to surround the nebulizing flow, the vaporization of the solvent from the droplets is promoted, and the spread of the nebulizing flow is suppressed. In the process of vaporization of the solvent from the droplet, the component molecules in the droplet have charges and jump out from the droplet to become gas ions. Since there is a pressure difference between both opening ends of the desolvation tube313, a gas flow sucked into the desolvation tube313from the inside of the ionization chamber311is formed. The charged droplets in which the ions and the solvent derived from the sample component generated from the nebulizing flow from the distal end of the capillary3121are not completely vaporized are carried by the gas flow and sucked into the desolvation tube313. Since a dry gas is ejected from the dry gas tube314around the inlet opening of the desolvation tube313, the solvent from the charged droplets further vaporizes by being exposed to the dry gas. Furthermore, since the desolvation tube313is heated to a high temperature by the heater315, the vaporization of the solvent from the charged droplets also proceeds in the desolvation tube313. As a result, ions derived from the sample component are efficiently generated and sent to the intermediate vacuum chamber on the next stage. The ion source31has the following seven parameters as device parameters that influence ionization efficiency and ion collection efficiency.Temperature of interface heater3124(to be sometimes abbreviated as “IFT” hereinafter)Temperature of block heater316(to be sometimes abbreviated as “HB” hereinafter)Temperature of desolvation tube heater315(to be sometimes abbreviated as “DL” hereinafter)Voltage applied to capillary3121(to be sometimes abbreviated as “IFV” hereinafter)Flowrate of nebulizing gas (to be sometimes abbreviated as “Neb” hereinafter)Flowrate of heating gas (to be sometimes abbreviated as “HeaGas” hereinafter)Flowrate of dry gas (to be sometimes abbreviated as “DryGas” hereinafter) When the values of the seven parameters are changed, the ionization efficiency and/or the ion collection efficiency changes, the amount of ions provided for mass spectrometry changes, and the detection sensitivity (signal intensity) in the detection unit33also changes. Since the degree of change in detection sensitivity and the direction of change depend on the component (compound), it is necessary to optimize the parameter value for each compound in order to perform highly sensitive measurement. A device parameter adjustment method and procedure in the LC-MS according to the present embodiment will be described next. Device Parameter Adjustment Method in LC-MS According to Present Embodiment The LC-MS according to the present embodiment has a function of automatically adjusting device parameters including the above-described seven parameters. For automatic adjustment of device parameters, a technique using a multi-task Bayesian optimization method as disclosed in Non-Patent Literature 1 is used. In order to optimize a device parameter by the multi-task Bayesian optimization method, a sensitivity model indicating the relationship between parameter values and detection sensitivity is required. The higher the accuracy of the sensitivity model, the smaller the number of times to search for an optimal device parameter, that is, the number of times of repetition of measurement at the time of automatic parameter adjustment. In order to create a highly accurate sensitivity model, it is necessary to repeatedly perform measurement on a target compound while exhaustively changing all of the seven parameters to obtain signal intensity. Such exhaustive measurement requires a long time, but in the LC-MS according to the present embodiment, the above-described problem associated with a long total measurement time is solved by the characteristic measuring operation and processing described below. FIG.3is a schematic timing chart of exhaustive measurement for data collection for creating a sensitivity model in the LC-MS according to the present embodiment. Referring toFIG.3, “measurement” indicates a period of measurement (to be sometimes referred to as a “measurement for data collection hereinafter” in order to distinguish it from a reference measurement described later hereinafter) for the target compound executed under one combination of the values of the seven parameters. Since the repetition of N−1 times of data collection measurement is measurement of the values of 7 parameters under N−1 different combinations and is performed M times, measurement of the values of 7 parameters under (N−1)×M different combinations is performed. Reference measurement is executed once before the start and after the end of all the measurements including the (N−1)×M repetitions of the measurement for data collection and between each repetition of (N−1) times of measurement and the next repetition of the (N−1) times of measurement, which corresponds to a midway timing in all the measurements. A reference measurement is a measurement executed on a target compound after the values of the seven parameters are respectively set to predetermined reference values. That is, since a plurality of reference measurements are executed under exactly the same conditions for the seven parameters, if conditions other than the seven parameters and the state of the device are exactly the same, ideally, the measurement results should be the same except for errors due to, for example, restrictions on the accuracy of the device. On the other hand, when there is a difference between measurement results in a plurality of reference measurements, it can be estimated that the main factor is a variation in conditions other than the seven parameters and the state of the device. More specifically, main factors considered as such factors are temporal changes in components of the mobile phase used in the liquid chromatograph unit2, deterioration in the sample, and the like. Accordingly, based on the measurement results on a plurality of reference measurements for the same target compound, specifically, the change (difference) in signal intensity in the mass-to-charge ratio corresponding to the target compound, data correction is performed to reduce errors due to variations in conditions other than the seven parameters and the state of the device included in the signal intensity data in the mass-to-charge ratio corresponding to the target compound acquired in the measurement for data collection.FIG.4is an explanatory diagram of the data correction method. <Method for Correcting Signal Intensity Data> Referring toFIG.4, the 0th and the Nth among the number of times of measurement on the abscissa are timings at which reference measurement is executed. On the other hand, during the period between the first time and the Nth−1 time, the data collection measurement is performed N−1 times. The ordinate represents the signal intensity at the mass-to-charge ratio corresponding to the target compound. During the period from the first time to the Nth−1 time, the signal intensity changes because the values of the seven parameters change at each measurement time. On the other hand, since the values of the seven parameters are the same at the time point 0 and the time point N, the signal intensity should be the same originally, but there is a difference in value between Y0at the time point 0 and YNat the time point N−1. An error caused by a variation in condition other than the seven parameters or the state of the device can be regarded as monotonically increasing (or decreasing) with respect to a time change. Accordingly, a correction equation formula in the form of equation (1) given below is used. Ycorrect=Yn×(Yref/Yncor)=Yn×[NYref/{(N−n)Y0+nYN}] (1) In this case, as illustrated inFIG.4, Ynand Yncorrespectively represent measured signal intensity at the time of the nth data collection measurement and signal intensity assumed under a reference condition. Note that Yrefis an appropriately determined reference value for correction, and for example, Y0may be set as Yref. That is, the signal intensity obtained in the N−1 times of data collection measurement is corrected according to the correction formula in the form of equation (1) using the signal intensity obtained in the reference measurement performed immediately before and immediately after the N−1 times of repetition of the data collection measurement. With this correction, it is possible to reduce errors due to variations in conditions other than the seven parameters and the state of the device. <Method for Determining Reference Condition During Reference Measurement> The values of the seven parameters at the time of the reference measurement, that is, reference conditions can be determined by the following procedure. Step 1: Parameters whose physical quantities are temperatures, specifically, three parameters, namely the temperature of the interface heater3124, the temperature of the block heater316, and the temperature of the desolvation tube heater315, are monotonously changed from low to high or from high to low within a settable range, and a signal intensity at a mass-to-charge ratio corresponding to the target compound is acquired under a combination of different temperatures. A parameter other than the parameters whose physical quantities are temperatures may be a predetermined default value. In addition, the three parameters related to the temperatures do not need to be changed in very small steps and may be changed in large steps that divide the settable range into five. In addition, since the three parameters related to temperatures have a positive correlation with each other, it is not necessary to exhaustively change the values of the parameters, and it is sufficient to acquire signal intensity for a combination of temperatures of about five stages with the three parameters related to the temperatures as one set. Step 2: Among the signal intensities desired to be acquired in step 1, a combination of values of three parameters related to the temperatures at which the signal intensity is maximum is selected, and is determined as a reference value in the three parameters. Step 3: When it is desired to obtain higher detection sensitivity, a parameter regarding the voltage applied to the capillary3121is monotonously changed from low to high or from high to low within a settable range, and signal intensity for each voltage is acquired. The value of the parameter related to the temperature at this time may be the reference value determined in step 2. The values of the other parameters may be default values. In general, it is not necessary to adjust parameters related to the voltage applied to the capillary3121. Step 4: The value of the parameter of the applied voltage which has the maximum signal intensity is selected from the signal intensities desired to be acquired in step 3, and the selected value is determined as the reference value in the parameter. Step 5: Default values are used as values of the three parameters related to the gas flowrate, and the parameter values determined in steps 2 and 4 are used as reference values. When steps 3 and 4 are omitted, the parameter value of the applied voltage may also be a default value. The reason for adopting the procedure as described above is that parameters that greatly contribute to ionization efficiency are parameters related to temperature and parameters of the voltage applied to the capillary3121. If a parameter related to a temperature is not adjusted, the influence of the measurement condition in the measurement performed immediately before reference measurement greatly appears, and the measurement under the reference condition becomes unstable. The following will describe the comparison result of a change in the signal intensity in repeated measurement in a case where the parameters related to temperature is not adjusted as a reference condition and a case where the parameters related to the temperature is adjusted as a reference condition as described above. (1) Case where Adjustment of Parameters Related to Temperature is not Performed as Reference Condition The reference conditions at the time of reference measurement are fixed as follows: DL=250° C.,HB=400° C.,IFT=300° C.,IFV=3.4kV(for positiveionmeasurement; −3.4kVfor negativeionmeasurement),Neb=2.6 L/min,HeaGas=10.0 L/min, and DryGas=10.0 L/min. On the other hand, parameters at the time of measurement for data collection are as follows. The three parameters related to temperature are presented in the form of the following five sets:Temperature set 1: DL=100° C., HB=100° C., IFT=100° C.Temperature set 2: DL=150° C., HB=200° C., IFT=170° C.Temperature set 3: DL=200° C., HB=300° C., IFT=240° C.Temperature set 4: DL=250° C., HB=400° C., IFT=300° C.Temperature set 5: DL=300° C., HB=500° C., IFT=400° C. In addition, IFV, Neb, HeaGas, and DryGas are fixed to default values within settable ranges of the device. For example, IFV and Neb are respectively fixed to 5.0 kV and 3.0 L/min, and both HeaGas and DryGas are fixed to 10.0 L/min. FIG.5illustrates the result of executing reference measurement 60 times under the above reference condition while repeating the data collection measurement under each parameter for the data collection measurement and plotting changes in signal intensity obtained for the target compound in the reference measurement with respect to the number of measurements. Obviously fromFIG.5, the change in signal intensity with the increase in the number of times of measurements greatly varies depending on the temperature set of the immediately preceding measurement for data collection. Obviously, at the same time, in a case where the temperature set for measurement for data collection is changed in the order of 1→2→ . . . →5, the value of the signal intensity in the reference measurement originally monotonically increases or monotonically decreases in this order, whereas the magnitude of the signal intensity value is reversed. This means that the premise of correction formula (1) described above is not necessarily satisfied, and sufficient correction cannot be performed. (2) Case where Adjustment of Parameters Related to Temperature is Performed as Reference Condition FIG.6is a diagram illustrating the relationship between the number of times of measurement and signal intensity when the parameters related to the temperature for the reference measurement are adjusted as described above. As can be seen fromFIG.6, in this case, the influence of the measurement condition (temperature set) immediately before the reference measurement is hardly observed. In addition, while the temperature set in the measurement for data collection is changed in the order of 1→2→ . . . →5, the signal intensity value in the reference measurement decreases in the same order. That is, the signal intensity value monotonously decreases with time, and it is possible to accurately correct the signal intensity in the measurement for data collection using the signal intensity obtained by the reference measurement. The above results reveal the importance of appropriately determining parameters related to temperature as a reference condition for reference measurement. Operation During Parameter Adjustment in LC-MS According to Present Embodiment An operation in adjusting a device parameter in the LC-MS according to the present embodiment will be described next. The sensitivity model used for automatic adjustment of device parameters is created as follows. First, under the control of the reference value search time measurement control unit43, the measurement unit1performs measurement on a sample containing a target compound under the conditions described in step 1 (and step 3). In the data processing unit5, the peak detection unit52detects a peak corresponding to the target compound on a chromatogram created based on the obtained data. Then, the height or the area of the peak is calculated and used as a signal intensity value. The reference value determination unit56compares a plurality of signal intensity values obtained under different conditions and determines a parameter value having the maximum signal intensity as a reference value. Thereafter, the measurement unit1repeatedly executes data collection measurement on a sample containing the target compound under the control of the first measurement control unit41. In addition, under the control of the second measurement control unit42, the measurement unit1executes reference measurement on a sample containing a target compound at an appropriate time point before, after, or in the middle of the repetition of measurement for data collection. Data obtained by the device data collection measurement and the reference measurement is stored in the data storage unit51. The peak detection unit52detects a peak corresponding to a target compound on a chromatogram created based on data obtained for each measurement and calculates the height or area of the peak to obtain a signal intensity value. The data correction processing unit53executes the data correction described above on the signal intensity value obtained by the data collection measurement using the signal intensity value obtained by the reference measurement and obtains a corrected signal intensity value. This data correction reduces the influence of changes in the state of the device other than the device parameters. The sensitivity model creation unit54creates a sensitivity model based on the corrected signal intensity value measured while the value of the parameter is variously changed. As described above, the multi-task Bayesian optimization method is used when device parameters are automatically adjusted. In the multi-task Bayesian optimization method, the posterior distribution of a model function of a system to be optimized is generally estimated based on reference observation data and target observation data. The target observation data is data including the observation value obtained in the system to be optimized, whereas the reference observation data is data including the observation value obtained in a reference system different from but similar to the system to be optimized. The sensitivity model corresponds to this reference observation data and indicates the relationship between the value of each parameter and signal intensity (detection sensitivity) as will be exemplified later. The sensitivity model created by the sensitivity model creation unit54is transferred to the control unit4and stored in the device parameter automatic adjustment time measurement control unit44. In the multi-task Bayesian optimization method adopted in the LC-MS according to the present embodiment, the posterior distribution of the model function is estimated under the assumption that the model function of the system follows a certain stochastic process. The stochastic process at the time of creating a sensitivity model may be a Gaussian process regression so that a secondary effect of suppressing the influence of observation noise can be obtained. When the automatic adjustment of the device parameters is actually executed, the device parameter automatic adjustment time measurement control unit44repeats the measurement on the sample containing the target compound while controlling the measurement unit1to automatically change the device parameter in the measurement to be performed next according to the algorithm of the multi-task Bayesian optimization method using the sensitivity model. The multi-task Bayesian optimization method is described in detail in Non-Patent Literature 2 and the like, and the algorithm itself is not the gist of the present invention. Accordingly, a description of this algorithm will be omitted. Using the multi-task Bayesian optimization method makes it possible to search for a device parameter in a nearly optimal state with a small number of times of measurement. In addition, as described above, since the accuracy of data used when creating the sensitivity model is high (the influence of changes in measurement conditions other than the device parameters and the device state is reduced), the accuracy of the sensitivity model itself is also high. Therefore, the number of times of measurement at the time of searching for a device parameter based on the multi-task Bayesian optimization method that refers to a sensitivity model is also reduced accordingly. The device parameter determination unit55determines, as a device parameter, each parameter value when a predetermined condition is satisfied and the repetition of measurement ends. The determined device parameter is stored in the device parameter storage unit45of the control unit4. At the time of subsequent measurement of the target compound, highly sensitive measurement can be performed by using the device parameter. That is, the third measurement control unit46reads out a device parameter from the device parameter storage unit45and controls the measurement unit1according to the parameter to execute measurement. [Effect of Signal Intensity Data Correction] In order to confirm the effect of correcting the signal intensity data obtained in the data collection measurement using the signal intensity data obtained in the reference measurement, the amount of variation in signal intensity when three measurements were performed was examined for six compounds. The six compounds were Reserpine, Acetaminophen, Naproxen, Warfarin, Carbamazepine, and Estrone, but they were treated as different compounds since Warfarin is ionizable in both positive and negative ion modes. Table 1 indicates the calculation result of the variation amount of the signal intensity value in the presence or absence of the signal intensity data correction. TABLE 1Positive ModeNegative ModeRes.War.+Ace.Car.Nap.Est.War.−Without31.1%5.6%8.4%6.1%35.2%39.5%29.8%CorrectionWith6.5%4.1%6.2%3.8%12.0%23.2%18.2%Correction From Table 1, it can be confirmed that a change in signal intensity over time is sufficiently reduced by the correction of the signal intensity data. In addition, in order to confirm the effect of correcting signal intensity data in automatically adjusting device parameters, the following comparison experiment was performed. More specifically, sensitivity models were created for a case where the signal intensity data was corrected and a case where the signal intensity data was not corrected (prior art), and the device parameters were adjusted by the multi-task Bayesian optimization method using the sensitivity models as reference information. FIG.7illustrates the sensitivity characteristics of a compound (ketoprofen) for which device parameters are to be optimized. The following are three parameters of the device parameters:IFT: The range of 100° C. to 400° C. is changed in 25° C. steps. Total 13 steps.IFV: The range of 0.2 kV to 5.0 kV is changed in 0.2 kV steps. Total 17 steps.Neb: The range of 1.5 L/min to 3.0 L/min is changed in 0.3 L/min steps. Total 17 steps. Other parameters may be default values. FIG.8Aillustrates a sensitivity model corresponding to the above compound when the signal intensity data is corrected.FIG.8Billustrates a sensitivity model corresponding to the above compound when the signal intensity data is not corrected. The following are three parameters among the device parameters at the time of measurement for data collection for creating these sensitivity models:IFT: Five steps of 100° C., 170° C., 240° C., 300° C., and 400° C.IFV: Five steps of 0.2 kV, 1.5 kV, 3.0 kV, 4.0 kV, and 5.0 kV.Neb: Three steps of 1.5 L/min, 2.5 L/min, and 3.0 L/min. When the sensitivity models inFIGS.8A and8Bare compared with the sensitivity characteristic inFIG.7, it can be seen thatFIG.8Ain which the signal intensity data is corrected is closer to the original sensitivity characteristic. After three initial points are randomly determined on the sensitivity model, the maximum signal intensities and the numbers of times of measurement obtained when 19 points are searched are compared.FIG.9illustrates the relationship between the number of searches and the average value of the maximum sensitivities when the search is performed with the number of trials of 20. As can be seen fromFIG.9, when the sensitivity model using the corrected signal intensity data was used as reference information, the condition (parameter value) for the maximum sensitivity was able to be found by six searches. On the other hand, in a case where a sensitivity model using uncorrected signal intensity data is used as reference information, it is necessary to perform 13 searches to find a condition for the maximum sensitivity (parameter value). By correcting the signal intensity data in this manner, it is possible to reduce the number of times of measurement required to find optimum device parameters and to improve the efficiency of measurement work. From the above results, it has been confirmed that the correction of the signal intensity data using the signal intensity obtained by the reference measurement is effective in shortening the time required for the automatic adjustment of the device parameters. In addition, reducing the number of times of measurement at the time of automatic adjustment of the device parameters is also useful for reducing the injection amount of the sample and the consumption amount of the mobile phase, various gases, and the like. The LC-MS according to the above embodiment uses the ESI ion source as an ion source, but may be a mass spectrometer using an ion source based on other ionization methods such as an atmospheric pressure chemical ionization (APCI) method, an atmospheric pressure photoionization (APPI) method, a probe electrospray ionization (PEST) method, and an ionization method in a real-time direct analysis (DART) method. In addition, the mass spectrometer is not limited to a single type mass spectrometer such as a quadrupole mass spectrometer. Obviously, the present invention can be applied to a triple quadrupole mass spectrometer, a quadrupole-time-of-flight mass spectrometer, an ion trap time-of-flight mass spectrometer, and the like. Furthermore, the above embodiments and modifications are merely examples of the present invention, and it is a matter of course that changes, modifications, additions, and the like appropriately made within the scope of the gist of the present invention are included in the claims of the present application. VARIOUS ASPECTS The embodiments of the present invention have been described above with reference to the accompanying drawings. Finally, various aspects of the present invention will be described. A mass spectrometer according to the first aspect of the present invention is a mass spectrometer including an ionization unit, a mass separation unit, and a detection unit, the mass spectrometer including:a first measurement control unit configured to control the ionization unit, the mass separation unit, and the detection unit so as to repeatedly execute a first measurement on a target sample while changing values of a plurality of parameters defined as device parameters;a second measurement control unit configured to control the ionization unit, the mass separation unit, and the detection unit so as to set a value of each of the plurality of parameters to a predetermined reference value and execute a second measurement on the target sample at not less than two time points before, after, or in a middle of repetition of the first measurement;a correction processing unit configured to correct results of the first measurements by using results of the second measurements executed at not less than two time points; anda device parameter-related information acquisition unit configured to determine the plurality of parameters using the measurement results corrected by the correction processing unit or acquire reference information for determining the plurality of parameters. A mass spectrometry method according to the first aspect of the present invention is a mass spectrometry method uses a mass spectrometer including an ionization unit, a mass separation unit, and a detection unit, the mass spectrometry method including:a first measurement step of repeatedly executing a first measurement on a target sample while changing values of a plurality of parameters defined as device parameters;a second measurement step of setting a value of each of the plurality of parameters to a predetermined reference value and executing a second measurement on the target sample at not less than two time points before, after, or in a middle of repetition of the first measurement;a correction processing step of correcting results of the first measurements by using results of the second measurements executed at not less than two time points; anda device parameter-related information acquisition step of determining the plurality of parameters using the measurement results corrected in the correction processing step or acquiring reference information for determining the plurality of parameters. According to the mass spectrometer and the mass spectrometry method according to the first aspect of the present invention, even in a case where the first measurement is repeated for a long time and a temporal change in signal intensity due to various factors cannot be ignored, it is possible to reduce or substantially eliminate the influence of such a temporal change and obtain device parameters that allows highly sensitive measurement. Alternatively, since the accuracy of the reference information for determining the device parameter can be improved, the number of repetitions of measurement can be reduced when determining the device parameters by repetition of measurement based on the reference information. That is, it is possible to efficiently obtain device parameters allowing highly sensitive measurement. In a mass spectrometer according to the second aspect of the present invention, a result of the first measurement corrected by the correction processing unit in the mass spectrometer according to the first aspect can be the signal intensity obtained from the height or area of a peak on a chromatogram. The term “chromatogram” as used herein is a graph reflecting a temporal change in ionic strength and includes graphs indicating temporal changes in ionic strength obtained in not only a case where a sample is introduced from a chromatograph to a mass spectrometer but also a case where a sample is introduced to a mass spectrometer by a flow injection analysis (FIA) method and a case where the same sample is repeatedly introduced to a mass spectrometer like an ion source by a probe electrospray ionization method. A mass spectrometer according to the third aspect of the present invention includes, in the mass spectrometer according to the first aspect, a reference value search time measurement control unit configured to control the ionization unit, the mass separation unit, and the detection unit so as to repeatedly execute measurement on a target sample while changing a value of one parameter or values of a plurality of parameters that influence ionization efficiency in the ionization unit among the plurality of parameters, and a reference value determination unit configured to determine the reference value based on results of the measurements. In a mass spectrometer according to the fourth aspect of the present invention, one parameter or a plurality of parameters that influence the ionization efficiency in the ionization unit in the mass spectrometer according to the third aspect can include a parameter whose physical quantity is temperature. According to the mass spectrometers according to the third and fourth aspects of the present invention, since device parameters at the time of reference measurement are appropriately determined, the reproducibility and stability of the signal intensity of the reference measurement itself are improved, and the accuracy of the correction processing based on the result of the reference measurement is improved. As a result, it is possible to search for device parameters with which higher detection sensitivity can be obtained, or it is possible to efficiently search for device parameters with which higher detection sensitivity can be obtained. In a mass spectrometer according to the fifth aspect of the present invention, the device parameter-related information acquisition unit in the mass spectrometer according to the first aspect uses the measurement results corrected by the correction processing unit to create, as the reference information, a sensitivity model indicating a relationship between values of a plurality of parameters and detection sensitivity. In a mass spectrometer according to the sixth aspect of the present invention, the sensitivity model in the mass spectrometer according to the fifth aspect can be a model that is referred to when an optimal or nearly optimal device parameter is searched for using an algorithm of a multi-task Bayesian optimization method. In a mass spectrometer according to the seventh aspect of the present invention, the device parameter-related information acquisition unit in the mass spectrometer according to the sixth aspect can create the sensitivity model by a Gaussian process regression based on the measurement results corrected by the correction processing unit. In the mass spectrometers according to the fifth to seventh aspects of the present invention, an optimal or nearly optimal device parameter is searched for by an algorithm of a multi-task Bayesian optimization method referring to a highly accurate sensitivity model. This makes it possible to find an optimal or nearly optimal device parameter with a small number of searches, thereby improving the measurement efficiency and suppressing the injection amount of sample. This leads to saving consumption materials such as a mobile phase and a gas. REFERENCE SIGNS LIST 1. . . Measurement Unit2. . . Liquid Chromatograph Unit3. . . Mass Spectrometry Unit31. . . Ion Source310. . . Chamber311. . . Ionization Chamber312. . . ESI Probe3121. . . Capillary3122. . . Nebulizing Gas Tube3123. . . Heating Gas Tube3124. . . Interface Heater3125. . . High-voltage Power Supply313. . . Desolvation Tube314. . . Dry Gas Tube315. . . Desolvation Tube Heater316. . . Block Heater32. . . Mass Separation Unit33. . . Detection Unit4. . . Control Unit41. . . First Measurement Control Unit42. . . Second Measurement Control Unit43. . . Reference Value Search Time Measurement Control Unit44. . . Device Parameter Automatic Adjustment Time Measurement Control Unit45. . . Device Parameter Storage Unit46. . . Third Measurement Control Unit5. . . Data Processing Unit51. . . Data Storage Unit52. . . Peak Detection Unit53. . . Data Correction Processing Unit54. . . Sensitivity Model Creation Unit55. . . Device Parameter Determination Unit56. . . Reference Value Determination Unit | 39,538 |
11942315 | DETAILED DESCRIPTION Some of the material described in this disclosure includes circuits and techniques for controlling an amplitude of a signal generated by an amplifier circuit for mass spectrometry. In one example, a mass spectrometer includes an ion source used to ionize an analyte. The resulting ions are then provided to a quadrupole mass analyzer for mass analysis. The quadrupole mass analyzer includes four parallel conductive (e.g., metallic) rods. In addition to direct current (DC) resolving voltages, two of the rods are applied a radio frequency (RF) signal that is 180° out-of-phase from an RF signal applied to the two other rods of the quadrupole. The RF signals applied to the rods oscillate within a peak-to-peak amplitude, resulting in an oscillating electric field used to manipulate the ions based on their mass-to-charge ratios (m/z). The RF signals are generated by an RF amplifier circuit and can measure in the thousands of volts (V) during the oscillation (e.g., up to a peak-to-peak amplitude of 8000 V). The RF signals are applied to the rods via an LC circuit, or a resonant circuit, modeled to include an inductor and a capacitor coupled in series to function as a resonator to store energy, magnify the voltage, and oscillate at a specific frequency. As previously discussed, the accuracy and the precision of the amplitude of the RF signal are important to allow for the proper generation of the oscillating electric field to manipulate the ions. That is, the amplitude of the RF signal is carefully applied to ensure that ions of a particular m/z are manipulated to transit through the quadrupole. As different ions of different m/z are selected for analysis, the amplitude of the RF signal is adjusted. Unfortunately, discrepancies between the actual and expected amplitude of the RF signal generated by the amplifier circuit can occur due to environmental factors (e.g., temperature changes), component degradation over time, or other factors. As described later in this disclosure, digital control of the amplitude of the RF signal caused by the amplifier circuit to be applied to the quadrupole is performed. For example, a controller circuit (composed of an arrangement of connected electronic components that collectively perform a desired function or operation) having digital logic functionality (e.g., implemented by a field programmable gate array (FPGA), a microprocessor, etc.) receives a digitized representation of the RF signal via an analog-to-digital converter (ADC) and determines the actual characteristics of the RF signal including its amplitude. The controller circuit can then compare the actual amplitude with the expected amplitude and, if different, access memory storing information indicating how the amplifier circuit should be driven to provide the RF signal with the expected amplitude. This results in the actual amplitude of the RF signal to adjust to be closer to, or the same as, the expected amplitude. Additionally, the controller circuit can implement digital signal processing (DSP) to identify the amplitude of the fundamental frequency of the RF signal while ignoring harmonics, allowing for more accurate driving of the amplifier for generating the RF signal. Also described later in this disclosure, the controller circuit can determine one or both of environmental or performance characteristics at the time including temperature of the components of the mass spectrometer (e.g., temperatures of the inductor coils of the resonant circuit or the quadrupole rods, temperature of a digital-to-analog converter) or mode of operation and how that mode of operation is being performed (e.g., how a scanning mode is performed or how a selected monitoring mode is being performed). Scanning modes can include but are not limited to full scans, product ion scans, precursor scans, and neutral loss scans. Selective monitoring modes can include but are not limited to selective ion monitoring (SIM) and selective reaction monitoring (SRM). The mode of operation can include the scan rate, the starting m/z, the ending m/z, and the time spent in that mode. The mode of operation can also include what mode of operation was performed previously or what mode of operation will be performed next. One or both of the current environmental and performance characteristics, along with one or both of historical environmental and performance characteristics, can also be used to more precisely drive the amplifier to generate the RF signal. Also described later in this disclosure, differences between phases of the actual RF signal and the RF amplifier input signal used to drive the amplifier can be determined. Differences in the phases are often the result of harmonics causing the actual RF signal to be different than the expected RF signal. This can be caused by the resonant frequency of the resonant circuit drifting during temperature changes affecting the resonant circuit's capacitance or inductance. The RF amplifier input signal can be adjusted to compensate for the phase differences, resulting in the actual RF signal to be closer to, or the same as, as the expected RF signal (e.g., at the resonant frequency). In addition to controlling the amplitude, the frequency or phase of the actual RF signal can also be controlled using the aforementioned techniques. By controlling the amplitude (or frequency or phase) of the RF signal via the controller circuit, the proper amplitude can be achieved much faster than when using an analog circuit to determine how to adjust the amplitude. This results in an increase in the throughput of the mass spectrometer because the “dead time” between scans is reduced. Additionally, fewer components are used, resulting in cost savings in comparison to using an analog circuit. Moreover, the controller circuit can record information related to the RF signal, the environment, and the performance, as well as access a history of past information, to make more informed decisions regarding how to adjust the amplitude. The controller circuit can also allow the mass spectrometer to self-calibrate to a level that is not achievable using analog techniques. In more detail,FIG.1illustrates an example of digital control for an amplitude of a RF signal generated by an amplifier.FIG.2illustrates an example of a block diagram for digital control of the amplitude of the RF signal ofFIG.1. InFIG.2, a RF signal applied to a quadrupole is digitized (205). For example, inFIG.1, RF input105is a signal that drives inputs of components of RF amplifier110. In response, RF amplifier generates RF signal115, which is a higher-power signal than RF input105. RF signal115is provided to terminals of inductors130aand130b(both of which are out-of-phase with respect to the other such that inductors130aand130provide out-of-phase signals to the corresponding rods) to cause generation of RF signals155and160, respectively. Inductor130ais coupled with rods125aand125bof quadrupole120, and inductor130bis coupled with rods125cand125dof quadrupole120. Resonant circuits are implemented via the inductances of the inductors and the capacitances of the rods (implementing a LC circuit) and, therefore, the voltage of RF signal115is magnified to provide out-of-phase RF signals155and160, for example, up to 8000 V peak-to-peak amplitude to rods125aand125b, and rods125cand125dof quadrupole120to generate the appropriate electric fields to manipulate ions in accordance with their m/z. The example ofFIG.1is only one type of circuit that can be implemented. For example, RF amplifier115can drive a primary coil which, in turn, drives secondary coils similar to inductors130aand130bto generate RF signals155and160. In another example, a resonant circuit need not be implemented. Rather, a non-resonant transformer or other circuit can be implemented. As shown inFIG.1, controller circuit135is provided a digitized representation of RF signal160via analog-to-digital converter (ADC)140. That is, ADC140receives RF signal160in an analog format, samples it, and generates a digital representation of RF signal160that is provided to controller circuit135. InFIG.1, this is depicted as ADC140receiving the RF signal after inductor. Though only RF signal160is digitized inFIG.1, RF signal155(which is out-of-phase with respect to RF signal160, as previously discussed) can also be tapped and digitized in a similar manner. Though depicted as a separate circuit, the functionality of ADC140can be implemented within controller circuit135. In one example, ADC140can be a 20 megahertz (MHz) ADC to sample a 1 MHz waveform to sample enough points for the digital representation of RF signal160. By digitizing RF signal160using ADC140, new information can be determined and used to more accurately drive RF amplifier110, which would otherwise not be possible in analog controls that are typically used with mass spectrometers. Returning toFIG.2, the actual amplitude of the digitized RF signal is then determined (210). For example, inFIG.1, controller circuit135receives the digital representation and determines the amplitude of RF signal160by identifying the highest peak or amplitude in data representing points of the waveform or using other techniques as discussed later herein. Next, inFIG.2, the actual amplitude is compared with the expected amplitude (215). For example, inFIG.1, controller circuit135compares the actual amplitude of RF signal160with the expected amplitude that RF signal160should be at for quadrupole120to generate an accurate and precise oscillating electric field that positions ions of a particular m/z within the stability region. The actual amplitude can differ than the expected amplitude due to changes in environmental conditions (e.g., temperature of components, noise causing interference on RF signal160or155, etc.), degradation of components of the mass spectrometer, etc. If controller circuit135determines that the actual amplitude differs from the expected amplitude, then the actual amplitude can be adjusted to be the same as or closer to the expected amplitude by driving RF amplifier circuit110differently via RF input105(e.g., by changing the amplitude of RF input105). In some implementations, a variable capacitor can be included in the resonant circuit and tuned (e.g., adjust its capacitance) to modify the amplitude. Using a variable capacitor can adjust the resonant frequency, but it would more difficult (but possible) to adjust the amplitude. Additionally, a variable inductor can be implemented in the resonant circuit and adjusted to change its inductance to modify the amplitude. By ensuring that RF signal160is at or close to the expected amplitude, the oscillating electric field generated by quadrupole120can allow for more careful selection of ions of a particular m/z to transit through for mass analysis. InFIG.2, if the actual amplitude is different from the expected amplitude, controller circuit135further determines the current performance and/or environmental characteristics (220) and then determines an amplitude correction using current and historical performance and/or environmental characteristics (225). For example, controller circuit135can include memory, or have access to memory, storing information regarding how quadrupole120(or other components of the mass spectrometer) has performed in the past, and the environmental conditions of quadrupole120in the past. Under these historical conditions, amplifier110might have been driven differently (i.e., the amplitude of RF input105might be different) to provide the expected amplitude on RF signal160. Thus, by comparing the current performance and environmental characteristics with the historical performance and environmental characteristics, along with the actual and expected amplitudes, an amplitude correction can be determined with all the information stored in memory, for example, via a lookup table (LUT). The amplitude correction represents how much the amplitude of RF input105should be adjusted such that RF signal160is closer to the expected amplitude. Controller circuit135can then adjust the amplitude of RF input105in accordance with the amplitude correction recommended in the LUT (e.g., increase or decrease the amplitude of RF input105by the amplitude correction) such that the actual amplitude of RF signal160is changed to get closer to, or even the same as, the expected amplitude. In the prior example, both performance and environmental characteristics are used. However, controller circuit135can use one or both of the performance and the environmental characteristics. For example, the amplitude correction can be determined using the current performance characteristics and the historical performance characteristics, but not use environmental characteristics (either current or historical). In another example, the amplitude correction can be determined using the current environmental characteristics and the historical environmental characteristics, but not use performance characteristics. The environmental and performance characteristics can include a variety of parameters. For example, environmental characteristics can include the ambient temperature or even the temperature of specific components of the mass spectrometer. The temperatures of inductors130aand130b, along with the temperatures of rods125a-dof quadrupole120affect the inductance and capacitance, respectively, of the resonant circuit and, therefore, any temperatures changes have an effect as to the amplitude of the RF signal applied to rods125a-d. Thus, controller circuit135can apply the amplitude correction factor by adjusting RF input105in view of the temperature of the component, resulting in the amplitude of RF signal160to be closer to the expected amplitude. Additionally, the temperature of any readback circuitry (e.g., ADC140) or RF amplifier110, can also be determined and used to modify the actual amplitude of RF signal160to get corrected towards the expected amplitude. The performance characteristics can include how the mass spectrometer is being used. For example, a quadrupole can be operated in a scanning or jumping mode. A full scan MS is an example of a scanning mode, while SIM and SRM are examples of jumping modes. For a scanning mode, RF signal160is continuously varied from a starting m/z point to an ending m/z point at a particular scan rate. For a jumping mode, RF signal160is stepped to a voltage for a particular m/z and held there or ramped slowly over a narrow m/z range. RF signal160is then changed, or jumped, to a voltage for the next m/z and this repeats until all the desired ions are analyzed. As a result, the specific mode of operation, scan rates, starting and ending m/z points (or corresponding voltages or amplitudes) can be used. Thus, how quadrupole120of the mass spectrometer is performing at the time that the actual amplitude of RF signal160is determined by controller circuit135is determined and used to apply the amplitude correction factor to RF input105(e.g., by changing the amplitude of RF input105). The current performance and environmental characteristics, along with amplitudes of RF input105and RF signal160, can also be added to the LUT. This allows for controller circuit135to continually store data regarding performance and environmental characteristics, the actual amplitude, and how the amplitude correction was applied to RF input105(e.g., at what amplitude RF input105should be driven at). By implementing much of the functionality with digital circuitry implemented by controller circuit135and ADC140, the actual amplitude of RF signal160can be more accurately controlled, the stability and calibration of the mass spectrometer is improved, and additional control strategies can be implemented, as discussed later herein. As previously discussed, resolving DC voltages are also applied to the rods of quadrupoles. Controller circuit135can also adjust the resolving DC voltage applied to rods120a-dif the actual resolving DC voltage is different than the expected resolving DC voltage.FIG.3illustrates an example of digital control for a resolving DC voltage.FIG.4illustrates an example of a block diagram for digital control for a resolving DC voltage. InFIG.4, the resolving DC voltage applied to a quadrupole can be determined (405). InFIG.3, resolving DC voltage driver305provides a DC voltage signal310at a particular resolving DC voltage needed by quadrupole120to generate the electric fields used to manipulate ions. Using voltage divider315to divide or scale down the voltage to a level that is safely accessible to controller circuit135, controller circuit135can then determine the actual voltage of DC voltage signal310. Returning toFIG.4, the actual voltage is compared with the expected voltage (410), the current performance and environmental characteristics are determined (415), and a DC voltage correction is determined using the current and historical performance and environmental characteristics (420). The DC voltage correction is then used to adjust the DC voltage (425). For example, inFIG.3, DC voltage input320is adjusted such that how resolving DC voltage driver305drives, or generates, DC voltage signal310is changed so that the proper resolving DC voltage is applied to the rods. Though resolving DC voltages are discussed in the aforementioned example, a DC offset that is applied to the rods to set the kinetic energy of the ions passing through the quadrupole can also be controlled in a similar manner. Additional functionality enabled by controller circuit135includes determining how the resonant circuit is performing.FIG.5illustrates an example of determining characteristics of a resonant circuit.FIG.6illustrates an example of a block diagram for determining characteristics of the resonant circuit. InFIG.6, an impulse waveform is provided to an amplifier (605). For example, inFIG.5, controller circuit135can generate impulse waveform510(e.g., a voltage pulse of a short time duration) as RF amplifier input105. Next, inFIG.6, RF signal160is digitized (610) and the resonant frequency of the resonant circuit is determined (615). For example, inFIG.5, frequency505of RF signal160is determined by digitizing RF signal160using ADC140. This allows for determining the frequency that the resonant circuit should resonant at, as well as allows for observation of harmonics that might be indicative of issues such as electrical cross-talk from other electrical components. The frequency of RF signal160provided by amplifier110via inductor130bshould be the same as or similar to the resonant frequency and, therefore, inFIG.6, the frequency of the RF amplifier input signal can be adjusted (620). For example, the frequency of RF input signal105can be set to be the same as the resonant frequency inFIG.5. Thus, controller circuit135can adjust not only the amplitude of RF input signal105(and subsequently, RF signals115,155, and160), but also the frequency of RF input signal105(and, therefore, RF signals115,155, and160). The RF signal can be digitized at both terminals of the inductor coils to provide additional information and adjustments.FIG.11illustrates another example of digital control for an amplitude of a RF signal generated by an amplifier. InFIG.11, RF signal115and RF signal160can both be provided to ADC140(or separate ADCs) for digitization and use by controller circuit135. That is, the RF signals at both terminals of coils130a(and/or130b) can be digitized and considered to adjust RF input signal105. For example, impulse waveform510inFIG.5is provided to RF amplifier110as RF input signal105inFIG.11, and both RF signal115and RF signal160can be digitized. By digitizing the RF signals at both terminals of inductor130b, more information regarding the separate inductance and capacitance components of the resonant circuit can be identified. As previously discussed, the resonant circuit is implemented via the inductances of the inductor coils and the capacitances of the rods of the quadrupole. How the inductance of the inductor coils (e.g., inductor130b) has changed can therefore be independently determined by analyzing RF signals at both terminals of the inductor coil. For example, differences in the phase of RF signals115and160can be determined. This accounts for some change in the resonant frequency. However, any remaining change is accounted for by changes in the capacitance. Changes in capacitance are indicative of changes in the geometry of the corresponding quadrupole rods, which can cause a mass drift due to the improper generation of the oscillating electric field. Thus, controller circuit135can determine the change in the inductance, account for the remaining change in the resonant frequency and correlate that to the change in capacitance, and then adjust RF input signal105inFIG.11accordingly. Additionally, controller circuit135can also adjust the resolving DC voltage (e.g., DC voltage signal310inFIG.3). Other techniques can also be used to determine the behavior of the resonant circuit. For example, the frequency of RF signal115can be determined from the frequency that the mass spectrometer is operating at. Impulse waveform510inFIG.5is provided to RF amplifier110as RF input signal105inFIG.11, and the frequency of RF signal160is determined. The frequency of RF signal160can therefore be compared with the frequency that the mass spectrometer is operating to determine the change in the resonant frequency due to the change in inductance. Additionally, how the resonant circuit is currently performing, as well as how it has performed in the past (e.g., by recording the results of the resonant frequency as impulse waveforms are provided), can be used to determine the health of the mass spectrometer. For example, identification of harmonics can be used to identify failing capacitors or inductors, including the inductors of the resonant circuit. Degradation of components can be identified over time as the resonant frequency is determined. Additionally, any of the aforementioned information determined in the examples (e.g., amplitude of RF signal160) can be stored and used to determine the health of the mass spectrometer. Based on the health, an alert indicating that the mass spectrometer needs maintenance can be generated (e.g., via a graphical user interface (GUI) on a monitor communicatively coupled with the mass spectrometer, via email or other communications, etc.), or even how the mass spectrometer performs can be adjusted. For example, the time to perform an operation (e.g., the scan time) can be adjusted, the voltage applied to a component can be adjusted, etc. in view of the health information. In another example, the temperature of a component (e.g., inductor coils or quadrupole rods) can be adjusted (e.g., cooled or heated via temperature adjusting devices such as fans or heaters, respectively) based on the health information as these affect the amplitude of the RF signals, as previously discussed. The adjustment of the amplitude of RF signal160can be constantly monitored and maintained at the expected amplitude if any drifts of the amplitude occurs. However, in some implementations, if the difference between the actual and expected amplitudes is below a threshold amount, then controller circuit135might not make adjustments. This might be performed because there might be some small changes due to noise and maintaining the amplitude as-is might not significantly affect the performance of quadrupole120. In some implementations, the amplitude of the RF signal at the fundamental frequency can be identified. For example, using digital signal processing (DSP) techniques such as a discrete cosine transform (DCT), the RF signal as captured using the ADC in the time domain can be expressed in the frequency domain. This provides the frequency components of the RF signal. Because the fundamental frequency is the lowest frequency of a periodic waveform, and the harmonics are multiples of the frequency, the fundamental frequency can be identified separately from the harmonics and, therefore, the amplitude of the frequency component at the fundamental frequency can be determined. By identifying the amplitude without harmonics, a more accurate adjustment of the RF signal can be performed. FIG.8illustrates an example of a block diagram for digital control of an amplitude of a RF signal by identifying harmonics. InFIG.8, the RF signal is digitized (805) and the fundamental frequency of the RF signal is identified (810). For example, a DCT is applied to the digital representation of the RF signal, effectively transforming the digital representation from the time domain to the frequency domain to show the amplitudes of the frequency components of the RF signal. Alternatively, a discrete Fourier transform (DFT) or a fast Fourier transform (FFT) can be applied. The fundamental frequency and its harmonics can be identified from the frequency components, and the amplitude of the frequency component at the fundamental frequency can be identified (815). For example, the lowest frequency can be the fundamental frequency. Then, a comparison of the amplitude of the frequency component at the fundamental frequency can be done with the expected amplitude of the RF signal (820). That is, a comparison of the amplitudes without harmonics can be performed by comparing the amplitude of the frequency component at the fundamental frequency and the amplitude of RF input105. The amplitude of the RF signal can then be adjusted based on the comparison (825), for example, in a similar manner as described above. Controller circuit can also identify other characteristics of RF signal160and make adjustments. For example, due to harmonics, the phase of RF signal160can be different than expected (e.g., different than the phase of the signal used to drive the RF amplifier). This occurs because, over time and as the capacitance and inductance of the resonant circuit change with temperature, the resonant frequency changes. Thus, the frequency of RF signal160can drift away from the resonant frequency of the resonant circuit and cause a phase difference. This, in turn, causes the amount of harmonic content to increase. Accordingly, by determining the phase of RF signal160, controller circuit can adjust the frequency of RF input105to drive RF amplifier110differently such that RF signal160is adjusted to be more in line with expectations. Thus, in addition to adjusting the amplitude of RF signal160to be in line with expectations, the frequency can also be adjusted to account for changes in the resonant frequency. FIG.9illustrates an example of a block diagram for digital control of a RF signal by identifying phase differences. InFIG.9, the RF signal is digitized (905) and the phase difference between the actual phase of the RF signal and the expected phase of the RF signal is identified (910). For example, the phase difference between RF signal160and RF input105being used to drive RF amplifier110can be determined. Based on the phase difference, the frequency of the RF signal is adjusted (915). For example, the frequency of RF input105can be changed such that RF amplifier110is driven differently, resulting in a frequency change in RF signals115,155, and160. The change in frequency introduced into RF input105can be based on the phase difference between the actual phase of RF signal160and the expected phase of RF signal160. In addition to determining the phase differences, the amount of harmonic content of RF signal160can also be determined and used to adjust RF signal160. For example, by using a DSP technique such as DCT, as previously discussed, the different frequency components of RF signal160can be identified using a number of techniques including determining the total harmonic distortion (THD). This provides a value of the harmonic components of RF signal160, though other techniques can also be used to relay the amount of harmonic content as a particular value (e.g., the number of frequency components that are harmonics, etc.). Thus, if the amount of harmonic content exceeds a threshold, then the frequency of RF signal160can be changed. As RF signal160is adjusted closer to the resonant frequency of the resonant circuit, the amount of harmonic content would be reduced. Thus, as RF signal160is sampled by the ADC, the amount of harmonic content can repeatedly be determined and used to adjust the frequency until the amount of harmonic content is below the threshold amount. If too much harmonic content is identified, then this might be indicative of poor health of components of the mass spectrometer, for example, issues with the coils of the resonant circuit that cause the frequency of RF signal160to be significantly off the resonant frequency. Thus, an alert indicating that the mass spectrometer needs maintenance can be generated, as previously discussed. In some implementations, controller circuit135can also adjust RF input105by introducing an out-of-phase harmonic signal to cancel or reduce a harmonic of RF signal160. For example, if a second harmonic is identified via the frequency components, a signal that is 180 degrees out-of-phase can be generated by controller circuit135and superimposed on RF input105. This out out-of-phase signal can attenuate the second harmonic observed on RF signal160due to the resulting destructive interference. Thus, the amount of harmonic content can be reduced and more accurate control of the quadrupole (or another component) can be provided. In some implementations, RF amplifier110can be operated in a non-linear fashion, or overdriven, to quickly achieve a steady-state RF signal. Based on how much to overdrive and the current phase difference between RF signal160and the expected phase (or the phase of RF input105), the phase of RF input105can be shifted to overdrive RF amplifier110for a faster transition speed to the steady-state. After the steady-state of RF signal160is achieved, the phase of RF input105can be shifted back, for example, to the resonant frequency. FIG.7illustrates an example of a mass spectrometer with digital control for an amplitude of an RF signal generated by an amplifier. InFIG.7, a mass spectrometer includes ion source710, quadrupole mass analyzer720, detector715, RF amplifier circuits740, controller circuit705. Controller circuit705includes or has access to memory storing instructions to perform the techniques described in the examples as well as any information used to perform the techniques. RF amplifier circuits740includes the circuitry described in the examples, including the resonant circuit, amplifier, and amplitude control circuit. Ion source710receives analyte725, for example, a peptide received from a separation device such as a liquid chromatography (LC) system and ionizes the received peptide to form ions. However, other types of analytes can be received and other separation techniques such as gas chromatography (GC) or capillary electrophoresis (CE) can also be used. The ions are then mass analyzed using mass analyzer720(e.g., a quadrupole). Detector715generates signals representative of m/z, which is interpreted by controller circuit705to generate or determine information that can be used to generate a mass spectrum. Other types of mass spectrometers such as tandem mass spectrometers can also be implemented. Though quadrupole mass analyzers and filters are described in the examples, other types of mass analyzers and filters can be used with the techniques described herein. Additionally, other components of mass spectrometers that use RF signals, such as ion guides, ion traps (including 3D ion traps, linear ion traps, etc.), other multipole assemblies (including hexapoles or octupoles), stacked ring ion guides, ion funnels, etc. can also be used with the techniques described herein. FIG.10illustrates an example of an electronic device which may be used to implement some of the examples. In some implementations, the electronic device ofFIG.10can store or use a computer program product including one or more non-transitory computer-readable media having computer programs instructed stored therein, the computer program instructions being configured such that, when executed by one or more computing devices, the computer program instructions cause the one or more computing devices to perform the techniques described herein. InFIG.10, computer system1100can implement any of the methods or techniques described herein. For example, computer system1100can implement controller705inFIG.7. Thus, the operation of components of the associated mass spectrometer may be adjusted in accordance with calculations or determinations made by computer system1100. In various embodiments, computer system1100can include a bus1102or other communication mechanism for communicating information, and a processor1104coupled with bus1102for processing information. In various embodiments, computer system1100can also include a memory1106, which can be a random-access memory (RAM) or other dynamic storage device, coupled to bus1102, and instructions to be executed by processor1104. Memory1106also can be used for storing temporary variables or other intermediate information during execution of instructions to be executed by processor1104. In various embodiments, computer system1100can further include a read only memory (ROM)1108or other static storage device coupled to bus1102for storing static information and instructions for processor1104. A storage device1110, such as a magnetic disk or optical disk, can be provided and coupled to bus1102for storing information and instructions. In various embodiments, computer system1100can be coupled via bus1102to a display1112, such as a cathode ray tube (CRT) or liquid crystal display (LCD), for displaying information to a computer user. An input device1114, including alphanumeric and other keys, can be coupled to bus1102for communicating information and command selections to processor1104. Another type of user input device is a cursor control1116, such as a mouse, a trackball or cursor direction keys for communicating direction information and command selections to processor1104and for controlling cursor movement on display1112. This input device typically has two degrees of freedom in two axes, a first axis (i.e., x) and a second axis (i.e., y), that allows the device to specify positions in a plane. A computer system1100can perform the techniques described herein. Consistent with certain implementations, results can be provided by computer system1100in response to processor1104executing one or more sequences of one or more instructions contained in memory1106. Such instructions can be read into memory1106from another computer-readable medium, such as storage device1110. Execution of the sequences of instructions contained in memory1106can cause processor1104to perform the processes described herein. In various embodiments, instructions in the memory can sequence the use of various combinations of logic gates available within the processor to perform the processes describe herein. Alternatively hard-wired circuitry can be used in place of or in combination with software instructions to implement the present teachings. In various embodiments, the hard-wired circuitry can include the necessary logic gates, operated in the necessary sequence to perform the processes described herein. Thus implementations described herein are not limited to any specific combination of hardware circuitry and software. The term “computer-readable medium” as used herein refers to any media that participates in providing instructions to processor1104for execution. Such a medium can take many forms, including but not limited to, non-volatile media, volatile media, and transmission media. Examples of non-volatile media can include, but are not limited to, optical or magnetic disks, such as storage device1110. Examples of volatile media can include, but are not limited to, dynamic memory, such as memory1106. Examples of transmission media can include, but are not limited to, coaxial cables, copper wire, and fiber optics, including the wires that comprise bus1102. Common forms of non-transitory computer-readable media include, for example, a floppy disk, a flexible disk, hard disk, magnetic tape, or any other magnetic medium, a CD-ROM, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes, a RAM, PROM, and EPROM, a FLASH-EPROM, any other memory chip or cartridge, or any other tangible medium from which a computer can read. In accordance with various embodiments, instructions configured to be executed by a processor to perform a method are stored on a computer-readable medium. The computer-readable medium can be a device that stores digital information. For example, a computer-readable medium includes a compact disc read-only memory (CD-ROM) as is known in the art for storing software. The computer-readable medium is accessed by a processor suitable for executing instructions configured to be executed. In various embodiments, the methods of the present teachings may be implemented in a software program and applications written in conventional programming languages such as C, C++, etc. While the techniques are described in conjunction with various implementations or embodiments, it is not intended that the techniques be limited to such embodiments. On the contrary, the techniques encompass various alternatives, modifications, and equivalents, as will be appreciated by those of skill in the art. Further, in describing various embodiments, the specification may have presented a method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. As one of ordinary skill in the art would appreciate, other sequences of steps may be possible. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. In addition, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the various embodiments. The embodiments described herein, can be practiced with other computer system configurations including hand-held devices, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers and the like. The embodiments can also be practiced in distributing computing environments where tasks are performed by remote processing devices that are linked through a network. It should also be understood that the embodiments described herein can employ various computer-implemented operations involving data stored in computer systems. These operations are those requiring physical manipulation of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. Further, the manipulations performed are often referred to in terms, such as producing, identifying, determining, or comparing. Any of the operations that form part of the embodiments described herein are useful machine operations. The embodiments, described herein, also relate to a device or an apparatus for performing these operations. The systems and methods described herein can be specially constructed for the required purposes or it may be a general purpose computer selectively activated or configured by a computer program stored in the computer. In particular, various general purpose machines may be used with computer programs written in accordance with the teachings herein, or it may be more convenient to construct a more specialized apparatus to perform the required operations. Certain embodiments can also be embodied as computer readable code on a computer readable medium. The computer readable medium is any data storage device that can store data, which can thereafter be read by a computer system. Examples of the computer readable medium include hard drives, network attached storage (NAS), read-only memory, random-access memory, CD-ROMs, CD-Rs, CD-RWs, magnetic tapes, and other optical and non-optical data storage devices. The computer readable medium can also be distributed over a network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion. | 40,825 |
11942316 | DETAILED DESCRIPTION A analyser arrangement1in the form of a photo-electron spectrometer of the hemispherical deflector type, in which an aperture device31according to an embodiment of the present invention may be implemented, is illustratedFIG.1. Thus,FIG.1illustrates an analyser arrangement according to an embodiment of the present invention. In the photo-electron spectrometer of the hemispherical deflector type, a central component is the measurement region3in which the energies of the electrons are analysed. The measurement region3is formed by two concentric hemispheres5, mounted on a base plate7, and with an electrostatic field applied between them. The electrons enter the measurement region3through an entrance8and electrons entering the region between the hemispheres5with a direction close to perpendicular to the base plate7are deflected by the electrostatic field, and those electrons having a kinetic energy within a certain range defined by the deflecting field will reach a detector arrangement9after having travelled through a half circle. In a typical instrument, the electrons are transported from their source (typically a sample33with a sample surface Ss (FIG.2) that emits electrons after excitation with photons, electrons or other particles) to the entrance8of the hemispheres by an electrostatic lens system13. The lens system13shown inFIG.1comprises an optical axis15, a first end36and a second end37at a distance along the optical axis15from the first end36. The lens system13is arranged to form a particle beam of charged particles, emitted from the sample surface Ss of the particle emitting sample33, which enter the lens system13at the first end36and to transport the charged particles to the second end37. The lens system13also comprises a plurality of lenses L1-L3having a common and substantially straight optical axis15. The photoelectrons from the sample surface Ss enters the electrostatic lens system13through an aperture device31arranged at the first end of the lens system13. For the following description, a Cartesian coordinate system with its z-axis along the optical axis15of the lens system13(in most cases an axis of rotational symmetry) will be used, and with the hemispheres symmetrical with respect to the (y, z) plane. The directions of the electron trajectories are described by their angles θxagainst the (y, z) plane and θyagainst the (x, z) plane. The directions x, y, z, are indicated inFIG.1. The lens system13and the detector arrangement9will only accept electrons, which are emitted within a limited area perpendicular to the optical axis15and within a limited angular range. Furthermore, the source has to be positioned within a narrow range in the z-direction to achieve the best properties (in terms of sensitivity and resolution). This necessitates mounting the sample on a manipulator17allowing both translations and rotations in all coordinate directions, i.e. six degrees of freedom. Also shown inFIG.1is a gas supply device42, which provides pressurized gas to the sample33. FIG.2shows in larger detail the aperture device31in cross section. The aperture device31is attachable to the lens system13. The aperture device31comprises an end surface S which is to be arranged facing the sample surface Ss, at least one aperture38arranged in the end surface S for allowing at least a part of the charged particles emitted from the sample surface Ss to enter the lens system13(FIG.1) when the aperture device31is attached to the lens system13(FIG.1). The aperture device also comprises a length axis32which extends through the centre of said at least one aperture38and is essentially perpendicular to the end surface S. The aperture device31also comprises at least one gas outlet10, which is arranged at a transverse distance T perpendicular from the length axis32, and is arranged to direct gas into a volume between the at least one aperture38and the sample surface Ss, wherein the end surface S within a distance, equal to ⅓ of the transverse distance T, perpendicular from the length axis32has a variation ΔL along the length axis32being smaller than ⅙ of the transverse distance T. Preferably, the photoelectron spectrometer1is arranged with an end in a vacuum chamber50(FIG.1), which is continuously vacuum pumped to keep the pressure in the vacuum chamber50considerably lower than the pressure in the volume between the at least one aperture38and the sample surface Ss. The aperture device31also comprises a gas inlet41for connection to the gas supply device42(FIG.1). When providing a flow of pressurized gas from the gas supply device42to the gas inlet41, gas will flow out of the gas outlet10and provide a considerably higher pressure close to the outlet10than the pressure in the chamber far from the gas outlet10. The pressure in the vacuum chamber50may be, e.g., below 1 mbar when a pressure of between 100 mbar and 1 bar is aimed at in the volume between the at least one aperture38and the sample surface Ss. The pressure in the vacuum chamber50strongly depends on the pumping capacity of pumps that are connected to the vacuum chamber. This pressure difference will provide a steep pressure gradient from the volume between the sample surface Ss and the end surface and outwards. This pressure gradient will give rise to an flow of gas outwards from the volume between the sample surface Ss and the aperture38. This will ensure that the gas at the sample is only the desired gas, which is introduced via the gas inlet41. The pressure at the sample surface is dependent on the pressure of the gas in the gas inlet10, the flow of gas in the gas inlet10and the shape of the volume between the at least one aperture38and the sample surface Ss. To be able to reach pressures close to 1 bar at the sample surface Ss below the aperture38it is necessary that the end surface S within a distance, equal to one third of the transverse distance T, perpendicular from the length axis32has a variation along the length axis ΔL being smaller than ⅙ of the transverse distance T. Another factor that effects the pressure that is possible to achieve is the distance L between the sample surface Ss and the aperture38. A shorter distance L enables a higher pressure, when the shape of the end surface and the flow of gas from the gas inlet10is kept constant. In order to reach 1 bar with as low gas flow as possible the variation ΔL, within half the transverse distance T from the length axis32, along the length axis32of the end surface should be smaller than 1/10 of the transverse distance and preferably smaller than 1/30 of the transverse distance. Also shown inFIG.2are the incoming x-rays, which are used for the photoemission of particles such as electrons from the sample surface Ss of the sample33. As can be seen inFIG.2the possible angle of incidence of the x-rays on the sample surface Ss is limited by the shape of the aperture device and the distance L between the aperture device31and the sample surface Ss. FIG.4is a view along the length axis towards the end surface of the aperture device inFIG.2. As can be seen inFIG.4the gas outlet10is arranged at a transverse distance T from the aperture38. A third of the transverse distance T/3is also indicated inFIG.4. The gas inlet41is shown with dashed lines. FIG.3shows an aperture device31according to an alternative embodiment of the present invention.FIG.6is a view along the length axis towards the end surface of the aperture device shown inFIG.3. In the embodiment shown inFIG.3the end surface S is essentially flat within a distance of 1.5×T from the length axis32. This enables a high gas pressure at the sample surface below the apertures38without an excessive pressure in the gas outlet10. The gas outlet10is ring formed as can be seen inFIG.6. The gas outlet is connected to six gas inlets41which in turn are connected to the gas supply device42, which provides pressurized gas to the sample surface Ss. This provides an even pressure distribution in the volume between the at least one aperture38and the sample surface Ss. The essentially flat end surface S limits the possible angle of incidence of the x-rays used for the photoemission of particles, i.e. electrons, from the sample surface Ss. This will result in an elongated form of the region on the sample surface Ss, from which charged particles are emitted. In order to enlarge the area from which charged particles may enter the lens system13the aperture device31comprises a plurality of apertures38arranged along a line as can be seen inFIG.6. The line52along which the apertures38are arranged is aligned with the length axis, of the region on the sample surface, from which charged particles are emitted, which is in the left-right direction inFIG.3. InFIG.6it is also shown how the gas inlets41are arranged in the aperture device31. The extension of the transverse distance T and a third of the transverse distance T/3are also illustrated inFIGS.3and6. InFIG.6it is shown that the aperture device comprises five apertures38arranged along a line. Each aperture38is circular and has a diameter D. The apertures are arranged at a distance d from each other. According to theoretical calculations, the distance L between an aperture38and the sample33should be twice as large as the diameter D of an aperture38. This is true for single apertures38. However, as long as the distance d between the apertures38is at least 1.5, preferably 2 times the diameter of an aperture38the above ratio is true also for a plurality of apertures38. With a distance d between the apertures38being at least 1.5 times the diameter D of the aperture38the so-called cross talk between the apertures38may be ignored, i.e. the apertures38do not affect each other. The diameter d of an aperture38can, according to an embodiment, be less than 200 μm, preferably less than 100 μm, and most preferred, less than 50 μm. When increasing the pressure at the sample surface Ss the mean free path for the electrons decreases. The mean free path for electrons in carbon monoxide is dependent on the pressure. According to theoretical calculations the mean free path for electrons in carbon monoxide is 30 μm at a pressure of 1 bar of carbon monoxide. The diameter D of the aperture should be small to allow the aperture to be placed close to the sample while maintaining a sufficiently high pressure at the sample surface Ss. According to theoretical calculations the distance d between the aperture38and the sample surface Ss should be kept at twice the diameter D of the aperture to achieve a sufficiently high pressure at the sample surface Ss. The inventors have, however, discovered that even if the pressure drops at the sample surface Ss, when the sample surface Ss is arranged closer to the aperture38than twice the diameter D of the aperture38the pressure drop is predictable. Thus, a predictable pressure is achievable for distances d between the sample surface and the aperture38being as small as equal to the diameter D of the aperture38. To achieve a predetermined pressure at the sample surface Ss when the aperture38is arranged at a distance d equal to the diameter D of the aperture38from the sample surface Ss, the pressure, at a distance of twice the diameter D, has to be higher than the desired pressure. For a pressure of 1 bar of carbon monoxide at the sample surface a diameter of less than 50 μm would enable a distance between the sample surface and the aperture of less than 50 μm, which would result in a reasonable number of electrons entering the aperture38. The gas outlet is confined between an inner edge60and an outer edge61. The outer edge61is at a distance E, along the length axis32, from the aperture device1being smaller than ¼ of the transverse distance T, preferably smaller than 1/10 of the transverse distance T and most preferred smaller than 1/30 of the transverse distance T. FIG.5is a view along the length axis towards the end surface of the aperture device according to an alternative embodiment of the present invention. InFIG.5the aperture device comprises five apertures38arranged along a line. Each aperture38is circular and has a diameter D. The apertures are arranged at a distance d from each other being two times the diameter D of the apertures for the reason discussed above. The two gas outlets10are formed elongated and are arranged at opposite sides of the apertures38. FIG.7is a detailed view in cross section of the aperture device31according to an alternative embodiment of the present invention. In contrast to the embodiment shown inFIG.2, the gas outlet10is arranged opposite to the aperture38, i.e., on the same side as the sample33. The gas outlet10is ring-formed in the embodiment shown inFIG.7. The gas inlet41is also ring-formed. The aperture device38has an end surface S, which within a distance, equal to a third of the transverse distance T, perpendicular from the length axis32has a variation along the length axis ΔL being smaller than ⅙ of the transverse distance T. The aperture device31also comprises a groove53encircling the aperture38. The groove is arranged opposite to the gas outlet10. When gas flows out of the outlet10it will bounce back from the groove53towards the sample surface Ss. A ridge54constitutes the outer edge of the groove53. The ridge54constitutes a constriction surface48at a constriction distance X from the length axis. The constriction distance is approximately equal to 1.5 T inFIG.7. The constriction surface is arranged at a larger or equal distance along the length axis32from the sample surface Ss compared to the distance between the aperture38and the sample surface Ss. As can be seen inFIG.7the gas outlet10is slightly directed towards the length axis32. FIG.8shows in cross section an aperture device according to an alternative embodiment of the present invention together with the end of the lens system13. The aperture device31is attached to the end of the lens system13by means of a connection means46. The aperture device31comprises gas inlets and an aperture38as has been described above. The end surface S is essentially flat and is at a constant distance L from the sample surface Ss. A lens opening43is arranged at the end of the lens system13. The lens opening is larger than the aperture38. The interior volume44of the lens system13is vacuum pumped similarly to the embodiment shown inFIG.1. A separate volume45is formed between the end of the lens system13and the aperture device31and is inFIG.8also delimited by the connection means46. The separate volume45may be vacuum pumped separately from the interior volume44of the lens system or be vacuum pumped through the lens opening43. The incident x-rays are shown inFIG.8as coming at a small angle between the sample surface and the aperture device31. It might be possible to manufacture the entire or a part of the aperture device in a material being at least partly transparent to x-rays. An example of such a material is silicon nitride. FIG.9shows in cross section an aperture device31according to an alternative embodiment of the present invention. As can be clearly seen inFIG.9the end surface has large variation along the length axis32. At a constriction distance X perpendicular from the length axis32the end surface has a constriction surface48. In order for gas to pass from the volume between the aperture and the sample surface Ss, it has to pass the constriction surface48. The distance between the constriction surface48and the sample surface Ss is larger than or equal to the distance L between the aperture and the sample surface Ss. The deviation Y of the constriction surface48along the length axis32in relation to the end surface at the aperture38is indicated inFIG.9. The deviation Y is smaller than the square of the transverse distance T divided by the constriction distance X, i.e. Y<T2/X, and is preferably smaller than the square of the transverse distance T divided by 10 times the constriction distance X, i.e. Y<T2/10X. Thus, for larger distances the deviation should be smaller to minimize the flow area out from the high-pressure region. The constriction surface should not be closer than the aperture to the sample surface to allow the aperture to be arranged close to the sample surface. For large constriction distances X, the possible incident angle for radiation onto the sample surface Ss is limited. To enable a larger incident angle a window49transparent to radiation may be arranged in the aperture device31. An alternative to a window49is to have a part of the constriction surface48farther away from the sample surface Ss than the limits defined above. This is shown by the edge51to the right inFIG.9. FIG.10shows schematically in cross section an aperture device31inFIG.10is similar to the aperture device31inFIG.2. Only the differences betweenFIG.2andFIG.10will be described. To the left inFIG.10the end surface Ss within a distance equal to the transverse distance T, perpendicular from the length axis32has a variation ΔL along the length axis32being smaller than ¼ of the transverse distance T. This limitation ensures a sufficiently high pressure at the sample surface. To the right inFIG.10the end surface S does not fulfil the above limitation. This allows the x-rays to have a larger angle of incidence at the sample surface Ss. In order to maintain a sufficiently high pressure in the volume between the aperture and the sample surface the part of the end surface that does not fulfil the above limitation should not exceed 25% of the area and preferably not exceed 10% of the area. The above described embodiments may be amended in many ways without departing from the scope of the invention, which is limited only by the appended claims. | 17,745 |
11942317 | DESCRIPTION OF THE ILLUSTRATIVE EMBODIMENTS For the purposes of promoting an understanding of the principles of this disclosure, reference will now be made to a number of illustrative embodiments shown in the attached drawings and specific language will be used to describe the same. This disclosure relates to apparatuses and techniques for measuring particle charges of a sample over at least one range of differing physical and/or chemical conditions in which the sample particles undergo structural changes, and for analyzing the resulting measurements to identify new structural subspecies as a function of at least particle charge. For purposes of this document, the terms “charged particle” and “ion” may be used interchangeably, and both terms are intended to refer to any particle having a net positive or negative charge. The term “charge magnitude” should be understood to mean the number of charges, i.e., the number of elemental charges “e,” of a charged particle, such that the terms “charge magnitude” and “number of charges of a charged particle” are synonymous and may be used interchangeably. A charged particle having a charge of 50 e thus has a charge magnitude of 50 e. The phrase “at least one range of differing physical and/or chemical conditions in which the sample particles undergo structural changes” should be understood to mean any set or progression of changing physical conditions to which the sample particles are subjected before and/or after ionization thereof in or during which the sample particles undergo structural changes, any set or progression of changing chemical conditions to which the sample particles are subjected before and/or after ionization thereof in or during which the sample particles undergo structural changes, and/or any combination of one or more such sets or progressions of changing physical and/or chemical conditions in or during which the sample particles undergo structural changes. An example of such physical conditions may include, but is not limited to, sample and/or charged particle temperature, such that a range of differing physical conditions is defined by a range of differing or changing temperatures to which the sample and/or charged particles are subjected. Another example of such physical conditions may include, but is not limited to, sample and/or charged particle pressure, such that a range of differing physical conditions is defined by a range of differing or changing pressures to which the sample and/or charged particles are subjected, or the like. An example of such chemical conditions may include, but is not limited to, a sample in the form of a mixture or solution in which the content or makeup of the mixture or solution changes, such that a range of differing or changing chemical conditions of the sample mixture or solution is defined by changes in the content or makeup of the sample mixture or solution, e.g., by adding and/or removing components to/from the sample mixture or solution, by changing the relative concentrations in the sample mixture or solution of two or more of its components, etc. Another example of such chemical conditions may include, but is not limited to, a chemical reaction between two or more components of a mixture or solution following combining such components together into, or to form, the mixture or solution, such that a range of differing or changing chemical conditions of the sample mixture or solution is defined by changes in the chemical properties of a newly formed mixture or solution as the components chemically react with one another over some period of time, e.g., up to and including an equilibrium of the mixture or solution. It is to be understood that the phrase “at least one range of differing physical and/or chemical conditions in which the sample particles undergo structural changes” may be or include a single range of a differing physical condition, a single range of a differing chemical condition, two or more ranges of the same or different changing physical conditions, two or more ranges of the same or different changing chemical conditions, or any combination of the foregoing. In any case, the term “structural changes” should be understood to mean any detectable, i.e., measurable, change in the structure(s) of one or more of the sample particles. Examples of such structural changes that a sample particle may undergo may include, but are not limited to, any conformational change, dissociation of a dimer, tetramer or larger macromolecular assembly into fragments, loss of a small ligand (e.g., drug), and/or any change that results in aggregation, assembly or related phenomena. It will be further understood that the term “melting transition” will refer to a structural change that a particle undergoes at a corresponding “melting temperature” thereof, and that the term “melting profile” will refer to the behavior of one or more properties of a particle within a specified temperature range which includes, i.e., which passes through, a melting temperature thereof. Referring now toFIG.1, a diagram is shown of an instrument10for measuring and analyzing mass and charge of ionized sample particles over a at least one range of differing physical and/or chemical conditions in which the sample particles undergo structural changes to identify new structural subspecies of the sample. In the illustrated embodiment, the instrument10illustratively includes an ion source region12having an outlet coupled to an inlet of a mass spectrometer14. The ion source region12illustratively includes an ion generator16configured to generate ions, i.e., charged particles, from a sample18. The ion generator16is illustratively implemented in the form of any conventional device or apparatus for generating ions from a sample. As one illustrative example, which should not be considered to be limiting in any way, the ion generator16may be or include a conventional electrospray ionization (ESI) source, a matrix-assisted laser desorption ionization (MALDI) source or other conventional ion generator configured to generate ions from the sample18. The sample from which the ions are generated may be any biological or other material, or any mixture of biological and/or non-biological components. In some embodiments, the sample18may be dissolved, dispersed or otherwise carried in solution, although in other embodiments the sample may not be in or part of a solution. In the illustrated embodiment, a voltage source VS1is electrically connected to a processor20via a number, J, of signal paths, where J may be any positive integer, and is further electrically connected to the ion source region12via a number, K, of signal paths, where K may likewise be any positive integer. In some embodiments, the voltage source VS1may be implemented in the form of a single voltage source, and in other embodiments the voltage source VS1may include any number of separate voltage sources. In some embodiments, the voltage source VS1may be configured or controlled to produce and supply one or more time-invariant (i.e., DC) voltages of selectable magnitude. Alternatively or additionally, the voltage source VS1may be configured or controlled to produce and supply one or more switchable time-invariant voltages, i.e., one or more switchable DC voltages. Alternatively or additionally, the voltage source VS1may be configured or controllable to produce and supply one or more time-varying signals of selectable shape, duty cycle, peak magnitude and/or frequency. The processor20is illustratively conventional and may include a single processing circuit or multiple processing circuits. The processor20illustratively includes or is coupled to a memory22having instructions stored therein which, when executed by the processor20, cause the processor20to control the voltage source VS1to produce one or more output voltages for selectively controlling operation of the ion generator16. In some embodiments, the processor20may be implemented in the form of one or more conventional microprocessors or controllers, and in such embodiments the memory22may be implemented in the form of one or more conventional memory units having stored therein the instructions in a form of one or more microprocessor-executable instructions or instruction sets. In other embodiments, the processor20may be alternatively or additionally implemented in the form of a field programmable gate array (FPGA) or similar circuitry, and in such embodiments the memory22may be implemented in the form of programmable logic blocks contained in and/or outside of the FPGA within which the instructions may be programmed and stored. In still other embodiments, the processor20and/or memory22may be implemented in the form of one or more application specific integrated circuits (ASICs). Those skilled in the art will recognize other forms in which the processor20and/or the memory22may be implemented, and it will be understood that any such other forms of implementation are contemplated by, and are intended to fall within, this disclosure. In some alternative embodiments, the voltage source VS1may itself be programmable to selectively produce one or more constant and/or time-varying output voltages. In the illustrated embodiment, the voltage source VS1is illustratively configured to be responsive to control signals produced by the processor20to produce one or more voltages to cause the ion generator16to generate ions from the sample18. In some embodiments, the sample18is positioned within the ion source region12, as illustrated inFIG.1, and in other embodiments the ion source18is positioned outside of the ion source region12. In one example embodiment, which should not be considered to be limiting any way, the sample18is provided in the form of a solution and the ion generator16is a conventional electrospray ionization (ESI) source configured to be responsive to one or more voltages supplied by VS1to generate ions from the sample18in the form of a fine mist of charged droplets. It will be understood that ESI and MALDI, as described hereinabove, represent only two examples of myriad conventional ion generators, and that the ion generator16may be or include any such conventional device or apparatus for generating ions from a sample whether or not in solution. In the illustrated embodiment, the instrument10includes a thermal energy source24is configured to selectively thermally energize, i.e., transfer thermal energy to, the sample18and/or to the charged particles exiting the ion generator16prior to entrance of the charged particles into the mass spectrometer14. In some embodiments, examples of which will be described below, the thermal energy source24may not be utilized, and in such embodiments the thermal energy source24may be omitted. In some embodiments, the thermal energy may be in the form of heat transferred from the source24to the sample particles, and in other embodiments the thermal energy may be in the form of heat transferred from the sample particles to the source24, i.e., cooling of the sample particles. In some embodiments, the source24may include both heating and cooling capabilities so that the sample temperature may be swept through ambient temperature from warmer to cooler or from cooler to warmer, or may be swept from any of cold to colder, colder to less cold, cold or cool to warm or hot, warm or hot to cool or cold, warm to warmer, warmer to less warm, warm to hot, hot to warm, etc. Example heat sources24may include, but are not limited to, conventional solution heaters and heating units, one or more sources of radiation, e.g., infrared, laser, microwave or other, at any radiation frequency, one or more heated gasses or other fluid(s) or the like, and example cooling sources24may include, but are not limited to, conventional solution chillers, one or more chilled gasses or other fluid(s), or the like. In some embodiments, as illustrated by example inFIG.1, the thermal energy source24is electrically connected to the voltage source VS1, and the voltage source VS1is configured to be responsive to one or more control signals produced by the processor20to produce one or more corresponding voltages to control thermal energy produced by the thermal energy source24. In alternate embodiments, the thermal energy source24may be configured to be responsive to control signals produced by the processor20to selectively produce thermal energy, and in such embodiments the thermal energy source24may be electrically connected directly, or via conventional circuitry, to the processor20as illustrated by dashed-line representation inFIG.1. In any case, in one embodiment the thermal energy source24may be implemented in the form of one or more conventional heaters or heating elements and/or one or more conventional coolers or cooling elements, coupled to the sample18, e.g., in the form of a solution, mixture or otherwise. In this embodiment, the thermal energy source24is responsive to one or more voltages produced by the voltage source VS1and/or to one or more control signals produced by the processor20, to control the temperature of the sample18of uncharged particles to a target temperature by heating or cooling the sample18to the target temperature. Charged particles generated by the ion generator16from the sample18thus enter the mass spectrometer14at the target temperature. Alternatively or additionally, the thermal energy source24may be implemented in the form of one or more devices for thermally energizing charged particles exiting the ion generator16and prior to entrance into the mass spectrometer14. In this embodiment, the thermal energy source24is responsive to one or more voltages produced by the voltage source VS1and/or to one or more control signals produced by the processor20, to control the temperature of the charged particles exiting the ion generator16to a target temperature by heating or cooling the charged particles prior to entry into the mass spectrometer14. As with the sample temperature control embodiment, the charged particles generated by the ion generator16likewise enter the mass spectrometer14at the target temperature. In any case, it will be understood that the target temperature may be any temperature above or below ambient. Some examples of such a thermal energy source24and operation thereof for heating the ionized particles are disclosed in co-pending International Application No. PCT/US2018/064005, filed Dec. 5, 2018, the disclosure of which is incorporated herein by reference in its entirety. Those skilled in the art will recognize other structures and/or techniques for controlling the temperature of charged particles entering the mass spectrometer14, by heating or cooling prior to or after inducing charge thereon, and it will be understood that any such other structures and/or techniques are intended to fall within the scope of this disclosure. In some embodiments, one or more conventional sensors25may optionally be operatively coupled to the ion source region12and electrically coupled to the processor20as illustrated inFIG.1by dashed line representation. In such embodiments, the one or more sensors25is/are illustratively configured to provide one or more sensor signals to the processor20corresponding to the operating temperature of the thermal energy source24, the temperature of the sample18and/or the temperature of the charged particles exiting the ion generator16and entering the mass spectrometer14, or to provide one or more sensor signals to the processor20from which the operating temperature of the thermal energy source24, the temperature of the sample18and/or the temperature of the charged particles exiting the ion generator16and entering the mass spectrometer14can be determined or estimated. The mass spectrometer14illustratively includes two sections coupled together; an ion processing region26and an ion detection region28. A second voltage source VS2is electrically connected to the processor20via a number, L, of signal paths, where L may be any positive integer, and is further electrically connected to the ion processing region26via a number, M, of signal paths, where M may likewise be any positive integer. In some embodiments, the voltage source VS2may be implemented in the form of a single voltage source, and in other embodiments the voltage source VS2may include any number of separate voltage sources. In some embodiments, the voltage source VS2may be configured or controlled to produce and supply one or more time-invariant (i.e., DC) voltages of selectable magnitude. Alternatively or additionally, the voltage source VS2may be configured or controlled to produce and supply one or more switchable time-invariant voltages, i.e., one or more switchable DC voltages. Alternatively or additionally, the voltage source VS2may be configured or controllable to produce and supply one or more time-varying signals of selectable shape, duty cycle, peak magnitude and/or frequency. As one specific example of the latter embodiment, which should not be considered to be limiting in any way, the voltage source VS2may be configured or controllable to produce and supply one or more time-varying voltages in the form of one or more sinusoidal (or other shaped) voltages in the radio frequency (RF) range. In some embodiments, the mass spectrometer14is configured to measure both mass and charge magnitudes of charged particles generated by the ion generator16as illustrated by example inFIG.1. In such embodiments, the ion detection region is electrically connected to input(s) of each of a number, N, of charge detection amplifiers CA, where N may be any positive integer, and output(s) of the number, N, of charge detection amplifiers CA is/are electrically connected to the processor20as shown inFIG.1. The charge amplifier(s) CA is/are each illustratively conventional and responsive to charges induced by charged particles on one or more respective charge detectors disposed in the charge detection region28to produce corresponding charge detection signals at the output thereof, and to supply the charge detection signals to the processor20. In one embodiment in which the mass spectrometer14is provided in the form of a mass spectrometer configured to measure both mass and charge magnitudes of charged particles generated by the ion generator16, the mass spectrometer14may be implemented in the form of a charge detection mass spectrometer (CDMS), wherein the ion processing region26is or includes a conventional mass spectrometer or mass analyzer and the ion detection region28illustratively includes one or more corresponding CDMS charge detectors. In some embodiments, the one or more CDMS charge detectors may be provided in the form of one or more electrostatic linear ion traps (ELITs), and in other embodiments the one or more CDMS charge detectors may be provided in the form of at least one orbitrap. In some embodiments, the CDMS charge detector(s) may include at least one ELIT and at least one orbitrap. CDMS is illustratively a single-particle technique typically operable to measure mass and charge magnitude values of single ions, although some CDMS detectors have been designed and/or operated to measure mass and charge of more than one charged particle at a time. Some examples of CDMS instruments and/or techniques, and of CDMS charge detectors and/or techniques, which may be implemented in the mass spectrometer14ofFIG.1are disclosed in co-pending International Application Nos. PCT/US2019/013251, PCT/US2019/013274, PCT/US2019/013277, PCT/US2019/013278, PCT/US2019/013280, PCT/US2019/013283, PCT/US2019/013284 and PCT/US2019/013285, all filed Jan. 11, 2019, and the disclosures of which are all incorporated herein by reference in their entireties. In another embodiment in which the mass spectrometer is provided in the form of a mass spectrometer configured to measure both mass and charge magnitudes of charged particles generated by the ion generator16, the mass spectrometer14may be implemented in the form of a mass spectrometer configured to measure mass-to-charge ratios of charged particles and further configured to simultaneously measure charge magnitudes of the charged particles. In such embodiments, the ion processing region26is or includes an ion acceleration region and/or a scanning mass-to-charge ratio filter, and the ion detection region28illustratively includes a charge detector array disposed in an electric field-free drift region or drift tube. In such embodiments, a conventional ion detector30, e.g., a conventional microchannel plate detector or other conventional ion detector, is positioned at the outlet end of the drift region or drift tube and is electrically connected to the processor as illustrated by dashed-line representation inFIG.1. Some example embodiments of such a mass spectrometer are disclosed in U.S. Patent Application 62,949/554, filed Dec. 18, 2019 and entitled MASS SPECTROMETER WITH CHARGE MEASUREMENT ARRANGEMENT, the disclosure of which is incorporated herein by reference in its entirety. Regardless of the particular form in which the mass spectrometer14is provided, the various sections of the instrument10are controlled to sub-atmospheric pressure for operation thereof as is conventional. In the illustrated embodiment, for example, a so-called vacuum pump P1is operatively coupled to the ion source region12, another vacuum pump P2is operatively coupled to the ion processing region26of the mass spectrometer14and yet another vacuum pump P2is operatively coupled to the ion detection region28of the mass spectrometer. In the illustrated embodiment, each of the pumps P1, P2and P3is electrically coupled to the processor20such that the processor20is configured to control operation of each of the pumps P1, P2and P3and therefore independently control the pressures in each of the three respective regions12,26and28. In alternate embodiments, one or more of the pumps P1, P2and/or P3may be manually controlled. In still other embodiments, more or fewer pumps may be implemented to control the pressure in more or fewer respective portions of the instrument10. In some embodiments in which the thermal energy source24is omitted, the sensor25may be provided in the form of a pressure sensor operable to provide a pressure signal to the processor20from which the processor20is operable to determine or estimate the pressure within the ion source region12. In embodiments in which the thermal energy source24is included, the sensor25may include a temperature sensor and a pressure sensor. In any case, one or more additional pressure sensors may be operatively coupled to the ion processing region26and/or to the ion detection region28for determination by the processor20of the pressure(s) in this/these region(s). In other embodiments, one or more examples of which will be described further below, the mass spectrometer14may be provided in the form of any conventional mass spectrometer configured to measure mass-to-charge ratios of charged particles generated by the ion generator16. In such embodiments, the ion processing region26may typically be implemented in the form of a conventional ion acceleration region, the ion detection region28will be implemented in the form of one or more conventional drift tubes, the charge amplifier(s) CA will be omitted and the ion detector30or other ion detector suitably positioned in the mass spectrometer will be included. Referring now toFIG.2, a simplified flowchart is shown depicting an example process50for operating the mass spectrometer10ofFIG.1to measure charge and mass of charged particles generated from a sample over a range of temperatures, and for analyzing the resulting measurements to identify new structural subspecies as a function of particle charge and/or particle mass and/or particle mass to charge-ratio. In the illustrated process50, the range of temperatures illustratively spans the melting temperature(s) of the particles generated from the sample18at which the sample particles undergo respective “melting transitions” as this term is defined above. The process50is illustratively stored in the memory22in the form of instructions executable by the processor20to carry out the measurements and analysis. The process50illustratively begins at step52where the processor20is illustratively operable to set a counter i equal to 1 or to some other constant. Thereafter at step54, the processor20is operable to control the voltage source VS1to produce one or more voltages, and/or to control the thermal energy source24directly, to control the ion generator16and the thermal energy source24to cause the charged particles generated by the ion generator16to enter the mass spectrometer14at a target temperature T(i). In embodiments in which the thermal energy source24is coupled to the sample18, e.g., in solution or otherwise, step54of the process50illustratively includes steps56,58and60as illustrated by example inFIG.2. In this embodiment of the process50, the processor20is operable at step56to cause the thermal energy source24to control the temperature of the sample18to a target temperature T(i). Thereafter, the processor20is illustratively operable at step58to monitor the one or more sensors25, in embodiments which include the one or more sensors25, and to determine from sensor signals produced thereby, in a conventional manner, whether the operating temperature of the sample18has stabilized at T(i). If so, then the process50advances to step60, and otherwise the process50loops back to step56. In embodiments which do not include the one or more sensors25, step58may illustratively be or include a selectable time delay to allow the temperature of the sample18to increase/decrease following execution of step56, and in such embodiments the process50advances from step58to step60only after expiration of the selectable time delay. In any case, at step60the processor20is illustratively operable to control the voltage source VS1to produce one or more voltages to control the ion generator16to generate charged particles from the sample18at the target temperature T(i). Charged particles generated from the sample18by the ion generator16thus enter the mass spectrometer14at the temperature T(i). In other embodiments in which the thermal energy source24is configured and positioned relative to the ion source region12to operate on the charged particles exiting the ion generator16, step54of the process50illustratively includes step60followed by step56. The processor20is operable at step60to control the voltage source VS1to produce one or more voltages to cause the ion generator16to generate charged particles, and is then operable at step56to control the voltage source VS1to produce one or more voltages, and/or to control the thermal energy source24directly, to cause the thermal energy source24to control the temperature of the charged particles exiting the ion generator16and entering the mass spectrometer14to the temperature T(i). In embodiments which include the one or more sensors25, the processor20may be further operable at step56to control the voltage source VS1and/or the thermal energy source24based on feedback signal(s) produced by the one or more sensors25. In any case, charged particles generated from the sample18by the ion generator16enter the mass spectrometer14at the target temperature T(i). Following step54, the processor20is illustratively operable at step62to control the voltage source VS2to supply the charged particles at the target temperature T(i) exiting the ion source region12and entering the ion processing region26of the mass spectrometer14to the charge detection region28of the mass spectrometer14. Based on the signals produced by the one or more charge amplifiers CA, and in some embodiments on signals produced by the ion detector30as described above, the processor20is operable thereafter at steps64-68to determine mass and charge magnitude values of the charged particles at the target temperature T(i), and to store the particle mass and charge magnitude measurements at T(i) in the memory22. In embodiments in which the mass spectrometer14is a CDMS, steps62-68are illustratively repeated until all, or at least a desired subset, of the different charged particles generated from the sample18are processed. Following step68, the process50advances to step70where the processor20is operable to determine whether the current count value i has advanced to an end count value S. If not, the process50advances to step72where the count value i is incremented by 1 and the process50then loops back to step54to re-execute the process50at another temperature. The temperature range over which the process50is executed may be any temperature range in which the particles generated from the sample18undergo structural changes. In one example implementation of the process50, the temperature range over which the process50is executed is a temperature range which spans the melting temperatures of the particles generated from the sample18, and the total number of incremental temperatures within the selected temperature range over which the process50is executed may be any integer number such that the step size between incremental temperatures may be any desired step size. It will be understood that the temperature range may illustratively be advanced in the process50from the coolest temperature to the warmest, or vice versa, or the temperature may instead be controlled non-linearly. As one example, which should not be considered to be limiting in any way, the temperature range over which the process50is executed may be 65 degrees C., which may illustratively begin at 25 degrees C. and end at 90 degrees C., with a step size of 5 degrees C. between each execution of the process50so that mass and charge values of the charged particles generated from the sample18are measured at 25 degrees C., 30 degrees C., 35 degrees C., . . . , 85 degrees C. and 90 degrees C. It will be understood that in other embodiments, the temperature range may be greater or lesser than 65 degrees C., the coolest temperature may be greater or lesser than 25 degrees C., the warmest temperature may be greater or lesser than 90 degrees C. and/or the steps size between temperatures may be greater or less than 5 degrees C. Referring toFIGS.3A-3D, four examples of steps52-72of the process50are shown in the form of scatter plots of particle charge magnitude (in units of elementary charge e) vs. particle mass (in units of mega-daltons MDa) of a sample18of HDL (high density lipoproteins) from which charged particles were generated by an ESI source and measured by a mass spectrometer14implemented in the form of a single-particle processing CDMS instrument. In these examples, the thermal energy source24was implemented in the form of a conventional heating device coupled to the sample18in solution. InFIG.3A, the scatter plot was generated from charged particles measured at 25 degrees C., and the scatter plots ofFIGS.3B,3C and3Dwere generated from charged particles measured at 45 degrees C., 65 degrees C. and 90 degrees C. respectively. It will be understood that while the particles illustrated inFIGS.3A-3Dhave masses in the MDa range, nothing in this disclosure should be understood as limiting the sample18to mixtures, solutions or substances made up of particles only in this mass range. Rather, it should be understood that the concepts described herein are applicable to mixtures, solutions and substances made up of particles in any mass range. Likewise, it should be understood that the sample18is not limited to the example HDL sample but may instead be a sample of any material, in any form, without limitation. From the plots illustrated inFIGS.3A-3D, the data appears to disperse with increasing temperature. However, as illustrated inFIG.4, the average mass of the sample18of HDL does not appear to deviate significantly from the average mass value of 324 kDa over the temperature range 25 degrees C.-90 degrees C. As such, the dispersion of the data illustrated inFIGS.3A-3Dis attributable to temperature-dependent changes in the charge magnitudes of the charged particles generated from the sample18. In this regard, the process50ofFIG.2advances from the YES branch of step70to step74where the processor20is operable to process the particle mass and charge measurements taken at the various different temperatures T(1)-T(S) to determine particle charge-related information. Referring now toFIG.5, a simplified flowchart is shown of an embodiment of a process74A for executing step74of the process50illustrated inFIG.2. The process74A is illustratively stored in the memory22in the form of instructions executable by the processor20to carry out processing of the particle mass and charge measurements taken at the various different temperatures T(1)-T(S) to determine particle charge-related information in the form of a charge melting profile of the sample18over the temperature range T(1)-T(S). The process74A begins at step80where the processor20is operable to compute an average particle charge magnitude CHAVfor each temperature in the temperature range T(1)-T(S) at which charged particles were generated and measured by the instrument10in the process50ofFIG.2. In one embodiment, the processor20is operable at step80to compute the average particle charge magnitude CHAVat each such temperature as an algebraic average of the measured charge magnitudes. In other embodiments, the processor20may be operable to compute such averages using one or more alternate averaging techniques. Keeping with the example described above with respect toFIGS.3A-3D, the processor20is illustratively operable in this example at step80to compute CHAVfor each temperature in increments of 5 degrees C. between 25 degrees C. and 90 degrees C. Following step80, the processor20is operable at step82to compute an average charge magnitude melting profile over the temperature range T(1)-T(S) based on the average charge magnitudes CHAVcomputed at step80for each temperature in the temperature range T(1)-T(S). Thereafter at step84, the processor20is operable to store the average charge magnitude melting profile computed at step82and, in some embodiment, to display the same. Again referring to the example described above with respect toFIGS.3A-3D, an average charge melting profile thereof is illustrated by example inFIG.6. As evident fromFIG.6, the particle charge magnitudes of the HDL sample18exhibit a relatively constant average charge value of around 35 e for temperatures below about 60 degrees C., and then undergo a melting transition centered at about 66 degrees C., and at temperatures above about 75 degrees C. the particle charge magnitudes of the HDL sample18exhibit a relatively constant average charge value of around 42 e. Referring now toFIG.7, a simplified flowchart is shown of an embodiment of another process74B for executing step74of the process50illustrated inFIG.2. The process74B is illustratively stored in the memory22in the form of instructions executable by the processor20to carry out processing of the particle mass and charge measurements taken at the various different temperatures T(1)-T(S) to determine particle charge-related information in the form of charge melting profiles for subpopulations of particles in each of multiple different mass ranges of the sample18over the temperature range T(1)-T(S). Referring toFIG.8A, for example, the plot ofFIG.4Ais reproduced upon which several vertical dashed lines are superimposed illustrating partitioning of the charge magnitude vs. mass measurements into seven different, side-by-side mass ranges. InFIG.8B, a mass abundance spectrum is shown of the partitioned mass ranges depicting the average mass values of the particles in each mass range. In the illustrated example, the average mass value of the particles in mass range1is 120 kDa, the average mass value of the particles in mass range2is 170 kDa, and the average mass values of the particles in mass ranges3through7are 214, 270, 346, 440 and 618 kDa respectively. According to the process74B illustrated inFIG.7, the processor20is operable to process the particle mass and charge measurements taken at the various different temperatures T(1)-T(S) to determine charge melting profiles the subpopulations of particles in each of the multiple different mass ranges of the sample18over the temperature range T(1)-T(S). The process74B begins at step100where the processor20is operable to set a counter j equal to 1 or to some other constant. Thereafter at step102, the processor20is operable to compute an average particle charge magnitude CHAV, using any conventional averaging technique, for each of the particles within the mass range MR(j) of the charged particles in each temperature range T(1)-T(S) at which charged particles were generated and measured by the instrument10in the process50ofFIG.2. Thereafter at step104, the processor20is operable to compute an average charge magnitude melting profile for the mass range MR(j) based on the average charge magnitudes CHAVcomputed at step102for each temperature in the temperature range T(1)-T(S). Thereafter at step106, the processor20is operable to determine whether the count value j has reached a count value Z equal to the total number of partitioned mass ranges. If not, the process74B advances to step108where the processor20increments the counter j before looping back to step102. If, at step106, j=Z, the process74B advances to step110where the processor20is operable to store the average charge magnitude melting profiles computed at step104and, in some embodiment, to display the same. Referring to the example described above with respect toFIGS.8A and8B, average charge melting profiles of the charged particles in each of the seven mass ranges are illustrated by example inFIG.8C. Each mass range has a separate and distinct average charge melting profile, and each has a different average melting temperature; e.g., 59 degrees C. for mass range1, 62 degrees C. for mass range2, etc. Referring now toFIG.9, a simplified flowchart is shown of an embodiment of yet another process74C for executing step74of the process50illustrated inFIG.2. The process74C is illustratively stored in the memory22in the form of instructions executable by the processor20to carry out processing of the particle mass and charge measurements taken at the various different temperatures T(1)-T(S) to determine particle charge-related information in the form of newly observed families of structures for subpopulations of particles in different mass ranges of the sample18over the temperature range T(1-T(S). In accordance with the process74C, the particle mass and charge measurements taken at the various different temperatures T(1-T(S) are processed within each mass range subpopulation as a function of temperature to identify additional subspecies, if any, via detectable peaks or groupings. The process74C begins at step150where the processor20is operable to set a counter k equal to one or some other constant. Thereafter at step152, the processor20is operable to analyze the charge magnitude measurements in a selected mass range at one of the temperatures T(k) at which the charged particles were measured by the instrument10to identify any new subspecies, if any, via detectable peaks or groupings. At step154, the processor20is operable to store any subspecies peaks or groupings identified at the temperature T(k). Thereafter at step156, the processor20is operable to determine whether the current value of the counter k is equal to a temperature count value Y. If not, the process74C advances to step158where the processor20increments the value of k before looping back to step152, and otherwise the process74C advances to step160. At step160, the processor20is illustratively operable to display the identified subspecies peaks/groupings for one or more of the temperatures Tk-TY. Thereafter at step162, the processor20is illustratively operable to compute charge magnitude abundance profiles for each such subspecies peak/grouping over the temperature range Tk-TY. Thereafter at step164, the processor20is illustratively operable to store the results of the previous steps and, in some embodiments, to display the charge magnitude abundance profiles. In some embodiments, the processor20may be operable to execute step152by analyzing only the charge magnitude measurements within the selected mass range subpopulation, although in other embodiments it may be useful to analyze abundance peaks of the measurements converted to mass-to-charge ratio values. The latter case is illustrated by an example execution of step160of the process74C inFIG.10Awhich depicts abundance vs. mass-to-charge ratio plots of the subpopulation of the charged particles in mass range7ofFIGS.8A-8Cas a function of temperature. As the temperature of the subpopulation of charged particles in mass range7increases, well-defined, high charge state subspecies emerge in the mass-to-charge ratio spectrum. At 25 degrees C., for example, a single z=45 e peak is observed at a mass-to-charge ratio (m/z) of approximately 13 kTh. As the temperature is increased to 55 degrees C., the fraction of 13 kTh particles decreases which results in a shift of the m/z peak to approximately 12.5 kTh and a new subspecies is observed with a z=56 e peak. As the masses of these particles have not changed, as described above with respect toFIG.4, the newly observed subspecies correspond to changes in the average charge of the particles. As the temperature is further increased to 65° C. the z=56 e subspecies increases in abundance and additional subspecies emerges with z=73 e, z=81 e and Z=106 e respectively. At another increased solution temperature of 75° C. yet another subspecies emerges with z=123. In total the z=45 e precursor gives rise to at least five new resolvable subspecies. An example of steps162and164of the process74C is illustrated inFIG.10Bwhich depicts a plot of the charge magnitude abundance profiles of the subspecies illustrated inFIG.10Aas a function of temperature. The top curve inFIG.10Bis the precursor charge state, and the bottom five curves inFIG.10Bcorrespond to the five new subspecies identified at steps152-158and illustrated by example inFIG.10A. The plot ofFIG.10Breveals that each subspecies observed inFIG.10Ahas a unique formation temperature, and that approximately 45% of subpopulation7, i.e., mass range7, is a subspecies that does not appear to melt, even at the highest temperature of approximately 90 degrees C. The remaining subpopulations behave similarly—providing evidence for as few as three, to as many as six subspecies, within each subpopulation. Each subspecies is delineated based on its charge and unique formation temperature. In total, the7subpopulations, i.e., 7 mass ranges illustrated inFIGS.8A and8B, evolve into 28 unique subspecies. In every case, subspecies that are discernable at elevated temperatures disappear upon cooling the solution, regenerating the seven initial subpopulations. That is, each transition is reversible, although in some instances not all transitions may be reversible. The new high temperature subspecies arise when distinct subspecies that are present, but unresolved and therefore hidden at low temperatures, undergo unique melting transitions with increasing temperatures that enable them to be resolved. Average charge magnitude melting profiles of the types illustrated inFIGS.6and8Cfor an HDL sample18, as well as the emergence of additional high charge-state subspecies within mass-range subpopulations of particles as illustrated inFIGS.10A and10Bfor the same HDL sample18, provide a useful measure of the stability of a sample over temperature. Temperature stability of particles is particularly useful in the investigation of biological substances, an example of which includes, but is not limited to, viruses, and particularly those used for gene therapy products. The temperature stabilities of gene therapy products may be related to the efficacy of such products, i.e., in terms of explaining why some gene therapy products are therapeutically active and others are not. Moreover, it will be understood that while the sample18used in the examples illustrated inFIGS.3A-3D,4,6,8A-8C and10A-10Bis a high density lipoprotein (HDL) sample, in other applications the sample18may be any material whether or not biological in nature and whether in solution or otherwise. Additional example biological substances or materials that may be used as the sample18may include, but are not limited to, exomes, endosomes, microvessicles generally, ectosomes, apoptotic bodies, gene therapies, retroviruses, exomeres, chylomicrons, DNA, RNA, proteins, fats, acids, carbohydrates, enzymes, viruses, bacteria, or the like. As described at the outset, this disclosure relates to apparatuses and techniques for measuring particle charges of a sample over at least one range of differing physical and/or chemical conditions in which the sample particles undergo structural changes, and for analyzing the resulting measurements to identify new structural subspecies as a function of at least particle charge. In this regard, the processes illustrated inFIGS.2,5,7and9, as well as the data illustrated inFIGS.3A-3D,4,6,8A-8C and10A-10B, represent one example embodiment in which particle charges are measured over a range of changing temperatures, which illustratively span melting temperatures of the particles, via control of the thermal energy source24as depicted inFIGS.2-4, and in which the measured charge data is thereafter analyzed according to the processes illustrated inFIGS.5,7and9to produce the information illustrated inFIGS.6,8A-8C and10A-10B. In one alternate embodiment, the particle charges may be instead be measured over a range of changing instrument pressures via control of one or more of the pumps P1, P2, P3depicted inFIG.1. In this embodiment, step56of the process50illustrated inFIG.2will be modified to control P1, P2and/or P3to a target pressure P(i), and the pressure value(s) will then be incrementally changed at steps70and72until the sample particles have been subjected to a range of different pressure conditions in which the sample particles undergo structural changes. The process74A illustrated inFIG.5will then be modified to compute an average particle charge magnitude for each pressure value, and to compute a charge magnitude pressure profile based on the average particle charge magnitude values over the pressure range. The processes74B and74C illustrated inFIGS.7and9respectively will likewise be modified to process the charge magnitude values at the various pressure values and in the various mass ranges. In another alternate embodiment, the particle charges may be instead be measured over a range of changing sample compositions (i.e. changing sample content or makeup), with each one or more sample composition changes being carried out by adding one or more components to the sample18, removing one or more components from the sample18, changing the relative concentration of one or more components relative to one or more other components, or the like. In this embodiment, step56of the process50illustrated inFIG.2will be modified to carry out a change in the composition of the sample18, and the sample composition will then be incrementally changed at steps70and72until the sample particles have been subjected to a range of different sample compositions in which the sample particles undergo structural changes. This may entail a single composition change or several composition changes. The process74A illustrated inFIG.5will then be modified to compute an average particle charge magnitude for each sample composition, and to compute a charge magnitude pressure profile based on the average particle charge magnitude values over the range of sample compositions. The processes74B and74C illustrated inFIGS.7and9respectively will likewise be modified to process the charge magnitude values at the various sample compositions and in the various mass ranges. In still another alternate embodiment, the particle charges may be instead be measured over reaction time range following a mixing together of two or more components to form, or alter, the sample18. In this embodiment, step56of the process50illustrated inFIG.2will be modified to carry out a mixing together of two or more components to form the sample18, or to carry out a mixing together of a component to an existing mixture, and the time from initial mixing or altering will then be incrementally changed at steps70and72until the sample particles undergo a structural change or structural changes. The time passage may be short or long, and may last until the resulting mixture reaches equilibrium or some state prior to equilibrium. This embodiment may entail a single initial mixture or a series of new mixtures following an initial mixture. The process74A illustrated inFIG.5will then be modified to compute an average particle charge magnitude over time, and to compute a charge magnitude pressure profile based on the average particle charge magnitude values over the range of time of the chemical reaction. The processes74B and74C illustrated inFIGS.7and9respectively will likewise be modified to process the charge magnitude values at the chemical reaction time range(s) and in the various mass ranges. In still further alternate embodiments, any combination of changing sample temperature, changing sample pressure, changing sample composition and time of chemical reaction may be measured and processed each as described above. While this disclosure has been illustrated and described in detail in the foregoing drawings and description, the same is to be considered as illustrative and not restrictive in character, it being understood that only illustrative embodiments thereof have been shown and described and that all changes and modifications that come within the spirit of this disclosure are desired to be protected. | 50,129 |
11942318 | DETAILED DESCRIPTION OF THE INVENTION Aspects and embodiments of the present invention will now be discussed with reference to the accompanying figures. Further aspects and embodiments will be apparent to those skilled in the art. All documents mentioned in this text are incorporated herein by reference. In the following examples, additional deflectors located within a mass analyser are used to cause ions to fly farther away from the injection and extraction openings which cause large electric field distortions. This helps to improves analyser mass resolution. In addition, this also allows for an increased number of “turns” performed by ions within the mass analyser, which again helps to improve mass resolution. Finally, injection and extraction deflectors can be used for additional steering to compensate for possible alignment errors of the main electrodes, e.g. to reduce losses of ions on reversing deflectors and/or small extraction openings. This may help to improve transmission efficiency. In the examples shown, small additional deflectors are included, in addition to the sector electrodes of a mass analyser. The purpose of the deflectors in these examples is to deflect ions in the drift direction so as to increase distances from the injection opening to the first turn ion trajectories and from the extraction opening to the last turn ion trajectories. This means that field distortions at the injection/extraction openings have a significantly lowered influence on mass resolution and transmission efficiency. At least one injection deflector is needed in order to deflect ions away from the injection opening (if present). At least one extraction deflector is needed in order to deflect ions away from the extraction opening (if present). The same deflector(s) may be used as both injection and extraction deflectors. The deflectors are positioned inside the mass analyser, preferably in a field free region. Alternatively, they can be embedded into internal focussing lens electrodes. Apart from the main purpose of bypassing the areas of poor field quality the injection/extraction deflectors can also be used for additional steering in the two transverse directions to compensate for possible alignment errors of the main electrodes. FIGS.1A and1Bshow a mass analyser implementing the disclosure of U.S. Pat. No. 9,082,602B2. This mass analyser includes:a set of sector electrodes spatially arranged to provide an electrostatic field in a reference plane suitable for guiding ions along an orbit in the 2D reference plane, wherein the set of sector electrodes extend along a drift path D that is locally orthogonal to the reference plane so that, in use, the set of sector electrodes provide a 3D electrostatic field region; andan injection interface configured to inject ions into the mass analyser via an injection opening such that the ions injected into the mass analyser are guided by the 3D electrostatic field region along a 3D reference trajectory according to which ions perform multiple turns within the mass analyser whilst drifting along the drift path, wherein each turn corresponds to a completed orbit in the 2D reference plane. As depicted, the reference plane is perpendicular to the page on whichFIGS.1A and1Bare shown. InFIGS.1A and1B, a mass analyser1is shown with ions10being injected from an external ion source (not shown) via an injection opening3aat the distal end of an injection tube3. At the end of the first turn ion pass the region near the injection opening3aof the injection tube3, at which location the electrostatic field produced by the sector electrodes of the mass analyser is distorted by the presence of the injection tube3. Thus, as taught by U.S. Pat. No. 9,082,602B2, a PCB fringe field corrector5is used to compensate electric field distortions at the injection opening3a. This PCB fringe field corrector5is described in detail in U.S. Pat. No. 9,082,602B2, with reference to FIG. 15D of U.S. Pat. No. 9,082,602B2. A similar PCB fringe field corrector may also be used at an extraction opening of the mass analyser (not shown). A disadvantage of the PCB fringe field corrector5shown inFIGS.1A and1Bis that ions may pass too close to the corrector5. This problem is exacerbated at small analyser sizes or small drift angles (i.e. a larger number of turns). In such cases both the analyser mass resolving power and transmission efficiency may be reduced. Besides, misalignments of the correctors or their poor fabrication quality may contribute to degradation of the same key parameters. FIGS.2A and2Bshow a mass analyser101implementing the present invention. In this example, the injection interface includes a single injection deflector107, located within the mass analyser, the injection deflector107being configured to deflect ions injected into the mass analyser in the direction of the drift path D before those ions have completed a first turn within the mass analyser so as to increase the distance between the deflected ions completing the first turn and the injection opening103a. Note that as a result of including the injection deflector107, the distance between the 3D reference trajectory and the injection opening103ais significantly increased, that is ions following the 3D reference trajectory pass less close to the injection opening103athan would have been case had the injection deflector107been absent. Thus the injection deflector107is used to increase distance from ions moving within the mass analyser to the injection tube103(other than ions entering the mass analyser through the injection tube) and therefore the injection opening103a. The distance is preferably made large enough, so that influence of the field distortion by the tube103on the ion optics of the mass analyser is negligible, and so that a PCB fringe field corrector105is not required. As depicted inFIGS.2A and2Ba PCB fringe field corrector5is not used. However, in other examples (not shown), a PCB fringe field corrector5may be used, but its influence on the ion beam will be substantially reduced as a result of the primary deflector107. In this example, the primary deflector107is located in a field free region of the 3D reference trajectory about halfway through the first closed orbit (“turn”) completed by the ions. FIG.3shows another mass analyser101′ implementing the present invention. In this example, an extraction interface includes a single extraction deflector109′, located within the mass analyser, the extraction deflector109′ being configured to deflect ions following a 3D reference trajectory in the direction of the drift path D after those ions have started their last turn within the mass analyser so as to increase the distance between the deflected ions entering their last turn and an extraction opening104a′ at the distal end of an extraction tube104′. The extracted ions111′ may then be detected by a suitable detector, e.g. a TOF detector. Note that as a result of including the injection deflector107, the distance between the 3D reference trajectory and the extraction opening104a′ is significantly increased, that is ions following the 3D reference trajectory pass less close to the extraction opening104a′ than would have been case had the extraction deflector109′ been absent. In the example ofFIG.2only a single injection deflector107is used. The inventor notes that it is possible (by appropriately locating this deflector107and setting the deflection it provides accordingly, as well as appropriately setting up the injection tube103) to both ensure that ions completing their first turn are adequately spaced from the injection opening103a, whilst also achieving a small angle (in the drift direction D) between adjacent turns of the 3D reference trajectory. Similarly, in the example ofFIG.3, only a single extraction deflector109′ is used. The inventor notes that it is possible (by appropriately locating this deflector109′ and setting the deflection it provides accordingly, as well as appropriately setting up the extraction tube104′) to both ensure that ions entering their last turn are adequately spaced from the extraction opening104a′, whilst also achieving a small angle (in the drift direction D) between adjacent turns of the 3D reference trajectory. However, as will now be described in relation toFIGS.4A and4B, if reversing deflectors are used, the considerations are more complex and it is generally preferred to use more than one injection deflector and more than one extraction deflector, and preferably the same injection deflectors are also used as the extraction deflectors, to avoid ions hitting these deflectors. FIGS.4A and4Bshow another mass analyser201implementing the present invention. In this example, an injection interface which includes an injection tube203also includes injection deflectors207a,207b. The injection deflectors207a,207bare configured to deflect ions injected into the mass analyser via an injection opening203aof the injection tube203in the direction of the drift path before those ions have completed a first turn within the mass analyser so as to increase the distance between the deflected ions completing the first turn and the injection opening. In this example, the mass analyser includes a reversing deflector set that includes two reversing deflectors215a,215bwherein the reversing deflectors215a,215bare configured to reverse the direction in which ions drift along the drift path, so that ions are made to drift back towards the injection interface. Thus, in this example, ions are made two perform two “passes” of the instrument before extraction. The reason for including two injection deflectors207a,207bcan best be understood from the discussion ofFIG.5Bbelow. The reason for including two reversing deflectors215a,215bhere is to improve isochronous properties in the drift direction, and also because it is technically difficult to position a single reversing deflector inside the main sector S2. In this example, the injection and extraction tubes203,204are located one above the other (seeFIG.4B), and the injection deflectors207a,207bare also used as extraction deflectors (by applying appropriate voltages at the appropriate times), and are therefore referred to as injection/extraction deflectors207a,207b. The injection/extraction deflectors207a,207bare configured to, when used as extraction deflectors, deflect ions following the 3D reference trajectory in the direction of the drift path after those ions have started their last turn within the mass analyser so as to increase the distance between the deflected ions entering their last turn and the extraction opening. In this example, the injection/extraction deflectors207a,207bare located one above the other in field free regions of the 3D reference trajectory, as are the injection and extraction tubes203,204, thus the azimuthal positions of the injection and extraction tubes203,204coincide (seeFIG.4B). Such a layout helps to provide maximum flight path length and hence mass maximum resolving power m/dm. With the layout shown inFIGS.4A and4B, the deflectors207a,207bare used for both injection (where ions are deflected by both of them over the first half-turn) and for extraction (where ions pass through and deflected by both of them over the last half-turn before extraction). In this example, it is envisaged that each deflector207a,207btake the form of parallel plates, separated in a direction of the drift path, wherein the potentials on the two plates are not equal, even at equal geometry parameters, so as to provide deflection. Since the same deflectors207a,207bare used for injection and extraction, the potentials applied to these deflectors207a,207bare preferably switchable so that the potentials applied to the deflectors207a,207bfor injection are swapped to the potentials applied to the deflectors207a,207bfor extraction, before extraction begins. By extending the flight path, the mass resolving power m/dm can be increased. In the example shown inFIGS.4A and4B(preferably also the examples shown inFIGS.2-3), the deflectors of the injection and extraction interfaces are preferably located in field free regions of the 3D reference trajectory, in the upper and lower (polar) regions of the mass analyser. FIGS.5A-Cshow another mass analyser301implementing the present invention. In this example, ions are made two perform two “passes” of the instrument before extraction, and there is only one injection deflector307, and only one extraction deflector309. As can be seen fromFIG.5B, in order for only one injection deflector307and only one extraction deflector309to be used, the 3D reference trajectory passes very close to the injection and extraction deflectors307,309. There is very little room for installation of these deflectors307,309between the adjacent turns. For this reason an analyser301having the form shown inFIGS.5A-Ccannot be made too small. Also, there will be additional losses of ions (oscillating around the reference trajectory) on the deflectors307,309, and higher tolerance requirements to positioning of the deflector azimuthally will be required. These problems can be avoided by using two deflectors for injection and two deflectors for extraction (as in the embodiment shown inFIGS.4A-B), butFIGS.5A-Cdo at least show that it is possible to use only one injection deflector307, and only one extraction deflector309. FIGS.6A-Bshow another mass analyser401implementing the present invention. Here, the drift path is linear, i.e. extending along a straight line, with just one injection deflector407located within the first half-turn after injection, and one extraction deflector409located within the last half-turn before extraction. No injection/extraction PCB correctors are used. The positioning of the deflectors407,409can be seen from the side view ofFIG.6B. FIG.7shows a modified mass analyser401′ similar to that shown inFIGS.6A-B, except that here the injection deflector407′ is located within the second turn after injection. Similarly, the extraction deflector409′ is located within the second from last turn. Here, the injection deflector407′ is configured to increase the distance between the 3D reference trajectory and the injection opening by being mutually configured with the injection tube403′ such that the injection interface injects ions into the mass analyser with an initial trajectory such that ions are substantially unaffected by electric field distortions around the injection opening, wherein the injection deflector is configured to bring subsequent turns within the mass analyser closer together. FIGS.8A-Bshow another mass analyser501implementing the present invention. Here, the drift path is linear, i.e. extending along a straight line, with just one injection deflector507located within the first half-turn after injection of ions510through the injection opening503, and one extraction deflector509located within the last half-turn before extraction of ions511through the extraction opening504. No injection/extraction PCB correctors are used. In this example, reversing deflectors515a,515b(upper and lower) are used to allow ions to perform two passes of the mass analyser501. FIG.9shows a modified mass analyser501′ similar to that shown inFIGS.8A-B, except that here the injection deflector507′ and extraction deflector509′ are used as a second reversing deflector set, such that ions can be made to complete more than two “passes” of the mass analyser. FIG.10shows an alternative positioning of deflectors of the injection and extraction interfaces. In the example shown inFIG.10, deflectors607a,607bof the injection and extraction interfaces are positioned within focussing lens electrodes L1, L2configured to focus ions towards the 3D reference trajectory. Note that separation in the direction of the drift path of adjacent turns inside lenses L1, L2is much larger than is the case at the polar regions, so deflectors embedded within focussing electrodes may be advantageous for analysers of very small size, compared with locating the deflectors in the polar regions (in which their positioning might be difficult in a small analyser). A potential issue with locating deflectors within focussing lens electrodes is that the inventor has deduced from simulations that such deflectors need to be able to deflect ions in both the direction of the drift path and a transverse direction that is locally perpendicular to the reference trajectory and to the drift path. Whereas the inventor has observed that positioning the deflectors in the polar regions can be implemented using only deflectors able to deflect ions in the direction of the drift path (although some additional deflection in the transverse direction might still be desirable for correcting misalignments, even if the deflectors are positioned in the polar regions). The inventor also observes that embedding deflectors in focussing lens electrodes is in general more difficult in manufacturing and assembling compared with electrodes to be located in field free regions. FIGS.2B and7have been labelled with the drift angle115,415for a curved drift path example and a linear drift path example, based on the definitions already provided above (the straight lines referenced in those earlier definitions are shown here as dashed lines). By way of comparison, in the analyser shown inFIG.1, the drift angle (angle between adjacent turns) cannot be made too small (typically it needs to be at least 5-6°) since at small drift angles ions pass too close to the injection/extraction PCB correctors. Whereas use of injection/extraction deflectors according to the invention permits drift angle to be made smaller on the portion of the 3D reference trajectory that is after the injection deflector(s) and before the extraction deflector(s), and indeed the drift angle is preferably made as small a possible down to a minimum drift angle that depends on deflector dimensions and separation of adjacent turns at the deflector positions. Positioning inside conical focussing lens electrodes F1, F2(as inFIG.10discussed below) could allow the use of 3° or even smaller drift angles resulting in respectively increased turn numbers. FIGS.11A(i)-(iii) schematically show a parallel plate deflector for generating deflecting electric field in the drift direction by applying positive and negative potentials +V and −V to the plates. FIG.11Bshows a 3D model of another parallel plate deflector. FIG.11Cshows a 3D model of another parallel plate deflector. FIGS.12A(i)-(ii) schematically show a combined parallel plate deflector for generating deflecting electric fields in the drift direction and in the (other) transverse direction by applying, respectively, potentials +−V1and +−V2to the plates. FIG.12Bshows a multipole deflector (having twelve poles) for generating deflecting electric fields in the drift direction and in the (other) transverse direction by applying a number of potentials distributed over the poles. FIGS.12C(i)-(ii) respectively show 3D models of (i) the combined parallel plate deflector and (ii) the multipole deflector. FIGS.13A-Bshow an example of a deflector embedded into a conical lens electrode (e.g. as may be used in the example shown inFIG.10) for generating electric field for deflecting ions in the drift direction. In addition to the main deflector electrodes with potentials +−V1there are auxiliary inner (lower in the figure) and outer (upper in the figure) electrodes with potentials +−0.742V1and +−0.25V1dedicated to improvement of the electric field uniformity in the (other) transverse direction. The features disclosed in the foregoing description, or in the following claims, or in the accompanying drawings, expressed in their specific forms or in terms of a means for performing the disclosed function, or a method or process for obtaining the disclosed results, as appropriate, may, separately, or in any combination of such features, be utilised for realising the invention in diverse forms thereof. While the invention has been described in conjunction with the exemplary embodiments described above, many equivalent modifications and variations will be apparent to those skilled in the art when given this disclosure. Accordingly, the exemplary embodiments of the invention set forth above are considered to be illustrative and not limiting. Various changes to the described embodiments may be made without departing from the spirit and scope of the invention. For the avoidance of any doubt, any theoretical explanations provided herein are provided for the purposes of improving the understanding of a reader. The inventors do not wish to be bound by any of these theoretical explanations. Any section headings used herein are for organizational purposes only and are not to be construed as limiting the subject matter described. Throughout this specification, including the claims which follow, unless the context requires otherwise, the word “comprise” and “include”, and variations such as “comprises”, “comprising”, and “including” will be understood to imply the inclusion of a stated integer or step or group of integers or steps but not the exclusion of any other integer or step or group of integers or steps. It must be noted that, as used in the specification and the appended claims, the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Ranges may be expressed herein as from “about” one particular value, and/or to “about” another particular value. When such a range is expressed, another embodiment includes from the one particular value and/or to the other particular value. Similarly, when values are expressed as approximations, by the use of the antecedent “about,” it will be understood that the particular value forms another embodiment. The term “about” in relation to a numerical value is optional and means for example +/−10%. REFERENCES A number of publications are cited above in order to more fully describe and disclose the invention and the state of the art to which the invention pertains. Full citations for these references are provided below. The entirety of each of these references is incorporated herein.“A High Resolution Multi-turn TOF Mass Analyser”, V. Shchepunov et al, SHIMADZU REVIEW, Vol. 72, No. 3.4 (2015).U.S. Pat. No. 9,082,602B2U.S. Pat. No. 7,504,620B2WO2011/086430A1WO2018/033494A1 | 22,484 |
11942319 | To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION Embodiments described herein generally relate to equipment used in the manufacturing of electronic devices, and more particularly, to a horizontal pre-clean (HPC) module which may be used to clean the surface of a substrate in a semiconductor device manufacturing process. A buffing pad formed of polyvinyl alcohol (PVA) material provides high shear force for chemical and mechanical polishing due to mechanical strength and abrasion resistance. However, PVA material is water absorbent, soft, and elastic, in addition to being inherently thicker and larger than the conventional material, and thus a buffing pad formed of PVA material may sag when supported by a pad carrier. In the embodiments described herein, pad carriers support a large and thick water absorbent buffing pad while preventing the buffing pad from sagging by a mechanical clamping mechanism and a suction clamping mechanism during chemical mechanical cleaning. FIG.1Ais a schematic plan view of an exemplary chemical mechanical polishing (CMP) processing system100, which uses a horizontal pre-clean (HPC) module described herein, according to one or more embodiments.FIG.1Bis a top isometric view of an exemplary CMP processing system100which may correspond to the schematic view shown inFIG.1A, according to one or more embodiments.FIG.1Cis a top elevation view of the CMP processing system100ofFIG.1Bwhich may correspond to the schematic view shown inFIG.1A, according to one or more embodiments. InFIGS.1B and1C, certain parts of the housing and certain other internal and external components are omitted to more clearly show the HPC module within the CMP processing system100. Here, the CMP processing system100includes a first portion105and a second portion106coupled to the first portion105and integrated therewith. The first portion105is a substrate polishing portion featuring a plurality of polishing stations (not shown). The second portion106includes one or more post-CMP cleaning systems110, a plurality of system loading stations130, one or more substrate handlers, e.g., a first robot124and a second robot150, one or more metrology stations140, one or more location specific polishing (LSP) modules142, one or more HPC modules200, and one or more drying units170. The HPC module200is configured to process a substrate120disposed in a substantially horizontal orientation (i.e., in the x-y plane). In some embodiments, the second portion106optionally includes one or more vertical cleaning modules112configured to process substrates120disposed in substantially vertical orientations (i.e., in the z-y plane). Each LSP module142is typically configured to polish only a portion of a substrate surface using a polishing member (not shown) that has a surface area that is less than the surface area of a to-be polished substrate120. LSP modules142are often used after the substrate120has been polished with a polishing module to touch up, e.g., remove additional material, from a relatively small portion of the substrate. The metrology station140is used to measure the thickness of a material layer disposed on the substrate120before and/or after polishing, to inspect the substrate120after polishing to determine if a material layer has been cleared from the field surface thereof, and/or to inspect the substrate surface for defects before and/or after polishing. In those embodiments, the substrate120may be returned to the polishing pad for further polishing and/or directed to a different substrate processing module or station, such as a polishing module within the first portion105or to an LSP module142based on the measurement or surface inspection results obtained using the metrology station140. As shown inFIG.1A, a metrology station140and an LSP module142are located in a region of the second portion106that is above (in the Z-direction) portions of one of the post-CMP cleaning systems110. The first robot124is positioned to transfer substrates120to and from the plurality of system loading stations130, e.g., between the plurality of system loading stations130and the second robot150and/or between the post-CMP cleaning system110and the plurality of system loading stations130. In some embodiments, the first robot124is positioned to transfer the substrate120between any of the system loading stations130and a processing system positioned proximate thereto. For example, in some embodiments, the first robot124may be used to transfer the substrate120between one of the system loading stations130and the metrology station140. The second robot150is used to transfer the substrate120between the first portion105and the second portion106. For example, here the second robot150is positioned to transfer a to-be-polished substrate120received from the first robot124to the first portion105for polishing therein. The second robot150is then used to transfer the polished substrate120from the first portion105, e.g., from a transfer station (not shown) within the first portion105, to one of the HPC modules200and/or between different stations and modules located within the second portion106. Alternatively, the second robot150transfers the substrate120from the transfer station within the first portion105to one of the LSP modules142or the metrology station140. The second robot150may also transfer the substrate120from either of the LSP modules142or the metrology station140to the first portion105for further polishing therein. The CMP processing system100inFIG.1Afeatures two post-CMP cleaning systems110disposed on either side of the second robot150. InFIG.1Aat least some modules of one of the post-CMP cleaning systems110, e.g., one or more vertical cleaning modules112, are located below (in the Z-direction) the metrology station140and the LSP module142and are thus not shown. The metrology station140and the LSP module142are not shown inFIG.1C. In some other embodiments, the CMP processing system100features only one post-CMP cleaning system110. Here, each of the post-CMP cleaning systems110includes an HPC module200, one or more vertical cleaning modules112, e.g., brush or spray boxes, a drying unit170, and a substrate handler180for transferring substrates120therebetween. Here, each HPC module200is disposed within the second portion106in a location proximate to the first portion105. Typically, the HPC module200receives a polished substrate120from the second robot150through a first opening (not shown) formed in a side panel of the HPC module200, e.g., though a door or a slit valve disposed in the side panel. The substrate120is received in a horizontal orientation by the HPC module200for positioning on a horizontally disposed substrate support surface therein. The HPC module200then performs a pre-clean process, such as a buffing process, on the substrate120before the substrate120is transferred therefrom using a substrate handler180. The substrate120is transferred from the HPC module200through a second opening, here an opening224(FIG.1B), which is typically a horizontal slot disposed though a second side panel of the HPC module200closeable with a door, e.g., a slit valve. Thus, the substrate120is still in a horizontal orientation as it is transferred from the HPC module200. After the substrate120is transferred from the HPC module200, the substrate handler180swings the substrate120to a vertical position for further processing in the vertical cleaning modules112of the post-CMP cleaning system110. In this example, the HPC module200has a first end202facing the first portion105of the CMP processing system100, a second end204facing opposite the first end202, a first side206facing the second robot150, and a second side208facing opposite the first side206. The first and second sides206,208extend orthogonally between the first and second ends202,204. The plurality of vertical cleaning modules112are located within the second portion106. The one or more vertical cleaning modules112are any one or combination of contact and non-contact cleaning systems for removing polishing byproducts from the surfaces of a substrate, e.g., spray boxes and/or brush boxes. The drying unit170is used to dry the substrate120after the substrate has been processed by the vertical cleaning modules112and before the substrate120is transferred to a system loading station130by the first robot124. Here, the drying unit170is a horizontal drying unit, such that the drying unit170is configured to receive a substrate120through an opening (not shown) while the substrate120is disposed in a horizontal orientation. Herein, substrates120are moved between the HPC module200and the vertical cleaning modules112, between individual ones of the vertical cleaning modules112, and between the vertical cleaning modules112and the drying unit170using the substrate handler180. In embodiments herein, operation of the CMP processing system100, including the substrate handler180, is directed by a system controller160. The system controller160includes a programmable central processing unit (CPU)161which is operable with a memory162(e.g., non-volatile memory) and support circuits163. The support circuits163are conventionally coupled to the CPU161and comprise cache, clock circuits, input/output subsystems, power supplies, and the like, and combinations thereof coupled to the various components of the CMP processing system100, to facilitate control thereof. The CPU161is one of any form of general purpose computer processor used in an industrial setting, such as a programmable logic controller (PLC), for controlling various components and sub-processors of the processing system. The memory162, coupled to the CPU161, is non-transitory and is typically one or more of readily available memories such as random access memory (RAM), read only memory (ROM), floppy disk drive, hard disk, or any other form of digital storage, local or remote. Typically, the memory162is in the form of a non-transitory computer-readable storage media containing instructions (e.g., non-volatile memory), which when executed by the CPU161, facilitates the operation of the CMP processing system100. The instructions in the memory162are in the form of a program product such as a program that implements the methods of the present disclosure. The program code may conform to any one of a number of different programming languages. In one example, the disclosure may be implemented as a program product stored on computer-readable storage media for use with a computer system. The program(s) of the program product define functions of the embodiments (including the methods described herein). Illustrative non-transitory computer-readable storage media include, but are not limited to: (i) non-writable storage media (e.g., read-only memory devices within a computer such as CD-ROM disks readable by a CD-ROM drive, flash memory, ROM chips or any type of solid-state non-volatile semiconductor memory devices, e.g., solid state drives (SSD)) on which information may be permanently stored; and (ii) writable storage media (e.g., floppy disks within a diskette drive or hard-disk drive or any type of solid-state random-access semiconductor memory) on which alterable information is stored. Such computer-readable storage media, when carrying computer-readable instructions that direct the functions of the methods described herein, are embodiments of the present disclosure. In some embodiments, the methods set forth herein, or portions thereof, are performed by one or more application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other types of hardware implementations. In some other embodiments, the substrate processing and/or handling methods set forth herein are performed by a combination of software routines, ASIC(s), FPGAs and, or, other types of hardware implementations. One or more system controllers160may be used with one or any combination of the various modular polishing systems described herein and/or with the individual polishing modules thereof. FIG.2Ais a top isometric view of the second side208of an exemplary HPC module200which may be used in the CMP processing system100described herein. InFIG.2A, a service access panel is omitted to more clearly show the internal components of the HPC module200.FIG.2Bis another top isometric view of the second side208of the HPC module200ofFIG.2A. InFIG.2B, a top panel of a lid216is further omitted to more clearly show the internal components of the HPC module200.FIG.2Cis a top isometric view of the first side206of the HPC module200ofFIG.2A. InFIG.2C, the lid216is omitted to more clearly show the internal components of the HPC module200. Generally, the HPC module200includes a chamber210, a basin214, and a lid216, formed of a plurality of side panels which collectively define a processing area212. A first side panel218is formed on the first side206of the HPC module200facing the second robot150. The first side panel218includes a first substrate handler access door220used for positioning a substrate120on a rotatable vacuum table230with the second robot150. A second side panel222is formed on the second end204of the HPC module200facing away from the first portion105. The second side panel222includes a second substrate handler access door221used for removing the substrate120from the rotatable vacuum table230with the substrate handler180. A third side panel226is formed on the second side208of the HPC module200. The third side panel226includes a service access panel opening228. The symmetry of the first substrate handler access door220and the service access panel opening228formed on opposite side panels of the HPC module200beneficially provides a horizontal buffing module that can be installed on either side of the processing system100as illustrated inFIG.1C. Disposed within the processing area212, the HPC module200further includes the rotatable vacuum table230for vacuum chucking a substrate120, an annular substrate lift mechanism270disposed radially outward of the rotatable vacuum table230, a pad conditioning station280disposed proximate the rotatable vacuum table230, and a pad carrier positioning arm300movable between a first position over the rotatable vacuum table230and a second position over the pad conditioning station280. The rotatable vacuum table230, the annular substrate lift mechanism270, the pad conditioning station280, and the pad carrier positioning arm300are each independently mounted to the basin214. The HPC module200further includes a rinse manifold290mounted to the basin214. A substrate center rinse bar292and one or more substrate spray bars294extend from a side of the rinse manifold290. The substrate center rinse bar292is used for directing a rinse fluid, e.g., a cleaning fluid or water, towards a center area of the rotatable vacuum table230. The substrate spray bars294are used for directing a spray towards one or more other areas of the rotatable vacuum table230, e.g., a perimeter area or a side portion of the rotatable vacuum table230. The rinse manifold290is positioned towards a corner of the basin214, and the substrate center rinse bar292and the substrate spray bars294extend along the second end204of the HPC module200inside the second side panel222. In some embodiments, the rinse manifold290is adjacent to the second side208(FIGS.2A-2B). In some other embodiments, the rinse manifold290is adjacent to the first side206(FIG.2C). The HPC module200further includes a brush rinse296mounted to the basin214. The brush rinse296is positioned towards the first end202of the HPC module200and adjacent to the pad conditioning station280for rinsing one or more components of the pad conditioning station280. FIG.3Ais a plan view of the HPC module200ofFIG.2C. The annular substrate lift mechanism270is disposed radially outward of the rotatable vacuum table230. The lift mechanism270includes a plurality of substrate contact points272disposed proximate to a circumferential edge of the rotatable vacuum table230. Each of the substrate contact points272is an upward facing shoulder formed on a substrate hoop274surrounding a chuck plate232. The lift mechanism270is configured so that one of the plurality of substrate contact points272contacts a substrate120before other ones of the plurality of substrate contact points272when lifting the substrate120from a substrate receiving surface266of the rotatable vacuum table230. The annular substrate lift mechanism270works in conjunction with the venting of vacuum pressure and optional nitrogen purge, described earlier, to remove the substrate120from the chuck plate232. Beneficially, use of the substrate lift mechanism270enables faster dechucking of the substrate120relative to the venting and optional nitrogen purge alone. FIG.3Bis a side sectional view of an exemplary pad conditioning station280which may be used in the HPC module200ofFIG.3A. The pad conditioning station280is disposed proximate to the rotatable vacuum table230. The pad conditioning station280includes a conditioning brush282facing away from the basin214. In some embodiments, the conditioning brush282includes a fibrous material. In some embodiments, the fibers are formed from nylon or another similar material. The conditioning brush282is coupled to a rotatable brush shaft284. The brush shaft284extends through the basin214being fluidly coupled to a conditioning fluid source (not shown). The brush shaft284is configured to convey conditioning fluid, e.g., deionized water, to a spray nozzle286disposed proximate the conditioning brush282. During operation of the pad conditioning station280, the conditioning brush282is rotated by the brush shaft284. During rotation, the conditioning fluid flows through the brush shaft284to the spray nozzle286, thereby wetting the conditioning brush282and facilitating the conditioning process. FIG.3Cis a side sectional view of an exemplary pad carrier positioning arm300which may be used in the HPC module200ofFIG.3A. The pad carrier positioning arm300is disposed proximate to the rotatable vacuum table230and the pad conditioning station280. A distal end302of the pad carrier positioning arm300includes a vertically movable pad carrier assembly304for supporting a buffing pad306at a lower end thereof. The pad carrier assembly304includes a head motor308for rotating the buffing pad306about an axis c2which is substantially aligned in the direction of gravity. The pad carrier assembly304includes a gimbal base310coupled to the head motor308by a spherical bearing312allowing a buffing surface of the pad carrier assembly304to pivot relative to a plane orthogonal to the axis c2. The pad carrier assembly304further includes a pad carrier314coupled to the gimbal base310. In some embodiments, the pad carrier314is sized to support a buffing pad306having a diameter of about 134 mm that is larger than conventional buffing pads used in pre-clean modules. In some embodiments, the pad carrier positioning arm300of the present disclosure supports a larger buffing pad306compared to conventional pre-clean modules. FIG.4Ais a side sectional view of an exemplary gimbal base310and a pad carrier314which may be used in the pad carrier assembly304ofFIG.3C. In some embodiments, the gimbal base310includes magnets316and the pad carrier314includes magnets318such that the gimbal base310and the pad carrier314are coupled via magnetic force. The gimbal base310and the pad carrier314are aligned via locating pins320. In some embodiments, the buffing pad306is formed of polyvinyl alcohol (PVA) material. PVA material is hydrophilic, and can absorb and retain water. When wet, PVA material is elastic, flexible, and soft, having mechanical strength and abrasion resistance. Compared to conventional material used as a buffing pad, such as poromeric material or filled or unfilled polymer material, PVA material provides high shear force for chemical and mechanical cleaning. The buffing pad306formed of PVA material has a diameter of about 134 mm, which is larger than a diameter of a typical buffing pad formed of conventional material, having a diameter about 67 mm. A larger buffing pad improves performance and reduces buffing time in chemical mechanical cleaning. Furthermore, a buffing pad306formed of PVA material is thicker than a typical buffing pad formed of conventional material. The pad carrier314is designed to support a large and thick water absorbent buffing pad306while preventing the buffing pad306from sagging by a mechanical clamping mechanism and a suction clamping mechanism. The gimbal base310further includes a lip portion322on a peripheral edge of the gimbal base310. The pad carrier314includes a tapered portion324on a peripheral edge of the pad carrier314, tapering from a bottom surface towards a top surface of the pad carrier314facing the gimbal base310, such that the tapered portion324is substantially parallel to an inner surface of the lip portion322of the gimbal base310. The lip portion322of the gimbal base310and the tapered portion324of the pad carrier314together mechanically clamp the buffing pad306along a peripheral edge of the buffing pad306. The pad carrier314has a diameter of about 128 mm on the bottom surface, and thickness of about 4.2 mm. A diameter of the pad carrier314on the top surface is smaller than the diameter of the pad carrier314by about 4.6 mm. FIGS.4B and4Care a plan view and a side sectional view of the pad carrier314according to a first embodiment. InFIG.4C, a portion of the gimbal base310and the buffing pad306are also shown. The pad carrier314includes a central slot326through which a rod328is pushed into the buffing pad306. The slot326is circular shaped with a diameter of about 15 mm, and negatively tapered from a surface facing the gimbal base310towards a surface facing the buffing pad306(i.e., a diameter at the surface facing the gimbal base310is larger than a diameter at the surface basing the buffing pad306). The rod328is cylindrically shaped with a diameter slightly larger than the diameter of the slot326such that the rod328is compressed when inserted into the slot326. The rod328, the pad carrier314, and the buffing pad306are sealed among one another other and create a lower pressure region inside therein as compared to atmospheric air pressure outside. The atmospheric air pressure presses on the lower pressure region surrounded by the rod328, the pad carrier314, and the buffing pad306and creates suction clamping force for the buffing pad306. The gimbal base310and the pad carrier314may be formed of a plastic or polymer, such as polyether ether ketone (PEEK). With the mechanical clamping mechanism by the lip portion322of the gimbal base310and the peripheral edge of the pad carrier314, and the suction clamping mechanism by the rod328and the buffing pad306, the buffing pad306can be supported by the pad carrier314securely. InFIGS.4B and4C, one circular slot326and one cylindrical rod328are illustrated. However, the pad carrier314may have multiple slots326, each of which receives one rod328, to create more suction clamping force to the buffing pad306. The rod328may be of any shape and the slot has a shape that matches the shape of the rod328such that the rod328and the pad carrier314create low pressure inside therein. FIG.4Dis a side sectional view of the pad carrier314according to a second embodiment. InFIG.4D, a portion of the gimbal base310and the buffing pad306are also shown. The pad carrier314includes a central slot326through which a rod328is pushed into the buffing pad306, as in the first embodiment shown in FIG.4C. In the second embodiment, a backing330that is in contact with the buffing pad306is disposed on a surface of the pad carrier314. The backing330may be formed of plastic and adds stiffness to the buffing pad306, further preventing the buffing pad306from sagging. FIGS.4E and4Fare top views of the buffing pad306according to a third embodiment. In the third embodiment, the buffing pad306has raised contact features formed on a surface of the buffing pad306facing the pad carrier314, and the pad carrier314has multiple slots326, in each of which one of the contact features engages. The raised contact features of the buffing pad306and the pad carrier314are sealed against each other and create a lower pressure region inside therein as compared to atmospheric air pressure outside, creating suction clamping force to the buffing pad306. InFIG.4E, the raised contact features are multiple pillars332and each of the pillars332engages in one slot326of the pad carrier314. InFIG.4F, the contact features include a pillar334that engages in a circle slot326that matches the shape of the pillar334and radial spokes336each of which engages in a rectangular slot326that matches the shape of the radial spokes336. In the embodiments described herein, pad carriers that support a large and thick water absorbent buffing pad, such as a buffing pad formed of polyvinyl alcohol (PVA) material, while preventing the buffing pad from sagging by a mechanical clamping mechanism and a suction clamping mechanism in chemical mechanical cleaning. A buffing pad formed of polyvinyl alcohol (PVA) material provides high shear force for chemical and mechanical polishing due to mechanical strength and abrasion resistance. A large sized buffing pad provides improved cleaning performance. While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow. | 25,878 |
11942320 | DETAILED DESCRIPTION As mentioned in the background, the yield and electrical performance of the semiconductor structure in the prior art need to be improved. The manufacture of semiconductor structures often involves an etching process. The etching process will inevitably cause certain damage to the surface of the base, such as increasing the number of broken chemical bonds on the surface of the base, which will affect the adhesion effect or the stability of electrical connection between the base and other structure in the semiconductor structure, thereby affecting the yield and electrical performance of the semiconductor structure. Referring toFIG.1, when a bit line structure in a semiconductor structure is manufactured, an initial bit line contact layer11, an initial transition layer12, an initial diffusion barrier layer13, an initial metal layer14and an initial bit line insulating layer15are sequentially stacked on a substrate100. Referring toFIG.1andFIG.2, a pattern layer16with an opening is formed on the initial bit line contact layer11, the initial transition layer12, the initial diffusion barrier layer13, the initial metal layer14and the initial bit line insulating layer15. By using the pattern layer16as a mask, the initial bit line contact layer11, the initial transition layer12, the initial diffusion barrier layer13, the initial metal layer14and the initial bit line insulating layer15are etched along the opening by an etching process to form a bit line structure101. The bit line structure101includes a bit line contact layer111, a transition layer121, a diffusion barrier layer131, a metal layer141and a bit line insulating layer151that are sequentially stacked. The bit line contact layer111is made of polysilicon, the transition layer121is made of titanium, the diffusion barrier layer131is made of titanium nitride, the metal layer141is made of tungsten, and the bit line insulating layer151is made of silicon nitride. After the bit line structure101is formed, the etching process causes certain damage to exposed surfaces of the substrate100and the bit line structure101, such that there are a large number of broken chemical bonds on the surface of the substrate100and the surface of the bit line structure101. Thus, there are many hydrogen ions and hydroxide ions on the surface of the substrate100and the surface of the bit line structure101. They will affect the conductivity at a contact between the bit line structure101and the substrate100, and affect the adhesion effect of a subsequent film layer to the surface of the substrate100and the surface of the bit line structure101, thereby affecting the yield and electrical performance of the formed semiconductor structure. An embodiment of the present disclosure provides a method of manufacturing a semiconductor structure. In this method, when a silicon nitride film layer is formed on a base by an atomic layer deposition process, a hydrogen-containing repair gas including a polar molecule is provided to a surface of the base before each of cyclic deposition steps is performed. Since a hydrogen-containing polar bond in the polar molecule is easily broken, there are many free hydrogen ions in the repair gas. The hydrogen ions combine with a large number of hydrogen ions and hydroxide ions on the surface of the base through a valence bond to generate hydrogen and water vapor. The hydrogen and water vapor are easy to escape from the base, which reduces the hydrogen and oxygen content in the base, and improves the strength and damage resistance of the base, thereby achieving the effect of repairing the damaged surface of the base. The embodiments of the present disclosure are described in detail below with reference to the drawings. Those skilled in the art should understand that many technical details are proposed in the embodiments of the present disclosure to make the present disclosure better understood. However, even without these technical details and various changes and modifications made based on the following embodiments, the technical solutions claimed in the present disclosure may still be realized. Referring toFIGS.4and5, a base104is provided. A silicon nitride film layer103is formed on the base104by an atomic layer deposition process. The atomic layer deposition process includes multiple cyclic deposition steps I. In each of the cyclic deposition steps I, a silicon source gas and a nitrogen source gas are provided to a surface of the base104. In this embodiment, the silicon source gas is dichlorosilane, and the nitrogen source gas is ammonia gas. In other embodiments, the silicon source gas may also be at least one of the group consisting of silane, disilane, trichlorosilane and hexachlorodisilane, and the nitrogen source gas may also be nitrogen. In this embodiment, the silicon nitride film layer103formed on the surface of the base104has desirable compactness and strong impurity shielding ability, which can well protect the base104and avoid damage to the base104caused by a subsequent etching process. Referring toFIG.5, the method further includes a repair step II before each of the cyclic deposition steps I. In the repair step II, a hydrogen-containing repair gas is provided to the surface of the base104. The repair gas includes a polar molecule for repairing the surface of the base104that is damaged. The polar molecule in the repair gas is a gaseous hydrogen-containing polar molecule. Since a hydrogen-containing polar bond in the polar molecule is easily broken, there are many free hydrogen ions in the repair gas. When the repair gas contacts the surface of the base104and further enters the base104, the hydrogen ions combine with a large number of hydrogen ions and hydroxide ions on the surface of the base104through a valence bond to generate hydrogen gas and water vapor. This reduces the hydrogen and oxygen content of the base104, and improves the strength and damage resistance of the base104, thereby achieving the effect of repairing the damaged surface of the base104. In this embodiment, referring toFIG.6, the repair gas and the nitrogen source gas are the same type of gas, so the equipment for supplying the repair gas and the nitrogen source gas to the surface of the base104can be the same equipment, which reduces the equipment cost for manufacturing the semiconductor structure. Moreover, the repair gas and the nitrogen source gas can be controlled by the same equipment, which simplifies the manufacturing process of the semiconductor structure. In addition, there is no need to use other gas sources, which reduces the raw material cost for manufacturing the semiconductor structure. Like the nitrogen source gas, the repair gas includes ammonia gas. The ammonia gas in the repair gas is used to repair the damaged surface of the base104(refer toFIG.4) through a valence bond, so as to improve the strength and damage resistance of the base104. Other film layer will further be formed on the surface of the base104subsequently. By reducing the degree of damage to the surface of the base104, the adhesion effect between the film layer and the base104can be improved, thereby improving the yield of the formed semiconductor structure. The ammonia gas in the nitrogen source gas is used as a raw material for forming the silicon nitride film layer103. In other embodiments, the repair gas may also be gaseous hydrogen sulfide, hydrogen peroxide or ethanol. In this embodiment, the base104is internally provided with buried word lines, shallow trench isolation structures, active areas and bit line structures, etc. In the process of forming the silicon nitride film layer103, the repair gas provided to the surface of the base104reduces the degree of damage to the surface of the base104, and improves the stability of electrical connection between the structures in the base104, thereby improving the electrical performance of the formed semiconductor structure. Referring toFIG.6, the repair step II includes a first repair step a and a second repair step b. The first repair step a is performed before a first cyclic deposition step I, and the second repair step b is performed between every two adjacent cyclic deposition steps I. The duration of the first repair step a is longer than the duration of the second repair step b. Since the first repair step a is performed before the first cyclic deposition step I, the repair gas directly contacts the surface of the base104(refer toFIG.4) to repair the damaged surface of the base104. The repair gas in the subsequent second repair step b needs to penetrate through the formed silicon nitride film layer to contact the surface of the base104so as to repair the damaged surface of the base104. The duration of the first repair step a is longer than that of the second repair step b, such that the repair gas repairs most of the damaged surface of the base104in the first repair step a. The subsequent second repair step b further improves the repair effect of the repair gas on the damaged surface of the base104. In other embodiments, the duration of the first repair step may also be equal to that of the second repair step. Referring toFIG.6, after the repair step II, the method further includes a purge step to remove the repair gas. The repair gas is ammonia gas. The ammonia gas that is not involved in the valence bond in the repair step II will react with a by-product (hydrogen chloride) generated by a reaction of the silicon source gas and the nitrogen source gas in the subsequent cyclic deposition step I to generate granular ammonium chloride on the surface of the base104. The granular ammonium chloride cannot be removed by purging and it will affect the deposition effect of the silicon nitride film layer in the next cyclic deposition step I. Therefore, the purge step is added after the repair step II. The purge step can remove the excess repair gas, and prevent the excess repair gas from reacting with the by-product generated in the subsequent cyclic deposition step I to produce ammonium chloride that is difficult to remove, thereby improving the quality of the formed silicon nitride film layer and the yield of the semiconductor structure. In the cyclic deposition step I, the silicon source gas is provided to the surface of the base104. The silicon source gas is maintained on the surface of the base104through a saturated adsorption reaction. After the silicon source gas is provided, before the nitrogen source gas is provided, the method further includes a purge step to remove excess silicon source gas that is not adsorbed on the surface of the base104, so as to avoid affecting the subsequent cyclic deposition step I. Then, the nitrogen source gas is provided to the surface of the base104such that the nitrogen source gas reacts with the silicon source gas adsorbed on the surface of the base104to form a layer of silicon nitride in the form of a monatomic film. Since the reaction of the nitrogen source gas and the silicon source gas will also produce hydrogen chloride as a by-product, the method further includes a purge step before the second repair step b after the nitrogen source gas is provided. The purge step is configured to remove the excess nitrogen source gas and the by-product hydrogen chloride. It prevents the hydrogen chloride from reacting with the repair gas provided in the second repair step b to generate an impurity on the surface of the base104to affect the subsequent deposition effect of silicon nitride. Therefore, the purge step ensures the formation of a good-quality formed silicon nitride film layer103, thereby improving the yield of the semiconductor structure. In this embodiment, the atomic layer deposition process is a heat treatment atomic layer deposition process, and a process used in the repair step is a heat treatment process. The heat treatment process keeps the repair gas in a high-temperature state so as to improve the activity of the polar molecule in the repair gas, such that the hydrogen ions in the repair gas can more easily react with the hydrogen ions and hydroxide ions in the base104, thereby improving the repair effect of the repair gas on the damaged surface of the base104. In some embodiments, the temperature in the repair step II is the same as that in the heat treatment atomic layer deposition process. Therefore, when transitioning from the repair step II to the cyclic deposition step I, there is no need to adjust the process temperature, thereby improving the repair effect of the repair gas on the damaged surface of the base104and simplifying the manufacturing process of the semiconductor structure. The temperature in the heat treatment atomic layer deposition process is 650-800° C. In this temperature range, the polar molecule in the repair gas has high activity, which can ensure a desirable repair effect of the repair gas on the damaged surface of the base104. In other embodiments, referring toFIG.7, the atomic layer deposition process is a plasma atomic layer deposition process, and a process used in the repair step II is a plasma process. The plasma process includes a radio frequency (RF) treatment of the repair gas such that the repair gas is in a free radical state. This treatment improve the activity of the polar molecule in the repair gas, such that the hydrogen ions in the repair gas can more easily react with the hydrogen ions and hydroxide ions in the base104, thereby improving the repair effect of the repair gas on the damaged surface of the base104. The temperature in the plasma atomic layer deposition process is relatively low, namely, 550-630° C., which can ensure a desirable repair effect of the repair gas on the damaged surface of the base104. In this embodiment, referring toFIG.3, the step of providing the base104includes: provide a substrate100; form bit line structures101spaced apart from each other on the substrate100; and form a buffer layer102on a surface of each of the bit line structures101and a surface of the substrate100, where the material of the buffer layer102is different from the material of the silicon nitride film layer103(refer toFIG.4). The material of the buffer layer102may be silicon oxide. In other embodiments, the base may be a structure at any stage during the manufacturing process of the semiconductor structure where a silicon nitride film layer needs to be deposited. In this embodiment, the internal composition structure of the base is not limited. In some embodiments of the present disclosure, each of the bit line structure101includes a bit line contact layer111, a transition layer121, a diffusion barrier layer131, a metal layer141and a bit line insulating layer151that are sequentially stacked. In this embodiment, in the step of forming the bit line structures101on the substrate100, an etching process is used. Since the etching process inevitably causes certain damage to the surface of the substrate100and the surface of each of the bit line structures101, there are a large number of broken chemical bonds on the surface of the substrate100and the surface of the bit line structure101. Thus, there are many hydrogen ions and hydroxide ions on the surface of the substrate100and the surface of the bit line structure101. This will affect the conductivity at a contact between the bit line structure101and the substrate100, and affect the adhesion effect of a subsequent film layer to the surface of the substrate100and the surface of the bit line structure101. The hardness of the silicon nitride film layer103is much greater than that of the substrate100and the bit line structure101. When the silicon nitride film layer103is directly formed on the surface of the substrate100and the surface of the bit line structure101, a gap is likely to exist where the silicon nitride film layer103contacts the surface of the substrate100and the surface of the bit line structure101. The silicon oxide layer102is first formed on the surface of the substrate100and the surface of the bit line structure101. The hardness difference between the buffer layer102and the silicon nitride film layer103is small, and the hardness difference between the buffer layer102and the substrate100and the bit line structure101is also small. Therefore, the adhesion effect between the buffer layer102and the surface of the substrate100and the surface of the bit line structure101can be improved, and the adhesion effect between the buffer layer102and the silicon nitride film layer103can also be improved, thereby improving the yield of the semiconductor structure. In this embodiment, the buffer layer102and the silicon nitride film layer103together serve as a protective layer for the bit line structure101, which avoids damage to the bit line structure101caused by the subsequent etching process, and insulates the bit line structure101from other subsequently formed conductive layer. The buffer layer102is formed by a low pressure chemical vapor deposition process. The buffer layer102formed by the chemical vapor deposition process has a low density. When the buffer layer102is made of silicon oxide, the formed buffer layer102has a net structure. It is easy for the repair gas to penetrate through the buffer layer102to repair the damaged surface of the substrate100and the damaged surface of the bit line structure101, so as to improve the conductivity at the contact between the bit line structure101and the substrate100. In addition, the chemical vapor deposition process has a fast deposition rate and saves the production time, thereby improving the production efficiency of the semiconductor structure. In other embodiments, the buffer layer may also be formed by an atomic layer deposition process or an atmospheric pressure chemical vapor deposition process. In this embodiment, the thickness of the buffer layer102in a direction perpendicular to the surface of the substrate100is 2-6 nm. In an exemplary embodiment, the thickness of the buffer layer102is 4 nm. The buffer layer102is thin, such that the repair gas can penetrate through the buffer layer102quickly to contact the surface of the substrate100and the surface of the bit line structure101, thereby ensuring a desirable repair effect of the repair gas on the damaged surface of the substrate100and the damaged surface of the bit line structure101. In some embodiments, since the silicon oxide buffer layer102has a net structure, it holds a large amount of hydrogen ions and hydroxide ions. When the repair gas repairs the surface of the substrate100and the surface of the bit line structure101, the hydrogen ions in the repair gas will also react with the hydrogen ions and hydroxide ions in the buffer layer102to generate hydrogen gas and water vapor to escape the buffer layer. This reduces the hydrogen content and oxygen content of the buffer layer102and improves the strength and damage resistance of the buffer layer102. In this embodiment, referring toFIG.6, the duration of the first repair step a is longer than that of the second repair step b. In the first repair step a, the repair gas repairs most of the damaged surface of the substrate100and most of the damaged surface of the bit line structure101to ensure a desirable repair effect on the damaged surface of the substrate100and the damaged surface of the bit line structure101. In addition, in the first repair step a, most of the repair gas has enough time to penetrate through the buffer layer102to contact the surface of the substrate100and the surface of the bit line structure101, so as to repair the damaged surface of the substrate100and the damaged surface of the bit line structure101. The duration of the first repair step a is 1-10 min. In an exemplary embodiment, the duration of the first repair step a may be 8 min. In such a duration, the repair gas in the first repair step a repairs most of the damaged surface of the substrate100and most of the damaged surface of the bit line structure101, which improves the conductivity at the contact between the bit line structure101and the substrate100and improves the yield of the semiconductor structure. The duration of the second repair step b is 1-50 s. In an exemplary embodiment, the duration of the second repair step b may be 40 s. Such a duration facilitates the further repairing of the damaged surface of the substrate100and the damaged surface of the bit line structure101, so as to improve the repair effect of the repair gas on the damaged surface of the substrate100and the damaged surface of the bit line structure101. Therefore, the conductivity at the contact between the bit line structure101and the substrate100is further improved, and the yield of the semiconductor structure is further improved. In other embodiments, the duration of the first repair step a may also be equal to that of the second repair step b. The duration of the first repair step a and the duration of the second step b may respectively be 1-10 min. The repair gas includes a first repair gas in the first repair step a and a second repair gas in the second repair step b. The flow rate of the first repair gas is greater than that of the second repair gas. Within the same duration, this flow rate design can increase the amount of the repair gas that penetrates through the buffer layer102to contact the surface of the substrate100and the surface of the bit line structure101, which ensures a desirable repair effect of the repair gas on the damaged surface of the substrate100and the damaged surface of the bit line structure101. The flow rate of the first repair gas is 3-10 L/min. In an exemplary embodiment, the flow rate of the first repair gas may be 8 L/min Within this flow rate range, a large amount of first repair gas penetrates through the buffer layer102to repair most of the damaged surface of the substrate100and most of the damaged surface of the bit line structure101. This ensures a desirable repair effect of the first repair gas on the surface of the substrate100and the surface of the bit line structure101, and also ensures desirable electrical conductivity at the contact between the bit line structure101and the substrate100. The flow rate of the second repair gas is 2-5 L/min. In an exemplary embodiment, the flow rate of the second repair gas may be 4 L/min, such that the second repair gas further repairs the damaged surface of the substrate100and the damaged surface of the bit line structure101. This further improves the overall repair effect of the repair step II on the surface of the substrate100and the surface of the bit line structure101, thereby further improving the conductivity at the contact between the bit line structure101and the substrate100and the yield of the semiconductor structure. In other embodiments, the flow rate of the first repair gas may be equal to that of the second repair gas. The flow rates of the first repair gas and the second repair gas may be 3-10 L/min, respectively. In other embodiments, according to the structure of the base and the etching process, the duration of the first repair step, the duration of the second repair step, the flow rate of the first repair gas and the flow rate of the second repair gas may be adjusted appropriately to ensure a desirable repair effect of the repair gas on the surface of the substrate in the repair step. In this embodiment, when the silicon nitride film layer103is formed on the base104by the atomic layer deposition process, a repair step II is added before each cyclic deposition step I. The repair step II includes: provide a hydrogen-containing repair gas to the surface of the base104, the repair gas including a polar molecule. The repair gas and the nitrogen source gas used to form the silicon nitride film layer103are the same type of gas, which simplifies the manufacturing process of the semiconductor structure and reduces the manufacture cost of the semiconductor structure. In addition, the repair gas and the nitrogen source gas are treated by the same process, which improves the activity of the polar molecule in the repair gas under the premise of ensuring the formation of a good-quality silicon nitride film layer. This improves the repair effect of the polar molecule on the damaged surface of the base104through a valence bond, reduces the hydrogen and oxygen content in the base104, and improves the strength and damage resistance of the base104, thereby improving the yield and conductivity of the semiconductor structure. In the description of the specification, the description with reference to terms such as “an embodiment”, “an illustrative embodiment”, “some implementations”, “an illustrative implementation” and “an example” means that the specific feature, structure, material or feature described in combination with the implementation(s) or example(s) is included in at least one implementation or example of the present disclosure. In this specification, the schematic expression of the above terms does not necessarily refer to the same implementation or example. Moreover, the described specific feature, structure, material or characteristic may be combined in an appropriate manner in any one or more implementations or examples. It should be noted that in the description of the present disclosure, the terms such as “center”, “top”, “bottom”, “left”, “right”, “vertical”, “horizontal”, “inner” and “outer” indicate the orientation or position relationships based on the drawings. These terms are merely intended to facilitate description of the present disclosure and simplify the description, rather than to indicate or imply that the mentioned device or element must have a specific orientation and must be constructed and operated in a specific orientation. Therefore, these terms should not be construed as a limitation to the present disclosure. It should be understood that the terms such as “first” and “second” used herein may be used to describe various structures, but these structures are not limited by these terms. Instead, these terms are merely intended to distinguish one element from another. The same elements in one or more drawings are denoted by similar reference numerals. For the sake of clarity, various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown. For the sake of brevity, the structure obtained by implementing multiple steps may be shown in one figure. In order to make the understanding of the present disclosure more clearly, many specific details of the present disclosure, such as the structure, material, size, processing process and technology of the device, are described below. However, as those skilled in the art can understand, the present disclosure may not be implemented according to these specific details. Finally, it should be noted that the above embodiments are merely intended to explain the technical solutions of the present disclosure, rather than to limit the present disclosure. Although the present disclosure is described in detail with reference to the above embodiments, those skilled in the art should understand that they may still modify the technical solutions described in the above embodiments, or make equivalent substitutions of some or all of the technical features recorded therein, without deviating the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present disclosure. INDUSTRIAL APPLICABILITY In the method of manufacturing a semiconductor structure provided by the embodiment of the present disclosure, when the silicon nitride film layer is formed on the base by the atomic layer deposition process, a repair step is added before each cyclic deposition step. This reduces the hydrogen and oxygen content in the base, reduces the content of impurity elements in the base, and improves the strength and damage resistance of the base, thereby achieving the effect of repairing the damaged surface of the base and improving the yield and conductivity of the semiconductor structure. | 28,088 |
11942321 | DETAILED DESCRIPTION The present disclosure relates to methods and systems for a new thin film crystallization technique where a small laser beam spot is continually advanced across a film to create a sustained molten zone that is translated across the film and crystallizes to form uniform, large- or small-grained crystalline structures or grains. Because these grains can be sized to more than a micron or less than 0.3 micron, and are highly uniform, displays having 3,000 to 5,000 pixels per inch can be created from these films. Further, the disclosed methods and systems can produce these small, uniform grained films with high throughput and efficiency. Additionally, the described techniques can produce a film having small, uniform grains without requiring stitching. FIG.1depicts a system100for performing the described sequential lateral solidification technique. In some embodiments, system100can include a laser102, a harmonic oscillator104, pre-scanner optics106, a beam scanner108, a scanning laser beam110, post scanner optics112, a final beam114, a sample116, and a stage118. In some embodiments, laser102can be a high frequency, low pulse energy laser, for example, a quasi-continuous wave solid-state laser or fiber laser. Exemplary high frequency fiber lasers can be manufactured by IPG Photonics, Inc. (Oxford, MA). High frequency refers to a frequency of 10 megaheartz to several hundred megahertz, for example, at least 10 MHz or about 100 MHz or 900 MHz. Laser102can have a total power of about 100 W to more than 500 W. Laser102can have a per pulse energy of less than one to about ten micro Joule. An exemplary laser can have a pulse duration of about one nanosecond or less and separate between pulses of about one nanosecond to about five nanoseconds. Note that laser102provides a series of low energy pulses to the sample at the stated frequency, that is, laser102is a pulsed laser. For example, a given area of sample116can experience 10, 20 and up to 50 or more pulses from laser102. In some embodiments, continuous melt can occur with only approximately one shot per region, as long as there is some overlap to continue the continuous melting process. Laser102can also be very coherent, e.g., having a low M2forming a nearly perfect Gaussian shape. The beam produced by laser102can have both spatial and temporal coherence. Laser102also can be a single-mode laser. In some embodiments, laser102can have a wavelength in the UV range, e.g., about 355 nm, or can be green, e.g., 532 nm, Laser102can produce a narrow, relatively short beam, and, accordingly, producing a narrow, short spot on the film. For example, the beam can be about 10 micron to about 1 mm or about 1 cm in length and about one micron to 100 micron in width. In some embodiments, the beam can be a few microns in length. A beam with these dimensions is referred to herein as a spot beam. While the present methods are described with respect to a circular or oval spot beam, the present teachings also can be applied to other beam shapes, for example, square beams, line beams, and other configuration know to one of ordinary skill in the art. Further, as the dimensions of the beam are lengthened and shortened for a given beam width, it will affect the energy density applied per pulse, where a longer beam will have a lower energy density per pulse (requiring more pulses to melt the film) and a shorter beam with a higher energy density per pulse (requiring less pulses to melt the film). As noted above, the per pulse energy of laser102can be relatively low. For example, for a 200 MHz laser with a power of 200 W, the per pulse energy can be about one micro Joules. This energy is generally not sufficient to completely melt a region of silicon film with a single pulse or shot of the laser beam. However, in some cases, if the beam has an exceedingly small area, the energy can be sufficient to melt the film. Consequently, a plurality of pulses of a reasonable sized spot can be applied to the film in short succession with a high degree of overlap to melt a region of the film. Particularly, a second pulse or shot can be applied before an entire melting and solidification cycle has occurred with respect to the first pulse. This increased overlap, as compared to prior art methods, can be preferred because it provides an averaging effect of energy per pulse (each pulse has some slight energy variation) which can result in a more uniform film. Further, in the described system, laser102continually fires, without turning laser102on and off, and can continually fire at fixed, high frequencies. Harmonic oscillator104can convert light from laser102from an infrared wavelength, e.g., about 1065 nm, to a UV (355 nm) or green (532 nm) wavelength. Pre-scanner optics106processes the beam after harmonic oscillator104and before the beam enters scanner108. In some embodiments, the described systems and methods require the surface of the film to be scanned at a high speed, for example, at least 0.1 km/s, for example, 10 km/s, and up to 20 or 30 km/s. Existing stages cannot move sample116and stage118at this rate. Further, the optical systems also cannot be translated at that those speed with the existing technology. Accordingly, the present system can use beam scanner108to direct the beam across the sample at such speeds. Exemplary beam scanning techniques include galvanometers, reflective polygons, acousto-optical techniques and electro-optical techniques. Further, other types of beam steering techniques known to one of ordinary skill in the art can be used to obtain the desired scanning frequencies. Post-scanning optics112processes the beam after beam scanner108. Post-scanner optics106can, for example, to focus and shape the beam. Sample116can be any type of film to be processed with laser irradiation, for example, metal or semiconductor films. In some embodiments, the film can be silicon. Stage118can be a stage capable of moving the film m three directions (x, y, and z) below the optical system. System100also can include necessary computer systems for controlling the various components of the system. Additionally, system100can include a processor and memory for storing instructions as to how to operate the system according to the methods described below. FIG.2depicts a top view of a film200being processed by the described sequential lateral solidification technique, according to aspects of the present disclosure.FIG.2depicts a portion of film200during the described process. Prior pulses from laser102have created a complete or partial molten zone202that cools and solidifies primarily perpendicular to the direction of beam motion into uniform, small grained crystals (as shown inFIG.3). After prior laser pulses have completely or partially melted film200to form molten zone202(prior to crystallization), and as the beam is scanned in direction204, a first pulse, as depicted inFIG.2, having length208and a width210, is directed onto film200to irradiate and form a first region206, also having a corresponding length208and width210. The beam is then advanced a distance212using beam scanner108and a second pulse from the laser is directed onto film200to irradiate a second region216, also having a corresponding length208and width210. The beam is then advanced again the same distance212, and a third pulse from the laser is directed onto film200to irradiate and form a third region218, also having a corresponding length208and width210. The beam is continually scanned across film200, while laser102continually fires, to create a molten zone202across the entire film, which cools and crystallizes to form small, uniform crystal grains. The translation distance212between pulses can be significantly smaller than spot beam length208. For example, spot beam length208can be about 100 micron to 1 cm, and spot beam width210can be about one micron. For a 150 MHz laser being scanned at 3.750 km/s, translation distance212between pulses can be about 25 microns. For higher frequencies, for example frequency on the order of 500 MHz, translation distance212can be less than 10 microns, for example, seven microns. Accordingly, there is significant overlap between pulses and each portion of the film can experience, in some instances 10, 20, 30, 40, 50 or more laser pulses. For shorter spot beam lengths, the distance between pulses can be as small as one micron. As noted above, depending on the dimensions of the spot beam, the energy of the each laser pulse forming region206may not be sufficient to melt region206. However, by irradiating the same region of the film with a series or 10, 20 or even 100 pulses, the integrated energy density of an area resulting from the overlapping pulses becomes sufficient to melt the irradiated region. For example, the total, integrated energy density a film region can sec from multiple overlapping pulses can be about a few hundred micro Joules per square centimeter to about one Joule per square centimeter. Once the molten zone202completely melts, it starts to cool and crystallize from unmelted regions, that is, in the direction primarily perpendicular to the travel of the beam.FIG.3depicts an exemplary crystal structure once molten zone202has cooled and crystallized.FIG.3shows a region of small, uniform crystal grains302, having a width of approximately 0.5 micron, e.g., the width of the spot beam used for irradiation. In order to crystallize the entire width of the sample, the beam is positioned back to the left edge of the film, translated a set distance in a direction perpendicular to the scan direction and a second scan is performed. The translation distance perpendicular to the scan direction can be set based on the selected resultant crystal stricture. The individual crystal grains can have a size of less than 0.5 microns, for example, about 0.3 microns. For example,FIG.4depicts a processed film400, where three scans have been performed. A first scan melts and crystallizes region402. The beam is then translated in the y direction, i.e., the direction perpendicular to the scan direction, a distance more than the lateral growth length of the crystal structure (but less than twice the lateral growth length), and a second scan is performed to melt and crystallize region404. In other words, the overlap between region402and406is more than (but less than twice) the lateral growth length. Again, the beam is translated in they direction, a distance more than (but less than twice) the lateral growth length of the crystal structure and a third scan is performed to melt and crystalize region406. This process is performed until the entire film is crystallized. The resulting film contains highly uniform, small crystal grains. For example, in some embodiments, the crystal grains can be about 0.3 to about 0.5 microns. Further processing of these films can be done to form transistors to produce a display having 1,000; 2,000 and up to 5,000 pixels per inch. These screens can then be used for virtual reality applications, or other applications requiring very high pixel density. In another embodiment, the film can be translated less than the lateral growth length between scans. This results in a different microstructure having long crystal grains. It should also be noted that the crystals grow in a direction perpendicular to the direction of the scan. Prior sequential lateral solidification technique, for example, those disclosed in U.S. Pat. No. 6,555,449, titled “Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidification,” the entire disclosure of which is incorporated by reference, require an entire melting and solidification cycle before the film is irradiated and melted by the next pulse. Because the method of the present disclosure uses a high frequency laser, with low pulse energy, this method does not rely on an entire melting and solidification cycle for each pulse. Instead, a complete or partial molten zone is created by irradiating each region of the molten zone multiple times, and propagating the molten zone along the length of the film in the direction of the beam scan. Accordingly, the next irradiation occurs before the prior region has been laterally explosively crystallized, which leads to the formation of non-uniform grains. The molten zone then continuously crystallizes behind the progress of the beam scan. Maximum explosive crystallization rates are only about 15 m/s, at most. For example, if the beam is being scanned at 10 of 15 km/s, the explosive crystallization front can be proceeding at about 15 m/s, orders of magnitude lower than the speed of the beam scan. Consequently, the present method does not suffer from non-uniformity caused by explosive crystallization in the direction of the scan. Accordingly, the methods disclosed herein scan at rates faster than the maximum solidification rate, e.g., 15 m/s, such that the detrimental explosive crystallization process lags behind the rate at which the film is irradiated and melted. As a result, the films produced by this technique have an improved crystalline structure.FIG.5Adepicts a top view of a molten zone202of a film processed according to the described complete melting techniques. In the example ofFIG.5A, the integrated, e.g., accumulated, energy density from the pulses in the overlapping regions is higher than the energy density required for complete melting. As molten zone202cools, solidifies, and crystallizes, a molten tail500, is formed, surrounded by crystalline region502. That is, the film laterally solidifies from the edges of the molten zone202into the center and the crystallization proceeds from the outside in to the center. This provides short, straight grains502, instead of angled grains. The tail500can be approximately 1 mm behind the front of the beam504. Zone202in this example can be completely molten. FIG.5Bdepicts a top view of a molten zone510of a film processed according to the described partial melting techniques. In the example ofFIG.5B, the integrated, e.g., accumulated, energy density from the pulses in the overlapping regions is lower than the energy density required for complete melting, but higher than the energy density required for complete melting. When the zone510is partially molten, solidification proceeds from the distributed solid seeds surviving inside the molten region, resulting in small equiaxed grain structure (region512), instead of long and directional grains obtained under full melting condition and sequential lateral solidification. Further, while prior sequential lateral solidification techniques can produce uniform grains, the grain size in prior techniques, e.g., 2.5 to 3.5 microns, is significantly larger than the 0.3 to 1.0 micron grain sizes achievable by the techniques of the present disclosure by making use of more coherent solid state lasers. Because the beam scan proceeds at such a high speed, films can be processed efficiently. Further, the lasers implemented in this method are less expensive to operate and the methods can produce a higher crystallization rate per Watt. This provides a much lower cost per Watt for manufacturing and a highly efficient process overall. While other laser crystallization techniques, for example, the excimer laser annealing techniques disclosed in United States Patent Application Publication No. 2015/0076504, “Advanced Excimer Laser Annealing for Thin Films,” the entire contents of which are hereby incorporated by reference, can produce relatively small grains, these techniques generally do not produce the uniform crystal structure produced by the disclosed methods, due to the non-uniform long line beam, and shot-to-shot energy fluctuation, and necessary for displays having 1,000 or more pixels per inch. Exemplary displays created using the described techniques can be organic light emitting diode displays for virtual reality, mobile, personal computer, and other larger displays, for example televisions. In some embodiments, the molten zone and the corresponding crystal structure can be formed at an angle with respect to the edge of the film or sample or display screen. This technique is referred to as beam tilting with respect to the edge of the film or screen. In some embodiments, the laser source can be continuous wave laser or an electron beam. In some embodiments, beam rastering method can be used to scan the beam. In some embodiments, the length of the spot beam can be reduced. In these embodiments, because the spot beam will have a smaller area, each pulse will impart more energy to irradiated region and fewer pulses will be required to fully melt a given region of the film. Other beam shapes also can be used, for example, donut shapes, chevron or other types of shapes that would create a continuous, moving molten zone. In some embodiments, an approximately single pulse method can also be used. In some embodiments, in order to avoid edge regions, i.e., regions with poor crystal structure because the region was not irradiated with sufficient energy to substantially melt the film, the scanning process can begin prior to the beam being positioned over the film or display screen, such that each product region of the film experiences the requisite number of pulses to produce the requisite crystalline structure. In other embodiments, edge regions with poor crystal structure can be removed post laser irradiation. In some embodiments, the present system and method can also be used to perform a partial melt crystallization process. For example, the quasi-continuous wave laser can be used to partially melt the film, instead of completely melting the irradiated region of the film. FIG.6depicts laser irradiation of a film600according to the described partial melting method. A first scan604can occur in the positive y direction resulting in irradiation of region602, having a width606. In order to achieve partial melting, the total energy density can be lowered by shaping a beam with a larger width606. For example, the width606can be about one micron to about one hundred microns. The overlap of each pulse or shot in the direction of the scan604of the partial melting method can be similar to the method described above, e.g., about 1-50 shots per unit area. Once the first scan604is complete, the beam is moved to begin a second scan608. The second scan608starts at region610moved in the negative)/direction, perpendicular to the direction of the scan. The overlap between two consecutive scans can range from about one micron to more than ten microns. Accordingly, the same point on a film can see multiple scans, for example, as few as less than two and up to about 50 scans. FIG.7depicts an exemplary grain structure700for a film processed using the described partial melting techniques with a very few scans, leading to very high crystallization rates. The resulting high-throughput and low-processing-cost material can have small grains, but may not be uniform. However, the non-uniformities may be somewhat regular, such that the irregularities can repeat. For example, the film can have periods of small grains702and periods of slightly larger grains704. The irregularities can repeat at similar or smaller distances compared to the device dimensions. Accordingly, optimal positioning of the devices on the film can be used to create uniform thin film transistors. As with the sequential lateral solidification techniques, the beam can be scanned at a high rate, e.g., 10 km/s or 15 km/s, or at least faster than 15 m/s. This is advantageous for the partial melting technique as it can eliminate the participation of explosive crystallization and thereby produce better quality films without the negative effects of explosive crystallization. Further, in order to compensate for some of the non-uniformity in produced crystal grains in this partial melting method, the devices can be aligned and/or tilted with respect to the processed material to improve uniformity. Another aspect of the present disclosure relates to a method and system for performing partial melt crystallization using a fiber laser. This technique is referred to herein as Fiber Laser Annealing or “FLA.” The system and technique for FLA is similar to that of the partial melting technique described above. A spot beam is created with a high frequency, e.g., 100-900 MHz, fiber laser. The spot beam can be more circular than the line beam (having a width of 1 micron) formed for the complete melting application discussed above. For example, the spot beam can have a width of 5, 10, 20, or 50 microns, and a height of about 50 microns to about 1 mm. The exact shape of the beam spot can be manipulated to deliver the appropriate amount of accumulated energy density to partially melt the film. This FLA method can produce a film having a crystal structure depicted inFIG.8A.FIG.8Adepicts a crystal structure800of film processed with minimally overlapped approximately one scan according the disclosed FLA method. Crystal structure800includes periodic regions of large grains802, followed by periodic regions of small grains804, each having a periodicity k. As repeated scans are performed in they direction, but shifted down in the x direction, the periodicity will repeat, such that repeated scans will have the same grain structure in the x direction.FIG.8Bdepicts a graph of grain size vs. distance in the x direction for a film scanned using the disclosed FLA techniques.FIG.8Bshows the periodicity of the characteristic grain size variation, λgrain. The grain structure produced by the FLA technique can be used to form active channels for transistors. For example,FIG.9Adepicts a transistor formed within a single period of grain structure disclosed inFIG.8A. Source S and drain D can be formed near the large grains and the device can be sized to fit within period λ.FIG.9Bdepicts an active channel AC formed within a single period of grain structure shown inFIG.8A, but tilted at an angle θ from the y axis. Placing the transistors within the periodicity X can create uniform transistors in a film that has a periodically non-uniform grain size. FIG.10depicts a FLA scan using four different spot beams, according to aspects of the present disclosure. In this example, a film is scanned in a scan direction1014with four beams1002,1004,1006,1008. The four spot beams1002,1004,1006,1008can be created from one laser, e.g., using a beam splitter to take a beam from a single laser and split it into four beams. This can be done using a configuration of mirrors. In other embodiments, two lasers can be used, splitting each beam into two to create four beams, or four separate lasers can be used. For example, if two lasers are used, each, for example, 150 MHz laser can produce a 1 ns pulse with a pulse spacing of 5.5 ns, providing an effective energy corresponding to a 300 MHz laser. Or, a 300 MHz laser can be used, with the beam divided into four beams. By using four separate beams, the microstructural periodicity λ of the resultant film call be reduced, by either half or by a quarter, depending on the technique, which can provide more averaging and reduced scale of variation of defects within an active region and thereby provide more uniform transistors formed within those active regions across the film. The periodicity can be reduced in this technique because the step distance between each pulse in the series of four pulses can be reduced. Because the beam is being split at least in half and sometimes into four but still has to have sufficient energy to partially melt the film, the size of the spot beams are reduced. For example, the width1018can remain the same, but the height1016can be reduced to about 10 microns to about 250 microns. Accordingly, in some embodiments, the spot beam can have a width of about 5 microns and height of about 10 microns. In order to crystallize the entire film, a plurality of scans can be performed to irradiate the entire film with the plurality of spot beams. For example,FIG.10depicts an nth scan1010and an N+1th scan1012. Exemplary scans rates can be about a few hundred to about a few thousand meters per second. Exemplary scan frequencies can be about 1 kHz to about 10-20 kHz. For both complete and partial melting techniques, the present disclosure can reduce the number and extent of surface protrusions in the processed film. Protrusions in the positive z direction of the film, i.e., the top surface of the film, can be caused by the atoms in liquid entirely surrounded by solid regions of the crystallizing film being forced upward during the crystallization process during which the density of Si decreases. The continuously present molten zone of the present disclosure can reduce these device processing and performance-detrimental protrusions because the liquid atoms cannot be fully trapped and surrounded by solid, as they are more connected with the molten area during crystallization. The subject matter described herein can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structural means disclosed in this specification and structural equivalents thereof, or in combinations of them. The subject matter described herein can be implemented as one or more computer program products, such as one or more computer programs tangibly embodied in an information carrier (e.g., in a machine readable storage device), or embodied in a propagated signal, for execution by, or to control the operation of, data processing apparatus (e.g., a programmable processor, a computer, or multiple computers). A computer program (also known as a program, software, software application, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file. A program can be stored in a portion of a file that holds other programs or data, in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communication network. The processes and logic flows described in this specification, including the method steps of the subject matter described herein, can be performed by one or more programmable processors executing one or more computer programs to perform functions of the subject matter described herein by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus of the subject matter described herein can be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit). Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processor of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. Information carriers suitable for embodying computer program instructions and data include all forms of nonvolatile memory, including by way of example semiconductor memory devices, (e.g., EPROM, EEPROM, and flash memory devices); magnetic disks, (e.g., internal hard disks or removable disks); magneto optical disks; and optical disks (e.g., CD and DVD disks). The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry. To provide for interaction with a user, the subject matter described herein can be implemented on a computer having a display device, e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor, for displaying information to the user and a keyboard and a pointing device, (e.g., a mouse or a trackball), by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well. For example, feedback provided to the user can be any form of sensory feedback, (e.g., visual feedback, auditory feedback, or tactile feedback), and input from the user can be received in any form, including acoustic, speech, or tactile input. The subject matter described herein can be implemented in a computing system that includes a back end component (e.g., a data server), a middleware component (e.g., an application server), or a front end component (e.g., a client computer having a graphical user interface or a web browser through which a user can interact with an implementation of the subject matter described herein), or any combination of such back end, middleware, and front end components. The components of the system can be interconnected by any form or medium of digital data communication, e.g., a communication network. Examples of communication networks include a local area network (“LAN”) and a wide area network (“WAN”), e.g., the Internet. It is to be understood that the disclosed subject matter is not limited in its application to the details of constriction and to the arrangements of the components set forth in the following description or illustrated in the drawings. The disclosed subject matter is capable of other embodiments and of being practiced and carried out in various ways. Also, it is to be understood that the phraseology and terminology employed herein are for the purpose of description and should not be regarded as limiting. As such, those skilled in the art will appreciate that the conception, upon which this disclosure is based, may readily be utilized as a basis for the designing of other structures, methods, and systems for carrying out the several purposes of the disclosed subject matter. It is important, therefore, that the claims be regarded as including such equivalent constructions insofar as they do not depart from the spirit and scope of the disclosed subject matter. Although the disclosed subject matter has been described and illustrated in the foregoing exemplary embodiments, it is understood that the present disclosure has been made only by way of example, and that numerous changes in the details of implementation of the disclosed subject matter may be made without departing from the spirit and scope of the disclosed subject matter. | 31,136 |
11942322 | DETAILED DESCRIPTION It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. Specific embodiments or examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, dimensions of elements are not limited to the disclosed range or values, but may depend upon process conditions and/or desired properties of the device. Moreover, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed interposing the first and second features, such that the first and second features may not be in direct contact. Various features may be arbitrarily drawn in different scales for simplicity and clarity. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. In addition, the term “made of” may mean either “comprising” or “consisting of.” As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, there have been challenges in reducing semiconductor feature size. Extreme ultraviolet lithography (EUVL) has been developed to form smaller semiconductor device feature size and increase device density on a semiconductor wafer. In order to improve EUVL, an increase in wafer exposure throughput is desirable. Wafer exposure throughput can be improved through increased exposure power or increased resist photospeed (sensitivity). Metal-containing photoresists are used in extreme ultraviolet (EUV) lithography because metals have a high absorption capacity of extreme ultraviolet radiation and thus increase the resist photospeed. Metal-containing photoresist layers, however, may outgas during processing which can cause the photoresist layer quality to change over time and may cause contamination, thereby negatively affecting lithography performance, and increasing defects. Furthermore, uneven exposure of the photoresist, especially at deeper portions of the photoresist layer may result in an uneven degree of cross-linking of the photoresist. Uneven exposure results from a lower amount of light energy reaching the lower portions of the photoresist layer. The uneven exposure may result in poor line width roughness (LWR) thereby preventing the formation of a straight edge resist profile. Further, the solvents used in the formation of and developing solvent-based photoresists may be toxic. A greener process of photoresist layer formation and subsequent pattern formation without using toxic solvents is desirable. Moreover, a spin coating processes may use only 2-5% of the material dispensed onto the substrate, while the remaining 95-98% is flung off during the spin-coating operation. A photoresist deposition operation with high material use efficiency is desirable. Furthermore, the density of spin-coated photoresist films may not be uniform. Aggregation of the photoresist film may occur in some portions. In addition, photoresist layer formation and patterning operations that substantially reduce or prevent metal contamination of the processing chambers and substrate handling equipment from the metals in metal-containing photoresists is desirable. In embodiments of the disclosure, the above issues are addressed by depositing a photoresist on a substrate by a vapor deposition operation, including atomic layer deposition (ALD), physical vapor deposition (PVD) or chemical vapor deposition (CVD) of the photoresist material. Photoresist layers deposited by a vapor phase deposition operation according to embodiments of the disclosure provide photoresist layers that have controllable film thickness, and high film uniformity and density, over a large deposition area. In addition, embodiments of the disclosure include solvent free photoresist layer formation, thus providing a greener process. Moreover, the photoresist deposition operation is a one-pot method (carried out in a single chamber), thus increasing the manufacturing efficiency, and limiting or preventing metal contamination of processing chambers. FIG.1illustrates a process flow100of manufacturing a semiconductor device according to embodiments of the disclosure. A resist is coated on a surface of a layer to be patterned or a substrate10in operation S110, in some embodiments, to form a resist layer15, as shown inFIG.2. In some embodiments, the photo resist15is a metallic photoresist formed by CVD, PVD or ALD. The composition of the metallic photoresist is explained later in this disclosure. In some embodiments, the resist layer15then undergoes a first heating operation S120after being deposited. In some embodiments, the resist layer is heated to a temperature of between about 40° C. and about 1000° C. for about 10 seconds to about 10 minutes, and in other embodiments, the heating temperature is in a range from about 250° C. to 800° C. After the optional first heating operation S120or the resist deposition operation S110, the photoresist layer15is selectively exposed to actinic radiation45/97(seeFIGS.3A and3B) in operation S130. In some embodiments, the photoresist layer15is selectively or patternwise exposed to ultraviolet radiation. In some embodiments, the ultraviolet radiation is deep ultraviolet radiation (DUV). In some embodiments, the ultraviolet radiation is extreme ultraviolet (EUV) radiation. In some embodiments, the photoresist layer is selectively or patternwise exposed to an electron beam. As shown inFIG.3A, the exposure radiation45passes through a photomask30before irradiating the photoresist layer15in some embodiments. In some embodiments, the photomask has a pattern to be replicated in the photoresist layer15. The pattern is formed by an opaque pattern35on the photomask substrate40, in some embodiments. The opaque pattern35may be formed by a material opaque to ultraviolet radiation, such as chromium, while the photomask substrate40is formed of a material that is transparent to ultraviolet radiation, such as fused quartz. In some embodiments, the selective or patternwise exposure of the photoresist layer15to form exposed regions50and unexposed regions52is performed using extreme ultraviolet lithography. In an extreme ultraviolet lithography operation a reflective photomask65is used to form the patterned exposure light in some embodiments, as shown inFIG.3B. The reflective photomask65includes a low thermal expansion glass substrate70, on which a reflective multilayer75of Si and Mo is formed. A capping layer80and absorber layer85are formed on the reflective multilayer75. A rear conductive layer90is formed on the back side of the low thermal expansion substrate70. Extreme ultraviolet radiation95is directed towards the reflective photomask65at an incident angle of about 6°. A portion97of the extreme ultraviolet radiation is reflected by the Si/Mo multilayer75towards the photoresist-coated substrate10, while the portion of the extreme ultraviolet radiation incident upon the absorber layer85is absorbed by the photomask. In some embodiments, additional optics, including mirrors, are located between the reflective photomask65and the photoresist-coated substrate. In some embodiments, the exposure to radiation is carried out by placing the photoresist-coated substrate in a photolithography tool. The photolithography tool includes a photomask30/65, optics, an exposure radiation source to provide the radiation45/97for exposure, and a movable stage for supporting and moving the substrate under the exposure radiation. In some embodiments, optics (not shown) are used in the photolithography tool to expand, reflect, or otherwise control the radiation before or after the radiation45/97is patterned by the photomask30/65. In some embodiments, the optics include one or more lenses, mirrors, filters, and combinations thereof to control the radiation45/97along its path. In some embodiments, the radiation is electromagnetic radiation, such as g-line (wavelength of about 436 nm), i-line (wavelength of about 365 nm), ultraviolet radiation, far ultraviolet radiation, extreme ultraviolet, electron beams, or the like. In some embodiments, the radiation source is one or more of a mercury vapor lamp, xenon lamp, carbon arc lamp, a KrF excimer laser light (wavelength of 248 nm), an ArF excimer laser light (wavelength of 193 nm), an F2excimer laser light (wavelength of 157 nm), or a CO2laser-excited Sn plasma (extreme ultraviolet, wavelength of 13.5 nm). The amount of electromagnetic radiation can be characterized by a fluence or dose, which is obtained by the integrated radiative flux over the exposure time. Suitable radiation fluences range from about 1 mJ/cm2to about 150 mJ/cm2in some embodiments, from about 2 mJ/cm2to about 100 mJ/cm2in other embodiments, and from about 3 mJ/cm2to about 50 mJ/cm2in other embodiments. A person of ordinary skill in the art will recognize that additional ranges of radiation fluences within the explicit ranges above are contemplated and are within the present disclosure. In some embodiments, the selective or patternwise exposure is performed by a scanning electron beam. With electron beam lithography, the electron beam induces secondary electrons, which modify the irradiated material. High resolution is achievable using electron beam lithography and the metal-containing resists disclosed herein. Electron beams can be characterized by the energy of the beam, and suitable energies range from about 5 V to about 200 kV (kilovolt) in some embodiments, and from about 7.5 V to about 100 kV in other embodiments. Proximity-corrected beam doses at 30 kV range from about 0.1 μC/cm2to about 5 μC/cm2in some embodiments, from about 0.5 μC/cm2to about 1 μC/cm2in other embodiments, and in other embodiments from about 1 μC/cm2to about 100 μC/cm2. A person of ordinary skill in the art can compute corresponding doses at other beam energies based on the teachings herein and will recognize that additional ranges of electron beam properties within the explicit ranges above are contemplated and are within the present disclosure. The region of the photo resist layer exposed to radiation50undergoes a chemical or structural reaction, thereby changing its susceptibility to being removed in a subsequent development operation S150. In some embodiments, the portion of the photoresist layer exposed to radiation50undergoes a reaction making the exposed portion more easily removed during the development operation S150. In other embodiments, the portion of the photoresist layer exposed to radiation50undergoes a reaction making the exposed portion resistant to removal during the development operation S150. Next, the photoresist layer undergoes a second heating or a post-exposure bake (PEB) in operation S140in some embodiments. In other embodiments, no PEB is performed. In some embodiments, the photoresist layer15is heated to a temperature of about 50° C. to about 1000° C. for about 20 seconds to about 120 seconds. In some embodiments, the post-exposure baking is performed at a room temperature (25° C.) or a temperature ranging from about 100° C. to about 250° C., and at a temperature ranging from about 150° C. to about 200° C. in other embodiments. The selectively exposed photoresist layer is subsequently developed in operation S150. In some embodiments, the photoresist layer15is developed by applying a solvent-based developer57to the selectively exposed photoresist layer. As shown inFIG.4A, a liquid developer57is supplied from a dispenser62to the photoresist layer15. In some embodiments, the exposed portions50of the photoresist undergo a phase change as a result of the exposure to actinic radiation, and the unexposed portion of the photoresist layer52is removed by the developer57forming a pattern of openings55in the photoresist layer15to expose the substrate20, as shown inFIG.5. In other embodiments, the exposed portions of the photoresist layer52are removed by the developer57. In some embodiments, the photoresist developer composition57includes a first solvent, an acid or a base. In some embodiments, one or more additional solvents are used with the first solvent. In some embodiments, the concentration of the first solvent is from about 60 wt. % to about 99 wt. % based on the total weight of the photoresist developer composition. In some embodiment, the concentration of the additional solvent is from about 1 wt. % to about 40 wt. % based on the total weight of the developer. In some embodiments, the additional solvent is deionized water. In some embodiments, the first solvent has Hansen solubility parameters of 5<δd<35, 5<δp<35, and 5<δh<45. The units of the Hansen solubility parameters are (Joules/cm3)1/2or, equivalently, MPa1/2and are based on the idea that one molecule is defined as being like another if it bonds to itself in a similar way. δdis the energy from dispersion forces between molecules. δpis the energy from dipolar intermolecular force between the molecules. δhis the energy from hydrogen bonds between molecules. The three parameters, δd, δp, and δh, can be considered as coordinates for a point in three dimensions, known as the Hansen space. The nearer two molecules are in Hansen space, the more likely they are to dissolve into each other. First solvents having the desired Hansen solubility parameters include dimethyl sulfoxide, acetone, ethylene glycol, methanol, ethanol, propanol, propanediol, water, 4-methyl-2-pentanone, hydrogen peroxide, isopropyl alcohol and butyldiglycol. In some embodiments, the photoresist developer composition57includes an additive, which is an acid or a base. The acid or base concentration is from about 0.01 wt. % to about 30 wt. % based on the total weight of the photoresist developer composition. In certain embodiments, the acid or base concentration in the developer is from about 0.1 wt. % to about 15 wt. % based on the total weight of the photoresist developer composition. In certain embodiments, the second solvent concentration in the developer is from about 1 wt. % to about 5 wt. % based on the total weight of the photoresist developer composition. At concentrations of the solvent components outside the disclosed ranges, developer composition performance and development efficiency may be reduced, leading to increased photoresist residue and scum in the photoresist pattern, and increased line width roughness and line edge roughness. In some embodiments, the acid has an acid dissociation constant, pKa, of −45<pKa<6.9. In some embodiments, the base has a pKaof 45>pKa>7.1. The acid dissociation constant, pKa, is the logarithmic constant of the acid dissociation constant Ka. Kais a quantitative measure of the strength of an acid in solution. Kais the equilibrium constant for the dissociation of a generic acid according to the equation HA+H2O↔A−+H3O+, where HA dissociates into its conjugate base, A−, and a hydrogen ion which combines with a water molecule to form a hydronium ion. The dissociation constant can be expressed as a ratio of the equilibrium concentrations: Ka=[A-][H3O+][HA][H2O]. In most cases, the amount of water is constant and the equation can be simplified to HA↔A−+H+, and Ka=[A-][H+][HA]. The logarithmic constant, pKais related to Kaby the equation pKa=−log10(Ka). The lower the value of pKathe stronger the acid. Conversely, the higher the value of pKathe stronger the base. In some embodiments, suitable acids for the photoresist developer composition57include an organic or inorganic acid, which is one or more of acetic acid, ethanedioic acid (oxalic acid), methanoic acid, 2-hydroxypropanoic acid, 2-hydroxybutanedioic acid, citric acid, uric acid, trifluoromethanesulfonic acid, benzenesulfonic acid, ethanesulfonic acid, methanesulfonic acid, maleic acid, carbonic acid, oxoethanoic acid, 2-hydroxyethanoic acid, propanedioic acid, butanedioic acid, 3-oxobutanoic acid, hydroxylamine-O-sulfonic acid, formamidinesulfinic acid, methylsulfamic acid, sulfoacetic acid, 1,1,2,2-tetrafluoroethanesulfonic acid, 1,3-propanedisulfonic acid, nonafluorobutane-1-sulfonic acid, benzenesulfonic acid and 5-sulfosalicylic acid, and combinations thereof. In some embodiments, suitable acids for the photoresist developer composition57include an inorganic acid, which is one or more of HNO3, H2SO4, HCl, or H3PO4, or combinations thereof. In some embodiments, suitable bases for the photoresist developer composition57include an organic base, which is one or more of monoethanolamine, monoisopropanolamine, 2-amino-2-methyl-1-propanol, 1H-benzotriazole, 1,2,4-triazole, 1,8-diazabicycloundec-7-ene, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, ammonium hydroxide, ammonium sulfamate, ammonium carbamate, tetraethylammonium hydroxide or tetrapropylammonium hydroxide, or combinations thereof. In some embodiments, the photoresist developer57includes a chelate. In some embodiments, the chelate is one or more of ethylenediaminetetraacetic acid (EDTA), ethylenediamine-N,N′-disuccinic acid (EDDS), diethylenetriaminepentaacetic acid (DTPA), polyaspartic acid, trans-1,2-cyclohexanediamine-N,N,N′,N′-tetraacetic acid monohydrate, ethylenediamine, or combinations thereof, or the like. In some embodiments, the chelate concentration is from about 0.001 wt. % to about 15 wt. % of the total weight of the photoresist developer. In some embodiments, the photoresist developer composition57includes about 0.00 wt. % to about 3 wt. % of an ionic or non-ionic surfactant to increase the solubility and reduce the surface tension on the substrate. In some embodiments, the non-ionic surfactant has an A-X or A-X-A-X structure, wherein A is an unsubstituted or substituted with oxygen or halogen, branched or unbranched, cyclic or non-cyclic, saturated C2-C100 aliphatic or aromatic group, and X includes one or more polar functional groups selected from the group of —OH, ═O, —S—, —P—, —P(O2), —C(═O)SH, —C(═O)OH, —C(═O)OR—, —O—; —N—, —C(═O)NH, —SO2OH, —SO2SH, —SOH, —SO2—, —CO—, —CN—, —SO—, —CON—, —NH—, —SO3NH—, and SO2NH. In some embodiments, the non-ionic surfactant is one or more selected from the group of wherein n is the number of repeat units. In some embodiments, the surfactant includes one or more of a polyethylene oxide or polypropylene oxide, selected from the group consisting of wherein n is the number of repeat units; R, R1, and R2are same or different, and are substituted or unsubstituted aliphatic, alicyclic, or aromatic groups; and EO/PO is ethylene oxide, propylene oxide, or a copolymer of ethylene oxide and propylene oxide. In some embodiments, R, R1, and R2are a substituted or unsubstituted C1-C25 alkyl, C1-C25 aryl, or C1-C25 aralkyl, or the like. The ionic surfactant is one or more selected from the group of wherein R is an substituted or unsubstituted aliphatic, alicyclic, or aromatic group. In some embodiments, R is a substituted or unsubstituted C1-C12 alkyl, C1-C12 aryl, or C1-C12 aralkyl, or the like. In some embodiments, the developer57includes H2O2in an amount of about 0.001 wt. % to about 10 wt. % based on the total weight of the photoresist developer composition to enhance performance. In some embodiments, the developer57is applied to the photoresist layer15using a spin-on process. In the spin-on process, the developer57is applied to the photoresist layer15from above the photoresist layer15while the photoresist coated substrate is rotated, as shown inFIG.4A. In some embodiments, the developer57is supplied at a rate of between about 5 ml/min and about 800 ml/min, while the photoresist coated substrate10is rotated at a speed of between about 100 rpm and about 2000 rpm. In some embodiments, the developer is at a temperature of between about 25° C. and about 75° C. during the development operation. The development operation continues for between about 10 seconds to about 10 minutes in some embodiments. While the spin-on operation is one suitable method for developing the photoresist layer15after exposure, it is intended to be illustrative and is not intended to limit the embodiment. Rather, any suitable development operations, including dip processes, puddle processes, and spray-on methods, may alternatively be used. All such development operations are included within the scope of the embodiments. In some embodiments during the development process, the developer composition57dissolves the photoresist regions50not exposed to radiation (i.e.—not phase changed), exposing the surface of the substrate10, as shown inFIG.5, and leaving behind well-defined exposed photoresist regions52, having improved definition than provided by conventional negative tone photoresist photolithography. In other embodiments, the developer composition57dissolves the photoresist regions50exposed to radiation (a positive tone resist). After the developing operation S150, remaining developer is removed from the patterned photoresist covered substrate. The remaining developer is removed using a spin-dry process in some embodiments, although any suitable removal technique may be used. After the photoresist layer15is developed, and the remaining developer is removed, additional processing is performed while the patterned photoresist layer52is in place. For example, an etching operation, using dry or wet etching, is performed in some embodiments, to transfer the pattern of the photoresist layer52to the underlying substrate10, forming recesses55′ as shown inFIG.6. The substrate10has a different etch resistance than the photoresist layer15. In some embodiments, the etchant is more selective to the substrate10than the photoresist layer15. In some embodiments, the substrate10and the photoresist layer15contain at least one etching resistance molecule. In some embodiments, the etching resistant molecule includes a molecule having a low Onishi number structure, a double bond, a triple bond, silicon, silicon nitride, titanium, titanium nitride, aluminum, aluminum oxide, silicon oxynitride, combinations thereof, or the like. In some embodiments, a dry developer105is applied to the selectively exposed photoresist layer15, as shown inFIG.4B. In some embodiments, the dry developer105is a plasma or chemical vapor, and the dry development operation S150is a plasma etching or chemical etching operation. The dry development uses the differences related to the structures, crystalline phases, to selectively remove the desired portions of the resist. In some embodiments, the dry development processes uses either a gentle plasma (high pressure, low power) or a thermal process in a heated vacuum chamber while flowing a dry development chemistry, at least one selected from the group of Cl2, CHCl3, CH2Cl2, CH4, CF4, N2, BCl3, CCl4, HCl, O2, NF3, NH3, N2H2, HBr and NO2. In some embodiments, the dry developer is BCl3and the BCl3removes the unexposed material, leaving behind a pattern of the exposed film that is transferred into the underlying layers by plasma-based etch processes. In some embodiments, the dry development includes plasma processes, including transformer coupled plasma (TCP), inductively coupled plasma (ICP) or capacitively coupled plasma (CCP). In some embodiments, the plasma process is conducted at a pressure of ranging from about 5 mTorr to a pressure of about 20 mTorr, at a power level from about 250 W to about 1000 W, temperature ranging from about 0° C. to about 300° C., and at flow rate of about 100 to about 1000 sccm, for about 1 to about 3000 seconds. After the development operation, additional processing is performed while the patterned photoresist layer50is in place. For example, an etching operation, using dry or wet etching, is performed in some embodiments, to transfer the pattern of the photoresist layer50to the underlying substrate10, forming recesses55′ as shown inFIG.6. The substrate10has a different etch resistance than the photoresist layer15. In some embodiments, the etchant is more selective to the substrate10than the photoresist layer15. In some embodiments, the exposed photoresist layer15is at least partially removed during the etching operation in some embodiments. In other embodiments, the exposed photoresist layer15is removed after etching the substrate10by selective etching, using a suitable photoresist stripper solvent, or by a photoresist plasma ashing operation. In some embodiments, the substrate10includes a single crystalline semiconductor layer on at least it surface portion. The substrate10may include a single crystalline semiconductor material such as, but not limited to Si, Ge, SiGe, GaAs, InSb, GaP, GaSb, InAlAs, InGaAs, GaSbP, GaAsSb and InP. In some embodiments, the substrate10is a silicon layer of an SOI (silicon-on insulator) substrate. In certain embodiments, the substrate10is made of crystalline Si. The substrate10may include in its surface region, one or more buffer layers (not shown). The buffer layers can serve to gradually change the lattice constant from that of the substrate to that of subsequently formed source/drain regions. The buffer layers may be formed from epitaxially grown single crystalline semiconductor materials such as, but not limited to Si, Ge, GeSn, SiGe, GaAs, InSb, GaP, GaSb, InAlAs, InGaAs, GaSbP, GaAsSb, GaN, GaP, and InP. In an embodiment, the silicon germanium (SiGe) buffer layer is epitaxially grown on the silicon substrate10. The germanium concentration of the SiGe buffer layers may increase from 30 atomic % for the bottom-most buffer layer to 70 atomic % for the top-most buffer layer. In some embodiments, the substrate10includes one or more layers of at least one metal, metal alloy, and metal-nitride/sulfide/oxide/silicide having the formula MXa, where M is a metal and X is N, S, Se, O, Si, and a is from about 0.4 to about 2.5. In some embodiments, the substrate10includes titanium, aluminum, cobalt, ruthenium, titanium nitride, tungsten nitride, tantalum nitride, and combinations thereof. In some embodiments, the substrate10includes a dielectric material having at least a silicon or metal oxide or nitride of the formula MXb, where M is a metal or Si, X is N or O, and b ranges from about 0.4 to about 2.5. In some embodiments, the substrate10includes silicon dioxide, silicon nitride, aluminum oxide, hafnium oxide, lanthanum oxide, and combinations thereof. In some embodiments, a bottom antireflective coating (BARC) layer is formed between the substrate and the metallic photoresist layer15. The photoresist layer15is a photosensitive layer that is patterned by exposure to actinic radiation. Typically, the chemical and/or structural properties of the photoresist regions struck by incident radiation change in a manner that depends on the type of photoresist used. Photoresist layers15are either positive tone resists or negative tone resists. A positive tone resist refers to a photoresist material that when developed, the portions of the photoresist layer exposed to actinic radiation, such as UV light, are removed, while the region of the photoresist that is non-exposed (or exposed less) remains on the substrate after the development operation. A negative tone resist, on the other hand, refers to a photoresist material that when developed, the portions of the photoresist exposed to actinic radiation remain on the substrate after the development operation, while the region of the photoresist that is non-exposed (or exposed less) is removed during the development operation. In some embodiments, the metallic photoresist layer15is a metal alloy layer or two or more layers of metal elements, including at least two metal elements selected from the group of Ag, Cd, In, Sn, Sb, Te, Cs, Au, Hg, Tl, Pb, Bi, Po and At. In some embodiments, the alloy layer is a binary alloy or a ternary alloy. In some embodiments, the metallic photo resist layer15contains no organic material and no organic or inorganic polymer. In some embodiments, when the alloy layer of the metallic photoresist layer15is exposed to an EUV or DUV radiation, the exposed portion of the alloy layer changes its phase, causing different dissolution rates and/or etching rates to a developer between the exposed region and the unexposed region. In some embodiments, the alloy layer changes its phase from an amorphous phase or two separate layers to a crystalline phase or a polycrystalline phase of one layer. In some embodiments, the exposure to the EUV or DUV radiation fully changes the exposed portions of the structure to the crystalline or polycrystalline, and in other embodiments, the exposure only partially changes the exposed portions of the structure to the crystalline or polycrystalline (collectively crystalline), for example, 50% to less than 100%. In some embodiments, the metallic photoresist layer15is an alloy of Sn and Sb. In some embodiments, an impurity level (e.g., additional elements) of the Sn—Sb alloy is less than 0.01 atomic % (including zero). In certain embodiments, the alloy includes about 47-49 atomic % of Sn and about 51-53 atomic % of Sb. When the Sn—Sb alloy layer is exposed to an EUV or DUV radiation, the alloy layer changes its phase from non-β(SnSb) crystalline phase, e.g., an amorphous phase, to the β(SnSb) crystalline phase. In some embodiments, the Sn—Sb alloy is formed or annealed at room temperature (25° C.) or a temperature in a range from about 350° C. to about 450° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Sn and one or more layers of Sb, and by the EUV or DUV radiation, the layers become the crystalline as indicated above. In some embodiments, the alloy includes about 56-58 atomic % of Sn and about 42-44 atomic % of Sb. When the Sn—Sb alloy layer is exposed to an EUV or DUV radiation, the alloy layer changes its phase from non-Sb2Sn3crystalline phase, e.g., an amorphous phase, to the Sb2Sn3crystalline phase. In some embodiments, the Sn—Sb alloy is formed or annealed at room temperature (25° C.) or a temperature in a range from about 325° C. to about 400° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Sn and Sb, and by the EUV or DUV radiation, the layers become the crystalline as indicated above. In some embodiments, the metallic photoresist layer15is an alloy of Sn and Ag. In some embodiments, an impurity level (e.g., additional elements) of the Sn—Ag alloy is less than 0.01 atomic % (including zero). In certain embodiments, the alloy includes about 9-16 atomic % of Sn and about 84-91 atomic % of Ag. When the Sn—Ag alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its phase from non-ζ(Ag4Sn) crystalline phase, e.g., an amorphous phase, to the ζ(Ag4Sn) crystalline phase. In some embodiments, the Sn—Ag alloy is formed or annealed at a room temperature (25° C.) or a temperature in a range from about 600° C. to about 800° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more layers of Sn and one or more layers of Ag, and by the EUV or DUV radiation, the layers become the crystalline as indicated above. In some embodiments, the alloy includes about 24-26 atomic % of Sn and about 74-76 atomic % of Ag. When the Sn—Ag alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its phase from non-Ag3Sn crystalline phase, e.g., an amorphous phase, to the Ag3Sn crystalline phase. In some embodiments, the Sn—Ag alloy is formed or annealed at a room temperature (25° C.) or a temperature in a range from about 480° C. to about 725° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more layers of Sn and one or more layers of Ag, and by the EUV or DUV radiation, the layers become crystalline as indicated above. In some embodiments, the metallic photoresist layer15is an alloy of Sn and In. In some embodiments, an impurity level (e.g., additional elements) of the Sn—In alloy is less than 0.01 atomic % (including zero). In certain embodiments, the alloy includes about 17-28 atomic % of Sn and about 72-83 atomic % of In. When the Sn—In alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its phase from non-β(In4Sn) crystalline phase, e.g., an amorphous phase, to the β(In4Sn) crystalline phase. In some embodiments, the Sn—In alloy is formed or annealed at a room temperature (25° C.) or a temperature in a range from about 120° C. to about 150° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Sn and In, and by the EUV or DUV radiation, the layers become crystalline as indicated above. In some embodiments, the alloy includes about 72-86 atomic % of Sn and about 14-28 atomic % of In. When the Sn—In alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its phase from non-γ(InSn4) crystalline phase, e.g., an amorphous phase, to the γ(InSn4) crystalline phase. In some embodiments, the Sn—Ag alloy is formed at room temperature (25° C.) or a temperature in a range from about 130° C. to about 225° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Sn and In, and by the EUV or DUV radiation, the layers become crystalline as indicated above. In some embodiments, during the EUV or DUV radiation, the photo resist layer is heated at a temperature from the room temperature or about 50° C. to about 130° C. In some embodiments, the metallic photoresist layer15is an alloy of Sn and Te. In some embodiments, an impurity level (e.g., additional elements) of the Sn—Te alloy is less than 0.01 atomic % (including zero). In certain embodiments, the alloy includes about 48-52 atomic % of Sn and about 48-52 atomic % of Te. When the Sn—Te alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its phase from non-SnTe crystalline phase, e.g., an amorphous phase, to the SnTe crystalline phase. In some embodiments, the Sn—In alloy is formed or annealed at room temperature (25° C.) or a temperature in a range from about 500° C. to about 1000° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Sn and Te, and by the EUV or DUV radiation, the layers become crystalline as indicated above. In some embodiments, the metallic photoresist layer15is an alloy of Ag and Sb. In some embodiments, an impurity level (e.g., additional elements) of the Ag—Sb alloy is less than 0.01 atomic % (including zero). In certain embodiments, the alloy includes about 9-16 atomic % of Sb and about 84-91 atomic % of Ag. When the Ag—Sb alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its phase from non-ζ(Ag4Sb) crystalline phase, e.g., an amorphous phase, to the ζ(Ag4Sb) crystalline phase. In some embodiments, the Sn—In alloy is formed or annealed at room temperature (25° C.) or a temperature in a range from about 550° C. to about 700° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Ag and Sb, and by the EUV or DUV radiation, the layers become crystalline as indicated above. In some embodiments, the alloy includes about 22-26 atomic % of Sb and about 74-78 atomic % of Ag. When the Ag—Sb alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its phase from non-ε′(Ag3Sb) crystalline phase, e.g., an amorphous phase, to the ε′(Ag3Sb) crystalline phase. In some embodiments, the Sn—Ag alloy is formed or annealed at a room temperature (25° C.) or a temperature in a range from about 440° C. to about 550° C. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Ag and Sb, and by the EUV or DUV radiation, the layers become crystalline as indicated above. In some embodiments, the metallic photoresist layer15is an alloy of Sn, Ag and Sb. In some embodiments, an impurity level (e.g., additional elements) of the Sn—Ag—Sb alloy is less than 0.01 atomic % (including zero). In certain embodiments, the alloy includes about 0.1-75 atomic % of Ag and the rest is Sb and Sn. When the Sn—Ag—Sb alloy layer is exposed to EUV or DUV radiation, the alloy layer changes its etching resistance, light absorption, dissolution rate and/or phase stability. In some embodiments, the metallic photoresist layer15as deposited includes one or more alternating layers of Ag, Sn, and Sb, and by the EUV or DUV radiation, the layers changes its phase as indicated above. FIGS.7A-7Bshows various deposition method of forming a metallic photoresist layer15over the substrate according to embodiments of the present disclosure. In some embodiments, as shown inFIG.7A, the metallic photoresist layer15is a binary system and the as deposited layer includes a first layer of the first metal (e.g., Sn) and a second layer of the second metal (e.g., Sb or Ag) subsequently formed on the first layer. In some embodiments, the first and second layers are formed by CVD, ALD or PVD. In some embodiments, the precursors for the CVD and ALD are organometallic compounds. In some embodiments, a thickness of the first layer and the second layer is in a range from about 1 nm to about 50 nm, respectively, and in other embodiments, is in a range from about 2 nm to about 20 nm, respectively. The thickness ratio of the first layer (e.g., Sn) and the second layer (e.g., Sb or Ag) is adjusted to obtain the desired elemental ratio as set forth above. For example, to obtain an alloy including about 47-49 atomic % of Sn and about 51-53 atomic % of Sb, the ratio of the thickness of the Sn layer and the thickness of the Sb layer is about 47:53 to about 49:51. The deposition order of the first layer and the second layer can be interchanged. In some embodiments, as shown inFIG.7B, the metallic photoresist layer15is a binary system and the as deposited layer includes two or more first layers of the first metal (e.g., Sn) and two or more second layer of the second metal (e.g., Sb or Ag) alternately formed. In some embodiments, the first and second layers are formed by CVD, ALD or PVD. In some embodiments, the precursors for the CVD and ALD are organometallic compounds. In some embodiments, a thickness of each of the first layer and the second layer is in a range from about 0.5 nm to about 25 nm, respectively, and is in a range from about 1 nm to about 10 nm in other embodiments, respectively. The ratio of the total thickness of the first layers (e.g., Sn) and the total thickness of the second layers (e.g., Sb or Ag) is adjusted to obtain the desired elemental ratio as set forth above. For example, to obtain an alloy including about 47-49 atomic % of Sn and about 51-53 atomic % of Sb, the ratio of the total thickness of the Sn layers and the total thickness of the Sb layers is about 47:53 to about 49:51. The deposition order of the first layer and the second layer can be interchanged. In some embodiments, the thickness of the first layers and/or the second layers vary. The total number of layers is three to ten in some embodiments. In some embodiments, as shown inFIG.7C, the metallic photoresist layer15is a binary system and is formed by a sputtering method using an alloy target of the first metal and the second metal. The alloy has the desired elemental ratio as set forth above. In some embodiments, a thickness of the metallic photoresist layer15is in a range from about 1 nm to about 100 nm, and is in a range from about 2 nm to about 20 nm in other embodiments. In some embodiments, the as-deposited layer15is amorphous. In some embodiments, as shown inFIG.7D, the metallic photoresist layer15is a binary system and is formed by a sputtering method using a first target of the first metal and a second target of the second metal. By adjusting sputtering conditions (sputtering time/power to the respective targets), the alloy layer as formed over the substrate has the desired elemental ratio as set forth above. In some embodiments, a thickness of the metallic photoresist layer15is in a range from about 1 nm to about 100 nm, and is in a range from about 2 nm to about 20 nm in other embodiments. In some embodiments, the as-deposited layer15is amorphous. In some embodiments, the metallic photoresist layer15of the alloy of the first element and the second element is formed by a CVD method using precursors of the first metal and the second metal, respectively. In some embodiments, the precursors are organometallic compounds. When the target metallic photoresist layer15is a ternary system, three layers of respective elements are formed inFIGS.7A and7B, a ternary alloy target is used inFIG.7C, and three different targets or three different precursors are used inFIG.7D. In some embodiments, the operation S110of depositing a metallic photoresist is performed by a vapor phase deposition operation. In some embodiments, the vapor phase deposition operation includes atomic layer deposition (ALD) or chemical vapor deposition (CVD). In some embodiments, the ALD includes plasma-enhanced atomic layer deposition (PE-ALD), and the CVD includes plasma-enhanced chemical vapor deposition (PE-CVD), metal-organic chemical vapor deposition (MO-CVD); atmospheric pressure chemical vapor deposition (AP-CVD), and low pressure chemical vapor deposition (LP-CVD). The depositing a metallic photoresist layer includes combining the first compound or first precursor and the second compound or second precursor (or third precursor or more) in a vapor state to form the metallic photoresist layer. In some embodiments, the first compound or first precursor and the second compound or second precursor of the metallic photoresist layer are introduced into the deposition chamber (CVD chamber) at about the same time. In some embodiments, the first compound or first precursor and second compound or second precursor are introduced into the deposition chamber (ALD chamber) in an alternating manner, i.e.—first one compound or precursor then a second compound or precursor, and then subsequently alternately repeating the introduction of the one compound or precursor followed by the second compound or precursor. In a CVD process according to some embodiments of the disclosure, two or more gas streams, in separate inlet paths, of an organometallic precursor and a second precursor are introduced to the deposition chamber of a CVD apparatus, where they mix and react in the gas phase, to form a reaction product. The streams are introduced using separate injection inlets or a dual-plenum showerhead in some embodiments. The deposition apparatus is configured so that the streams of organometallic precursor and second precursor are mixed in the chamber, allowing the organometallic precursor and second precursor to react to form a reaction product. Without limiting the mechanism, function, or utility of the disclosure, it is believed that the product from the vapor-phase reaction becomes heavier in molecular weight, and is then condensed or otherwise deposited onto the substrate. In some embodiments, an ALD process is used to deposit the photoresist layer. During ALD, a layer is grown on a substrate by exposing the surface of the substrate to alternate gaseous compounds (or precursors). In ALD, the precursors are introduced as a series of sequential, non-overlapping pulses. In each of these pulses, the precursor molecules react with the surface in a self-limiting way, so that the reaction terminates once all the reactive sites on the surface are consumed. Consequently, the maximum amount of material deposited on the surface after a single exposure to all of the precursors (a so-called ALD cycle) is determined by the nature of the precursor-surface interaction. In an embodiment of an ALD process, an organometallic precursor is pulsed to deliver the metal-containing precursor to the substrate surface in a first half reaction. In some embodiments, the organometallic precursor reacts with a suitable underlying species to form a new self-saturating surface. Excess unused reactants and the reaction by-products are removed, by an evacuation-pump down and/or by a flowing an inert purge gas in some embodiments. Then, a second precursor is pulsed to the deposition chamber in some embodiments. The second precursor reacts with the organometallic precursor on the substrate to obtain a reaction product photoresist on the substrate surface. The second precursor also forms self saturating bonds with the underlying reactive species to provide another self-limiting and saturating second half reaction. A second purge is performed to remove unused reactants and the reaction by-products in some embodiments. Pulses of the first precursor and second precursor are alternated with intervening purge operations until a desired thickness of the photoresist layer15is achieved. In some embodiments, the vapor phase deposition is physical vapor deposition (PVD) including sputtering. In the sputtering method, one or more metal or alloy targets for the desired metal elements or alloy are placed in a vacuum chamber. The target is sputtered by an electron beam, an ion beam and/or plasma to generate vapor of the target material and the vapor is deposited on the substrate. In some embodiments, the deposition chamber temperature of the CVD, ALD or PVD ranges from about 25° C. to about 1000° C. during the deposition operation, and between about 150° C. to about 750° C. in other embodiments. In some embodiments, the pressure in the deposition chamber ranges from about 5 mTorr to about 100 Torr during the deposition operation, and between about 100 mTorr to about 10 Torr in other embodiments. In some embodiments, the plasma power is less than about 1000 W. In some embodiments, the plasma power ranges from about 100 W to about 900 W. In some embodiments, the flow rate of the first compound or precursor and the second compound or precursor ranges from about 100 sccm to about 1000 sccm. At operating parameters outside the above recited ranges, unsatisfactory photoresist layers result in some embodiments. In some embodiments, the photoresist layer formation occurs in a single chamber (a one-pot layer formation). In some embodiments, after the deposition, the deposited film is optionally subjected to an annealing operation at a temperature in a range from about 40° C. and about 1000° C. for about 10 seconds to about 10 minutes, and in other embodiments, the heating temperature is in a range from about 250° C. to 800° C. in an inert gas (Ar, He and/or N2) ambient. The annealing operation may reduce or remove defects in the deposited film. In some embodiments, pressure in a range from about 1000 Torr to about 10,000 Torr is applied during the annealing operation. FIGS.8A and8Bshow phase change schemes of the metallic photoresist layer15by EUV or DUV exposure according to embodiments of the present disclosure. In some embodiments, as shown inFIG.8A, the bi-layer resist as shown inFIG.7Aor the multi-layer resist as shown inFIG.7Bis formed over the substrate or a target layer to be patterned formed over the substrate. After the exposure by the EUV or DUV radiation, the exposed regions corresponding to a mask pattern change into the crystalline phase as explained above depending on the ratio (e.g., thickness ratio) of the first metal and the second metal. The crystalline regions have a different etching rate or a dissolution rate to the wet and/or dry developer than the non-exposed regions, and the pattern corresponding to the photo mask is formed over the substrate after the development. In some embodiments, as shown inFIG.8B, the amorphous layer as shown inFIG.7CorFIG.7Dis formed over the substrate or a target layer to be patterned formed over the substrate. After the exposure by the EUV or DUV radiation, the exposed regions corresponding to a mask pattern change into the crystalline phase as explained above depending on the ratio (e.g., thickness ratio) of the first metal and the second metal. The crystalline regions have a different etching rate or a dissolution rate to the wet and/or dry developer than the non-exposed regions, and the patterns corresponding to the photo mask are formed over the substrate after the development. In some embodiments, during the EUV or DEV exposure, the metallic photo resist is optionally subjected to a heating operation at a temperature in a range from about 40° C. and about 1000° C., and in other embodiments, the heating temperature is in a range from about 150° C. to 300° C. In some embodiments, pressure in a range from about 1 Torr to about 100 Torr (He and/or H2) is applied to the metallic photo resist during the exposure operation. FIGS.9A-9Jshows various stages of a sequential manufacturing operation of a semiconductor device according to embodiments of the present disclosure. It is understood that additional operations can be provided before, during, and after the processes shown byFIGS.9A-9J, and some of the operations described below are replaced or eliminated, for additional embodiments of the method. The order of the operations/processes may be interchangeable. Material, configuration, dimensions and/or processes the same as or similar to the foregoing embodiments described withFIGS.1-8Bmay be employed in the following embodiments, and detailed explanation thereof may be omitted. FIGS.9A-9Fshow an operation in a case of a positive tone developer. As show inFIG.9A, a target layer12to be patterned is formed over a substrate10. In some embodiments, the target layer12is a conductive layer, such as a metal or metallic layer (Ti, TiN, Ta, TaN, W, Cu, Al, Co, Ni, Mo, Ru, or alloy thereof, or any suitable conductive material used in a semiconductor fabrication) or a semiconductor layer (amorphous, polycrystalline or crystalline Si, SiGe or Ge, doped or non-doped, or any suitable semiconductor material used in a semiconductor fabrication), or a dielectric layer, such as silicon oxide, silicon nitride, SiON, SiOC, SiOCN, SiCN, hafnium oxide, aluminum oxide or any suitable dielectric material used in a semiconductor fabrication. In some embodiments, a mask layer14is formed over the target layer12. In some embodiments, the mask layer14includes a dielectric material, a semiconductor material or a conductive material sufficiently higher etching resistivity than the target layer12. In some embodiments, the mask layer14is an organic bottom antireflective coating (BARC). Further, a metallic resist layer15is formed over the mask layer14as set forth above. Then, as shown inFIG.9B, an exposure operation is performed on the metallic resist layer15by the EUV or DUV radiation reflected by or a passing through a photo mask having circuit patterns. Then, as shown inFIG.9C, the exposed metallic resist layer15is developed and removed by a wet developer or dry development. Next, as shown inFIG.9D, the mask layer14is patterned by using the patterned metallic layer15as an etching mask. In some embodiments, the metallic resist layer15is then removed by using a suitable wet or dry etchant, as shown inFIG.9E. Then, the target layer12is patterned by using the patterned mask layer14as an etching mask, and the mask layer14is removed, as shown inFIG.9F. In some embodiments, the target layer12is patterned without removing the metallic resist layer15. In some embodiments, the patterned mask layer14is not removed after the patterning of the target layer12. FIGS.9G-9Jshow an operation in a case of a negative tone developer. As shown inFIG.9G, the non-exposed regions of the metallic resist layer15are developed and removed by a wet developer or dry development. The operations ofFIGS.9H,9I and9Jare the same as those ofFIGS.9D,9E and9F. FIGS.10-14shows various stages of a sequential manufacturing operation of a semiconductor device according to an embodiment of the present disclosure. It is understood that additional operations can be provided before, during, and after the processes shown byFIGS.10-14, and some of the operations described below are replaced or eliminated, for additional embodiments of the method. The order of the operations/processes may be interchangeable. Material, configuration, dimensions and/or processes the same as or similar to the foregoing embodiments described withFIGS.1-9Fmay be employed in the following embodiments, and detailed explanation thereof may be omitted. In some embodiments, a layer to be patterned (target layer)60is disposed over the substrate prior to forming the photoresist layer, as shown inFIG.10. In some embodiments, the layer to be patterned60is a metallization layer or a dielectric layer, such as a hard mask layer, an interlayer dielectric layer or a passivation layer, disposed over a metallization layer. In other embodiments, the target layer is a bottom antireflective coating (BARC) layer made of an organic polymer. In embodiments where the layer to be patterned60is a metallization layer, the layer to be patterned60is formed of a conductive material using metallization processes, and metal deposition techniques, including chemical vapor deposition, atomic layer deposition, and physical vapor deposition (sputtering). Likewise, if the layer to be patterned60is a dielectric layer, the layer to be patterned60is formed by dielectric layer formation techniques, including thermal oxidation, chemical vapor deposition, atomic layer deposition, and physical vapor deposition. The photoresist layer15is subsequently selectively exposed to actinic radiation45to form exposed regions50and unexposed regions52in the photoresist layer, as shown inFIGS.11A and11B, and described herein in relation toFIGS.3A and3B. As explained herein the photoresist is a negative-tone photoresist in some embodiments. The unexposed photoresist regions52are developed by dispensing developer57from a dispenser62, as shown inFIG.12A, or by a dry development operation, as shown inFIG.12Bto form a photoresist pattern55, as shown inFIG.13. The development operation is similar to that explained herein with reference toFIGS.4A,4B, and5. Then as shown inFIG.14, the pattern55in the photoresist layer15is transferred to the layer to be patterned60using an etching operation and the photoresist layer is removed, as explained with reference toFIG.6to form pattern55″ in the layer to be patterned60. Other embodiments include other operations before, during, or after the operations described above. In some embodiments, the disclosed methods include forming fin field effect transistor (FinFET) structures. In some embodiments, a plurality of active fins are formed on the semiconductor substrate. Such embodiments, further include etching the substrate through the openings of a patterned hard mask to form trenches in the substrate; filling the trenches with a dielectric material; performing a chemical mechanical polishing (CMP) process to form shallow trench isolation (STI) features; and epitaxy growing or recessing the STI features to form fin-like active regions. In some embodiments, one or more gate electrodes are formed on the substrate. Some embodiments include forming gate spacers, doped source/drain regions, contacts for gate/source/drain features, etc. In other embodiments, a target pattern is formed as metal lines in a multilayer interconnection structure. For example, the metal lines may be formed in an inter-layer dielectric (ILD) layer of the substrate, which has been etched to form a plurality of trenches. The trenches may be filled with a conductive material, such as a metal; and the conductive material may be polished using a process such as chemical mechanical planarization (CMP) to expose the patterned ILD layer, thereby forming the metal lines in the ILD layer. The above are non-limiting examples of devices/structures that can be made and/or improved using the method described herein. In some embodiments, active components such diodes, field-effect transistors (FETs), metal-oxide semiconductor field effect transistors (MOSFET), complementary metal-oxide semiconductor (CMOS) transistors, bipolar transistors, high voltage transistors, high frequency transistors, FinFETs, other three-dimensional (3D) FETs, other memory cells, and combinations thereof are formed, according to embodiments of the disclosure. It will be understood that not all advantages have been necessarily discussed herein, no particular advantage is required for all embodiments or examples, and other embodiments or examples may offer different advantages. The metallic photo resist layer as disclosed herein can be used to form patterns having a dimension of about 5 nm to about 40 nm and has a low line width roughness (LWR) and high etching selectivity, which is improved by about 20% compared with a polymer based photo resist. In accordance with one aspect of the present disclosure, in a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer. In one or more of the foregoing or following embodiments, the alloy layer before the selective exposure is an amorphous, and the selective exposure changes the alloy layer to crystalline or polycrystalline. In one or more of the foregoing or following embodiments, the actinic radiation is extreme ultraviolet radiation. In one or more of the foregoing or following embodiments, the alloy layer includes two or more selected from the group consisting of Ag, Cd, In, Sn, Sb, Te, Cs, Au, Hg, Tl, Pb, Bi, Po and At. In one or more of the foregoing or following embodiments, the alloy layer includes Sn and one or more selected from the group consisting of Sb, In, Te and Ag. In one or more of the foregoing or following embodiments, the metallic photoresist layer is deposited over the target layer by atomic layer deposition (ALD), chemical vapor deposition (CVD) or physical vapor deposition (PVD). In one or more of the foregoing or following embodiments, the metallic photoresist layer is deposited over the target layer by sputtering as PVD using a target comprising an alloy having a same elemental composition as the alloy layer. In one or more of the foregoing or following embodiments, the metallic photoresist layer is deposited over the target layer by sputtering as PVD using two or more targets corresponding the two or more metal elements of the alloy layer. In accordance with another aspect of the present disclosure, in a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer includes two or more layers of a first layer made of a first metal element and a second layer made of a second metal element different from the first metal element, and the selective exposure converts the two or more layers into an alloy layer of the first metal element and the second metal element. In one or more of the foregoing or following embodiments, the alloy layer is crystalline or polycrystalline. In one or more of the foregoing or following embodiments, the first metal element and the second metal element are selected from the group consisting of Ag, Cd, In, Sn, Sb, Te, Cs, Au, Hg, Tl, Pb, Bi, Po and At. In one or more of the foregoing or following embodiments, the first metal element is Sn and the second metal element is one selected from the group consisting of Sb, In, Te and Ag. In one or more of the foregoing or following embodiments, the metallic photoresist layer is deposited over the target layer by atomic layer deposition (ALD), chemical vapor deposition (CVD) or physical vapor deposition (PVD). In one or more of the foregoing or following embodiments, the metallic photoresist layer consists of one layer of the first metal element and one layer of the second metal element. In one or more of the foregoing or following embodiments, the metallic photoresist layer consists of two or more layers of the first metal element and one or more layers of the second metal element. In accordance with another aspect of the present disclosure, in a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer includes one or more metal or metal alloy layers, and the one or more metal or metal alloy layers includes two or more selected from the group consisting of In, Sn, Sb, Te, and Ag. In one or more of the foregoing or following embodiments, the developer is a liquid developer comprising one or more solvents selected from the group consisting of dimethyl sulfoxide, acetone, ethylene glycol, methanol, ethanol, propanol, propanediol, water, 4-methyl-2-pentanone, hydrogen peroxide, isopropyl alcohol and butyldiglycol. In one or more of the foregoing or following embodiments, the liquid developer further comprises one or more acids selected from the group consisting of acetic acid, ethanedioic acid, methanoic acid, 2-hydroxypropanoic acid, 2-hydroxybutanedioic acid, citric acid, uric acid, trifluoromethanesulfonic acid, benzenesulfonic acid, ethanesulfonic acid, methanesulfonic acid, oxalic acid, maleic acid, carbonic acid, oxoethanoic acid, 2-hydroxyethanoic acid, propanedioic acid, butanedioic acid, 3-oxobutanoic acid, hydroxylamine-O-sulfonic acid, formamidinesulfinic acid, methylsulfamic acid, sulfoacetic acid, 1,1,2,2-tetrafluoroethanesulfonic acid, 1,3-propanedisulfonic acid, nonafluorobutane-1-sulfonic acid, benzenesulfonic acid and 5-sulfosalicylic acid, HNO3, H2SO4, HCl, and H3PO4. In one or more of the foregoing or following embodiments, the liquid developer further comprises one or more bases selected from the group consisting of monoethanolamine, monoisopropanolamine, 2-amino-2-methyl-1-propanol, 1H-benzotriazole, 1,2,4-triazole, 1,8-diazabicycloundec-7-ene, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, ammonium hydroxide, ammonium sulfamate, ammonium carbamate, tetraethylammonium hydroxide and tetrapropylammonium hydroxide. In one or more of the foregoing or following embodiments, the developer is a vapor developer comprising at least one selected from the group consisting of Cl2, CHCl3, CH2Cl2, CH4, CF4, N2, BCl3, CCl4, HCl, O2, NF3, NH3, N2H2, HBr and NO2. In accordance with another aspect of the present disclosure, a photoresist developer includes a first solvent having Hansen solubility parameters of 5<δd<35, 5<δp<35, and 5<δh<45, an acid having an acid dissociation constant, pKa, of −45<pKa<6.9, or a base having a pKa of 45>pKa>7.1, and a chelate. In one or more of the foregoing or following embodiments, a concentration of the first solvent is from 70 wt. % to 99 wt. % based on the total weight of the photoresist developer. In one or more of the foregoing or following embodiments, a concentration of the acid or base is from 0.001 wt. % to 30 wt. % based on the total weight of the photoresist developer. In one or more of the foregoing or following embodiments, a concentration of the chelate is 0.00 wt. % to 15 wt. % based on the total weight of the photoresist developer. In one or more of the foregoing or following embodiments, the photoresist developer further includes a surfactant. In one or more of the foregoing or following embodiments, a concentration of the surfactant is from 0.001 wt. % to 3 wt. % based on the total weight of the photoresist developer. In one or more of the foregoing or following embodiments, the photoresist developer further includes a second solvent different from the first solvent. In one or more of the foregoing or following embodiments, the concentration of the second solvent is from 1 wt. % to 40 wt. % based on the total weight of the developer. In one or more of the foregoing or following embodiments, the photoresist developer further includes hydrogen peroxide. In one or more of the foregoing or following embodiments, the first solvent is at least one selected from the group consisting of dimethyl sulfoxide, acetone, ethylene glycol, methanol, ethanol, propanol, propanediol, water, 4-methyl-2-pentanone, hydrogen peroxide, isopropyl alcohol and butyldiglycol. In one or more of the foregoing or following embodiments, the photoresist developer includes the acid, which is at least one selected selected from the group consisting of acetic acid, ethanedioic acid, methanoic acid, 2-hydroxypropanoic acid, 2-hydroxybutanedioic acid, citric acid, uric acid, trifluoromethanesulfonic acid, benzenesulfonic acid, ethanesulfonic acid, methanesulfonic acid, oxalic acid, maleic acid, carbonic acid, oxoethanoic acid, 2-hydroxyethanoic acid, propanedioic acid, butanedioic acid, 3-oxobutanoic acid, hydroxylamine-O-sulfonic acid, formamidinesulfinic acid, methylsulfamic acid, sulfoacetic acid, 1,1,2,2-tetrafluoroethanesulfonic acid, 1,3-propanedisulfonic acid, nonafluorobutane-1-sulfonic acid, benzenesulfonic acid and 5-sulfosalicylic acid, HNO3, H2SO4, HCl, and H3PO4. In one or more of the foregoing or following embodiments, the photoresist developer comprises the base, which at least one selected from the group consisting of monoethanolamine, monoisopropanolamine, 2-amino-2-methyl-1-propanol, 1H-benzotriazole, 1,2,4-triazole, 1,8-diazabicycloundec-7-ene, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, ammonium hydroxide, ammonium sulfamate, ammonium carbamate, tetraethylammonium hydroxide and tetrapropylammonium hydroxide. In one or more of the foregoing or following embodiments, the chelate is at least one selected from the group consisting of ethylenediaminetetraacetic acid (EDTA), ethylenediamine-N,N′-disuccinic acid (EDDS), diethylenetriaminepentaacetic acid (DTPA), polyaspartic acid, trans-1,2-cyclohexanediamine-N,N,N′,N′tetraacetic acid monohydrate, and ethylenediamine. The foregoing outlines features of several embodiments or examples so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments or examples introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure. | 68,137 |
11942323 | The drawings are given as examples and are not limiting to the invention. They constitute diagrams of principles intended to facilitate the comprehension of the invention and are not necessarily on the scale of the practical uses. In particular, the relative dimensions of the various layers, portions and elements of the device (for example spacer, active layer, modified and non-modified portions) are not representative of the reality. In the drawings, a single side of the gate and a single spacer are shown. It is understood that the method is applied symmetrically to the second side of the gate and to the second spacer. Thus, the drawings can be extended by symmetry on either side of the z axis. DETAILED DESCRIPTION Before starting a detailed review of embodiments of the invention, optional features that can optionally be used in association or alternatively are stated below: According to one example, the modification of the portion of active layer forming the modified portion is carried out according to the entire thickness of the active layer. According to one example, the selectivity of the etching of the modified semiconductor material with respect to the semiconductor material is greater than or equal to 10:1, and preferably greater than or equal to 20:1. According to one example, the formation of the spacer comprises at least one deposition of a dielectric layer at least on the gate pattern followed by partial etching of said dielectric layer so as to remove said dielectric layer outside of the at least one lateral side, and the removal of the modified portion is carried out by said partial etching. According to one example, the method further comprises, after modification of the portion of the active layer and before formation of the spacer, a formation of a protective layer on an exposed face of the modified portion, said protective layer being removed after formation of the spacer and before removal of the modified portion. According to one example, the modification of the portion of the active layer is carried out so that the modified portion is amorphous, said non-modified portion being crystalline. According to one example, the modification of the portion of the active layer is carried out so that the modified semiconductor material has a chemical composition different from the semiconductor material. According to one example, the modification of the portion of the active layer is carried out by implantation of species in the active layer, for example from a plasma. According to one example, the semiconductor material of the active layer is taken from silicon and silicon-germanium. According to one example, the doped zone contains silicon or silicon-germanium. According to one example, the epitaxy of the doped zone is configured for said doped zone to extend beyond an upper face of the active layer according to a direction substantially perpendicular to said upper face of the active layer. According to one example, the epitaxy of the doped zone is a lateral epitaxy mainly directed according to a direction parallel to the face of the active layer. According to one example, the selective etching is anisotropic and mainly directed according to a direction perpendicular to the face of the active layer. According to one example, the epitaxy of the doped zone is configured so as to form a cavity under the doped zone. It is specified that in the context of the present invention, the terms “on”, “is above”, “covers” or “underlying” or their equivalents do not necessarily mean “in contact with”. Thus for example the deposition of a first layer on a second layer does not necessarily means that the two layers are directly in contact with one another, but this means that the first layer at least partially covers the second layer while being either directly in contact with it or while being separated from it by at least one other layer or at least one other element. Moreover, a layer can be composed of several sublayers of the same material or of different materials. A substrate, a layer, a device, “containing” a material M means a substrate, a layer, a device comprising: only this material M or this material M and optionally other materials, for example alloying elements, impurities or doping elements. Thus, a spacer containing SiN silicon nitride can for example comprise non-stoichiometric silicon nitride (SiN), or stoichiometric silicon nitride (Si3N4), or a silicon oxy-nitride (SiON). In general, but not in a limiting manner, a spacer forms a ring around the gate, with a closed contour; the description of a spacer preferably means this single spacer around the gate; however, the drawings for illustration in a cross-section, generally according to a plane transverse to the longitudinal direction of the gates, show two spacer parts on either side of the sides of the gate. By extension, these two spacer parts are often designated as “the spacers”. The latter terminology can optionally be adopted in this application. Moreover, the invention extends to the embodiments in which at least two discontinuous spacers cover a gate pattern. The present invention allows in particular the manufacturing of at least one transistor or of a plurality of transistors on a substrate. This substrate can be bulk or of the semiconductor on insulator type, for example an SOI silicon on insulator substrate or a GeOI germanium on insulator substrate. The invention can also be implemented more broadly for various microelectronic devices or components. Component, device or element of a microelectronic device means any type of element made with the means of microelectronics. These devices encompass in particular in addition to the devices with a purely electronic purpose micromechanical or electromechanical devices (MEMS, NEMS . . . ) as well as optical or optoelectronic devices (MOEMS . . . ). Several embodiments of the invention implementing successive steps of the manufacturing method are described below. Unless expressly mentioned, the adjective “successive” does not necessarily mean, even if this is generally preferred, that the steps follow each other immediately, and intermediate steps can separate them. Moreover, the term “step” means the carrying out of a part of the method, and can designate a set of substeps. The word “dielectric” qualifies a material, the electric conductivity of which is sufficiently low in the given use to be used as an insulator. In the present invention, a dielectric material preferably has a dielectric constant lower than 7. The spacers are typically formed from a dielectric material. The modified semiconductor material is considered to be different from the semiconductor material. The terms “gate pattern”, “gate stack”, “gate” are used as synonyms. “Etching selective with respect to” or “etching having a selectivity with respect to” means etching configured to remove a material A or a layer A with respect to a material B or a layer B, and having a speed of etching of the material A greater than the speed of etching of the material B. The selectivity is the ratio of the speed of etching of the material A to the speed of etching of the material B. In the present patent application, preferably thickness will be mentioned for a layer, height for a device (transistor or gate for example) and depth for a cavity or etching. The thickness is taken according to a direction normal to the main plane of extension of the layer, the height and the depth are taken according to a direction normal to the base plane of the substrate. The plane of main extension of the layer, and respectively the base plane of the substrate, is generally parallel to a lower face or an upper face of this layer, and respectively of this substrate. In the present patent application, a preferably orthonormal reference frame formed by the axes x, y, z is shown in the accompanying drawings. The substrate, more precisely its lower face and/or its upper face, extend in the basal plane xy. Hereinafter, the length is taken according to the direction carried by the axis x and the width is taken according to the direction carried by the axis y. An element located “vertically in line with” another element means that these two elements are both located on the same line perpendicular to the basal plane, or on the same line oriented according to the z axis in the drawings. An element located “in an extension” of another element means that these two elements are both oriented according to the same direction or the same plane, and preferably one in a continuation of the other. “Horizontal” means an orientation parallel to a plane xy. “Vertical” means an orientation parallel to the axis z. The terms “substantially”, “approximately” mean “plus or minus 10%” or, when this is an angular orientation, “plus or minus 10”. Thus, a direction substantially normal to a plane means a direction having an angle of 90*10° with respect to the plane. The invention will now be described in detail through several non-limiting embodiments. A first embodiment of the method is illustrated inFIGS.2A-2G. This method is preferably implemented on an initial structure comprising a gate pattern10and a substrate20, as illustrated inFIG.2Afor example. The substrate20can typically be a substrate of the semiconductor on insulator type, for example an SOI silicon on insulator substrate or a GeOI germanium on insulator substrate. Such a substrate20of the SOI type typically comprises:a support made of bulk silicon typically having a thickness of several hundred μm (not illustrated) called bulk Si,a buried layer21made of silicon dioxide, called BOX (acronym for “Buried Oxide”). This layer21typically has a thickness between 30 nm and 200 nm, for example approximately 40 nm.an active layer12made of silicon, called top Si. This active layer12preferably has a thickness between 5 nm and 50 nm, for example approximately 10 nm. Above the upper face121of the active layer12there is a gate stack or gate pattern10. Conventionally, the gate pattern10can successively have the following layers disposed starting from the active layer12: an interface oxide layer (often called gate oxide), a gate made of polycrystalline silicon called polySi and a hard mask. Alternatively, this gate pattern can comprise a layer with a high dielectric constant, called “high k” layer, above which there is a metal gate. The gate pattern10typically has a height, according to z, of several tens of nanometres to several hundred nanometres. In the rest of the description, and for reasons of conciseness, the gate pattern will be simply designated as gate10. The invention also covers an alternative embodiment for which the gate pattern10is a sacrificial pattern intended to be removed after creation of the spacers, then to be replaced by another gate stack forming a gate10. Such a method is routinely qualified as “gate last”. Hereinafter, the gate10thus indifferently designates a gate stack of the “gate first” type (the gate is preserved after the creation of the spacers) or of the “gate last” type (the gate is replaced after the creation of the spacers). The active layer is designated as topSi12. The doped zone intended to form the source or the drain of the transistor is designated as S/D zone13. After structuring or providing of the gate10and before formation of the spacers11on the sides100of the gate10, a portion12mof the topSi12, which is not masked, nor covered by the gate10, nor by spacers, is modified (FIG.2B). This modified portion12mthus has an interface125with the non-modified portion12eof topSi, which is covered by the gate10. It is in the non-modified portion12ethat the channel15of the transistor will later be formed. The interface125between the modified portion12mand the non-modified portion12eis substantially parallel to z, in an extension of the side100of the gate10. This allows to later align the junction between the channel and the S/D zone of the transistor directly at the edge of the gate10. This prevents a non-doped portion from remaining between the channel15and the S/D zone formed later. The resistance of access to the transistor is thus reduced. The modified portion12mpreferably has a thickness equal to the thickness of the active layer12. This prevents a non-doped portion from remaining outside of the channel15, under the S/D zone formed later. The resistance of access to the transistor is thus reduced. Such a modified portion12mthus extends until the interface212with the BOX21. It is therefore not necessary to precisely control the stopping in terms of depth of the modification. The control in terms of depth of the modification of the topSi is thus facilitated. The modification of the topSi12is configured to create a difference between the properties of etching of the modified Si of the portion12mand of the crystalline Si of the channel15. This modification can be carried out by ion implantation or by plasma. The modification is preferably carried out anisotropically, according to a direction mainly directed according to z. This does not therefore modify the portion12emasked by the gate10, according to this direction z. This modification can be structural. It can lead to a change of phase of the crystalline active layer12so as to create an amorphous modified portion12m. This modification does not aim to powder the topSi12. It should be noted that after amorphisation of the topSi layer12and before removal of the modified portion12m, any microelectronic step is preferably carried out at a temperature lower than the recrystallisation temperature of the modified layer12m. For example, the layer deposited/etched after the amorphisation can be deposited/etched at a temperature lower than the recrystallisation temperature of the modified layer12m. When the layer of topSi is made of silicon, the deposition/etching temperature can be less than 700° C., preferably less than 600° C. and ideally less than 500° C. to avoid the recrystallisation of the layer of amorphous silicon12m. When the layer of topSi is made of germanium, the deposition/etching temperature can be less than 600° C., preferably less than 500° C. and ideally less than 400° C. to avoid the recrystallisation of the layer of amorphous germanium12m. Alternatively or in combination, this modification can be chemical. It can comprise an introduction of chemical species aiming to modify the properties of etching and/or the nature of the semiconductor material. According to one possibility, this anisotropic modification is carried out by anisotropic implantation of ions on at least the entire thickness of the topSi12. This anisotropic modification can be carried out in an implanter or from a plasma. According to one possibility, the anisotropic implantation can be carried out in a conventional implanter. The angle of implantation remains constant throughout the implantation. This inclination is parallel to the side100of the gate10. The species implanted can be for example silicon (Si), germanium (Ge), argon (Ar), oxygen (O) or nitrogen (N). The implantation conditions can be determined by simulation using a tool of the SRIM (acronym for “Stopping and Range of Ions in Matter”) or TRIM (acronym for “Transport of Ions in Matter”) type. After modification, the properties of etching of the modified portion12mwith respect to the non-modified portion12eare preferably such that: the modified semiconductor material has a higher etching speed than the non-modified semiconductor material, for a given etching chemistry, and/or the modified semiconductor material has a higher reactivity to one or more chemical reactants than the non-modified semiconductor material. The spacer11is formed after modification of the topSi12and preferably before the removal of the modified portion12m. The spacer11is typically formed by deposition of a layer110made of a dielectric material on the gate10and on the active layer12, preferably conformally (FIG.2C). A step of anisotropic etching according to z then allows to remove horizontal portions of said dielectric layer110at the top of the gate10and on a part of the active layer12, while preserving a vertical portion of dielectric layer on the side100of the gate10. This vertical portion forms the spacer11. The dielectric layer can be made of SiN silicon nitride or made of SiCO (silicon carbon oxygen). According to one embodiment, the anisotropic etching aiming to form the spacer11can be configured to stop at the upper face120of the modified portion12m(FIG.2D). The stopping of the etching on the upper face120of the modified portion12mcan be carried out by controlling the etching time, or by a detection of end of attack in a plasma reactor, or by resorting to an etching solution having sufficient selectivity, for example greater than 10:1, between the dielectric material and the modified semiconductor material of the modified portion12m. According to an alternative embodiment illustrated inFIGS.3B-3E, the anisotropic etching aiming to form the spacer11can be configured to also etch the modified portion12m(FIGS.3B-3C) not masked by the spacer11. According to this alternative embodiment, the etching solution preferably has little or no selectivity between the dielectric material and the modified semiconductor material. This allows to save a method step. In order to continue the etching of the modified portion12munder the spacer11, a step of isotropic and selective etching is preferably carried out. This isotropic and selective etching can have a selectivity greater than 10:1 between the modified semiconductor material and the semiconductor material. This allows to remove the modified portion12munder the spacer11while preserving the non-modified portion12e, as illustrated inFIG.3D. According to another example, the anisotropic etching aiming to form the spacer11is followed by anisotropic etching of the modified semiconductor material, for example the amorphous silicon. The latter etching is not necessarily selective with respect to the non-modified semiconductor material, for example the crystalline silicon. It is thus followed by isotropic and selective etching of the modified semiconductor material with respect to the non-modified semiconductor material, to remove the modified portion12munder the spacer11. According to an alternative embodiment illustrated inFIGS.4B-4F, a protective layer111several nanometres thick, for example between 1 nm and 3 nm, can be deposited before the deposition of the dielectric layer110(FIG.4B). The spacer11′ is therefore formed in two stages. A first anisotropic etching directed according to z allows to remove horizontal portions of dielectric layer110while preserving a vertical portion of dielectric layer110(FIG.4C). A second etching allows to remove horizontal portions of protective layer111while preserving a vertical portion of protective layer111(FIG.4D). The protective layer111is used here to protect the modified portion12mduring the first anisotropic etching of the dielectric layer110. The protective layer110can be made of silicon dioxide. The first etching can be carried out by plasma using fluorocarbon species. The second etching can be a wet etching using diluted HF. Such a second etching has sufficient selectivity with respect to the modified semiconductor material. This second etching can alternatively be carried out by RIE reactive ion etching. In all cases, the modified portion12mis removed selectively to the non-modified portion12e(FIGS.2E,3D,4E). This removal is typically carried out by selective etching of the modified semiconductor material with respect to the non-modified semiconductor material. The etching selectivity can be greater than or equal to 5:1, and preferably greater than or equal to 10:1. Methods for selective etching of amorphous Si and of alloys of Si with respect to crystalline Si, as described in the document “Low temperature catalyst enhanced etch process with high etch rate selectivity for amorphous silicon based alloys over single-crystalline silicon based alloys, M Bauer”, or in the document “SELECTIVE ETCHING OF AMORPHOUS SILICON OVER EPITAXIAL SILICON, U.S. Pat. No. 9,991,129 B1”, can be used to etch the modified portion12mselectively to the non-modified portion12e. This selective etching of amorphous Si can be carried out for example using a gaseous mixture containing atoms of chlorine. According to one example, the gaseous mixture contains hydrochloric acid. According to another example, the gaseous mixture contains hydrochloric acid, germane and optionally dihydrogen. This selective etching allows to expose a side150of the non-modified portion12e. This side150is substantially parallel to z, in an extension of the side100of the gate10. This side150is advantageously used to form by lateral epitaxy, according to a direction substantially normal to the side150, the doped zone13. The side150therefore becomes an interface forming a junction between the channel15and the doped zone13. This junction is advantageously located directly at the edge of the gate10, vertically in line with the side100. The resistance of access to the transistor can thus be reduced. As illustrated inFIGS.2F,2G, the lateral epitaxy is carried out starting from the side150, preferably only starting from the edge150, first and mainly according to the axis y (portion13aof the doped zone13inFIG.2F). This epitaxy of the doped zone13can continue partly according to z (portion13bof the doped zone13inFIGS.2G,3E,4F). Such a configuration of a transistor1comprising raised S/D zones is called RSD, acronym for “Raised Source/Drain”. A method for in situ doped epitaxy is preferably implemented to form the doped zone13. Boron (:B) or phosphorus (:P) doping can thus be obtained. The doped zone13can contain for example SiGe:B, Si:B or Si:P. According to one possibility, a cavity is formed between the BOX21and the doped zone13,13b, during the lateral epitaxy. Such a cavity improves the electric insulation between the doped zone13and the substrate underlying the BOX21. According to one possibility, before the amorphisation of the layer of topSi12, a fine layer of silicon oxide is deposited on the gate pattern10, then etched (for example using HF chemistry) to form a fine layer of silicon oxide only on the sides100of the gate. This layer of silicon oxide has a width less than or equal to 3 nm, preferably less than or equal to 1 nm. Given the small width of this layer, the latter cannot be likened to a spacer which generally has a width of 6 nm to 40 nm, allowing it to insulate the gate. The role of this fine layer of silicon oxide is to avoid a phenomenon of “lateral straggling” during the amorphisation of the layer of topSi12. In the present document, it is understood that the term “lateral side” corresponding to the reference100in the drawings can include this fine layer of silicon oxide. The gate pattern can thus comprise this fine layer of silicon oxide. The invention is not limited to the embodiments described above and extends to all the embodiments that correspond to the spirit thereof. | 23,192 |
11942324 | DETAILED DESCRIPTION The present embodiments will now be described more fully hereinafter with reference to the accompanying drawings, wherein some exemplary embodiments are shown. The subject matter of the present disclosure may be embodied in many different forms and are not to be construed as limited to the embodiments set forth herein. These embodiments are provided so this disclosure will be thorough and complete, and will fully convey the scope of the subject matter to those skilled in the art. In the drawings, like numbers refer to like elements throughout. The present disclosure is directed to a novel technique for forming a contact trench in a dielectric layer of a semiconductor device, and in particular a novel technique for forming such a contact trench in a manner facilitating adhesion between metal (e.g., tungsten) fill deposited within the trench and the material of the surrounding dielectric layer (e.g., SiO2) during a back-end-of-line (BEOL) portion of a semiconductor device fabrication process. The technique of the present disclosure will be described with reference to a series of schematic, cross-sectional views shown inFIGS.1A-1Jillustrating various, exemplary processes performed as part of the disclosed technique. Referring toFIG.1A, a portion of a generic semiconductor device10is illustrated and may include a bottom metal layer12covered by a dielectric layer14. The term “semiconductor device” is used generically herein and may refer to any type of semiconductor device structure having the aforementioned layers and being amenable to partial fabrication using the processes disclosed herein. Exemplary semiconductor devices include, and are not limited to, op-amps, resistors, capacitors, diodes, transistors, etc. Thus, the portion of a generic semiconductor device10is illustrated generically in the figures with various components being omitted. Those of ordinary skill in the art will understand the generic semiconductor device10may include numerous additional elements, layers, and/or structures depending on the particular type of semiconductor device being implemented. Those of ordinary skill in the art will further appreciate the techniques and processes of the present disclosure may also be implemented in the fabrication of various other electronic components requiring the formation of contact trenches wherein adhesion between a metal and a dielectric layer is desirable. In a non-limiting, exemplary embodiment of the present disclosure, the bottom metal layer12may be formed of cobalt. The present disclosure is not limited in this regard, and in various alternative embodiments the bottom metal layer12may be formed of various other electrically conductive materials, including, and not limited to, copper, gold, silver, etc. In a non-limiting, exemplary embodiment of the present disclosure, the dielectric layer14may be formed of SiO2. The present disclosure is not limited in this regard, and in various alternative embodiments the dielectric layer14may be formed of various other dielectric materials, including, and not limited to, carbon doped SiO2(SiOC), SiOF, SiOCH, etc. Referring toFIG.1B, a photoresist layer16may be disposed on top of the dielectric layer14. The photoresist layer16may be formed of any light-sensitive organic material suitable for photolithography processes as will be familiar to those of ordinary skill in the art. Referring toFIG.1C, a conventional photolithography process may be performed, wherein the photoresist layer16may be masked, exposed to a radiation source, and developed to form a slot or aperture18(hereinafter “the aperture18”) in the photoresist layer16. The aperture18may be located directly above the bottom metal layer12. Referring toFIG.1D, the photolithography process may further include an ion etching process (e.g., a reactive-ion etching process), wherein an ion beam20formed of reactive plasma ions may be directed into the aperture18at an angle perpendicular to the top surface of the photoresist layer16. The ion beam20may etch the dielectric layer14, thus forming a trench22extending entirely through the dielectric layer14and exposing a top surface of the underlying bottom metal layer12. The photolithography process may further include removal (e.g., etching or dissolving) of the photoresist layer16to minimize angle requirements during implantation of the sidewall of the trench22as further described below. Referring toFIG.1E, an ion implantation process may be performed, wherein an ion beam24formed of an ionized dopant species may be directed into the trench22at acute angles relative to the top surface of the dielectric layer14, thus forming an implantation layer28in the sidewall. The dopant species transmitted in the ion beam24may be Si, selected to make the sidewall of the trench22receptive to adhesion with a metal fill deposited in the trench22as further described below. Particularly, since certain metals, such as tungsten, adhere well to Si, implanting the sidewall of the trench22with Si may facilitate adhesion between the sidewall and a tungsten fill deposited within the trench22during a BEOL portion of semiconductor device fabrication. In various alternative embodiments, the dopant species may be germanium, carbon, etc. The present disclosure is not limited in this regard. Implanting the sidewall of the trench22with a dose of Si within a particular dosage range at room temperature may facilitate effective adhesion of tungsten to the sidewall, while dosages outside of the range may result in poor adhesion and/or damage to the sidewall. For example, an implant dose at or below 5e16 ions/cm2at room temperature has been shown to result in insufficient Si deposition to provide good tungsten adhesion, while an implant dose at or above 2e17 ions/cm2at room temperature has been shown to result in damage to the sidewall and thus poor tungsten adhesion. An implant dose of 1e17 ions/cm2at room temperature has been shown to result in good Si deposition and to thus facilitate good adhesion of tungsten to the sidewall. Performing implantation at elevated temperatures (so called “hot implant” or “thermion implant”) has been shown to broaden the range of effective implant dosages for facilitating the adhesion of tungsten to the sidewall of the trench22. For example, with reference toFIG.1F, performing implantation at temperatures in a range of 150 degrees Celsius to 500 degrees Celsius with an implant dose of 1e16 ions/cm2has been shown to result in good Si deposition and to thus facilitate good adhesion of tungsten to the sidewall. Performing implantation in a vacuum environment has also been shown to broaden the range of effective implant dosages for facilitating the adhesion of tungsten to the sidewall of the trench22. For example, with reference toFIG.1G, performing implantation at room temperature with an implant dose of 1e16 ions/cm2while maintaining a vacuum (or near vacuum) environment has been shown to result in good Si deposition and to thus facilitate good adhesion of tungsten to the sidewall. As will be recognized by those of ordinary skill in the art, the implantation layer28may have an “implantation profile,” wherein a concentration of implanted Si may vary with the depth of the implantation layer28(as measured from the sidewall). Thus, referring toFIG.1H, an ion etching process (e.g., a reactive ion etching process) may be performed, wherein an ion beam30formed of reactive plasma ions may be directed into the trench22at acute angles relative to the top surface of the dielectric layer14. The ion beam30may etch the implantation layer28back to a depth where the concentration of Si is highest (or relatively higher than in other portions of the implantation layer28). In various embodiments, a “wet etch” process may be employed, wherein etching will automatically stop at an Si rich portion of the implantation layer28. The present disclosure is not limited in this regard. Thus, the exposed surface of the etched sidewall may be rich in Si and thus primed for adhesion with tungsten (or other suitable metal fill). Referring toFIG.1I, a metal fill32formed of tungsten or another suitable metal may be deposited within the trench22atop the bottom metal layer12. Deposition may be achieved by physical vapor deposition, chemical vapor deposition, atomic layer deposition, etc. The present disclosure is not limited in this regard. The trench22may be filled until the metal fill32overflows from the top of the trench22to ensure complete and total filling of the trench22. Since tungsten is able to adhere to the Si-rich sidewall of the trench22, the formation of gaps or cavities at the juncture of the metal fill32and the sidewall may be mitigated or entirely prevented. Referring toFIG.1J, a chemical metal planarization (CMP) process may be performed to remove the excess metal fill32overflowing from the trench22, thus making the top of the trench22coplanar with the adjacent top surface of the dielectric layer14. Since there are no gaps or cavities at the juncture of the metal fill32and the sidewall, the oxidizing chemicals used to perform the CMP process are prevented from seeping into the trench22between the metal fill32and the sidewall. The metal fill32within the trench22and the bottom metal layer12are thus protected from the oxidizing chemicals, and the integrity and electrical conductivity of the metal fill32and the bottom metal layer12are thus preserved. As will be appreciated by those of ordinary skill in the art, the above-described method for forming a contact trench in a dielectric layer of a semiconductor device provides distinct advantages relative to conventional methods for forming contact trenches. For example, the method of the present disclosure facilitates the formation of tungsten-filled contact trenches in a dielectric layer formed of SiO2with strong adhesion between the tungsten and the SiO2, thus preventing or mitigating the formation of gaps and cavities at the interface of the two materials. As a further advantage, the absence of gaps and cavities between the tungsten and the surrounding SiO2prevents oxidizing chemicals from seeping therebetween during CMP processes, thus protecting the tungsten in the trench and an underlying bottom metal layer from being oxidized. The integrity and electrical conductivity of the tungsten fill material and the underlying bottom metal layer are thus preserved. The present disclosure is not to be limited in scope by the specific embodiments described herein. Indeed, other various embodiments of and modifications to the present disclosure, in addition to those described herein, will be apparent to those of ordinary skill in the art from the foregoing description and accompanying drawings. Thus, such other embodiments and modifications are intended to fall within the scope of the present disclosure. Furthermore, while the present disclosure has been described herein in the context of a particular implementation in a particular environment for a particular purpose, those of ordinary skill in the art will recognize its usefulness is not limited thereto. Embodiments of the present disclosure may be beneficially implemented in any number of environments for any number of purposes. Accordingly, the claims set forth below shall be construed in view of the full breadth and spirit of the present disclosure as described herein. | 11,432 |
11942325 | It is noted that the drawings of the disclosure are not necessarily to scale. The drawings are intended to depict only typical aspects of the disclosure, and therefore should not be considered as limiting the scope of the disclosure. In the drawings, like numbering represents like elements between the drawings. DETAILED DESCRIPTION In the following description, reference is made to the accompanying drawings that form a part thereof, and in which is shown by way of illustration specific illustrative embodiments in which the present teachings may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present teachings, and it is to be understood that other embodiments may be used and that changes may be made without departing from the scope of the present teachings. The following description is, therefore, merely illustrative. It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or “over” another element, it may be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or “directly over” another element, there may be no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it may be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Reference in the specification to “one embodiment” or “an embodiment” of the present disclosure, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the phrases “in one embodiment” or “in an embodiment,” as well as any other variations appearing in various places throughout the specification are not necessarily all referring to the same embodiment. It is to be appreciated that the use of any of the following “/,” “and/or,” and “at least one of,” for example, in the cases of “A/B,” “A and/or B” and “at least one of A and B,” is intended to encompass the selection of the first listed option (a) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of “A, B, and/or C” and “at least one of A, B, and C,” such phrasing is intended to encompass the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B), or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended, as readily apparent by one of ordinary skill in the art, for as many items listed. An integrated circuit (IC) structure according to the disclosure may provide, e.g., a transistor structure including a gate structure and a drain extension region extending laterally from under the gate structure to a drain region. The transistor structure includes a dielectric layer with a thicker portion and a thinner portion. A first gate structure is over at least the thinner portion of the dielectric layer, a first doped well, a second doped well, and a boundary. A second gate structure is over the thicker portion of the dielectric layer and the second doped well. The second gate structure may include an insulative material, such as a masking material, on the thicker portion of the dielectric layer. The transistor structure may have a third gate structure over the thicker portion of the dielectric layer and the second doped well. The third gate structure may include a control/switching gate to improve performance of the transistor structure. Referring toFIG.1, a preliminary structure50to form an IC structure according to embodiments of the disclosure is shown. Preliminary structure50may be processed as described herein to yield an IC structure including an extended drain metal oxide semiconductor (EDMOS) transistor structure according to embodiments of the disclosure. However, it is understood that other techniques, ordering of processes, etc., alternatively may be implemented to yield an IC structure according to the disclosure.FIG.1shows a cross-section view of preliminary structure50with a substrate104, e.g., one or more semiconductor materials. Substrate104may include but is not limited to silicon, germanium, silicon germanium, silicon carbide, or any other common IC semiconductor substrates. A portion or entire semiconductor substrate104may be strained. For purposes of reference, three regions106,108,110for different types of transistor structures are illustrated. Each region may be electrically isolated from another by respective trench isolations114(two shown). Each trench isolation114may include a trench etched into substrate104and filled with an insulating material such as oxide, insulative semiconductor, etc., to isolate one region of the substrate from an adjacent region of the substrate. One or more transistor structures of a given polarity may be disposed within each region106,108,110and isolated from others by trench isolations114. Semiconductor substrate104may include a variety of doped wells therein for formation of different polarity transistors. Region106includes, for example, an n-well116in substrate104for providing a p-type low voltage metal oxide semiconductor (LV PMOS) transistor172A (FIGS.12-17). Region108includes, for example, a p-well in substrate104for a n-type low voltage metal oxide semiconductor (LV NMOS) transistors172B (FIGS.12-17). Doped well region110includes, for example, a first doped well120adjacent a second doped well122at a well boundary124in substrate104for transistor structure200(FIGS.12-17). First doped well120includes a first dopant type and second doped well122includes a second dopant type opposite the first dopant type. Each well may be formed using any appropriate n-type or p-type dopant and may be formed using any now known or later developed technique (e.g., in-situ doping or ion implantation). The opposite doping polarities in each well120,122may define a “P-N junction” across well boundary124. The term “P-N” refers to two adjacent materials having different types of conductivity (i.e., P-type and N-type), which may be induced through dopants within the adjacent material(s). Preliminary structure50may include a dielectric layer130over substrate104. Dielectric layer130may be formed, e.g., by depositing any now known or later developed high dielectric constant (high-K) material (K value of at least approximately 3.9) typically used for gate dielectrics such as but not limited to metal oxides such as: tantalum oxide (Ta2O5), barium titanium oxide (BaTiO3), hafnium oxide (HfO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), or metal silicates such as hafnium silicate oxide (HfA1SiA2OA3) or hafnium silicate oxynitride (HfA1SiA2OA3NA4), where A1, A2, A3, and A4 represent relative proportions, each greater than or equal to zero and A1+A2+A3+A4 (1being the total relative mole quantity), or a combination of these materials. Dielectric layer130formation additionally may include depositing a thermal oxide such as not limited to: silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (SiON) or any combination of these materials. As used herein, “depositing” may include any now known or later developed techniques appropriate for the material to be deposited including but are not limited to: chemical vapor deposition (CVD), low-pressure CVD (LPCVD), plasma-enhanced CVD (PECVD), semi-atmosphere CVD (SACVD) and high density plasma CVD (HDPCVD), rapid thermal CVD (RTCVD), ultra-high vacuum CVD (UHVCVD), limited reaction processing CVD (LRPCVD), metalorganic CVD (MOCVD), sputtering deposition, ion beam deposition, electron beam deposition, laser assisted deposition, thermal oxidation, thermal nitridation, spin-on methods, physical vapor deposition (PVD), atomic layer deposition (ALD), chemical oxidation, molecular beam epitaxy (MBE), plating, evaporation. Dielectric layer130may be deposited, for example, using ALD. Referring now toFIG.2, embodiments of the disclosure may include removing portions of dielectric layer130using, e.g., a mask (not shown) with an opening at a targeted position to expose dielectric layer130. This removal process may include, forming a mask patterned to expose selected portion(s) of dielectric layer130. Masks may include any now known or later developed appropriate masking material, e.g., a nitride hard mask. Any appropriate etching process, e.g., a reactive ion etch (RIE), can remove selected portion(s) of dielectric layer130. As shown inFIG.2, continued processing may include removing portions of dielectric material layer130to yield a first portion132of dielectric layer130adjacent to a second portion134of dielectric layer130. First portion132of dielectric layer130is over first doped well120, second doped well122, and well boundary124. First portion132, moreover, has a first height136above doped well region110. Second portion134of dielectric layer130is over second doped well122and has a second height138above doped well region110that is greater than first height136above doped well region110. Forming dielectric layer130may include forming a first mask patterned to recess dielectric layer130to second height138and forming a second mask patterned to expose portions of dielectric layer130to reduce said portions to first height136. Where portions132,134have a substantially uniform composition, they may be distinguished from one another based on their relative heights and horizontal positions. First portion132may not necessarily include the same materials, e.g., first portion132may include a thermal oxide and second portion134may include a high voltage gate oxide (HVGOX). In another example, second portion134may include multiple materials, e.g., it may include an upper portion that includes HVGOX and a lower portion that includes thermal oxide. As discussed herein, dielectric layer130may be formed in part by etching. Etching generally refers to the removal of material from a substrate (or structures formed on the substrate) and is often performed with a mask in place so that material may selectively be removed from certain areas of the substrate, while leaving the material unaffected, in other areas of the substrate. There are generally two categories of etching, (i) wet etch and (ii) dry etch. Wet etch is performed with a solvent (such as an acid) which may be chosen for its ability to selectively dissolve a given material (such as oxide), while leaving another material (such as polysilicon) relatively intact. This ability to selectively etch given materials is fundamental to many semiconductor fabrication processes. A wet etch will generally etch a homogeneous material (e.g., oxide) isotropically, but a wet etch may also etch single-crystal materials (e.g., silicon wafers) anisotropically. Dry etch may be performed using a plasma. Plasma systems can operate in several modes by adjusting the parameters of the plasma. Ordinary plasma etching produces energetic free radicals, neutrally charged, that react at the surface of the wafer. Since neutral particles attack the wafer from all angles, this process is isotropic. Ion milling, or sputter etching, bombards the wafer with energetic ions of noble gases, which approach the wafer approximately from one direction, and therefore this process is highly anisotropic. Reactive ion etching (RIE) operates under conditions intermediate between sputter and plasma etching and may be used to produce deep, narrow features, such as STI trenches. Referring now toFIG.3, embodiments of the disclosure may include depositing an insulative material140over dielectric layer130. Insulative material140may include any now known or later developed appropriate masking material, e.g., a nitride hard mask. Depositing insulative material140may be targeted and removed from certain areas of the substrate, while leaving the material unaffected, in other areas of the substrate. Additional processing may include selectively removing insulative material140from portions of dielectric layer130. For example, as shown inFIG.4, embodiments of the disclosure may include selectively removing portions of insulative material140over regions106,108. Insulative material140may remain on first and second portions132,134of dielectric130over doped well region110to prevent exposure of first and second portions132,134from subsequent processing. Additional processing may include forming a material layer142over region116. Material layer142may include, for example, silicon germanium (SiGe) and be useful to forming LV PMOS transistors172A (FIGS.12-17) after subsequent processing. Referring now toFIG.5, embodiments of the disclosure may include forming a high-K material layer150on any exposed materials to cover dielectric material layer130, insulative material140, and material layer142. High-K material layer150formation may include depositing a conformal layer of a high-K dielectric material typically used for gate dielectric layers. As shown inFIG.6, embodiments of the disclosure may include processing high-K material layer150to yield one or more material layers152,154A,154B. Material layers152,154A, and154B are high-K metal gate (HKMG) layers. Forming HKMG layers may include depositing a first work function metal (WFM) layer over high-K material layer150and using, e.g., a mask to expose a target portion(s) of first WFM layer to selectively remove (e.g., etching) exposed target portion(s) of first WFM layer from high-K material layer150(not shown). The method may further include depositing a second WFM layer over exposed target portion(s) of high-K material layer150. Subsequent processing may include applying a heat treatment (e.g., annealing) to embed the first and second WFM layers within the high-K material layer150. First WFM layer may include one of a p-type or n-type WFM. Second WFM layer may include one of a p-type or n-type WFM different than the type of first WFM layer. The method may further include depositing a metal layer (not shown) such as, e.g., titanium nitride (TiN), over high-K material layer150embedded with first and second WFM layers. As shown inFIG.6, embodiments of the disclosure may include processing high-K material layer150to yield material layers152,154A,154B that each include either a p-type or n-type WFM embedded within a high-K dielectric material. Material layers152,154A,154B may also each include a metal layer such as, e.g., TiN, over the high-K dielectric material embedded with a WFM. In the present embodiment, material layer152is an HKMG layer that includes a n-type WFM embedded within a high-K dielectric material over second portion134of dielectric130in region110and a metal layer of TiN over the high-K dielectric material. Subsequent processing of material layer152may be useful to form, for example, an n-type or p-type EDMOS transistor (FIGS.12and14). Material layer152may include either a n-type or p-type WFM embedded within the high-K dielectric material irrespective of whether subsequent processing yields an n-type or p-type EDMOS transistor (FIGS.12and14). Material layer154A includes a p-type WFM embedded within a high-K dielectric material over material layer142in region106. Material layer154B includes a n-type WFM embedded within a high-K dielectric material over dielectric layer130in region108. Material layers154A and154B may include a metal layer of TiN over the high-K dielectric material. Subsequent processing of material layers154A,154B may be useful, for example, to form LV PMOS and LV NMOS devices (FIGS.11-17) in regions106,108, respectively. As further shown inFIG.6, embodiments of the disclosure may include selectively removing portions of insulative material140over dielectric layer130. Insulative material140may have a high selectivity of etching relative to dielectric layer130. Selectively removing portions of insulative material140(FIGS.4,5) yields a material layer144on second portion134of dielectric layer130. Material layer144may be a remaining portion of insulative material140under material layer152. For example, material layer144may be a masking material such as, e.g., a nitride hard mask. Subsequent processing of material layer144and material layer152may yield a gate structure (FIGS.10-12,14). Referring now toFIG.7, embodiments of the disclosure may include depositing a semiconductor material160on any exposed materials to cover dielectric layer130and material layers152,154A,154B. Semiconductor material160may include any semiconductor material such as, but not limited to, one or more of the following: polycrystalline silicon (poly-Si), amorphous silicon, polycrystalline silicon germanium (poly-SiGe), etc. Additional processing, e.g., etching, of semiconductor material160may yield one or more semiconductor material layers useful to form one or more gate structures over substrate104. For example, as shown inFIG.8, embodiments of the disclosure may include selectively removing portions of semiconductor material160to form a plurality of material layers162,164,166A, and166B. Each of the material layers162,164,166A, and166B may include a doped semiconductor material formed using any appropriate n-type or p-type dopant and may be formed using any now known or later developed technique (e.g., in-situ doping or ion implantation). Turning toFIG.8, embodiments of the disclosure may include selectively removing portions of semiconductor material160using, e.g., a mask (not shown) to yield material layer162on first portion132and second portion134of dielectric layer130over first doped well120, second doped well122, and well boundary124. In other embodiments, material layer162is only on first portion132over first doped well120, second doped well122, and well boundary124. Material layer162forms a first gate structure170of a transistor structure200in region110. The method may also include selectively removing portions of semiconductor material160to yield material layer164over second portion134of dielectric layer130and second doped well122. Material layer164may be on material layer152. Material layers144,152, and164may form a second gate structure174of transistor structure200in region110. Second gate structure174may be, for example, a field plate gate. A “field plate gate,” as used herein, refers to a structure for reducing peak electric field and enhance breakdown voltage during operation of transistors. Field plate gates spread out an electric field and mitigate peaking of the electric field to achieve a desirable electrical field profile and increase breakdown voltage of a transistor. As shown inFIG.8, embodiments of the disclosure may include selectively removing portions of semiconductor material160using, e.g., a mask to yield material layers166A and166B over regions106and108, respectively. Each material layer166A,166B may be formed using any appropriate n-type or p-type dopant and may be formed using any now known or later developed technique (e.g., in-situ doping or ion implantation). Material layer166A may include a first dopant and material layer166B may include a second dopant opposite the first dopant. Additional processing may include removing (e.g., via etch) portions of one or more material layers to yield one or more gate structures, for example, to form LV MOS transistors. As shown inFIG.8, embodiments of the disclosure may include selectively removing portions of dielectric layer130, material layer142, and material layer154A/B to yield material layer130B,142A, and156A/B, respectively. In some embodiments, material layers142A,156A,166A form LV PMOS transistor172A in region106, and material layers130B,156B,166B form LV NMOS transistor172B in region108. Turning now toFIG.9, embodiments of the disclosure may include forming a sidewall spacer180on first gate structure170, second gate structure174, and LV MOS transistors172A/B. Forming sidewall spacer180may include depositing a layer of spacer material (not shown) over exposed surfaces and selectively removing portions of deposited spacer material to form sidewall spacer180. Sidewall spacer180may structurally and electrically isolate adjacent components from each other. For example, spacer180may electrically isolate first gate structure170from horizontally adjacent second gate structure174. Referring now toFIG.10, embodiments of the disclosure include forming electrically active source/drain (“S/D”) regions. S/D regions are electrically active regions in a semiconductor substrate that define opposite terminals for current flow through the transistor. When a voltage is applied to the gate of the transistor, a conductive channel enables current flow between source and drain. For example,FIG.10shows forming a source region184and a drain region186in region110of substrate104. As will be recognized, source/drain regions are doped with a dopant having a selected polarity for a respective transistor. An n-type transistor may include n-type dopants such as but not limited to: phosphorous (P), arsenic (As), antimony (Sb), and a p-type transistor may include p-type dopants such as but not limited to: boron (B), indium (In) and gallium (Ga). Similar dopants, typically with different concentrations, may be used for doped wells116,118,120,122. Any necessary thermal process may be carried out to drive in the dopants. S/D regions182A/B for LV MOS transistors172A/B may also be formed at this time. It is understood that processing for S/D regions may be carried out before spacer formation. S/D regions182A/B,184,186may be formed using any now known or later developed technique, e.g., in-situ doping, ion implantation, etc. S/D regions182A/B,184,186formation may include forming raised source/drain regions, e.g., by recessing substrate104and epitaxially growing raised regions, perhaps with in-situ doping. Dopants used may be any dopant appropriate for the transistor to be formed. Any necessary anneal to drive in dopants may be performed. Turning now toFIG.11, embodiments of the disclosure may include forming a silicide layer190on an upper surface of first gate structure170, second gate structure174, LV MOS transistors172A/B, and S/D regions182A/B,184,186. Silicide layer190may include, for example, forming a silicide layer over a material layer to enable a respective structure to electrically couple to other electrical components (not shown). Silicide layer190formation may include forming a silicide block mask193to expose select portion(s) of preliminary structure50and depositing a layer of conductive metal(s) (not shown) over exposed portions of preliminary structure50. Silicide layer190formation may include depositing a layer of conductive metal(s), applying a heat treatment (e.g., rapid thermal annealing) such that the conductive metal(s) combine with underlying semiconductor material, and removing any excess metal to yield silicide layer190on the upper surface of first gate structure170, second gate structure174, LV MOS transistors172A/B, and S/D regions182A/B,184,186. As shown inFIG.11, embodiments of the disclosure may include forming silicide block mask193over select portions of preliminary structure50to block silicide formation in select portions under silicide block mask193. Silicide block mask193may prevent silicide formation between a drain side edge of second gate structure174and a drain region186. Preventing silicide formation between second gate structure174and drain region186may prevent electrical shorting in transistor structure200. For example, forming second gate structure174may include using silicide block mask193to prevent a portion of an upper surface of material layer164from exposure to conductive metal(s) deposition and subsequent processing yielding silicide layer190. The horizontal span of silicide layer190of second gate structure174therefore may occupy only a portion of the upper surface of second gate structure174and leave a portion of material layer164exposed. As further shown inFIG.11, embodiments of the disclosure may include a separation distance192between first gate structure170and second gate structure174. Separation distance192may have at least a minimum allowable lateral distance between first and second gate structures170,174to prevent electrical shorts and/or other physical interference between structures170,174. In some embodiments, separation distance192is less than approximately 60 nanometers (nm). Referring now toFIG.12, embodiments of the disclosure may include additional processing to form IC structure100. The method may include, for example, depositing a stress liner194over exposed surfaces and forming one or more contacts196. Stress liner194may include one or more stress liners such as, but not limited to, one or more of the following: tensile stress liner for NMOS transistors, compressive stress liner for PMOS transistors, or neutral stress liners. Stress liner194may act as an etch stop layer when forming contacts196. Any appropriate middle-of-line and back-end-of-line processing carried out to form contacts196to gate structures170,172A/B,174and S/D regions182A/B,184,186. As the processes to form stress liners and contacts are well known, no further details will be provided. Any necessary etch stop layers, e.g., single, or dual contact etch stop layers, may be employed, and any silicidation can be carried out as known in the field as part of the processes. FIG.12depicts one embodiment of IC structure100having transistor structure200. In the present embodiment, transistor structure200is a high voltage EDMOS (HV EDMOS) transistor in doped well region110that includes first doped well120adjacent second doped well122at well boundary124in substrate104. First doped well120includes a first dopant type and second doped well122includes a second dopant type opposite the first dopant type. First doped well120includes a p-type dopant and second doped well122includes an n-type dopant to form an n-type HV EDMOS transistor. Alternatively, or additionally in an adjacent transistor (not shown), first doped well120and second doped well122form a p-type HV EDMOS transistor. Transistor structure200includes first gate structure170and second gate structure174over dielectric layer130. First gate structure170is on first and second portions132of dielectric layer130, and over first doped well120, second doped well122, and well boundary124. Second gate structure174is on second portion134and over second doped well122. First and second gate structures170,174each include silicide layer190to electrically couple transistor structure200to other electrical components via contacts196. As further shown inFIG.12, embodiments of the disclosure may include forming one or more transistors configured for different voltage requirements (e.g., logic transistors) adjacent transistor structure200. For example, IC structure200includes a plurality of logic transistors (e.g., LV PMOS transistor172A and LV NMOS transistor172B) in regions106,108horizontally adjacent to region110that includes transistor structure200. FIG.13depicts another embodiment of IC structure100including transistor structure200having second gate structure174that includes material layer164on material layer144. IC structure100is substantially similar to the embodiment described inFIG.12. A possible distinction between the embodiments is that second gate structure174inFIG.13includes material layer164on material layer144and therefore does not include an HKMG layer such as, e.g., material layer152. Referring now toFIG.14, another embodiment of IC structure100including transistor structure200having a third gate structure210is shown. IC structure100is substantially similar to the embodiment described inFIG.12. A distinction between the embodiments is that transistor structure200inFIG.14includes third gate structure210. Third gate structure210includes a material layer212, sidewall spacer180, and silicide layer190over second portion134of dielectric layer130. Forming third gate structure210may include selectively recessing material layer160(FIG.7) to form material layer212on second portion134of dielectric layer130by using a mask to expose a target portion of dielectric layer130. Forming third gate structure210may also include depositing material to form sidewall spacer180(FIG.9) and depositing conductive metal(s) to form silicide layer190(FIG.11) using substantially similar processes as previously described regarding first and second gate structures170,174. Forming third gate structure may include using a silicide blocking mask (not shown) to prevent a portion of the upper surface of material layer212from exposure to conductive metal(s) and subsequent processing yielding silicide layer190. The horizontal span of silicide layer190of third gate structure210therefore may occupy only a portion of the upper surface of third gate structure210and leave a portion of material layer212exposed. Additional processing may include forming contact196to electrically couple third gate structure to other electrical components (not shown). Third gate structure210may be a may be a control/switching gate in transistor structure200. A max operating voltage of third gate structure210may depend on second height138of second portion134of dielectric layer130. First and third gate structures170,210may turn on and off simultaneously during operation. First gate structure170may receive a first operating voltage and third gate structure210may receive a second operating voltage different than the first operating voltage. In alternative embodiments, first and third gate structures170,210receive a same operating voltage. As shown inFIG.14, embodiments of the disclosure may include forming second gate structure174laterally between first gate structure170and third gate structure210. In some embodiments that include third gate structures210, forming silicide layer190may include forming a silicide blocking mask (not shown) to expose material layer164of second gate structure174and a portion of material layer212of third gate structure210. The horizontal span of silicide layer190of second gate structure174therefore includes all, or substantially all, of the upper surface of material layer164. The horizontal span of silicide layer190of third gate structure210therefore may occupy only a portion of the upper surface of third gate structure210and leave a portion of material layer212exposed. The method may include a silicide block mask that prevents silicide formation between a drain side edge of third gate structure210and a drain region186. Referring now toFIG.15, another embodiment of IC structure100including transistor structure200having third gate structure210is shown. IC structure100is substantially similar to the embodiment described inFIG.14. A possible distinction between the embodiments is that second gate structure174inFIG.15includes material layer164on material layer144and does not include an HKMG layer such as, e.g., material layer152. Referring now toFIG.16, another embodiment of IC structure100including transistor structure200formed in a recess220of substrate104is shown. Transistor structure200is formed in a recessed active region of substrate104. Forming transistor structure200may include selectively removing portions of substrate104prior to depositing dielectric layer130(FIG.1) over substrate104to form recess220in region110. Forming recess220may include using, e.g., a mask (not shown) with an opening at a targeted position to expose a region (e.g., region110) of substrate104. Forming transistor structure200in recess220may prevent HKMG formation over transistor structure200using a gate-last process. As shown inFIG.16, embodiments of the disclosure may include forming metal gate structures240A,240B adjacent transistor structure200in regions106,108. Metal gate structures240A,240B may be formed by known replacement metal gate processing techniques. Metal gate structures may include, for example, LV PMOS or LV NMOS transistors. Metal gate structure240A may include a plurality of material layers232,234,236, and metal gate structure240B may also include a plurality of material layers232,238,236. Material layer232may include a high-K dielectric material, and material layer236may include a metal such as, e.g., aluminum. Material layer234may include a first WFM and material layer238may include a second WFM of a different WFM type than material layer234. For example, material layer234may include a p-type WFM and material layer236may include a n-type WFM. Referring now toFIG.17, another embodiment of IC structure100including transistor structure200having third gate structure210formed in recess220is shown. Transistor structure200may include third gate structure210as shown inFIG.15. IC structure100may include one or more transistors adjacent transistor structure200in, for example, regions106,108. Embodiments of the present invention provide technical and commercial advantages, and some examples of such advantages are described herein. Embodiments of the disclosure may improve operational performance for several types of transistors, such as HV EDMOS transistors. The HKMG region in, for example, an HV EDMOS transistor have multiple charge trapping sites that contribute to charge trapping during operation of the HV EDMOS transistor. Embodiments of the disclosure may avoid charge trapping by preventing high-K dielectric layer formation in switching gates such as, e.g., first and third gate structures170,210. Recessing substrate104may prevent HKMG formation in first, second, and/or third gate structures170,174,210in transistor structure200. Second gate structure174may act as a field plate gate for breakdown voltage improvement and peak field reduction at drain-side gate edge. A positive bias to third gate structure210may improve surface electron density in a drift region and, hence, drive current and switching speed. The method as described above is used in the fabrication of integrated circuit chips. The resulting integrated circuit chips can be distributed by the fabricator in raw wafer form (that is, as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case the chip is mounted in a single chip package (such as a plastic carrier, with leads that are affixed to a motherboard or other higher level carrier) or in a multichip package (such as a ceramic carrier that has either or both surface interconnections or buried interconnections). In any case the chip is then integrated with other chips, discrete circuit elements, and/or other signal processing structures as part of either (a) an intermediate product, such as a motherboard, or (b) an end product. The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input structure, and a central processor. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. “Optional” or “optionally” means that the subsequently described event or circumstance may or may not occur, and that the description includes instances where the event occurs and instances where it does not. Approximating language, as used herein throughout the specification and claims, may be applied to modify any quantitative representation that could permissibly vary without resulting in a change in the basic function to which it is related. Accordingly, a value modified by a term or terms, such as “about”, “approximately” and “substantially”, are not to be limited to the precise value specified. In at least some instances, the approximating language may correspond to the precision of an instrument for measuring the value. Here and throughout the specification and claims, range limitations may be combined and/or interchanged, such ranges are identified and include all the sub-ranges contained therein unless context or language indicates otherwise. “Approximately” as applied to a particular value of a range applies to both values, and unless otherwise dependent on the precision of the instrument measuring the value, may indicate +/−10% of the stated value(s). The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present disclosure has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the disclosure in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the disclosure. The embodiment was chosen and described in order to best explain the principles of the disclosure and the practical application, and to enable others of ordinary skill in the art to understand the disclosure for various embodiments with various modifications as are suited to the particular use contemplated. | 38,279 |
11942326 | Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention. DETAILED DESCRIPTION The following description in combination with the figures is provided to assist in understanding the teachings disclosed herein. The following discussion will focus on specific implementations and embodiments of the teachings. This focus is provided to assist in describing the teachings and should not be interpreted as a limitation on the scope or applicability of the teachings. However, other embodiments can be used based on the teachings as disclosed in this application. A III-V material is intended to mean a material that includes at least one Group 13 and at least one Group 15 element. A III-N material is intended to mean a semiconductor material that includes at least one Group 13 element and nitrogen. A boundary between a particular doped region and an adjacent doped region is (1) at a pn junction or (2) when the particular doped region and adjacent doped region have a common dopant, along a line where the dopant concentration for the common dopant is 1.3 times an average dopant concentration for the common dopant within the doped region having the lower average dopant concentration. Using an equation, Cboundary=1.3×Cav, where: Cboundaryis the dopant concentration of the common dopant corresponding to the boundary between the particular doped region and the adjacent doped region, and Cavis the average dopant concentration for the common dopant within the doped region having the lower dopant concentration. The term “semiconductor base material” refers to the principal material within a semiconductor substrate, region, layer, or film, and does not refer to any dopant within the semiconductor substrate, region, layer, or film. A boron-doped Si layer has Si as the semiconductor base material, and a C-doped GaN layer has GaN as the semiconductor base material. The terms “comprises,” “comprising,” “includes,” “including,” “has,” “having” or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a method, article, or apparatus that comprises a list of features is not necessarily limited only to those features but may include other features not expressly listed or inherent to such method, article, or apparatus. Further, unless expressly stated to the contrary, “or” refers to an inclusive-or and not to an exclusive-or. For example, a condition A or B is satisfied by any one of the following: A is true (or present) and B is false (or not present), A is false (or not present) and B is true (or present), and both A and B are true (or present). Also, the use of “a” or “an” is employed to describe elements and components described herein. This is done merely for convenience and to give a general sense of the scope of the invention. This description should be read to include one, at least one, or the singular as also including the plural, or vice versa, unless it is clear that it is meant otherwise. For example, when a single item is described herein, more than one item may be used in place of a single item. Similarly, where more than one item is described herein, a single item may be substituted for that more than one item. The use of the word “about,” “approximately,” or “substantially” is intended to mean that a value of a parameter is close to a stated value or position. However, minor differences may prevent the values or positions from being exactly as stated. Thus, differences of up to ten percent (10%) for the value are reasonable differences from the ideal goal of exactly as described. Group numbers correspond to columns within the Periodic Table of Elements based on the IUPAC Periodic Table of Elements, version dated Nov. 28, 2016. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The materials, methods, and examples are illustrative only and not intended to be limiting. To the extent not described herein, many details regarding specific materials and processing acts are conventional and may be found in textbooks and other sources within the semiconductor and electronic arts. A process to form a high electron mobility transistor (HEMT) can have a gate electrode layer that initially has a plurality of spaced-apart doped regions. In an embodiment, any of the spaced-apart doped regions can be formed by depositing or implanting p-type dopant atoms. After patterning, the gate electrode can include an n-type doped region over the p-type doped region. In the same or another embodiment, a barrier layer can underlie the gate electrode and include a lower film with a higher Al content and thinner than an upper film. A silicon nitride layer can be formed over the gate electrode layer and can help to provide Si atoms for an n-type doped region and increase a Mg:H ratio within the gate electrode. The HEMT can have good turn-on characteristics, low gate leakage when in the on-state, and better time-dependent breakdown as compared to a conventional HEMT. In an aspect, a process of forming an electronic device can include forming a first film of a gate electrode layer, wherein the first film includes a III-V material; forming a first dopant region of the gate electrode layer, wherein the first dopant region has a first conductivity type; forming a second film of the gate electrode layer overlying the first film of the gate electrode layer, wherein the second film includes a III-V material, and forming a second dopant region of the gate electrode layer, wherein the second dopant region overlies the first dopant region and has the first conductivity type. In another aspect, an electronic device can include a channel layer having a major surface; and a gate electrode overlying the channel layer. A first portion of the gate electrode can include a first dopant having a first conductivity type, the first portion of the gate electrode can have a first dopant concentration profile in a direction substantially perpendicular to the major surface, and the first concentration profile can have at least two peak dopant concentrations. In a further aspect, an electronic device can include a channel layer having a major surface; and a gate electrode overlying the channel layer and including a first portion and a second portion. The first portion of the gate electrode can be disposed between the channel layer and the second portion of the gate electrode, the first portion of the gate electrode can be undoped or has an average dopant concentration of at most 5×1016atoms/cm3, and the second portion of the gate electrode can include a first dopant having a first conductivity type. FIG.1includes a cross-sectional view of a portion of a workpiece100that can include a substrate102, a buffer layer104, a channel layer106, and a barrier layer108. The substrate102can include silicon, sapphire (monocrystalline Al2O3), silicon carbide (SiC), aluminum nitride (AlN), gallium oxide (Ga2O3), spinel (MgAl2O4), coefficient of thermal expansion matched laminated material, another suitable substantially monocrystalline material, or the like. The selection of the particular material and crystal orientation along the primary surface can be selected depending upon the composition of the overlying semiconductor layers. The buffer layer104can include a III-N material, and in a particular embodiment, can include AlaGa(1-a)N, where 0≤a≤1. The composition of the buffer layer104may depend on the composition of the semiconductor base material of the channel layer106and the designed operating voltage of the HEMT. The composition of the buffer layer104can be changed as a function of thickness, such that the buffer layer104has a relatively greater aluminum content closer to the substrate102and relatively greater gallium content closer to the channel layer106. In a particular embodiment, the cation (metal atoms) content in the semiconductor base material of the buffer layer104near the substrate102can be 10 atomic % to 100 atomic % Al with the remainder Ga, and the cation content in the semiconductor base material of the buffer layer104near the channel layer106can be 0 atomic % to 50 atomic % Al with the remainder Ga. In another embodiment, the buffer layer104can include a plurality of films. The buffer layer104can have a thickness in a range from approximately 1 micron to 6 microns. The buffer layer104can be doped with a p-type dopant element such as carbon or iron. The channel layer106has a major surface107and can include AlzGa(1-z)N, where 0≤z≤0.1 and have a thickness in a range from approximately 10 nm to 4000 nm. In a particular embodiment, the channel layer106is a GaN layer (z=0). The channel layer106may be undoped or unintentionally doped or doped with an electron donor (n-type) dopant or an electron acceptor (p-type) dopant. A high density two-dimensional electron gas (2DEG) can be formed near portions of the interface of the channel layer106and the barrier layer108and is responsible for high mobility and lower resistivity of the transistor structure when in the on-state. In an enhancement-mode HEMT, a 2DEG may not be present under the gate structure when the HEMT is in an off-state. Any reduction of the 2DEG electrons will increase the on-resistance of the transistor. In an embodiment, the concentration of p-type dopant or n-type dopant may be kept as low as reasonably possible. In a particular embodiment, p-type dopant can include carbon from a source gas (e.g., Ga(CH3)3) when metalorganic chemical vapor deposition (MOCVD) is used to form the channel layer106. In a particular embodiment, the lowest trap concentration is desired but may be limited by growth or deposition conditions and purity of the precursors. Thus, some carbon can become incorporated as the channel layer106is grown, and such carbon can result in unintentional doping. The carbon content may be controlled by controlling the deposition conditions, such as the deposition temperature, pressure, and flow rates. In another embodiment the p-type dopant such as carbon can incorporated from dedicated source gas such as an alkane, for example, CnH2n+2, where n is 1 to 6. In an embodiment, the channel layer106has a carrier impurity concentration that is greater than 0 and at most 5×1016atoms/cm3. In a particular embodiment, the carrier impurity concentration is in a range from 1×1015atoms/cm3to 1×1016atoms/cm3. In an embodiment, the channel layer106has a thickness that is at least 50 nm. When the thickness is less than 50 nm, a 2DEG may be more difficult to generate, maintain, or both. In the same or another embodiment, the channel layer106has a thickness that is at most 5000 nm. In a particular embodiment, the thickness in a range from 50 nm to 300 nm can provide sufficiently thick channel layer106to allow for the proper generation and maintaining of the 2DEG and still obtain a reasonable value for Rdson. Although not illustrated, a spacer layer may be used between the channel and barrier layers106and108if desired. The barrier layer108can include a III-V semiconductor base material, such as a III-N semiconductor base material. In an embodiment, the barrier layer108can have a thickness of at least 8 nm, at least 12 nm, or at least 15 nm, and in the same or another embodiment, the barrier layer108can have a thickness of at most 30 nm, at most 25 nm, or at most 22 nm. In an embodiment, the barrier layer108can be undoped or unintentionally doped. Thus, the barrier layer108may have any of the carrier impurity concentrations as previously described with respect to the channel layer106. The barrier layer108, and any film within the barrier layer108, may have a carrier impurity concentration that is the same or different as compared to the channel layer106. The barrier layer108can include at least one film. For example, the barrier layer108can include a lower film1082and an upper film1084, wherein each of the lower and upper films1082and1084can include AlxInyGa(1-x-y)N, wherein 0<x≤1, 0≤y≤0.5, and (x+y)≤1. In an embodiment, the lower film1082can have a higher Al content and be thinner as compared to the upper film1084. In a particular embodiment, the lower film1082can include AlxGa(1-x)N, wherein 0<x≤0.5, and the upper film1084can include AlxGa(1-x)N, wherein 0<x≤0.3. In a non-limiting embodiment, the lower film1082may have a thickness in a range from 5 nm to 8 nm, and the upper film1084may have a thickness in a range from 5 nm to 15 nm. Other compositions and thicknesses may be used without deviating from the concepts as described herein. In the same or another embodiment (not illustrated), the barrier layer108may include a further film overlying the upper film1084. The further film can include AlxInyGa(1-x-y)N, wherein 0<x≤1, 0≤y≤0.5, and (x+y)≤1. The further film may be an etch-stop film when etching through a portion, and not all, of the thickness of the barrier layer108. Thus, in an embodiment, the further film has a different composition as compared to the upper film1084. The further film can have any of the thicknesses as previously described with respect to the lower film1082. The further film may have the same or different composition and the same or different thickness as compared to the lower film1082. The buffer layer104, the channel layer106, and barrier layer108can be formed using an epitaxial growth technique, and thus, the barrier layer108, the channel layer106, and at least a portion of the buffer layer104can be monocrystalline. In a particular embodiment, metal-containing films can be formed using metalorganic chemical vapor deposition. A gate electrode layer can be formed in stages to obtain a desired initial doping profile. In an embodiment illustrated inFIG.2, a lowest film214is formed over the barrier layer108. The lowest film214can include AlcGa(1-c)N, wherein 0≤c≤1. In an embodiment, the thickness of the lowest film214can be at least 3 nm or at least 5 nm, and in the same or another embodiment, the thickness is at most 25 nm, at most 20 nm, or at most 15 nm. The lowest film214can be undoped or unintentionally doped. The lowest film214can have any of the dopant concentrations as described with respect to the channel layer106. The lowest film214can have the same or different dopant concentration as compared to channel layer106. In a particular embodiment, the dopant within the lowest film as formed is C. A p-type dopant region216is introduced after forming the lowest film214. The p-type dopant can be Mg. In an embodiment, Mg can be formed over the lowest film214. In a particular embodiment, a deposition, such as metalorganic chemical vapor deposition (MOCVD) can be used to form each of the layers. The Mg precursor used in the MOCVD can include Mg, C, and H atoms and may not include a different metal or O atom. In another particular embodiment, bis(cyclopentadienyl)Mg, hereinafter referred to as “MgCp2,” can be used as a Mg source. In another embodiment, a different Mg precursor can be used. In a particular embodiment, H2can be used as a carrier gas to introduce MgCp2into a reaction chamber having the workpiece including the lowest film214. The MgCp2decomposes to form Mg atoms along the exposed surface of the lowest film214. In a non-limiting embodiment, spaced-apart droplets including the Mg atoms can form along the exposed surface of the lowest film214. The process of forming films and dopant regions can be iterated until a desired thickness of the gate electrode layer304is achieved. In the embodiment ofFIG.3, the gate electrode layer304includes additional films324,334, and344, and p-type dopant regions326and336. Each of the films324,334, and344can have any of the compositions and thicknesses as previously described with respect to the lowest film214. In an embodiment, the films214,324,334, and344can have substantially the same composition, and in another embodiment, any one of the films214,324,334, and344can have a different composition as compared to any one or more of the other films. In an embodiment, the films214,324,334, and344can have substantially the same thickness, and in another embodiment, any one of the films214,324,334, and344can have a different thickness as compared to any one or more of the other films. Each of the p-type dopant regions326and336can be doped using any of the doping techniques as previously described with respect to the p-type dopant region216. In an embodiment, the p-type dopant regions216,326, and336can be doped using the same doping technique or different doping techniques. Each of the films214,324,334and344can be formed using any of the techniques as described with respect to the channel layer106. Each of films214,324,334, and344can be formed using the same technique or different techniques as compared to any other film within the gate electrode layer304. A dielectric layer454is formed over the gate electrode layer304, as illustrated inFIG.4. In an embodiment, the dielectric layer454is a silicon nitride layer that can be formed using a silicon-containing gas and a nitrogen-containing source gas. In an embodiment, the silicon-containing gas can include SiH4, SiH3Cl, SiH2Cl2, SiHCl3, or the like, and the nitrogen-containing gas can include NH3, N2, N2O, N2H4, or the like. In a particular embodiment, SiH4and NH3can be used as source gases, and the deposition can be performed at a temperature of at least 750° C. to form Si3N4. Some of the Si during formation of or from the silicon nitride during subsequent thermal processing can enter the uppermost film344(FIG.3) of the gate electrode and make an n-type doped region444(FIG.4) from at least a portion of the uppermost film344. In an embodiment, the n-type doped region444can have a highest dopant concentration of at least 1×1017atoms/cm3, at least 1×1018atoms/cm3, or at least 1×1019atoms/cm3, and in the same or another embodiment, the n-type doped region444can have a highest dopant concentration of at most 1×1020atoms/cm3, at most 5×1019atoms/cm3, or at most 2×1019atoms/cm3. The p-type dopant within the p-type dopant regions216,326, and336within the gate electrode layer304can diffuse so that the spaced-apart p-type dopant regions216,326, and336merge together to form a diffused p-type doped region424. The diffusion may occur during formation of the dielectric layer454or may occur during a separate thermal cycle before or after the dielectric layer454is formed. In a particular embodiment, the diffusion may occur during thermal cycles for the remainder fabrication process without the need to add a separate, dedicated thermal cycle. After reading this specification, skilled artisans will be able to determine an acceptable thermal budget to achieve a desired dopant concentration within the HEMT. In a particular embodiment, when the p-type dopant is Mg, the highest Mg concentration within the diffused p-type doped region424may be at least one or two decades higher than the Mg concentration within the barrier layer108along the interface with the channel layer106. Simulations or empirical data can be generated to determine a thermal budget for a particular application. In an embodiment, the p-type doped region424can have a highest dopant concentration of at least 1×1018atoms/cm3, at least 5×1018atoms/cm3, or at least 1×1019atoms/cm3, and in the same or another embodiment, the p-type doped region424can have a highest dopant concentration of at most 1×1020atoms/cm3, at most 7×1019atoms/cm3, or at most 5×1019atoms/cm3. FIG.5illustrates a portion of the gate electrode layer304and a dopant concentration profile in a direction perpendicular to the major surface107of the channel layer106. In the embodiment as illustrated inFIG.5, the dopant concentration profile has the Mg concentration profile for the p-type doped region424and Si concentration for the n-type doped region444. The concentration profile can have locally higher regions of Mg concentrations corresponding to the originally-formed p-type dopant regions216,326, and336. Although the dopant concentrations at the peaks are substantially the same, they may be different. For example, less p-type dopant may be used for p-type dopant region216or336. Thus, the peak dopant concentration corresponding to the p-type dopant region326may be higher than the peak dopant concentration corresponding to either or both of the p-type dopant regions216and336. The Si concentration can be highest along the upper surface of the gate electrode layer304. In an embodiment, a portion414of the gate electrode layer304can be undoped or unintentionally doped, and such portion414can correspond to part of the lowermost film214where the Mg concentration is insignificant as compared to the p-type doped region424. A different Mg concentration profile for the gate electrode layer304may be achieved and depends on the dopant technique used to introduce Mg into the gate electrode layer304. A mask is formed over the dielectric layer454, and an etch is performed to pattern the dielectric layer454and the gate electrode layer304. The etch stops on or within the barrier layer108. The etch can be performed using endpoint detection, a timed etch, or endpoint detection within a timed overetch. InFIG.6, the gate electrode624corresponds to the patterned gate electrode layer304. FIG.7illustrates the workpiece after forming an interlevel dielectric (ILD) layer700, a drain electrode722within a contact opening712, a gate interconnect724within a contact opening714, and a source electrode726within a contact opening716. The ILD layer700can be formed over the dielectric layer454. The ILD layer700can include a single film or a plurality of films. The single film or each of the films can include an oxide, a nitride, or an oxynitride. The ILD layer700can have a thickness in a range from 20 nm to 2000 nm. As illustrated inFIG.7, the contact openings712and716for the drain and source electrodes722and726extend through the ILD layer700. The contact openings712and716can land on the upper film1084of the barrier layer108(as illustrated inFIG.7), extend partly, but not completely, through the upper film1084, land on the lower film1082of the barrier layer108, extend partly, but not completely, through the lower film1082, land on the channel layer106, or extend partly, but not completely, through the channel layer106. After reading this specification, skilled artisans will be able to determine depths of the contact openings712and716for the drain and source electrodes722and726to achieve a desired combination of sheet resistance under the drain and source electrodes722and726and contact resistance between the drain and source electrodes722and726and the underlying films. The contact opening714for the gate interconnect724extends through the ILD layer700and the dielectric layer454to expose the gate electrode624. The bottom of the contact opening714can contact the n-type doped region444of the gate electrode624. In an embodiment, the contact opening714may be laterally offset from one or both upper corners of the gate electrode624. In another embodiment, the contact opening714may be aligned to one or both of the top corners of the gate electrode624. A conductive layer is formed over the ILD layer700and within the contact openings712,714, and716. The conductive layer can include a single film or a plurality of films. In an embodiment, the conductive layer can include an adhesion film and a barrier film. Such films may include Ta, TaSi, Ti, TiW, TiSi, TiN, or the like. The conductive layer can further include a conductive bulk film. The bulk film can include Al, Cu, or another material that is more conductive than other films within the conductive layer. In an embodiment, the bulk film can include at least 90 wt. % Al or Cu. The bulk film can have a thickness that is at least as thick as the other films within the conductive layer. In an embodiment, the bulk film has a thickness in a range from 50 nm to 4000 nm and, in a more particular embodiment, in a range from 90 nm to 2000 nm. More or fewer films can be used in the conductive layer. The number and composition of the films within the conductive layer can depend on the needs or desires for a particular application. After reading this specification, skilled artisans will be able to determine the composition of the conductive layer that is tailored to their devices. The conductive layer is patterned to form the drain electrode722, the gate interconnect724, and the source electrode726. The gate interconnect724may be formed at the same or a different interconnect level as compared to the drain and source electrodes722and726. Furthermore, the gate interconnect724can have substantially the same or a different composition as compared to drain and source electrodes722and726. The drain and source electrodes722and726can make ohmic contacts to the barrier layer108. In an embodiment, the gate interconnect724can make a Schottky contact to the gate electrode624. The Schottky contact can help to keep gate leakage lower as compared to an ohmic contact between a conventional p-GaN gate electrode and a gate interconnect. In another embodiment, the gate interconnect724can make an ohmic contact to the gate electrode624. The ohmic contact can allow for a relatively steep sub-threshold slope (in a plot of drain current (ID) versus gate voltage (VGS)) and good turn-on characteristics as compared to a Schottky contact between a conventional p-GaN gate electrode and a gate interconnect. The junction between the p-type doped region424and n-type doped region444in the gate electrode624helps to keep the gate leakage current relatively low as compared to an ohmic contact between a conventional p-GaN gate electrode and a gate interconnect. One or more additional interconnect levels and a passivation layer may be formed over the workpiece. Each interconnect level can include an ILD layer and interconnects. For example, one or more of the interconnects can include a shield electrode to help control electrical fields within the HEMT. A conductive layer can be used at each interconnect level. The conductive layer may be the same or different from the other conductive layers described earlier in this specification. A substantially completed electronic device has been formed. One or more of the interconnect levels can include shield electrodes if needed or desired. Different embodiments can be used without deviating from the concepts described herein. As previously discussed, the p-type dopant regions216,326, and336can be formed by depositing layers of Mg atoms. In another embodiment, a different number of films, a different number of p-type dopant regions, or both may be used. For example, more films and more p-type dopant regions can be used. For the same thickness for the gate electrode layer304, each of the films may be thinner, and each of the p-type dopant regions may have one or fewer layers of Mg atoms. Simulations or empirical data can be generated to achieve a desired dopant concentration profile for the gate electrode layer304. In another embodiment, the p-type dopant regions within the gate electrode layer can be introduced into the gate electrode layer after forming the full thickness of the gate electrode layer. In a particular embodiment, the gate electrode layer can be formed using a single III-N film having any of the semiconductor base materials previously described for the lowermost film214. In an embodiment, the thickness of the single film can be at least 40 nm, at least 60 nm, or at least 80 nm, and in the same or another embodiment the thickness of the single layer can be at most 500 nm, at most 250 nm, or at most 120 nm. Ions can be implanted at different energies to achieve p-type dopant regions similar to the p-type dopant regions216,326, and336. The dielectric layer454may be present during ion implantation to reduce the likelihood of implant channeling. Similar to a prior embodiment, more or fewer ion implantations at different energies may be performed. Simulations or empirical data can be generated to determine the number of ion implantations and an energy and dose for each ion implantation needed or desired for a particular application. Depositing layers of p-type dopant atoms may be more advantageous as compared to implanting p-type dopant ions. The amount of crystal damage may be less for the deposited layers of p-type dopant atoms as compared to doping using ion implantation because ions may hit some of the atoms within the gate electrode layer and result in broken bonds or vacancies. Further, the gate electrode layer304, including the deposited layers of p-type dopant atoms, can be formed without breaking vacuum, and thus, the interfaces between films214,324,334, and344and their corresponding p-type dopant regions216,326, and336are less likely to have contaminants introduced when forming the gate electrode layer304. For ion implantation performed after forming different films of the gate electrode layer, the workpieces need to be moved from a deposition tool to an ion implanting tool. Typically, the workpieces will need to be taken close to atmospheric pressure (approximately 100 kPa absolute pressure) when the workpieces are moved between tools. As the number of evacuation and backfill cycles increase, the likelihood of a particle or other contaminant being introduced increases. Unlike depositing layers of p-type dopant atoms, ion implantation has a corresponding straggle (ΔRp) for each energy. Thus, for ion implantation, there is a greater likelihood that Mg atoms (within a tail of a distribution) will be implanted into the barrier layer108or even possibly the channel layer106. Straggle is not an issue for the deposited layers of p-type dopant atoms. Thus, controlling the location and concentration profile for the as-implanted p-type ions within the gate electrode layer304may be more difficult as compared to depositing the layers of the p-type dopant atoms. Even with the possible disadvantages, ion implantation may be used if needed or desired for a particular application. In a further embodiment, a p-type doped region in the gate electrode layer can extend to the barrier layer108.FIG.8includes a gate electrode824where the p-type doped region834extends to the barrier layer108. A HEMT having the gate electrode824will have a higher threshold voltage (Vth) as compared to the gate electrode624. The p-type dopant can be introduced when forming a lowermost film within the gate electrode layer. Alternatively, the lowermost film214as described with respect to the gate electrode layer304may be thinner, so that the deposited layer or layers of p-type dopant atoms, as originally formed, are closer to the barrier layer108. In a particular embodiment, the p-type doped region834may allow the Vthto be higher as compared to a HEMT with the gate electrode624. Thus, skilled artisans will be able to achieve a Vthas needed or desired for a particular application. In another embodiment, the n-type doped region444can be a Group 14 film, where the Group 14 material can be Si, SiC, Ge, or the like. From the perspective of a III-V semiconductor material (e.g., the portion of the gate electrode624below the n-type doped region444), a Group 14 material appears to be an n-type doped semiconductor material whether the Group 14 material is undoped or doped with an n-type dopant using any of the dopant concentrations previously described with respect to the n-type doped region444. An ohmic contact between the gate electrode and the gate interconnect can be formed when the polycrystalline Si film has a dopant concentration of at least 1×1019atoms/cm3. A Schottky contact between the gate electrode and the gate interconnect can be formed when the polycrystalline Si film is undoped or has a dopant concentration less than 1×1019atoms/cm3. EXAMPLES The following examples are provided to demonstrate that a HEMT having a gate electrode in accordance with an embodiment described herein can have superior time-dependent breakdown characteristics as compared to a comparative HEMT. Comparative HEMTs have a single film barrier layer that has a composition of Al0.225Ga0.775N and a thickness of approximately 12.5 nm. The comparative HEMTs also have a p-type GaN gate electrode where the p-type dopant within the gate electrode extends from the single film barrier layer to a gate interconnect and has an average dopant concentration of approximately 3×1019atoms/cm3. The gate electrode for the comparative HEMTs does not include an n-type doped region, such as the n-type doped region444. A Schottky contact is formed between the p-GaN gate electrode and the gate interconnect. The comparative HEMTs have a Vthof approximately 1.4 V. Novel HEMTs have the barrier layer108and the gate electrode624. The barrier layer108includes a lower film and an upper film. The lower film1082includes Al0.25Ga0.75N and a thickness of approximately 5 nm, and the upper film1084includes Al0.18Ga0.82N and a thickness of approximately 10 nm. The gate electrode624was formed in a manner as previously described with respect to the deposition of p-type dopant layers using MgCp2. The novel HEMTs further include the dielectric layer454that is a silicon nitride layer overlying the gate electrode624. The dielectric layer454dopes a portion of the gate electrode624with an n-type dopant. The gate electrode624has an undoped or unintentionally doped region that is contact with the upper film1084of the barrier layer108and includes a portion of the lowermost film214. The gate electrode624also includes the p-type doped region424that has an average dopant concentration of approximately 2×1019atoms/cm3, and the n-type doped region444that has an average dopant concentration of approximately 1×1019atoms/cm3. A Schottky contact is formed between the gate electrode624and the gate interconnect724. The novel HEMTs have a VTHof approximately 0.9 V. The HEMTs were subjected to time-dependent breakdown tests. Time-to-fail data were collected when VDS was approximately 400 V and ambient temperature was approximately 150° C. The comparative HEMTs had VGSof approximately 7.6 V, approximately 7.8 V, approximately 8.0 V, or approximately 8.5 V and were tested until they failed. The novel HEMTs had VGSof approximately 9.5 V, approximately 10.0 V, or approximately 11.0 V and were tested until they failed. Weibull and lognormal plots at 0.01% (100 ppm) failures (100 ppm plots) were generated from the data collected.FIG.9includes the Weibull and lognormal plots for the comparative HEMTs, andFIG.10includes the Weibull and lognormal plots for the novel HEMTs. Many customers of HEMTs expect the HEMTs to last 10 years with no more than 0.01% (100 ppm) failures. Thus, the point where the 100 ppm plots cross the 10-year point corresponds to the maximum allowable VGS(VMAXinFIGS.9and10) when the HEMT is in the on-state. InFIG.9, the Weibull 100 ppm plot indicates that the comparative HEMT is predicted to fail in less than 10 years when VGSis 0 V or higher. The comparative HEMT has a VTHthat is greater than 0 V, thus, the Weibull 100 ppm plot predicts that the comparative HEMT will fail in less than a year. Both the VTHand the operating voltage (Vol)) for the novel HEMT are included inFIG.10. VOPis substantially higher than VTH. Unexpectedly, the Weibull 100 ppm plot predicts the novel HEMT will have a lifetime of over 10 years when VGSis at VOP. Embodiments as described herein allow for HEMTs and processes of forming the same that can have good turn-on characteristics, low gate current when in the on-state, and better time-dependent breakdown characteristics. The good turn-on characteristics may be in the form of a steep sub-threshold slope and can be achieved using an ohmic contact formed between the gate interconnect and the gate electrode624or824. The low gate current may be achieved by the diode formed by the pn junction between the p-type doped region424and the n-type doped region444. The formation of the gate electrode624allows the gate electrode624in the finished device to have fewer crystal defects as compared to a conventionally formed p-GaN gate electrode. When the dielectric layer454includes a silicon nitride, the gate electrode has a higher Mg:H. For example, if the silicon nitride layer is not formed, the Mg:H can be three to four times lower as compared to when the silicon nitride layer is present. Because H can deactivate Mg within a III-V material, the higher Mg:H ratio can help keep the resistivity of the p-type doped region424lower. Many different aspects and embodiments are possible. Some of those aspects and embodiments are described below. After reading this specification, skilled artisans will appreciate that those aspects and embodiments are only illustrative and do not limit the scope of the present invention. Embodiments may be in accordance with any one or more of the items as listed below. Embodiment 1 A process of forming an electronic device can include forming a first film of a gate electrode layer, wherein the first film includes a III-V material; forming a first dopant region of the gate electrode layer, wherein the first dopant region has a first conductivity type; forming a second film of the gate electrode layer overlying the first film of the gate electrode layer, wherein the second film includes a III-V material, and forming a second dopant region of the gate electrode layer, wherein the second dopant region overlies the first dopant region and has the first conductivity type. Embodiment 2 The process of Embodiment 1 can further include annealing the gate electrode layer or a gate electrode formed from the gate electrode layer, so that a dopant from each of the first dopant region and the second dopant region merge together to form a diffused doped region. Embodiment 3 The process of Embodiment 2 can further include forming a channel layer having a major surface before forming the first film of the gate electrode. In a finished device, the diffused doped region can have a dopant concentration profile in a direction substantially perpendicular to the major surface, and the concentration profile has at least two peak dopant concentrations, wherein one of the at least two peak dopant concentrations corresponds to the first dopant region, and another one of the at least two peak dopant concentrations corresponds to the second dopant region. Embodiment 4 The process of Embodiment 1, wherein forming the first dopant region includes forming spaced-apart droplets including atoms of a dopant over the first film before forming the second film. Embodiment 5 The process of Embodiment 1, wherein forming the first dopant region or forming the second dopant region includes using a Mg precursor that includes Mg, C, and H atoms and does not include a different metal or O atom as a dopant source. Embodiment 6 The process of Embodiment 1, wherein forming the first dopant region or forming the second dopant region includes implanting Mg into the first film or the second film of the gate electrode layer. Embodiment 7 The process of Embodiment 1 can further include forming a third film of the gate electrode layer over the second film of the gate electrode layer, wherein in a finished device, the third film includes a dopant having a second conductivity type opposite the first conductivity type. Embodiment 8 The process of Embodiment 1 can further include forming a third film of the gate electrode layer over the second film of the gate electrode layer, wherein the third film of the gate electrode layer is a Group 14 film. Embodiment 9 The process of Embodiment 1 can further include forming a silicon nitride layer over the first film and the second film of the gate electrode layer, wherein some Si during formation of or from the silicon nitride layer migrates into the gate electrode layer to form a Si-doped region within the gate electrode layer. Embodiment 10 The process of Embodiment 1 can further include patterning the gate electrode layer to form a gate electrode; and forming a gate interconnect contacting a surface of the gate electrode layer to form a Schottky contact. Embodiment 11 The process of Embodiment 1 can further include patterning the gate electrode layer to form a gate electrode; and forming a gate interconnect contacting a surface of the gate electrode layer to form an ohmic contact. Embodiment 12 The process of Embodiment 1 can further include forming a first film of a barrier layer; and forming a second film of the barrier layer. Forming the second film of the barrier layer can be performed after forming the first film of the barrier layer and before forming the first film of the gate electrode layer. The first film of the barrier layer can have a higher Al content and be thinner as compared to the second film of the barrier layer. Embodiment 13 An electronic device can include a channel layer having a major surface; and a gate electrode overlying the channel layer. A first portion of the gate electrode can include a first dopant having a first conductivity type, the first portion of the gate electrode can have a first dopant concentration profile in a direction substantially perpendicular to the major surface, and the first concentration profile can have at least two peak dopant concentrations. Embodiment 14 The electronic device of Embodiment 13, wherein the gate electrode can further include a second portion that has a second conductivity type opposite the first conductivity type, and the first portion of the gate electrode can be disposed between the channel layer and the second portion of the gate electrode. Embodiment 15 The electronic device of Embodiment 13, wherein the gate electrode can further include a second portion disposed between the channel layer and the first portion of the gate electrode, and the second portion can be a Group 14 film. Embodiment 16 The electronic device of Embodiment 13, wherein the first portion of the gate electrode can lie along a surface of the gate electrode closest to the channel layer. Embodiment 17 The electronic device of Embodiment 13 can further include a barrier layer disposed between the channel layer and the gate electrode, wherein the barrier layer includes a first film and a second film, wherein the first film is disposed between the channel layer and the second film and has a higher Al content as compared to the second film. The electronic device can further include a source electrode that makes an ohmic contact with the barrier layer; a drain electrode that makes an ohmic contact with the barrier layer; and a gate interconnect that makes a Schottky contact with the gate electrode. The gate electrode can further include a second portion that is undoped or includes a second dopant having a second conductivity type opposite the first conductivity type, and the first portion of the gate electrode can be disposed between the channel layer and the second portion of the gate electrode. Embodiment 18 An electronic device can include a channel layer having a major surface; and a gate electrode overlying the channel layer and including a first portion and a second portion, wherein the first portion of the gate electrode is disposed between the channel layer and the second portion of the gate electrode. The first portion of the gate electrode can be undoped or has an average dopant concentration of at most 5×1016atoms/cm3, and the second portion of the gate electrode can include a first dopant having a first conductivity type. Embodiment 19 The electronic device of Embodiment 18, wherein the gate electrode can further include a third portion that includes a second dopant having a second conductivity type opposite the first conductivity type, and the second portion of the gate electrode can be disposed between the first portion and the third portion of the gate electrode. Embodiment 20 The electronic device of Embodiment 18, wherein the gate electrode can further include a third portion including a Group 14 semiconductor base material, the second portion of the gate electrode can have a different semiconductor base material as compared to the third portion of the gate electrode, and the second portion of the gate electrode can be disposed between the first portion and the third portion of the gate electrode. Note that not all of the activities described above in the general description or the examples are required, that a portion of a specific activity may not be required, and that one or more further activities may be performed in addition to those described. Still further, the order in which activities are listed is not necessarily the order in which they are performed. Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any feature(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential feature of any or all the claims. The specification and illustrations of the embodiments described herein are intended to provide a general understanding of the structure of the various embodiments. The specification and illustrations are not intended to serve as an exhaustive and comprehensive description of all of the elements and features of apparatus and systems that use the structures or methods described herein. Separate embodiments may also be provided in combination in a single embodiment, and conversely, various features that are, for brevity, described in the context of a single embodiment, may also be provided separately or in any subcombination. Further, reference to values stated in ranges includes each and every value within that range. Many other embodiments may be apparent to skilled artisans only after reading this specification. Other embodiments may be used and derived from the disclosure, such that a structural substitution, logical substitution, or another change may be made without departing from the scope of the disclosure. Accordingly, the disclosure is to be regarded as illustrative rather than restrictive. | 46,614 |
11942327 | DETAILED DESCRIPTION The implementations described herein are directed to methods and apparatus for singulation, in a desirable fashion, of semiconductor die from a silicon carbide (SiC) semiconductor wafer. For example, the singulation apparatus and methods described herein can singulate semiconductor die from a SiC semiconductor wafer with vertical sidewall cut profiles through the thickness of the SiC semiconductor wafer. The SiC semiconductor wafer can be referred to as a SiC wafer. The singulation techniques described herein can include defining a cut within the SiC wafer using a cutting apparatus followed by cleaving of the SiC wafer with a cleaving apparatus. The cut can be defined through only a portion of a thickness of the SiC semiconductor wafer (to a specified depth that is less than an entire thickness of the SiC semiconductor wafer), and the cleaving can be performed through a remaining thickness of the SiC semiconductor wafer. SiC devices have some advantages over traditional Si devices. For example, SiC has a bandgap that is about three times the bandgap of Si and can withstand far higher voltages and temperatures than Si-based devices. As another example, SiC-based devices having the same dimensions as a Si-based device can withstand approximately 10 times the electric field strength of a SiC-based device. Despite these advantages, the manufacturing techniques applied to SiC wafers cannot be applied in the same way to SiC wafers because SiC wafers have different properties (e.g., have different crystalline structure, is a harder material) than Si wafers. The improved methods and apparatus described herein are directed to processing of the SiC wafers in view of the unique properties of the SiC wafers. FIG.1Ais a diagram that illustrates an example method of singulating a SiC semiconductor wafer into die.FIGS.1B and1Care diagrams that illustrate a portion of a SiC wafer130that correspond with the method shown inFIG.1A. As shown inFIG.1Aat block110, a cut is defined within a SiC semiconductor wafer through a portion of the SiC semiconductor wafer. For example, as shown inFIG.1B, a SiC semiconductor wafer130has a cut C1defined through a portion of a thickness A1by a cutting apparatus. The depth of the portion of the thickness A1is denoted inFIG.1Bas A2. As shown inFIG.1B, the depth A2is a fraction of the thickness A1. Cutting the SiC wafer through the full thickness A1may cause undesirable wear on a cutting apparatus. As also shown inFIG.1Aat block120, the SiC wafer is cleaved along the cut through a remaining portion of the thickness of the SiC wafer. For example, as shown inFIG.1C, the SiC semiconductor wafer130is cleaved along cleave C2in addition to being cut along cut C1. The cleave C2has been added to the SiC semiconductor wafer130using a cleaving apparatus. The depth of the remaining portion of the thickness A1is denoted inFIG.1Cas depth A3. The singulation of the SiC semiconductor wafer130in this context is then the combination of a cutting operation that produced the cut C1and a cleaving operation that produced the cleave C2. As shown inFIG.1C, the cleave C2is aligned with the cut C1along a vertical axis. Defining the cut C1and the cleave C2so that such alignment is achieved is non-obvious in a SiC semiconductor wafer. Performing a cleaving operation in conjunction with a cutting operation results in a vertical separation that is unexpected within a SiC semiconductor wafer. The methods and apparatus under which such alignment of the cut C1and the cleave C2is achieved in a SiC semiconductor wafer is further shown and described below. Advantageously, the improved techniques (cutting and cleaving) reduce wear and tear on equipment use during the singulation process. Because SiC is a hard material (harder than silicon), a cut through a portion of a thickness rather than the entire thickness of a thinned (e.g., post-grinded) wafer may have an advantage of extending the life of cutting equipment used in the singulation process. Extending the life of the cutting apparatus can lower the overall cost of manufacturing the die from a SiC wafer. FIGS.2A through2Dare diagrams that illustrate a process by which a SiC semiconductor wafer is singulated into semiconductor die.FIGS.2A through2Dillustrate more details related to the method shown and described in connection withFIGS.1A through1C. FIG.2Aillustrates thinning (e.g., grinding) of the SiC semiconductor wafer to a thickness,FIG.2Billustrates backmetal deposition,FIG.2Cillustrates cutting the SiC wafer is cut to a portion of the thickness with a singulation tool, andFIG.2Dillustrates cleaving of the SiC wafer a cleaving tool. The process shown inFIGS.2A-2Dis shown in the order in which they are performed. In some implementations, the process shown inFIGS.2A-2Dis performed in a different order. For example, in some implementations, the backmetal deposition operation shown inFIG.2Bmay be performed after the cutting operation shown inFIG.2Cbut before the cleaving operation shown inFIG.2D. FIG.2Ais a diagram that illustrates an example SiC semiconductor wafer200after the SiC semiconductor wafer200has been ground to a specified thickness.FIG.2Ashows the SiC semiconductor wafer200as positioned in a coordinate system in which x denotes a horizontal direction (i.e., parallel to the surface202of the SiC semiconductor wafer200) and y denotes a vertical direction (i.e., perpendicular to the surface202and in the direction of the thickness A1of the wafer200). In the implementation shown inFIG.2A, the SiC semiconductor wafer200is disposed on a chuck206as the SiC wafer200is being thinned. During the thinning (e.g., grinding) process, at least some portion of the SiC wafer200is removed to reduce the thickness of the SiC wafer200. In some implementations, the thickness A1of the SiC semiconductor wafer200is several hundred microns (m) (e.g., 250 μm, 300 μm, 500 μm). The thinning process illustrated inFIG.2Ais also configured to provide an essentially flat surface202. In some implementations, for example, the flatness of the surface202is within 1 μm and the surface roughness is less than 0.5 nm. Also shown inFIG.2Aare die sections of the SiC semiconductor wafer200, including die sections204(1) and204(2). As shown inFIG.2A, the die sections have boundaries represented by dashed lines. Each die section represents a die after the singulation process has been completed. The boundaries between the die sections have a finite width to take into account the finite widths of the cut C1and the cleave C2used to produce separated dies. Each die section also has a boundary region known as a kerf. In some implementations, the kerf includes, for example, test and/or alignment patterns. In some implementations, each of the die sections is rectangular. In some implementations, each of the die sections has dimensions of about 10 mm×10 mm. In some implementations, each of the die sections has a smaller size (e.g., 5 mm×5 mm) or a larger size (e.g., 26 mm×32 mm). FIG.2Bis a diagram that illustrates an example SiC semiconductor wafer210after a backmetal deposition operation has been performed to produce a backmetal214that is coupled to (e.g., adheres) to the backside of the wafer210. In some implementations, the backmetal214deposited on the backside of the wafer210includes a film stack that includes silver, nickel, and/or tin. In some implementations, the thickness of each layer of the film stack is between 1.5 μm and 2.0 μm. In some implementations, the layers of the stack may include tantalum, copper, and/or aluminum. FIG.2Cis a diagram that illustrates an example SiC semiconductor wafer220after a cutting operation performed by a cutting tool to produce a cut C1in between die sections204(1) and204(2). As shown inFIG.2C, the cut C1is vertical (e.g., substantially vertical, aligned along direction y) and has a depth A2that is a portion of the thickness A1of the SiC semiconductor wafer220. In some implementations, the cut C1has a width that can be determined by a specified width of kerfs of the die section separated by the cut C1. In some implementations, the width of the cut C1can be a few microns (e.g., 2 μm, 5 μm). In some implementations, the width of the cut C1can be more than a few microns (e.g., between 20 μm to 50 μm). Also shown inFIG.2Cis the backmetal214deposited on the backside of the wafer220. In some implementations, the cut C1has a uniform cross-section through the portion A2even though the cut C1is still aligned with the vertical direction. In some implementations, the cut C1has a nonuniform cross-section (e.g., a tapered cross-section, a bulging cross-section, and the like). For example, when a cutting apparatus (see apparatus310inFIG.3A) includes a laser ablation tool, the distribution of laser light irradiance (i.e., energy density) through the portion A2may vary with the vertical direction because the distribution of light for a tightly focused beam varies through the direction of propagation of the light. FIG.2Dis a diagram illustrating an example wafer230after both the cutting operation and cleaving operation have been performed. Shown inFIG.2Dare the cut C1resulting from a cutting operation and a cleave C2resulting from a cleaving operation that are both aligned with respect to the vertical (y) axis. As shown inFIG.2D, the cut C1is aligned with the cleave C2. As shown inFIG.2D, the cleave C2extends from the cut C1. As shown inFIG.2D, the cleave C2has a smaller width than the cut C1. In some implementations, the cut C1can have a width that is more than 5 times a width of the cleave C2. For example, in some implementations, the cut C1can have a width between 20 μm to 50 μm, and the cleave C2has a width of between 3 μm to 5 μm. This difference between the widths of the cut C1and the cleave C2is discussed in further detail with respect to at leastFIG.2E. In some implementations, the cut C1has a uniform cross-section (e.g., profile) along the depth A2of the cut C1. For example, sidewalls of the cut C1can be vertical and parallel between die sections204(1) and204(2). In some implementations, the cut C1has a nonuniform cross-section along the depth A2of the cut C2(e.g., a tapered cross-section and the like resulting from the cleaving operation). In some implementations, the cleave C2has a uniform cross-section (e.g., profile) along the depth A3of the cleave C2. For example, sidewalls of the cleave C2between can be vertical and parallel between die sections204(1) and204(2). In some implementations, the cleave C2has a nonuniform cross-section along the depth A3of the cleave C2(e.g., a tapered cross-section and the like resulting from the cleaving operation). FIG.2Eis a diagram illustrating enlarged example view of die254(1) and254(2) (corresponding to die sections204(1) and204(2)) resulting from the process illustrated inFIGS.2A-2D. As mentioned above, the cut has a larger width W1than the width of the cleave W2. Accordingly, a gap W3(e.g., a step) having width about equal to (W1−W2)/2. The gap W3results in a step in the die254(1) of width (W1−W2)/2. As shown inFIG.2E, the sidewall associated with the cut is vertical (e.g., substantially vertical) and the sidewall associated with the cleave is vertical (e.g., substantially vertical). FIG.2Eillustrates an example cross-sectional shape (e.g., profile) of a cut and a cleave, however, the cut and the cleave can have different cross-sectional shapes). For example, in some implementations, the sidewall of a cut can be aligned within a same plane as a sidewall of a cleave (instead of being offset as shown inFIG.2E). FIGS.3A and3Bare diagrams that illustrate an example system for performing singulation of die from a SiC semiconductor wafer130. The system includes a cutting apparatus310for performing a cutting operation on a portion of a SiC semiconductor wafer210. The system also includes a cleaving apparatus320for performing a cleaving operation on the SiC semiconductor wafer220after the cutting operation has been performed. The result of the cutting operation and the subsequent cleaving operation, when performed according to the improved techniques described herein, is a set of SiC semiconductor dies having vertical sidewalls (e.g., substantially vertical sidewalls). As shown inFIG.3A, the cutting apparatus310is configured to perform a cutting operation between the die sections of the SiC semiconductor wafer210to produce a set of cuts (e.g., cut C1inFIGS.2A-2D) through a portion of the thickness of the SiC semiconductor wafer130. As shown inFIG.3A, the cutting apparatus310includes a controller312configured to control a cutting tool340for performing the cutting operation. The cutting tool340is configured to cut the SiC semiconductor wafer210between die sections. In some implementations, the cutting tool340includes a mechanical saw blade. In some implementations, the saw blade is a nickel bond dicing blade. In some implementations, the saw blade is a hubbed or hubless resinoid blade. In some implementations, the saw blade is a metal sintered dicing blade. In some implementations, the saw blade is configured to produce cut widths of between about 15 μm and 75 μm. In some implementations, the cutting tool340includes a laser ablation tool. Such a laser ablation tool performs a scribing operation to produce a cut through a portion of the thickness of the SiC semiconductor wafer210between the die sections. In some implementations, the cutting tool340includes a short-pulse laser and a focusing lens. The laser can be of any wavelength although it is advantageous that the laser has a short wavelength (e.g., a UV wavelength less than 400 nm). In some implementations, the laser ablation tool can produce cut widths between 10 μm and 50 μm. The controller312is configured to control the cutting tool340such that a cut produced by the cutting tool340has a specified depth through a portion of the thickness of the SiC semiconductor wafer210and a specified width in the gap between the die sections. In some implementations, the controller312includes an electronic control component configured to move the cutting tool340over the SiC semiconductor wafer210according to a dwell schedule. In some implementations, when the cutting tool includes a mechanical saw blade, the electronic component is configured to position the saw blade along an axis normal to the surface of the SiC semiconductor wafer210such that the saw blade performs the cutting operation at a portion of the thickness of the SiC semiconductor wafer210. In some implementations, the controller312has a mechanical component configured to position the saw blade along the axis normal to the surface of the SiC semiconductor wafer210. In some implementations, when the cutting tool340includes a laser ablation tool, the controller312includes an electronic control component configured to adjust a power of the laser and/or a number of passes across the SiC semiconductor wafer210to produce a cut having a specified depth through the thickness of the SiC semiconductor wafer210and/or width. In some implementations, the electronic control component is configured to adjust a position of the focusing lens to produce the cut having a specified depth through the thickness of the SiC semiconductor wafer210. Once the cutting operation has been performed by the cutting apparatus310, the SiC semiconductor wafer210becomes the cut semiconductor wafer220and the cut SiC semiconductor wafer220is transferred to the cleaving apparatus320. In some implementations, the transfer of the wafer220from the cutting apparatus310to the cleaving apparatus320is performed by a robotic wafer transfer device having an end effector that is magnetically attached to the wafer210during the transfer. As shown inFIG.3B, the cleaving apparatus320is configured to perform a cleaving operation on the cut SiC semiconductor wafer220after the cutting operation has been performed on the SiC semiconductor wafer210to produce a cleave that results in separated die. As shown inFIG.3B, the cleaving apparatus320includes, for example, an impulse bar360configured to cleave the wafer220at a specified location below the cut C1. The cleaving operation is made possible when the cut C1creates a stress concentration factor in the gap separating the die sections204(1) and204(2) of the wafer220. The cleaving operation causes the impulse bar360to cleave through the portion of the thickness of the cut SiC semiconductor wafer220below the cut upon an application of force by the impulse bar360. In some implementations, the pressure applied to the cut SiC semiconductor wafer220by the impulse bar can be between 300 kPa and 350 kPA. In some implementation, the pressure applied can be greater than 350 kPA or less than 300 kPa. In some implementations, such pressure is applied to the SiC semiconductor wafer220when the distance that the impulse bar360travels can be between 80 μm and 100 μm. In some implementation, the distance that the impulse bar360travels can be greater than 100 μm or less than 80 μm. In some implementations, the cleaving operation is performed by static bending, an anvil method, or a non-contact method that uses a vacuum chuck. In some implementations, the cleave produced by the cleaving operation is aligned with the cut produced by the cutting operation performed by the cutting apparatus310. As is discussed in greater detail with respect toFIG.4A, this alignment depends on the portion A2of the thickness A1through which the cut is made. FIG.4Ais a diagram illustrating the SiC semiconductor wafer230that has been diced into the die254(1) and254(2) according to the improved techniques described above. As shown inFIG.3A, the SiC semiconductor wafer230has a cut C1and a cleave C2that results in a set of die, for example die254(1) and254(2). The cut C1has a depth A2that is a portion of the thickness A1of the SiC semiconductor wafer230, the cleave C2is aligned with the cut C2and both the cut C1and cleave C2are aligned along a vertical direction (e.g., substantially vertical direction). The depth A2of cut C1into the thickness A1of the wafer230extends is formed (e.g., made) so that a subsequent cleave produces a cleave C2that is aligned with (e.g., aligned along the same direction, parallel to) the cut C1. Such an alignment of the cleave C2with the cut C1occurs when the portion A2is at least 65% of the thickness A1of the SiC wafer230. In some implementations, the portion A2is preferably between about 65% and 75% of the thickness A1of the SiC wafer230. In some implementations, the ratio of the portion A2to the portion A3is between about 2 and 3. As described above, the situation illustrated inFIG.4Awith the cut C1and cleave C2both aligned with respect to the vertical (y) axis occurs when the portion A2of the thickness A1of the cut C1is about 65-75% of the thickness A1. If the portion A1is less than 65% of A1, then the resulting cleave S may not be aligned with the y axis and the cut C1but may rather be situated at a skewed angle with respect to the y axis. Such a skewed angle is not desirable because the die that result may not provide a properly operating device when in a module. When the portion is greater than 75%, the wear on the singulation tool used to perform the cutting operation may be too great to be economically viable in some applications. FIG.4Bis a line drawing that shows this aligned cut and cleave in scanning electron microscope (SEM) pictures442and444. SEM picture442shows a first die (e.g., die254(1)) and the SEM picture444shows another die (e.g., die254(2)). As shown in the SEM pictures442and444, the die resulting from the cut and cleave, as described above, have vertical sidewalls. FIG.5is a flow chart illustrating a method500of performing a singulation of a SiC semiconductor wafer according to the improved techniques described above. At502, a SiC semiconductor wafer (e.g., the wafer200ofFIG.2A) is thinned (e.g., grinded) to a first thickness (e.g., thickness A1). A surface of the thinned SiC semiconductor wafer is aligned along a plane (e.g., surface202is aligned in the x-direction). At504, a cut is defined within the SiC semiconductor wafer by performing a partial dicing operation (e.g., cut C1ofFIG.2C). The cut has a depth less than the first thickness to which the SiC semiconductor wafer is ground (e.g., portion A2). The cut is aligned along a vertical direction orthogonal to the plane (e.g., the cut C1is aligned in the y-direction ofFIG.2D), the cut aligned such that a portion of the SiC semiconductor wafer has a second thickness that extends between a bottom of the cut and an outer surface of the SiC semiconductor wafer. At506, a cleave is defined by performing a cleaving operation, through the portion of the SiC semiconductor wafer having the second thickness, along the vertical direction (e.g., cleave C2ofFIG.2D). The cleave is aligned with the cut and extending to the outer surface of the SiC semiconductor wafer. A number of embodiments have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the specification. It will also be understood that when an element is referred to as being on, connected to, electrically connected to, coupled to, or electrically coupled to another element, it may be directly on, connected or coupled to the other element, or one or more intervening elements may be present. In contrast, when an element is referred to as being directly on, directly connected to or directly coupled to another element, there are no intervening elements present. Although the terms directly on, directly connected to, or directly coupled to may not be used throughout the detailed description, elements that are shown as being directly on, directly connected or directly coupled can be referred to as such. The claims of the application may be amended to recite exemplary relationships described in the specification or shown in the figures. The various apparatus and techniques described herein may be implemented using various semiconductor processing and/or packaging techniques. Some embodiments may be implemented using various types of semiconductor processing techniques associated with semiconductor substrates including, but not limited to, for example, Silicon (Si), Gallium Arsenide (GaAs), Silicon Carbide (SiC), and/or so forth. It will also be understood that when an element, such as a layer, a region, or a substrate, is referred to as being on, connected to, electrically connected to, coupled to, or electrically coupled to another element, it may be directly on, connected or coupled to the other element, or one or more intervening elements may be present. In contrast, when an element is referred to as being directly on, directly connected to or directly coupled to another element or layer, there are no intervening elements or layers present. Although the terms directly on, directly connected to, or directly coupled to may not be used throughout the detailed description, elements that are shown as being directly on, directly connected or directly coupled can be referred to as such. The claims of the application may be amended to recite exemplary relationships described in the specification or shown in the figures. As used in this specification, a singular form may, unless definitely indicating a particular case in terms of the context, include a plural form. Spatially relative terms (e.g., over, above, upper, under, beneath, below, lower, and so forth) are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. In some implementations, the relative terms above and below can, respectively, include vertically above and vertically below. In some implementations, the term adjacent can include laterally adjacent to or horizontally adjacent to. While certain features of the described implementations have been illustrated as described herein, many modifications, substitutions, changes and equivalents will now occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the scope of the implementations. It should be understood that they have been presented by way of example only, not limitation, and various changes in form and details may be made. Any portion of the apparatus and/or methods described herein may be combined in any combination, except mutually exclusive combinations. The implementations described herein can include various combinations and/or sub-combinations of the functions, components and/or features of the different implementations described. In addition, the logic flows depicted in the figures do not require the particular order shown, or sequential order, to achieve desirable results. In addition, other steps may be provided, or steps may be eliminated, from the described flows, and other components may be added to, or removed from, the described systems. Accordingly, other embodiments are within the scope of the following claims. | 25,212 |
11942328 | The drawings are provided by way of example and are not intended to limit the scope of the invention. They constitute diagrammatic views intended to ease the understanding of the invention and are not necessarily to the scale of practical applications. In particular, in the schematic diagrams, the thicknesses of the different layers and the dimensions of the patterns are not representative of reality. DETAILED DESCRIPTION Before giving a detailed review of embodiments of the invention, optional features are set out below, which can be used in combination with or in replacement of one another. According to one example, the sacrificial interlayer is silicon oxide-based and the second masking layer is silicon nitride-based. These two materials have good etch selectivity, typically for hydrofluoric acid-based wet etching. This facilitates removal by lift-off. These materials are also compatible with CMOS technology. According to one example, the sacrificial interlayer has a substantially constant thickness e comprised between 100 nm and 300 nm. It can typically be formed by conformal deposition. A constant thickness allows for better control of the lift-off method. According to one example, the first trenches are formed by anisotropic etching in a third direction z normal to the first and second directions x, y. According to one example, the sacrificial interlayer is removed by wet etching with a hydrofluoric acid-based buffer solution. This allows for good etch selectivity in the case of a silicon oxide-based sacrificial interlayer and a second silicon nitride-based masking layer. A buffer solution can also improve control of the removal process during lift-off. According to one example, the stack comprises an etch stop layer for the formation of the first trenches by etching, said etch stop layer being located at a depth substantially equal to D1 relative to a top face of the stack. End-point detection is typically used to monitor when the etch stop layer has been reached when etching the trenches. This makes it possible to stop etching once the depth D1 has been reached, thus significantly reducing or even eliminating the uncertainty about this etch depth. This is even more advantageous the greater the target depth D1, typically for D1≥1.5λ/4neff, where λ is a wavelength of the monochromatic light radiation and where neffis an effective index. According to one example, the etch stop layer is InGaAs-based and has a thickness e′ comprised between 20 nm and 200 nm. An InGaAs-based etch stop layer typically has a refractive index low enough for laser applications. It is preferably doped, so as to allow for the transfer of carriers during operation of the laser. The thickness e′ is preferably less than a critical thickness defining a plastic relaxation range. This results in an etch stop layer of a crystalline nature. According to one example, the depth D1 is chosen such that D1 is approximately equal to λ/4neff, where A is a wavelength of the monochromatic light radiation and where neffis an effective index. According to one example, the depth D1 is chosen such that D1 is comprised between 0.5λ/4neffand 1.5λ/4neff, where λ is a wavelength of the monochromatic light radiation and where neffis an effective index. According to one example, the depth D1 is chosen such that D1 is greater than 1.5λ/4neff, where λ is a wavelength of the monochromatic light radiation and where neffis an effective index. According to one example, the first trenches are distributed such that they form a grating of period p approximately equal to λ/2neff, where λ is a wavelength of the monochromatic light radiation and where neffis an effective index. According to one example, the first trenches have a width p/2 and a form factor φ=p/(2·D1). A width p/2 corresponds to a DFB fill rate of 50%, where p is the period of the distributed Bragg grating. According to one example, the form factor φ is greater than or equal to 0.8. According to one example, the form factor φ is less than or equal to 1.1. According to one example, the method further comprises, after forming the second trenches, forming a passivation layer on the sidewalls of the quantum cascade laser. It is specified that, within the scope of the present invention, the terms “on”, “overlying”, “covers”, “underlying”, “facing” and the equivalents thereof do not necessarily mean “in contact with”. Thus, for example, the deposition of a first layer on a second layer does not necessarily mean that the two layers are directly in contact with one another, but rather means that the first layer covers at least partially the second layer while being either directly in contact therewith, or while being separated therefrom by at least one other layer or at least one other element. Moreover, a layer can be constituted by a plurality of sub-layers made of the same material or made of different materials. A material A-“based” substrate, stack or layer is understood to mean a substrate, stack or layer comprising this material A only or comprising this material A and optionally other materials, for example alloying elements or doping elements. The doping ranges associated with the different types of doping indicated in the present application are as follows:p++ or n++ doping: greater than 1×1020cm−3p+ or n+ doping: 1×1018cm−3to 9×1019cm−3p or n doping: 1×1017cm−3to 1×1018cm−3intrinsic doping: 1.1015cm−3to 1.1017cm−3 The mid-infrared (MIR) region typically comprises wavelengths Δ between 3 μm and 12 μm. One example implementation of the method is given regarding the production of a DFB-QCL emitting at a wavelength of 7.4 μm. Several embodiments of the invention implementing successive steps of the manufacturing method are described hereinbelow. Unless specified otherwise, the adjective “successive” does not necessarily imply that the steps immediately follow on from one another, although this is generally preferred, and they can be separated by intermediate steps. Moreover, the term “step” is understood to mean the performance of a part of the method, and can denote a set of sub-steps. Moreover, the term “step” does not necessarily mean that the actions carried out during a step are simultaneous or immediately successive. Certain actions of a first step can in particular be followed by actions related to a different step, and other actions of the first step can be resumed thereafter. Thus, the term step does not necessarily mean unitary and inseparable actions in time and in the sequence of the phases of the method. One operating principle of the quantum cascade laser is that the active region is electrically biased so that electrons are injected. This active region comprises a multitude of quantum wells in which an electron will successively lose part of its energy, in a cascade, while emitting a photon of given energy each time. These photons form the light radiation of wavelength λ. This light radiation propagates in a guided manner within an optical cavity. This optical cavity is typically bounded by lower and upper layers referred to as LOC (Low Optical Confinement) layers, and at least one Bragg reflector. The Bragg reflector of the optical cavity typically has a reflectivity peak centred at wavelength λ. This reflectivity peak has a certain spectral width δωDBR. This spectral width δωDBR(in nm) depends in particular on the corrugation factor κ of the Bragg grating, also referred to as the grating strength, and the length of the Bragg grating Lg: δωDBR=πνgκ2+(πLg)2 Where νgis the group velocity of the light radiation. The corrugation factor κ can be expressed as: κ=π·neffλ∫∫Ωninf2nsup2E2dxdy∫∫E2dxdy Where Ω is the section of the optical mode propagating in the waveguide, ninfand nsupare respectively the refractive indices of the alternating structures or corrugations5,6of the Bragg grating as shown inFIGS.1and3, neffis an effective index of the grating (weighted average of the indices related to the corrugations5,6) and E is the electric field of the light radiation outside the region perturbed by the corrugations. Within the scope of the present invention, the terms “Bragg reflector”, “Bragg grating” or “distributed Bragg reflector” or “DFB (Distributed FeedBack)” are used synonymously. The Bragg reflector is, in this case, configured for use as a reflector in a waveguide or in an optical cavity. It comprises alternating materials of different refractive indices. This alternation is reproduced at least twice within the scope of a Bragg reflector according to the present invention. A preferably orthonormal coordinate system comprising the x, y, z axes is shown in the accompanying figures. If a single coordinate system is shown on a whole sheet of figures, this coordinate system applies to all the figures on that sheet. In the present patent application, the thickness of a layer is considered in a direction normal to the main extension plane of the layer. Thus, a layer typically has a thickness along z. The relative terms “on”, “overlying”, “under” and “underlying” refer to positions taken in the z-direction. The terms “vertical” and “vertically” refer to a direction along z. The terms “horizontal” and “horizontally” refer to a direction in the xy-plane. An element located “vertical to” or “in line with” another element means that these two elements are both located on the same line perpendicular to a plane in which a bottom or top face of a substrate primarily extends, i.e. on the same line oriented vertically in the figures. A first example implementation of the method is shown inFIG.4A to10B. In this example, a mesa comprising a stack10of III-V material-based layers is firstly bonded to a substrate20, for example a silicon-based substrate. This bonding can typically be achieved by molecular bonding, for example via oxide-on-oxide or InP-on-oxide layers21. The mesa can take the form of a two-inch InP substrate on which the stack10is formed. The stack10typically comprises a plurality of layers11,12,13,14,15,16,17,18intended for the injection of the electrons, the emission of the light radiation and the guiding of the light radiation. According to one possibility, the stack10can comprise, from the bonding layer21to the surface100of the stack along z:an n++ doped InP-based layer11having a thickness comprised between 1.5 μm and 5 μm,an n++ doped InGaAs-based layer12having a thickness comprised between 100 nm and 200 nm,an InP-based layer13having a thickness comprised between 100 nm and 200 nm,a so-called LOC InGaAs-based layer14having a thickness comprised between 20 nm and 200 nm.an active region15having a thickness comprised between 1.5 μm and 5 μm,a so-called LOC InGaAs-based layer16having a thickness comprised between 20 nm and 200 nm.an InP-based layer17having a thickness comprised between 1 μm and 3 μm,an n++ doped InGaAs-based layer18having a thickness comprised between 20 nm and 200 nm. The n++ doped layers11,12,18typically contribute to the injection of the electrons into the active region15. The LOC layers14,16typically allow the light radiation to be confined to the active region15. They typically have a low refractive index, for example in the order of 3.17 for a wavelength λ in the order of 7.4 μm, and are referred to as guide layers. The InP layer17is in part intended to be patterned to form a DFB reflector. The active region15typically comprises a multitude of quantum wells through which electrons will cascade, emitting light radiation. According to one possibility, the active region15can comprise alternating layers of InGaAs and AlInAs. The reader can refer to the document “Carras, M. et al. Top grating index-coupled distributed feedback quantum cascade lasers. Appl. Phys. Lett. 93, 011109 (2008)” for the design of the active region, in particular for the choice of the InGaAs/AlInAs heterostructures, the number of periods and/or of quantum wells, and the resonant superlattice architecture. After the stack10is provided (FIG.9A,9B), a masking layer31is formed on the surface100of the stack10. This masking layer31can be conformally deposited by Plasma Enhanced Chemical Vapour Deposition (PECVD). It is preferably SiN-based. This masking layer31is intended to form a hard mask for the subsequent etching of the trenches41of the Bragg reflector. It can thus be patterned by photolithography and etching to form patterns310. Alternatively, the masking layer31directly has a photolithography resin base. The masking layer31is typically about 100 nm thick. This thickness of the masking layer31is preferably thin enough to form high-resolution and high-definition patterns310. The patterns310typically form a grating array of lines with a period p in the order of a few hundred nanometres, for example 1,165 nm for radiation of wavelength λ=7.4 μm. According to a preferred possibility, the grating period p is chosen such that p=λ/2neff. Trenches41are then etched between the lines of the grating array to a depth D1. This etching can be carried out by anisotropic dry etching along z, for example by ICP (Inductively Coupled Plasma). The depth D1 is preferably chosen such that D1=λ/4neff. According to one possibility known from the US patent document No. 7567606 B2, the depth D1 can be chosen such that D1 is comprised between 0.5λ/4neffand 1.5λ/4neff. For example, for radiation of wavelength λ=7.4 μm, the depth D1 is preferably comprised between 300 nm and 900 nm. The strength of the DFB grating κ varies little in this range of etch depths D1. The reflectivity of the DFB is thus substantially constant. The performance of the laser comprising such a DFB reflector is stable and depends little on method-related variations in etch depth. The trenches41typically pass through the InGaAs layer18and extend into the InP layer17. They have a width l along y and a form factor φ=l/D1. According to a preferred possibility, the width l is equal to p/2. The form factor φ can be comprised between 0.8 and 1.1. Advantageously, the form factor φ can be less than 0.8. A form factor of less than 1 typically corresponds to deep trenches. A DFB comprising deep trenches has an increased grating strength. The DFB is thus more efficient and offers better coupling between the propagating and counter-propagating modes. The reflection of the DFB grating is increased. In particular, this allows a shorter laser cavity to be designed. According to an optional alternative embodiment shown inFIG.11, an etch stop layer17′ is provided in the stack10, typically within the InP layer17. This etch stop layer17′ is intended to precisely control the stopping of the etching when etching the trenches41. It can be located in the stack10at the depth D1 relative to the surface100. Advantageously, the etch stop layer17′ is implemented for applications requiring a depth D1≥1.5λ/4neff, i.e. in a range of depths outside the stability range of the corrugation factor κ. A depth D1≥1.5λ/4neffallows, for example, the length of the DFB laser cavity to be reduced. The etch stop layer17′ thus procures good reproducibility of the height of the corrugations6of the DFB reflector. The reproducibility of the method for manufacturing the DFB reflector is improved. Precise control of the depth of the trenches also allows the wavelength of the light radiation to be precisely defined. The etch stop layer17′ can be InGaAs-based. It has a thickness e′ in the order of a few nanometres to a few hundred nanometres. It is preferably doped, so as to allow for the transfer of carriers during operation of the laser. The thickness e′ is preferably less than a critical thickness defining a plastic relaxation range. This results in a pseudomorphic etch stop layer. This etch stop layer17′ is, for example, similar to low-index InGaAs LOC layers with thicknesses comprised between 20 nm and 200 nm. This improves the confinement of the optical mode of propagation of the light radiation. An InGaAs-based etch stop layer typically has a refractive index low enough for laser applications. This allows the optical mode of propagation of the light radiation to be better confined. According to one possibility, the trenches are etched in the InP by HCL-based wet etching. Such a solution has good etch selectivity between InP and InGaAs. This allows for the selective etching of InP stopping on the InGaAs LOC etch stop layer17′. According to another possibility, the trenches are etched in the InP by dry etching, typically if the opening rate of the patterns310of the grating is higher than 10%. During the etching of trenches41, the volatile etch products can be analysed in real time by spectroscopy. When the etch reaches the etch stop layer17′, the nature of the etch products changes. This change is detected by spectroscopy and etching is stopped. The layer17′ is thus advantageously used for end-of-etch detection, also known as end-point detection (EPD). The rest of the method can be indifferently applied to both alternative embodiments—with or without an etch stop layer in the stack—described hereinabove. After forming the patterns310and the trenches41, a sacrificial interlayer34is formed in the trenches41(FIG.5A,5B). This sacrificial interlayer34is preferably conformally deposited by Plasma Enhanced Chemical Vapour Deposition (PECVD). Alternatively, it can be deposited by Ion Beam Deposition (IBD) or by Atomic Layer Deposition (ALD). The sacrificial interlayer34can be silicon oxide-based. It has a thickness e in the order of a few nanometres to a few hundred nanometres. The thickness e of the sacrificial interlayer34is, for example, comprised between 100 nm and 300 nm. After forming the sacrificial interlayer34, a second masking layer32is formed on the sacrificial interlayer34and in the trenches41(FIG.6A,6B). This masking layer32can be conformally deposited by Plasma Enhanced Chemical Vapour Deposition (PECVD). It is preferably SiN-based. This masking layer32is intended to form a hard mask for the subsequent etching of the ribbon pattern of the laser. It can thus be patterned by photolithography and etching, so as to form one or more patterns320, at least on the array of grating trenches41of the DFB reflector. The masking layer32typically has a thickness comprised between 400 nm and 600 nm, as a function of the depth to be etched when the ribbon pattern of the laser is etched. Such a thickness of the masking layer32protects the trenches and the underlying stack when the ribbon pattern of the laser is etched. The pattern320typically forms a rectangle covering the array of grating trenches41, with long sides extending along y on either side of the trenches41over a distance defining the cavity length of the laser. This cavity length can reach several millimetres, for example 4 mm. The short sides of this rectangular pattern320extend along x over a distance defining the cavity width of the laser. This cavity width can be in the order of a few microns to a few tens of microns, for example in the order of 8 μm or 10 μm. It can be greater than or equal to the dimension of the trenches along x. Trenches42are then etched on either side of the pattern320to a depth D2 (FIG.7A,7B). This etching can be carried out by anisotropic dry etching along z, for example by ICP (Inductively Coupled Plasma). The etching is preferably configured to be stopped in the InP layer13. This etching forms a ribbon comprising the active region15in the stack10made of III-V materials. This ribbon forms a waveguide for the light radiation. The sidewalls43of the ribbon are then passivated, preferably by depositing a passivation layer51made of SiN, for example with a thickness comprised between 400 nm and 900 nm (FIG.8A,8B). Openings50,50′ are formed in the passivation layer51, for example by plasma RIE (Reactive Ion Etching), so as to define an upper contact area at the trenches41, and a lower contact area at the InP layer13. At this stage, SiN residues40are typically present at the bottom of the trenches41(FIG.8A). These residues40are advantageously removed by lift-off when etching the sacrificial interlayer34(FIG.9A,9B). This etching is preferably carried out wet, using a so-called BOE (“Buffer Oxide Etch”) solution. Such a BOE solution can advantageously be used to etch a thin layer of silicon dioxide SiO2, such as the sacrificial interlayer34. This solution typically consists of a buffer, such as ammonium fluoride NH4F, and hydrofluoric acid HF. This makes the hydrofluoric acid a little less reactive and thus procures better control over the etching reaction. For example, a 7:1 ratio of ammonium fluoride to hydrofluoric acid can be used. Such removal of the sacrificial interlayer34is selective to the SiN of the residues40. It thus allows the residues40to be lifted off. These are then removed without being completely dissolved, for example by the flow of the BOE etching solution or during the rinsing method consecutive to this etch. The InP layer13can be etched by chemical etching or plasma etching stopping on the InGaAs layer12, before the electrical contacts are formed (FIG.9B). According to another possibility, the layer12can be doped InAlAs-based. This also procures good etch selectivity towards InP. Once the sacrificial interlayer34has been removed, the trenches41are advantageously free of residues. They can thus be completely filled with metal during the subsequent metal deposition (FIG.10A,10B). This metal deposit can typically take the form of a stack of Ti/TiN/Au-based metal layers. The stack of metal layers can have a thickness comprised between 1 μm and 3 μm. The patterning of this metal deposit by photolithography/etching defines and forms the DFB Bragg reflector65and the electrodes60,60′. In light of the above description, it is clear that the proposed method offers a particularly effective solution for producing metal/InP Bragg reflectors on a CMOS-compatible InP die. The method for manufacturing the DFB is also simplified. The DFB reflector thus formed is particularly effective both optically, due to the high InP/metal index contrast, and electrically, due to its function as an electrical injection electrode. The invention is not limited to the aforementioned embodiments, and includes all the embodiments covered by the claims. In particular, the DFB-QCLs produced by this method can have other architectures, for example in a so-called double trench configuration. Such a configuration in particular allows a more extensive planar surface to be obtained during the subsequent welding and conditioning steps. | 22,614 |
11942329 | DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. The term “substantially” in the description, such as in “substantially flat” or in “substantially coplanar”, etc., will be understood by the person skilled in the art. In some embodiments the adjective substantially may be removed. Where applicable, the term “substantially” may also include embodiments with “entirely”, “completely”, “all”, etc. Where applicable, the term “substantially” may also relate to 90% or higher, such as 95% or higher, especially 99% or higher, including 100%. Furthermore, terms such as “substantially parallel” or “substantially perpendicular” are to be interpreted as not to exclude insignificant deviation from the specified arrangement and may include for example deviations of up to 10°. The word “substantially” does not exclude “completely” e.g. a composition which is “substantially free” from Y may be completely free from Y. Terms such as “about” in conjunction with a specific distance or size are to be interpreted so as not to exclude insignificant deviation from the specified distance or size and may include for example deviations of up to 10%. The term “about” in relation to a numerical value x may mean x ±5 or 10%. Embodiments of the disclosure may relate to FinFET structure having fins. The fins may be patterned by any suitable method. For example, the fins may be patterned using one or more photolithography processes, including double-patterning or multi-patterning processes. Generally, double-patterning or multi-patterning processes combine photolithography and self-aligned processes, allowing patterns to be created that have, for example, pitches smaller than what is otherwise obtainable using a single, direct photolithography process. For example, in some embodiments, a sacrificial layer is formed over a substrate and patterned using a photolithography process. Spacers are formed alongside the patterned sacrificial layer using a self-aligned process. The sacrificial layer is then removed, and the remaining spacers may then be used to pattern the fins. However, the fins may be formed using one or more other applicable processes. Embodiments of the disclosure may relate to the gate all around (GAA) transistor structures. The GAA structure may be patterned using any suitable method. For example, the structures may be patterned using one or more photolithography processes, including double-patterning or multi-patterning processes. In some embodiments, double-patterning or multi-patterning processes combine photolithography and self-aligned processes, allowing patterns to be created that have, for example, pitches smaller than what is otherwise obtainable using a single, direct photolithography process. For example, in some embodiments, a sacrificial layer is formed over a substrate and patterned using a photolithography process. Spacers are formed alongside the patterned sacrificial layer using a self-aligned process. The sacrificial layer is then removed, and the remaining spacers may then be used to pattern the GAA structure. Some embodiments of the disclosure are described. Additional operations can be provided before, during, and/or after the stages described in these embodiments. Some of the stages that are described can be replaced or eliminated for different embodiments. Additional features can be added to the semiconductor device structure. Some of the features described below can be replaced or eliminated for different embodiments. Although some embodiments are discussed with operations performed in a particular order, these operations may be performed in another logical order. FIGS.1A-1Gare cross-sectional views of various stages of a process for forming a semiconductor device structure, in accordance with some embodiments. As shown inFIG.1A, a semiconductor substrate100is received or provided. The semiconductor substrate100includes regions10and20. In some embodiments, the regions10and20are designed for forming different devices. In some embodiments, the region10is designed for forming logic devices. In some embodiments, input/output (TO) devices are to be formed over the region10. In some embodiments, the region20is designed for forming memory devices. In some embodiments, static random access memory (SRAM) devices are to be formed over the region20. In some embodiments, the semiconductor substrate100is a bulk semiconductor substrate, such as a semiconductor wafer. For example, the semiconductor substrate100includes silicon or other elementary semiconductor materials such as germanium. The semiconductor substrate100may be un-doped or doped (e.g., p-type, n-type, or a combination thereof). In some embodiments, the semiconductor substrate100includes an epitaxially grown semiconductor layer on a dielectric layer. The epitaxially grown semiconductor layer may be made of silicon germanium, silicon, germanium, one or more other suitable materials, or a combination thereof. In some other embodiments, the semiconductor substrate100includes a compound semiconductor. For example, the compound semiconductor includes one or more III-V compound semiconductors having a composition defined by the formula Alx1Gax2Inx3Asy1Py2Ny3Sby4, where X1, X2, X3, Y1, Y2, Y3, and Y4 represent relative proportions. Each of them is greater than or equal to zero, and added together they equal 1. The compound semiconductor may include silicon carbide, gallium arsenide, indium arsenide, indium phosphide, one or more other suitable compound semiconductors, or a combination thereof. Another suitable substrate including II-VI compound semiconductors may also be used. In some embodiments, the semiconductor substrate100is an active layer of a semiconductor-on-insulator (SOI) substrate. The SOI substrate may be fabricated using a separation by implantation of oxygen (SIMOX) process, a wafer bonding process, another applicable method, or a combination thereof. In some other embodiments, the semiconductor substrate100includes a multi-layered structure. For example, the semiconductor substrate100includes a silicon-germanium layer formed on a bulk silicon layer. As shown inFIG.1A, multiple semiconductor protruding structures101A1and101A2are formed over the region10, and multiple semiconductor protruding structures101B1and101B2are formed over the region20, in accordance with some embodiments. In some embodiments, the distance between the semiconductor protruding structures101A1and101A2is longer than the distance between the semiconductor protruding structures101B1and101B2. In some embodiments, the semiconductor protruding structures101A1,101A2,101B1, and101B2are semiconductor fin structures. In some other embodiments, each of the semiconductor fin structures includes a stack of two or more different semiconductor layers that are laid out alternately, which may be used for forming gate-all-around (GAA) devices. In some embodiments, multiple recesses (or trenches) are formed in the semiconductor substrate100, in accordance with some embodiments. As a result, multiple semiconductor protruding structures that protrude from the surface of the semiconductor substrate100are formed or defined between the recesses. In some embodiments, one or more photolithography and etching processes are used to form the recesses. In some embodiments, the semiconductor protruding structures101A1,101A2,101B1, and101B2directly connect to the semiconductor substrate100. However, embodiments of the disclosure have many variations and/or modifications. In some other embodiments, the semiconductor protruding structures101A1,101A2,101B1, and101B2are not in direct contact with the semiconductor substrate100. One or more other material layers may be formed between the semiconductor substrate100and the semiconductor protruding structures101A1,101A2,101B1, and101B2. For example, a dielectric layer may be formed therebetween. In some embodiments, hard mask elements are formed over the semiconductor substrate100to assist in the formation of the semiconductor protruding structures101A1,101A2,101B1, and101B2. One or more etching processes may be used to pattern the semiconductor substrate100into the semiconductor protruding structures101A1,101A2,101B1, and101B2, as shown inFIG.1A. Each of the hard mask elements may include a first mask layer102aand a second mask layer102b. The first mask layer102aand the second mask layer102bmay be made of different materials. In some embodiments, the first mask layer102ais made of a material that has good adhesion to the semiconductor substrate100. The first mask layer102amay be made of silicon oxide, germanium oxide, silicon germanium oxide, one or more other suitable materials, or a combination thereof. In some embodiments, the second mask layer102bis made of a material that has good etching selectivity to the semiconductor substrate100. The second mask layer102bmay be made of silicon nitride, silicon oxynitride, silicon carbide, one or more other suitable materials, or a combination thereof. As shown inFIG.1B, an insulating layer104is deposited over the semiconductor substrate100and the semiconductor protruding structures101A1-101A2and101B1-101B2, in accordance with some embodiments. In some embodiments, the insulating layer104extends along the tops and the sidewalls of the semiconductor protruding structures101A1,101A2,101B1, and101B2. In some embodiments, the insulating layer104conformally extends along the semiconductor protruding structures101A1,101A2,101B1, and101B2. In some embodiments, the insulating layer104is in direct contact with the semiconductor protruding structures101A1,101A2,101B1, and101B2. In some embodiments, the insulating layer104is made of or includes a dielectric material. The dielectric material may include silicon oxide, carbon-containing silicon oxide, silicon carbide, silicon oxynitride, silicon nitride, one or more other suitable materials, or a combination thereof. In some other embodiments, the insulating layer104is substantially free of nitrogen. In these cases, the insulating layer104may be made of or include silicon oxide, carbon-containing silicon oxide, silicon carbide, one or more other suitable materials, or a combination thereof. The insulating layer104may be deposited using a chemical vapor deposition (CVD) process, an atomic layer deposition (ALD) process, a thermal oxidation process, a physical vapor deposition (PVD) process, one or more other applicable processes, or a combination thereof. In some embodiments, the insulating layer104extends conformally along the sidewalls of the semiconductor protruding structures101A1-101A2and101B1-101B2and the surface of the semiconductor substrate100. In these cases, the insulating layer104is not deposited using a flowable chemical vapor deposition (FCVD) process. As shown inFIG.1C, an interfacial layer106is deposited over the insulating layer104, in accordance with some embodiments. In some embodiments, the interfacial layer106extends along the sidewalls and the tops of the semiconductor protruding structures101A1-101A2and101B1-101B2. In some embodiments, the interfacial layer106conformally extends along the semiconductor protruding structures101A1-101A2and101B1-101B2. In some embodiments, the interfacial layer106is in direct contact with the insulating layer104. In some embodiments, the interfacial layer106is thinner than the insulating layer104. In some embodiments, the interfacial layer106is made of or includes a dielectric material. In some embodiments, the dielectric material contains nitrogen and/or carbon. The dielectric material may include carbon-containing silicon nitride, carbon-containing silicon oxynitride, silicon carbide, silicon oxynitride, silicon nitride, one or more other suitable materials, or a combination thereof. The interfacial layer106may be deposited using an ALD process, a CVD process, one or more other applicable processes, or a combination thereof. Many variations and/or modifications can be made to embodiments of the disclosure. In some other embodiments, the interfacial layer106is made of or includes a high dielectric constant (high-k) material. The high-k material may include hafnium oxide, hafnium zirconium oxide, zirconium oxide, hafnium dioxide-alumina alloy, hafnium silicon oxide, hafnium silicon oxynitride, hafnium tantalum oxide, hafnium titanium oxide, lanthanum oxide, hafnium lanthanum oxide, one or more other suitable materials, or a combination thereof. The interfacial layer106containing the high-k material may be deposited using an ALD process, a CVD process, one or more other applicable processes, or a combination thereof. However, embodiments of the disclosure are not limited thereto. Many variations and/or modifications can be made to embodiments of the disclosure. In some other embodiments, the interfacial layer106is not formed. Afterwards, a dielectric layer108is deposited over the interfacial layer106, as shown inFIG.1Cin accordance with some embodiments. In some embodiments, the dielectric layer108extends along the sidewalls and the tops of the semiconductor protruding structures101A1-101A2and101B1-101B2. In some embodiments, the dielectric layer108conformally extends along the semiconductor protruding structures101A1-101A2and101B1-101B2. In some embodiments, the dielectric layer108is in direct contact with the interfacial layer106. In some embodiments, the dielectric layer108is thinner than the interfacial layer106. In some embodiments, the dielectric layer108is made of or includes a dielectric material. In some embodiments, the dielectric material contains nitrogen and/or carbon. The dielectric material may include carbon-containing silicon nitride, carbon-containing silicon oxynitride, silicon carbide, silicon oxynitride, silicon nitride, one or more other suitable materials, or a combination thereof. In some embodiments, the dielectric layer108is made of carbon-containing silicon nitride (SiCN) with a first atomic concentration of carbon. The interfacial layer106is made of carbon-containing silicon nitride (SiCN) with a second atomic concentration of carbon. In some embodiments, the first atomic concentration of carbon is greater than the second atomic concentration of carbon. The first atomic concentration of carbon of the dielectric layer108may be in a range from about 15% to about 25%. The second atomic concentration of carbon of the dielectric layer108may be in a range from about 5% to about 10%. Due to the different compositions of the dielectric layer108and the interfacial layer106, the etching selectivity of the dielectric layer108and the interfacial layer106may be different from each other. In some embodiments, the etching rate of the interfacial layer106is faster than the dielectric layer108. The dielectric layer108may be deposited using an ALD process, a CVD process, one or more other applicable processes, or a combination thereof. In some embodiments, the interfacial layer106and the dielectric layer108are sequentially formed in-situ in the same process chamber. In some embodiments, the vacuum of the process chamber is not broken during the formation of the interfacial layer106and the dielectric layer108. As shown inFIG.1C, the trench between the semiconductor protruding structures101B1and101B2is narrower than the trench between the semiconductor protruding structures101A1and101A2. In some embodiments, the dielectric layer108substantially fills the remaining space of the narrower trench between the semiconductor protruding structures101B1and101B2while the dielectric layer108partially fills the trench between the semiconductor protruding structures101A1and101A2. In some embodiments, a seam S1that is surrounded by the dielectric layer108is formed, as shown inFIG.1C. In some embodiments, the dielectric layer108is formed using an ALD process, and the seam S1is naturally formed due to the characteristics of the ALD process for forming the dielectric layer108. The width of the seam S1may be in a range from 10 angstroms to about 50 angstroms. As shown inFIG.1D, a second dielectric layer110is deposited over the dielectric layer108, in accordance with some embodiments. In some embodiments, the second dielectric layer110extends along the sidewalls and the tops of the semiconductor protruding structures101A1-101A2. In some embodiments, the second dielectric layer110conformally extends along the semiconductor protruding structures101A1-101A2. In some embodiments, the second dielectric layer110covers and extends across the seam S1in the region20, as shown inFIG.1D. In some embodiments, the second dielectric layer110substantially does not extend into the seam S1. In some embodiments, the second dielectric layer110is in direct contact with the dielectric layer108. In some embodiments, the second dielectric layer110is made of or includes a dielectric material. In some embodiments, the dielectric material contains nitrogen and/or carbon. The dielectric material may include carbon-containing silicon nitride, carbon-containing silicon oxynitride, silicon carbide, silicon oxynitride, silicon nitride, one or more other suitable materials, or a combination thereof. In some embodiments, the composition of the second dielectric layer110is substantially the same as that of the dielectric layer108. The second dielectric layer110may be deposited using an ALD process, a CVD process, one or more other applicable processes, or a combination thereof. In some embodiments, the dielectric layer108and the second dielectric layer110are sequentially formed in-situ in the same process chamber. In some embodiments, the vacuum of the process chamber is not broken during the formation of the dielectric layer108and the second dielectric layer110. In some embodiments, the second dielectric layer110substantially fills the remaining space of the trench between the semiconductor protruding structures101A1and101A2. In some embodiments, a seam S2that is surrounded by the second dielectric layer110is formed, as shown inFIG.1D. In some embodiments, the second dielectric layer110is formed using an ALD process, and the seam S2is naturally formed due to the characteristics of the ALD process for forming the second dielectric layer110. The width of the seam S2may be in a range from 10 angstroms to about 50 angstroms. As shown inFIG.1E, a planarization process is performed to the structure shown inFIG.1Dto expose the semiconductor protruding structures101A1-101A2and101B1-101B2, in accordance with some embodiments. In some embodiments, the second dielectric layer110, the dielectric layer108, the interfacial layer106, and the insulating layer104are partially removed during the planarization process. In some embodiments, the first mask layer102aand the second mask layer102bare also removed by the planarization process. As a result, the topmost surfaces of the second dielectric layer110, the dielectric layer108, the interfacial layer106, and the insulating layer104are substantially level with each other, as shown inFIG.1E. The planarization process may include a chemical mechanical polishing (CMP) process, a grinding process, a dry polishing process, an etching process, one or more other applicable processes, or a combination thereof. As shown inFIG.1E, portions of the dielectric layer108in the region20form multiple dielectric structures114B. One of the dielectric structures114B is positioned between the semiconductor protruding structures101B1and101B2. In some embodiments, each of the dielectric structures114B is a dielectric fin. In some embodiments, the semiconductor protruding structures101B1and101B2are semiconductor fins, and the dielectric structures114B are dielectric fins. In some embodiments, in a top view, the longitudinal directions of the dielectric fins and the semiconductor fins are substantially parallel to each other. As shown inFIG.1E, portions of the dielectric layer108and the second dielectric layer110in the region10together form multiple dielectric structures114A. One of the dielectric structures114A is positioned between the semiconductor protruding structures101A1and101A2. In some embodiments, each of the dielectric structures114A is a dielectric fin. In some embodiments, the semiconductor protruding structures101A1and101A2are semiconductor fins, and the dielectric structures114A are dielectric fins. In some embodiments, in a top view, the longitudinal directions of the dielectric fins and the semiconductor fins are substantially parallel to each other. As shown inFIG.1F, a protective layer112is formed on the surface of the structure shown inFIG.1E, in accordance with some embodiments. The protective layer112covers the topmost surfaces of the dielectric structures114A and114B. That is, the topmost surfaces of the dielectric layer108, the second dielectric layer110, and the interfacial layer106are covered by the protective layer112, as shown inFIG.1F. In some embodiments, the protective layer112is made of or includes a dielectric material. In some embodiments, the protective layer112contains nitrogen and/or carbon. In some embodiments, the protective layer112is free of oxygen. The protective layer112may be made of or include carbon-containing silicon nitride, silicon nitride, one or more other suitable materials, or a combination thereof. In some embodiments, the protective layer112is deposited using an atomic layer deposition (ALD) process. In some embodiments, the reaction gases used in the ALD process include a silicon-containing gas and a nitrogen-containing gas. In some other embodiments, the reaction gases used in the ALD process further include a carbon-containing gas. In some embodiments, the reaction gases used in the ALD process include dichlorosilane, propylene, ammonia, one or more other suitable gases, or a combination thereof. The reaction temperature of the ALD process may be in a range from about 500 degrees C. to about 600 degrees C. Due to the characteristics of the ALD process, the deposited material tends to be deposited on the surfaces with nitrogen-containing chemical bonds and/or carbon-containing chemical bonds. In some embodiments, the protective layer112is deposited at a faster rate on the surfaces of the dielectric layer108, the second dielectric layer110, and the interfacial layer106. In some embodiments, the protective layer112is substantially not or merely slightly deposited on the surfaces of the insulating layer104and the semiconductor protruding structures101A1-101A2and101B1-101B2. As a result, different portions of the protective layer112may have different thicknesses. In some embodiments, the protective layer112is selectively deposited or mainly deposited on the surfaces of the dielectric layer108, the second dielectric layer110, and the interfacial layer106. In some embodiments, the protective layer112is completely not deposited on the surfaces of the insulating layer104and the semiconductor protruding structures101A1-101A2and101B1-101B2. In some other embodiments, the protective layer112is mainly deposited on the dielectric structures114A and114B and merely slightly deposited on the surfaces of the insulating layer104and the semiconductor protruding structures101A1-101A2and101B1-101B2, as shown inFIG.1F. As shown inFIG.1F, portions of the protective layer112directly above the dielectric structures114A form protective elements P3. Portions of the protective layer112directly above the dielectric structures114B form protective elements P3′. The protective elements P3and P3′ may be used to protect the dielectric structures114A and114B thereunder during a subsequent etching process of the insulating layer104. Each of the protective elements P3and P3′ may have a thickness that is in a range from about 10 angstroms to about 20 angstroms. In some embodiments, the formation of the protective elements P3and P3′ does not involve any photolithography process. In some embodiments, the protective layer112further extends over the topmost surfaces of the insulating layer104and the semiconductor protruding structures101A1-101A2and101B1-101B2, as shown inFIG.1F. As shown inFIG.1F, the protective layer112has portions P1and P1′ that are directly above the topmost surfaces of the insulating layer104. The protective layer112also has portions P2and P2′ that are directly above the topmost surfaces of the semiconductor protruding structures101A1-101A2and101B1-101B2. In some embodiments, each of the protective elements P3and P3′ is much thicker than each of the portions P1, P1′, P2, and P2′ of the protective layer112. Each of the portions P1, P1′, P2, and P2′ of the protective layer112may have a thickness that is in a range from about 1 angstroms to about 5 angstroms. In some embodiments, some portions of the topmost surfaces of the insulating layer104and the semiconductor protruding structures101A1-101A2and101B1-101B2are exposed without being covered by the protective layer. As shown inFIG.1G, the insulating layer104is recessed, in accordance with some embodiments. The remaining insulating layer104may function as an isolation structure to prevent undesired current leakage between the semiconductor protruding structures101A1-101A2and101B1-101B2. One or more etching processes may be used to partially remove the insulating layer104. After the recessing of the insulating layer104, the semiconductor protruding structures101A1-101A2and101B1-101B2and the dielectric structures114A and114B protrude from the topmost surfaces of the remaining portion of the insulating layer104, as shown inFIG.1G. During the etching process for recessing the insulating layer104, the protective elements P3and P3′ are used to protect the dielectric structures114A and114B thereunder. As shown inFIG.1F, since the portions P1and P1′ are very thin, the etchant used in the etching process may reach the insulating layer104after the portions P1and P1′ are consumed. Even if the portions P1and P1′ that are very thin are consumed, the protective elements P3and P3′ that are thicker still remain on the dielectric structures114A and114B. Due to the protection of the protective elements P3and P3′, the profiles and dimensions of the dielectric structures114A and114B may be substantially maintained during the recessing the insulating layer104. The reliability and performance of the semiconductor device structure are thus ensured. In some embodiments, the protective elements P3and P3′ are consumed during the recessing of the insulating layer104. In some embodiments, the protective elements P3and P3′ are completely consumed during the recessing of the insulating layer104. As a result, no protective element remains on the topmost surfaces of the dielectric structures114A and114B after the recessing of the insulating layer104, as shown inFIG.1G. Afterwards, the interfacial layer106is then partially removed to enlarge the space between the nearby dielectric structures114A or114B, as shown inFIG.1Gin accordance with some embodiments. As a result, additional space is provided for the subsequent growth of source/drain structures. After the partial removal of the interfacial layer106, the topmost surfaces of the interfacial layer106are below the topmost surfaces of the dielectric structures114A and114B. In some embodiments, the topmost surfaces of the interfacial layer106are substantially level with the topmost surfaces of the insulating layer. In some embodiments, the interfacial layer106is partially removed using one or more etching processes. As mentioned above, in some embodiments, the etching rate of the interfacial layer106is faster than the dielectric layer108. Since the etching rate of the dielectric layer108is lower, the dielectric structures114A and114B may substantially sustain the etching process of the interfacial layer106. Many variations and/or modifications can be made to embodiments of the disclosure. In some other embodiments, no additional etching process is used to recess the interfacial layer106. In some embodiments, the interfacial layer106is recessed by the etching process used for recessing the insulating layer104. Many variations and/or modifications can be made to embodiments of the disclosure.FIGS.2A-2Care cross-sectional views of various stages of a process for forming a portion of a semiconductor device structure, in accordance with some embodiments. As shown inFIG.2A, a structure the same as or similar to the structure shown inFIG.1Eis formed. Afterwards, similar to the embodiments illustrated inFIG.1F, protective elements212are selectively formed directly on the dielectric structures114A and114B, as shown inFIG.2Bin accordance with some embodiments. The material and formation method of the protective elements212may be the same as or similar to those of the protective elements P3and P3′ as illustrated inFIG.1F. In some embodiments, the deposited protective material used for forming the protective elements212is completely not (or substantially not) deposited on the surfaces of the insulating layer104and the semiconductor protruding structures101A1-101A2and101B1-101B2, as shown inFIG.2B. In some embodiments, the formation of the protective elements212(or the protective elements) does not involve any photolithography process. However, embodiments of the disclosure are not limited thereto. Many variations and/or modification can be made to embodiments of the disclosure. In some other embodiments, a protective layer is formed to cover the entire top surface of the structure shown inFIG.2A. Afterwards, the protective layer is patterned using one or more photolithography processes and one or more etching processes. As a result, the protective elements212are formed. For example, a patterned photoresist layer is formed over the protective layer to assist in the patterning of the protective layer. With the patterned photoresist layers as an etching mask, the protective layer is partially removed. As a result, the protective elements212are formed. As shown inFIG.2C, similar to the embodiments illustrated inFIG.1G, the insulating layer104and the interfacial layer106are partially removed, in accordance with some embodiments. As a result, the semiconductor protruding structures101A1-101A2and101B1-101B2and the dielectric structures114A and114B protrude from the topmost surface of the remaining portion of the insulating layer104. Many variations and/or modification can be made to embodiments of the disclosure.FIGS.3A-3Bare top views of various stages of a process for forming a portion of a semiconductor device structure, in accordance with some embodiments.FIGS.4A-4Care cross-sectional view of various stages of a process for forming a portion of a semiconductor device structure, in accordance with some embodiments.FIGS.5A-5Dare cross-sectional view of various stages of a process for forming a portion of a semiconductor device structure, in accordance with some embodiments. In some embodiments,FIG.4Ais a cross-sectional view of the structure taken along the line4A-4A inFIG.3A.FIG.4Ashows a structure that is similar to the structure in the region20shown inFIG.1G. In some embodiments, the longitudinal directions of semiconductor protruding structures101B1-101B3and dielectric structures114B1-114B2are substantially parallel to each other, as shown inFIG.3A. The semiconductor protruding structures101B1-101B3and dielectric structures114B1-114B2may be formed using similar methods as illustrated inFIGS.1A-1G. Afterwards, dummy gate stacks420A and420B are formed, as shown inFIGS.3B and4Bin accordance with some embodiments. In some embodiments,FIG.4Bshows the cross-sectional view of the structure taken along the line4B-4B inFIG.3B. In some embodiments,FIG.5Ashows the cross-sectional view of the structure taken along the line5A-5A inFIG.3B. As shown inFIGS.3B and4B, the dummy gate stacks420A and420B are formed to partially cover and to extend across the semiconductor protruding structures101B1-101B3and the dielectric structures114B1-114B2, in accordance with some embodiments. In some embodiments, the dummy gate stacks420A and420B wraps around the semiconductor protruding structures101B1-101B3and the dielectric structures114B1-114B2, as shown inFIG.4B. As shown inFIG.5A, other portions of the semiconductor protruding structures101B1-101B3and the dielectric structures114B1-114B2remain exposed without being covered by the dummy gate stacks420A and420B. As shown inFIGS.3B and4B, each of the dummy gate stacks420A and420B includes a dummy gate dielectric layer416and a dummy gate electrode418. The dummy gate dielectric layer416may be made of or include silicon oxide. The dummy gate electrode418may be made of or include polysilicon. In some embodiments, a dummy gate dielectric material layer and a dummy gate electrode layer are sequentially deposited over the dielectric structures114B1-114B2and the semiconductor protruding structures101B1-101B3. Afterwards, the dummy gate dielectric material layer and the dummy gate electrode layer are patterned to form the dummy gate stacks420A and420B. As shown inFIG.5B, the portions of the semiconductor protruding structures101B1-101B3that are not covered by the dummy gate stacks420A and420B are partially removed, in accordance with some embodiments. One of more etching processes may be used to recess the semiconductor protruding structures101B1-101B3. As shown inFIG.5B, the dielectric structure114B1-114B2are substantially not etched by the etchant used for recessing the semiconductor protruding structures101B1-101B3. As shown inFIG.5C, epitaxial structures502are formed over the semiconductor protruding structures101B1-101B3, in accordance with some embodiments. In some embodiments, the epitaxial structures502function as source/drain structures. In some embodiments, the epitaxial structures502are p-type semiconductor structures. For example, the epitaxial structures502may include epitaxially grown silicon germanium or silicon germanium doped with boron. It should be appreciated, however, that the epitaxial structures502are not limited to being p-type semiconductor structures. In some embodiments, the epitaxial structures502are n-type semiconductor structures. The epitaxial structures502may include epitaxially grown silicon, epitaxially grown silicon carbide (SiC), epitaxially grown silicon phosphide (SiP), or another suitable epitaxially grown semiconductor material. Alternatively, some of the epitaxial structures502is p-type semiconductor structures while others are n-type semiconductor structures. In some embodiments, the epitaxial structures502are formed by using a selective epitaxial growth (SEG) process, a CVD process (e.g., a vapor-phase epitaxy (VPE) process, a low pressure chemical vapor deposition (LPCVD) process, and/or an ultra-high vacuum CVD (UHV-CVD) process), a molecular beam epitaxy process, one or more other applicable processes, or a combination thereof. In some embodiments, the epitaxial structures502are doped with one or more suitable dopants. For example, the epitaxial structures502are SiGe source/drain features doped with boron (B), indium (In), or another suitable dopant. Alternatively, in some other embodiments, the epitaxial structures502are Si source/drain features doped with phosphor (P), antimony (Sb), or another suitable dopant. In some embodiments, the epitaxial structures502are doped in-situ during their epitaxial growth. In some other embodiments, the epitaxial structures502are not doped during the growth of the epitaxial structures502. Instead, after the formation of the epitaxial structures502, the epitaxial structures502are doped in a subsequent process. In some embodiments, the doping is achieved by using an ion implantation process, a plasma immersion ion implantation process, a gas and/or solid source diffusion process, one or more other applicable processes, or a combination thereof. In some embodiments, the epitaxial structures502are further exposed to one or more annealing processes to activate the dopants. For example, a rapid thermal annealing process is used. The dielectric structures114B1-114B2may be used to prevent the neighboring epitaxial structures502from being merged together. In some embodiments, the epitaxial structures502are separated from each other by the dielectric structures114B1-114B2. In some embodiments, each of the dielectric structures114B1-114B2is in direct contact with one or two of the epitaxial structures502, as shown inFIG.5C. As shown inFIG.5D, a dielectric layer504is formed to cover the epitaxial structures502and the dielectric structures114B1-114B2, in accordance with some embodiments. The dielectric layer504further laterally surrounds the dummy gate stacks420A and420B. The dielectric layer504may be made of or include silicon oxide, silicon oxynitride, borosilicate glass (BSG), phosphoric silicate glass (PSG), borophosphosilicate glass (BPSG), fluorinated silicate glass (FSG), low-k material, porous dielectric material, one or more other suitable materials, or a combination thereof. In some embodiments, a dielectric material layer is deposited using an FCVD process, a CVD process, an ALD process, one or more other applicable processes, or a combination thereof. Afterwards, a planarization process is used to partially remove the dielectric material layer. As a result, the remaining portions of the dielectric material layer form the dielectric layer504. The planarization process may include a CMP process, a grinding process, an etching process, a dry polishing process, one or more other applicable processes, or a combination thereof. In some embodiments, the mask layers122and124are removed during the planarization process. In some embodiments, after the planarization process, the top surfaces of the dielectric layer504, and the dummy gate electrodes418are substantially level with each other. Afterwards, the dummy gate stack420A is replaced with a metal gate stack430A, as shown inFIG.4Cin accordance with some embodiments. One or more etching processes may be used to remove the dummy gate stack420A. As a result, a trench that exposes the semiconductor protruding structures101B1-101B3and the dielectric structures114B1-114B2is formed. Afterwards, the metal gate stack430A is formed in the trench to wrap around the semiconductor protruding structures101B1-101B3and the dielectric structures114B1-114B2, as shown inFIG.4C. The metal gate stack430A may include multiple metal gate stack layers. The metal gate stack430A may include a gate dielectric layer426and a metal gate electrode428. The metal gate electrode428may include a work function adjusting layer and a conductive filling layer. In some embodiments, the formation of the metal gate stack430A involves the deposition of multiple metal gate stack layers over the dielectric layer504to fill the trenches formed after the removal of the dummy gate stacks. In some embodiments, the gate dielectric layer426is made of or includes a dielectric material with high dielectric constant (high-K). The gate dielectric layer426may be made of or include hafnium oxide, zirconium oxide, aluminum oxide, hafnium dioxide-alumina alloy, hafnium silicon oxide, hafnium silicon oxynitride, hafnium tantalum oxide, hafnium titanium oxide, hafnium zirconium oxide, one or more other suitable high-K materials, or a combination thereof. The gate dielectric layer426may be deposited using an ALD process, a CVD process, one or more other applicable processes, or a combination thereof. In some embodiments, before the formation of the gate dielectric layer426, an interfacial layer is formed on the surfaces of the semiconductor protruding structures101B1-101B3. The interfacial layers are very thin and are made of, for example, silicon oxide or germanium oxide. In some embodiments, the interfacial layers are formed by applying an oxidizing agent on the surfaces of the semiconductor protruding structures101B1-101B3. For example, a hydrogen peroxide-containing liquid may be applied or provided on the surfaces of the semiconductor protruding structures101B1-101B3so as to form the interfacial layers. The work function adjusting layer may be used to provide the desired work function for transistors to enhance device performance including improved threshold voltage. In some embodiments, the work function adjusting layer is used for forming an NMOS device. The work function adjusting layer is an n-type work function adjusting layer. The n-type work function adjusting layer is capable of providing a work function value suitable for the device, such as equal to or less than about 4.5 eV. The n-type work function adjusting layer may include metal, metal carbide, metal nitride, or a combination thereof. For example, the n-type work function adjusting layer includes titanium nitride, tantalum, tantalum nitride, one or more other suitable materials, or a combination thereof. In some embodiments, the n-type work function is an aluminum-containing layer. The aluminum-containing layer may be made of or include TiAlC, TiAlO, TiAlN, one or more other suitable materials, or a combination thereof. The work function adjusting layer may also be made of or include hafnium, zirconium, titanium, tantalum, aluminum, metal carbides (e.g., hafnium carbide, zirconium carbide, titanium carbide, aluminum carbide), aluminides, ruthenium, palladium, platinum, cobalt, nickel, conductive metal oxides, or a combinations thereof. The thickness and/or the compositions of the work function adjusting layer may be fine-tuned to adjust the work function level. The work function adjusting layer may be deposited over the gate dielectric layer426using an ALD process, a CVD process, a PVD process, an electroplating process, an electroless plating process, one or more other applicable processes, or a combination thereof. In some embodiments, a barrier layer is formed before the work function adjusting layer to interface the gate dielectric layer426with the subsequently formed work function adjusting layer. The barrier layer may also be used to prevent diffusion between the gate dielectric layer426and the subsequently formed work function adjusting layer. The barrier layer may be made of or include a metal-containing material. The metal-containing material may include titanium nitride, tantalum nitride, one or more other suitable materials, or a combination thereof. The barrier layer may be deposited using an ALD process, a CVD process, a PVD process, an electroplating process, an electroless plating process, one or more other applicable processes, or a combination thereof. In some embodiments, the conductive filling layer is made of or includes a metal material. The metal material may include tungsten, aluminum, copper, cobalt, one or more other suitable materials, or a combination thereof. A conductive layer used for forming the conductive filling layer may be deposited over the work function adjusting layer using a CVD process, an ALD process, a PVD process, an electroplating process, an electroless plating process, a spin coating process, one or more other applicable processes, or a combination thereof. In some embodiments, a blocking layer is formed over the work function adjusting layer before the formation of the conductive layer used for forming the conductive filling layer. The blocking layer may be used to prevent the subsequently formed conductive layer from diffusing or penetrating into the work function adjusting layer. The blocking layer may be made of or include tantalum nitride, titanium nitride, one or more other suitable materials, or a combination thereof. The blocking layer may be deposited using an ALD process, a PVD process, an electroplating process, an electroless plating process, one or more other applicable processes, or a combination thereof. Afterwards, a planarization process is performed to remove the portions of the metal gate stack layers outside of the trenches, in accordance with some embodiments. As a result, the remaining portions of the metal gate stack layers form the metal gate stack430A, as shown inFIG.4C. In some embodiments, the protective elements are completely consumed after the recessing of the insulating layer104. However, embodiments of the disclosure are not limited thereto. Many variations and/or modifications can be made to embodiments of the disclosure.FIG.6is a cross-sectional view of a portion of a semiconductor device structure, in accordance with some embodiments. In some embodiments, the protective elements P3and P3′ partially remain on the topmost surfaces of the dielectric structures114A and114B without being completely consumed during the recessing of the insulating layer104, as shown inFIG.6. In some embodiments, each of the protective elements P3and P3′ becomes thinner after the recessing of the insulating layer104. In some embodiments, the edge of each of the protective elements P3and P3′ is substantially aligned with the edge of the dielectric structure114A (or114B) thereunder, as shown inFIG.6. Many variations and/or modifications can be made to embodiments of the disclosure.FIG.7is a cross-sectional view of a portion of a semiconductor device structure, in accordance with some embodiments. In some embodiments, a structure similar to the structure shown inFIG.4Cis formed. Similar to the embodiments illustrated inFIG.6, the protective elements P3′ remain without being completely consumed. In some embodiments, each of the protective elements P3′ is between the metal gate stack430A and the respective dielectric structure114B1(or114B2), as shown inFIG.7. Many variations and/or modifications can be made to embodiments of the disclosure.FIG.8is a cross-sectional view of a portion of a semiconductor device structure, in accordance with some embodiments. In some embodiments, a structure similar to the structure shown inFIG.5Dis formed. Similar to the embodiments illustrated inFIG.6, the protective elements P3′ remain without being completely consumed. In some embodiments, each of the protective elements P3′ is between the dielectric layer504and the respective dielectric structure114B1(or114B2), as shown inFIG.8. In some embodiments, the protective element P3′ is partially covered by the metal gate stack430A and partially covered by the dielectric layer504, as shown inFIGS.7and8. Embodiments of the disclosure form a semiconductor device structure with multiple semiconductor protruding structures and dielectric structures. The dielectric structures are formed between the semiconductor protruding structures to prevent some neighboring epitaxial structures from being merged together. During the formation of the dielectric structures, selectively deposited protective elements are formed to protect the dielectric structures thereunder. Due to the protection of the protective elements, the profiles and dimensions of the dielectric structures may be substantially maintained during the subsequent etching processes. Undesired merging between nearby epitaxial structures is significantly prevented. The reliability and performance of the semiconductor device structure are thus ensured. In accordance with some embodiments, a method for forming a semiconductor device structure is provided. The method includes forming a semiconductor protruding structure over a substrate and forming an insulating layer along sidewalls and a top of the semiconductor protruding structure. The method also includes forming a dielectric layer over the insulating layer and planarizing the dielectric layer and the insulating layer to expose the top of the semiconductor protruding structure. A remaining portion of the dielectric layer forms a dielectric structure. The method further includes forming a protective element to cover a top of the dielectric structure. In addition, the method includes recessing the insulating layer after the protective element is formed such that the semiconductor protruding structure and the dielectric structure protrude from a top surface of a remaining portion of the insulating layer. In accordance with some embodiments, a method for forming a semiconductor device structure is provided. The method includes forming a semiconductor protruding structure over a substrate and surrounding the semiconductor protruding structure with an insulating layer. The method also includes forming a dielectric layer over the insulating layer. The method further includes partially removing the dielectric layer and insulating layer using a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric layer are substantially level with each other. In addition, the method includes forming a protective layer to cover the topmost surfaces of the dielectric layer. The method includes recessing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and a portion of the dielectric layer protrude from a top surface of a remaining portion of the insulating layer. In accordance with some embodiments, a method for forming a semiconductor device structure is provided. The method includes forming a semiconductor protruding structure over a substrate and forming an insulating layer along sidewalls of the semiconductor protruding structure. The method also includes forming a dielectric structure over the substrate and performing a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric structure are substantially level with each other. The method further includes forming a protective layer to cover the topmost surface of the dielectric structure. In addition, the method includes partially removing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and the dielectric structure protrude from a top surface of a remaining portion of the insulating layer. The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure. | 52,325 |
11942330 | Several of the figures are included as schematics. It is to be understood that the figures are for illustrative purposes, and are not to be considered of scale unless specifically stated to be of scale. Additionally, as schematics, the figures are provided to aid comprehension and may not include all aspects or information compared to realistic representations, and may include exaggerated material for illustrative purposes. In the appended figures, similar components and/or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label by a letter that distinguishes among the similar components. If only the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the letter. DETAILED DESCRIPTION Micro-LED displays possess potential advantages such as high contrast, fast response, and relatively wide color gamut, low power consumption, and long lifetime. The prospects of a wide range of applications of micro-LEDs have attracted a large number of manufacturers, startups, and academic researchers to establish programs in the field. However, new technical challenges arise with shrinking chip size coupled with expanded chip density. Key challenges arise from epitaxy and micro-chip processes. Reduction in the size of micro-LEDs and spacing between devices can cause problems in chip processing and deteriorate LED performance. Gallium oxide, with a wide bandgap of 4.8 eV capable of operating at much higher temperatures and powers than conventional small-bandgap silicon-based chips, has received attention as an exciting candidate for the active layer of future semiconducting devices. As such, gallium oxide is currently being developed for optical devices, such as transparent epitaxial layer on gallium nitride (GaN)-based LEDs. One important problem is the degradation of the quantum efficiency and homogeneity due to a sidewall effect, which may be caused by a high density of surface defects formed during device processing, leading to degraded electrical injection in the p-GaN. Defects at structure edges may be related to gallium oxide formed onto the GaN, where the gallium oxide then needs to be removed resulting in pitting on the surface of the GaN. Acting as non-radiative centers, the surface defects significantly degrade the internal quantum efficiency of the micro-LEDs. In an example, a decrease in maximum external quantum efficiency (EQE) from ˜10% to ˜5% with reduction in chip size from above 500 μm×500 μm to 10 μm×10 μm has been reported for micro-LEDs. Known methods for etching gallium oxide include wet etching, reactive-ion etching (REI), inductively coupled plasma (ICP), and activated Cl etching with Cl2, BCl3, SF6, and the like. However, these methods are disadvantageous as they provide less selectivity of gallium oxide relative to gallium nitride thus leading to defects on gallium nitride. Many conventional technologies utilize a wet etch or a plasma etch for etching gallium oxide. However, these methods include disadvantages such as having less selectivity of gallium oxide relative to gallium nitride thus leading to defects on gallium nitride. While wet etching may be more robust than other etching techniques, the wet etching may etch the placeholder or substrate materials further than necessary or desired. For example, the wet etching may over etch some features. Using wet etchants may also create the need for subsequent operations to remove residues formed within the trenches or holes. Plasma etching techniques also are disadvantageous in that exposure to plasma effluents may damage the surface of underlying materials. The present technology overcomes these issues by performing a dry etch process to etch gallium oxide. This may include selectively etching gallium oxide relative to gallium nitride without damaging the gallium nitride surface. By using particular reagents or reagent combinations/sequences in a plasma free processing region environment, exposed surfaces of gallium nitride may be undamaged during the etch process to remove gallium oxide. In this way, the etching operations to be performed may not remove or may only minimally remove underlying structure materials, such as gallium nitride. Although the remaining disclosure will routinely identify specific etching processes utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to a variety of other deposition and cleaning processes as may occur in the described chambers. Accordingly, the technology should not be considered to be so limited as for use with the described treatment and cleaning processes alone. Moreover, although an exemplary chamber is described to provide foundation for the present technology, it is to be understood that the present technology can be applied to virtually any semiconductor processing chamber that may allow the single-chamber operations described. FIG.1illustrates a cross-sectional schematic view of an exemplary plasma processing chamber100, shown configured as an etch chamber, having a substrate support assembly101. The substrate support assembly101may be utilized in other types of plasma processing chambers, for example plasma treatment chambers, annealing chambers, physical vapor deposition chambers, chemical vapor deposition chambers, and ion implantation chambers, among others, as well as other systems that may uniformly maintain a surface or substrate, such as a substrate124, at a particular temperature. In some embodiments chamber100may be configured for cryogenic processing, although any other processing conditions may similarly be encompassed. Reactive ion etching a substrate maintained at a cryogenic temperature may improve anisotropic aspects of the etch process as explained above, for example. The plasma processing chamber100may include a chamber body102having sidewalls104, a base106, and a lid108that may enclose a processing region110. An injection apparatus112may be coupled with the sidewalls104and/or lid108of the chamber body102. A gas panel114may be fluidly coupled with the injection apparatus112to allow process gases to be provided into the processing region110. The injection apparatus112may be one or more nozzle or inlet ports, or alternatively a showerhead. Process gases, along with any processing by-products, may be removed from the processing region110through an exhaust port116formed in the sidewalls104or base106of the chamber body102. The exhaust port116may be coupled with a pumping system140, which may include throttle valves, pumps, or other materials utilized to control the vacuum levels within the processing region110. The process gases may be energized to form a plasma within the processing region110. For example, the process gases may be energized by capacitively or inductively coupling RF power to the process gases. In the embodiment depicted in the figure, a plurality of coils118for inductively coupled plasma generation may be disposed above the lid108of the plasma processing chamber100and may be coupled through a matching circuit120to an RF power source122. In some embodiments, the processing region110is maintained plasma free. The substrate support assembly101may be disposed in the processing region110below the injection apparatus112. The substrate support assembly101may include an electrostatic chuck103and a base assembly105. The base assembly may be coupled with the electrostatic chuck103and a facility plate107. The facility plate107may be supported by a ground plate111, and may be configured to facilitate electrical, cooling, heating, and gas connections with the substrate support assembly101. The ground plate111may be supported by the base106of the processing chamber, although in some embodiments the assembly may couple with a shaft that may be vertically translatable within the processing region of the chamber. An insulator plate109may insulate the facility plate107from the ground plate111, and may provide thermal and/or electrical insulation between the components. The base assembly105may include or define a refrigerant channel coupled with a fluid delivery system117. In some embodiments, fluid delivery system117may be a cryogenic chiller, although the present technology is not limited to cryogenic applications as will be explained further below. The fluid delivery system117may be in fluid communication with the refrigerant channel via a refrigerant inlet conduit123connected to an inlet of the refrigerant channel and via a refrigerant outlet conduit125connected to an outlet of the refrigerant channel such that the base assembly105may be maintained at a predetermined temperature, such as a first temperature. In some embodiments, the fluid delivery system117may be coupled with an interface box to control a flow rate of the refrigerant. The refrigerant may include a material that can maintain any temperature, including a cryogenic temperature, that may be below or about 0° C., below or about −50° C., below or about −80° C., below or about −100° C., below or about −125° C., below or about −150° C., or lower. Again, it is to be understood that other substrate supports encompassed by the present technology may be configured to operate at a variety of other processing temperatures as well, including above or about 0° C., greater than or about 100° C., greater than or about 250° C., greater than or about 400° C., or greater. The fluid delivery system117may provide the refrigerant, which may be circulated through the refrigerant channel of the base assembly105. The refrigerant flowing through the refrigerant channel may enable the base assembly105to be maintained at the processing temperature, which may assist in controlling the lateral temperature profile of the electrostatic chuck103so that a substrate124disposed on the electrostatic chuck103may be uniformly maintained at a cryogenic processing temperature. The facility plate107may include or define a coolant channel coupled with a chiller119. The chiller119may be in fluid communication with the coolant channel via a coolant inlet conduit127connected to an inlet of the coolant channel and via a coolant outlet conduit129connected to an outlet of the coolant channel such that the facility plate107may be maintained at a second temperature, which in some embodiments may be greater than the first temperature. In some embodiments, a single, common chiller may be used for fluid delivery to both the base assembly and the facility plate. Consequently, in some embodiments fluid delivery system117and chiller119may be a single chiller or fluid delivery system. In some embodiments, the chiller119may be coupled with an interface box to control a flow rate of the coolant. The coolant may include a material that can maintain temperatures greater than or about 0° C., and may maintain temperatures greater than or about 20° C., greater than or about 30° C., greater than or about 40° C., greater than or about 50° C., or greater. In some embodiments, alternative heating mechanisms may be employed including resistive heaters, which may be distributed in the facility plate, the electrostatic chuck, or the base assembly. In some embodiments the facility plate may not include heating components. The chiller119may provide the coolant, which may be circulated through the coolant channel of the facility plate107. The coolant flowing through the coolant channel may enable the facility plate107to be maintained at a predetermined temperature, which may assist in maintaining the insulator plate109at a temperature above the first temperature, for example. The electrostatic chuck103may include a support surface on which a substrate124may be disposed, and may also include a bottom surface132opposite the support surface. In some embodiments, the electrostatic chuck103may be or include a ceramic material, such as aluminum oxide, aluminum nitride, or other suitable materials. Additionally, the electrostatic chuck103may be or include a polymer, such as polyimide, polyetheretherketone, polyaryletherketone, or any other polymer which may operate as an electrostatic chuck within the processing chamber. The electrostatic chuck103may include a chucking electrode126incorporated within the chuck body. The chucking electrode126may be configured as a monopole or bipolar electrode, or any other suitable arrangement for electrostatically clamping a substrate. The chucking electrode126may be coupled through an RF filter to a chucking power source134, which may provide a DC power to electrostatically secure the substrate124to the support surface of the electrostatic chuck103. The RF filter may prevent RF power utilized to form a plasma within the plasma processing chamber100from damaging electrical equipment or presenting an electrical hazard outside the chamber. In some embodiments, the processing region110is maintained plasma free. The electrostatic chuck103may include one or more resistive heaters128incorporated within the chuck body. The resistive heaters128may be utilized to elevate the temperature of the electrostatic chuck103to a processing temperature suitable for processing a substrate124disposed on the support surface. The resistive heaters128may be coupled through the facility plate107to a heater power source136. The heater power source136may provide power, which may be several hundred watts or more, to the resistive heaters128. The heater power source136may include a controller utilized to control the operation of the heater power source136, which may generally be set to heat the substrate124to a predetermined processing temperature. In some embodiments, the resistive heaters128may include a plurality of laterally separated heating zones, and the controller may enable at least one zone of the resistive heaters128to be preferentially heated relative to the resistive heaters128located in one or more of the other zones. For example, the resistive heaters128may be arranged concentrically in a plurality of separated heating zones. The resistive heaters128may maintain the substrate124at a processing temperature suitable for processing. The substrate support assembly101may include one or more probes disposed therein. In some embodiments, one or more low temperature optical probe assemblies may be coupled with a probe controller138. Temperature probes may be disposed in the electrostatic chuck103to determine the temperature of various regions of the electrostatic chuck103. In some embodiments, each probe may correspond to a zone of the plurality of laterally separated heating zones of the resistive heaters128. The probes may measure the temperature of each zone of the electrostatic chuck103. The probe controller138may be coupled with the heater power source136so that each zone of the resistive heaters128may be independently heated. This may allow the lateral temperature profile of the electrostatic chuck103to be maintained substantially uniform based on temperature measurements, which may allow a substrate124disposed on the electrostatic chuck103to be uniformly maintained at the processing temperature. The chambers discussed previously may be used in performing exemplary methods including selective etching methods. Turning toFIG.2is shown exemplary operations in a method200according to some embodiments of the present technology. Prior to the first operation of the method, a substrate may be processed in one or more ways before being placed within a processing region of a chamber in which method200may be performed. For example, features may be produced, and vias or trenches may be formed or defined within the substrate. The vias or trenches may have an aspect ratio, or a ratio of their height to width, greater than or about 2, greater than or about 5, greater than or about 10, greater than or about 20, greater than or about 30, greater than or about 50, or more in embodiments. Although the remaining disclosure will discuss gallium oxide and gallium nitride, any other known materials used in these two layers may be substituted for one or more of the layers. Some or all of these operations may be performed in chambers or system tools as previously described, or may be performed in different chambers on the same system tool, which may include the chamber in which the operations of methods described herein are performed. The method200may include flowing a reagent in a substrate processing region housing the semiconductor substrate. The reagent may include at least one of chloride and bromide. The semiconductor substrate may include an exposed region of gallium oxide. An exemplary chamber may be chamber100previously described. The reagent may be flowed to a processing region of the chamber at operation205. In some embodiments, the reagent may interact with the substrate in the processing region based on thermal activation, and in some embodiments no plasma activation may occur. The substrate may include any number of layers of material including oxides, nitrides, or any other materials. In some embodiments a layer of gallium oxide may be formed overlying a layer of gallium nitride, and one or both layers may be exposed. The etching process to remove gallium oxide may have relatively high selectivity to gallium nitride, such as selectivities greater than or about 10:1 or more. However, in some structures, the amount of gallium oxide to be removed may be several nanometers up to a fraction of a micrometer or more. For example, in some embodiments the amount of gallium oxide to be recessed may be tens of nanometers up to hundreds of nanometers. Such an amount of material to be etched may occur over a relatively longer etching time period or over repeated cycles. The selectivity to gallium nitride of the oxide removal process may operate in part based on an oxide affinity to the reagent, creating volatile materials that will remove the gallium oxide material. Contacting an exposed region of gallium oxide with at least one of chlorine and bromine from the reagent may form a gallium-containing gas at operation215, along with a removal of oxygen into the reagent donating the chlorine or bromine. This process may include a purge cycle at operation225in which the volatiles are released to provide for more etch control. The gallium-containing gas formed is highly volatile and may be removed from the processing region by purging the processing region with an inert gas at operation225. Any exposed surfaces of gallium nitride may not be affected, or may be minimally affected by the gallium-containing gas, while the gallium oxide may be etched isotropically. Additionally, by utilizing particular chloride-containing or bromide-containing reagents, etching of the gallium oxide may be achieved and controlled to an etch thickness of less than or about 30 Å per cycle, and may be controlled to less than or about 20 Å per cycle, less than or about 10 Å per cycle, less than or about 5 Å per cycle, less than or about 1 Å per cycle, less than or about 0.5 Å per cycle, less than or about 0.1 Å per cycle, or less. In some embodiments, the cycle is repeated for at least two cycles to achieve a desired etch depth. The etching process may be continued for a first period of time in some embodiments. Subsequent the first period of time, the flow of the chloride-containing reagent or the bromide-containing reagent may be halted. The extent of the interaction of the reagent with the gallium oxide at operation215may be controlled by halting the flow of the chloride-containing reagent or the bromide-containing reagent at operation205after the first period of time. The extent of the interaction of the reagent with the gallium oxide may further be controlled by optionally purging the substrate processing region with the inert gas for a second period of time. The optional purge may be performed at operation225, which may remove residual etchant materials, etch byproducts, or other materials from the chamber in addition to the removal of the gallium-containing gas formed upon operation215. The purge may be performed with any number of materials that may be chemically inert, such as nitrogen or noble gases such as helium and/or argon, which may be used to purge the processing region of the chamber. The purging process may improve etch selectivity by expediting removal of byproducts as well as the volatile chloride-containing reagent or the bromide-containing reagent, and reduce the residence time of these materials within the processing region. This may facilitate the isotropic etching of the gallium oxide while reducing exposure and impact on gallium nitride, for example. The first period of time may be sufficient to produce etching of gallium oxide, while limiting residence time that may begin to affect nitride surfaces. For example, in some embodiments the first period of time may be greater than or about 5 seconds, and may be greater than or about 10 seconds, greater than or about 15 seconds, greater than or about 20 seconds, greater than or about 25 seconds, greater than or about 30 seconds, greater than or about 35 seconds, greater than or about 40 seconds, greater than or about 45 seconds, greater than or about 50 seconds, greater than or about 55 seconds, greater than or about 60 seconds, greater than or about 2 minutes, or longer. However, to limit additional effects, in some embodiments the first period of time may be less than or about 5 minutes, less than or about 4 minutes, less than or about 3 minutes, less than or about 2 minutes, or less. The second period of time related to optional purging may be sufficient to halt etching of gallium oxide. For example, in some embodiments the second period of time may be greater than or about 5 seconds, and may be greater than or about 10 seconds, greater than or about 15 seconds, greater than or about 20 seconds, greater than or about 25 seconds, greater than or about 30 seconds, or longer. Additionally, any or all operations may be maintained plasma free. In some embodiments, only thermal etching reagents were used to etch gallium oxide. Chloride-containing reagents or the bromide-containing reagents used in the present technology may include at least one of titanium tetrachloride (TiCl4), titanium tetrabromide (TiBr4), silicon tetrachloride (SiCl4), silicon tetrabromide (SiBr4), vanadium(V) chloride (VCl5), niobium pentachloride (NbCl5), antalum pentachloride (TaCl5), tungsten(V) chloride (WCl5), molybdenum(V) chloride (MoCl5), zirconium tetrachloride (ZrCl4), molybdenum oxytetrachloride (MoOCl4), tungsten(VI) oxytetrachloride (WOCl4), or combinations thereof. An exemplary chloride-containing reagent may be titanium tetrachloride, which may be flowed into the processing region. Other sources of chloride or bromide may be used in conjunction with or as replacements for the titanium tetrachloride. A flow rate of the chloride-containing reagents or the bromide-containing reagents may be maintained between at least about 1 sccm and about 100 sccm in some embodiments. Without being bound by any particular theory, it is believed that the chloride-containing reagent acts to transfer the chloride, or bromide for a bromine-containing reagent, to the gallium of the etch target gallium oxide. Likewise the chloride-containing reagent acts to receive the oxygen of the etch target gallium oxide. For example, employing titanium tetrachloride as the chloride-containing reagent in the method200, the chloride of titanium tetrachloride is transferred to the gallium of gallium oxide, and the oxygen of gallium oxide is transferred to the titanium chloride structure. In this example, the mechanism reaction may be driven by the strong bonding energy between Ti and O and by the high volatility of the gallium chloride gas that is formed at operation215. Based upon the bonding energies of the components, such as bonding energies among Ti—Cl, Ti—O, Ti—N, Ga—O, and Ga—N, a high selectivity of etching gallium oxide may be achieved relative to gallium nitride, which may have less favorable bonding or transfer. Method200is a thermal process that is mild as compared with a process including radical chlorine such as with plasma processes, for example, and thus advantageously leads to less damage to the surface of the underlying gallium nitride. For example, the plasma enhanced chlorine may more readily interact with gallium nitride, while the thermally transferred chlorine may more readily displace oxygen. Process conditions may also impact the operations performed in method200. Each of the operations of method200may be performed during a constant temperature in embodiments, while in some embodiments the temperature may be adjusted during different operations. For example, the substrate, pedestal, or chamber temperature during the oxide etching may be maintained at a temperature greater than or about 150° C., and in some embodiments the temperature may be maintained greater than or about 200° C., greater than or about 250° C., greater than or about 300° C., greater than or about 350° C., greater than or about 400° C., greater than or about 450° C., greater than or about 500° C., greater than or about 550° C., greater than or about 600° C., greater than or about 650° C., or higher. However, at higher temperatures, further dissociation of the chloride-containing reagents or the bromide-containing reagents may occur, which may produce further etching. As the amount of etchant increases, nitride may begin to etch more readily. Accordingly, in some embodiments the temperature may be maintained below or about 700° C., and may be maintained below or about 650° C., below or about 600° C., below or about 550° C., below or about 500° C., or less. In some embodiments, the temperature in the processing region according to method200is maintained between about 150° C. and about 650° C. In some embodiments, the process may occur at a variety of pressures, which may facilitate operations in any of a number of process chambers. For example, the process may be performed within chambers capable of providing pressures below or about 10 mTorr, or lower, such as with a turbomolecular pump. Additionally, the pressure within the chamber may be maintained at higher pressures, which may increase the associated etch rate, and the pressure within the processing chamber may be maintained at greater than or about 1 Torr, and may be maintained at greater than or about 2 Torr, greater than or about 5 Torr, greater than or about 10 Torr, greater than or about 50 Torr, greater than or about 100 Torr, greater than or about 200 Torr, or higher. By performing an amount of etch followed by an amount of purge, a controlled isotropic etch of gallium oxide may be performed. To further facilitate etching, the present technology may be performed in a number of cycles to refresh the gallium nitride, which may be underlying the gallium oxide, and which may allow the removal of etch byproducts, and facilitate delivery of etchants into the lateral recesses of the gallium oxide. In some embodiments the process, including the optional purge, may be performed in greater than or about 2, greater than or about 3, greater than or about 4, greater than or about 5, greater than or about 10 cycles, greater than or about 20 cycles, greater than or about 50 cycles, greater than or about 100 cycles, greater than or about 200 cycles, or more cycles, depending on factors such as the extent of gallium oxide etching to be performed, or other effects of the process. A benefit of performing additional cycles may include to mitigate the effect that the gallium nitride may eventually react to the process for removing gallium oxide after an incubation period or contact period in which the chloride-containing reagent or bromide-containing reagent may begin to interact with and extend into the nitride structure. However, although the chloride-containing reagent or bromide-containing reagent may only minimally interact with the gallium nitride, the reagents may contact any exposed surfaces of the layers of gallium nitride. By performing a purge as described above, the reacted gallium halide gas formed by contacting the gallium oxide with the reagent may then be efficiently expelled from the chamber. This may, at least to an extent, refresh the incubation period, and may increase the overall selectivity of the gallium oxide etch process relative to gallium nitride by removing residual etchant from the gallium nitride with each cycle. By performing the processes as described above, an etch selectivity of gallium oxide relative to gallium nitride may be maintained at greater than or about 10:1, and may produce selectivity of greater than or about 15:1, greater than or about 20:1, greater than or about 30:1, greater than or about 50:1, greater than or about 70:1, greater than or about 100:1, greater than or about 200:1, greater than or about 300:1, greater than or about 400:1, greater than or about 500:1, or higher. Turning toFIGS.3A-3Dare shown cross-sectional views of structure300being processed according to some embodiments of the present technology. The structure may illustrate layers incorporated in a semiconductor structure, which may include any number of layers or exposed materials. For example, the structure may include gallium oxide315overlying a substrate305, which may include an exposed region of gallium nitride310as shown inFIG.3A. InFIG.3Bis illustrated a structure after methods according to the present technology have begun to be performed, such as discussed with respect toFIG.2above. A chloride-containing reagent or bromide-containing reagent325is flowed to contact gallium oxide315. The chloride-containing reagent or bromide-containing reagent may be delivered to the substrate processing region (such as region110ofFIG.1), where the reagent may interact with the exposed gallium oxide material315. As described above, etching gallium oxide according to embodiments of the present technology may provide a transfer mechanism between the reagent and the gallium oxide to form products335, which may include multiple volatile materials. Products335may include a gallium halide gas as well as an oxygen-incorporated metal-containing gas, such as titanium chloride that may have accepted an oxygen atom. The metal-containing etchant may still be a gas, and the substituted metal-containing etchant including oxygen and the volatile gallium halide may all be purged from the chamber. FIG.3Dillustrates a structure after further methods or operations according to the present technology have been performed, such as discussed with respect toFIG.2above. For example, as the etch process continues, the processing region is purged and the products335are removed to provide a substrate305free of gallium oxide315, while having minimal or no etching of exposed gallium nitride310. By utilizing reagents as discussed throughout the present technology, gallium oxide may be etched from the substrate or gallium nitride, while limiting the damage or removal of gallium nitride. As discussed above, the chambers discussed previously may be used in performing exemplary methods including selective etching methods. Turning toFIG.4is shown exemplary operations in a method400according to some embodiments of the present technology. Prior to the first operation of the method, a substrate may be processed in one or more ways before being placed within a processing region of a chamber in which method400may be performed similarly as discussed above from method200. Some or all of these operations may be performed in chambers or system tools as previously described, or may be performed in different chambers on the same system tool, which may include the chamber in which the operations of methods described herein are performed. The method400may include flowing a first reagent in a substrate processing region housing the semiconductor substrate. The first reagent may include HX or MeX, wherein X is at least one of fluorine, chlorine, and bromine, including greater than or about 1, 2, 3, 4, 5, or six coupled fluorine atoms. Exemplary metals for the Me may be or include titanium, niobium, tantalum, molybdenum, tungsten, or sulfur, which may also include a bonded oxygen, such as with thionyl bromide or thionyl chloride. The semiconductor substrate may include an exposed region of gallium oxide. The exposed region of gallium oxide may be incorporated on a substrate with an exposed region of gallium nitride, or may be overlying a region of gallium nitride. An exemplary chamber may be chamber100previously described. The first reagent may be flowed to a processing region of the chamber at operation405. Method400may be an atomic layer etch process, which includes sequential, self-limiting surface reactions to remove thin films of gallium oxide bromide-containing with atomic layer control. Method400may include a pulsed delivery of the first reagent and/or a pulsed delivery of a second reagent sequentially. In some embodiments, at least one of flowing the first reagent and flowing the second reagent includes pulsing operations that may occur for less than or about 5 seconds, and may occur for less than or about 4 seconds, less than or about 3 seconds, less than or about 2 seconds, or less. Method400may provide a fluorination and ligand-exchange reaction. As compared with the method200, which may include forming a gallium chloride gas, for example, the method400may form gallium fluoride that can be on the order of one hundred times less volatile than gallium chloride gas. In some embodiments, the first reagent of method400may interact with the substrate in the processing region to produce a fluorinated gallium and water vapor. The etching method400to remove gallium oxide may have relatively high selectivity to gallium nitride, such as selectivities greater than or about 10:1 or more. However, in some structures, the amount of gallium oxide to be removed may be several nanometers up to a fraction of a micrometer or more. For example, in some embodiments the amount of gallium oxide to be recessed may be tens of nanometers up to hundreds of nanometers. Such an amount of material to be etched may occur with pulsed time periods optionally over repeated cycles. The selectivity during the oxide removal process may operate in part based on an oxide affinity to the first reagent, which activates an exposed region of the gallium oxide material to form gallium halide and water (H2O) at operation415. The etching process may be continued for a first pulsed period of time in some embodiments as noted above, and again the time may be controlled to limit or prevent any reaction with gallium nitride. Subsequent the first pulsed period of time, the first reagent flow may be halted. The extent of the interaction of the reagent with the gallium oxide at operation415may be controlled by pulsing the flow of the first reagent at operation405and optionally purging the processing region at operation420. The extent of the interaction of the first reagent with the gallium oxide may further be controlled by purging the substrate processing region with the inert gas for a second period of time. The purge may be performed with any number of materials that may be chemically inert, such as nitrogen or noble gases such as helium and/or argon, which may be used to purge the processing region of the chamber. Subsequent to flowing the first reagent, purging with an inert gas may act to remove the water. Subsequent the optional purge, a second reagent may be flowed into the processing region at operation425. The second reagent may operate to interact with the halogenated gallium to remove the halogenated gallium from residual gallium oxide. The transfer may also be performed thermally as described above at any of the temperature and/or pressure regimes noted previously. In one non-limiting example, trimethylamine may transfer one or more methyl groups to the halogenated gallium, which may produce a methylated byproduct that is volatile and may subsequently be purged from the chamber, such as (CH3)2GaF. The second reagent may have limited interaction with gallium oxide or gallium nitride, and thus the second interaction may be self-limiting, and may halt upon fully removing the portion of gallium oxide that has been halogenated from the first exposure operation. The second reagent may also be pulsed over any of the time periods as previously described. Some embodiments optionally include a purge cycle at operation430in which the methylated byproduct and residual reagent materials is removed from the chamber. Any exposed surfaces of gallium nitride may not be affected, or may be minimally affected by the first and second reagents, while the gallium oxide may be etched. Because the halide treatment, such as fluorination, may occur only at a surface of the gallium oxide, and the second reagent may have limited interaction beyond the halogenated region and may be self-limiting, improved control over the etch process may be provided as the treatment will self-terminate after converting and removing a top layer of the lattice. Accordingly, etching of the gallium oxide may be controlled to an etch thickness of less than or about 6 Å per cycle, and may be limited to a thickness of less than or about 5 Å per cycle, less than or about 4 Å per cycle, less than or about 3 Å per cycle, less than or about 2 Å per cycle, less than or about 1 Å per cycle, less than or about 0.5 Å per cycle, less than or about 0.2 Å per cycle, or less. In some embodiments, the cycle is repeated for at least two cycles to achieve a desired etch depth, and the process may be repeated for any number of cycles as noted above. Additionally, any or all operations may be maintained plasma free. In some embodiments, only thermal activation may be used to etch gallium oxide. As discussed above, the first reagent used in the present technology according to method400at operation405may include HX, wherein X is at least one of fluorine, chlorine, bromine, or combinations thereof Δn exemplary first reagent may be hydrofluoric acid (HF), or a metal fluoride as discussed above, which may be flowed into the processing region. Other sources of fluorine, chlorine, or bromine may be used in conjunction with or as replacements for the HF. The second reagent used in the present technology according to method400at operation425may include trimethyaluminum (TMA), trimethylgallium (TMG, Ga(CH3)3), aluminum chloride (AlCl3), tin tetrachloride (SnCl4), tin acetylacetonate (Sn(acac), Sn(CH3COCHCOCH3)2), tetramethylsilane (TMS, Si(CH3)4) and any other family member that may substitute one or more methyl moieties with chlorine and/or hydrogen, trimethyltin chloride ((CH3)3SnCl) and any family member that may substitute one or more additional moieties with chlorine, chlorine (Cl2), bromine (Br2), boron trichloride (BCl3), boron tribromide (BBr3), or combinations thereof. Although any of the precursors may be used, precursors containing a methyl group moiety may facilitate formation of a volatile byproduct of the previously halogenated gallium, while having limited or no interaction with gallium nitride. Other second reagents as described may be used in conjunction with or as replacements for the TMA. By performing an amount of etch followed by an amount of purge, a controlled isotropic etch of gallium oxide may be performed in method400. To further facilitate etching, the present technology may be performed in a number of cycles to refresh the gallium nitride, which may be underlying the gallium oxide or otherwise exposed on the substrate, to allow the removal of etch byproducts, and facilitate delivery of etchants into the lateral recesses of the gallium oxide. In some embodiments the process, including the optional purge, may be performed in greater than or about 2, greater than or about 3, greater than or about 4, greater than or about 5, greater than or about 10 cycles, greater than or about 20 cycles, greater than or about 50 cycles, greater than or about 100 cycles, greater than or about 200 cycles, or more cycles, depending on factors such as the extent of gallium oxide etching to be performed, or other effects of the process. A benefit of performing additional cycles may include to mitigate the effect that any underlying gallium nitride may eventually react to the process for removing gallium oxide. By performing the processes as described above, an etch selectivity of gallium oxide relative to gallium nitride may be maintained at greater than or about 10:1, and may produce selectivity of greater than or about 15:1, greater than or about 20:1, greater than or about 30:1, greater than or about 50:1, or higher. Turning toFIGS.5A-5Dare shown cross-sectional views of structure500being processed according to some embodiments of the present technology. The structure may include gallium oxide515as shown inFIG.5Ahaving surface515a. The gallium oxide515may also by overlying gallium nitride or another substrate material that may also include an exposed surface of gallium nitride as previously described. A first reagent525is flowed to contact gallium oxide515. The first reagent525may be delivered to the substrate processing region, such as region110ofFIG.1, where the reagent may interact with the exposed gallium oxide material515. InFIG.5Bis illustrated a structure after methods according to the present technology have begun to be performed, such as discussed with respect toFIG.4above. As described above, etching gallium oxide according to embodiments of the present technology may activate the surface515aof gallium oxide515to form products of the reaction with the first reagent in an activated layer535of the gallium oxide. Activated layer535may include gallium halide and water545, which may be a vapor and purged from the structure as shown inFIG.5B.FIG.5Cillustrates a structure wherein the second reagent is introduced to the activated layer535. The transfer of methyl groups, or other reagent components as noted above, from the second reagent555to the gallium halide of activated layer535may undergo a ligand exchange to form byproduct565, which may be GaY(CH3)2, Ga(CH3)3, or another byproduct depending on the second reagent, which may also be volatile and be removed to form recessed gallium oxide as inFIG.5D. The Y may be from the second reagent or the first reagent and may be any of the fluorine, chlorine, or bromine from either reagent, or a combination of materials from each reagent. The etching process of method400removes a thickness575as shown so that the thickness of gallium oxide515is reduced, and which may be any thickness as previously described. Repeated cycles may be performed to achieve desired etch thickness or to remove all of the gallium oxide if desired. By utilizing reagents as discussed throughout the present technology, gallium oxide may be etched from substrates including exposed regions of gallium nitride, for example, while limiting or preventing damage or removal of gallium nitride. In the preceding description, for the purposes of explanation, numerous details have been set forth in order to provide an understanding of various embodiments of the present technology. It will be apparent to one skilled in the art, however, that certain embodiments may be practiced without some of these details, or with additional details. Having disclosed several embodiments, it will be recognized by those of skill in the art that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. Additionally, a number of well-known processes and elements have not been described in order to avoid unnecessarily obscuring the present technology. Accordingly, the above description should not be taken as limiting the scope of the technology. Where a range of values is provided, it is understood that each intervening value, to the smallest fraction of the unit of the lower limit, unless the context clearly dictates otherwise, between the upper and lower limits of that range is also specifically disclosed. Any narrower range between any stated values or unstated intervening values in a stated range and any other stated or intervening value in that stated range is encompassed. The upper and lower limits of those smaller ranges may independently be included or excluded in the range, and each range where either, neither, or both limits are included in the smaller ranges is also encompassed within the technology, subject to any specifically excluded limit in the stated range. Where the stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included. As used herein and in the appended claims, the singular forms “a”, “an”, and “the” include plural references unless the context clearly dictates otherwise. Thus, for example, reference to “a layer” includes a plurality of such layers, and reference to “a precursor” includes reference to one or more precursors and equivalents thereof known to those skilled in the art, and so forth. Also, the words “comprise(s)”, “comprising”, “contain(s)”, “containing”, “include(s)”, and “including”, when used in this specification and in the following claims, are intended to specify the presence of stated features, integers, components, or operations, but they do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups. | 45,799 |
11942331 | DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. FIG.1is a flow diagram illustrating a method10for preparing a semiconductor device structure100, and the method10includes steps S11, S13, S15, S17, S19and S21, in accordance with some embodiments. The steps S11-S21ofFIG.1are first introduced briefly and then elaborated in connection withFIGS.3-9. As shown inFIG.1, the method10begins at step S11where a target layer is formed over a semiconductor substrate. Next, at step S13, an energy-sensitive layer is formed over the target layer. In some embodiments, the energy-sensitive layer includes a cross-linking compound having a cross-linking functional group. In some embodiments, the cross-linking functional group includes a double bond. At step S15, a first energy treating process is performed to form a first treated portion in the energy-sensitive layer, and at step S17, a second energy treating process is performed to form a second treated portion in the energy-sensitive layer. In some embodiments, the first energy treating process and the second energy treating process are electron-beam (e-beam) writing processes. In some embodiments, the first treated portion is formed by applying a first energy to the energy-sensitive layer, the second treated portion is formed by applying a second energy to the energy-sensitive layer, and the first energy is different from the second energy. In some embodiments, the first treated portion and the second treated portion have different heights due to different energy levels applied in the first and the second energy treating processes. Subsequently, at step S19, the first treated portion and the second treated portion are removed to form a first opening and a second opening in the energy-sensitive layer. At step S21, the first opening and the second opening are transferred into the target layer. In some embodiments, the first opening and the second opening are transferred by a dry etching process. In some embodiments, the first opening and the second opening with different heights (i.e., depths) are transferred to the target layer using the same pattern transferring process. FIG.2is a flow diagram illustrating a method30for preparing a semiconductor device structure200, and the method30includes steps S31, S33, S35, S37, S39, S41, S43and S45, in accordance with some embodiments. The steps S31-S45ofFIG.2are first introduced briefly and then elaborated in connection withFIGS.10-22. As shown inFIG.2, the method30begins at step S31where a target layer is formed over a semiconductor substrate. Next, at step S33, an energy-sensitive layer is formed over the target layer. In some embodiments, the energy-sensitive layer includes a cross-linking compound having a cross-linking functional group. In some embodiments, the cross-linking functional group includes a double bond. At step S35, a first energy treating process is performed to form first treated portions in the energy-sensitive layer, and at step S37, a second energy treating process is performed to form second treated portions in the energy-sensitive layer. In some embodiments, the first energy treating process and the second energy treating process are electron-beam (e-beam) writing processes. In some embodiments, the first treated portions are formed by applying a first energy to the energy-sensitive layer, the second treated portions are formed by applying a second energy to the energy-sensitive layer, and the first energy is different from the second energy. In some embodiments, the first treated portions have a first height, the second treated portions have a second height, and the first height and the second height are different due to different energy levels applied in the first and the second energy treating processes. Subsequently, at step S39, the first treated portions and the second treated portions are removed to form first openings and second openings in the energy-sensitive layer. At step S41, the first openings and the second openings are transferred into the target layer to form third openings and fourth openings. In some embodiments, the first openings and the second openings are transferred by a dry etching process. In some embodiments, the first openings and the second openings with different heights (i.e., depths) are transferred to the target layer using the same pattern transferring process. Next, at step S43, the third openings and the fourth openings are transferred into the semiconductor substrate to form fifth openings and sixth openings. In some embodiments, the third openings and the fourth openings are transferred by a dry etching process. In some embodiments, the third openings and the fifth openings with different heights (i.e., depths) are transferred to the semiconductor substrate using the same pattern transferring process. At step S45, the fifth openings and the sixth openings in the semiconductor substrate are filled with an isolation structure. In some embodiments, the isolation structure has different heights in different cross-sections. FIGS.3-9are cross-sectional views illustrating various stages of forming the semiconductor device structure100(FIG.9) by the method10ofFIG.1, in accordance with some embodiments. As shown inFIG.3, a target layer103is formed over a semiconductor substrate101, and an energy-sensitive layer105is formed over the target layer103, in accordance with some embodiments. The respective steps are illustrated as the steps S11-S13in the method10shown inFIG.1. The semiconductor substrate101may be a semiconductor wafer such as a silicon wafer. Alternatively or additionally, the semiconductor substrate101may include elementary semiconductor materials, compound semiconductor materials, and/or alloy semiconductor materials. Examples of the elementary semiconductor materials may include, but are not limited to, crystal silicon, polycrystalline silicon, amorphous silicon, germanium, and/or diamond. Examples of the compound semiconductor materials may include, but are not limited to, silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and/or indium antimonide. Examples of the alloy semiconductor materials may include, but are not limited to, SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and/or GaInAsP. In some embodiments, the semiconductor substrate101includes an epitaxial layer. For example, the semiconductor substrate101has an epitaxial layer overlying a bulk semiconductor. In some embodiments, the semiconductor substrate101is a semiconductor-on-insulator substrate which may include a substrate, a buried oxide layer over the substrate, and a semiconductor layer over the buried oxide layer, such as a silicon-on-insulator (SOI) substrate, a silicon germanium-on-insulator (SGOI) substrate, or a germanium-on-insulator (GOI) substrate. Semiconductor-on-insulator substrates can be fabricated using separation by implantation of oxygen (SIMOX), wafer bonding, and/or other suitable methods. In some embodiments, the target layer103includes a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, a low-k dielectric material or another suitable material. However, any suitable materials may be utilized. In some embodiments, the target layer103is formed by a deposition process, such as a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, an atomic layer deposition (ALD) process, a spin-on coating process, or another suitable method. Moreover, in some embodiments, the energy-sensitive layer105includes a cross-linking compound having a cross-linking functional group. In some embodiments, the cross-linking functional group includes a double bond. In some embodiments, the cross-linking compound has a hydrogen-bonding group, a polymerizable diacetylene group, or a combination thereof. Similar to the method for forming the target layer103, the energy-sensitive layer105may be formed by a deposition process, such as a CVD process, a PVD process, an ALD process, a spin-on coating process, or another suitable method. Next, a patterned hard mask107is formed over the energy-sensitive layer105, as shown inFIG.4in accordance with some embodiments. The patterned hard mask107may be formed by a procedure including deposition and patterning. In some embodiments, the patterned hard mask107includes an opening110exposing a portion of the energy-sensitive layer105, and the patterned hard mask107functions as a mask for a subsequent energy treating process. In some embodiments, the patterned hard mask107is optionally formed depending on the energy source of the subsequent energy treating process. For example, if the energy source of the subsequent energy treating process is visible light, ultraviolet (UV), deep ultraviolet (DUV), extreme ultraviolet (EUV), or X-ray, the patterned hard mask107is formed to serve as a mask in the energy treating process. If the energy source of the subsequent energy treating process is an electron-beam (e-beam) or an ion beam, the formation of the patterned hard mask107can be omitted. Moreover, in some embodiments, the patterned hard mask107includes silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbon nitride, metal oxide, or another suitable material. In some embodiments, the patterned hard mask107is selected to have a lower etch rate than the energy-sensitive layer105. Subsequently, a first energy treating process111is performed to form a first treated portion113in the energy-sensitive layer103, as shown inFIG.5in accordance with some embodiments. In some embodiments, a portion of the energy-sensitive layer105exposed by the opening110is transformed into the first treated portion113. The respective step is illustrated as the step S15in the method10shown inFIG.1. As mentioned above, the energy source of the first energy treating process111includes visible light, UV, DUV, EUV, X-ray, e-beam, ion beam, or another suitable energy source, in accordance with some embodiments. In some embodiments, the energy used in the first energy treating process111is selected such that the first treated portion113penetrates through the energy-sensitive layer105. In other words, the height of the first treated portion113is the same as the height of the energy-sensitive layer105(e.g., the height H1). However, other energy level may be utilized during the first energy treating process111such that the resulting bottom surface of the first treated portion113is higher than the bottom surface of the energy-sensitive layer105. After the first treated portion113is formed, the patterned hard mask107may be removed. For example, the patterned hard mask107may be removed by a wet etching process or an ashing process. Next, another patterned hard mask117is formed over the energy-sensitive layer105, as shown inFIG.6in accordance with some embodiments. Similar to the patterned hard mask107shown inFIG.4, the patterned hard mask117may be formed by a procedure including deposition and patterning. In some embodiments, the patterned hard mask117includes an opening120exposing a portion of the energy-sensitive layer105, and the patterned hard mask117functions as a mask for a subsequent energy treating process. In some embodiments, the patterned hard mask117is optionally formed depending on the energy source of the subsequent energy treating process. For example, if the energy source of the subsequent energy treating process is visible light, UV, DUV, EUV, or X-ray, the patterned hard mask117is formed to serve as a mask in the energy treating process. If the energy source of the subsequent energy treating process is an e-beam or an ion beam, the formation of the patterned hard mask117can be omitted. Some materials used to form the patterned hard mask117are similar to, or the same as those used to form the patterned hard mask107, and details thereof are not repeated herein. In some embodiments, the patterned hard mask117is selected to have a lower etch rate than the energy-sensitive layer105. Subsequently, a second energy treating process121is performed to form a second treated portion123in the energy-sensitive layer105, as shown inFIG.7in accordance with some embodiments. In some embodiments, a portion of the energy-sensitive layer105exposed by the opening120is transformed into the second treated portion123. The respective step is illustrated as the step S17in the method10shown inFIG.1. As mentioned above, the energy source of the second energy treating process121includes visible light, UV, DUV, EUV, X-ray, e-beam, ion beam, or another suitable energy source, in accordance with some embodiments. In some embodiments, the energy (i.e., energy level) used in the first energy treating process111is greater than the energy (i.e., energy level) used in the second energy treating process121, such that the height H1of the first treated portion113(seeFIG.5) is greater than a height H2of the second treated portion123. In some embodiments, the bottom surface of the second treated portion123is higher than the bottom surface of the energy-sensitive layer105(i.e., the top surface of the target layer103). In some embodiments, the bottom surface of the second treated portion123is higher than the bottom surface of the first treated portion113. After the second treated portion123is formed, the patterned hard mask117may be removed. Then, the first treated portion113and the second treated portion123are removed to form openings130aand130bin the energy-sensitive layer105, as shown inFIG.8in accordance with some embodiments. The respective step is illustrated as the step S19in the method10shown inFIG.1. In some embodiments, the bottom surface of the opening130bis higher than the bottom surface of the opening130a. In some embodiments, the first treated portion113and the second treated portion123are removed by an etching process. The etching process may include a wet etching process, a dry etching process, or a combination thereof. Next, the openings130aand130bin the energy-sensitive layer105are transferred into the target layer103, such that openings140aand140bare formed in the target layer103, as shown inFIG.9in accordance with some embodiments. The respective step is illustrated as the step S21in the method10shown inFIG.1. In some embodiments, the openings130aand130bare transferred into the target layer103by an etching process, such as a dry etching process. In some embodiments, the bottom surface of the opening140bis higher than the bottom surface of the opening140a. After the openings140aand140bare formed, the energy-sensitive layer105may be removed, and the semiconductor device structure100is obtained. FIGS.11,13-19, and21-22are cross-sectional views illustrating various stages of forming the semiconductor device structure200(FIGS.20-22) by the method30ofFIG.2, in accordance with some embodiments.FIGS.10and12are top views illustrating the structures ofFIGS.11and13, respectively, andFIG.20is a top view illustrating the structure ofFIGS.21and22. FIG.11is taken along line A-A′ inFIG.10.FIG.13is taken along line B-B′ inFIG.12.FIGS.14,16and18are taken along the same line A-A′ asFIG.10.FIGS.15,17and19are taken along the same line B-B′ asFIG.12.FIG.21is taken along line A-A′ inFIG.20, andFIG.22is taken along line B-B′ inFIG.20. As shown inFIGS.10and11, a target layer203and an energy-sensitive layer205are sequentially formed over a semiconductor substrate201, in accordance with some embodiments. The respective steps are illustrated as the steps S31-S33in the method30shown inFIG.2. Some details of the semiconductor substrate201are similar to, or the same as that of the semiconductor substrate101of the semiconductor device structure100and are not repeated herein. In addition, some materials and processes used to form the target layer203and the energy-sensitive layer205are similar to, or the same as those used to form the target layer103and the energy-sensitive layer105of the semiconductor device structure100, and details thereof are not repeated herein. Still referring toFIGS.10and11, after the energy-sensitive layer205is formed, a first energy treating process is performed to form a plurality of first treated portions207in the energy-sensitive layer205, in accordance with some embodiments. The respective step is illustrated as the step S35in the method30shown inFIG.2. In some embodiments, the first treated portions207extend along the same direction (e.g., the X-direction). In some embodiments, the first treated portions207are parallel to each other. In some embodiments, the first treated portions207have a height H3, and the bottom surfaces of the first treated portions207are higher than the bottom surface of the energy-sensitive layer205. In some embodiments, a patterned hard mask (not shown) is optionally formed to be utilized in the first energy treating process depending on the energy source of the first energy treating process. In some embodiments, the energy source of the first energy treating process includes visible light, UV, DUV, EUV, X-ray, e-beam, ion beam, or another suitable energy source. If a patterned hard mask is used to form the first treated portions207, the patterned hard mask may be removed after the first treated portions207are formed. Next, a second energy treating process is performed to form a plurality of second treated portions209in the energy-sensitive layer205, as shown inFIGS.12and13in accordance with some embodiments. The respective step is illustrated as the step S37in the method30shown inFIG.2. Similar to the energy source of the first treating process, the energy source of the second energy treating process includes visible light, UV, DUV, EUV, X-ray, e-beam, ion beam, or another suitable energy source, in accordance with some embodiments. In some embodiments, the first treated portions207are parallel to each other, and each of the second treated portions209is located between and in direct contact with any two adjacent ones of the first treated portions207. Moreover, in some embodiments, the energy used in the second energy treating process is selected such that each of the second treated portions209penetrate through the energy-sensitive layer205. In other words, the height of the second treated portions209is the same as the height of the energy-sensitive layer205(e.g., the height H4). However, other energy level may be utilized during the second energy treating process such that the resulting bottom surfaces of the second treated portions209are higher than the bottom surfaces of the energy-sensitive layer205. In some embodiments, the energy used in the second energy treating process is greater than the energy used in the first energy treating process, such that the height H4of the second treated portions209is greater than the height H3of the first treated portions207(seeFIG.11). In some embodiments, the bottom surfaces of the first treated portions207are higher than the bottom surface of the energy-sensitive layer205(i.e., the top surface of the target layer203). In some embodiments, the bottom surfaces of the first treated portions207are higher than the bottom surfaces of the second treated portions209. If a patterned hard mask is used to form the second treated portions209, the patterned hard mask may be removed after the second treated portions209are formed. Subsequently, the first treated portions207and the second treated portions209are removed to respectively form openings210aand210bin the energy-sensitive layer205, as shown inFIGS.13and14in accordance with some embodiments. The respective step is illustrated as the step S39in the method30shown inFIG.2. In some embodiments, the bottom surfaces of the openings210aare higher than the bottom surfaces of the openings210b. In some embodiments, the openings210ahave a height substantially the same as the height H3of the first treated portions207, and the openings210bhave a height substantially the same as the height H4. In some embodiments, the first treated portions207and the second treated portions209are removed by an etching process. The etching process may include a wet etching process, a dry etching process, or a combination thereof. Then, the openings210aand210bin the energy-sensitive layer205are transferred into the target layer203to respectively form openings220aand220bin the target layer203, as shown inFIGS.16and17in accordance with some embodiments. The respective step is illustrated as the step S41in the method30shown inFIG.2. In some embodiments, the openings220aand220bare transferred into the target layer203by an etching process, such as a dry etching process. In some embodiments, the bottom surfaces of the openings220aare higher than the bottom surfaces of the openings220b. In some embodiments, the openings220ahave a height H5, the openings220bhave a height H6, and the height H6is greater than the height H5. After the openings220aand220bare formed, the energy-sensitive layer205may be removed. Next, the openings220aand220bin the target layer203are transferred into the semiconductor substrate201to respectively form openings230aand230bin the semiconductor substrate201, as shown inFIGS.18and19in accordance with some embodiments. The respective step is illustrated as the step S43in the method30shown inFIG.2. In some embodiments, the openings230aand230bare transferred into the semiconductor substrate201by an etching process, such as a dry etching process. In some embodiments, the bottom surfaces of the openings230aare higher than the bottom surfaces of the openings230b. In some embodiments, the openings230ahave a height H7, the openings230bhave a height H8, and the height H8is greater than the height H7. After the openings230aand230bare formed, the target layer203may be removed. Subsequently, an isolation structure235is filled into the openings230aand230bin the semiconductor substrate201, as shown inFIGS.20-22in accordance with some embodiments. The respective step is illustrated as the step S45in the method30shown inFIG.2. In some embodiments, the isolation structure235has first portions235afilled into the openings230aand second portions235bfilled into the openings230b. In some embodiments, the isolation structure235has different heights (i.e., depths) in different cross-sections. For example, the isolation structure235has the height H7in the cross-section taken along line A-A′ in the top view (FIG.20), and the isolation structure235has the height H8in the cross-section taken along line B-B′ in the top view. In some embodiments, the height H8is greater than the height H7. In some embodiments, the isolation structure235aincludes a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, a low-k dielectric material or another suitable material. The isolation structure235amay be formed by a procedure including deposition and planarization. The deposition process may include a CVD process, a PVD process, an ALD process, a spin-on coating process, or another suitable method. The planarization process may include a chemical mechanical planarization (CMP) process. In some embodiments, the planarization process is performed until the top surface of the semiconductor substrate201is exposed. After the isolation structure235is formed, the semiconductor device structure200is obtained. In some embodiments, a plurality of island-shaped active areas (AA) are surrounded by the isolation structure235. Embodiments of the method for preparing a semiconductor device structure with patterns having different heights are provided in the disclosure. The method includes sequentially forming a target layer (e.g., the target layers103and203) and an energy-sensitive layer (e.g., the energy-sensitive layers105and205) over a semiconductor substrate (e.g., the semiconductor substrates101and201), and forming first treated portion(s) (e.g., the first treated portions113and207) and second treated portion(s) (e.g., the second treated portions123and209) in the energy-sensitive layer. The method also includes removing the first treated portion(s) and the second treated portion(s) to form first opening(s) (e.g., the openings130aand210a) and second opening(s) (e.g., the openings130band210b), and transferring the first and the second openings into the target layer, or even the semiconductor substrate. In some embodiments, the first treated portion(s) and the second treated portion(s) have different heights. Therefore, the openings with different heights (i.e., depths) can be transferred into the target layer or the semiconductor substrate using the same pattern transferring process. As a result, the fabrication cost and time of the semiconductor device structure (e.g., the semiconductor device structures100and200) can be reduced, and greater design flexibility can be achieved. In one embodiment of the present disclosure, a method for preparing a semiconductor device structure is provided. The method includes forming a target layer over a semiconductor substrate, and forming an energy-sensitive layer over the target layer. The method also includes performing a first energy treating process to form a first treated portion in the energy-sensitive layer, and performing a second energy treating process to form a second treated portion in the energy-sensitive layer. The method further includes removing the first treated portion and the second treated portion to form a first opening and a second opening in the energy-sensitive layer, and transferring the first opening and the second opening into the target layer. In another embodiment of the present disclosure, a method for preparing a semiconductor device structure is provided. The method includes forming a target layer over a semiconductor substrate, and forming an energy-sensitive layer over the target layer. The method also includes performing a first energy treating process to form a plurality of first treated portions in the energy-sensitive layer, and performing a second energy treating process to form a plurality of second treated portions in the energy-sensitive layer. The method further includes removing the first treated portions and the second treated portions to respectively form a plurality of first openings and a plurality of second openings, and transferring the first openings and the second openings into the target layer to respectively form a plurality of third openings and a plurality of fourth openings. In addition, the method includes transferring the third openings and the fourth openings into the semiconductor substrate to respectively form a plurality of fifth openings and a plurality of sixth openings, and filling the fifth openings and the sixth openings with an isolation structure. The embodiments of the present disclosure have some advantageous features. By forming treated portions with different heights in the energy-sensitive layer, the openings with different heights (or depths) can be transferred into the target layer using the same pattern transferring process. As a result, the fabrication cost and time can be reduced, and greater design flexibility can be achieved. Although the present disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure as defined by the appended claims. For example, many of the processes discussed above can be implemented in different methodologies and replaced by other processes, or a combination thereof. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, and steps. | 29,983 |
11942332 | To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. The drawings referred to here should not be understood as being drawn to scale unless specifically noted. Also, the drawings are often simplified and details or components omitted for clarity of presentation and explanation. The drawings and discussion serve to explain principles discussed below, where like designations denote like elements. DETAILED DESCRIPTION Embodiments of the present disclosure generally relate to methods of selective removal of metal-containing layers (e.g., tungsten-containing hard masks) using dry etching. The methods described below can be used to selectively etch metal-containing layers, such as tungsten carbide (WxC), titanium nitride (TiN), tungsten nitride (WxN), tungsten silicide (WxSi), tungsten Boron Carbide (WxByC) and tungsten carbon nitride (WxCyN). For example, the methods described below can be used to remove tungsten-containing layers from patterned structures without damaging the underlying layers even when there are substantial differences in thickness of the tungsten-containing layer over different portions of the patterned structure. Furthermore, the methods described below can selectively etch tungsten-containing layers (e.g., WC) relative to silicon oxide at a ratio of greater than 300:1 and can selectively etch tungsten-containing layers (e.g., WC) relative to silicon nitride at a ratio of greater than 1000:1. Although the following disclosure generally describes methods of selective removal of tungsten-containing hard masks, the disclosure is equally applicable to selective removal of any layer formed of a carbide, oxide, or nitride, such as a carbide, oxide, or nitride including one or more metals, such as a carbide, oxide, or nitride layer including one or more of tungsten, tantalum, titanium (e.g., TiN), cobalt, strontium (such as SrTiOx), hafnium, in a semiconductor process. FIG.1Ais a partial cross-sectional view of a patterned device100before being treated using one or more of the methods described below.FIG.1Bis a partial cross-sectional view of the patterned device100′ after being treated using one or more of the methods described below in reference toFIGS.3-6. Notably, inFIG.1B, while all of the tungsten-containing layer111ofFIG.1Ahas been removed, none or only a negligible amount of the underlying layer112has been removed. Before being treated, patterned device100includes a tungsten-containing layer111that has substantial variations in thickness over different portions of the tungsten-containing layer111. These thickness variations present challenges in removing the tungsten-containing layer without damaging the underlying layer(s). For example, if conventional etching processes were applied to remove the tungsten-containing layer111shown inFIG.1A, then portions of the layer112underlying thinner portions of the tungsten-containing layer111would be damaged (e.g., partially removed) in the process. The methods described below overcome these challenges by using methods that can selectively etch the thicker portions of the tungsten-containing layer111at faster overall rates than the thinner portions of the tungsten-containing layer111. For example, the methods described below can include operations which etch the thicker portions while simultaneously depositing and protecting a film over the thinner portions. Referring toFIG.1A, the patterned device100includes a substrate50, the tungsten-containing layer111, and a supporting layer112. The supporting layer112is formed over the substrate50, and the tungsten-containing layer111is formed on the supporting layer112. In some embodiments, the tungsten-containing layer111can be a hard mask layer. The tungsten-containing layer111can be formed of tungsten carbide (WC), tungsten carbon nitride (WCN), tungsten nitride (WN), tungsten silicide (WSi), tungsten boride (WB), or other layer including tungsten. In some embodiments, the tungsten composition in the tungsten-containing layer111can be greater than 15%, such as greater than 60%, or greater than 80%. In some embodiments, the supporting layer112is formed of a dielectric material, such as silicon nitride or silicon oxide. For example, in some embodiments the supporting layer112can be used as a part of capping layer for a conductive structure, such as an interconnect that can be subsequently formed by, for example partially filling the holes or trenches115with a conductive material. In some embodiments, an intermediate layer113is formed between the supporting layer112and the substrate50. The intermediate layer113can include one or more individual layers (not shown), such as one or more conductive and/or insulating layers. The patterned device100includes a plurality of trenches15formed over the substrate50. Although the patterned device100is shown including the plurality of trenches15, in other embodiments the patterned device100can include other patterned features, such as other high aspect ratio structures, for example, holes, line/space, vias or dual damascene structures. In some embodiments, the high aspect ratio features have an aspect ratio greater than 1:1, such as greater than 2:1, such as greater than 50:1. The patterned device100includes a patterned region101A that includes the plurality of trenches15. The patterned device100further includes an unpatterned region101B that does not include patterned features, such as the plurality of trenches15. The patterned region101A includes exposed surfaces of one or more underlying layers, such as the supporting layer112. The unpatterned region101B does not include any exposed surfaces of any underlying layers, such as the supporting layer112. Furthermore, the patterned region101A can include changes in thickness in the direction in which the layers are stacked (i.e., the Z-direction) of the tungsten-containing layer111of at least 20% across the patterned region101A (i.e., the XY plane) while the unpatterned region101B does not include any changes in thickness of the tungsten-containing layer111in the Z-direction across the XY plane greater than 10%. For example, the thickness of the tungsten-containing layer111across the XY plane in the patterned region101A is a first thickness above the supporting layer112and is reduced to zero in the trenches115, which is a change in thickness greater than 20%. Moreover, the tungsten-containing layer111in the unpatterned region101B can be substantially flat in some embodiments, which is a change in thickness less than 10%. In other embodiments, the patterned region101A can be defined by changes in elevation of the outer surface (i.e., top surface) of the tungsten-containing layer111in the Z-direction, which are greater than 20% of the thickness of the tungsten-containing layer111in the Z-direction while the unpatterned region101B does not include any changes in elevation in the Z-direction of the tungsten-containing layer111greater than 10%. Referring toFIG.1A, the tungsten-containing layer111is substantially thicker in the unpatterned region101B than in the patterned region101A due to previous processing. For example, the processing to form the trenches115is focused in the patterned region101A and results in a partial removal of the portions of the tungsten-containing layer111over the supporting layer112in the patterned region101A while this same processing leaves the tungsten-containing layer111in the unpatterned region101B largely unaffected resulting in the substantial thickness difference of the tungsten-containing layer111between the patterned region101A and the unpatterned region101B. The methods described below overcome these challenges presented by this thickness difference by using methods that can etch the thicker portions of the tungsten-containing layer111in the unpatterned region101B at faster overall rates than the thinner portions of the tungsten-containing layer111in the patterned region101A. As described below, the methods can include operations which etch the thicker portions of the tungsten-containing layer111in the unpatterned region101B while simultaneously depositing a film over the thinner portions of the tungsten-containing layer111in the patterned region101A. FIG.2is a simplified cutaway view for an exemplary etching process chamber200for selectively removing a tungsten-containing layer from a patterned device, such as the tungsten-containing layer111from the patterned device100described above in reference toFIG.1A. One example of the process chamber that may be adapted to benefit from the disclosure is an AdvantEdge Mesa Etch or Sym3 Etch processing chamber, available from Applied Materials, Inc., located in Santa Clara, California. It is contemplated that other process chambers, including those from other manufactures, may be adapted to practice embodiments of the disclosure. The etching process chamber200includes a chamber body205having a process volume201defined therein. The chamber body205has sidewalls212and a bottom218which are coupled to an electrical ground226. The sidewalls212have a protective inner liner215to extend the time between maintenance cycles of the etching process chamber200. The dimensions of the chamber body205and related components of the etching process chamber200are not limited and generally are proportionally larger than the size of the patterned device100to be processed therein. The chamber body205supports a chamber lid assembly210to enclose the process volume201. The chamber body205may be fabricated from aluminum or other suitable materials. An access port213is formed through the sidewalls212of the chamber body205, facilitating the transfer of the patterned device100into and out of the etching process chamber200. A pumping port245is formed through one or more of the sidewalls212of the chamber body205and is connected to the process volume201. A pumping device (not shown) is coupled through the pumping port245to the process volume201to evacuate and control the pressure therein. The pressure may be controlled during processing between about 1 mTorr to about 200 mTorr, such as from about 5 mTorr to about 50 mTorr, such as about 10 mTorr. The temperature of the process volume201can be maintained between about 0° C. to about 180° C., such as from about 25° C. to about 120° C. A gas panel260is coupled by a gas line267to the chamber body205to supply gases into the process volume201. The gas panel260may include one or more process gas sources261,262,263and may additionally include a dilution gas source264. Examples of process gases that may be provided by the gas panel260include, but are not limited to a halogen-containing gas (e.g., Cl2HBr, BCl3, Br2,), a hydrogen-containing gas (e.g., CH3F, CH2F2, CHF3, HBr, CH4, H2), and an oxygen-containing gas (e.g., O2, COS, SO2). In one example, the process volume201of the process chamber200into which the process gases flow is between 90,000 cc and 160,000 cc, such as about 125,000 cc. Valves266control the flow of the process gases from the gas sources261,262,263,264from the gas panel260and are managed by a controller265. The flow of the gases supplied to the process volume201from the gas panel260may include combinations of the gases. The chamber lid assembly210may include a nozzle214. The nozzle214has one or more ports for introducing the process gases and inert gases from the gas sources261,262,263,264of the gas panel260into the process volume201. After the process gases are introduced into the etching process chamber200, the gases are energized to form plasma. An antenna248, such as one or more inductor coils, may be provided adjacent to the etching process chamber200. An antenna power supply242applies power to the antenna248through a match circuit241to inductively couple energy, such as RF energy, to the process gas to maintain a plasma formed from the process gas in the process volume201of the etching process chamber200. The operation of the antenna power supply242may be controlled by a controller, such as the controller265, that also controls the operation of other components in the etching process chamber200. A substrate support pedestal235is disposed in the process chamber200to support the patterned device100during processing. The substrate support pedestal235may include an electro-static chuck222for holding the patterned device100during processing. The electro-static chuck (ESC)222uses electro-static attraction to hold the substrate50of the patterned device100to the substrate support pedestal235. The ESC222includes an electrode221powered by a power source250. The electrode221is embedded in the ESC222within a dielectric body. The power source250may also include a system controller for controlling the operation of the electrode221by directing a DC current to the electrode221for chucking and de-chucking the patterned device100. Furthermore, the electrode221may further be coupled to an RF power supply225integrated with a match circuit224. The RF power supply225provides a bias to the electrode221which attracts plasma ions, formed by the process gases in the process volume201, to the ESC222and patterned device100positioned thereon. The ESC222has an isolator228for the purpose of making the sidewall of the ESC222less attractive to the plasma to prolong the maintenance life cycle of the ESC222. Additionally, the substrate support pedestal235may have a cathode liner236to protect the sidewalls of the substrate support pedestal235from the plasma gases and to extend the time between maintenance of the etching process chamber200. The ESC222may include heaters (not shown) disposed therein and connected to a power source (not shown), for heating the patterned device100, while a heat transfer base229supporting the ESC222may include conduits for circulating a heat transfer fluid to maintain a temperature of the ESC222and patterned device100disposed thereon. The ESC222is configured to perform in the temperature range required by the thermal budget of the device being fabricated on the patterned device100. For example, the ESC222may be configured to maintain the patterned device100at a temperature of about minus about 0 degrees Celsius to about 200 degrees Celsius for certain embodiments. A cover ring230is disposed on the ESC222and along the periphery of the substrate support pedestal235. The cover ring230is configured to confine etching gases to a desired portion of the exposed top surface of the patterned device100, while shielding the top surface of the substrate support pedestal235from the plasma environment inside the etching process chamber200. Lift pins (not shown) are selectively moved through the substrate support pedestal235to lift the patterned device100above the substrate support pedestal235to facilitate access to the patterned device100by a transfer robot (not shown) or other suitable transfer mechanism. The controller265may be utilized to control the process sequence, regulating the gas flows from the gas panel260into the etching process chamber200and other process parameters, such as the frequencies and power provided to the electrode221and the antennas248. Software routines, when executed by a CPU of the controller265, transform the CPU into a specific purpose computer (controller) that controls the etching process chamber200such that the processes are performed. The software routines may also be stored and/or executed by a second controller (not shown). FIG.3is a process flow diagram of a method1000of forming the patterned device100′ ofFIG.1Busing the etching process chamber200ofFIG.2, according to one embodiment.FIGS.4A-4Dillustrate different stages of removing the tungsten-containing layer111from the patterned device100ofFIG.4Ato form the patterned device100′ ofFIG.4Dusing the method1000ofFIG.3, according to one embodiment.FIGS.4A and4Dare the same asFIGS.1A and1Bdescribed above. Referring toFIGS.2,3and4A-4D, the method1000is described. At block1002, process gases and an optional dilution gas (e.g., Ar, He, N2) are supplied to the process volume201of the process chamber200. In one embodiment, a first gas comprising oxygen (e.g.,02, COS, SO2), a second gas comprising halogen-containing gases such as chlorine-containing gas (e.g., BCl3Cl2) or a bromine-containing gas (e.g., HBr, Br2) are provided to the process volume201of the process chamber200. In another embodiment, the first gas comprising oxygen, the second gas comprising chlorine, and a third gas comprising hydrogen (e.g., CH4, H2) are provided to the process volume201of the process chamber200. The chlorine-containing gas can be provided to the process volume201at a flowrate from about 0 to about 2000 sccm, such as from about 50 sccm to about 1000 sccm. The oxygen-containing gas can be provided to the process volume201at a flowrate from about 0 to about 1000 sccm, such as from about 10 sccm to about 200 sccm. The hydrogen-containing gas can be provided to the process volume201at a flowrate from about 0 to about 250 sccm, such as from about 5 sccm to about 100 sccm. The dilution gas can be provided to the process volume201at a flowrate from about 0 to about 1000 sccm, such as from about 100 sccm to about 500 sccm. At block1004, a first plasma of the gases provided to the process volume201of the process chamber200is generated. The first plasma can be generated by energizing the antenna248with energy, such as RF energy. The antenna power supply242can supply RF energy at frequencies from about 0.1 MHz to about 200 MHz, such as from about 0.3 MHz to about 40 MHz, or even from about 0.3 MHz to about 13.56 MHz, such as about 2 MHz at power levels from about 250 W to about 9000 W, such as from about 500 W to about 4500 W, such as about 2000 W. The RF energy supplied to the antenna248can be pulsed at a duty cycle from about 10% or higher, and in some embodiments continuous wave RF energy is applied to the antennas248. In some embodiments, the duty cycle of the pulse is from about 25% to about 95%. However, in other embodiments continuous wave RF energy can be applied to the antennas248. Additionally, at block1004, a bias signal can be applied to the electrode221of the electrostatic chuck222. The bias signal from the electrode221can be used to fine tune the plasma and control whether the plasma results in etching portions of the tungsten-containing layer111and/or depositing additional material over portions of the tungsten-containing layer111. The RF power supply225may provide RF power to the electrode221at a power level from about 25 W to about 1000 W, such as from about 75 W to about 500 W. The RF power supply225can supply RF energy at frequencies from about 0.1 MHz to about 200 MHz, such as from about 0.2 MHz to about 60 MHz, or even from about 0.2 MHz to about 13.56 MHz, such as about 2 MHz. The RF power supply225provides a bias to the electrode221which attracts plasma ions, formed by the process gases in the process volume201, to the ESC222and patterned device100positioned thereon. The RF power supply225may cycle on and off, or pulse, during processing of the patterned device100. For example, in one embodiment, the RF energy supplied by RF power supply225can be pulsed at a duty cycle from about 10% to about 98%, such as from about 25% to about 95%. In another embodiment, continuous wave RF energy is provided by the RF power supply225. In some embodiments, the duty cycle can be in synchronous pulsing for the source (i.e., the antenna power supply242) and the bias (i.e., the RF power supply225). In other embodiments, advanced pulsing methods such as a delay between pulsing of the source and the bias can be used. In such embodiments, the source can pulse at a different or same duty cycle as the bias, and the bias pulse can be applied with a delay relative to the source. In some embodiments, when the source duty cycle is in the ON phase, the bias duty cycle is in the OFF phase, and when bias duty cycle is in the ON phase, the source duty cycle is in the OFF phase. Referring toFIGS.3and4B, at block1006, a first film116is deposited over the patterned region101A of the tungsten-containing layer111with the first plasma. The first film116can include tungsten (e.g., tungsten oxide). In some embodiments, the first film116can have a thickness from about 30 nm to about 200 nm, such as about 100 nm. In some embodiments, the first film116can completely cover the trenches115creating voids117. The voids117can be beneficial when the etch rate of a plasma for the supporting layer112is higher than desired. For example, once the voids117are formed a plasma that is aggressive towards etching the tungsten-containing layer111in the unpatterned region can be applied with less concern for etching the supporting layer112while the voids117are still covered and thus protected by the first film116. Thus, in some embodiments the first plasma can be modified (e.g., modifying flowrates of gases and/or electrical characteristics of energy provided to antenna248and/or to the electrode221) once the voids117are formed to take advantage of the protection of the supporting layer112provided by the first film116. In some embodiments, tungsten oxide is the only nonvolatile byproduct generated from exposing the tungsten-containing layer111to the first plasma. Volatile byproducts can include carbon monoxide as well as gases including chlorine and one or more compounds of tungsten and oxygen. Also at block1006, portions of the tungsten-containing layer111in the unpatterned region101B are removed with the first plasma. At the completion of block1006, the thickness of the tungsten-containing layer111in the unpatterned region101B is substantially reduced while the thickness of the tungsten-containing layer111in the patterned region101A is not reduced as shown inFIG.4B. Thus, a difference of the thickness of the tungsten-containing layer111between the patterned region101A and the unpatterned region101B is substantially reduced by execution of block1006. In some embodiments, at block1006, the thickness of the tungsten-containing layer111in the patterned region101A is reduced, but by a substantially smaller amount than the thickness of the tungsten-containing layer111of the unpatterned region101B. For example, the thickness reduction of the tungsten-containing layer111in the unpatterned region101B can be at least two times greater than the thickness reduction of the tungsten-containing layer111found in the patterned region101A, such as at least ten times greater. Thus, the etching process at block1006is highly selective between the unpatterned region101B (etching) and the patterned area110A (deposition). Notably, the first film116is not deposited over the unpatterned region101B of the tungsten-containing layer111. At block1008, a second plasma of the gases provided to the process volume201of the process chamber200is generated after generating the first plasma. The second plasma can be generated by energizing the antenna248with energy, such as RF energy. Additionally, at block1008, a bias signal can be applied to the electrode221of the electrostatic chuck222. The bias signal from the electrode221can be used to fine tune the plasma and control whether the plasma results in etching portions of the tungsten-containing layer111and/or depositing additional material over portions of the tungsten-containing layer111. The second plasma is generated using different gases (e.g., different flowrates or different gas sources) and/or different electrical characteristics (e.g., power level, frequency, continuous wave, pulse, duty cycle of pulse) of the power provided to the antenna248and/or the electrode221. Referring toFIGS.3and4C, at block1010, the first film116is removed with the second plasma. Furthermore, at block1010portions of the patterned region101A and the unpatterned region101B of the tungsten-containing layer111are removed with the second plasma. At the completion of block1010, a difference in thickness between the patterned region101A and the unpatterned region101B of the tungsten-containing layer111is substantially reduced relative to the initial difference in thickness between the patterned region101A and the unpatterned region101B of the tungsten-containing layer111at the start of method1000. As mentioned above, the gases provided to the process volume201of the process chamber200for the second plasma can be different gases or different flowrates of gases relative to the gases and flowrates provided to the process volume201of the process chamber200for the first plasma. For example, in one embodiment of method1000, an addition of 5 sccm of methane during the second plasma can be sufficient to stop deposition of the first film116over the patterned region101A of the tungsten-containing layer111and instead cause removal of the first film116as well as causing the removal of portions of the patterned region101A and the unpatterned region101B of the tungsten-containing layer111relative to a first plasma not including any methane. The differences in the process conditions between the first plasma and the second plasma for this example are shown below in Table 1. In another embodiment, an optional second plasma can be formed by decreasing the flowrate of oxygen to 15 sccm from the 25 sccm in the first plasma while all other flowrates and other conditions can remain the same as those shown below for the first plasma in Table 1. This decrease in the flowrate of oxygen without any addition of methane is also sufficient to stop deposition of the first film116over the patterned region101A of the tungsten-containing layer111and instead cause removal of the first film116as well as causing the removal of portions of the patterned region101A and the unpatterned region101B of the tungsten-containing layer111. In yet another embodiment, the transition between the first plasma and the second plasma can be accomplished by changing the bias power applied to the electrode221while keeping other process conditions constant. For example, an alternate first plasma can be generated by supplying oxygen, chlorine, and methane to the process volume with a bias power of 125 W, and an alternate second plasma can be generated by supplying the same gases at the same flowrates but at a bias power or 150 W as shown below in Table 1. TABLE 1PowerBias Power(W) to(W) toBiasPressureAntennaelectrodeDutyO2Cl2CH4mTorr248221CyclesccmsccmsccmFirst10200017575%252000PlasmaSecond10200017575%252005PlasmaOptional10200017575%152000SecondPlasmaAlternate10200012575%252005FirstPlasmaAlternate10200015075%252005SecondPlasma Furthermore, as mentioned above the electrical characteristics for the power provided to the antenna248and/or for the power provided to the electrode221may be different at block1008for generating the second plasma relative to block1004for generating the first plasma. For example, in one embodiment of method1000, an increase in the bias power provided to the electrode221from about 125 W to about 150 W can be sufficient to stop deposition of the first film116over the patterned region101A of the tungsten-containing layer111and instead cause removal of the first film116as well as causing the removal of portions of the patterned region101A and the unpatterned region101B of the tungsten-containing layer111. The differences in the process conditions between the first plasma and the second plasma for this example are shown below in Table 2. TABLE 2PowerBias Power(W) to(W) toBiasPressureAntennaelectrodeDutyO2Cl2CH4mTorr248221CyclesccmsccmsccmFirst10200012575%252005PlasmaSecond10200015075%252005Plasma At block1012, a third plasma of the gases provided to the process volume201of the process chamber200is generated after generating the second plasma. In some embodiments, the gases provided to the process volume201of the process chamber200for the third plasma are different gases or different flowrates of gases relative to the gases and flowrates provided to the process volume201of the process chamber200for the first plasma and second plasma. Furthermore, the electrical characteristics for the power provided to the antenna248and/or for the power provided to the electrode221may be different at block1012for generating the third plasma relative to block1004for generating the first plasma and relative to block1008for generating the second plasma. In one example, the process conditions for the third plasma are shown below in Table 3. In this example, the gases provided to the process volume201of the process chamber200include a gas composition that includes an oxygen containing gas (e.g.,02) and a halogen containing gas (e.g., molecular chlorine (Cl2)), and no hydrogen or carbon containing gases (e.g., CH4, H Br). TABLE 3BiasPowerPower of(W) to2 MHz(W)BiasPressureAntennaelectrodeDutyO2Cl2CH4mTorr248221CyclesccmsccmsccmThird10200010075%3002000Plasma Referring toFIGS.3and4D, at block1014, remaining portions of the patterned region101A and the unpatterned region101B of the tungsten-containing layer111are removed with the third plasma to expose a top surface of the supporting layer112(i.e., the surface previously covered by the tungsten-containing layer111). Because the remaining portions of the tungsten-containing layer111can be removed with the third plasma, the third plasma can be highly selective to removing the tungsten-containing layer111relative to the underlying supporting layer112, such as being more selective than the first plasma or the second plasma described above. In one embodiment, a highly selective etching process for removing the tungsten-containing layer111relative to the underlying supporting layer112(e.g., silicon nitride or silicon oxide) at ratios greater than 300:1 can be achieved by a process that includes applying RF power to the electrode221at a frequency from about 0.2 MHz to about 5 MHz, such as about 2 MHz at a bias power level from about 75 W to about 125 W, such as at about 100 W. In some embodiments, a pulsed (e.g., a duty cycle of 75%) or continuous wave RF energy can be applied to the antennas248at block1014. At the completion of block1014, the tungsten-containing layer111can be fully removed to form the patterned device100′ without removing and/or damaging any underlying layers, such as supporting layer112. In some embodiments, a negligible amount of an underlying layer, such as the supporting layer112, is removed in one or more of the patterned region101A and/or the unpatterned region101B. For example, a thickness of the supporting layer112after generation of the third plasma within 0.5% of the thickness of the supporting layer112before generation of the first plasma is considered a negligible amount. The process conditions for the third plasma can be selected to selectively remove the tungsten-containing layer111(e.g., WC) relative to the supporting layer112(e.g., silicon oxide) at ratio is greater than 100:1, such as greater than 300:1, such as even greater than 1000:1. FIG.5is a process flow diagram of a method2000of forming the patterned device100′ ofFIG.1Busing the etching process chamber200ofFIG.2, according to one embodiment.FIGS.6A-6Dillustrate different stages of removing the tungsten-containing layer111from the patterned device100ofFIG.6Ato form the patterned device100′ ofFIG.6Dusing the method2000ofFIG.5, according to one embodiment.FIGS.6A and6Dare the same asFIGS.1A and1Bdescribed above. Referring toFIGS.2,5and6A-6D, the method2000is described. At block2002, process gases and an optional dilution gas (e.g., Ar, He, N2) are supplied to the process volume201of the process chamber200. In one embodiment, a first gas comprising oxygen (e.g.,02, COS, SO2), a second gas comprising chlorine (e.g., Cl2) are provided to the process volume201of the process chamber200. In another embodiment, the first gas comprising oxygen, the second gas comprising chlorine, and a third gas comprising hydrogen (e.g., CH4, H2) are provided to the process volume201of the process chamber200. The gases provided and the flowrates for the gases at block2002can be the same as described above for block1002ofFIG.3or the same as those shown above in Tables 1 and 2 for the first plasma. At block2004, a first plasma of the gases provided to the process volume201of the process chamber200is generated. The first plasma can be generated by energizing the antenna248with energy, such as RF energy. The antenna power supply242can supply RF energy to the antenna248with the same electrical characteristics described above for block1004ofFIG.3or shown above in Tables 1 and 2 for the first plasma. Additionally, at block2004, a bias signal can be applied to the electrode221of the electrostatic chuck222. The bias signal from the electrode221can be used to fine tune the plasma and control whether the plasma results in etching portions of the tungsten-containing layer111and/or depositing additional material over portions of the tungsten-containing layer111. The RF power supply225may provide RF power to the electrode221with the same electrical characteristics described above for block1004ofFIG.3or shown above in Tables 1 and 2 for the first plasma. Referring toFIGS.5and6B, at block2006, the first film116is deposited over the patterned region101A of the tungsten-containing layer111with the first plasma. The first film116can include tungsten (e.g., tungsten oxide). In some embodiments, tungsten oxide is the only nonvolatile byproduct generated from exposing the tungsten-containing layer111to the first plasma. Volatile byproducts can include carbon monoxide as well as gases including chlorine and one or more of tungsten and an oxygen. Also at block1006, portions of the tungsten-containing layer111in the unpatterned region101B are removed with the first plasma. At the completion of block2006, the first film116does not completely cover the trenches115in block2006, and thus the voids117described above in reference to block1006are not formed in block2006. Also, less material is removed from the tungsten-containing layer111in the unpatterned region101B in block2006relative to block1006. In some embodiments, the reduced deposition of the first film and the reduced removal of the tungsten-containing layer111in the unpatterned region101B in block2006relative to block1006is due to a shorter duration of block2006relative to block1006. Also at the completion of block2006, the thickness of the tungsten-containing layer111in the unpatterned region101B is substantially reduced while the thickness of the tungsten-containing layer111in the patterned region101A is not reduced as shown inFIG.4B. Thus, a difference of the thickness of the tungsten-containing layer111between the patterned region101A and the unpatterned region101B is substantially reduced by execution of block2006. In some embodiments, at block2006, the thickness of the tungsten-containing layer111in the patterned region101A is reduced, but by a substantially smaller amount than the thickness of the tungsten-containing layer111of the unpatterned region101B. Notably, the first film116is not deposited over the unpatterned region101B of the tungsten-containing layer111. At block2008, a second plasma of the gases provided to the process volume201of the process chamber200is generated after generating the first plasma. The second plasma can be generated by energizing the antenna248with energy, such as RF energy. Additionally, at block2008, a bias signal can be applied to the electrode221of the electrostatic chuck222. The bias signal from the electrode221can be used to fine tune the plasma and control whether the plasma results in etching portions of the tungsten-containing layer111and/or depositing additional material over portions of the tungsten-containing layer111. The second plasma is generated using different gases (e.g., different flowrates or different gas sources) and/or different electrical characteristics (e.g., power level, frequency, continuous wave, pulse, duty cycle of pulse) of the power provided to the antenna248and/or the electrode221. The second plasma generated in block2008can be generated using the same process conditions as those described above for the second plasma generated in block1008ofFIG.3. Exemplary process conditions to form the second plasma can also be found above in Tables 1 and 2 for the second plasma. Referring toFIGS.5and6C, at block2010, the first film116is removed with the second plasma. Furthermore, at block2010portions of the patterned region101A and the unpatterned region101B of the tungsten-containing layer111are removed with the second plasma. At the completion of block2010, a difference in thickness between the patterned region101A and the unpatterned region101B of the tungsten-containing layer111is substantially reduced relative to the initial difference in thickness between the patterned region101A and the unpatterned region101B of the tungsten-containing layer111at the start of method1000. However, at the first completion of block2010, there is more remaining material in the tungsten-containing layer111of the patterned region101A and the unpatterned region101B relative to the completion of block1010ofFIG.3. To remove this additional material, blocks2004to2010(seeFIGS.6B and6C) are repeated one or more times, such as between 1 and about 20 times, such as about 10 times. In some embodiments, the reduced removal of the tungsten-containing layer111of the patterned region101A and the unpatterned region101B in block2006relative to block1006is due to a shorter duration of block2010relative to block1010. At block2011, a determination is made as to whether a desired thickness of the tungsten-containing layer111in the patterned region101A and/or the unpatterned region101B has been reached by the removal of portions of the tungsten-containing layer111in blocks2004-2010. If the desired thickness has not been reached, then blocks2004-2010can be repeated in succession to remove additional material from the tungsten-containing layer111. If the desired thickness has been reached, then a third plasma can be generated to remove the remaining portions of the tungsten-containing layer111in the patterned region101A and the unpatterned region101B. Using a repetitive process of blocks2004-2010to incrementally remove portions of the tungsten-containing layer111, for example by using multiple shorter durations of blocks2004-2010performed in a cyclic fashion, as opposed to executing2004-2010once (i.e., the process used in method1000ofFIG.3), to remove a comparable overall portion of the tungsten-containing layer111, can help to reduce particle generation in the process volume201. For example, removing 100 nm or more of the tungsten-containing layer with one execution of blocks2004-2010(i.e., in one cycle) can cause particle generation and/or damage the device100being processed due to the extended length of the processing blocks. Furthermore, using the repetitive process with shorter durations for the first plasma can help reduce the variations in the profile, properties and/or composition of the first film116across the patterned region101A, which can help promote achieving more uniform and consistent results at the end of the method2000for forming the patterned device100′. At block2012, a third plasma of the gases provided to the process volume201of the process chamber200is generated after generating the second plasma. In some embodiments, the gases provided to the process volume201of the process chamber200for the third plasma are different gases or different flowrates of gases relative to the gases and flowrates provided to the process volume201of the process chamber200for the first plasma and second plasma. Furthermore, the electrical characteristics for the power provided to the antenna248and/or for the power provided to the electrode221may be different at block2012for generating the third plasma relative to block2004for generating the first plasma and relative to block2008for generating the second plasma. The third plasma generated in block2012can be generated using the same process conditions as those described above for the third plasma generated in block1012ofFIG.3. Exemplary process conditions to form the second plasma can also be found above in Table 3. Referring toFIGS.5and6D, at block2014, remaining portions of the patterned region101A and the unpatterned region101B of the tungsten-containing layer111are removed with the third plasma to expose a top surface of the supporting layer112(i.e., the surface previously covered by the tungsten-containing layer111). At the completion of block2014, the tungsten-containing layer111can be fully removed to form the patterned device100′ ofFIG.6Dwithout removing and/or damaging any underlying layers, such as supporting layer112. In some embodiments, a negligible amount of an underlying layer, such as the supporting layer112, is removed in one or more of the patterned region101A and/or the unpatterned region101B. For example, a thickness of the supporting layer112after generation of the third plasma within 0.5% of the thickness of the supporting layer112before generation of the first plasma is considered a negligible amount. The process conditions for the third plasma can be selected to selectively remove the tungsten-containing layer111(e.g., WC) relative to the supporting layer112(e.g., silicon oxide) at ratio is greater than 100:1, such as greater than 300:1, such as even greater than 1000:1. Overall, the methods described above provide solutions to overcoming the problem presented by removing a tungsten-containing layer disposed over a patterned device when the thickness of the tungsten-containing layer varies between a patterned region and an unpatterned region of the patterned device. These problems are overcome by (1) generating a first plasma to deposit a film over the patterned region of the tungsten-containing layer in the patterned region while removing portions of the tungsten-containing layer in the unpatterned region, followed by (2) generating a second plasma to remove the deposited film while also removing portions of the tungsten-containing layer in the patterned region and the unpatterned region that significantly reduces the initial thickness variation of the tungsten-containing layer between the patterned region and the unpatterned region, followed by (3) generating a third plasma to remove the remaining portions of the tungsten-containing layer in both the patterned region and the unpatterned region without any removal or damage to any underlying layers. While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow. | 43,043 |
11942333 | DETAILED DESCRIPTION Embodiments Hereinafter, one or more embodiments (also simply referred to as “embodiments”) according to the technique of the present disclosure will be described with reference to the drawings. Like reference numerals represent like components in the drawings, and redundant descriptions related thereto will be omitted. In the drawings, for the sake of convenience of the descriptions, features such as width, thickness and shape of each component may be schematically illustrated as compared with actual structures. However, the drawings are merely examples of the embodiments, and the embodiments according to the technique of the present disclosure are not limited thereto. (1) Configuration of Substrate Processing Apparatus FIG.1is a diagram schematically illustrating a cross-section of a single wafer type substrate processing apparatus (hereinafter, also simply referred to as a “substrate processing apparatus”)10of performing a method of manufacturing a semiconductor device when viewed from above. A transfer device of the substrate processing apparatus10of a cluster type according to the present embodiments is divided into a vacuum side and an atmospheric side. In addition, in the substrate processing apparatus10, a FOUP (Front Opening Unified Pod, hereinafter, also referred to as a “pod”)100is used as a carrier for transferring a wafer200serving as a substrate. <Configuration of Vacuum Side> As shown inFIG.1, the substrate processing apparatus10includes a first transfer chamber103capable of withstanding a pressure (negative pressure) below the atmospheric pressure such as a pressure in a vacuum state. For example, a housing101of the first transfer chamber103is pentagonal when viewed from above. The housing101is of a box shape with closed upper and lower ends. In the first transfer chamber103, a first substrate transfer device112configured to transfer the wafer200is installed. Auxiliary chambers (which are load lock chambers)122and123are connected to a side wall among five sidewalls of the housing101that is located on a front side (lower side inFIG.1) of the housing101via gate valves126and127, respectively. The auxiliary chambers122and123are capable of withstanding the negative pressure. The wafer200can be transferred (loaded) into or transferred (unloaded) out of the auxiliary chambers122and123. A process vessel202aserving as a part of a process module PM1, a process vessel202bserving as a part of a process module PM2, a process vessel202cserving as a part of a process module PM3and a process vessel202dserving as a part of a process module PM4, which are configured to perform a desired (predetermined) processing on the wafer200, are connected adjacently to the four sidewalls (among the five sidewalls) of the housing101that are located on a rear side (back side) (upper side inFIG.1) of the housing101of the first transfer chamber103with a gate valve70a, a gate valve70b, a gate valve70cand a gate valve70dinterposed therebetween, respectively. <Configuration of Atmospheric Side> A second transfer chamber121wherein the wafer200can be transferred under the atmospheric pressure is connected to front sides of the auxiliary chambers122and123via a gate valve128and a gate valve129. In the second transfer chamber121, a second substrate transfer device124configured to transfer the wafer200is installed. A notch aligner106is installed on a left side of the second transfer chamber121. The notch aligner106may be an orientation flat aligner. A substrate loading/unloading port134and a pod opener108are installed at a front side of a housing125of the second transfer chamber121to load the wafer200into or unload the wafer200out of the second transfer chamber121. A loading port structure (which is an I/O stage)105is installed opposite to the pod opener108with the substrate loading/unloading port134interposed therebetween. That is, the loading port structure105is installed outside the housing125. The pod opener108is configured to open and close a cap100aof the pod100. The pod opener108includes a closure (not shown) capable of opening and closing the substrate loading/unloading port134. When the cap100aof the pod100placed on the loading port structure105is opened or closed, the wafer200may be loaded into the pod100or unloaded out of the pod100. In addition, the pod100is loaded onto or unloaded out of the loading port structure105by an in-step transfer device (not shown) such as an OHT (Overhead Hoist Transfer). (2) Configuration of Process Module Subsequently, configurations of the process vessels202athrough202dof the process modules PM1through PM4will be described. Each of the process modules PM1through PM4functions as a part of the single wafer type substrate processing apparatus. The process modules PM1through PM4are provided with the process vessels202athrough202d, respectively. Since the configurations of the process vessels202athrough202dare substantially the same for the process modules PM1through PM4, a process vessel202among the process vessels202athrough202dwill be described in detail below. That is, the process vessels202athrough202dmay be individually referred to as the process vessel202. FIG.2is a diagram schematically illustrating an exemplary configuration of the process vessel202of the substrate processing apparatus10. <Process Vessel> For example, the process vessel202is constituted by a flat and sealed vessel whose horizontal cross-section is circular. The process vessel202is constituted by an upper vessel2021made of a non-metallic material such as quartz and ceramics and a lower vessel2022made of a metal material such as aluminum (Al) and stainless steel (SUS). A process space (also referred to as a “process chamber”)201in which the wafer200is processed is provided in an upper region (that is, a space above a substrate mounting table212described later) of the process vessel202, and a transfer space203is provided below the process space201in a space surrounded by the lower vessel2022. Lift pins207are provided at a bottom of the lower vessel2022. A substrate loading/unloading port206is provided on a side surface (side wall) of the lower vessel2022(which is a part of the process vessel202) adjacent to a gate valve205(which corresponds to one of the gate valves70athrough70ddescribed above). The wafer200can be transferred into or out of the transfer space203through the substrate loading/unloading port206. An O-ring209aserving as a seal is provided around the gate valve205. The gate valve205is constituted by a valve body205acapable of opening and closing the substrate loading/unloading port206and a shaft205bcapable of supporting the valve body205a. In other words, the gate valve205constituted by the valve body205aand the shaft205bis provided adjacent to the substrate loading/unloading port206. By elevating or lowering the shaft205band the valve body205a, it is possible to open or close the substrate loading/unloading port206. In addition, a viewport300is provided on a side surface (side wall) of the upper vessel2021(which is a part of the process vessel202). The viewport300is configured such that the process space201(which is an inner space of the process vessel202) can be visually recognized from an outside of the process vessel202through the viewport300. An O-ring209bserving as a seal is provided around the viewport300. Alternatively, as long as the process space201can be visually recognized through the viewport300, the viewport300may be provided on another wall such as an upper wall of the upper vessel2021. <Substrate Support> A substrate support (also referred to as a “susceptor”)210configured to support the wafer200is provided in the process space201. The substrate support210is constituted mainly by: the substrate mounting table212provided with a substrate placing surface211on which the wafer200is placed; and a heater213serving as a heating structure embedded in the substrate mounting table212. Through-holes214through which the lift pins207penetrate are provided at positions of the substrate mounting table212corresponding to the lift pins207. The substrate mounting table212is supported by a shaft217. The shaft217penetrates the bottom of the lower vessel2022, and is connected to an elevator218at the outside of the process vessel202. The wafer200placed on the substrate placing surface211of the substrate mounting table212can be elevated or lowered by operating the elevator218to elevate or lower the shaft217and the substrate mounting table212. In addition, a bellows219covers a periphery of a lower end portion of the shaft217to maintain the process space201airtight. When the wafer200is transferred, the substrate mounting table212is lowered until the substrate placing surface211faces the substrate loading/unloading port206(that is, until a wafer transfer position is reached). When the wafer200is processed, the wafer200is elevated until the wafer200reaches a processing position (also referred to as a “wafer processing position”) in the process space201. Specifically, when the substrate mounting table212is lowered to the wafer transfer position, upper ends of the lift pins207protrude from an upper surface of the substrate placing surface211, and the lift pins207support the wafer200from thereunder. In addition, when the substrate mounting table212is elevated to the wafer processing position, the lift pins207are buried from the upper surface of the substrate placing surface211and the substrate placing surface211supports the wafer200from thereunder. <Shower Head> A shower head230serving as a gas dispersion structure is provided at an upper portion of the process space201(that is, provided at an upstream side of the process space201in a gas supply direction). For example, the shower head230is inserted into a hole2021aprovided in the upper vessel2021. A lid231of the shower head230is made of, for example, an electrically conductive and thermally conductive metal. A block233is provided between the lid231and the upper vessel2021. The block233electrically and thermally insulates the lid231from the upper vessel2021. Further, an O-ring209cserving as a seal is provided between the lid231and the block233. In addition, a through-hole231ainto which a gas supply pipe241serving as a first dispersion structure is inserted is provided in the lid231of the shower head230. The gas supply pipe241inserted in the through-hole231ais configured to disperse a gas supplied into a shower head buffer chamber232(which is a space provided in the shower head230). For example, the gas supply pipe241is constituted by a front end structure241ainserted into the shower head230and a flange241bfixed to the lid231. For example, the front end structure241ais of a cylindrical shape, and a dispersion hole (or dispersion holes: not shown) is provided on a side surface of the front end structure241a. Then, a gas supplied through a gas supplier (which is a gas supply system or a gas supply structure) described later is supplied into the shower head buffer chamber232through the dispersion hole provided in the front end structure241a. In addition, the shower head230is provided with a dispersion plate234serving as a second dispersion structure configured to disperse the gas supplied through the gas supplier (gas supply system) described later. An upstream side of the dispersion plate234is referred to as the shower head buffer chamber232, and a downstream side of the dispersion plate234is referred to as the process space201. The dispersion plate234is provided with a plurality of through-holes234a. The dispersion plate234is arranged above the substrate placing surface211so as to face the substrate placing surface211. Therefore, the shower head buffer chamber232communicates with the process space201via the plurality of through-holes234aprovided in the dispersion plate234. Further, an O-ring209dserving as a seal is provided between the lid231and the dispersion plate234. The through-hole231ainto which the gas supply pipe241is inserted is provided in the shower head buffer chamber232. <Gas Supplier> A common gas supply pipe242is connected to the gas supply pipe241inserted into the through-hole231aprovided in the lid231of the shower head230. The gas supply pipe241and the common gas supply pipe242communicate with each other through their inner structures. Further, a gas supplied through the common gas supply pipe242is supplied into the shower head230through the gas supply pipe241and the through-hole231a. A first gas supply pipe243a, a second gas supply pipe244aand a third gas supply pipe245aare connected to the common gas supply pipe242. The second gas supply pipe244amay be connected to the common gas supply pipe242via a remote plasma structure (also referred to as a “remote plasma unit” or simply referred to as an “RPU”)244e. Although the second gas supply pipe244ais connected to the common gas supply pipe242via the remote plasma structure244eas shown inFIG.2, in case the remote plasma structure244eis not provided, the second gas supply pipe244acan be directly connected to the common gas supply pipe242. A first element-containing gas is mainly supplied through a first gas supplier (which is a first gas supply system or a first gas supply structure)243including the first gas supply pipe243a, and a second element-containing gas is mainly supplied through a second gas supplier (which is a second gas supply system or a second gas supply structure)244including the second gas supply pipe244a. When processing the wafer200, an inert gas is mainly supplied through a third gas supplier (which is a third gas supply system or a third gas supply structure)245including the third gas supply pipe245a, and when cleaning a component such as an inner space of the shower head230and the process space201, a cleaning gas is mainly supplied through the third gas supplier245. <First Gas Supplier> A first gas supply source243b, a mass flow controller (MFC)243cserving as a flow rate controller (flow rate control structure) and a valve243dserving as an opening/closing valve are sequentially provided in this order at the first gas supply pipe243afrom an upstream side toward a downstream side of the first gas supply pipe243a. A gas containing a first element (hereinafter, also referred to as the “first element-containing gas”) is supplied into the shower head230from the first gas supply source243bthrough the first gas supply pipe243aprovided with the MFC243cand the valve243dand the common gas supply pipe242. The first element-containing gas serves as a source gas, which is one of process gases. According to the present embodiments, for example, the first element is silicon (Si). That is, for example, the first element-containing gas includes a silicon-containing gas. A source material of the first element-containing gas may be in a solid state, a liquid state or a gaseous state under the normal temperature and the normal pressure. When the source material of the first element-containing gas is in a liquid state under the normal temperature and the normal pressure, a vaporizer (not shown) may be provided between the first gas supply source243band the MFC243c. Hereinafter, the present embodiments will be described in detail by way of an example in which the source material of the first element-containing gas is in a gaseous state under the normal temperature and the normal pressure. A downstream end of a first inert gas supply pipe246ais connected to the first gas supply pipe243adownstream of the valve243dprovided at the first gas supply pipe243a. An inert gas supply source246b, a mass flow controller (MFC)246cserving as a flow rate controller (flow rate control structure) and a valve246dserving as an opening/closing valve are sequentially provided in this order at the first inert gas supply pipe246afrom an upstream side toward a downstream side of the first inert gas supply pipe246a. The inert gas is supplied into the shower head230from the inert gas supply source246bthrough the first inert gas supply pipe246aprovided with the MFC246cand the valve246d, the first gas supply pipe243aand the common gas supply pipe242. According to the present embodiments, the inert gas acts as a carrier gas of the first element-containing gas. It is preferable that a gas that does not react with the first element is used as the inert gas. Specifically, for example, nitrogen (N2) gas may be used as the inert gas. Alternatively, instead of the N2 gas, a rare gas such as helium (He) gas, neon (Ne) gas and argon (Ar) gas may be used as the inert gas. The first gas supplier (also referred to as a “silicon-containing gas supplier”, a “silicon-containing gas supply system”, or a “silicon-containing gas supply structure”)243is constituted mainly by the first gas supply pipe243a, the MFC243cand the valve243d. A first inert gas supplier (which is a first inert gas supply system or a first inert gas supply structure) is constituted mainly by the first inert gas supply pipe246a, the MFC246cand the valve246d. The first gas supplier243may further include the first gas supply source243band the first inert gas supplier. In addition, the first inert gas supplier may further include the inert gas supply source246band the first gas supply pipe243a. Since the first gas supplier243is configured to supply the source gas which is one of the process gases, the first gas supplier243is a part of a process gas supplier (also referred to as a “process gas supply system” or a “process gas supply structure”). <Second Gas Supplier> The remote plasma structure244eis provided downstream of the second gas supply pipe244a. A second gas supply source244b, a mass flow controller (MFC)244cserving as a flow rate controller (flow rate control structure) and a valve244dserving as an opening/closing valve are sequentially provided in this order at the second gas supply pipe244afrom an upstream side toward a downstream side of the second gas supply pipe244a. A gas containing a second element (hereinafter, also referred to as the “second element-containing gas”) is supplied into the shower head230from the second gas supply source244bthrough the second gas supply pipe244aprovided with the MFC244cand the valve244d, the remote plasma structure244eand the common gas supply pipe242. When the second element-containing gas is supplied onto the wafer200in a plasma state, the remote plasma structure244eis operated to convert the second element-containing gas into the plasma state. The second element-containing gas serves as a reactive gas or a modifying gas, which is one of process gases. According to the present embodiments, for example, the second element-containing gas contains the second element different from the first element described above. For example, the second element is one of oxygen (O), nitrogen (N) and carbon (C). According to the present embodiments, for example, a nitrogen-containing gas may be used as the second element-containing gas. Specifically, for example, ammonia (NH3) gas may be used as the nitrogen-containing gas. A downstream end of a second inert gas supply pipe247ais connected to the second gas supply pipe244adownstream of the valve244dprovided at the second gas supply pipe244a. An inert gas supply source247b, a mass flow controller (MFC)247cserving as a flow rate controller (flow rate control structure) and a valve247dserving as an opening/closing valve are sequentially provided in this order at the second inert gas supply pipe247afrom an upstream side toward a downstream side of the second inert gas supply pipe247a. The inert gas is supplied into the shower head230from the inert gas supply source247bthrough the second inert gas supply pipe247aprovided with the MFC247cand the valve247d, the second gas supply pipe244aand the common gas supply pipe242. According to the present embodiments, the inert gas acts as a carrier gas of the second element-containing gas or a dilution gas of the second element-containing gas in a substrate processing described later. Specifically, for example, the N2 gas may be used as the inert gas. Alternatively, instead of the N2 gas, a rare gas such as helium (He) gas, neon (Ne) gas and argon (Ar) gas may be used as the inert gas. The second gas supplier (also referred to as a “nitrogen-containing gas supplier”, a “nitrogen-containing gas supply system”, or a “nitrogen-containing gas supply structure”)244is constituted mainly by the second gas supply pipe244a, the MFC244cand the valve244d. A second inert gas supplier (which is a second inert gas supply system or a second inert gas supply structure) is constituted mainly by the second inert gas supply pipe247a, the MFC247cand the valve247d. The second gas supplier244may further include the second gas supply source244b, the remote plasma structure244eand the second inert gas supplier. In addition, the second inert gas supplier may further include the inert gas supply source247b, the second gas supply pipe244aand the remote plasma structure244e. Since the second gas supplier244is configured to supply the reactive gas or the modifying gas, which is one of the process gases, the second gas supplier244is a part of the process gas supplier (also referred to as the process gas supply system or the process gas supply structure). <Third Gas Supplier> A third gas supply source245b, a mass flow controller (MFC)245cserving as a flow rate controller (flow rate control structure) and a valve245dserving as an opening/closing valve are sequentially provided in this order at the third gas supply pipe245afrom an upstream side toward a downstream side of the third gas supply pipe245a. The cleaning gas is supplied into the shower head230from the third gas supply source245bthrough the third gas supply pipe245aprovided with the MFC245cand the valve245dand the common gas supply pipe242. A downstream end of a third inert gas supply pipe248ais connected to the third gas supply pipe245adownstream of the valve245dprovided at the third gas supply pipe245a. An inert gas supply source248b, a mass flow controller (MFC)248cserving as a flow rate controller (flow rate control structure) and a valve248dserving as an opening/closing valve are sequentially provided in this order at the third inert gas supply pipe248afrom an upstream side toward a downstream side of the third inert gas supply pipe248a. The inert gas is supplied into the shower head230from the inert gas supply source248bthrough the third inert gas supply pipe248aprovided with the MFC248cand the valve248d, the third gas supply pipe245aand the common gas supply pipe242. In a film-forming step described later, the inert gas is supplied into the shower head230from the inert gas supply source248bthrough the third inert gas supply pipe248aprovided with the MFC248cand the valve248d, the third gas supply pipe245aand the common gas supply pipe242. The inert gas supplied into the shower head230in the film-forming step acts as a purge gas of purging a gas remaining in the process vessel202or in the shower head230. Specifically, for example, the N2 gas may be used as the inert gas. Alternatively, instead of the N2 gas, a rare gas such as helium (He) gas, neon (Ne) gas and argon (Ar) gas may be used as the inert gas. In a cleaning step described later, the cleaning gas is supplied into the shower head230from the third gas supply source245bthrough the third gas supply pipe245aprovided with the MFC245cand the valve245dand the common gas supply pipe242. The cleaning gas supplied into the shower head230in the cleaning step acts as a gas of cleaning deposits remaining in the process vessel202or in the shower head230. Specifically, for example, nitrogen trifluoride (NF3) gas or chlorine trifluoride (ClF3) gas may be used as the cleaning gas. The third gas supplier (also referred to as a “cleaning gas supplier”, a “cleaning gas supply system”, or a “cleaning gas supply structure”)245is constituted mainly by the third gas supply pipe245a, the MFC245cand the valve245d. The third gas supplier245may further include the third gas supply source245b. A third inert gas supplier (which is a third inert gas supply system or a third inert gas supply structure) is constituted mainly by the third inert gas supply pipe248a, the MFC248cand the valve248d. The third inert gas supplier may further include the inert gas supply source248band the third gas supply pipe245a. The third gas supplier245may further include the third inert gas supplier. <Gas Exhauster> A gas exhauster (which is a gas exhaust system or a gas exhaust structure) through which an inner atmosphere of the process vessel202is exhausted includes an exhaust pipe263connected to the process vessel202. Specifically, the gas exhauster includes the exhaust pipe263connected to the process space201. The exhaust pipe263is connected to the process space201at a side portion of the process space201. An APC (Automatic Pressure Controller)276serving as a pressure controller configured to adjust (control) an inner pressure of the process space201to a predetermined pressure is provided at the exhaust pipe263. The APC276includes a valve body (not shown) capable of adjusting an opening degree thereof. The APC276is configured to adjust a conductance of the exhaust pipe263in accordance with an instruction from a controller500described later. In addition, a valve275serving as an opening/closing valve is provided at the exhaust pipe263upstream of the APC276, and a valve277serving as an opening/closing valve is provided at the exhaust pipe263downstream of the APC276. In addition, a vacuum pump278is provided at the exhaust pipe263downstream of the valve277. The vacuum pump278is configured to exhaust the inner atmosphere of the process space201through the exhaust pipe263. (3) Configuration of Cooling Structure Subsequently, a cooling structure provided in the process vessel202will be described in detail. First, the reason for providing the cooling structure will be described. In the film-forming step of forming a film on the wafer200, it is preferable to maintain the wafer200in a high temperature state. This is because, by maintaining the wafer200in the high temperature state, the energy of the gas supplied into the process space201and a reaction state on the wafer200may be higher than those in a low temperature (for example, room temperature) state. On the other hand, in the cleaning step, it is preferable that an inner temperature of the process vessel202is lower than that of the process vessel202in the film-forming step. Specifically, as a measure against corrosion, for example, a coating such as a nickel fluoride coating may be formed on a component (such as the shaft217configured to support the shower head230and the substrate mounting table212) made of a metal material such as stainless steel (SUS). In addition, as the measure against corrosion, for example, the coating such as the nickel fluoride coating may also be formed on a component such as the substrate loading/unloading port206and the gate valve205. When the cleaning gas such as the NF3 gas and the ClF3 gas is supplied to the component coated with the nickel fluoride coating in a high temperature state, the cleaning gas may react with the nickel fluoride coating and thus the nickel fluoride coating may be peeled off. Thereby, particles may be generated due to a reaction between the cleaning gas and the nickel fluoride coating, and thus the film may be contaminated. In addition, when the shower head230also serves as an electrode for generating a plasma, if the coating is peeled off and becomes non-uniform, there occurs a difference in a plasma generation state between a portion with the coating and a portion without the coating, which leads to a non-uniform plasma generation. As a result, it may not be possible to form the film uniformly on the wafer200. In addition, an electric power may be concentrated on a portion with no coating where the coating is peeled off, and as a result, an abnormal discharge may occur. In addition, the process gases may corrode the metal material to thereby further generate the particles. Further, when the coating is non-uniform on a surface of the component parallel to the wafer200, an amount of the plasma may become non-uniform on a surface of the wafer200. Further, when the coating is non-uniform in the plurality of through-holes234aof the shower head230along the vertical direction, the amount of plasma differs in each of the plurality of through-holes234a. For the above reasons, after the film-forming step is performed in the high temperature state and before the cleaning step is performed, it is preferable that a location (or component) where defects occur when the cleaning gas is supplied in the high temperature state is cooled and maintain in the low temperature state. Hereinafter, the location where the defects occur when the cleaning gas is supplied in the high temperature state may also be referred to as a “low temperature structure”. Therefore, as for such regions made of a material susceptible to corrosion by the process gases and being in contact with the process gases, a temperature lowering step is performed to cool the low temperature structure such as the shower head230and the shaft217where a corrosion prevention coating is performed. Subsequently, a configuration of the cooling structure configured to cool the low temperature structure such as the shower head230and the shaft217will be described in detail with reference toFIG.2. A piping structure316is embedded around the lid231of the shower head230and in the vicinity of the O-rings209cand209d. Specifically, the piping structure316is provided between a heater416described later and the O-ring209cand between the heater416and the O-ring209d. In addition, a piping structure317is embedded around the substrate mounting table212and on an outer periphery of the heater213. Further, a piping structure318extending in an axial direction is embedded inside the shaft217configured to support the substrate mounting table212. The piping structure318includes an outward path and a return path, each of which is connected to the piping structure317. A coolant supply pipe similar to a supply pipe310described later is connected to the outward path such that a coolant can be supplied to the outward path. Further, a coolant discharge pipe similar to a discharge pipe311described later is connected to the return path. The coolant supplied through the coolant supply pipe is supplied to the outward path of the piping structure318and the piping structure317, and is discharged through the coolant discharge pipe via the return path of the piping structure318. Further, a piping structure322is embedded on the side surface (side wall) of the lower vessel2022above a periphery of the substrate loading/unloading port206between the O-ring209aand a heater422described later. In addition, a piping structure319is embedded below the periphery of the substrate loading/unloading port206between the O-ring209aand a heater419described later. That is, the piping structures319and322are arranged in a circumferential direction on the side surface (side wall) of the lower vessel2022, and the heaters419and422are arranged at inner peripheral regions of the piping structures319and322, respectively. Further, a piping structure321extending in the axial direction is embedded inside the shaft205bconfigured to support the valve body205aof the gate valve205. In addition, a piping structure320is embedded around the viewport300between the O-ring209band a heater420described later. The coolant (cooling medium) is supplied to each of the piping structures316,317,318,319,320,321and322. That is, each of the piping structures316,317,318,319,320,321and322is used as a coolant flow path. Each of the piping structures316,317,318,319,320,321and322is made of a metal piping material with a high thermal conductivity such as aluminum (Al). In the present specification, the coolant is a medium capable of maintaining a property of cooling even at a first temperature described later. For example, the coolant may be a gaseous coolant such as an inert gas or air. Therefore, it is possible to immediately cool the housing after processing the wafer200at the first temperature. As a comparative example, for example, a liquid coolant (for example, Galden) may be used. However, when the liquid coolant is used, the liquid coolant may boil at the first temperature (for example, 800° C.) described later and a cooling effect may deteriorate. On the other hand, when the gaseous coolant such as the inert gas or the air is used, the cooling effect can be maintained even at the first temperature. Therefore, it is possible to cool the housing in the high temperature state, and as a result, it is possible to reduce the downtime. The heater416serving as a heating structure is provided around the lid231and located radially more inward than the piping structure316. That is, the heater416is provided closer to a center of the process space201than the piping structure316. Further, the heater213is located radially more inward than the piping structure317. That is, the heater213is provided closer to the center of the process space201than the piping structure317. In addition, the heater419serving as a heating structure is provided below the periphery of the substrate loading/unloading port206and located radially more inward than the piping structure319(at an inner side of the process vessel202). That is, the heater419is provided closer to the center of the process space201than the piping structure319. Further, the heater422serving as a heating structure is provided above the periphery of the substrate loading/unloading port206and located radially more inward than the piping structure322(at the inner side of the process vessel202). That is, the heater422is provided closer to the center of the process space201than the piping structure322. In addition, the heater420serving as a heating structure is provided around the viewport300and located radially more inward than the piping structure320(at the inner side of the process vessel202). That is, the heater420is provided closer to the center of the process space201than the piping structure320. The piping structures316,317,318,319,320,321and322are connected to one another via separate pipes. The supply pipe310through which the coolant is supplied is connected to an upstream end of the piping structure319, and the discharge pipe311through which the coolant is discharged is connected to a downstream end of the piping structure322. That is, the piping structures316,319,320,321and322communicate with the supply pipe310and the discharge pipe311. That is, the supply pipe310through which the coolant is supplied is connected to an upstream end of the coolant flow path configured by connecting the piping structures316,319,320,321and322, and the discharge pipe311through which the coolant is discharged to the outside of the process vessel202is connected to a downstream end of the coolant flow path. By combining the supply pipe and the discharge pipe as described above, it is possible to reduce the number of components for supplying and discharging the coolant, and it is also possible to reduce a cost of providing the components for supplying and discharging the coolant. Alternatively, the supply pipe310and the discharge pipe311may be connected to other piping structures, respectively. Further, the supply pipe310through which the coolant is supplied may be connected to an upstream end of a coolant flow path configured by connecting the piping structures316through322, and the discharge pipe311through which the coolant is discharged to the outside of the process vessel202may be connected to a downstream end of the coolant flow path configured by connecting the piping structures316through322. A coolant gas supplier (which is a coolant gas supply system or a coolant gas supply structure)310aand a valve310bserving as an opening/closing valve are sequentially provided in this order at the supply pipe310from an upstream side toward a downstream side of the supply pipe310. The coolant gas supplier310ais configured such that the coolant is supplied to the coolant flow path through the coolant gas supplier310a. That is, the supply pipe310is used as a supply pipe through which the coolant is supplied to the coolant flow path. Further, a valve311bserving as an opening/closing valve is provided at the discharge pipe311, and a vacuum pump311cis connected to the discharge pipe311at a downstream end of the discharge pipe311. That is, the vacuum pump311cis connected to the coolant flow path. In addition, a pipe312serving as a branch path is connected to the discharge pipe311upstream of the valve311b. A valve312bis provided at the pipe312. That is, the discharge pipe311is used as an exhaust pipe through which the coolant in the coolant flow path is discharged (or exhausted) to the outside of the process vessel202. By cooling the low temperature structure such as the shower head230and the shaft217to a predetermined temperature or lower as described above, it is possible to reduce a thermal effect on the low temperature structure where the defects occur when being supplied with the cleaning gas at the first temperature (which is a film-forming temperature). By supplying the coolant to the coolant flow path provided at locations such as a wall surface of the process vessel202, the shower head230, the substrate mounting table212and the shafts217and205bin the temperature lowering step and vacuum-exhausting the coolant flow path in a temperature elevating step and by using the heaters416,419,420and422located radially more inward than the coolant flow path, it is possible to shorten a temperature lowering time and a temperature elevating time, and as a result, it is also possible to improve an operating rate of the substrate processing apparatus10. Further, by arranging the coolant flow path in the vicinity of the O-rings209athrough209din a manner similar to that described above, it is possible to prevent (or suppress) the O-rings209athrough209dfrom deteriorating. Therefore, the O-rings209athrough209dmay also be referred to as the low temperature structure. In addition, the wall surface of the process vessel202in the vicinity of the substrate loading/unloading port206or in the vicinity of the viewport300may also be referred to as the low temperature structure. Further, temperature sensors516,517,518,519,520and521(which are configured to detect temperatures in the vicinity of the piping structures316,317,318,319,320,321and322, respectively) are provided in the vicinity of the piping structures316,317,318,319,320,321and322, respectively. (4) Configuration of Controller Subsequently, a configuration of the controller500serving as a control apparatus (control structure) will be described. The controller500controls the above-described components of the substrate processing apparatus10to perform the substrate processing described later. As shown inFIG.3, the controller500is constituted by a computer including a CPU (Central Processing Unit)500a, a RAM (Random Access Memory)500b, a memory500cand an I/O port500d. The RAM500b, the memory500cand the I/O port500dmay exchange data with the CPU500athrough an internal bus500e. For example, an input/output device501such as a touch panel and a display device472such as a display are connected to the controller500. The memory500cis configured by a component such as a flash memory and a hard disk drive (HDD). For example, a control program configured to control the operation of the substrate processing apparatus10or a process recipe containing information on the sequences and conditions of the substrate processing described later may be readably stored in the memory500c. The process recipe is obtained by combining steps of the substrate processing described later such that the controller500can execute the steps to acquire a predetermined result, and functions as a program. Hereafter, the process recipe and the control program may be collectively or individually referred to as a “program”. In the present specification, the term “program” may refer to the process recipe alone, may refer to the control program alone, or may refer to both of the process recipe and the control program. The RAM500bfunctions as a memory area (work area) where a program or data read by the CPU500ais temporarily stored. The I/O port500dis connected to the above-described components such as the heaters213,416,419,420and422, the MFCs243c,244c,245c,246c,247cand248c, the valves243d,244d,245d,246d,247d,248d,275,277,310b,311band312b, the APC276, the vacuum pumps278and311c, the gate valve205, the elevator218, the first substrate transfer device112, the second substrate transfer device124and the temperature sensors516,517,518,519,520and521. The CPU500ais configured to read the control program from the memory500cand execute the read control program. In addition, the CPU500ais configured to read the recipe from the memory500cin accordance with an operation command inputted from the input/output device501. According to the contents of the read recipe, the CPU500amay be configured to be capable of controlling various operations such as heating and cooling operations for the wafer200by the heater213, a pressure adjusting operation by the APC276, flow rate adjusting operations for the process gases by the MFCs243c,244c,245c,246c,247cand248cand the valves243d,244d,245d,246d,247dand248d, an elevating and rotating operation for the substrate support210by the elevator218, a supplying and discharging operation and a vacuum-exhausting operation for the coolant to the coolant flow path by the temperature sensors516,517,518,519,520and521, the valves310b,311band312band the vacuum pump311c, and a temperature elevating and lowering operation for the process vessel202by the heaters416,419,420and422. The controller500is not limited to a dedicated computer, and may be embodied by a general-purpose computer. For example, the controller500may be embodied by preparing an external memory473(for example, a magnetic tape, a magnetic disk such as a flexible disk and a hard disk, an optical disk such as a CD and a DVD, a magneto-optical disk such as an MO, a semiconductor memory such as a USB memory and a memory card) where the above-described program is stored and installing the program onto the general-purpose computer using the external memory473. A method of providing the program to the computer is not limited to using the external memory473. For example, the program may be supplied to the computer (general-purpose computer) using communication means such as the Internet and a dedicated line instead of the external memory473. Further, the memory500cor the external memory473may be embodied by a non-transitory computer readable recording medium. Hereafter, the memory500cand the external memory473may be collectively or individually referred to as a “recording medium”. In the present specification, the term “recording medium” may refer to the memory500calone, may refer to the external memory473alone or may refer to both of the memory500cand the external memory473. (5) Substrate Processing Hereinafter, as a part of a manufacturing process of a semiconductor device, a process (that is, the substrate processing) of forming a film on the wafer200using the process vessel202will be described. In the following description, the operations of the components constituting the substrate processing apparatus10are controlled by the controller500. In the following description, an example of forming a silicon nitride film (also simply referred to as an “SiN film”) serving as the film on the wafer200by alternately supplying the first element-containing gas (first process gas) and the second element-containing gas (second process gas) to the wafer200will be described. For example, a silicon-containing gas obtained by vaporizing hexachlorodisilane (Si2Cl6, abbreviated as HCDS) gas is used as the first element-containing gas, and the NH3 gas is used as the second element-containing gas. FIG.4is a flowchart schematically illustrating the substrate processing according to the embodiments of the present disclosure. <Temperature Elevating Step: S10> In the temperature elevating step S10, the inner temperature of the process vessel202is elevated while the wafer200is not supported by the substrate support210. In the temperature elevating step S10, it is preferable to safely prevent the outside of the process vessel202from entering the high temperature state. Therefore, in the temperature elevating step S10, the controller500turns on the power of each of the heaters416,419,420,422and213while maintaining insides of the piping structures316,319,320,321and322in a vacuum state. Further, with the valves310band312bclosed and the valve311bopen, the vacuum pump311cis operated to vacuum-exhaust (evacuate) the insides of the piping structures316,319,320,321and322. That is, the coolant flow path is vacuum-exhausted to perform the temperature elevating step S10. Therefore, the coolant flow path is used as a vacuum heat insulator such that it is possible to prevent the heat inside the process vessel202from being released to the outside of the process vessel202. It is also possible to shorten an amount of time taken to elevate a temperature up to the first temperature (which is the film-forming temperature). In addition, since the coolant flow path is provided between the heater and each 0-ring, it is possible to reduce the heat conduction from each heater to the coolant flow path, and as a result, it is possible to prevent (or suppress) the O-ring from deteriorating. For example, a distance between the substrate placing surface211and the shower head230in the temperature elevating step S10is set to be greater than the distance between the substrate placing surface211and the shower head230in the film-forming step S12described later. Thereby, it is possible to reduce an influence of the heater213provided at the substrate support210, and as a result, it is also possible to suppress a temperature elevation of the shower head230due to the heat generated by the heater213. <Substrate Loading, Placing and Heating Step: S11> In the substrate loading, placing and heating step S11, first, the substrate mounting table212in the process vessel202is lowered to the wafer transfer position such that the lift pins207penetrate the through-holes214of the substrate mounting table212. As a result, the lift pins207protrude from a surface of the substrate mounting table212by a predetermined height. Subsequently, the gate valve205is opened such that the transfer space203communicates with the first transfer chamber103. Then, the wafer200is transferred (loaded) into the transfer space203using the first substrate transfer device112provided in the first transfer chamber103such that the wafer200is placed onto the lift pins207. As a result, the wafer200is supported in a horizontal orientation on the lift pins207protruding from the surface of the substrate mounting table212. After the wafer200is loaded into the process vessel202(that is, into the first transfer chamber103), the first substrate transfer device112is retracted to the outside of the process vessel202, and the gate valve205is closed to seal (close) the inside of the process vessel202hermetically. Thereafter, by elevating the substrate mounting table212, the wafer200is placed on the substrate placing surface211of the substrate mounting table212. By further elevating the substrate mounting table212, the wafer200is elevated to the processing position (wafer processing position) in the process space201described above. After the wafer200is loaded into the transfer space203and elevated to wafer the processing position in the process space201, the valve277and the valve275are opened to communicate the process space201with the APC276and the APC276with the vacuum pump278. By adjusting the conductance of the exhaust pipe263, the APC276controls (adjusts) an exhaust flow rate of the process space201by the vacuum pump278, and maintains the inner pressure of the process space201at a predetermined pressure (for example, a high vacuum of 10-5 Pa to 10-1 Pa). In the substrate loading, placing and heating step S11, the inner pressure of the process space201is adjusted to the predetermined pressure, and the heater213is controlled such that a surface temperature of the wafer200is adjusted to a temperature at which the wafer200is processed (that is, the first temperature). For example, the first temperature is set to a temperature within a range from 700° C. to 1,000° C., specifically 800° C. to 900° C. According to the present embodiments, the first temperature refers to a temperature at which the film such as the SiN film can be formed in the film-forming step S12described later. In addition, in the present specification, for example, a numerical range such as “700° C. to 1,000° C.” refers to a range that a lower limit and an upper limit are included in the numerical range. Therefore, for example, the numerical range “700° C. to 1,000° C.” means a range equal to or more than 700° C. and equal to or less than 1,000° C. The same also applies to other numerical ranges described herein. <Film-forming Step: S12> Subsequently, the film-forming step S12is performed. Hereinafter, the film-forming step S12will be described in detail with reference toFIG.5. As the film-forming step S12, a cyclic process may be performed by repeating alternately supplying different process gases (that is, by repeatedly and alternately performing a first process gas supply step S20and a second process gas supply step S22described later). Further, in the film-forming step S12, the wafer200is heated to the first temperature while the wafer200is supported by the substrate support210, and the process gases are supplied into the process vessel202accommodating the substrate support210. Therefore, the film-forming step S12may also be referred to as a “process gas supply step”. In addition, the process gases may also be collectively or individually referred to as the “process gas”. Further, the film-forming step S12is performed in a state in which the corrosion prevention coating is performed on a region of the shower head230(which is made of a material susceptible to corrosion by the process gases) in contact with the process gases. In addition, similar to the shower head230, the film-forming step S12is performed in a state in which the low temperature structure such as the shaft217is coated by the corrosion prevention coating. According to the present embodiments, in the film-forming step S12, the controller500operates the vacuum pump311cwith the valves310band312bclosed and the valve311bopen so as to vacuum-exhaust (evacuate) the insides of the piping structures316,319,320,321and322. That is, the coolant flow path is vacuum-exhausted to perform the film-forming step S12. Therefore, the coolant flow path is used as the vacuum heat insulator such that it is possible to prevent the heat inside the process vessel202from being released to the outside of the process vessel202. In addition, in the film-forming step S12, as long as the temperature of the wafer200can be maintained at the first temperature, the power of each of the heaters416,419,420and422may be turned off. <First Process Gas Supply Step: S20> In the film-forming step S12, the first process gas supply step S20is performed first. When the silicon-containing gas serving as the first process gas (first element-containing gas) is supplied in the first process gas supply step S20, with the valve243dopen, the MFC243cis controlled such that a flow rate of the silicon-containing gas is adjusted to a predetermined flow rate. As a result, a supply of the silicon-containing gas into the process space201is started. In addition, for example, a supply flow rate of the silicon-containing gas may be equal to or more than 100 sccm and equal to or less than 5,000 sccm. When supplying the silicon-containing gas, with the valve248dof the third gas supplier245open, the N2 gas is supplied through the third gas supply pipe245a. In addition, the N2 gas may be flown through the first inert gas supplier. Further, prior to the film-forming step S12, a supply of N2 gas through the third gas supply pipe245amay be started. The silicon-containing gas supplied into the process space201is then supplied onto the wafer200. By the silicon-containing gas contacting the surface of the wafer200, a silicon-containing layer serving as a first element-containing layer is formed on the surface of the wafer200. For example, the silicon-containing layer of a predetermined thickness and a predetermined distribution is formed according to the conditions such as an inner pressure of the process vessel202(that is, the inner pressure of the process space201), the flow rate of the silicon-containing gas, a temperature of the substrate support (susceptor)210and a time taken for the silicon-containing gas to pass through the process space201. A predetermined film may be formed on the wafer200in advance. Further, a predetermined pattern may be formed in advance on the wafer200or the predetermined film. After a predetermined time has elapsed from the start of the supply of the silicon-containing gas, the valve243dis closed to stop the supply of the silicon-containing gas. For example, a supply time (time duration) of supplying the silicon-containing gas may be equal to or more than 2 seconds and equal to or less than 20 seconds. In the first process gas supply step S20, with the valve275and the valve277open, the inner pressure of the process space201is controlled (adjusted) by the APC276to a predetermined pressure. <Purge Step: S21> After the supply of the silicon-containing gas is stopped, the N2 gas is supplied through the third gas supply pipe245ato purge the process space201. In the purge step S21, with the valve275and the valve277open, the inner pressure of the process space201is controlled (adjusted) by the APC276to a predetermined pressure. As a result, the silicon-containing gas that could not be bonded to the wafer200in the first process gas supply step S20is removed from the process space201by the vacuum pump278through the exhaust pipe263. In the purge step S21, a large amount of the purge gas may be supplied to improve an exhaust efficiency in order to remove the silicon-containing gas remaining in the wafer200, the process space201and the shower head buffer chamber232. After the process space201is sufficiently purged, the pressure control by the APC276is resumed with the valve275and the valve277open. Further, the N2 gas may be continuously supplied through the third gas supply pipe245ato purge the shower head230and the process space201. <Second Process Gas Supply Step: S22> After the shower head buffer chamber232and the process space201are purged, the second process gas supply step S22is subsequently performed. In the second process gas supply step S22, with the valve244dopen, a supply of the NH3 gas serving as the second process gas (second element-containing gas) into the process space201through the shower head230is started. In the second process gas supply step S22, the MFC244cis controlled such that a flow rate of the NH3 gas is adjusted to a predetermined flow rate. For example, a supply flow rate of the NH3 gas may be equal to or more than 1,000 sccm and equal to or less than 10,000 sccm. In addition, in the second process gas supply step S22, with the valve248dof the third gas supplier245open, the N2 gas is supplied through the third gas supply pipe245a. By supplying the N2 gas through the third gas supply pipe245a, it is possible to prevent the NH3 gas from entering the third gas supplier245. The NH3 gas is supplied into the process space201through the shower head230. The NH3 gas supplied into the process space201reacts with the silicon-containing layer on the wafer200. Thereby, the silicon-containing layer formed on the wafer200is modified by the NH3 gas. As a result, for example, a silicon nitride layer (also simply referred to as an “SiN layer”) containing silicon (Si) and nitrogen (N) is formed on the wafer200. After a predetermined time has elapsed from the start of the supply of the NH3 gas, the valve244dis closed to stop the supply of the NH3 gas. For example, a supply time (time duration) of supplying the NH3 gas may be equal to or more than 2 seconds and equal to or less than 20 seconds. In the second process gas supply step S22, similar to the first process gas supply step S20, the inner pressure of the process space201is controlled (adjusted) by the APC276to become a predetermined pressure with the valve275and the valve277open. <Purge Step S23> After the supply of the NH3 gas is stopped, the purge step S23similar to the purge step S21described above is performed. The operations of the components of the substrate processing apparatus10in the purge step S23is similar to those of the components in the purge step S21. Therefore, the detailed descriptions of the purge step S23are omitted. <Determination Step: S24> In the determination step S24, the controller500determines whether a cycle including the first process gas supply step S20, the purge step S21, the second process gas supply step S22and the purge step S23has been performed a predetermined number of times (n times). By performing the cycle the predetermined number of times, the SiN layer of a desired thickness is formed on the wafer200. After the film-forming step S12constituted by the first process gas supply step S20, the purge step S21, the second process gas supply step S22and the purge step S23is performed the predetermined number of times (n times), a substrate unloading step S13is performed. <Substrate Unloading Step: S13> In the substrate unloading step S13, the processed wafer200is transferred (unloaded) out of the process vessel202in the order reverse to that of the substrate loading, placing and heating step S11. <Determination Step: S14> In the determination step S14, the controller500determines whether a cycle including the substrate loading, placing and heating step S11, the film-forming step S12and the substrate unloading step S13has been performed a predetermined number of times (m times). When it is determined, in the determination step S14, that the cycle has not been performed the predetermined number of times (m times) (“NO” inFIG.4), the substrate loading, placing and heating step S11, the film-forming step S12and the substrate unloading step S13are performed again to process a next wafer (unprocessed wafer)200. When it is determined, in the determination step S14, that the cycle has been performed the predetermined number of times (m times) (“YES” inFIG.4), a temperature lowering step S15is subsequently performed. By performing the cycle the predetermined number of times (m times), the SiN film of a desired thickness is formed on the wafer200and the locations such as the wall surface of the process vessel202. <Temperature Lowering Step: S15> In the temperature lowering step S15, while the wafer200is not supported by the substrate support210, the coolant is supplied into the piping structures316,317,318,319,320,321and322for a predetermined time. That is, by supplying the coolant to the coolant flow path for the predetermined time, a temperature of the low temperature structure such as the shower head230and the shaft217and the inner temperature of the process vessel202are lowered to a predetermined temperature. That is, in the temperature lowering step S15, the coolant is supplied to the coolant flow path provided in the process vessel202for the predetermined time after the film forming step S12. As a result, the temperature of the low temperature structure such as the shower head230and the shaft217is lowered to a second temperature lower than the first temperature and at which the coating does not deteriorate. In the temperature lowering step S15, with the power of each of the heaters213,416,419,420and422turned off, the valves310band312bopen and the valve311bclosed, the controller500controls the coolant gas supplier310ato supply the coolant to the coolant flow path. The coolant supplied through the coolant gas supplier310ais discharged to an outside of the substrate processing apparatus10through the supply pipe310, the valve310b, the piping structures319,316,320,321, and322, the discharge pipe311, the pipe312and the valve312b. That is, in the temperature lowering step S15, the coolant is supplied to the coolant flow path through the coolant gas supplier310ato cool the vicinities of the piping structures319,316,317,318,320,321and322. In the temperature lowering step S15, when the inner temperature of the process vessel202is lowered to the second temperature based on the temperature information detected by the temperature sensors516through521, the valves310band312bare closed to stop the supplying and discharging operation of the coolant to the coolant flow path. As a result, it is possible to shorten an amount of time taken to lower a temperature down to the second temperature (which is a cleaning temperature). For example, the distance between the substrate placing surface211and the shower head230in the temperature lowering step S15may be set to be greater than the distance between the substrate placing surface211and the shower head230in the film-forming step S12described above. Thereby, it is possible to reduce the influence of the heater213provided at the substrate support210, and as a result, it is also possible to suppress the temperature elevation of the shower head230due to the heat generated by the heater213or accumulated in the substrate mounting table212. <Cleaning Step: S16> In the cleaning step S16, the cleaning gas is supplied into the process vessel202. That is, while the wafer200is not supported by the substrate support210, the cleaning gas is supplied into the process vessel202to clean the process vessel202. In the cleaning step S16, for example, the inner temperature of the process space201(that is the inner temperature of the process vessel202) is set to a temperature within a range from 100° C. to 500° C., specifically 300° C. to 500° C. Specifically, the cleaning gas is supplied through the third gas supply pipe245ato clean an inside of the shower head230or the inside of the process vessel202. That is, in the cleaning step S16, with the valve245dopen, the MFC245cis controlled such that a flow rate of the cleaning gas becomes a predetermined flow rate. As a result, a supply of the cleaning gas into the process space201is started. When supplying the cleaning gas, with the valve275and the valve277open, the inner pressure of the process space201is controlled (adjusted) by the APC276to a predetermined pressure. As a result, the deposits remaining in locations such as the inside of the shower head230, the substrate support210and an inner wall of the process vessel202are removed from the process space201by the vacuum pump278through the exhaust pipe263. That is, after the temperature lowering step S15, while the wafer200is not supported by the substrate support210, the cleaning gas is supplied into the process vessel202in the cleaning step S16to clean the locations such as the inside of the shower head230, the shaft217and the inner wall of the process vessel202. According to the present embodiments, in the cleaning step S16, the controller500operates the vacuum pump311cwith the power of each of the heaters416,419,420and422turned off, the valves310band312bclosed and the valve311bopen so as to vacuum-exhaust (evacuate) the insides of the piping structures316,319,320,321and322. That is, the coolant flow path is vacuum-exhausted to perform the cleaning step S16. Therefore, the coolant flow path is used as the vacuum heat insulator. <Determination Step: S17> After the cleaning step S16, the determination step S17is performed. In the determination step S17, when a next wafer200to be processed exists (“YES” inFIG.4), the temperature elevating step S10through the cleaning step S16are performed again, and when the next wafer200to be processed does not exist (“NO” inFIG.4), the substrate processing is terminated. <Other Embodiments> While the technique of the present disclosure is described in detail by way of the above-described embodiments, the technique of the present disclosure is not limited thereto. The technique of the present disclosure may be modified in various ways without departing from the scope thereof. For example, the above-described embodiments are described by way of an example in which the SiN film is formed on the wafer200by alternately supplying, in the film-forming step S12performed by the substrate processing apparatus10, the silicon-containing gas serving as the first element-containing gas (first process gas) and the NH3 gas serving as the second element-containing gas (second process gas). However, the technique of the present disclosure is not limited thereto. For example, the process gases used in the film-forming step are not limited to the silicon-containing gas and the NH3 gas. That is, the technique of the present disclosure may also be applied to other film-forming steps wherein other gases are used to form different films, or three or more different process gases are non-simultaneously supplied to form a film. Specifically, instead of silicon, for example, an element such as titanium (Ti), zirconium (Zr) and hafnium (Hf) may be used as the first element. In addition, instead of nitrogen (N), for example, an element such as oxygen (O) may be used as the second element. In addition, the above-described embodiments are described by way of an example in which the supply pipe310through which the coolant is supplied is connected to the upstream end of the coolant flow path configured by connecting the piping structures316,319,320,321and322, and the discharge pipe311through which the coolant is discharged to the outside of the process vessel202is connected to the downstream end of the coolant flow path configured by connecting the piping structures316,319,320,321and322. However, the technique of the present disclosure is not limited thereto. For example, the supply pipe310through which the coolant is supplied is connected to each upstream end of the piping structures316through322, and the discharge pipe311through which the coolant is discharged to the outside of the process vessel202is connected to each downstream end of the piping structures316through322. Thereby, it possible to shorten a cooling time, and it is also possible to control the cooling and the heating in the vicinity of each coolant flow path configured by each piping structures316through322. In addition, the above-described embodiments are described by way of the example in which the supply pipe310through which the coolant is supplied is connected to the upstream end of the coolant flow path configured by connecting the piping structures316,319,320,321and322, and the discharge pipe311through which the coolant is discharged to the outside of the process vessel202is connected to the downstream end of the coolant flow path configured by connecting the piping structures316,319,320,321and322. However, the technique of the present disclosure is not limited thereto. For example, a cooling apparatus (cooler) may be provided in the coolant flow path such that the coolant can be circulated while being cooled and without being discharged to the outside of the process vessel202. In addition, the above-described embodiments are described by way of an example in which the film-forming step S12is performed while the power of each of the heaters416,419,420and422is turned off. However, the technique of the present disclosure is not limited thereto. For example, the film-forming step S12may be performed while the power of each of the heaters416,419,420and422is turned on. As a result, it is possible to heat the inside of the process vessel202from around the substrate support210. In addition, the above-described embodiments are described by way of an example in which the coolant flow path is vacuum-exhausted (evacuated) in the film-forming step S12such that the coolant flow path is used as the vacuum heat insulator. However, the technique of the present disclosure is not limited thereto. For example, in the film-forming step S12, the coolant may be supplied to the coolant flow path provided in the shaft205bof the gate valve205to cool the shaft205b. According to some embodiments of the present disclosure, it is possible to shorten the downtime of the substrate processing apparatus and to improve the operating rate of the substrate processing apparatus. | 68,972 |
11942334 | DETAILED DESCRIPTION Microelectronic assemblies that include a substrate having two or more conductive structures with different thicknesses thereon and related devices and methods are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a substrate having a surface; a first conductive feature having a first thickness on the surface of the substrate, wherein a cross-section of the first conductive feature is rectangular; and a second conductive feature having a second thickness on the surface of the substrate, wherein a cross-section of the second conductive feature is rectangular, and wherein the second thickness is different from the first thickness. In some embodiments, a method of manufacturing a microelectronic assembly may include depositing and patterning a dose-selective photoresist layer on a substrate; exposing the dose-selective photoresist layer to at least two radiation levels; performing a first development to form one or more first openings in the dose-selective photoresist layer; forming a first conductive layer in the one or more first openings to form one or more conductive features having a first thickness; performing a second development to form one or more second openings in the dose-selective photoresist layer; and forming a second conductive layer in the one or more second openings to form one or more conductive features having a second thickness and in the one or more first openings to form one or more conductive features having a third thickness, wherein the second thickness is different from the third thickness. Communicating large numbers of signals in an integrated circuit (IC) package is challenging due to the increasingly small size of IC dies, thermal constraints, z-height constraints, form factor constraints, performance constraints, and power delivery constraints, among others. In some embodiments, it may be desirable for power traces to have a greater cross-sectional area (i.e., x-y direction) and/or a greater thickness (i.e., z-height) as compared to the routing traces. A greater cross-sectional area and/or a greater thickness may provide for reduced direct current resistance (RDC) and increased efficiency. The increased efficiency may have benefits, such as enabling a longer battery life or requiring less power. As used herein, a power trace may refer to a trace that is to route power between a component (e.g., a processor or memory) coupled with the power trace and a power supply. As used herein, a routing trace may refer to a trace that is to carry data signals to or from a component coupled with the routing trace. For example, the routing traces may carry data signals between various processors, or between a processor and a memory. Forming traces having different thicknesses typically requires two lithography steps, which is likely to cause misalignment between lithography steps and may require larger traces to compensate for the misalignment and/or may require larger input/output (I/O) rules. Larger traces and constrained routing space may decrease IC device performance due to mismatched impedances for different traces. Further, forming traces having different thicknesses using two lithography steps usually results in non-rectilinear traces (e.g., traces having surfaces that are not straight or linear), or traces having a cross-section that is non-rectangular to offset the misalignment error between steps. For example, a trace may have a larger cross-section for a first conductive material deposition as compared to a second conductive material deposition, or a trace may have a curved surface resulting from a second conductive material deposition having a larger cross-section and/or rounded or domed top surface as compared with a first conductive material deposition, where the second conductive material deposition completely covers the first material deposition. Various ones of the microelectronic assemblies disclosed herein may exhibit better power delivery, increased efficiency, and increased battery life relative to conventional approaches. The microelectronic assemblies disclosed herein may be particularly advantageous for high-performance computing, and multiple chip IC packages. In the following detailed description, reference is made to the accompanying drawings that form a part hereof wherein like numerals designate like parts throughout, and in which is shown, by way of illustration, embodiments that may be practiced. It is to be understood that other embodiments may be utilized, and structural or logical changes may be made, without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense. Various operations may be described as multiple discrete actions or operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations may not be performed in the order of presentation. Operations described may be performed in a different order from the described embodiment. Various additional operations may be performed, and/or described operations may be omitted in additional embodiments. For the purposes of the present disclosure, the phrase “A and/or B” means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase “A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C). The drawings are not necessarily to scale. Although many of the drawings illustrate rectilinear structures with flat walls and right-angle corners, this is simply for ease of illustration, and actual devices made using these techniques will exhibit rounded corners, surface roughness, and other features. The description uses the phrases “in an embodiment” or “in embodiments,” which may each refer to one or more of the same or different embodiments. Furthermore, the terms “comprising,” “including,” “having,” and the like, as used with respect to embodiments of the present disclosure, are synonymous. As used herein, a “package” and an “IC package” are synonymous, as are a “die” and an “IC die.” The terms “top” and “bottom” may be used herein to explain various features of the drawings, but these terms are simply for ease of discussion, and do not imply a desired or required orientation. As used herein, the term “insulating” may mean “electrically insulating,” unless otherwise specified. When used to describe a range of dimensions, the phrase “between X and Y” represents a range that includes X and Y. For convenience, the phrase “FIG.2” may be used to refer to the collection of drawings ofFIGS.2A-2I, the phrase “FIG.4” may be used to refer to the collection of drawings ofFIGS.4A-4F, etc. Although certain elements may be referred to in the singular herein, such elements may include multiple sub-elements. For example, “an insulating material” may include one or more insulating materials. As used herein, “conductive pathways” may include conductive traces, pads, vias, and through-holes, and other conductive structures that electrically couple an IC package component to another IC package component or to another component external to the IC package. As used herein, the terms “trace” and “line” may be used interchangeably and may refer to an interconnect in a conductive layer. As used herein, “conductive structures,” “conductive features,” and “conductive elements” may be used interchangeably and may refer to a trace, a line, a plane, a pad, or another conductive component. The terms “routing trace” and “signal trace” may be used interchangeably herein. FIG.1Ais a side, cross-sectional view of a microelectronic assembly100A, in accordance with various embodiments. The microelectronic assembly100A may include a package substrate102having a plurality of conductive layers108and a plurality of dielectric layers109. In particular, the package substrate102may include a conductive layer108A having a first conductive feature118with a first thickness (T1) and a second conductive feature128with a second thickness (T2), where the first thickness (T1) is different from the second thickness (T2). For example, as shown inFIG.1A, the first thickness is greater than the second thickness. In some embodiments, the first and second conductive features118,128may have a rectangular cross-section, such that the first and second conductive features118,128have a uniform width (e.g., y-dimension). In some embodiments, the first and second conductive features118,128may be rectilinear, such that the first and second conductive features118,128have a uniform width (e.g., y-dimension). As used herein, rectilinear refers to a feature having straight surfaces (e.g., a structure having linear top, bottom, and side surfaces), where the side surfaces are perpendicular to the top surface and the bottom surface (e.g., side surfaces meet the top and bottom surfaces at 90 degrees), such that the feature has a uniform width along a thickness (e.g., z-dimension). For example, rectilinear may refer to a feature shaped as a hexagonal prism, which has two hexagons for bases (e.g., top and bottom surfaces and six rectangular sides). As used herein, “a structure having a uniform width,” “a structure having a rectangular cross-section,” and “a rectilinear structure” generally refer to a structure having straight surfaces, where the side surfaces are perpendicular to a top surface and a bottom surface with some margin of error, for example, where the side surfaces may taper or slant with no more than a 3 micron (um) differential between a top width and a bottom width of the structure. In some embodiments, the first and second conductive features may be first and second traces, respectively. In some embodiments, a first trace may have a first thickness that is greater than a second thickness and may be arranged to carry power or ground, and a second trace may have a second thickness that is less than the first thickness and may be arranged to carry a signal. For example, the first trace may be coupled to a power plane, or a ground plane, and the second trace may be coupled to an electrical signal or a transmission line. In some embodiments, a first and/or second conductive feature may be a contact pad or a plane. The package substrate may be any suitable substrate. The package substrate102may be a cored or coreless substrate of a semiconductor package. The package substrate102may be glass, an organic package substrate, an inorganic package substrate, or a combination of organic and inorganic materials. The plurality of dielectric layers109of the package substrate102may be formed using any suitable process, including, for example, chemical vapor deposition (CVD), film lamination, slit coating and curing, atomic layer deposition (ALD), or spin on process, among others, and with any suitable material. Examples of dielectric materials may include, for example, epoxy-based materials/films, ceramic/silica filled epoxide films, polyimide films, filled polyimide films, other organic materials, and other inorganic dielectric materials known from semiconductor processing, as well as silicon dioxide (SiO2), carbon doped oxide (CDO), silicon nitride, organic polymers such as perfluorocyclobutane or polytetrafluoroethylene, fluorosilicate glass (FSG), and organosilicates such as silsesquioxane, siloxane, or organosilicate glass (OSG). An individual dielectric layer109may include a single layer or may include multiple layers. The package substrate102may include one or more conductive pathways through the dielectric material (e.g., conductive layers108, including conductive traces and/or conductive vias, as shown). The conductive pathways may be formed using any suitable conductive material or materials, such as copper, silver, nickel, gold, aluminum, or other metals or alloys, for example. The conductive pathways may be formed using any suitable technique, such as electroplating. The conductive pathways in the package substrate102may be bordered by liner materials, such as adhesion liners and/or barrier liners, as suitable. An individual conductive layer108may include a single layer or may include multiple layers; for example, a conductive layer108may include a seed layer and a patterned trace layer. In some embodiments, a conductive layer108may be a patterned trace layer. In some embodiments, a conductive layer108may be a continuous layer. A reference to conductive layers108also refers to conductive layer108A. AlthoughFIG.1Aillustrates a specific number and arrangement of conductive pathways in the package substrate102, these are simply illustrative, and any suitable number and arrangement may be used. Microelectronic assembly100A may include a die114. The die114may be coupled to the package substrate102by first-level interconnects (FLI)138at a top surface170-2of the package substrate102. In particular, the package substrate102may include conductive contacts140at its top surface170-2, the die114may include conductive contacts136at its bottom surface, and the FLI138may electrically and mechanically couple the conductive contacts136and the conductive contacts140. The FLI138illustrated inFIG.1Aare solder balls or solder bumps (e.g., for a ball grid array arrangement), but any suitable FLIs138may be used (e.g., pins in a pin grid array arrangement or lands in a land grid array arrangement). The die114may include a semiconductor layer with active devices patterned on it (e.g., transistors, diodes, etc.), an insulating material (e.g., a dielectric material formed in multiple layers, or semiconductor material, as known in the art), and multiple conductive pathways formed through the insulating material. In some embodiments, the insulating material of a die114may include a dielectric material, such as silicon dioxide, silicon nitride, BT resin, polyimide materials, glass reinforced epoxy matrix materials, or low-k and ultra low-k dielectric (e.g., carbon doped dielectrics, fluorine-doped dielectrics, porous dielectrics, and organic polymeric dielectrics). For example, the die114may include a dielectric build-up film, such as Ajinomoto build-up film (ABF). In some embodiments, the insulating material of die114may be a semiconductor material, such as silicon, germanium, or a III-V material. In some embodiments, the die114may include silicon. The conductive pathways in die114may include conductive traces and/or conductive vias, and may connect any of the conductive contacts in the die114in any suitable manner (e.g., connecting multiple conductive contacts on a same surface of the die114). In some embodiments, the area between the die114and the package substrate102may be filled with underfill (not shown), which may be a mold compound or any other suitable material to fill the gap between the die114and the package substrate102. Underfill may be applied using any suitable technique, such as transfer mold, capillary underfill, or epoxy flux as part of the thermal conductive bonding (TCB) process. In some embodiments, the underfill may extend beyond the area defined by the die114. AlthoughFIG.1Adepicts a single die114, the microelectronic assembly100A may have any suitable number of dies. In some embodiments, the die114may be an active or passive die that may include input/output circuitry, high bandwidth memory, or enhanced dynamic random access memory (EDRAM). For example, the die114may include a processor (e.g., including transistors, arithmetic logic units, and other components) that may include a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor may also include application-specific integrated circuits (ASIC). In some embodiments, microelectronic assemblies disclosed herein may include a plurality of dies coupled to the package substrate102or coupled to another die in a package-on-package (PoP) configuration. In some embodiments, the microelectronic assembly100A may serve as a system-in-package (SiP) in which multiple dies having different functionality are included. In such embodiments, the microelectronic assembly may be referred to as an SiP. The microelectronic assembly100A ofFIG.1Amay also include a circuit board134. The package substrate102may be coupled to the circuit board134by second-level interconnects (SLI)137at a bottom surface170-1of the package substrate102. In particular, the package substrate102may include conductive contacts139at its bottom surface170-1, and the circuit board134may include conductive contacts135at its top surface; the SLI137may electrically and mechanically couple the conductive contacts135and the conductive contacts139. The SLI137illustrated inFIG.1Aare solder balls (e.g., for a ball grid array arrangement), but any suitable SLI137may be used (e.g., pins in a pin grid array arrangement or lands in a land grid array arrangement). The circuit board134may be a motherboard, for example, and may have other components attached to it (not shown). The circuit board134may include conductive pathways and other conductive contacts (not shown) for routing power, ground, and signals through the circuit board134, as known in the art. In some embodiments, the SLI137may not couple the package substrate102to a circuit board134, but may instead couple the package substrate102to another IC package, an interposer, or any other suitable component. A number of elements are illustrated inFIG.1A, but a number of these elements may not be present in microelectronic assemblies disclosed herein. For example, in various embodiments, the SLI137, and/or the circuit board134may not be included. Further,FIG.1Aillustrates a number of elements that are omitted from subsequent drawings for ease of illustration, but may be included in any of the microelectronic assemblies disclosed herein. Examples of such elements include the die114, the FLI138, the SLI137, and/or the circuit board134. Many of the elements of the microelectronic assembly100A ofFIG.1Aare included in other ones of the accompanying figures; the discussion of these elements is not repeated when discussing these figures, and any of these elements may take any of the forms disclosed herein. A number of elements are not illustrated inFIG.1A, but may be present in microelectronic subassemblies disclosed herein; for example, additional active components, such as additional dies, or additional passive components, such as surface-mount resistors, capacitors, and/or inductors, may be disposed on the top surface or the bottom surface of the package substrate102, or embedded in the package substrate102, and may be electrically connected by the conductive pathways in the package substrate102. FIG.1Bis a cross-sectional, magnified view of a portion of a substrate of a microelectronic assembly100B, in accordance with various embodiments. As shown inFIG.1B, an x-dimension is length, a y-dimension is width, and a z-dimension is thickness. The microelectronic assembly100B may include a package substrate102with a conductive layer108having a first conductive feature118with a first thickness (T1) and a second conductive feature128with a second thickness (T2), where T1 is different from T2. For example, as shown inFIG.1A, T1 may be greater than T2. In some embodiments, T1 may be twice T2. In some embodiments, T1 may be greater than twice T2. In some embodiments, T1 may be less than twice T2. In some embodiments, T1 may be between 4 micron (um) and 70 um. In some embodiments, T1 may be between 4 um and 15 um. In some embodiments, T1 may be between 20 um and 40 um. In some embodiments, T1 may be between 50 um and 70 um. In some embodiments, T2 may be between 1 um and 60 um. In some embodiments, T2 may be between 1 um and 6 um. In some embodiments, T2 may be between 1 um and 35 um. In some embodiments, T2 may be between 10 um and 20 um. In some embodiments, T2 may be between 25 um and 35 um. In some embodiments, T2 may be between 35 um and 60 um. The package substrate102may also include a dielectric layer109on the conductive layer108, where the dielectric layer may have different thicknesses relative to the different conductive feature thicknesses. For example, the dielectric layer109may have a third thickness (T3) over the first conductive feature118, a fourth thickness (T4) over the second conductive feature128, and a fifth thickness (T5) when measured from a bottom surface171-1of the dielectric layer109to a top surface171-2of the dielectric layer109. In some embodiments, T4 may be greater than T3. In some embodiments, T3 may be between 2 um and 50 um. In some embodiments, T4 may be between 3 um and 80 um. In some embodiments, T5 may be between 5 um and 90 um. In some embodiments, T5 may be between 5 um and 20 um. In some embodiments, T5 may be between 25 um and 50 um. In some embodiments, T5 may be between 60 um and 90 um. As used herein, the term “lower density” and “higher density” are relative terms indicating that the conductive pathways (e.g., including conductive lines and conductive vias) in a lower density medium are larger and/or have a greater pitch than the conductive pathways in a higher density medium. For example, a higher density medium (e.g., the die114) may have a line or space pitch of approximately 10 microns, while a lower density medium (e.g., the package substrate102) may have a line or space pitch of approximately 40-50 microns. In another example, a higher density medium may have a line or space pitch of less than 20 microns, while a lower density medium may have a line or space pitch greater than 40 microns. A higher density medium may be manufactured using a modified semi-additive process or a semi-additive build-up process with advanced lithography (with small vertical interconnect features formed by advanced laser or lithography processes), while a lower density medium may be a printed circuit board (PCB) (e.g., circuit board134) manufactured using a standard PCB process (e.g., a standard subtractive process using etch chemistry to remove areas of unwanted copper, and with coarse vertical interconnect features formed by a standard laser process). As shown inFIG.1B, the first conductive feature118may have a width (W1), the second conductive feature128may have a width (W2), and a space (S) between the first conductive feature118and the second conductive feature128. The first and second conductive features118,128may have a cross-section that is rectangular or may have a shape that is rectilinear, such that the first and second conductive features118,128generally have a uniform width along a thickness (e.g., a same W1 or a same W2 along the z-height). As shown inFIG.1B, the first and second conductive features118,128may have any suitable lengths and may have different lengths. For example, as shown inFIG.1B, the first conductive feature118may have a length W1, and the second conductive feature128may have a length W2, where W1 is greater than W2. In some embodiments, W1 may be between 5 um and 50 millimeters (mm). In some embodiments, W1 may be between 14 um and 50 mm. In some embodiments, for example, when the first conductive feature118is a power plane or a ground plane, W1 may be between 25 mm and 50 mm. In some embodiments, for example, when the first conductive feature118is a trace in an ultra-fine line package, W1 may be between 5 um and 50 um. In some embodiments, W2 may be between 1 um and 75 um. In some embodiments, W2 may be between 1 um and 6 um. In some embodiments, W2 may be between 7 um and 50 um. In some embodiments, W2 may be between 10 um and 75 um. In some embodiments, W2 and S may have the same dimensions. In some embodiments, W2 and S may have different dimensions. In some embodiments, S may be between 1 um and 100 um. In some embodiments, S may be between 1 um and 7 um. In some embodiments, S may be between 7 um and 50 um. In some embodiments, S may be between 10 um and 100 um. AlthoughFIG.1Bshows only two conductive features, a microelectronic assembly may include any number of conductive features in the conductive layer108, including more than two conductive features, and the more than two conductive features may have any suitable thickness including a thickness equal to T1 or T2, or a thickness that is different from T1 or T2. Likewise, a microelectronic assembly may include a dielectric layer109with any number of thicknesses depending on the relative thicknesses of the two or more conductive features. Any suitable techniques may be used to manufacture the microelectronic assemblies disclosed herein. For example,FIGS.2A-2Iare side, cross-sectional views of various stages in an example process for manufacturing a microelectronic assembly, in accordance with various embodiments. Although the operations discussed below withFIGS.2A-2I(and others of the accompanying drawings representing manufacturing processes) are illustrated in a particular order, these operations may be performed in any suitable order. Additionally, although particular assemblies are illustrated inFIGS.2A-2I(and others of the accompanying drawings representing manufacturing processes), the operations discussed below with reference toFIGS.2A-2Imay be used to form any suitable assemblies. FIG.2Aillustrates an assembly200A including a portion of a package substrate102subsequent to depositing a seed layer203on a top surface272of the portion of the package substrate102. The seed layer203may be any suitable conductive material, including copper. The seed layer203may be formed by depositing conductive material using any suitable technique, including, for example, electroplating, sputtering, or electroless plating. In some embodiments, the seed layer203may be omitted. FIG.2Billustrates an assembly200B subsequent to depositing a first photoresist material252on the top surface272of the portion of the package substrate102, and patterning the first photoresist material to provide openings253for the formation of conductive features (e.g., conductive traces or conductive pads). The first photoresist material252may be any suitable material, such as dry film resist (DFR), and may be patterned using any suitable technique, including a lithographic process (e.g., exposing the first photoresist material to a radiation source through a mask and developing with a developer). For example, the first photoresist material252may be deposited using lamination and may be positively or negatively charged to create crosslinked and non-crosslinked portions using ultraviolet for patterning conductive material layer. The non-crosslinked portions dissolve to form openings253where conductive material may be deposited. In some embodiments, a photo-imageable dielectric (PID) may be deposited by lamination and patterned by exposure to light. The openings253may have any suitable size and shape for forming a conductive feature having desired characteristics. For example, openings253may be shaped to form a conductive trace having a particular size and shape, such as a rectangular cross-section. FIG.2Cillustrates an assembly200C subsequent to depositing a conductive material in the openings253for the formation of conductive features, including conductive features218-1,218-2,228-1,228-2. The conductive features218,228may be formed by depositing conductive material in the opening253using any suitable technique, including, for example, electroplating, sputtering, or electroless plating. The conductive features218,228may be formed from any suitable conductive material, for example, copper (Cu), aluminum (Al), gold (Au), silver (Ag), and/or alloys thereof. The conductive material may have any suitable thickness (e.g., in some embodiments, a thickness between 1 um and 45 um). The conductive features may include conductive pads and/or traces; for example, the conductive feature218may include a trace electrically coupled to a power plane or a ground plane (not shown). FIG.2Dillustrates an assembly200D subsequent to planarizing or polishing the exposed top surface of the conductive features218,228to a desired thickness T1. As shown inFIG.2D, thickness T1 includes the thickness of the seed layer and the thickness of the conductive features. In some embodiments, the top surfaces of the conductive features may be recessed with a flash etching process, a wet etch or a dry etch process. FIG.2Eillustrates an assembly200E subsequent to depositing a second photoresist material254on the first photoresist material252and patterning the second photoresist material254to mask or cover a particular region, such as the conductive features218-1,218-2. The second photoresist material254may act as a barrier to prevent etching of the conductive material from the conductive features218. As described above with reference toFIG.2C, the second photoresist material254may be any suitable material, such as DFR, and may be patterned using any suitable technique, including a lithographic process. FIG.2Fillustrates an assembly200F subsequent to etching the exposed conductive features228-1,228-2to the desired thickness T2, where the thickness T2 is less than the thickness T1. As shown inFIG.2F, thickness T2 includes the thickness of the seed layer and the thickness of the conductive features228. In some embodiments, the conductive features228-1,228-2may be recessed using a standard copper etch chemistry process, a wet etch process, or a dry etch process. FIG.2Gillustrates an assembly200G subsequent to stripping the first and second photoresist materials252,254to expose the conductive features218,228, and removing the exposed portions of the seed layer. AlthoughFIG.2Gshows particular conductive features218,228, the conductive features may take any form, including a conductive plane, or a conductive via. The exposed portions of the seed layer may be removed using any suitable process, including chemical etching, among others. FIG.2Hillustrates an assembly200H subsequent to forming a dielectric layer260over a top surface272of the portion of the package substrate102, including the conductive features218,228(e.g., over the top surface of assembly200G). The dielectric layer260may be formed using any suitable process, including lamination, or slit coating and curing. The dielectric layer260may be formed to completely cover the conductive features218,228, such that the thickness of the deposited dielectric layer260is greater than the thickness of the conductive features218,228. In some embodiments, the dielectric layer260may be planarized using any suitable technique, including grinding. In some embodiments, the dielectric layer260may be flattened by a press, such as a stainless steel press. In some embodiments, the dielectric layer260may be removed to expose the top surface of the conductive features218,228using any suitable technique, including grinding, or etching, such as a wet etch, a dry etch (e.g., a plasma etch), a wet blast, or a laser ablation (e.g., using excimer laser). In some embodiments, the thickness of the dielectric layer260may be minimized to reduce the etching time required to expose the top surface of the conductive features218,228. Additional layers may be built up in the package substrate by repeating the process as described with respect toFIGS.2A-2I, or by any suitable process, which is known in the art, including a semi-additive process (SAP). For example,FIG.2Iillustrates an assembly200I subsequent to forming via openings and depositing conductive material in the via openings to form vias237-1,237-2and contact pads239-1,239-2on assembly200H. The via openings may be formed using any suitable technique, including, for example, laser drilling. Any residue remaining in the opening may be cleaned away using any suitable process, such as a wet desmear process. The conductive material may be deposited in the opening using any suitable technique, including, for example, electroplating, sputtering, or electroless plating. The conductive material may be any suitable conductive material, including, copper, and may be a same conductive material as the conductive features218,228, or may be a different conductive material from the conductive features218,228. As shown inFIG.2I, the conductive vias237-1,237-2may have different thicknesses, where the conductive via237-1has a thickness T3 and conductive via237-2has a thickness T4, and where thickness T3 is greater than thickness T4. The different thicknesses may depend on the relative thickness of the associated conductive features218,228. The finished substrate may be a single package substrate or may be a repeating unit that may undergo a singulation process in which each unit is separated for one another to create a single package substrate. Further operations may be performed as suitable (e.g., attaching dies to the package substrate, attaching solder balls for coupling to a circuit board, etc.). AlthoughFIG.2shows a particular number and arrangement of conductive features, these are simply exemplary and a package substrate may have any suitable number and arrangement of conductive features. Further, althoughFIG.2shows conductive features having only two different thicknesses (i.e., thicknesses T1 and T2), the conductive features may have any suitable number of different thicknesses. For example, a conductive feature may have a fifth thickness T5 (not shown), where the fifth thickness T5 is different from the first thickness T1 and the second thickness T2. A different thickness may be formed by depositing additional photoresist layers and performing additional etching of the conductive features. For example, a third photoresist layer (not shown) may be deposited and patterned to cover the conductive feature218-2after a first etching to the second thickness T2, and a second etching may be performed on the conductive feature218-1to a fifth thickness T5, where the fifth thickness T5 is less than the first thickness T1 and less than the second thickness T2. FIG.3is a process flow diagram of an example method of forming a microelectronic assembly including a substrate with a plurality of conductive structures having different thicknesses, in accordance with various embodiments. At302, deposit and pattern a first photoresist layer on a substrate to create one or more openings for forming conductive structures. At304, deposit a conductive material, such as copper, in the one or more openings to form one or more conductive structures having a first thickness. In some embodiments, a seed layer may be deposited before depositing the photoresist material and the conductive material. At306, deposit and pattern a second photoresist layer on the first photoresist layer to form a covering or a barrier over one or more of the openings having a conductive structure with a first thickness. At308, remove a portion of conductive material from the openings not covered by the second photoresist layer to form one or more conductive structures having a second thickness, where the second thickness is less than the first thickness. In some embodiments, the conductive material may be removed by chemical etching. A photoresist layer may be deposited, and patterned, by exposure to, for example, ultraviolet light, to form openings in the non-masked regions that correspond to the conductive structures. Conductive structures are formed by depositing conductive material, such as metal, in the openings by, for example, electrolytic plating. Conductive structures having a thickness less than the first and second thicknesses may be formed by repeating the process as described in306through308to form any number of photoresist layers and conductive structures having smaller thicknesses. At310, remove the first and second photoresist layers to expose the one or more conductive structures having the first thickness and the one or more conductive structures having the second thickness. Optionally, form conductive vias coupled to the conductive structures having first and second thicknesses using a laser-drill-based process as described at312-314. For example, at312, form a dielectric layer on the conductive structures having different thicknesses (e.g., first and second thicknesses). At314, laser drill one or more openings in the dielectric layer and deposit conductive material in the one or more openings to form conductive vias for coupling to the conductive structures having different thicknesses. Continue building up the substrate by adding additional conductive and dielectric layers couple the conductive structures having different thicknesses to other conductive interconnects, such as traces, pads, etc. FIG.4Aillustrates an assembly400A including a substrate402subsequent to a first photoresist material452on a surface472of the substrate402, and patterning the first photoresist material to provide openings453for the formation of conductive features (e.g., conductive traces). As described above with reference toFIG.2, the first photoresist material452may be any suitable material and may be patterned using any suitable technique. The openings453may have any suitable size and shape for forming a conductive feature having desired characteristics. For example, openings453may be shaped to form a conductive trace having a particular size and shape, for example, a trace having a rectangular cross-section. In some embodiments, a seed layer (not shown) may be deposited on the surface472of the substrate402prior to depositing the first photoresist material. The seed layer may be any suitable conductive material, including copper. In some embodiments, the top surface of the substrate402is a dielectric layer in a package substrate. FIG.4Billustrates an assembly400B subsequent to depositing a conductive material in the openings453for the formation of conductive features, including conductive features418-1,418-2,428-1-428-4, having a first thickness T1. The conductive features418,428may be formed from any suitable conductive material using any suitable technique as described above with reference toFIG.2. In some embodiments, the top surfaces of the conductive features418,428may be planarized or polished as described above with reference toFIG.2. Although multiple figures include a thickness T1, T2, T3, and T4, these thicknesses do not refer to a particular value. Instead, T1, T2, T3, and T4 may have any suitable value, or range of values, and the values may vary in the different figures. FIG.4Cillustrates an assembly400C subsequent to depositing a second photoresist material454on the first photoresist material452, patterning the second photoresist material454to mask or cover a particular region, such as the conductive features418-1,418-2, and etching the exposed conductive features428-1-428-4to a desired second thickness T2, where the second thickness T2 is less than the first thickness T1. The second photoresist material454may act as a barrier to prevent etching of the conductive material from the conductive features418. As described above with reference toFIG.2, the second photoresist material454may be any suitable material and may be patterned using any suitable technique, and the conductive features428may be etched using any suitable technique. FIG.4Dillustrates an assembly400D subsequent to stripping the first and second photoresist materials452,454, and depositing and patterning a third photoresist material456over the conductive features418,428to provide openings435for forming vertical pillars or vias. For example, the conductive pillars may be formed using the third photoresist layer as part of a lithography-defined process. FIG.4Eillustrates an assembly400E subsequent to depositing conductive material into the openings435to form conductive vias437-1,437-2, and removing the third photoresist material456. The conductive material may be deposited using any suitable technique and may be any suitable material as described above with reference toFIG.2. The conductive vias437-1,437-2may have any suitable thickness and the thickness of conductive feature437-1may be different from the thickness of conductive feature437-2. For example, the conductive via437-1may have a third thickness T3 and the conductive via437-2may have a fourth thickness T4, where the third thickness T3 is greater than the fourth thickness T4. FIG.4Fillustrates an assembly400F subsequent to forming a dielectric layer460over a top surface472of the substrate402, including the conductive features418,428and conductive vias437(e.g., over the top surface of assembly400E). The dielectric layer460may be formed using any suitable process, as described above with reference toFIG.2. Additional layers may be built up on the substrate402by repeating the process as described with respect toFIGS.4A-4F, or by any suitable process, which is known in the art, including a lithographic process. The finished substrate may be a single package substrate or may be a repeating unit that may undergo a singulation process in which each unit is separated for one another to create a single package substrate. Further operations may be performed as suitable (e.g., attaching dies to the package substrate, attaching solder balls for coupling to a circuit board, etc.). FIG.5is a process flow diagram of an example method of forming a microelectronic assembly including a substrate with a plurality of conductive structures having different thicknesses, in accordance with various embodiments. At502, deposit and pattern a first photoresist layer on a substrate to create one or more openings for forming conductive structures. At504, deposit a conductive material, such as copper, in the one or more openings to form one or more conductive structures having a first thickness. In some embodiments, a seed layer may be deposited before depositing the photoresist material and the conductive material. At506, deposit and pattern a second photoresist layer on the first photoresist layer to form a covering or a barrier over one or more of the openings having a conductive structure with a first thickness. At508, remove a portion of the conductive material from the one or more openings not covered by the second photoresist layer to form one or more conductive structures having a second thickness, where the second thickness is less than the first thickness. In some embodiments, the conductive material may be removed by chemical etching. A photoresist layer may be deposited, patterned by exposure to, for example, ultraviolet light, where non-masked regions for openings that correspond to the conductive structures. Conductive structures are formed by depositing conductive material, such as metal, in the openings by, for example, electrolytic plating. Conductive structures having a thickness less than the first and second thicknesses may be formed by repeating the process as described in506through508to form any number of photoresist layers and conductive structures having smaller thicknesses. At510, remove the first and second photoresist layers to expose the one or more conductive structures having the first thickness and the one or more conductive structures having the second thickness. Optionally, form conductive vias coupled to the conductive structures having first and second thicknesses using a lithography process as described at512-518. For example, at512, deposit and pattern a third photoresist layer on the conductive structure having different thicknesses (e.g., different from the first and second thicknesses) to provide one or more openings to form one or more conductive pillars or vias. At514, deposit conductive material (e.g., a second conductive layer) in the one or more openings to form the one or more conductive vias having a third thickness and a fourth thickness, where the third thickness is different from the fourth thickness. At516, remove the third photoresist layer. At518, form a dielectric layer on the conductive structures and the conductive vias, where the conductive structures have different thicknesses (e.g., first and second thicknesses) and the conductive vias have different thicknesses (e.g., third and fourth thicknesses). FIG.6Aillustrates an assembly600A including a substrate602subsequent to depositing a seed layer603on a top surface672of the substrate602. The seed layer603may be any suitable conductive material, including copper. The seed layer603may be formed by depositing conductive material using any suitable technique, including, for example, electroplating, sputtering, or electroless plating. In some embodiments, the seed layer603may be omitted. In some embodiments, the top surface of the substrate602is a dielectric layer in a package substrate. FIG.6Billustrates an assembly600B subsequent to depositing a first photoresist material652on the top surface672of the substrate602, and patterning the first photoresist material652to provide openings653for the formation of conductive features (e.g., conductive traces). The first photoresist material652may be any suitable material, such as DFR, and may be patterned using any suitable technique, including a lithographic process (e.g., exposing the first photoresist material to a radiation source through a mask and developing with a developer). For example, the first photoresist material652may be deposited using lamination and may be positively or negatively charged to create crosslinked and non-crosslinked portions using ultraviolet for patterning conductive material layer. The non-crosslinked portions dissolve to form openings653where conductive material may be deposited. The openings653may have any suitable size and shape for forming a conductive feature having desired characteristics. For example, openings653may be shaped to form a conductive trace having a particular size and shape, such as a rectilinear shape. FIG.6Cillustrates an assembly600C subsequent to depositing a first conductive layer or material in the openings653for the formation of conductive features having a first thickness (e.g., T1), including conductive features618-1,618-2,628-1,628-2. The conductive features618,628may be formed by depositing conductive material in the openings653using any suitable technique, including, for example, electroplating, sputtering, or electroless plating. The conductive features618,628may be formed from any suitable conductive material, for example, copper (Cu), aluminum (Al), gold (Au), silver (Ag), and/or alloys thereof. The conductive material may have any suitable thickness (e.g., in some embodiments, a thickness between 1 um and 45 um). The conductive features may include conductive pads and/or traces; for example, conductive feature628may include a trace electrically coupled to a power plane or a ground plane (not shown). FIG.6Dillustrates an assembly600D subsequent to depositing a second photoresist material654on the first photoresist material652and patterning the second photoresist material654to mask or cover a particular region, such as conductive features628-1,628-2. The second photoresist material654may act as a barrier to prevent additional conductive material from being deposited on the conductive features628. As described above with reference toFIG.6B, the second photoresist material654may be any suitable material, such as DFR, and may be patterned using any suitable technique, including a lithographic process. FIG.6Ean assembly600E subsequent to depositing a second conductive layer or material in the openings653for the formation of conductive features618-1,618-2having a second thickness (e.g., T2), where the second thickness is greater than the first thickness. The second photoresist material654may prevent the second conductive layer from being deposited on conductive features628-1,628-2, so that conductive features628may have a smaller thickness (e.g., T1) as compared to conductive features618-1,618-2(e.g., T2). Other conductive features having a greater thickness than conductive features618may be formed by repeating the process described inFIGS.6D-6Eto add additional photoresist layers and additional conductive layers. For example, a third photoresist layer (not shown) may be deposited and patterned to cover conductive feature618-1, and a third conductive layer (not shown) may be deposited on conductive feature618-2to form a thicker conductive feature as compared with618-1,628-1,628-2having first and second thicknesses. FIG.6Fillustrates an assembly600F subsequent to stripping the first and second photoresist materials652,654to expose the conductive features618,628, removing the exposed portions of the seed layer, and forming a dielectric layer660over a top surface of the assembly600E, including the conductive features618,628. The exposed portions of the seed layer may be removed using any suitable process, including chemical etching, among others. In some embodiments, the top surfaces of the conductive features may be planarized or polished. The dielectric layer660may be formed using any suitable process, including lamination, or slit coating and curing, as described above with reference toFIG.2. AlthoughFIG.6Fshows particular conductive features618,628, the conductive features may take any form, including a conductive plane, or a conductive via. Additional layers may be built up in the package substrate by repeating the process as described with respect toFIG.2,FIG.4, or by any suitable process, which is known in the art. FIG.7is a process flow diagram of an example method of forming a microelectronic assembly including a core with a plurality of conductive structures having different thicknesses, in accordance with various embodiments. At702, deposit and pattern a first photoresist layer on a substrate to form one or more openings. At704, deposit a first conductive material, such as copper, in the one or more openings to form one or more conductive structures having a first thickness. In some embodiments, a seed layer may be deposited before depositing the first conductive layer. At706, deposit and pattern a second photoresist layer on the first photoresist layer to form a covering or a barrier over one or more openings having a conductive structure with a first thickness. At708, deposit a second conductive layer, such as copper, in the one or more openings not covered by the second photoresist layer to form one or more conductive structures having a second thickness, where the second thickness is greater than the first thickness. At710, remove the first and second photoresist layers to expose the conductive structures. Additional conductive structures having a thickness greater than the second thickness may be formed by repeating the process as described in706through708to form any number of photoresist layers and conductive layers. At712, form a dielectric layer on the one or more conductive structures, where the conductive structures have first and second thicknesses. Conductive vias coupled to the conductive structures having first and second thicknesses may be formed using any suitable process as described above with reference toFIGS.2-4. Additional conductive layers having conductive structures with different thicknesses may be formed by repeating the process as described in702through712, or by any suitable process. The finished substrate may be a single package substrate or may be a repeating unit that may undergo a singulation process in which each unit is separated for one another to create a single package substrate. FIG.8Aillustrates an assembly800A including a substrate802subsequent to depositing a seed layer803on a top surface872of the substrate802, and depositing a dose-selective photoresist material852on the top surface of the seed layer803. The seed layer803may be any suitable conductive material, including copper. The seed layer803may be formed by depositing conductive material using any suitable technique, including, for example, electroplating, sputtering, or electroless plating. In some embodiments, the seed layer803may be omitted. The dose-selective photoresist material852may be any suitable material that may be patterned based on radiation levels, such as a positive tone resist. The selective patterning of the photoresist may be performed based on exposing regions of the resist to different radiation levels using a grayscale mask (e.g., high dose, medium dose, and/or low dose). The high-dose regions may be developed in a first development step, and a first conductive material may be deposited in the high-dose openings to form high-dose structures. The low-dose regions may be developed in a second development step, which may be longer than the first development step, and a second conductive material may be deposited in the low-dose openings, as well as the high-dose openings, to form low-dose structures. Subsequent to forming the conductive structures, the dose-selective photoresist may be removed. In some embodiments, a negative tone resist may be used. In some embodiments, a variable laser power or a wavelength selective resist (e.g., a resist compatible with specific energies) may be used. FIG.8Billustrates an assembly800B subsequent to exposing the photoresist material852to multiple radiation levels866,868. For example, the photoresist material852may be exposed to a high-dose radiation level866and a low-dose radiation level868. The selective patterning may be performed, for example, by modulating the develop time, where a fast develop is used to develop the area for which a low dose is applied and a slow develop is used to develop the area for which a high dose is applied. FIG.8Cillustrates an assembly800C subsequent to performing a first development to provide first openings867-1,867-2in the regions of the photoresist material852exposed to high-dose radiation levels866for the formation of conductive features (e.g., conductive traces). The regions exposed to high-dose radiation levels866dissolve to form first openings867-1,867-2where conductive material may be deposited. The first openings867-1,867-2may have any suitable size and shape for forming a conductive feature having desired characteristics. For example, the first openings867-1,867-2may be shaped to form a conductive trace having a particular size and shape. In some embodiments, the first openings867-1,867-2may have the same size and/or shape. In some embodiments, the first openings867-1,867-2may have different sizes and/or different shapes. FIG.8Dillustrates an assembly800D subsequent to depositing a first conductive layer or material in the first openings867for the formation of conductive features828-1,828-2having a first thickness T1. The conductive features828may be formed by depositing conductive material in the first openings867using any suitable technique, including, for example, electroplating, sputtering, or electroless plating. The conductive features828may be formed from any suitable conductive material, for example, copper (Cu), aluminum (Al), gold (Au), silver (Ag), and/or alloys thereof. The conductive material may have any suitable thickness (e.g., in some embodiments, a thickness between 1 um and 45 um). The conductive features may include conductive pads and/or traces (not shown). FIG.8Eillustrates an assembly800E subsequent to performing a second development to provide second openings869-1,869-2in the regions of the photoresist material852exposed to low-dose radiation levels868for the formation of conductive features (e.g., conductive traces). The regions exposed to ow-dose radiation levels868dissolve to form second openings869-1,869-2where conductive material may be deposited. The second openings869-1,869-2may have any suitable size and shape for forming a conductive feature having desired characteristics. For example, second openings869-1,869-2may be shaped to form a conductive trace having a particular size and shape. In some embodiments, the second openings869-1,869-2may have the same size and/or shape. In some embodiments, the second openings869-1,869-2may have different sizes and/or different shapes. In some embodiments, the first openings867-1,867-2and second openings869-1,869-2may have different sizes and different shapes. In some embodiments, the first openings867-1,867-2and second openings869-1,869-2may have the same sizes and shapes. FIG.8Fillustrates an assembly800F subsequent to depositing a second conductive layer or material in the second openings869for the formation of conductive features818-1,818-2having a second thickness T2, and in the first openings867for the formation of conductive features828-1,828-2having a third thickness T3. The conductive features818,828may be formed by depositing conductive material in the first and second openings867,869using any suitable technique and any suitable material, as described above with reference toFIG.8D. The first and second conductive material may have any suitable thicknesses (e.g., in some embodiments, a thickness between 1 um and 45 um). In some embodiments, a first thickness T1 of the first conductive material may be the same as a second thickness T2 of the second conductive material, such that a third thickness T3 is twice the first thickness T1 or twice the second thickness T2. In some embodiments, a first thickness T1 of the first conductive material may be different from a second thickness T2 of the second conductive material. Other conductive features having a thickness different from the second and third thicknesses (e.g., T2 and T3) may be formed by exposing the photoresist to a third radiation level and repeating the process described inFIGS.8E-8Fto add additional conductive layers. FIG.8Gillustrates an assembly800G subsequent to stripping the photoresist material852to expose the conductive features818,828, removing the exposed portions of the seed layer803, and forming a dielectric layer860over a top surface of the assembly800F, including the conductive features818,828. The exposed portions of the seed layer803may be removed using any suitable process, including chemical etching, among others. In some embodiments, the top surfaces of the conductive features may be planarized or polished. The dielectric layer860may be formed using any suitable process, including lamination, or slit coating and curing, as described above with reference toFIG.2. AlthoughFIG.8Gshows a particular number and arrangement of conductive features818,828, the conductive features may take any form and any arrangement, including a conductive plane, or a conductive via. Additional layers may be built up in the package substrate by repeating the process as described with respect toFIG.2,FIG.4, or by any suitable process, which is known in the art. For example,FIG.8Hillustrates an assembly800H subsequent to laser drilling to form openings in the dielectric layer860, and depositing conductive material in the openings to form vias837-1,837-2and contact pads839-1,839-2on assembly800G. FIG.9is a process flow diagram of an example method of forming a microelectronic assembly including a substrate with conductive structures on a same layer having different thicknesses, in accordance with various embodiments. At902, deposit a dose-selective photoresist layer on a substrate, expose the dose-selective photoresist layer to two or more radiation levels, and perform a first development to form one or more first openings. At904, deposit a first conductive material, such as copper, in the one or more first openings to form one or more conductive structures having a first thickness. In some embodiments, a seed layer may be deposited before depositing the first conductive layer. At906, perform a second development on the dose-selective photoresist layer to from one or more second openings. At908, deposit a second conductive layer, such as copper, in the one or more second openings to form one or more conductive structures having a second thickness and in the one or more first openings to form one or more conductive structures having a third thickness, where the second thickness is different from the third thickness. At910, remove the dose-selective photoresist layer to expose the conductive structures having second and third thicknesses. Additional conductive structures having a thickness greater than the second thickness may be formed by repeating the process as described in906through908to form any number of conductive structure thicknesses. At912, form a dielectric layer on the one or more conductive structures having second and third thicknesses. At914, optionally, form conductive vias coupled to the conductive structures having second and third thicknesses, using any suitable process as described above with reference toFIGS.2-4. Additional conductive layers having conductive structures with different thicknesses may be formed by repeating the process as described in902through912, or by any suitable process. The finished substrate may be a single package substrate or may be a repeating unit that may undergo a singulation process in which each unit is separated for one another to create a single package substrate. The microelectronic assemblies disclosed herein may be used for any suitable application. For example, in some embodiments, a microelectronic assembly may include a die that may be used to provide an ultra-high density and high bandwidth interconnect for field programmable gate array (FPGA) transceivers and III-V amplifiers. In an example, a microelectronic assembly may include a die that may be a processing device (e.g., a CPU, a radio frequency chip, a power converter, a network processor, a GPU, a FPGA, a modem, an applications processor, etc.), and the die may include high bandwidth memory, transceiver circuitry, and/or input/output circuitry (e.g., Double Data Rate transfer circuitry, Peripheral Component Interconnect Express circuitry, etc.). In another example, a microelectronic assembly may include a die that may be a cache memory (e.g., a third-level cache memory), and one or more dies that may be processing devices (e.g., a CPU, a radio frequency chip, a power converter, a network processor, a GPU, a FPGA, a modem, an applications processor, etc.) that share the cache memory of the die. The microelectronic assemblies disclosed herein may be included in any suitable electronic component.FIG.10is a block diagram of an example electrical device1000that may include one or more of the microelectronic assemblies disclosed herein. For example, any suitable ones of the components of the electrical device1000may be arranged in any of the microelectronic assemblies disclosed herein. A number of components are illustrated inFIG.10as included in the electrical device1000, but any one or more of these components may be omitted or duplicated, as suitable for the application. In some embodiments, some or all of the components included in the electrical device1000may be attached to one or more motherboards. In some embodiments, some or all of these components are fabricated onto a single system-on-a-chip (SoC) die. Additionally, in various embodiments, the electrical device1000may not include one or more of the components illustrated inFIG.10, but the electrical device1000may include interface circuitry for coupling to the one or more components. For example, the electrical device1000may not include a display device1006, but may include display device interface circuitry (e.g., a connector and driver circuitry) to which a display device1006may be coupled. In another set of examples, the electrical device1000may not include an audio input device1024or an audio output device1008, but may include audio input or output device interface circuitry (e.g., connectors and supporting circuitry) to which an audio input device1024or audio output device1008may be coupled. The electrical device1000may include a processing device1002(e.g., one or more processing devices). As used herein, the term “processing device” or “processor” may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory. The processing device1002may include one or more digital signal processors (DSPs), ASICs, CPUs, GPUs, cryptoprocessors (specialized processors that execute cryptographic algorithms within hardware), server processors, or any other suitable processing devices. The electrical device1000may include a memory1004, which may itself include one or more memory devices such as volatile memory (e.g., dynamic random access memory (DRAM)), nonvolatile memory (e.g., read-only memory (ROM)), flash memory, solid state memory, and/or a hard drive. In some embodiments, the memory1004may include memory that shares a die with the processing device1002. This memory may be used as cache memory and may include embedded dynamic random access memory (eDRAM) or spin transfer torque magnetic random access memory (STT-MRAM). In some embodiments, the electrical device1000may include a communication chip1012(e.g., one or more communication chips). For example, the communication chip1012may be configured for managing wireless communications for the transfer of data to and from the electrical device1000. The term “wireless” and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a nonsolid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. The communication chip1012may implement any of a number of wireless standards or protocols, including but not limited to Institute of Electrical and Electronic Engineers (IEEE) standards including Wi-Fi (IEEE 802.11 family), IEEE 802.16 standards (e.g., IEEE 802.16-2005 Amendment), 3rd Generation Partnership Project (3GPP) Long-Term Evolution (LTE), 5G, 5G New Radio, along with any amendments, updates, and/or revisions (e.g., advanced LTE project, ultra-mobile broadband (UMB) project (also referred to as “3GPP2”), etc.). IEEE 802.16 compatible Broadband Wireless Access (BWA) networks are generally referred to as WiMAX networks, an acronym that stands for Worldwide Interoperability for Microwave Access, which is a certification mark for products that pass conformity and interoperability tests for the IEEE 802.16 standards. The communication chip1012may operate in accordance with a Global System for Mobile Communication (GSM), General Packet Radio Service (GPRS), Universal Mobile Telecommunications System (UMTS), High Speed Packet Access (HSPA), Evolved HSPA (E-HSPA), or LTE network. The communication chip1012may operate in accordance with Enhanced Data for GSM Evolution (EDGE), GSM EDGE Radio Access Network (GERAN), Universal Terrestrial Radio Access Network (UTRAN), or Evolved UTRAN (E-UTRAN). The communication chip1012may operate in accordance with Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Evolution-Data Optimized (EV-DO), and derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The communication chip1012may operate in accordance with other wireless protocols in other embodiments. The electrical device1000may include an antenna1022to facilitate wireless communications and/or to receive other wireless communications (such as AM or FM radio transmissions). In some embodiments, the communication chip1012may manage wired communications, such as electrical, optical, or any other suitable communication protocols (e.g., the Ethernet). As noted above, the communication chip1012may include multiple communication chips. For instance, a first communication chip1012may be dedicated to shorter-range wireless communications such as Wi-Fi or Bluetooth, and a second communication chip1012may be dedicated to longer-range wireless communications such as global positioning system (GPS), EDGE, GPRS, CDMA, WiMAX, LTE, EV-DO, or others. In some embodiments, a first communication chip1012may be dedicated to wireless communications, and a second communication chip1012may be dedicated to wired communications. The electrical device1000may include battery/power circuitry1014. The battery/power circuitry1014may include one or more energy storage devices (e.g., batteries or capacitors) and/or circuitry for coupling components of the electrical device1000to an energy source separate from the electrical device1000(e.g., AC line power). The electrical device1000may include a display device1006(or corresponding interface circuitry, as discussed above). The display device1006may include any visual indicators, such as a heads-up display, a computer monitor, a projector, a touchscreen display, a liquid crystal display (LCD), a light-emitting diode display, or a flat panel display. The electrical device1000may include an audio output device1008(or corresponding interface circuitry, as discussed above). The audio output device1008may include any device that generates an audible indicator, such as speakers, headsets, or earbuds. The electrical device1000may include an audio input device1024(or corresponding interface circuitry, as discussed above). The audio input device1024may include any device that generates a signal representative of a sound, such as microphones, microphone arrays, or digital instruments (e.g., instruments having a musical instrument digital interface (MIDI) output). The electrical device1000may include a GPS device1018(or corresponding interface circuitry, as discussed above). The GPS device1018may be in communication with a satellite-based system and may receive a location of the electrical device1000, as known in the art. The electrical device1000may include another output device1010(or corresponding interface circuitry, as discussed above). Examples of the other output device1010may include an audio codec, a video codec, a printer, a wired or wireless transmitter for providing information to other devices, or an additional storage device. The electrical device1000may include another input device1020(or corresponding interface circuitry, as discussed above). Examples of the other input device1020may include an accelerometer, a gyroscope, a compass, an image capture device, a keyboard, a cursor control device such as a mouse, a stylus, a touchpad, a bar code reader, a Quick Response (QR) code reader, any sensor, or a radio frequency identification (RFID) reader. The electrical device1000may have any desired form factor, such as a portable, hand-held, or mobile electrical device (e.g., a cell phone, a smart phone, a mobile internet device, a music player, a tablet computer, a laptop computer, a netbook computer, an ultrabook computer, a personal digital assistant (PDA), an ultra-mobile personal computer, etc.), a desktop electrical device, a server or other networked computing component, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a vehicle control unit, a digital camera, a digital video recorder, or a wearable electrical device. In some embodiments, the electrical device1000may be any other electronic device that processes data. The following paragraphs provide various examples of the embodiments disclosed herein. Example 1 is a microelectronic assembly, including: a substrate layer having a surface; a first conductive trace having a first thickness on the surface of the substrate layer; and a second conductive trace having a second thickness on the surface of the substrate layer, wherein the second thickness is different from the first thickness. Example 2 may include the subject matter of Example 1, and may further specify that the second thickness is greater than the first thickness. Example 3 may include the subject matter of Example 1, and may further specify that the first thickness is between 1 um and 35 um. Example 4 may include the subject matter of Example 1, and may further specify that the second thickness is between 4 um and 70 um. Example 5 may include the subject matter of Example 1, and may further specify that the second conductive trace is electrically coupled to a power plane or a ground plane. Example 6 may include the subject matter of Example 1, and may further specify that the first and second conductive traces have rectangular cross-sections. Example 7 may include the subject matter of Example 1, and may further specify that the substrate layer is a dielectric layer in a package substrate. Example 8 is a microelectronic assembly, including: a package substrate having a layer; a first conductive feature having a first thickness in the layer of the package substrate, wherein the first conductive feature is rectilinear; and a second conductive feature having a second thickness in the layer of the package substrate, wherein the second conductive feature is rectilinear, and wherein the second thickness is different from the first thickness. Example 9 may include the subject matter of Example 8, and may further specify that the first conductive feature is a trace. Example 10 may include the subject matter of Example 8, and may further specify that the second conductive feature is electrically coupled to a power plane or a ground plane. Example 11 may include the subject matter of Example 8, and may further include: a die electrically coupled to the package substrate. Example 12 may include the subject matter of Example 11, and may further specify that the die is a central processing unit, a radio frequency chip, a power converter, or a network processor. Example 13 may include the subject matter of Example 11, and may further specify that the first conductive feature is electrically coupled to the die via conductive pathways in the package substrate. Example 14 may include the subject matter of Example 13, and may further specify that the second conductive feature is electrically coupled to the die via conductive pathways in the package substrate. Example 15 is a computing device, including: a package substrate having a first surface and an opposing second surface, the package substrate including: a first conductive trace having a first thickness in a layer of the package substrate, wherein the first conductive trace is rectilinear; and a second conductive trace having a second thickness in the layer of the package substrate, wherein the second conductive trace is rectilinear, and wherein the second thickness is different from the first thickness; a circuit board coupled to the first surface of the package substrate; and a die coupled to the second surface of the package substrate. Example 16 may include the subject matter of Example 15, and may further specify that the first thickness is between 1 um and 35 um. Example 17 may include the subject matter of Example 15, and may further specify that the second thickness is between 4 um and 70 um. Example 18 may include the subject matter of Example 15, and may further specify that the second conductive trace is electrically coupled to a power plane or a ground plane. Example 19 may include the subject matter of any of Examples 15-18, and may further specify that the computing device is a server device. Example 20 may include the subject matter of any of Examples 15-18, and may further specify that the computing device is a portable computing device. Example 21 may include the subject matter of any of Examples 15-18, and may further specify that the computing device is a wearable computing device. Example 22 is a method of manufacturing a microelectronic assembly, including: depositing and patterning a first photoresist layer on a substrate to form one or more openings; forming a first conductive layer in the one or more openings to form one or more conductive traces having a first thickness, wherein the one or more conductive traces having a first thickness are rectilinear; depositing and patterning a second photoresist layer on the first photoresist layer to cover one or more of the one or more openings; and forming a second conductive layer in the one or more openings not covered by the second photoresist layer to form one or more conductive traces having a second thickness, wherein the one or more conductive traces having a second thickness are rectilinear, and wherein the second thickness is different from the first thickness. Example 23 may include the subject matter of Example 22, where in the second thickness is greater than the first thickness. Example 24 may include the subject matter of Example 22, and may further specify that the one or more conductive traces having the first thickness are traces to transmit or to receive a signal. Example 25 may include the subject matter of Example 22, and may further specify that the one or more conductive traces having the second thickness are traces to couple to a power plane or a ground plane. Example 26 may include the subject matter of Example 22, and may further include: removing the first and second photoresist layers; forming a dielectric layer on the one or more conductive traces having first and second thicknesses; laser drilling an opening in the dielectric layer; and depositing conductive material in the opening to form a via, wherein the via is coupled to an individual conductive trace having the first thickness. Example 27 may include the subject matter of Example 22, and may further include: removing the first and second photoresist layers; depositing and patterning a third photoresist layer on the one or more conductive traces having first and second thicknesses to form one or more via openings; depositing a third conductive layer in the one or more via openings to form one or more conductive vias; removing the third photoresist layer; and forming a dielectric layer on the one or more conductive traces having first and second thicknesses and on the one or more conductive vias. Example 28 is a method of manufacturing a microelectronic assembly, including: depositing and patterning a dose-selective photoresist layer on a substrate; exposing the dose-selective photoresist layer to at least two radiation levels; performing a first development to form one or more first openings in the dose-selective photoresist layer; forming a first conductive layer in the one or more first openings to form one or more conductive features having a first thickness; performing a second development to form one or more second openings in the dose-selective photoresist layer; and forming a second conductive layer in the one or more second openings to form one or more conductive features having a second thickness and in the one or more first openings to form one or more conductive features having a third thickness, wherein the second thickness is different from the third thickness. Example 29 may include the subject matter of Example 28, where in the third thickness is greater than the second thickness. Example 30 may include the subject matter of Example 28, and may further specify that the one or more conductive features having the second thickness are traces to transmit or to receive a signal. Example 31 may include the subject matter of Example 28, and may further specify that the one or more conductive features having the third thickness are traces to couple to a power plane or a ground plane. Example 32 may include the subject matter of Example 28, and may further include: removing the dose-selective photoresist layer; forming a dielectric layer on the one or more conductive features having second and third thicknesses; laser drilling a via opening in the dielectric layer; and depositing conductive material in the via opening to form a conductive via. Example 33 may include the subject matter of Example 28, and may further include: removing the dose-selective photoresist layer; depositing and patterning a first photoresist layer on the one or more conductive features having second and third thicknesses to form one or more via openings; depositing a third conductive layer in the one or more via openings to form one or more conductive vias; removing the first photoresist layer; and forming a dielectric layer on the one or more conductive features having second and third thicknesses and on the one or more conductive vias. Example 34 is a method of manufacturing a microelectronic assembly, including: depositing and patterning a first photoresist layer on a substrate to form one or more openings; depositing a conductive material in the one or more openings to form one or more conductive features having a first thickness; depositing and patterning a second photoresist layer on the first photoresist layer to cover one or more of the conductive features having a first thickness; and removing a portion of the conductive material from the one or more conductive features having the first thickness not covered by the second photoresist layer to form one or more conductive features having a second thickness, wherein the second thickness is different from the first thickness. Example 35 may include the subject matter of Example 34, and may further specify that the second thickness is less than the first thickness. Example 36 may include the subject matter of Example 34, and may further specify that the one or more conductive features having the first thickness are traces to couple to a power plane or a ground plane. Example 37 may include the subject matter of Example 34, and may further specify that the one or more conductive features having the second thickness are traces to transmit or to receive a signal. Example 38 may include the subject matter of Example 34, and may further include: removing the first and second photoresist layers; forming a dielectric layer on the one or more conductive features having first and second thicknesses; laser drilling a via opening in the dielectric layer; and depositing conductive material in the via opening to form a conductive via. Example 39 may include the subject matter of Example 34, and may further include: removing the first and second photoresist layers; depositing and patterning a third photoresist layer on the one or more conductive features having first and second thicknesses to form one or more via openings; depositing a third conductive layer in the one or more via openings to form one or more conductive vias; removing the third photoresist layer; and forming a dielectric layer on the one or more conductive features having first and second thicknesses and on the one or more conductive vias. Example 40 may include the subject matter of Example 34, and may further include: depositing a seed layer on the substrate before depositing the first photoresist layer. Example 42 may include the subject matter of Example 34, and may further specify that the first thickness is between 15 um and 45 um. Example 43 may include the subject matter of Example 34, and may further specify that the second thickness is between 1 um and 25 um. | 83,250 |
11942335 | DETAILED DESCRIPTION There may be a need to manufacture a module with high spatial accuracy and small effort. According to an exemplary embodiment, a method of manufacturing a module is provided, wherein the method comprises providing at least one solder body with a base portion and an elevated edge extending along at least part of a circumference of the base portion, and placing at least one carrier, on which at least one electronic component is mounted, in the at least one solder body so that the at least one carrier is positioned on the base portion and is spatially confined or delimited by the elevated edge. According to another exemplary embodiment, a solder body for manufacturing a module is provided, wherein the solder body comprises a base portion for accommodating a carrier, and an elevated edge extending along at least part of a circumference of the base portion so that the carrier is spatially confinable or delimitable by the elevated edge. According to another exemplary embodiment, a solder body having the above-mentioned features is used for manufacturing a power module. According to an exemplary embodiment, a solder body with an elevated edge is provided as a solder interface between a carrier with electronic component(s) on top and a support body on bottom. The elevated edge may define a cavity or accommodation volume for a bottom portion of the carrier and may thereby spatially delimit or confine the carrier at a target position or within a target range. Undesired sliding of a carrier on a solder body—involving the risk of loss of a proper spatial relationship between solder body and carrier—can thereby be reliably prevented. Such embodiments may also allow to carry out system soldering for module manufacture without the need of a solder auxiliary device which is conventionally used for ensuring correct positioning of solder bodies with respect to carriers. Descriptively speaking, the design of a solder body of an exemplary embodiment itself ensures proper alignment between solder body and carrier. Hence, the process of manufacturing modules may be significantly simplified and accelerated. Furthermore, resources may be used more efficiently, while simultaneously ensuring proper spatial relationship between the constituents of the module. In the following, further exemplary embodiments of the manufacturing method, the solder body, and the method of use will be explained. In the context of the present application, the term “module” may particularly denote an electronic device which may comprise one or more electronic components mounted on one or more carriers. The one or more carriers may be soldered on a support body by one or more solder bodies. In the context of the present application, the term “electronic component” may in particular encompass a semiconductor chip (in particular a power semiconductor chip), an active electronic device (such as a transistor), a passive electronic device (such as a capacitance or an inductance or an ohmic resistance), a sensor (such as a microphone, a light sensor or a gas sensor), an actuator (for instance a loudspeaker), and a microelectromechanical system (MEMS). In particular, the electronic component may be a semiconductor chip having at least one integrated circuit element (such as a diode or a transistor) in a surface portion thereof. The electronic component may be a naked die or may be already packaged or encapsulated. In the context of the present application, the term “carrier” may particularly denote a body (preferably, but not necessarily being electrically conductive) which serves for mechanically carrying the one or more electronic components, and which may optionally also contribute to the electric interconnection between the electronic component(s) and the periphery of the module. In other words, the carrier may fulfil a mechanical carrying function and optionally an electric connection function. Preferably, but not necessarily, the carrier may be partially or entirely electrically conductive. In the context of the present application, the term “solder body” may particularly denote a physical body made of a material which can be used for establishing a solder connection between two constituents (in particular a carrier and a support body). In the context of the present application, the term “base portion” may particularly denote a portion of the solder body on which a bottom surface of a carrier, to be solder-connected with a support body, may be placed. Preferably, the base portion may be substantially flat or planar. In the context of the present application, the term “elevated edge” may particularly denote a circumferentially closed or open rim which defines one or more lateral abutment surfaces against which a carrier, placed on the above-described base portion, may abut in the presence of a horizontal force tending to displace the carrier with respect to the solder body. The elevated edge may be configured to mechanically disable excessive horizontal sliding of the carrier relative to the solder body, since such an undesired sliding will result in an abutment of a bottom portion of the carrier against the elevated edge. Thus, the elevated edge may serve for defining a target position or target range of the carrier in the solder body with elevated edge. For instance, the elevated edge may form a circumferentially closed ring. Alternatively, the circumferentially arranged elevated edge may comprise one or multiple separate edge structures arranged along a perimeter of the base portion to thereby define outer limits for a position of a carrier. For instance, it is possible that respective separate portions of the elevated edge are formed in two opposing corners or even all four corners of the solder structure (for instance as L-shaped profiles). It is also possible to form respective sections of the elevated edge for instance in central portions of all four sides of the in particular rectangular solder body (for instance as straight profiles). In an embodiment, a cavity for accommodating a bottom portion of the carrier is delimited by the base portion and the elevated edge. Such a cavity may thus be formed in the solder body by the base portion and the elevated edge, wherein the method may comprise placing a respective carrier in the cavity prior to soldering so that the carrier is protected by the elevated edge against laterally sliding out of the cavity. Preferably, the elevated edge prevents sliding of the carrier out of the cavity within an entire horizontal plane. Consequently, the elevated edge may render it mechanically impossible that the carrier horizontally moves out of the cavity by a horizontal force. In an embodiment, the method comprises providing a plurality of solder bodies each with a base portion and an elevated edge extending along at least part of a circumference of the respective base portion, and placing each of a plurality of carriers in an assigned one of the solder bodies so that each of the carriers is positioned on a respective base portion and is spatially confined by a respective elevated edge. At least one electronic component may be mounted on each of the carriers. Hence, it is possible to manufacture a complex module with multiple carriers and for instance the same number of solder bodies, one for each carrier. In an embodiment, the method comprises connecting the solder body with the carrier by soldering. Soldering may be accomplished by providing sufficient heat to make the solderable material of the solder body flowable, for instance by heating it to a temperature in a range between 200° C. and 400° C., for instance about 350° C. In an embodiment, the method comprises placing the at least one solder body on a support body, which may also form part of the manufactured module. For instance, the support body may be a bottom plate (for instance a metal plate) on which the solder bodies and, indirectly, the carriers are assembled. In embodiment, the method comprises placing the at least one solder body on the support body before placing the at least one carrier in the at least one solder body. Assembly of the one or carriers on the solder bodies can be carried out in a simple way and with proper precision when the solder bodies are already aligned with the support body beneath. In an embodiment, the method comprises connecting the solder body with the support body by soldering. This may be accomplished in particular simultaneously with connecting the at least one solder body with the at least one carrier by soldering. Hence, when the one or more solder bodies arranged between the support body and the one or more carriers become flowable at solder temperature, this may trigger formation of a solder connection between these vertically stacked constituents. In an embodiment, the method comprises providing the support body with at least one solderable portion, into which material of the at least one solder body will flow during soldering, and at least one non-solderable portion, into which material of the solder body will not flow during soldering. By taking this measure, the spatial solder flow during soldering may be precisely controlled. Surface portions of the support body on which an assigned carrier shall be soldered by solder material of the assigned solder body can be homogeneously covered with solder material by preventing that solder material flows into one or more regions in which soldering is not desired. More generally, the non-solderable portion or portions may be defined by configuring their surface in such a way that they are not wettable by solder material. In an embodiment, the at least one non-solderable portion is defined by a solder resist, an oxide surface or a laser treated surface. Other options of defining one more portions which are not wettable by flowable solder material are possible. In a preferred embodiment, the method comprises, before forming a solder connection by the at least one solder body, provisionally attaching (in particular without soldering the solder body over its entire lower surface onto the support body) the at least one solder body to the support body. Said provisional attachment may be carried out in such a manner that a lateral sliding of the at least one solder body relative to the support body is disabled by the provisional attachment. Hence, by provisionally defining a spatial relationship between support body and the one or more solder bodies, a high overall spatial accuracy may be obtained. The provisional attachment may be of such a connection strength that undesired sliding of the one or more solder bodies with respect to the support body is prevented. In an embodiment, provisionally attaching the solder body to the support body is carried out by one of the group consisting of a volatile adhesive agent provided between support body and the one or more solder bodies, spot soldering the one or solder bodies to the support body and laser welding the one or solder bodies on the support body. Care should be taken to avoid that the described provisional attachment of the solder body to the support body results in a loss of the shape of the elevated edge due to an excessive heat impact during provisionally attaching the solder body to the support body. For instance, an adhesive agent which is volatile, i.e. evaporates during subsequent soldering, may be used for this purpose. Alternatively, a connection between a partial surface of the support body and a partial surface of the respective solder body may be established by spot welding or the like. In an embodiment, the method comprises forming the elevated edge by one of the group consisting of bending and embossing. For instance, it is possible to manufacture the solder body by bending or embossing a planar preform of the solder body along at least part of its perimeter. Such a planar preform may be punched out of a flat sheet of solderable material. Thus, the solder body with elevated edge may be formed with low effort, for instance based on a larger plate of solderable material which can be processed by punching, bending and/or embossing. The bending of the edge may be along the entire perimeter or only partially. In an embodiment, the module is configured as power module. Correspondingly, one or more power semiconductor chips may be provided on and/or in each of the at least one carrier. Examples for such power semiconductor chips are MOSFET (metal oxide semiconductor field effect transistor) chips, IGBT (insulated gate bipolar transistor) chips, diode chips, etc. In an embodiment, the solder body is cup-shaped. Such a cut-shaped or bowl-shaped solder body may precisely define a target area in which a carrier may be accommodated. In an embodiment, the solder body consists of solderable material. Thus, the entire solder body may only be made of solderable material. In an embodiment, the base portion is a plate portion. Thus, the plate-shaped base portion may define a planar accommodation surface for a corresponding substantially planar bottom surface of a carrier. In an embodiment, the edge is angled with respect to the base portion. “Angled” may mean in this context that, in a side view or cross-sectional view of the solder body, the base portion and the elevated edge each have a substantially straight shape with a kink or sharp bend in between. An angled edge provides a well-defined abutment surface for a slightly misaligned carrier. In an embodiment, the edge is angled with respect to the base portion by an angle of 90°. An angle of 90° provides highly efficient abutment surfaces. In another embodiment, the edge is angled with respect to the base portion by an angle in a range of above 90° to not more than 150°. An angular range between 90° and 150° has the advantage that the corresponding solder bodies are stackable in a space-saving way. In another embodiment, the edge is curved with respect to the base portion. “Curved” may mean in this context that, in a side view or cross-sectional view of the solder body, the base portion and the elevated edge are connected to each other in a continuous, smooth kink-free fashion. With such a curvature, a smooth transition between base portion and elevated edge may be accomplished which drives back a slightly misaligned carrier into a target position in a controlled way. In an embodiment, at least part of a surface of the base portion is provided with a surface profile. Such a surface profile may be formed in an upper main surface and/or a lower main surface of the base portion for inhibiting adhesion between adjacent solder bodies of a stack of solder bodies. Advantageously, such a surface profile may reduce the adhesion forces between adjacent solder bodies when being stacked. This simplifies handling of the solder bodies during an assembly process. In an embodiment, the elevated edge protrudes vertically beyond the base portion by a distance in a range between 50 μm and 1 mm, in particular in a range between 150 μm to 500 μm. Hence, already relatively small deviations from a fully planar shape of the solder body may be sufficient to properly define the target position of a carrier placed on a respective solder body and avoid misalignment. In an embodiment, the module or package comprises a plurality of electronic components mounted on the carrier. Thus, the package may comprise one or more electronic components. In an embodiment, a connection between the electronic component and the carrier is formed by a connection medium. For instance, the connection medium may be a solder structure, a sinter structure, a welding structure, and/or a glue structure. Thus, mounting the one or more electronic components on the carrier may be accomplished by soldering, sintering or welding, or by adhering or gluing. In an embodiment, the at least one electronic component comprises at least one of the group consisting of a controller circuit, a driver circuit, and a power semiconductor circuit. All these circuits may be integrated into one semiconductor chip, or separately in different chips. For instance, a corresponding power semiconductor application may be realized by the chip(s), wherein integrated circuit elements of such a power semiconductor chip may comprise at least one transistor (in particular a MOSFET, metal oxide semiconductor field effect transistor, or an IGBT, insulated gate bipolar transistor), at least one diode, etc. In particular, circuits fulfilling a half-bridge function, a full-bridge function, etc., may be manufactured. In an embodiment, the modules are configured as power converter, in particular one of an AC/DC power converter and a DC/DC power converter. However, also other electronic applications, such as inverters, etc. may be possible. As substrate or wafer for the semiconductor chips, a semiconductor substrate, i.e. a silicon substrate, may be used. Alternatively, a silicon oxide or another insulator substrate may be provided. It is also possible to implement a germanium substrate or a III-V-semiconductor material. For instance, exemplary embodiments may be implemented in GaN or SiC technology. Furthermore, exemplary embodiments may make use of standard semiconductor processing technologies such as appropriate etching technologies (including isotropic and anisotropic etching technologies, particularly plasma etching, dry etching, wet etching), patterning technologies (which may involve lithographic masks), deposition technologies (such as chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), sputtering, etc.). The above and other objects, features and advantages will become apparent from the following description and the appended claims, taken in conjunction with the accompanying drawings, in which like parts or elements are denoted by like reference numbers. The illustration in the drawing is schematically and not to scale. Before exemplary embodiments will be described in more detail referring to the figures, some general considerations will be summarized based on which exemplary embodiments have been developed. According to an exemplary embodiment, system soldering during manufacturing a power module may be accomplished by provisionally and partially connecting an upper mounting surface of a support body with a lower surface of a cup-shaped solder body. The solder body, due to its cup shape, may advantageously define a target accommodation volume of a carrier to be placed therein. Preferably after provisionally connecting the support body with the one or more solder bodies at a bottom side, a respective carrier with surface mounted electronic component(s) may be placed in the cavity of the provisionally connected and cup-shaped respective solder body. Thereafter, the obtained arrangement of support body, one or more solder bodies thereon and one or more carriers with surface-mounted power semiconductor chips in the solder bodies may be interconnected with each other by soldering. Advantageously, the twofold definition of the spatial relationship between support body, solder bodies and carriers by (i) the provisional partial attachment between support body and solder bodies and (ii) the spatial confinement of a respective carrier accommodation volume within the respective solder body may render the manufacturing process very simple. In particular, the use of an auxiliary solder device or tool may be dispensable according to exemplary embodiments for ensuring spatial accuracy. In order to be able to position carriers with surface mounted chips precisely during a soldering process for connection with a plate-shaped support body, the carriers are conventionally soldered with preform soldering in special solder devices. However, such solder devices or molds have the disadvantage that they are mechanically complex. This results in high manufacturing effort and long production times for the equipment. According to an exemplary embodiment, it may be possible to realize, by the use of a pre-formed solder body with edge elevation, system soldering of a module without the requirement of a soldering device. System soldering is a procedure carried out during the production of power modules for interconnecting chip carriers with a support body. The constituents for system soldering are thus a support body (for instance a module base plate), a pre-formed or pre-shaped solder body and one or more carriers. On each carrier, one or a plurality of electronic components such as power semiconductor chips are mounted. According to an exemplary embodiment, a shell-shaped or cup-shaped solder body is provided. After a punctual, not full-surface pre-fixing or provisional attachment of the support body on the respective solder body and after a subsequent assembly of a carrier in each solder body, system soldering may be carried out. As a result, the respective solder body may be precisely positioned in a horizontal direction with respect to the support body or module base plate. Furthermore, each carrier may be precisely aligned with respect to its assigned solder body in view of a properly defined accommodation cavity confined by the elevated edge. This ensures a proper positioning of pre-formed solder bodies and carriers with respect to a support body before system soldering. In particular, the mentioned provisions may ensure a reliable protection against vibrations and shocks. FIG.1illustrates constituents of a module100before assembly according to an exemplary embodiment.FIG.2illustrates the constituents of the module100ofFIG.1after assembly. The stacked arrangement shown inFIG.1andFIG.2shall provide a thermally conductive connection between the shown constituents.FIG.3illustrates a solder body102of the module100ofFIG.2.FIG.4illustrates a detail180of the solder body102ofFIG.3.FIG.5illustrates a plan view of the module100ofFIG.2.FIG.6illustrates a cross-sectional view of a detail182of the module100along a line A-A shown inFIG.5.FIG.7illustrates a three-dimensional view of a support body110and solder bodies102of the module100ofFIG.2before accommodating carriers108with electronic components130mounted thereon in cavities defined by the shape of the solder bodies102. The readily manufactured module100shown inFIG.2comprises a support body110as a (for instance metallic) bottom base plate of the module100. For instance, the support body110may be a leadframe, a printed circuit board, an AMB substrate or a DAB (direct aluminium bonding) or DCB (direct copper bonding) substrate. It is also possible that the support body110is a metal plate or a metal ceramic compound. A plurality of solder bodies102are used for manufacturing the module100. For instance, each solder body102may be made of a solderable material such as SnAg, SnPb, SnSb, NiSn, NiSnSb, AgSnCu and/or SnPbAg. Before soldering, each comprises a planar plate-shaped base portion104and an elevated edge106. This can be seen best inFIG.4andFIG.6. In the shown embodiment, the elevated edge106extends along the entire circumference of the base portion104. In other words, the elevated edge106of the described embodiment has a closed annular shape. A plurality of carriers108is provided, wherein each carrier108is accommodated in an assigned one of the multiple solder bodies102. For instance, a carrier180may be a leadframe, a ceramic substrate having metallic layers on both opposing main surfaces thereof, etc. More specifically, the carrier102may be for instance a DCB substrate, a DAB substrate, a leadframe, an AMB substrate or a ceramic or glass carrier. One or more electronic components130may be on the respective carrier130. For instance, such electronic components130may for instance be power semiconductor chips such as IGBTs, diodes, MOSFETs or resistors. The electronic components130may be soldered or sintered on the respective carrier108. They may also be wire-bonded to establish a desired electric connection. It is also possible that a top surface of the electronic components130and a top surface of the respective carrier108are provided with an appropriate coating, such as a coating with a silicone gel. Each carrier108may be accommodated in a cavity formed by the elevated edge106so that the elevated edge106extends vertically along part of the sidewall of the respective carrier108(seeFIG.6). When a carrier108unintentionally slides on the solder body102prior to soldering, the sidewall of the bottom portion of the carrier108will abut against the elevated edge106which will therefore prevent that the respective carrier108is erroneously positioned with respect to the assigned base portion104. In other words, since each carrier108is spatially confined by the respective elevated edge106of the assigned solder body102, a correct mutual positioning between carrier108and solder body102can be ensured. In the described embodiment, multiple electronic components130are mounted on each of the carriers108. Said electronic components130may be power semiconductor dies, such as MOSFET dies, IGBT dies, diode dies, resistor components, etc. Consequently, module100may be configured as power module100. One powerful measure to obtain the described high spatial accuracy is the described configuration of the solder body102used for manufacturing the module100. As shown in particular inFIG.4andFIG.6, the solder body102comprises the flat or planar base portion104for accommodating a bottom surface of an assigned carrier108. Moreover, each solder body102comprises the elevated edge106extending along the entire circumference of the base portion104as an annular rim. Consequently, the accommodated carrier108is spatially delimited and confined by the elevated edge106. Descriptively speaking, the solder body102is cup-shaped or bowl-shaped. Preferably, the solder body102consists exclusively of solderable material. The solder body102composed of base portion104and elevated edge106may be preferably integrally formed. As shown inFIG.3, the base portion104is a plate portion. In the described embodiment and as can be seen inFIG.6, the edge106is curved with respect to the base portion104. In the shown embodiment, the curved edge106has a substantially circular rounding at an interface to the base portion104. For manufacturing the illustrated module100, a number of (for instance four) solder bodies102is provided. Each solder body102is shaped to have the described plate-shaped base portion104and the vertically protruding elevated edge106extending as a ring (or part thereof) along the perimeter of the base portion104. The elevated edge106vertically protrudes beyond the base portion104and may be formed by bending or embossing a planar blank of solderable material. Referring toFIG.3andFIG.4, the solder body102may be stamped and may then be made subject to a bending or embossing procedure for defining the elevated edge106. Referring toFIG.6, the elevated edge106may be formed to protrude vertically beyond the base portion104by a distance D. Distance D is preferably in a range between 150 μm to 500 μm. A cavity for accommodating a bottom portion of the carrier108, as shown inFIG.6, is thus delimited by the base portion104and the elevated edge106. As indicated inFIG.6, a vertical thickness H of the base portion104may be in a range between 150 and 350 μm. Referring toFIG.3, a length L and a width B of the substantially rectangular solder body102may each be in a range between 20 mm and 70 mm, so that the area of the solder body102may be in a range from 20×20 mm2to 70×70 mm2. As shown inFIG.6, the electronic component130may for instance have a thickness d in a range between 40 μm and 100 μm when it is a power semiconductor chip. The electronic component130can also be a surface-mounted device such as a resistor and may then have a larger thickness d of for instance up to 1 mm or even up to 2 mm. Still referring toFIG.6, the carrier108is a DCB (direct copper bonding) substrate and may have a central electrically insulating and thermally conductive sheet140(for instance made of a ceramic) covered on both opposing main surfaces thereof with a respective metallic sheet142,144(for instance copper sheets). The central sheet140may for instance have a thickness in a range between 0.35 mm and 1 mm. The metallic sheets142,144may each have a thickness in a range between 250 μm and 500 μm. Next, manufacture of module100will be explained. Firstly, the solder bodies102are placed on planar support body110, as shown inFIG.7. Still before subsequently forming a solder connection between the support body110and carriers108having surface mounted electronic components130, the facing surfaces of the solder bodies102on the one hand and of the support body110on the other hand are provisionally and only partially attached to each other. This provisional attaching or prefixing of the solder bodies102and the support body110may be carried out for example by using a volatile adhesive agent increasing adhesion between the contact surfaces of support body110and respective solder body102. Additionally or alternatively, the provisional partial attachment may be accomplished by spot soldering and/or laser welding. A further powerful measure to obtain the described high spatial accuracy is the mentioned provisional attachment of support body110and solder bodies102. Undesired relative sliding between support body110and solder bodies102prior to soldering the solder bodies102may therefore be reliably prevented. When using an adhesive agent for pre-pinning the support body110and the solder bodies102, such an adhesive agent may modify the surface tension for fixing. Spot welding and laser welding may pre-pin support body110and solder body102together by a thermal impact. Thereafter, each of a number of carriers108(in the shown embodiment four) may be placed in the cavities of the solder bodies102. On each carrier108, a number of electronic components130(for instance power semiconductor chips) is surface mounted. Each carrier108may be placed in the cavity of an assigned solder body102being already prefixed at the support body110. Hence, each carrier108is placed on the base portion104of the assigned solder body102and is spatially confined by the elevated edge106. Thereby, a desired spatial relationship between support body110, solder bodies102and carriers108may be ensured with high precision. Thus, the solder bodies102are placed and pre-fixed on the support body110before placing the carriers108in the assigned solder bodes102. For instance, a positional accuracy may be in a range of ±0.3 to ±1 mm prior to soldering. Thereafter, the provisionally pre-connected arrangement of support body110, solder bodies102and carriers108may be made subject to a soldering process. For instance, said arrangement may be placed in a solder oven (not shown) and may be heated to an elevated temperature of for example 350° C. As a result, the solderable material of the solder bodies102becomes flowable, re-solidifies and is thereby integrally connected with the support body110and with the carriers108by soldering. During said soldering process, the solder material of the solder bodies102becomes flowable, subsequently re-solidifies and thereby accomplishes the described permanent solder connections. During soldering, it is for instance possible to use a flux, as known by those skilled in the art. FIG.1illustrates constituents for the described system soldering to be carried out during manufacturing the module100. The system soldering means that the parts or constituents illustrated inFIG.1are firmly connected to each other to obtain module100shown inFIG.2. Hence,FIG.2shows the result of the system soldering. By exemplary embodiments, said system soldering may be carried out advantageously without separate solder device, tool or mold. For this purpose, the pre-formed solder bodies102(seeFIG.3andFIG.4) are provided in a bowl-shape or cup-shape. At planar base plate104, an edge elevation is created as elevated edge106by bending or embossing. This allows to guide the respective carrier108into a solder shell in form of an assigned solder body102(seeFIG.5andFIG.6). Hence,FIG.5andFIG.6illustrate a horizontal carrier guide through shell-shaped solder bodies102. Referring toFIG.6, the solder shell or solder body102has a bending angle of 90°. In order to ensure a precise positioning of the solder body102and the carrier108on the support body110(which may be embodied as module base plate) before processing in the soldering oven, the solder body102(compareFIG.7) can be treated with a volatile adhesion agent for obtaining a partial pinning before soldering the carrier108with the support body110by means of the solder body102. This ensures that vibrations and shocks before soldering do not cause any displacement of solder body102and applied carrier108, also with respect to support body110. Provisional attachment or pinning is for instance also possible by a partial heat impact to accomplish dot soldering, laser welding, etc.FIG.7illustrates the structure obtained after pinning the solder bodies102to the support body110.FIG.7shows the result of the partial thermal attachment between support body110and solder bodies102. Thus,FIG.7illustrates a scenario before placing the carrier108in the cavities formed on the upper side of the solder bodies102thanks to the elevated edge106. FIG.8illustrates a three-dimensional view of a support body110with pre-fixed solder bodies102of a module100according to another exemplary embodiment. Advantageously, the support body110ofFIG.8may be equipped with solderable portions112into which material of the solder bodies102will flow during soldering. The solderable portions112may correspond to the surface portions of the support body110on which the solder bodies102are to be placed. Moreover, the surface of the support body110may be provided with one or more non-solderable portions114, which may also be denoted as non-wettable portions, into which flowable solder material of the solder bodies102will not flow during soldering. For instance, the mentioned non-solderable portion114may be embodied as a solder resist or an oxide surface. In order to avoid leakage of the liquid solder during the soldering process, it is possible to provide the non-wetting surfaces of the support body110with solder-repellent surfaces, as shown inFIG.8. Thus, during the soldering process, a centering of the carriers108can be carried out by surface stresses of the liquid solder. The solder-repellent surface can be defined by a solder-stop varnish or an oxide surface. Hence,FIG.8shows solder-repellent surfaces on the module base plate or support body110. Descriptively speaking, the solder material of the solder bodies102only flows into the wettable or solderable surface portions112, not in the non-wettable or non-solderable surface portions114. This improves the homogeneity of the solder material provided on surface portions of the support body110on which the carriers108shall be mounted. FIG.9illustrates a stack184of solder bodies102with adhesion-reducing surface profiles116according to another exemplary embodiment.FIG.10illustrates a detail188of a stackable solder body102with adhesion-reducing surface profile116according to an exemplary embodiment. The solder body102shown inFIG.9andFIG.10can be designed in a bowl-shaped way. The solder bowl or solder body102of the shown embodiment may have an elevated edge106with an angle of more than 90° with respect to the planar solder surface defined by the base portion104. As a result of such an obtuse angle, the solder bodies102are advantageously stackable. Moreover, the base portion104of the solder bodies102shown inFIG.9andFIG.10are partially provided with a surface profile116. Although not shown, both opposing main surfaces of the base portion104may be provided with such a surface profile116. In order to allow a better stackability of the pre-formed solder bodies102, the angle between base portion104and elevated edge106can be above 90° and preferably not more than 150°. A corresponding bending can be made in a curved manner with a radius (seeFIG.6) or angled or sharp-edged. In order to ensure a better separation between stacked solder bodies102, lower adhesive forces between the stacked individual solder bodies102can be realized by embossing of the planar surface.FIG.9andFIG.10show such an embossed solder body102. FIG.11illustrates a detail of an elevated edge106of a solder body102according to an exemplary embodiment. According toFIG.11, the edge106is angled with respect to the base portion104by an angle of 90°. FIG.12illustrates a detail of an elevated edge106of a solder body102according to another exemplary embodiment. According toFIG.12, the edge106may be angled with respect to the base portion104by an angle in a range between 90° and 150°. FIG.13illustrates an exploded view of a module100according to an exemplary embodiment.FIG.14illustrates a cross-sectional view of this module100. FIG.13andFIG.14show that further constituents may be provided for completing manufacture of the module100.FIG.13shows in a lower portion the above described support body110, solder bodies102and carriers108. Above the carriers108, a frame160with electric terminals162is shown. A lid164is attached to the upper side of the frame160. The frame160, in turn, is placed on top of the carriers108with surface-mounted electronic components130. FIG.14shows the module100in the completely assembled configuration. It should be noted that the term “comprising” does not exclude other elements or features and the “a” or “an” does not exclude a plurality. Also, elements described in association with different embodiments may be combined. It should also be noted that reference signs shall not be construed as limiting the scope of the claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps. | 38,330 |
11942336 | REFERENCE NUMERALS 10A,10B: underfill film11: Base12: Adhesive layer12″: Cured adhesive layer13: Second base20: Semiconductor chip21: Bump30: Package substrate31: Bonding pad DETAILED DESCRIPTION Embodiments and examples of the present invention are provided to better explain the present invention to those of ordinary skill in the art, and embodiments given below may be modified in various manners and have several embodiments, but the scope of the present invention is not limited to the embodiments. Throughout the specification, like reference numerals generally indicate identical, functionally similar, and/or structurally similar elements. It is to be understood that all terms (including technical and scientific terms) used in the present disclosure have meanings generally understood by those of ordinary skill in the technical field to which the present disclosure belongs, unless otherwise defined. In addition, terms defined in a commonly used dictionary are not to be interpreted ideally or excessively unless clearly defined in particular. In addition, since the size and thickness of each component illustrated in the drawings are arbitrarily indicated for convenience of description, the present invention is not necessarily limited to the drawings. In order to clearly express various layers and regions in the drawings, the thicknesses are enlarged. In addition, for convenience of description, the thickness of some layers and regions are exaggerated in the drawings. It is to be understood that terms, such as “comprising”, “including”, “having” and the like, used herein are open-ended terms that imply the possibility of including other embodiments, rather than excluding other components, unless otherwise stated. In addition, throughout the specification, “above” or “on” means not only when it is located on or beneath the target part, but also includes the case where there is another part therebetween, and it does not necessarily mean that it is positioned above with respect to the direction of gravity. Terms such as “first” and “second” used herein are used to distinguish a plurality of components from each other, and do not limit the order or importance of the components. In addition, when a component is referred to as being “connected” or “coupled” to another component, it is to be understood that the component may be directly connected to or coupled to the other component, or that it may be connected or may be “connected” or “coupled” via other components disposed therebetween. In addition, throughout the specification, the term “planar” may mean when the target part is viewed from above, and term “cross-section” may mean when viewed from the side of the target part that is vertically cut. <Underfill Film for Semiconductor Package> FIG.1is a cross-sectional view illustrating a structure of an underfill film for semiconductor packages according to a first embodiment of the present invention, andFIG.2is a cross-sectional view illustrating a structure of an underfill film for semiconductor packages according to a second embodiment of the present invention. Underfill films10A and10B according to the present invention are non-conductive adhesive films used to relieve stress applied to a connecting portion between a bump of a semiconductor chip and a bonding pad of a package substrate during semiconductor packaging, and specifically has properties optimized for a chip placement mechanism. As illustrated inFIGS.1and2, the underfill films10A and10B include a base (e.g., substrate)11and an adhesive layer12disposed on one surface of the base. Optionally, another base (hereinafter, “second base”)13disposed on another surface of the adhesive layer may be further included (seeFIG.2). Hereinafter, an underfill film10A for semiconductor packages according to the first embodiment of the present invention will be described with reference toFIG.1. Base In the underfill film according to the present invention, the base11is a portion for protecting a surface of the adhesive layer while supporting the adhesive layer and is delaminated (e.g., detached) and removed when the underfill film is in use. As the base11, any plastic film commonly known in the art as long as it may be delaminated may be used without limitation, and a release paper may also be used. Non-limiting examples of the applicable plastic films may include polyester films such as polyethylene terephthalate (PET), polybutylene terephthalate, and polyethylene naphthalate, polyethylene films, polypropylene films, cellophane, diacetylcellulose films, triacetylcellulose films, acetylcellulose butyrate film, polyvinyl chloride film, polyvinylidene chloride film, polyvinyl alcohol film, ethylene-vinyl acetate copolymer film, polystyrene film, polycarbonate film, polymethylpentene film, polysulfone film, polyether ether ketone film, polyethersulfone film, polyetherimide film, polyimide film, fluororesin film, polyamide film, acrylic resin film, norbornene-based resin film, cycloolefin resin film, and the like. Such plastic films may be transparent or translucent or may be colored or uncolored. As an example, the base11may be polyethylene terephthalate (PET). As another example, the base11may be polyimide (PI). A release layer may be disposed on such a plastic film. When the base11is separated from the adhesive layer12, the release layer facilitates separation of the adhesive layer from the base while maintaining the shape of the adhesive layer without damage. In such an embodiment, the release layer may be a commonly used film-type release material. A component of the release material used in the release layer is not particularly limited, and any conventional release component known in the art may be used. Non-limiting examples thereof may include an epoxy-based release agent, a release agent made of a fluororesin, a silicone-based release agent, an alkyd resin-based release agent, a water-soluble polymer, and the like. In addition, if necessary, a component of the release layer may include a powder filler such as silicon, silica, and the like. In such a case, as the powder filler in the form of fine particles, two-types of powder fillers may be mixed with each other, and their average particle size may be appropriately selected in consideration of the surface roughness to be formed. addition, a thickness of the release layer may be appropriately adjusted within a conventional range known in the art. A method for forming the release layer is not specifically limited, and any well-known methods, such as heat press, heated roll lamination, extrusion lamination, application of a coating liquid, and drying, may be applicable. A thickness of the base11is not particularly limited and may be adjusted within a conventional range known in the art, for example, in a range of about 25 to 150 μm, specifically in a range of about 30 to 100 μm, more specifically in a range of about 30 to 50 μm. In addition, a release force of the base11is not particularly limited, and may be, for example, in a range of about 1 to 500 gf/inch, and specifically in a range of about 10 to 100 gf/inch. Adhesive Layer In the underfill film according to the present invention, the adhesive layer12, disposed on one surface of the base11, may bond a semiconductor chip to a package substrate when aligning the semiconductor chip with the package substrate during semiconductor packaging, and as an underfill, may redistribute stress and strain caused by a difference in thermal expansion coefficient between the semiconductor chip and the package substrate. The adhesive layer12of the present invention, in a semi-cured state, has a lowest melt viscosity of 1000 Pa·s or less at about 150 to 160° C. Such an adhesive layer12is disposed between a semiconductor chip including bumps and a package substrate including bonding pads during packaging, and they are pressed under the conditions of a stage temperature of 130 to 150° C., a die bonder head at room temperature, 10 to 200 N, and 1 to 5 seconds. In such a case, a predetermined temperature is applied to a stage for the actual bonding and a stage of a die bonder, while the die bonder head is at room temperature. Accordingly, it is differentiated from the conventional art using a die bonder that necessarily applies a high temperature. Specifically, since the adhesive layer12of the present invention has a lowest melt viscosity of about 1000 Pa·s or less at about 150 to 160° C., specifically in a range of about 100 to 900 Pa·s, and more specifically in a range of about 300 to 600 Pa·s, which is relatively low, such that it easily melts even by compression under certain conditions (e.g., about 150° C., 75 to 200 N, 1 to 3 seconds) to have fluidity. Accordingly, when the bump of the semiconductor chip is pre-bonded to the bonding pad of the package substrate, the adhesive layer12positioned between the bump of the semiconductor chip and the bonding pad of the package substrate is easily melted to fill an empty space between the bump and the bonding pad, and thus the connection reliability may be increased. In particular, since the adhesive layer12has high fluidity, it is possible to fill a fine empty space with a fine pitch. In addition, since the adhesive layer12of the present invention may serve not only as an underfill but also as a flux, there is no need to apply a separate flux on the bonding pad or wash the flux, which is dissimilar to the conventional art. Accordingly, voids which may occur due to residues of flux or residues of flux washing solvent are substantially not generated. As such, the adhesive layer of the present invention is excellent in the gap-filling effect, and it is possible to minimize the generation of voids. In particular, since the underfill film according to the present invention uses a chip placement method in which a semiconductor chip bonded with an adhesive layer is picked up and horizontally moved, aligned and bonded onto a package substrate supported by a bonding stage, it is necessary to control the physical properties of the adhesive layer12to be optimized with such a method. For example, when an onset temperature (Onset Temp.) of the adhesive layer12is controlled to be substantially equal to a pre-set pre-heat temperature (Ts) of the bonding stage, it may be stably bonded even when a compression process, e.g., pre-bonding to be described below, is performed under a certain condition, the production efficiency may be increased by simplifying the semiconductor chip transfer process and the bonding process. As another example, the adhesive layer12may have an onset temperature of about 145±5° C. on a differential scanning calorimeter (DSC), specifically in a range of 143 to 147° C. As used herein, the onset temperature is at a time point at which curing of the adhesive layer12partially starts, and specifically, a curing reaction takes place as an anhydride group of an acid dianhydride curing agent present in the adhesive layer in a semi-cured state is ring-opened into a carboxyl group for a flux function. As such, by precisely controlling the onset temperature (Onset Temp.) of the adhesive layer12at which curing is initiated to be substantially the same as the pre-heat temperature (Ts) of the stage at which the packaging bonding is performed, it may be optimized for the chip placement method. In addition, a peak temperature (Peak Temp.) of the adhesive layer12may be 165±5° C., and a temperature difference (ΔT) between the onset temperature and the peak temperature may be 25±5° C. As used herein, the peak temperature means a highest peak temperature in a DSC graph. When the adhesive layer12has the above-described onset temperature and peak temperature characteristics, it is possible to secure physical properties optimized for the chip placement method and to exhibit stable curing characteristics at high temperatures. A thickness of the adhesive layer12is adjusted in consideration of the lowest melt viscosity of the adhesive layer. In an example, the thickness of the adhesive layer12may be in a range of 80 to 120% with respect to a distance (e.g., 100%) between the semiconductor chip and the package substrate. As long as the adhesive layer12according to the present invention satisfies the aforementioned melt viscosity (M.V) and onset temperature (Onset Temp.) physical property values, components constituting the adhesive layer12and its composition are not particularly limited. The adhesive layer12may be made of a cured product or a semi-cured product of an adhesive resin composition. As a specific example of the adhesive resin composition, (a) an epoxy resin containing a liquid epoxy resin, a phenoxy resin and a polyfunctional epoxy resin; (b) an acid anhydride curing agent; (c) a nitrogen (N)-containing heterocyclic compound; and (d) a filler may be included. More specifically, in the present invention, as a main resin component constituting the adhesive layer12, at least three or more kinds including a liquid epoxy resin, a phenoxy resin, and a polyfunctional epoxy resin are mixed, and a mixing ratio thereof is adjusted to be within a predetermined range. Among the at least three kinds of epoxy resins, the liquid epoxy resin is an epoxy resin in a liquid state at 25±5° C. and is a thermosetting resin. Such a liquid epoxy resin may impart adhesiveness and curability to the adhesive resin composition and may impart curing uniformity to the adhesive layer after curing. Non-limiting examples of applicable liquid epoxy resins may include liquid bisphenol A-type epoxy resin, liquid bisphenol F-type epoxy resin, liquid naphthalene-type epoxy resin, liquid aminophenol-type epoxy resin, liquid hydrogenated bisphenol-type epoxy resin, liquid alicyclic epoxy resin, liquid alcohol ether-type epoxy resin, liquid cycloaliphatic-type epoxy resin, liquid fluorene-type epoxy resin, liquid siloxane-based epoxy resins, and the like, among which liquid bisphenol A-type epoxy resin and liquid bisphenol F-type epoxy resin, and liquid naphthalene-type epoxy resin are suitable in terms of adhesiveness, curability, durability, and heat resistance. These may be used either solely or as a mixture of two or more kinds thereof. Specifically, liquid epoxy resin products may include a bisphenol F-type epoxy resin (product name: YDF8170) manufactured by Nippon Steel & Sumikin Chemical, a bisphenol A-type epoxy resin (product name: EXA-850CRP) manufactured by DIC, a bisphenol F-type epoxy resin (product name: YDF870GS) manufactured by Nippon Steel & Sumikin Chemical, a naphthalene-type epoxy resin (product name: HP4032D) manufactured by DIC, an aminophenol-type epoxy resin (grade: JER630, JER630LSD) manufactured by Mitsubishi Chemical, a siloxane-based epoxy resin (product name: TSL9906) manufactured by Momentive Performance Materials, and 1,4-cyclohexanedimethanol diglycidyl ether (product name: ZX1658GS) manufactured by Nippon Steel & Sumikin Chemical, but embodiments are not limited thereto. The phenoxy resin is a thermoplastic polymer containing an epoxy group at at least one end (e.g. terminal), and since an equivalent weight of the epoxy group in the molecule is significantly small as compared to a molecular weight, it participates in curing but may impart fluidity at high temperatures. Due to the phenoxy resin, the adhesive layer of the present invention may be molded into a film shape in a semi-cured (B-stage) state at room temperature (about 25±5° C.). The applicable phenoxy resin is not particularly limited as long as it is a polymer containing a phenoxy group in a polymer chain, and an epoxy group at at least one end thereof. For example, the phenoxy resin may be a compound represented by the following Chemical Formula 1, but embodiments are not particularly limited thereto. In Chemical Formula 1,a and b are each an integer ranging from 1 to 4,a plurality of R1and a plurality of R2are the same or different from each other, each independently being selected from the group consisting of hydrogen, halogen, a C1to C10alkyl group, a C3to C20cycloalkyl group, a C5to C20aryl group and a nitro group, and specifically, each independently being selected from the group consisting of hydrogen, halogen, a C1to C5alkyl group, a C3to C10cycloalkyl group, a C5to C10aryl group and a nitro group;R3to R8are the same as or different from each other, each independently being hydrogen or a hydroxy group, provided that at least one of R3to R8is a hydroxy group;X1is a single bond or a C1to C10alkylene group, and specifically a single bond or a C1to C5alkylene group,Y1and Y2are the same as or different from each other, each independently being hydrogen, a hydroxy group or an epoxy group, provided that at least one of Y1and Y2is an epoxy group, andn is an integer ranging from 30 to 400. In addition, the polyfunctional epoxy resin is an epoxy resin containing at least two or more epoxy groups. Such a polyfunctional epoxy resin imparts electrical insulation, heat resistance, chemical stability, toughness, and moldability to the adhesive layer. The applicable polyfunctional epoxy resin is not particularly limited as long as it is an epoxy resin containing two or more, specifically, two to five epoxy groups per molecule (monomer). Non-limiting examples of the polyfunctional epoxy resin may include an epoxy resin obtained by epoxidizing a condensate of phenol or alkyl phenols with hydroxybenzaldehyde, phenol novolak-type epoxy resins, cresol novolak-type epoxy resins, phenol aralkyl-type epoxy resins, biphenyl-type epoxy resins, bisphenol A-type epoxy resins, bisphenol F-type epoxy resins, linear aliphatic epoxy resins, alicyclic epoxy resins, heterocyclic epoxy resins, epoxy resin containing spiro ring, xylok-type epoxy resins, polyfunctional epoxy resins, naphthol novolak-type epoxy resins, bisphenol A/bisphenol F/bisphenol AD novolak-type epoxy resins, bisphenol A/bisphenol F/bisphenol AD glycidyl ether epoxy resins, bishydroxybiphenyl-type epoxy resins, dicyclopentadiene-based epoxy resins, naphthalene-based epoxy resins, and the like. Among them, polyfunctional epoxy resins that are non-liquid at 25±5° C. are preferable. In such an embodiment, the non-liquid phase at 25±5° C. means an epoxy resin that is semi-solid or solid at 25±5° C., and also includes an epoxy resin close to the solid phase. A content ratio among the at least three kinds of epoxy resins constituting the adhesive layer12, for example, a liquid epoxy resin, a phenoxy-based resin, and a polyfunctional epoxy resin, is preferably adjusted to a predetermined range in consideration of adhesiveness and filling properties. As an example, a use ratio (mixing ratio) among the polyfunctional epoxy resin, the phenoxy resin, and the liquid epoxy resin may be 4:3 to 4:2 to 3 by weight, specifically 4:3 to 3.5:2 to 2.5 by weight. When the above-mentioned epoxy mixing ratio is satisfied, by controlling the lowest melt viscosity and the onset temperature at which curing starts to a predetermined range, it is possible to secure the connection reliability of the package through improvement of adhesion and fillability, and it is optimized to a chip placement method such that it is possible to increase production efficiency by simplifying the semiconductor chip transfer and bonding process. The adhesive resin composition constituting the adhesive layer12according to the present invention includes an acid anhydride-based curing agent. The acid anhydride-based curing agent may cure at least one of a liquid epoxy resin, a phenoxy resin, and a polyfunctional epoxy resin, and exhibit flux properties. Non-limiting examples of the applicable acid anhydride-based curing agent may include tetrahydrophthalic anhydride, methyl tetrahydrophthalic anhydride, methyl hexahydrophthalic anhydride, hexahydrophthalic anhydride, trialkyl tetrahydrophthalic anhydride, methyl cyclohexenedicarboxylic anhydride, phthalic anhydride, maleic anhydride, pyromellitic anhydride, and the like, which may be used either solely or as a mixture of two or more kinds thereof. A content of the acid anhydride curing agent is not particularly limited, and may be appropriately adjusted within a range known in the art. For example, the acid anhydride curing agent may be included in a range of 0.3 to 1.0 equivalents of anhydride, and specifically may be in a range of 0.4 to 0.7 equivalents, with respect to 1 equivalent of the epoxy resin. In addition to the acid anhydride-based curing agent described above, the adhesive resin composition of the present invention may further include one or more curing agents known in the art for curing the epoxy resin. For example, aromatic amine-type curing agents, such as metaphenylenediamine, diaminodiphenylmethane, diaminodiphenyl sulfone; aliphatic amine curing agents such as diethylenetriamine and triethylenetetraamine; phenolic curing agents such as phenol aralkyl-type phenol resins, phenol novolak-type phenol resins, xylok-type phenol resins, cresol novolak-type phenol resins, naphthol-type phenol resins, terpene-type phenol resins, polyfunctional-type phenol resins, dicyclopentadiene-type phenol resins, naphthalene-type pheno resins, phenolic curing agents such as novolak-type phenolic resins synthesized from bisphenol A and resol; and latent curing agents such as dicyandiamide, which may be used either solely or as a mixture of two or more kinds thereof. The adhesive resin composition constituting the adhesive layer12according to the present invention includes a nitrogen (N)-containing heterocyclic compound. The nitrogen (N)-containing heterocyclic compound is a kind of curing catalyst capable of accelerating curing, and may not only control the curing rate, but also ensure high-temperature stability of the adhesive layer. The nitrogen (N)-containing heterocyclic compound may be at least one selected from the group consisting of a compound represented by the following Chemical Formula 2 and a compound represented by the following Chemical Formula 3. In Chemical Formulas 2 and 3,n1 is 1 or 2,n2 is an integer in a range of 0 to 2,X1to X6are the same as or different from each other, each independently representing N or C(R1), provided that at least one of X1to X6is N; andY1to Y6are the same as or different from each other, each independently representing N(R2) or C(R3)(R4), provided that at least one of Y1to Y6is N(R2), where the plurality of C(R1) are the same as or different from each other, the plurality of N(R2) are the same as or different from each other, and the plurality of C(R3)(R4) are the same or different from each other, andR1, R2, R3and R4are each independently selected from the group consisting of hydrogen, deuterium (D), halogen, a cyano group, a nitro group, a C1to C20alkyl group, a C2to C20alkenyl group, and C2to C20alkynyl group. Specifically, in Chemical Formula 2, one or two of X1to X6may be N, and the others may be C(R1). In addition, in Chemical Formula 3, one or two of Y1to Y6may be N(R2), and the others may be C(R3)(R4). In addition, in Chemical Formulas 2 and 3, R1, R2, R3and R4may each independently be selected from the group consisting of: hydrogen, deuterium (D), halogen, a cyano group, a nitro group, a C1to C12alkyl group, a C2to C12alkenyl group, and a C2to C12alkynyl group. Examples of the compound represented by Chemical Formula 2 may include, but are not limited to, a pyrazine-based compound, a pyridine-based compound, and an imidazole-based compound. Specifically, a non-limiting example of the compound represented by Chemical Formula 2 may be a compound represented by Chemical Formula 2a below. Examples of the compound represented by Chemical Formula 3 may include, but are not limited to, piperazine-based compounds. Specifically, non-limiting examples of the compound represented by Chemical Formula 3 may be a compound represented by Chemical Formula 3a below, or a compound represented by Chemical Formula 3b below. As an example, the N-containing heterocyclic compound may include at least one selected from the group consisting of a pyrazine-based compound, a pyridine-based compound, and a piperazine-based compound. In the adhesive resin composition of the present invention, a content of the N-containing heterocyclic compound is preferably adjusted in consideration of the type and content of the acid anhydride-based curing agent in use. For example, the N-containing heterocyclic compound may be included in an amount of 0.005 equivalents or more and less than 0.02 equivalents, and specifically in a range of 0.01 to 0.015 equivalents, with respect to 1 equivalent of the acid anhydride curing agent. The adhesive resin composition forming the adhesive layer12according to the present invention includes a conventional filler known in the art. The filler may not only exhibit thixotropic properties to control melt viscosity, but also improve adhesion and lower the coefficient of thermal expansion. Such fillers may be organic fillers or inorganic fillers. Specifically, the inorganic filler may include, for example, metal components such as gold powder, silver powder, copper powder, nickel powder, and the like; non-metallic components such as alumina, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, silica, boron nitride, titanium dioxide, glass, iron oxide, ceramic, and the like, and the organic filler may include, for example, carbon, rubber-based filler, polymer-based filler, and the like, but embodiments are not limited thereto. These may be used either solely or as a mixture of two or more kinds thereof. The shape and size of the filler are not particularly limited, and for example, the shape of the filler may be angular or spherical, and an average particle diameter thereof may be in a range of about 10 to 100 nm. If the average particle diameter of the filler is within the aforementioned range, mechanical properties of the cured product may be further improved. According to one example, the filler may be silica having an average particle diameter in a range of about 10 to 100 nm. A content of the filler is not particularly limited, and for example, a total amount of the adhesive resin composition (e.g., with respect to solid content) may be a remaining amount adjusted to be 100 percentage by weight (wt %), and specifically, may be in a range of about 10 to 50 parts by weight, specifically in a range of 20 to 40 parts by weight with respect to the total amount (e.g., 100 parts by weight) of the epoxy resin. When the content of the filler is within the above-mentioned numerical range, an adhesive layer having a low coefficient of thermal expansion (CTE) is formed, such that a difference in coefficient of thermal expansion between the substrate and the semiconductor device may be small, thereby capable of minimizing the occurrence of warpage or cracks. As an example of the present invention, in the adhesive resin composition forming the adhesive layer12, a content of the epoxy resin (i.e., a total content of the polyfunctional epoxy resin, the phenoxy resin and the liquid epoxy resin) may be in a range of about 40 to 60 wt % with respect to the total amount (e.g., 100 parts by weight) of the adhesive resin composition, a content of the acid anhydride-based curing agent may be in a range of about 10 to 20 wt % with respect to the total amount of the adhesive resin composition, and a content of the N-containing heterocyclic compound may be in a range of about 0.1 to 0.5 wt % with respect to the total amount of the adhesive resin composition. In addition, a remaining amount of a solvent that satisfies the total weight of the composition may be included. In such an embodiment, the solvent is not particularly limited as long as it is included in the remaining amount that satisfies 100 parts by weight of the composition, and may be, for example, 30 to 60 parts by weight, and specifically 30 to 50 parts by weight. In such a case, a use ratio (mixing ratio) among the polyfunctional epoxy resin, the phenoxy resin, and the liquid epoxy resin constituting the entire epoxy resin may be 4:3 to 4:2 to 3 by weight. The solvent is not particularly limited as long as it has excellent miscibility with the epoxy resin and may disperse them uniformly or dissolve them stably. Examples of such a solvent may be water, an organic solvent, or a mixed solvent thereof, and non-limiting examples thereof may include alcohol-based solvents such as methyl alcohol, ethyl alcohol, isopropyl alcohol, butyl alcohol, and the like; ether-based solvents such as methyl cellosolve, ethyl cellosolve, butyl cellosolve, propylene glycol monomethyl ether, propylene glycol monoethyl ether, cellosolve acetate, and the like; ketone-based solvents such as methyl ethyl ketone, cyclohexanone, acetone, diacetone alcohol, and the like; ester-based solvents such as methyl acetate and ethyl acetate; halogenated hydrocarbon solvents such as chloroform, methylene chloride, tetrachloroethane, and the like, and other solvents such as dimethyl sulfoxide, ethylene glycol, glycerin, sorbitol, formamide, N-methyl formamide, N,N-dimethylformamide, acetamide, N-methyl acetamide, N-dimethylacetamide, N,N-dimethylformamide, tetrahydrofuran, N-methyl-2-pyrrolidone, nitromethane, acetonitrile, and the like. These may be used either solely or as a mixture of two or more thereof. Since the adhesive layer12of the present invention having the above composition is easy to handle, has excellent adhesion, and has a melt viscosity of about 1000 Pa·s or less, which is low, at about 150 to 160° C. as well, occurrence of voids may be significantly reduced, filling properties may be excellent, and thus connection reliability may be improved. In addition, since the onset temperature of the adhesive layer is adjusted to be substantially the same as the preheat temperature (Ts) of the bonding stage, it is optimized for the chip placement method so that semiconductor packaging may be easily configured. The adhesive resin composition of the present invention may optionally further include additives commonly known in the art in addition to the above-described components, as needed, according to the purpose and environment of use of the composition, as long as it does not impair inherent properties of the adhesive layer. For example, solvents such as acetone, methyl ethyl ketone, toluene, and ethyl acetate, adhesion promoters, coupling agents, antistatic agents, contact property enhancers, wettability improvers, leveling enhancers, and the like may be included, but embodiments are not limited thereto. A content of the additives is not particularly limited and may be used in a conventional range known in the art. For example, it may be included in a range of about 0.01 to 10 wt % with respect to the total amount of the resin composition. The above-described adhesive resin composition may be prepared through a method commonly known in the art. For example, the liquid epoxy resin, the phenoxy resin, the polyfunctional epoxy resin, the acid anhydride-based curing agent, the nitrogen (N)-containing heterocyclic compound, the filler, and optional additives may be mixed and stirred at room temperature or appropriately elevated temperature using mixing equipment such as ball mill, bead mill, 3roll mill, basket mill, dyno mill, planetary, and the like, and thus the adhesive resin composition may be prepared. The underfill film according to the present invention may be manufactured by a method commonly known in the art. For example, the underfill film may be manufactured by: diluting the adhesive resin composition obtained through the above-described method with an organic solvent for dilution as needed to mix them to an appropriate concentration to facilitate film formation, and then coating it to a base and drying. The coating and drying method is not particularly limited as long as it is a method capable of forming a coating film, such as bar coating, gravure coating, comma roll coating, roll reverse coating, roll knife coating, die coating, or lip coating. Since the underfill film of the present invention configured as described above has a lowest melt viscosity that is low, occurrence of voids may be minimized during pre-bonding between the semiconductor chip and the package substrate, and the underfill film may have excellent filling properties, thus improved in terms of the connection reliability of the package, and may be applicable to a fine pitch. In addition, by adopting a chip placement method, a mass reflow process may be performed by simplifying the transfer and bonding process of the semiconductor chip, which is dissimilar to the conventional art. Hereinafter, an underfill film10B according to a second embodiment of the present invention illustrated inFIG.2will be described. As illustrated inFIG.2, the underfill film10B of the present invention includes a base (hereinafter, “first base”)11; an adhesive layer12disposed on one surface of the base; and another base (hereinafter, “second base”)13disposed on another surface of the adhesive layer12. The first base11and the adhesive layer12applicable in the present invention are the same as the base and the adhesive layer described in the first embodiment, respectively, and thus descriptions thereof will be omitted. In the present invention, the second base13is a portion disposed on another surface of the adhesive layer13to protect a surface thereof, while supporting the adhesive layer, and is delaminatable (e.g., detachable) to be delaminated and removed when the film is in use. The second base13is substantially the same as or different from the first base, and detailed descriptions thereof are the same as those described with respect to the base of the first embodiment, and thus will be omitted. <Method for Manufacturing Semiconductor Package> Another embodiment of the present invention provides various methods of manufacturing a semiconductor package using the above-described underfill films10A and10B. In particular, since the adhesive layer of the underfill films10A and10B has a lowest melt viscosity of about 1000 Pa·s or less, which is low, at about 150 to 160° C., and the onset temperature of the adhesive layer is substantially equal to the pre-heat temperature of the bonding stage, even when pre-bonding (e.g., compression) is performed under certain conditions, the adhesive layer may readily have fluidity and fill the gap between the semiconductor chip and the package substrate without voids, thereby improving the connection reliability of the semiconductor package. Accordingly, according to the present invention, by using the above-described underfill film, it is possible to simplify the manufacturing process of the semiconductor package, improve production efficiency, and manufacture a semiconductor package having excellent connection reliability. In particular, in the conventional semiconductor packaging, it was necessary to apply a specific high temperature and high pressure to each of the bonding stage and the die bonder head. On the other hand, in the present invention, by using the underfill film adjusted to the above-described physical properties, the semiconductor packaging may be completely performed without separately applying a high temperature to the die bonder head, and thus mass productivity may be improved by simplifying the manufacturing process and reducing costs. In addition, since the electrical connection is made in a state in which voids are minimized due to a subsequent reflow process, the reliability of the package may be improved. Hereinafter, a method for manufacturing a semiconductor package according to an embodiment of the present invention will be described. However, the above-described semiconductor package may be manufactured without limitation according to a conventional method known in the art and is not limited only by the following manufacturing method. If necessary, the steps of each process may be modified or selectively mixed. According to an embodiment, a method for manufacturing the semiconductor package may include: (i) bonding the adhesive layer of the underfill film on a bump of a semiconductor chip provided with the bump (S100); (ii) picking up the bump of the semiconductor chip to which the adhesive layer is bonded, and aligning it on a bonding pad of a package substrate supported on a bonding stage (S200); (iii) putting the aligned semiconductor chip and the package substrate into a pressure chamber oven (S300); (iv) melting the bump of the semiconductor chip to connect the semiconductor chip and the package substrate (S400); and (v) curing the adhesive layer disposed between the connected semiconductor chip and package substrate (S500). Hereinafter, a method for manufacturing a semiconductor package according to the present invention will be described for each process with reference toFIGS.3to6. Hereinafter, a method for manufacturing a semiconductor package according to the present invention will be described for each process step with reference toFIGS.3to6. (a) Disposing Adhesive Layer on Semiconductor Chip; As illustrated inFIG.3, the adhesive layer12of the aforementioned underfill films10A and10B is disposed on bumps21of a semiconductor chip20provided with the bumps21(hereinafter, “S100step”). In general, in the semiconductor chip20, terminals (pads) (not illustrated) for connecting an internal electronic circuit to the outside are formed along an edge of the chip, and, if necessary, they may be formed in one row or two rows along a center portion of the chip. The bumps21are formed on the terminals of the semiconductor chip, respectively. The bump is an external terminal electrically connecting the substrate and the semiconductor chip during packaging and may include a solder bump or a gold (Au) bump. In the present invention, as illustrated inFIG.3, the bases11and13are separated from the underfill films10A and10B, and only the adhesive layer12is disposed on the side of the bump21of the semiconductor chip. In such an embodiment, the semiconductor chip20provided with the bumps21may be press-laminated on the adhesive layer12at a pressure in a range of about 30 to 100 N. In addition, if necessary, the semiconductor chip20may be laminated under pressure at a temperature lower than the onset temperature of the adhesive layer, for example, 50 to 150° C. Accordingly, the adhesive layer is pressed on the bumps of the semiconductor chip in a semi-cured state (B-stage). In such a case, since the adhesive layer may serve not only as an underfill but also as a flux, the present invention does not require washing the bumps with a flux, which is dissimilar to the conventional art. (b) Aligning Semiconductor Chip and Substrate The semiconductor chip20on which the adhesive layer12is pressed in step S100is aligned on the package substrate30(hereinafter, “S200”). Specifically, in the present invention, a chip placement mechanism is employed for a process of transferring the semiconductor chip and a process of aligning and bonding the transferred semiconductor chip on the package substrate supported by the bonding stage. In such a case, it is preferable that the bonding stage on which the package substrate is seated is preheated in advance to a set temperature (Ts) substantially equal to the onset temperature (Onset Temp.) of the adhesive layer provided on the underfill film. For example, the preheat temperature (Ts) of the bonding stage may be 145±5° C. As the package substrate30supported by the bonding stage, any conventional substrate known in the art may be used without limitation. As an example, a substrate having a circuit pattern (not illustrated) formed on one surface thereof, for example, a printed circuit board (PCB) may be used. Bonding pads31are formed on the package substrate30in an area corresponding to the position of the bumps21of the semiconductor chip20. In the present invention, as illustrated inFIG.4, the semiconductor chip20is mounted on the package substrate30so that the semiconductor chip20on which the bumps21are formed is arranged on the bonding pads31. Specifically, the bump21of the semiconductor chip20may be pressed on the bonding pad31of the package substrate30under the conditions of a stage temperature of about 130 to 150° C., a die bonder head at room temperature RT, 10 to 200 N, and 1 to 5 seconds, and thus the package substrate30and the semiconductor chip20may be pre-bonded to each other. In such an embodiment, the adhesive layer12disposed between the semiconductor chip20and the package substrate30flows because its lowest melt viscosity is low, as described above. In the present invention, since the adhesive layer12contains a component capable of serving as a flux, it is unnecessary to apply flux to the bonding pad31of the package substrate30prior to step S200, which is dissimilar to the conventional art. (c) Removing Voids The semiconductor chip and the package substrate aligned in S200are put into a pressure chamber oven (PCO) under certain conditions (hereinafter, “S300”). The conditions for the pressure chamber oven are not particularly limited, and for example, voids may be removed in an oven in a range of about 100 to 200° C., and specifically in a range of about 110 to 150° C. (d) Melting of Bump As illustrated inFIG.5, the bump21of the semiconductor chip20is melted to electrically and mechanically connect the semiconductor chip20and the package substrate30(hereinafter, “S400”). In such a case, the bump is reflowed, and the bump is melted such that the semiconductor chip20and the package substrate30are electrically and mechanically connected. In such an embodiment, the adhesive layer12disposed between the semiconductor chip20and the package substrate30is also melted, so that a void area ratio in the adhesive layer is reduced. For example, after the reflow process, the void area ratio in the adhesive layer12may be 1% or less per 1 m2. Accordingly, the connection reliability of the semiconductor package manufactured according to the present invention may be further improved. (e) Curing of Adhesive Layer As illustrated inFIG.6, the adhesive layer12disposed between the semiconductor chip20and the package substrate30that are connected in step S300is cured (hereinafter, “S500”). Since the adhesive layer12of the present invention has an onset temperature of about 145±5° C., S500may be performed at a temperature higher than the above-described onset temperature, for example, about 160° C. or higher, and specifically in a range of 160 to 250° C. A curing time of the adhesive layer may be appropriately adjusted according to the curing temperature, and may be, for example, in a range of about 0.5 to 3 hours. Subsequently, if necessary, subsequent processes known in the art may be performed. For example, the package substrate may be cut into unit substrate shapes for singulation. In such a case, the process of completely cutting the package substrate in the form of a printed circuit board into package units may be performed using a conventional process known in the art, for example, a saw blade or laser cutting. Hereinafter, the present invention will be described in detail through Embodiments, but the following Embodiments and Experimental Examples are merely illustrative of one aspect of the present invention, and the scope of the present invention is not limited by the Embodiments and Experimental Examples below. Embodiment 1 1-1. Preparation of Adhesive Resin Composition An adhesive resin composition of Embodiment 1 was prepared by mixing each component according to the composition illustrated in Table 1 below. A content unit of each component described in Table 1 is in parts by weight (weight ratio), and specifically, the content of the filler was with respect to 100 parts by weight of the epoxy resin. In addition, the content of the curing agent was set with respect to 1 equivalent of epoxy, and the content of the catalyst was set with respect to 1 equivalent of the curing agent in use. 1-2. Preparation of Underfill Film On one surface of a PET release film (thickness: 38 μm), each of the adhesive resin compositions prepared in Embodiment 1-1 was die-coated, and then dried to form an adhesive layer (thickness: 18 μm), and accordingly, a non-conductive adhesive film was prepared. TABLE 1Comp.Comp.EmbodimentEmbodimentEmbodimentexampleEmbodimentAdhesive resin composition1 (B538)2312EpoxyA) polyfunctional44.442.142.14020resinepoxy (KDCP-130)B) Phenoxy33.436.831.64020epoxy (YP-70)C) Liquid epoxy22.221.126.32020(YD-128)Epoxy ratio (A:B:C)4:3:24:3.5:24:3:2.54:4:2442CuringMHHPA0.50.50.50.50.5agentequivalentsCatalyst2E4MZ-A0.010.010.010.02—equivalents————0.1FillerSilica30.030303030ViscosityLowest melt viscosity6539224771408881(MV, Pa s)DSCOnset Temp.145145144130174(° C.)Peak Temp.165165165155190ΔT2020212516* YD-128: KUKDO Chemical co., Ltd.* YP-70: KUKDO Chemical co., Ltd.* KDCP-130: KUKDO Chemical co., Ltd.* MHHPA: Methylhexahydrophthalic anhydride* 2E4MZ-A: Imidazole-based (1-cyanoethyl-2-ethyl-4-methyl imidazole) Experimental Embodiment 1: Evaluation of Physical Properties The physical properties of the underfill film prepared in Embodiment 1 were measured as follows, and the measurement results are shown in Table 1 above. 1) Onset Temperature An onset temperature of the adhesive layer of the underfill film was measured using a differential scanning calorimetry (DSC). 2) Melt Viscosity A viscosity of the adhesive layer of the underfill film was measured using a rheometer while increasing the temperature from 50° C. to 300° C. at a rate of 10° C. per minute. Experimental Embodiment 2: Evaluation of Packaging After semiconductor packaging was performed according to the chip placement method using the underfill film prepared in Embodiment 1, the packaged bonding cross-section was evaluated. FIG.7is photograph illustrating an adhesive layer, viewed from the above, after the bumps of the semiconductor chip and the bonding pads of the package substrate are pre-bonded and put into a pressure chamber oven (PCO). It may be appreciated that an area of voids in the adhesive layer after PCO was significantly reduced. FIG.8is a cross-sectional photograph after the adhesive layer of the underfill film is cured after the reflow process. As a result of the experiment, it may be appreciated that in the underfill film of the present invention, the bumps of the semiconductor chip and the bonding pads of the package substrate were stably bonded not only after curing, but also in a state of being pre-bonded (seeFIG.8below). As set forth hereinabove, according to one or more embodiments of the present invention, by providing an adhesive layer having a melt viscosity and an onset temperature adjusted to a predetermined range, a chip placement method may be applied such that the semiconductor chip transfer and bonding process may be simplified and automated, thereby achieving mass productivity. In addition, the connection reliability of the package may be improved. Accordingly, the underfill film of the present invention may be usefully applied to a semiconductor device and a manufacturing process thereof in the art. The effect according to the present invention is not limited by the contents exemplified above, and more various effects are included in the present specification. | 47,657 |
11942337 | DETAILED DESCRIPTION Hereinafter, an embodiment of the inventive concept will be described in more detail with reference to the accompanying drawings. The embodiments of the inventive concept may be modified in various forms, and the scope of the inventive concept should not be construed to be limited by the embodiments of the inventive concept described in the following. The embodiments of the inventive concept are provided to describe the inventive concept for those skilled in the art more completely. Accordingly, the shapes and the like of the components in the drawings are exaggerated to emphasize clearer descriptions. FIG.1is a view schematically illustrating an apparatus (hereinafter, a substrate treatment apparatus) for treating a substrate, according to an embodiment of the inventive concept. Referring toFIG.1, a substrate treatment system includes an index module10, a treating module20, and a controller (not illustrated). According to an embodiment, the index module10and the treating module20are disposed in one direction. Hereinafter, a direction in which the index module10and the treating module20are arranged will be referred to as a first direction92, a direction that is perpendicular to the first direction92when viewed from above will be referred to as a second direction94, and a direction perpendicular to all the first direction92and the second direction94will be referred to as a third direction96. The index module10carries a substrate ‘W’ to the treating module20from a container80having the substrate ‘W’ received therein, and a substrate ‘W’ completely treated in the treating module20is received into the container80. The longitudinal direction of the index module10is provided in the second direction94. The index module10has a loadport12and an index frame14. The loadport12is positioned at an opposite side of the treating module20, based on the index frame14. The container80having substrates ‘W’ is placed in the loadport12. A plurality of loadports12may be provided and may be arranged in the second direction94. The container80may include a container for sealing such as a front open unified pod (FOUP). The container80may be placed on the loadport12by a transfer unit (not illustrated) such as Overhead Transfer, Overhead Conveyor, or Automatic Guided Vehicle or a worker. An index robot120is provided inside the index frame14. A guide rail140, which has a longitudinal direction provided in the second direction94, may be provided in the index frame14, and the index robot120may be provided to be movable on the guide rail140. The index robot120may include a hand122in which the substrate ‘W’ is positioned, and the hand122may be provided to be movable forward and backward, rotatable about the third direction96, and movable in the third direction96. A plurality of hands122are spaced apart from each other in a vertical direction, and are individually movable forward and rearward. The treating module20includes a buffer unit200, a carrying device300, a liquid treating device400, and a supercritical device500. The buffer unit200provides a space in which a substrate ‘W’ is temporarily stored when introduced into the treating module20or when withdrawn from the treating module20. The liquid treating device400performs a liquid treatment process of performing liquid treatment for the substrate ‘W’ by supplying a liquid onto the substrate ‘W’. The supercritical device500performs a drying process to remove a liquid remaining on the substrate ‘W’. The carrying device300carries the substrate ‘W’ between any two of the buffer unit200, the liquid treating device400, and the supercritical device500. The carrying device300is disposed such that the longitudinal direction thereof is provided in the first direction92. The buffer unit200may be interposed between the index module10and the carrying device300. The liquid treating device400and the supercritical device500may be disposed at a side portion of the carrying device300. The liquid treating device400and the carrying device300may be disposed in the second direction94. The supercritical device500and the carrying device300may be disposed in the second direction94. The buffer unit200may be positioned at one end of the carrying device300. According to an embodiment, liquid treating devices400may be disposed at opposite sides of the carrying device300, and supercritical devices500may be disposed at opposite sides of the carrying device300. The liquid treating devices400may be disposed at a position closer to the buffer unit200rather than the supercritical devices500. The liquid treating devices400at one side of the carrying device300may be arranged in the form of a matrix of A×B (‘A’ and ‘B’ are ‘1s’ or natural numbers greater than ‘1’) in the first direction92and the third direction96. The supercritical devices500at one side of the carrying device300may be arranged in the form of a matrix of C×D (‘C’ and ‘D’ are ‘1s’ or natural numbers greater than ‘1’) in the first direction92and the third direction96. Alternatively, only the liquid treating devices400may be provided at one side of the carrying device300, and only the supercritical devices500may be provided at an opposite side of the carrying device300. The carrying device300has a carrying robot320. A guide rail340, which has a longitudinal direction provided in the second direction92, may be provided in the carrying device300, and the carrying robot320may be provided to be movable on the guide rail340. The carrying robot320may include a hand322in which the substrate ‘W’ is positioned, and the hand322may be provided to be movable forward and backward, rotatable about the third direction96, and movable in the third direction96. A plurality of hands322are spaced apart from each other in a vertical direction, and are individually movable forward and rearward. The buffer unit200includes a plurality of buffers220to place the substrate ‘W’. The buffers220may be disposed to be spaced apart from each other in the third direction96. The buffer unit200is open in a front face and a rear face. The front surface faces the index module10, and the rear surface faces the carrying device300. The index robot120may access the buffer unit200through the front face, and the carrying robot320may access the buffer unit200through the rear surface. FIG.2is a view schematically illustrating the liquid treating device400ofFIG.1. Referring toFIG.2, the liquid treating device400includes a housing410, a cup420, a support unit440, a liquid supply unit460, an elevating unit480, and a controller40. The controller40controls the operations of the liquid supply unit460, the support unit440, and the elevating unit480. The housing410substantially has a rectangular parallelepiped shape. The cup420, the support unit440, and the liquid supply unit460are provided in the housing410. The cup420has a treatment space having an open upper portion, and the substrate ‘W’ is liquid-treated in the treatment space. The support unit440supports the substrate ‘W’ in the treatment space. The liquid supply unit460supplies a liquid to the substrate ‘W’ supported by the support unit440. Multiple types of liquids may be provided, and sequentially supplied onto the substrate ‘W’. The elevating unit480may adjust the relative height between the cup420and the support unit440. According to an embodiment, the cup420has a plurality of recovery tubs422,424, and426. Each of the recovery tubs422,424, and426has a recovery space to recover a liquid used to treat the substrate. Each of the recovery tubs422,424, and426is provided in the shape of a ring to surround the support unit440. When the liquid treatment process is performed, a liquid, which is previously treated and scattered by the rotation of the substrate ‘W’, is introduced into the recovery space through inlets422a,424a, and426aof recovery tubs422,424, and426. According to an embodiment, the cup420has a first recovery tub422, a second recovery tub424, and a third recovery tub426. The first recovery tub422is provided to surround the support unit440, the second recovery tub424is provided to surround the first recovery tub422, and the third recovery tub426is provided to surround the second recovery tub424. The second inlet424a, which is to introduce a liquid into the second recovery tub424, may be positioned above the first inlet422ato introduce the liquid to the first recovery tub422, and the third inlet426a, which is to introduce the liquid into the third recovery tub426, may be positioned above the second inlet424a. The support unit440has a support plate442and a driving shaft444. A top surface of the support plate442may be provided in a substantially disk shape, and may have a diameter greater than that of the substrate ‘W’. The support plate442is provided at the central portion thereof with a support pin442ato support a rear surface of the substrate ‘W’, and the support pin442ahas an upper end protruding from the support plate442such that the substrate ‘W’ is spaced apart from the support plate442by a specific distance. The support plate442has a chuck pin442bprovided at the edge thereof. The chuck pin442bis provided to protrude upward from the support plate442to support the side portion of the substrate ‘W’, thereby preventing the substrate ‘W’ from being separated from the substrate ‘W’ when the substrate ‘W’ is rotated. The driving shaft444is driven by a driver446and connected to the central portion of a bottom surface of the substrate ‘W’ to rotate the support plate442about the central axis thereof. According to an embodiment, the liquid supply unit460has a first nozzle462, a second nozzle464, and a third nozzle466. The first nozzle462supplies a first liquid onto the substrate ‘W’. The first liquid may be a liquid that removes a film or foreign matters remaining on the substrate ‘W’. The second nozzle464supplies a second liquid onto the substrate ‘W’. The second liquid may be excellently dissolved in a third liquid. For example, the second liquid may be more excellently dissolved in the third liquid than the first liquid. The second liquid may neutralize the first liquid supplied on the substrate ‘W’. In addition, the second liquid may neutralize the first liquid and may be more excellently dissolved in the third liquid rather than the first liquid. According to an embodiment, the second liquid may be water. The third nozzle466supplies the third liquid onto the substrate ‘W’. The third liquid may be excellently dissolved in a supercritical fluid used in the supercritical device500. For example, the third liquid may be excellently dissolved in the supercritical fluid used in the supercritical device500when compared to the second liquid. According to an embodiment, the third liquid may be an organic solvent. The organic solvent may be isopropyl alcohol (IPA). According to an embodiment, the supercritical fluid may be carbon dioxide. The first nozzle462, the second nozzle464, and the third nozzle466are supported on arms461different from each other, and the arms461may be moved independently. Alternatively, the first nozzle462, the second nozzle464, and the third nozzle466may be mounted on the same arm and moved simultaneously. The elevating unit480moves the cup420in the vertical direction. The relative height between the cup420and the substrate ‘W’ is changed through the vertical movement of the cup420. Accordingly, since the recovery tubs422,424, and426to recover the liquid, which is previously treated, are changed depending on the type of a liquid supplied to the substrate ‘W’, liquids may be separated and recovered. As described above, the cup420may be fixedly installed, and the elevating unit480may move the support unit440in the vertical direction. FIG.3is a view schematically illustrating the supercritical device500ofFIG.1, according to an embodiment. According to an embodiment, the supercritical device500removes a liquid from the substrate ‘W’ using the supercritical fluid. According to an embodiment, the liquid on the substrate ‘W’ is IPA. The supercritical device500supplies the supercritical fluid onto the substrate ‘W’, dissolves the IPA, which is on the substrate ‘W’, in the supercritical fluid, and removes the IPA from the substrate ‘W’. According to an embodiment, the supercritical fluid is CO2present in a supercritical state. The supercritical device500includes a process chamber520, a first fluid supply unit560, a second fluid supply unit570, a support device (not illustrated), and an exhaust unit550. The process chamber520provides a treatment space502to perform a cleaning process. The process chamber520has an upper housing522and a lower housing524, and the upper housing522and the lower housing524are combined with each other to provide the above-described treatment space502. The upper housing522is positioned on the lower housing524. The position of the upper housing522is fixed and the lower housing524may be moved up and down by a driving member590such as a cylinder. When the lower housing524is spaced apart from the upper housing522, the treatment space502is open. In this case, the substrate ‘W’ is introduced or withdrawn. When the process is performed, the lower housing524makes close contact with the upper housing522to seal the treatment space502from the outside. A heater (not illustrated) is provided inside the wall of the process chamber520. The heater (not illustrated) heats the treatment space502of the process chamber520such that the fluid supplied into the inner space of the process chamber520is maintained in the supercritical state. The inner part of the treatment space502has an atmosphere formed by the supercritical fluid. A support device (not illustrated) supports the substrate ‘W’ in the treatment space502of the process chamber520. The substrate ‘W’ introduced into the treatment space502of the process chamber520is placed on the support device (not illustrated). According to an embodiment, the substrate ‘W’ is supported by a support device (not illustrated) such that the pattern surface of the substrate ‘W’ faces upward. The first fluid supply unit560supplies a supercritical fluid having an organic solvent dissolved therein to the treatment space502. The second fluid supply unit570supplies a supercritical fluid having no organic solvent dissolved therein to the treatment space502. AlthoughFIG.4illustrates that the first fluid supply unit560and the second fluid supply unit570are coupled to the upper housing522, both the first fluid supply unit560and the second fluid supply unit570may be coupled to the lower housing524or any one of the first fluid supply unit560and the second fluid supply unit570may be coupled to the upper housing522, and a remaining one may be coupled to the lower housing524. An exhaust unit550is coupled to the lower housing524. The supercritical fluid in the treatment space502of the process chamber520is exhausted to the outside of the process chamber520through the exhaust unit550. The first fluid supply unit560supplies the supercritical fluid having an organic solvent dissolved therein to the treatment space502. The second fluid supply unit570supplies the supercritical fluid having no organic solvent dissolved therein to the treatment space502. AlthoughFIG.4illustrates that the first fluid supply unit560and the second fluid supply unit570are coupled to the upper housing522, both the first fluid supply unit560and the second fluid supply unit570may be coupled to the lower housing524or any one of the first fluid supply unit560and the second fluid supply unit570may be coupled to the upper housing522, and a remaining one may be coupled to the lower housing524. The first fluid supply unit560includes a first supercritical fluid supply line540, a solvent supply line530, a mixing tank564, a first supply line561, and a first supply valve562. A first pump549, a first front valve548, a first reservoir546, a first heater544, and a first rear valve542are installed on the first supercritical fluid supply line540. The first reservoir546is connected to a supercritical fluid supply source (not illustrated) that supplies CO2, and receives CO2from the supercritical fluid supply source. The first pump549is installed at the front end of the first reservoir546to transmit CO2to the first reservoir546. The first front valve548adjusts the flow rate of CO2transmitted from the first pump549to the first reservoir546. The first heater544heats CO2to be in a supercritical state. The first rear valve542adjusts the flow rate of CO2supplied to the mixing tank564. A second pump535, a second front valve536, a second reservoir534, and a second rear valve532are installed on the solvent supply line530. The second reservoir534is connected to an IPA supply source (not illustrated) that supplies IPA, and receives IPA from the IPA supply source. The second pump535is installed at the front end of the second reservoir534to transmit the IPA to the second reservoir534. The second front valve536adjusts the flow rate of the IPA transmitted from the second pump535to the second reservoir534. The second rear valve532adjusts the flow rate of the IPA supplied to the mixing tank564. The CO2supplied from the first supercritical fluid supply line540and the IPA supplied from the solvent supply line530are mixed in the mixing tank564. The CO2and the IPA are mixed in the mixing tank564to react with each other while the IPA is being dissolved in the CO2. The internal temperature and the internal pressure of the mixing tank564are set such that the CO2is maintained in the supercritical state. A member, such as a vibration applying device or a heater, may be installed to reduce the time to dissolve the IPA in the CO2inside the mixing tank564. The first supply line561is to supply CO2having IPA dissolved therein from the mixing tank564to the treatment space502. The first supply valve562is installed on the first supply line561to adjust the flow rate of CO2having the IPA dissolved therein, which is transmitted to the process chamber520. The second fluid supply unit570has a second supercritical fluid supply line571, a third pump579, a third front valve578, a reservoir576, a second heater574, and a third rear valve572installed on the second supercritical fluid supply line571. The reservoir576is connected to a supercritical fluid supply source (not illustrated) that supplies CO2, and receives CO2from the supercritical fluid supply source. The third pump579is installed at the front end of the reservoir576to transmit CO2to the reservoir576. The third front valve578adjusts the flow rate of CO2transmitted from the third pump579to the reservoir576. The second heater574heats CO2to be in a supercritical state. The third rear valve572adjusts the flow rate of CO2supplied to the treatment space502. Each of the mixing tank564and the reservoir576may store CO2in the supercritical state. The CO2stored in the mixing tank564may differ from the CO2stored in the reservoir576in terms of temperature, pressure, or density thereof. For example, the first pump549and the third pump579may be provided such that the pressure of the CO2transmitted to the first reservoir546differs from the pressure of the CO2transmitted to the reservoir576. For example, the first pump549and the third pump579may be provided such that the power of the first heater544differs from the power of the second heater574. The exhaust unit550is coupled to the lower housing524. The supercritical fluid in the treatment space502of the process chamber520is exhausted to the outside of the process chamber520through the exhaust unit550. FIG.5is a flowchart illustrating a method for treating a substrate, according to an embodiment of the inventive concept. To perform the method for treating the substrate of the inventive concept, the controller controls the first fluid supply unit560, the second fluid supply unit570, and the exhaust unit550. Referring toFIG.5, the method for treating the substrate may include a pressurizing step (S100), a treating step (S200), a pressure reducing step (S300), and an opening step (S400). When the substrate ‘W’ is introduced into the treatment space502, the pressurizing step (S100) is performed. In the pressurizing step (S100), the supercritical fluid is supplied into the treatment space502to pressurize the treatment space502. The pressurizing is performed until the inner part of the treatment space502has critical pressure or more to make CO2in the supercritical state. In the treating step (S200), the supercritical fluid is supplied into the treatment space502to treat the substrate ‘W’. The treating step (S200) includes a supplying procedure and an exhausting procedure. The exhausting procedure and the supplying procedure are sequentially performed while being repeated multiple times. The CO2is supplied into the treatment space502in the supplying procedure and the treatment space502is exhausted in the exhausting procedure. In the pressure reducing step (S300), the treatment space502is exhausted after the treatment of the substrate ‘W’ is completed. According to an embodiment, the pressure reducing is performed until the pressure of the treatment space502is equal to or similar to normal pressure. When the pressure reducing step (S300) is completed, the opening step (S400) to open the process chamber520is performed. When the process chamber520is open, the substrate ‘W’ is withdrawn out of the treatment space502. FIG.6is a view illustrating that the first fluid supply unit560ofFIG.4supplies CO2having IPA dissolved therein to the process chamber520in a pressurizing step (S100). Referring toFIG.6, in the pressurizing step (S100), the IPA dissolved in CO2is supplied to the treatment space502. For example, the mixing ratio of CO2supplied to the treatment space502and having the IPA, which is dissolved therein, is adjusted such that the content of IPA is 1 wt % or less in the treatment space502. In one embodiment, the IPA may be provided to be 0.5 wt % in processing space502. Valves other than the first supply valve562are closed in the pressurizing step S100. FIG.7is a view illustrating that the second fluid supply unit ofFIG.4supplies a supercritical fluid having no organic solvent dissolved therein to the process chamber520in the treating step. Referring toFIG.7, only a supercritical fluid is supplied to the treatment space502without an organic solvent in the supplying procedure of the treating step S200. The exhausting procedure of the treating step (S200) is illustrated inFIG.8. For example, on the assumption that the pressure of the treatment space502is P1in the supplying procedure of the treating step (S200), and the pressure of the treatment space502is P2in the pressurizing step (S100), P1may be equal to or smaller than P2. For example, P2may be equal or different in the repeated supplying procedure. The CO2having no IPA dissolved therein is supplied to the treatment space502in the treating step (S200), and the dissolution of the IPA in the CO2is promoted by applying physical force to the CO2supplied in the pressurizing step (S100). FIG.8is a view illustrating that an exhaust unit ofFIG.4exhausts the process chamber520in an exhausting step. Referring toFIG.8, the exhaust valve552installed on the exhaust unit550is open, and the valves provided in the first fluid supply unit560and the second fluid supply unit570are closed to exhaust the treatment space. According to an embodiment, CO2having organic solvent dissolved therein is supplied to the treatment space502in the pressurizing step (S100), thereby preventing the organic solvent from being dried in the treatment space502before dissolving the organic solvent in the CO2. Accordingly, the leaning phenomenon may be prevented and an amount of an organic solvent used may be reduced in a procedure of wetting the substrate using the organic solvent. In addition, according to the inventive concept, as CO2having organic solvent dissolved therein is supplied to the treatment space502in the pressurizing step (S100), the reaction rate between the organic solvent and the CO2is increased, so time necessary to dissolve the organic solvent in CO2may be reduced. In addition, according to the inventive concept, as CO2having the organic solvent dissolved therein is supplied to the treatment space502in the pressurization step (S100), the reaction between the organic solvent and the CO2is smoothly performed, thereby minimizing the organic solvent remaining on the substrate. In addition, according to the inventive concept, CO2having organic solvent dissolved therein is supplied to the treatment space502in the pressurization step (S100), and CO2having no organic solvent dissolved therein is supplied to the treatment space502in the treating step (S200). Accordingly, the number of times of repeating the supplying procedure and the exhausting procedure in the treating step (S200) may be reduced, thereby reducing the process time. According to an embodiment of the inventive concept, there may be provided an apparatus and a method for treating a substrate, capable of improving the treatment efficiency for the substrate when drying the substrate using the supercritical fluid. According to an embodiment of the inventive concept, the organic solvent, which is not dissolved in the supercritical fluid may be prevented from being dried, when drying the substrate using the supercritical fluid. According to an embodiment of the inventive concept, the process time may be reduced when the substrate is dried using the supercritical fluid. The effects produced in the inventive concept are not limited to the aforementioned effects, and any other effects not mentioned herein will be clearly understood from the detailed description and accompanying drawings by those skilled in the art to which the inventive concept pertains. The above description has been made for the illustrative purpose. Furthermore, the above-mentioned contents describe the exemplary embodiment of the inventive concept, and the inventive concept may be used in various other combinations, changes, and environments. That is, the inventive concept can be modified and corrected without departing from the scope of the inventive concept that is disclosed in the specification, the equivalent scope to the written disclosures, and/or the technical or knowledge range of those skilled in the art. The written embodiment describes the best state for implementing the technical spirit of the inventive concept, and various changes required in the detailed application fields and purposes of the inventive concept can be made. Accordingly, the detailed description of the inventive concept is not intended to limit the inventive concept to the disclosed embodiments Furthermore, it should be construed that the attached claims include other embodiments. While the inventive concept has been described with reference to exemplary embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the inventive concept. Therefore, it should be understood that the above embodiments are not limiting, but illustrative. | 27,239 |
11942338 | DETAILED DESCRIPTION The invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout. It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. The same reference numbers indicate the same components throughout the specification. In the attached figures, the thickness of layers and regions is exaggerated for clarity. Although the terms “first”, “second”, etc. may be used herein to describe various elements, these elements, should not be limited by these terms. These terms may be used to distinguish one element from another element. Thus, a first element discussed below may be termed a second element without departing from teachings of one or more embodiments. The description of an element as a “first” element may not require or imply the presence of a second element or other elements. The terms “first”, “second”, etc. may also be used herein to differentiate different categories or sets of elements. For conciseness, the terms “first”, “second”, etc. may represent “first-category (or first-set)”, “second-category (or second-set)”, etc., respectively. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, “a”, “an,” “the,” and “at least one” do not denote a limitation of quantity, and are intended to include both the singular and plural, unless the context clearly indicates otherwise. For example, “an element” has the same meaning as “at least one element,” unless the context clearly indicates otherwise. “At least one” is not to be construed as limiting “a” or “an.” “Or” means “and/or.” As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof. Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The term “lower,” can therefore, encompasses both an orientation of “lower” and “upper,” depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The terms “below” or “beneath” can, therefore, encompass both an orientation of above and below. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. Embodiments are described herein with reference to cross section illustrations that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present claims. Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. FIG.1is a view schematically illustrating a manufacturing apparatus according to an embodiment.FIG.2is a view schematically illustrating heat flows inside a chamber.FIG.3is a view illustrating a scene in which a target substrate is arranged in a thermal equilibrium zone of a chamber according to an embodiment. FIG.2shows a chamber110and a heating member120according to an embodiment. Heat flows in an embodiment are shown inFIG.2, but the disclosure is not limited thereto.FIG.3shows an embodiment in which a target substrate S moves to a thermal equilibrium zone HEA by a height adjustment member130. Referring toFIGS.1to3, an embodiment of a manufacturing apparatus10of a display device may include a chamber110, a heating member120, a height adjustment member130, a comparison operation unit140, and a driving unit150. The chamber110defines an empty inner space in which heaters121and122and the height adjustment member130and the like may be disposed. In one embodiment, for example, the chamber110may provide a space for performing a bake process, but the disclosure is not limited thereto. In an embodiment, as shown inFIG.1the chamber110may have a rectangular parallelepiped shape, but the disclosure is not limited thereto. Alternatively, the chamber110may have any of various shapes. A heat treatment atmosphere may be provided inside the chamber110. In an embodiment, the first and second heaters121and122may be arranged inside the chamber110to provide the heat treatment atmosphere. The heating member120may provide heat used for performing the bake process. The heating member120may apply the heat to the target substrate S. The heating member120may include the first and second heaters121and122. The first and second heaters121and122may face or be disposed opposite to each other, and the target substrate S may be arranged between the first and second heaters121and122. The first and second heaters121and122may be parallel to each other. The first and second heaters121and122may be arranged respectively at lower and upper parts of the chamber110to face each other. The first heater121, as a main heater, may form the thermal atmosphere inside the chamber110. The second heater122, as an auxiliary heater, may be arranged to be distanced from the first heater121and provide further heat to the space distanced from the first heater121. The second heater122may serve to uniformly form the thermal atmosphere inside the chamber110. That is, the second heater122arranged in addition to the first heater121inside the chamber110may improve the temperature uniformity inside the chamber110. The first and second heaters121and122may include respective heating wires HL1and HL2and a power supply unit (not shown). In an embodiment, the first heater121may include a first heating wire HL1located therein, and the second heater122may include a second heating wire HL2located therein. The first and second heating wires HL1and HL2may be supplied with power from the power supply unit (not shown) and heat the first and second heaters121and122. The first and second heaters121and122heated by the heating wires HL1and HL2may form a thermal atmosphere inside the chamber110. A thermal equilibrium zone HEA in which heat is equilibrated may be formed between the first and second heaters121and122. The thermal equilibrium zone HEA may be thermally uniform therein. That is, the first and second heaters121and122may emit heat, and the heat may be transferred to each area inside the chamber110by convection and/or radiation. Although the first and second heaters121and122emit heat to form a heat treatment atmosphere inside the chamber110and the heat is transferred by convection and/or radiation, a thermal equilibrium state is achieved in a partial area (thermal equilibrium zone HEA) in which the temperature is uniform and may remain uniform over the whole area. The location of the thermal equilibrium zone HEA may vary based on the temperatures of the first and second heaters121and122. As the heat emitted by the first and second heaters121and122is transferred by convection and/or radiation, the heat emitted by first heater121and the heat emitted by the second heater122may establish equilibrium with each other in the thermal equilibrium zone HEA, which may remain in a thermally uniform state over the whole area thereof. In such an embodiment, the heats emitted from the first and second heaters121and122are uniform and/or the temperatures of the first and second heaters121and122are uniform, such that the thermal equilibrium zone HEA may remain at a uniform temperature over the whole area thereof and maintain a same temperature over the whole area thereof. In such an embodiment, when the target substrate S is arranged in the thermal equilibrium zone HEA by means of the height adjustment member130to be described later, the bake process may be performed such that a same temperature is applied over the whole area of the target substrate S. Accordingly, in such an embodiment, the pixels located at different positions may be uniformly heat-treated to avoid or prevent defects, such as luminance differences and stains on the display device, caused by the pixels being located at different positions and thus fabricated with different temperatures. The first and second heaters121and122may fully cover the target substrate S. A width W1of the first heater121may be greater than a width WS of the target substrate S, and a width W2of the second heater122may be greater than the width WS of the target substrate S. The side surfaces of the first heater121may protrude outward beyond the side surfaces of the target substrate S, and the side surfaces of the second heater122may protrude outward beyond the side surfaces of the target substrate S. The planar area of the first heater121may be larger than the planar area of the target substrate S, and the planar area of the second heater122may be greater than the planar area of the target substrate S. The entire region of the target substrate S may overlap the first heater121in the thickness direction, and may overlap the second heater122in the thickness direction. In such an embodiment, the edge of the first heater121may surround the edge of the target substrate S in a plan view, and the edge of the second heater122may surround the edge of the target substrate S in a plan view. The width W1of the first heater121and the width W2of the second heater122may be substantially equal to each other, and the side surfaces of the first heater121may be aligned with the side surfaces of the second heater122, but the disclosure is not limited thereto. In an embodiment where the width W1of the first heater121and the width W2of the second heater122are equal to each other, the thermal atmosphere inside the chamber110may be effectively uniformly provided. In an embodiment where the width W1of the first heater121and the width W2of the second heater122are each greater than the width WS of the target substrate S, and the side surfaces of the first heater121and the side surfaces of the second heater122protrude outward beyond the side surfaces of the target substrate S, the heat treatment may be further uniformly performed over the whole area of the target substrate S. In such an embodiment, the inside (overlap area in the thickness direction) and the outside (non-overlap area in the thickness direction) of the first and second heaters121and122may differ in thermal atmosphere such that convection and/or radiation may actively occur along the boundary between the inside and the outside, which means that the thermal atmosphere is not uniform around the edge of the inside. In an embodiment, the side surface of the first heater121and the edge of the second heater122may be protruded outward beyond the edge of the target substrate S such that the boundaries between the inside and outside of the first and second heaters121and122are separated by a predetermined distance from the target substrate S. In such an embodiment, the edge and center areas of the target substrate S are effectively prevented from being in different heat treatment atmospheres such that the bake process may be allowed to be performed at a same or constant temperature over the whole area of the substrate S. In an embodiment, the manufacturing apparatus10of a display device may further include a location measurement unit TS for measuring a location of the thermal equilibrium zone HEA. The location measurement unit TS may be arranged on the target substrate S. In one embodiment, for example, the location measurement unit TS may be arranged on the top surface and/or the bottom surface of the target substrate S, but not being limited thereto. The location measurement unit TS may also be arranged on one of the top, bottom and side surfaces of the target substrate S or on the height adjustment member130, although not limited thereto. The location measurement unit TS may include a temperature sensor for measuring the temperature inside the chamber. The temperature sensor may measure the temperature inside the chamber110, a change of the temperature, and a location of the thermal equilibrium zone HEA according to the location of the location measurement unit TS. In an alternative embodiment, the location of the thermal equilibrium zone HEA may be measured based on the temperatures of the first and second heaters121and122to acquire data on the measurement and/or a function between the temperatures of the first and second heaters121and122and the thermal equilibrium zone HEA. In such an embodiment, the location measurement unit TS may be connected to the first and second heater121and122to measure the location of the thermal equilibrium zone HEA based on the data and/or function pre-stored according to the temperatures of the first and second heaters121and122. The height adjustment member130may support the target substrate S. The height adjustment member130may be at least partially arranged between the first and second heaters121and122. The target substrate S may be arranged on one end (e.g., a top end) of the height adjustment member130. The one end of the height adjustment member130may be arranged between the first and second heaters121and122. The height adjustment member130may support the target substrate S, e.g., the edge of the target substrate S, such that the target substrate S is disposed along the horizontal direction. The height adjustment member130may move up and down in the thickness direction of the first heater121and/or the second heater122. Accordingly, the target substrate S placed on the height adjustment member130may be moved upward and downward in the thickness direction of the first heater121and/or the second heater122to adjust the height of the target substrate S. In such an embodiment, the height adjustment member130may adjust the gap between the first heater121and the target substrate S. By adjusting the height of the target substrate S with the height adjustment member130, the target substrate S, even when the size of the target substrate S increases, may be distanced from the first heater121and/or the second heater122to be exposed to the uniform thermal atmosphere. Heat quantity K may be proportional to a multiplication of heat capacity C and temperature change amount T as shown in Equation 1 (“Eq. 1”) below, and the heat capacity C may be proportional to a multiplication of specific heat S and mass G as shown in Equation 2 (“Eq. 2”) below. K=C×TEq. 1 C=S×GEq. 2 That is, the first and second heaters121and122may increase in size (area) as the target substrate S becomes bigger in size (larger in area). Because the heat quantity K for heating the first and second heaters121and122is proportional to the mass G, as the target substrate S becomes bigger in size (larger in area), it is desired for the first and second heaters121and122to increase in size and decrease in thickness and for the heat quantity K to increase. However, there are limits to decreasing the thickness of the first and second heaters121and122and increasing the heat quantity K. Accordingly, when arranging the target substrate S on the first heater121or the second heater122to heat the target substrate S, it may be difficult for the temperature of the first heater121and/or the temperature of the second heater122to reach a desired temperature of the bake process for the target substrate S, and the temperature may vary among areas. In an embodiment of the invention, the manufacturing apparatus10of a display device includes the second heater122as well as the first heater121, and the target substrate S is distanced from the first and second heaters121and122by using the height adjustment member130such that the bake process may be performed with a uniform thermal atmosphere over the whole area of the target substrate S. However, the disclosure is not limited thereto, and alternatively, the target substrate S may selectively contact the first heater121during the heating process. The height adjustment member130may support the target substrate S such that the target substrate S is arranged in parallel with the first heater121and/or the second heater122. The target substrate S placed on the height adjustment member130may be distanced from the first heater121and the second heater122. Accordingly, the target substrate S may differ in temperature from the first heater121and/or the second heater122. Although not shown, the height adjustment member130may be arranged on the bottom surface of the chamber110through the first heater121. However, the disclosure is not limited thereto, and alternatively, the height adjustment member130may be arranged on the first heater121or one side surface of the chamber110. The comparison operation unit140may compare the location of the target substrate S with the location of the thermal equilibrium zone HEA. In an embodiment, the comparison operation unit140may compare the location of the target substrate S with the location of the thermal equilibrium zone HEA acquired by the location measurement unit TS and send a comparison result to the driving unit150. The driving unit150may drive the height adjustment member130to move up and down in the thickness direction of the first heater121and/or the second heater122. In an embodiment, the driving unit150may drive the height adjustment member130to adjust the height of one end (e.g., a top end) of the height adjustment member130. Accordingly, the height of the target substrate S placed on the one end (e.g., the top end) of the height adjustment member130may be adjusted. The driving unit150may adjust one end of the height adjustment member130to be placed at a different height. The term “height” as used herein denotes a distance between the one end of the height adjustment member130and the top surface (or bottom surface opposed to the top surface) of the first heater131. That is, the driving unit150may adjust the distance between the one end of the height adjustment member130and the top or bottom surface of the first heater121. The driving unit150may also adjust the distance between the one end of the height adjustment member and the top or bottom surface of the second heater122. However, the disclosure is not limited thereto, and the driving unit150may, for example, locate the one end of the height adjustment member130at one of a first height and a second height. The distance between the one end of the height adjustment member130at the first height and the top surface of the first heater121may differ from the distance between the one end of the height adjustment member130at the second height and the top surface of the first heater121. In such an embodiment, the distance between the one end of the height adjustment member130at the first height and the bottom surface of the second heater122may differ from the distance between the one end of the height adjustment member130at the second height and the bottom surface of the second heater122. In an embodiment, the distance between the one end of the height adjustment member130at the first height and the top surface of the first heater121may be less than the distance between the one end of the height adjustment member130and the bottom surface of the second heater122, and the distance between the one end of the height adjustment member130at the second height and the top surface of the first heater121may be greater than the distance between the one end of the height adjustment member130and the bottom surface of the second heater122. The driving unit150may drive the height adjustment member130based on the comparison result received from the comparison operation unit140such that the target substrate S is arranged in the thermal equilibrium zone HEA. Accordingly, in such an embodiment, the target substrate S may move into the thermal equilibrium zone HEA. In an embodiment, the driving unit150may be arranged outside the chamber110, but the disclosure is not limited thereto. Alternatively, the driving unit150may be arranged inside the chamber110. The driving unit150may adjust the height of the height adjustment member130to locate the target substrate S at one of a plurality of different heights and fix the target substrate S at the location for performing the bake process. The temperature increase and decrease rate of the target substrate S may vary according to the location of the target substrate S, which may cause the characteristic of the target substrate S, after the bake process, to vary. That is, it may be possible to adjust the location (or height) of the target substrate S by the height adjustment member130, thereby adjusting the characteristic of the target substrate S. Such features will hereinafter be described in greater with reference toFIGS.4and5. FIG.4is a view illustrating a thermal equilibrium location varying according to a temperature inside a chamber according to an embodiment.FIG.5is a graph of a temperature increase rate of a target substrate varying according to a distance between a first heater and a target substrate according to an embodiment. In an embodiment, referring toFIG.4, a plurality of thermal equilibrium zones HEA1, HEA2, and HEA3may be formed at different areas between the first and second heaters121and122inside the chamber110. The thermal equilibrium zones HEA1, HEA2, and HEA3may differ in internal temperature. However, the disclosure is not limited thereto, and the thermal equilibrium zones HEA1, HEA2, and HEA3may have the internal temperature, which increases as the distance g1, g2, g3from the first heater121decreases. That is, the distance g2between the second thermal equilibrium zone HEA2and the first heater121may be greater than the distance g1between the first thermal equilibrium zone HEA1and the first heater121, and the distance g3between the third thermal equilibrium zone HEA3and the first heater121may be greater than the distance g2between the second thermal equilibrium zone HEA2and the first heater121. In such an embodiment, the temperature of the second thermal equilibrium zone HEA2may be lower than the temperature of the first thermal equilibrium zone HEA1, and the temperature of the third thermal equilibrium zone HEA3may be lower than the temperature of the second thermal equilibrium zone HEA2. Although the first to third thermal equilibrium zones HEA1, HEA2, and HEA3are shown together inFIG.4for convenience of illustration, the first to third thermal equilibrium zones HEA1, HEA2, and HEA3may each be formed according to the temperature of the first heater121and/or the temperature of the second heater122. That is, the locations of the first to third thermal equilibrium zones HEA1, HEA2, and HEA3may be adjusted by adjusting the temperature of the first heater121and/or the temperature of the second heater122. However, the disclosure is not limited thereto, and the plurality of thermal equilibrium zones HEA1, HEA2, and HEA3may be formed even though the temperatures of the first and second heaters121and122are uniformly maintained. Although three thermal equilibrium zones HEA1, HEA2, and HEA3are shown in the drawing, the number of the thermal equilibrium zones HEA1, HEA2, and HEA3is not limited thereto. As the thermal equilibrium zone HEA1, HEA2, HEA3becomes closer to the first heater121, the temperature increase rate of the target substrate S arranged in each thermal equilibrium zone HEA1, HEA2, HEA3may vary. Referring further toFIG.5, lines on the graph ofFIG.5represent temperatures of the target substrate S that vary over time. Line (a) of the graph shows the case where the target substrate S is arranged in the first thermal equilibrium zone HEA1ofFIG.4, line (b) of the graph shows the case where the target substrate S is arranged in the second thermal equilibrium zone HEA2ofFIG.4, and line (c) of the graph shows the case where the target substrate S is arranged in the third thermal equilibrium zone HEA3ofFIG.4. As the thermal equilibrium zone HEA1, HEA2, HEA3is closer to the first heater121, the temperature increase rate of the target substrate S arranged in the thermal equilibrium zone HEA1, HEA2, HEA3may increase. That is, as the thermal equilibrium zone HEA1, HEA2, HEA3is closer to the first heater121, the time taken for the target substrate S arranged in each thermal equilibrium zone HEA1, HEA2, HEA3to reach a threshold temperature (temperature for the bake process) may decrease. In an embodiment, although not shown in the drawing, the cooling rate of the target substrate S arranged in the thermal equilibrium zone HEA1, HEA2, HEA3may have a reverse relationship with the temperature increase rate in respect to the distance between the thermal equilibrium zone HEA1, HEA2, HEA3and the first heater121. That is, the cooling rate of the target substrate S may increase as the distance between the thermal equilibrium zone HEA1, HEA2, HEA3in which the target substrate S is arranged and the first heater121increases. In an embodiment, the locations of the thermal equilibrium zones HEA1, HEA2, and HEA3may be adjusted by adjusting the temperature of the first heater121and/or the temperature of the second heater122, and the temperature increase rate of the target substrate S may be adjusted by arranging the target substrate S in any of the thermal equilibrium zones HEA1, HEA2, and HEA3. Even when the target substrate S includes a same material, the characteristic of the target substrate S may vary with a change in the temperature increase rate of the target substrate S in the bake process. Such features will hereinafter be described in detail with reference toFIG.6. FIG.6is a graph of specific heat capacities of a target substrate crystallized in accordance with a temperature increase rate. Referring further toFIG.6, curves (a), (b), and (c) on the graph ofFIG.6represent specific heat capacities of the target substrate crystallized in accordance with the temperature increase rate. Curve (a) of the graph shows a case where the target substrate S is arranged in the first thermal equilibrium zone HEA1ofFIG.4, curve (b) of the graph shows a case where the target substrate S is arranged in the second thermal equilibrium zone HEA2ofFIG.4, and curve (c) of the graph shows a case where the target substrate S is arranged in the third thermal equilibrium zone HEA3ofFIG.4. As the temperature increase rate of the target substrate S is higher, the specific heat capacity of the target substrate S may be smaller after the crystallization of the target substrate S. That is, as the thermal equilibrium zone HEA1, HEA2, HEA3is closer to the first heater121, the specific capacity may be smaller when the target substrate S arranged in the thermal equilibrium zone HEA1, HEA2, HEA3is crystallized by the bake process. In addition, as the temperature increase rate of the target substrate S is higher, the more uniform specific heat capacity may be obtained in accordance with the time of exposure to the thermal atmosphere. The graph of the specific heat capacities that are shown inFIG.6shows an example of change of the characteristic of the target substrate S after the bake process in accordance with the temperature increase rate of the target substrate S. However, the disclosure is not limited thereto and, although will be described later, in the case where the target substrate S includes individual components of the display device, the electrical characteristics of the individual components may vary according to the temperature increase rate of the target substrate S. The manufacturing apparatus10described above may be used for manufacturing a display device. Hereinafter, a display device manufactured using the manufacturing apparatus10according to an embodiment will be described with reference toFIGS.7and8. FIG.7is a plan view of a display device manufactured by a display device manufacturing apparatus according to an embodiment.FIG.8is a partial cross-sectional view of the display device ofFIG.7. Referring toFIGS.7and8, a display device20may be formed in a substantially rectangular shape in a plan view. The display device20may have a rectangular shape with right-angled corners in a plan view. However, the disclosure is not limited thereto, and alternatively, the display device20may have a rectangular shape with rounded corners in a plan view. The display device20displays a screen or an image through a display area DPA, and various devices including the display area DPA may be included therein. Examples of the display device20may include, but not limited to, a smartphone, a mobile phone, a tablet PC, a personal digital assistant (“PDA”), a portable multimedia player (“PMP”), a television, a game machine, a wristwatch-type electronic device, a head-mounted display, a monitor of a personal computer, a laptop computer, a car navigation system, a car's dashboard, a digital camera, a camcorder, an external billboard, an electronic billboard, various medical devices, various inspection devices, various household appliances such as a refrigerator and a washing machine including the display area DPA, an Internet-of-Things device, and the like. The display device20includes the display area DPA and a non-display area NDA. The display area DPA is an area where a screen is defined or an image is displayed, and the non-display area NDA is an area where an image is not displayed. A plurality of pixels may be disposed in the display area DPA. The pixel is a basic unit for displaying an image. The pixels may include, but not limited to, a red pixel, a green pixel, and a blue pixel. The plurality of pixels may be alternately arranged in a plan view. In one embodiment, for example, the pixels may be arranged in a matrix form, but the disclosure is not limited thereto. The non-display area NDA may be disposed around the display area DPA. The non-display area NDA may be disposed around the display area DPA and may surround the display area DPA. In one embodiment, for example, the display area DPA may be formed in a rectangular shape, and the non-display area NDA may be disposed around four sides of the display area DPA, but the disclosure is not limited thereto. Hereinafter, a stacked structure of the display device20will be described in detail. In an embodiment, as shown inFIG.8, the display device20may include a lower member21, a display panel22, a touch member23, an anti-reflection member24and a cover window25. The lower member21, the display panel22, the touch member23, the anti-reflection member24and the cover window25may be sequentially stacked. At least one bonding member such as an adhesive layer or a tackifier layer may be disposed between the stacked members to bond the adjacent stacked members. However, the disclosure is not limited thereto, and another layer may be further disposed between the respective layers, and some of the stacked members may be omitted. The display panel22is a panel for displaying an image. In an embodiment, the display panel22may include not only a self-luminous display panel such as an organic light emitting display (“OLED”) panel, an inorganic electroluminescence (“EL”) display panel, a quantum dot (“QED”) display panel, a micro-light emitting diode (“LED”) display panel, a nano-LED display panel, a plasma display panel (“PDP”), a field emission display (“FED”) panel and a cathode ray tube (“CRT”) display panel, but also a light receiving display panel such as a liquid crystal display (“LCD”) panel and an electrophoretic display (“EPD”) panel. Hereinafter, for convenience of description, embodiments where the display panel22is the organic light emitting display panel will be described in detail. However, the embodiment is not limited to the organic light emitting display panel, and other types of display panel mentioned above or known in the art may be applied within the teaching herein. The display panel22may include a base substrate SUB1, a buffer layer SUB2, a semiconductor layer ACT, a first insulating layer IL1, a first gate conductive layer221, a second insulating layer IL2, a second gate conductive layer222, a third insulating layer IL3, a data conductive layer223, a fourth insulating layer IL4, an anode electrode ANO, a pixel defining layer PDL including an opening exposing the anode electrode ANO, a light emitting layer EML disposed in the opening of the pixel defining layer PDL, a cathode electrode CAT disposed on the light emitting layer EML and the pixel defining layer PDL, and a thin film encapsulation layer EM disposed on the cathode electrode CAT. Each of the layers described above may have a single layer structure, or a multilayer structure with a stack of multiple layers. Other layers may be further disposed between the layers. The base substrate SUB1may support respective layers disposed thereon. The base substrate SUB1may include or be made of an insulating material such as a polymer resin or an inorganic material such as glass or quartz. The buffer layer SUB2is disposed on the base substrate SUB1. The buffer layer SUB2may include silicon nitride, silicon oxide, silicon oxynitride, or the like. The semiconductor layer ACT is disposed on the buffer layer SUB2. The semiconductor layer ACT forms a channel of a thin film transistor of a pixel. The semiconductor layer ACT may include or be made of polycrystalline silicon, monocrystalline silicon, amorphous silicon, or the like, or may include an oxide semiconductor. The polycrystalline silicon may be formed by crystallizing amorphous silicon, but the disclosure is not limited thereto. The oxide semiconductor may include indium gallium zinc oxide (“IGZO”) or the like. The first insulating layer IL1is disposed on the semiconductor layer ACT. The first insulating layer IL1may be a gate insulating layer having a gate insulating function. The first gate conductive layer221is disposed on the first insulating layer ILL The first gate conductive layer221may include a gate electrode GAT of a thin transistor of a pixel, a scan line connected thereto and a first electrode CE1of a storage capacitor. The second insulating layer IL2may be disposed on the first gate conductive layer221. The second insulating layer IL2may be an interlayer insulating layer or a second gate insulating layer. The second gate conductive layer222is disposed on the second insulating layer IL2. The second gate conductive layer222may include a second electrode CE2of the storage capacitor. The third insulating layer IL3is disposed on the second gate conductive layer222. The third insulating layer IL3may be an interlayer insulating layer. The data conductive layer223is disposed on the third insulating layer IL3. The data conductive layer223may include a first electrode SD1, a second electrode SD2of the thin film transistor of the pixel and a first power line ELVDDE. The first electrode SD1and the second electrode SD2of the thin film transistor may be electrically connected to a source region and a drain region of the semiconductor layer ACT via contact holes defined through the third insulating layer IL3, the second insulating layer IL2and the first insulating layer ILL The fourth insulating layer IL4is disposed on the data conductive layer223. The fourth insulating layer IL4covers the data conductive layer223. The fourth insulating layer IL4may be a via layer or a planarization layer. The anode electrode ANO is disposed on the fourth insulating layer IL4. The anode electrode ANO may be a pixel electrode provided for each pixel. The anode electrode ANO may be connected to the second electrode SD2of the thin film transistor via a contact hole defined through the fourth insulating layer IL4. The anode electrode ANO may have a stacked structure formed by stacking a material layer having a high work function, such as indium tin oxide (“ITO”), indium zinc oxide (“IZO”), zinc oxide (ZnO) and indium oxide (In2O3), and a reflective material layer such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or a mixture thereof, but is not limited thereto. The layer having a high work function may be disposed above the reflective material layer and disposed closer to the light emitting layer EML. The anode electrode ANO may have a multilayer structure such as ITO/Mg, ITO/MgF, ITO/Ag and ITO/Ag/ITO, but is not limited thereto. The pixel defining layer PDL may be disposed on the anode electrode ANO. The pixel defining layer PDL is disposed on the anode electrode ANO, and an opening is defined through the pixel defining layer PDL to expose the anode electrode ANO. Emission areas EMA and non-emission areas NEM may be distinguished or defined by the pixel defining layer PDL and the openings of the pixel defining layer PDL, respectively. A spacer SP may be disposed on the pixel defining layer PDL. The spacer SP may serve to maintain a gap with a structure disposed thereabove. The light emitting layer EML is disposed on the anode electrode ANO exposed by the pixel defining layer PDL. The light emitting layer EML may include an organic material layer. The organic material layer of the light emitting layer may include an organic light emitting layer, and may further include a hole injecting/transporting layer and/or an electron injecting/transporting layer. The light emitting layer EML may be formed by the manufacturing apparatus10(seeFIG.1) of a display device according to an embodiment. The light emitting layer EML may also be formed through the above-described bake process, and the temperature increase rate may vary in accordance with the location of the target substrate S (seeFIG.1), which leads to variation of the thermal, electrical, and/or optical characteristics of the light emitting layer EML. The organic material layer included in the light emitting layer EML may be deposited through an inkjet printing, but the disclosure is not limited thereto. In an embodiment, the organic film (organic layer) of the display device20as well as the light emitting layer EML may be formed through the bake process in the manufacturing process, and the thermal, electrical, and/or optical characteristics of the organic film (organic layer) may vary according to the location where the target substrate S (seeFIG.1) is arranged in the bake process. The cathode electrode CAT may be disposed on the light emitting layer EML. The cathode electrode CAT may be a common electrode extended across all the pixels. The anode electrode ANO, the light emitting layer EML and the cathode electrode CAT may constitute an organic light emitting diode. The cathode electrode CAT may include a material layer having a low work function, such as Li, Ca, LiF/Ca, LiF/Al, Al, Mg, Ag, Pt, Pd, Ni, Au Nd, Ir, Cr, BaF, Ba or a compound or mixture thereof (e.g., a mixture of Ag and Mg). The cathode electrode CAT may further include a transparent metal oxide layer disposed on the material layer having a low work function. The thin film encapsulation layer EM including a first inorganic film EM1, a first organic film EM2and a second inorganic film EM3is disposed on the cathode electrode CAT. The first inorganic film EM1and the second inorganic film EM3may be in contact with each other at an end portion of the thin film encapsulation layer EM. The first organic film EM2may be sealed by the first inorganic film EM1and the second inorganic film EM3. Each of the first inorganic film EM1and the second inorganic film EM3may include silicon nitride, silicon oxide, silicon oxynitride, or the like. The first organic film EM2may include an organic insulating material. The touch member23may be disposed on the display panel22. The touch member23may sense a touch input. In an embodiment, the touch member23may be provided as a panel or a film separate from the display panel22as illustrated, and may be attached onto the display panel22. Alternatively, the touch member23may be provided in the form of a touch layer inside the display panel22. The anti-reflection member24may be disposed on the touch member23. The anti-reflection member24may polarize light passing therethrough or selectively transmit light having a specific wavelength. The anti-reflection member24may serve to reduce the reflection of external light. The cover window25may be disposed on the touch member23. The cover window25serves to cover and protect the display panel22. The cover window25may include or be made of a transparent material. The cover window25may include, for example, a glass or a plastic. The lower member21may be disposed below the display panel22. The lower member21may perform a light blocking function. That is, the lower member21may block light from entering the display panel22from the outside. Further, the lower member21may perform an impact absorbing function other than the light blocking function. Hereinafter, alternative embodiments will be described with reference toFIGS.9to13. The same or like elements shown inFIGS.9to13have been labeled with the same reference characters as used above to describe the embodiments shown inFIGS.1to8, and any repetitive detailed description thereof will hereinafter be omitted or simplified. FIG.9is a view schematically illustrating a manufacturing apparatus according to an alternative embodiment.FIG.10is a view schematically illustrating heat flows inside a manufacturing apparatus according to the embodiment ofFIG.9.FIG.11is a graph of a temperature varying in accordance with a location between point A and point B of a first heater. The embodiment of a manufacturing apparatus10_1shown inFIGS.9to11is substantially the same as the embodiment ofFIG.1except that the density of heating wires HL1_1and HL2_1of first and second heaters121_1and122_1is not uniform. In such an embodiment, the manufacturing apparatus10_1may include a heating member120_1including a first heater121_1and a second heater122_2. In such an embodiment, the first heater121_1includes the first heating wire HL1_1, and the second heater122_2includes the second heating wire HL2_1. The density of the first heating wire HL1_1inside the first heater121_1may not be uniform. The density of the first heating wire HL1_1may increase in the direction toward the edges of the first heater121_1and decrease in the direction toward the center of the first heater121_1. That is, the distance between adjacent bars of the zigzag of the first heating wire HL1_1around the edge of the first heater121_1may be smaller than the distance between adjacent bars of the zigzag of the first heating wire HL_1around the center of the first heater121_1. Accordingly, the temperature of the first heater121_1may differ with position. That is, the temperature around the edge of the first heater121_1in which the density of the first heating wire HL1_1is relatively high may be higher than the temperature around the center of the first heater121_1in which the density of the first heating wire HL1_1is relatively low, but the disclosure is not limited thereto. In such an embodiment, the characteristics of the second heating wires HL2_1in the second heater122_1is substantially the same as those of the first heating wire HL1_1in the first heater121_1, and any repetitive detailed description thereof will be omitted. In such an embodiment, the temperature of the first heater121_1may gradually decrease and then increase again from point A close to one side surface of the first heater121_1to point B close to the other side surface of the first heater121_1that is opposite to the one side surface. The temperature of the first theater121_1is the highest at points A and B, and the temperature at the area between points A and B may be lower than the temperature at points A and B. The temperature of the first heater121_1may decrease as going from points A and B to the center between points A and B. In such an embodiment, the temperature at the edges of the first and second heaters121_1and122_1is relatively higher than the temperature at the centers of the first and second heaters121_1and122_1, such that the first and second heaters121_1and122_1may emit a relatively large amount of heat around the edges thereof. Accordingly, even though heat exchange occurs through convection and/or radiation between the inside and the outside around the edges of the first and second heaters121_1and122_1, a more uniform thermal atmosphere may be formed in the inside between the first and second heaters121_1and122_1. Accordingly, in such an embodiment, heat uniformity and heat stability of the thermal equilibrium zone HEA may be improved. In such an embodiment, even when the size of the first heater121_1increases in line with the increase of the size of the target substrate S, the bake process may be performed with a uniform thermal atmosphere over the whole area of the target substrate S, and the temperature increase rate of the target substrate S may be adjusted by adjusting the location of the thermal equilibrium zone HEA. FIG.12is a view schematically illustrating a manufacturing apparatus according to another alternative embodiment. The embodiment of a manufacturing apparatus102of a display device shown inFIG.12is substantially the same as the embodiment ofFIG.1except that the manufacturing apparatus10_2further includes a gas supply unit160_2for supplying gas into the chamber110and a gas exhaust unit170_2for discharging the gas. In such an embodiment, the manufacturing apparatus10_2of a display device may further include the gas supply unit160_2and the gas exhaust unit170_2connected to the chamber110. The gas supply unit160_2may be connected to one surface of the chamber110, and the gas exhaust unit170_2may be connected to the other surface opposite to the one surface, but the disclosure is not limited thereto. The gas supply unit160_2may supply the gas to the inside of the chamber110. The gas may include, but not limited to, nitrogen (N2) or argon (Ar). The gas exhaust unit170_2may discharge the gas, which the gas supply unit160_2has supplied to the inside of the chamber110, to the outside of the chamber110. The gas may be provided in the process of cooling the target substrate S to accelerate the cooling rate of the target substrate S. The temperature of the gas may be, for example, equal to or less than 0° C. or equal to or less than −30° C., without being limited thereto. The gas may also be provided while the target substrate S moves from the first heater121to the second heater122. That is, the gas may be provided while the target substrate S and the first heater121are separated away from each other and/or while the separation distance between the target substrate S and the first heater121increases, but the disclosure is not limited thereto. In such an embodiment, even when the size of the first heater121increases in line with the increase of the size of the target substrate S, the bake process may be performed with a uniform thermal atmosphere over the whole area of the target substrate S, and the temperature increase rate of the target substrate S may be adjusted by adjusting the location of the thermal equilibrium zone HEA. FIG.13is a view schematically illustrating a manufacturing apparatus according to still another alternative embodiment. The embodiment of the manufacturing apparatus10_3of a display device shown inFIG.13is substantially the same as the embodiment ofFIG.1except that of the manufacturing apparatus10_3includes a location measurement unit TS_3arranged on the height adjustment member130. In such an embodiment, the location management unit TS_3may be arranged on the height adjustment member130inside the chamber110. The location measurement unit TS_3may be arranged on the height adjustment member130and vary in height as the height adjustment member130moves up and down. In such an embodiment, the location measurement unit TS_3may include a temperature sensor to measure the temperature inside the chamber110even in the case where no target substrate S is arranged on the height adjustment member130. In such an embodiment, even when the size of the first heater121increases in line with the increase of the size of the target substrate S, the bake process may be performed with a uniform thermal atmosphere over the whole area of the target substrate S, and the temperature increase rate of the target substrate S may be adjusted by adjusting the location of the thermal equilibrium zone HEA. By using the location measurement unit TS_3arranged on the height adjustment member130, the location of the thermal equilibrium zone HEA (seeFIG.3) may be effectively measured in accordance with the temperatures of the first and second heaters121and122. The invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art. While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined by the following claims. | 51,597 |
11942339 | DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described in detail below referring to the drawings. The present invention is not to be limited by the contents described in the following embodiment. In addition, the constituent elements described below include those which can easily be conceived by a person skilled in the art and those which are substantially the same. Further, the configurations described below can be combined as required. Besides, various omission, replacement, or modification of the configuration can be made in such ranges as not to depart from the gist of the present invention. A sheet attaching apparatus according to an embodiment of the present invention will be described based on the drawings.FIG.1is a sectional view schematically depicting a configuration example of a sheet attaching section and a sheet cutting section of the sheet attaching apparatus according to the embodiment.FIG.2is a perspective view of a workpiece to which a sheet has been attached by the sheet attaching apparatus according to the embodiment.FIG.3is a plan view of the sheet cutting section depicted inFIG.1. The sheet attaching apparatus1depicted inFIG.1according to the embodiment is an apparatus for attaching a sheet210to a front surface203of a workpiece200depicted inFIG.2, to form a sheeted workpiece211. The workpiece200to which the sheet210is attached by the sheet attaching apparatus1according to the embodiment is a wafer such as a disk-shaped semiconductor wafer or an optical device wafer with a substrate201including silicon (Si), sapphire (Al2O3), gallium arsenide (GaAs), or silicon carbide (SiC), for example. As depicted inFIG.2, the workpiece200includes devices204each formed in each of regions of the front surface203partitioned by a plurality of intersecting streets203. The device204is, for example, an integrated circuit such as an integrated circuit (IC) or a large scale integration (LSI) circuit, an image sensor such as a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS), micro electro mechanical systems (MEMS), or the like. In the embodiment, the workpiece200has the sheet210attached to the front surface203side, a back surface205opposite to the front surface203is ground in a state in which the front surface203side is held by a chuck table of a grinding apparatus through the sheet210, whereby the workpiece200is thinned to a predetermined finished thickness. After thinned, the workpiece200is divided along the streets202into the individual devices204. The sheet210is formed in a sheet shape from a thermoplastic resin, with the area of a plan-view shape thereof larger than the area of the workpiece200. In the embodiment, the sheet210is formed in a rectangular shape, with both the width and the length of a plan-view shape thereof larger than the outside diameter of the workpiece200. In the embodiment, a predetermined length of the sheet210wound around a cylindrical roll is cut out, after which the sheet210cut out from the roll is attached to the front surface203of the workpiece200by the sheet attaching apparatus1. The sheet210has both the front surface and the back surface thereof formed flat. The sheet210includes a thermoplastic resin having flexibility and non-tacky property, and does not include a glue layer including an adhesive resin. In addition, the thermoplastic resin constituting the sheet210has a contractible and extendable property, is softened when heated in excess of a softening point thereof, and is contracted when further heated. In the embodiment, the sheet210includes a resin which is transparent or semi-transparent to visible light. In the embodiment, the sheet210is a sheet of a polymer synthesized from an alkene as a monomer, and includes, for example, polyethylene, polypropylene, polystyrene, or the like as the thermoplastic resin. In the embodiment, the thickness of the sheet210is equal to or more than 50 μm and equal to or less than 150 μm. The sheet attaching apparatus1according to the embodiment is a device for attaching, to the workpiece200, the sheet210which has been cut out in a predetermined length and which is depicted in broken line inFIG.2, and cutting the sheet210along an outer edge206which is the periphery of the workpiece200, to form the sheeted workpiece211depicted in solid line inFIG.2. As depicted inFIG.1, the sheet attaching apparatus1includes a sheet attaching section2that attaches, to the workpiece200, the rectangular sheet210larger in area in a plan-view shape than the workpiece200; a sheet cutting section20that cuts the sheet210attached by the sheet attaching section2along the outer edge206of the workpiece200and cuts away an unnecessary part212(depicted inFIG.6) of the sheet210from the workpiece200; and a conveying section (not illustrated) that conveys the workpiece200with the sheet210attached thereto from the sheet attaching section2to the sheet cutting section20. Note that the unnecessary part212refers to a part of the rectangular sheet210attached to the workpiece200, the part being protruded more to the periphery side than the outer edge206. As depicted inFIG.1, the sheet attaching section2includes a pressure reduction chamber3, a support table4, and a heating unit5. The pressure reduction chamber3includes an upper housing6and a lower housing7that fixes the sheet210while located on opposite sides of a peripheral part213of the sheet210(a region of the unnecessary part212of the sheet210, the region being on the periphery side); pressure reduction units8and9connected respectively to the housings6and7; and atmospheric air opening units10and11connected respectively to the housings6and7. Of the pressure reduction chamber3, the part between the upper housing6and the sheet210and the part between the sheet210and the lower housing7are kept hermetically sealed when the sheet210is interposed between the housings6and7. The pressure reduction units8and9reduces the gas pressures inside the housings6and7, respectively. The atmospheric air opening units10and11open the inside of the housings6and7to the atmospheric air. The support table4is disposed inside the lower housing7, and has the back surface205of the workpiece200, the back surface205being placed on an upper surface of the support table4. The heating unit5is disposed inside the support table4, and heats the sheet210through the support table4and the workpiece200. The sheet attaching section2fixes the sheet210while having the workpiece200mounted on the upper surface of the support table4and interposing the sheet210between the housings6and7of the pressure reduction chamber3. The sheet attaching section2reduces the pressures inside the housings6and7by the pressure reduction units8and9, and heats the workpiece200by the heating unit5through the support table4. The sheet attaching section2opens the inside of the upper housing6to the atmospheric air by the atmospheric air opening unit10connected to the upper housing6, brings the sheet210into close contact with the front surface203of the workpiece200by a differential pressure in the housings6and7, heats and softens the sheet210by the heating unit5, and adheres the sheet210to the front surface203of the workpiece200. As depicted inFIGS.1and3, the sheet cutting section20has a sheet accommodating section21, a chuck table30, a sheet holding section40, and a cutting section50. The sheet accommodating section21is for accommodating the unnecessary part212of the sheet210, the unnecessary part212being cut along the outer edge206of the workpiece200and dropped due to release of holding by the sheet holding section40. The sheet accommodating section21includes a bottom plate22parallel to a horizontal direction and a plurality of peripheral plates23erected from an outer edge of the bottom plate22. The plan-view shape of the bottom plate22of the sheet accommodating section21is a rectangular shape larger than the plan-view shape of the sheet210yet to be cut along the outer edge206of the workpiece200. The chuck table30is for holding the workpiece200with a holding surface31smaller than the workpiece200. The chuck table30is disposed in the center of the bottom plate22of the sheet accommodating section21, and is formed in a disk shape with an outside diameter smaller than the outside diameter of the workpiece200. The chuck table30has the workpiece200mounted on the upper surface thereof, which is the holding surface31for holding the workpiece200. The chuck table30holds the back surface205of the workpiece200with the sheet210attached to the front surface203thereof on the holding surface31. The sheet holding section40is for detachably holding the peripheral part213of the sheet210attached to the workpiece200held by the chuck table30. The sheet holding sections40are provided respectively on a pair of opposed peripheral plates23(hereinafter denoted by a reference symbol23-1) of the sheet accommodating section21. Each sheet holding section40includes a pair of sheet holding plates41formed in a plate shape parallel to the peripheral plates23-1and aligned in the direction parallel to the peripheral plates23-1. The sheet holding plates41of each sheet holding section40are moved along the peripheral plates23-1by a moving unit (not illustrated) between holding positions depicted in solid line inFIG.3where they are close to each other and hold the peripheral part213of the sheet210on upper surfaces thereof and holding release positions depicted in broken line inFIG.3where they are spaced from each other and do not hold the peripheral part213of the sheet210. The upper surfaces of the sheet holding plates41of each sheet holding section40are provided with a plurality of suction holes42connected to a vacuum drive source (not illustrated). The suction holes42are arranged on upper surfaces of the sheet holding plates41at intervals along the longitudinal direction of the sheet holding plates41. The sheet holding section40holds under suction the peripheral part213of the sheet210on the upper surfaces of the sheet holding plate41, by the suction holes42of the sheet holding plates41positioned at the holding positions being sucked by the vacuum drive source. The sheet holding section40releases the holding of the peripheral part213of the sheet210, by stopping the suction of the suction holes42and positioning the sheet holding plates41at the holding release positions. In this way, the sheet holding section40detachably holds the peripheral part213of the sheet210attached to the workpiece200held by the chuck table30, by movement of the sheet holding plates41between the holding positions and the holding release positions, suction by the vacuum drive source, and stopping of the suction. Note that the upper surfaces of the sheet holding plates41of each sheet holding section40are disposed above the holding surface31of the chuck table30. The cutting section50is for cutting the sheet210attached to the workpiece200held by the chuck table30, along the outer edge206of the workpiece200. The cutting section50includes a cutter51that cuts into the sheet210to cut the sheet210; a rotating roller52as a pressing section that presses the unnecessary part212of the cut sheet210, the unnecessary part being on the periphery side of the workpiece200, toward the sheet accommodating section21; a clamping roller53that clamps the sheet210between itself and the chuck table30; and a moving unit54(depicted inFIG.1) that lifts and lowers the cutter51, the rotating roller52, and the clamping roller53and move them in the circumferential direction of the chuck table30. The cutter51is supported by the moving unit54, and a lower end of a cutting edge is disposed on the outer edge206of the workpiece200held by the chuck table30. The cutter51is moved by the moving unit54along the outer edge206of the workpiece200held by the chuck table30. The rotating roller52is rotatably supported by a lower end part of a support column55supported by the moving unit54, and is disposed on the side of the outer circumference of the chuck table30relative to the cutter51. A lower end of the rotating roller52is disposed at the same height as that of the lower end of the cutting edge of the cutter51. The clamping roller53is rotatably supported by the lower end part of the support column56supported by the moving unit54, and is disposed on the side of the inner circumference of the chuck table30relative to the cutter51. A lower end of the clamping roller53is disposed above the lower end of the rotating roller52and the lower end of the cutting edge of the cutter51. The moving unit54lifts and lowers the cutter51, the rotating roller52, and the clamping roller53together, and moves the cutter51, the rotating roller52, and the clamping roller53together in the circumferential direction of the chuck table30. The rotating roller52and the clamping roller53are moved together with the cutter51in the circumferential direction of the chuck table30relative to the sheet210, the rotating roller52rolls on the sheet210while moving relative to the sheet210, to press the sheet210toward the sheet accommodating section21, and the clamping roller53rolls on the sheet210while moving relative to the sheet210, to press the sheet210toward the holding surface31of the chuck table30. In this instance, since the lower end of the clamping roller53is disposed above the lower end of the rotating roller52and the lower end of the cutting edge of the cutter51, the rotating roller52presses the unnecessary part212of the sheet210toward the sheet accommodating section21while moving in the circumferential direction relative to the sheet210together with the cutter51cutting into the sheet210. A control unit100is for controlling the constituent elements constituting the sheet attaching apparatus1, to attach the sheet210to the front surface203side of the workpiece200, and for causing the sheet attaching apparatus1to perform a sheet attaching operation of cutting the sheet210along the outer edge206of the workpiece200. The control unit100is a computer that has an arithmetic processing device having a microprocessor such as a central processing unit (CPU), a storage device having a memory such as a read only memory (ROM) or a random access memory (RAM), and an input-output interface device, and that can execute a computer program. The arithmetic processing device of the control unit100executes the computer program stored in the ROM on the RAM, to generate control signals for controlling the sheet attaching apparatus1. The arithmetic processing device of the control unit100outputs the generated control signals to the constituent elements of the sheet attaching apparatus1through the input-output interface device. In addition, the control unit100is connected to a display unit including a liquid crystal display for displaying a processing operation state, images, and the like, and an input unit used when an operator registers processing contents information or the like. The input unit includes at least one of a touch panel provided on the display unit and a keyboard and the like. Next, a sheet attaching operation of the sheet attaching apparatus1having the above-mentioned configuration will be described based on the drawings.FIG.4is a sectional view schematically depicting a state in which the cutter of the sheet cutting section depicted inFIG.1cuts into the sheet attached to the workpiece held by the chuck table.FIG.5is a plan view schematically depicting the sheet cutting section depicted inFIG.4.FIG.6is a sectional view schematically depicting a state in which the sheet cutting section depicted inFIG.4cuts the sheet attached to the workpiece held by the chuck table and the unnecessary part of the sheet is accommodated in the sheet accommodating section.FIG.7is a plan view schematically depicting the sheet cutting section depicted inFIG.6. In the sheet attaching apparatus1having the above-mentioned configuration, the control unit100controls the constituent elements, to perform a sheet attaching operation. In the sheet attaching operation, the sheet attaching section2of the sheet attaching apparatus1attaches the sheet210to the front surface203of the workpiece200, as mentioned above. In the sheet attaching apparatus1, the conveying unit conveys the workpiece200with the sheet210attached to the front surface203thereof from the sheet attaching section2to the sheet cutting section20, puts the workpiece200on the holding surface31of the chuck table30, and places the peripheral part213of the sheet210on the upper surfaces of the sheet holding plates41positioned at the holding positions. In this instance, the sheet attaching apparatus1disposes the chuck table30and the workpiece200at such positions as to be coaxial with each other. The sheet attaching apparatus1holds under suction the peripheral part213of the sheet210on the upper surfaces of the sheet holding plates41of the sheet holding sections40, lowers the cutter51of the cutting section50, the rotating roller52, and the clamping roller53by the moving unit54, and, as depicted inFIGS.4and5, causes the cutting edge of the cutter51to cut into the sheet210, causes the rotating roller52to press the unnecessary part212of the sheet210, and causes the clamping roller53to press the sheet210on the holding surface31of the chuck table30. The sheet attaching apparatus1rotates the cutter51of the cutting section50, the rotating roller52, and the clamping roller53at least one revolution in the circumferential direction of the chuck table30by the moving unit54, and cuts the sheet210along the outer edge206over the whole circumference of the workpiece200by the cutter51. In this instance, since the lower end of the rotating roller52is disposed below the lower end of the clamping roller53, the unnecessary part212of the cut sheet210, the unnecessary part212being on the periphery side relative to the outer edge206of the workpiece200, is positioned below the part attached to the workpiece200. In addition, at the time of cutting the sheet210, the rotating roller52is positioned on the rear side in the moving direction relative to the cutter51moved in the circumferential direction of the chuck table, and the sheet210having been cut by the cutter51is securely pressed down toward the sheet accommodating section by the rotating roller. The sheet attaching apparatus1stops suction of the sheet210on the sheet holding plates41of the sheet holding sections40, moves the sheet holding plates41to the holding release positions, and lifts the cutter51, the rotating roller52, and the clamping roller53by the moving unit54. Then, as depicted inFIGS.6and7, the unnecessary part212of the sheet210, the unnecessary part212being on the periphery side relative to the outer edge206of the workpiece200yet to be cut, is dropped into the sheet accommodating section21, and is accommodated in the sheet accommodating section21. In this way, the sheet attaching apparatus1forms the sheeted workpiece211(the body including the workpiece200and the disk-shaped sheet210that is attached to the workpiece200and that has the same diameter as that of the workpiece200). The sheet attaching apparatus1according to the embodiment described above includes the rotating roller52as a pressing section for pressing the unnecessary part212of the sheet210having been cut by the cutting section50toward the sheet accommodating section21, and therefore, the unnecessary part212of the sheet210can securely be separated from the part for forming the sheeted workpiece211attached to the workpiece200. As a result, the sheet attaching apparatus1produces an effect that the phenomenon in which the unnecessary part212of the sheet210having been attached to the workpiece200makes contact with the workpiece200and becomes difficult to be dropped can be dissolved, and that the unnecessary part212of the sheet210having been attached to the workpiece200can easily be removed. The present invention is not limited to the details of the above described preferred embodiment. The scope of the invention is defined by the appended claims and all changes and modifications as fall within the equivalence of the scope of the claims are therefore to be embraced by the invention. | 20,260 |
11942340 | DETAILED DESCRIPTION Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the invention. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the invention as recited in the appended claims. Electronic devices are constructed of circuits formed on a piece of silicon called a substrate. Many circuits may be formed together on the same piece of silicon and are called integrated circuits or ICs. The size of these circuits has decreased dramatically so that many more of them can fit on the substrate. For example, an IC chip in a smart phone can be as small as a thumbnail and yet may include over 2 billion transistors, the size of each transistor being less than 1/1000th the size of a human hair. Making these extremely small ICs is a complex, time-consuming, and expensive process, often involving hundreds of individual steps. Errors in even one step have the potential to result in defects in the finished IC rendering it useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs made in the process, that is, to improve the overall yield of the process. One component of improving yield is monitoring the chip making process to ensure that it is producing a sufficient number of functional integrated circuits. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection can be carried out using a scanning electron microscope (SEM). An SEM can be used to image these extremely small structures, in effect, taking a “picture” of the structures. The image can be used to determine if the structure was formed properly and also if it was formed in the proper location. If the structure is defective, then the process can be adjusted so the defect is less likely to occur again. While high process yield is desirable in an IC chip manufacturing facility, it is also essential to maintain a high wafer throughput, defined as the number of wafers processed per hour. High process yields and high wafer throughput can be impacted by the presence of defects, especially when there is operator intervention to review the defects. Thus, high throughput detection and identification of micro and nano-sized defects by inspection tools (such as a SEM) is essential for maintaining high yields and low cost. One aspect of the present disclosure includes an improved load lock system that increases the throughput of the overall inspection system. The improved load lock system prepares a wafer in a manner that speeds up the inspection process when compared to conventional particle beam inspection systems. For example, an operator, who is inspecting a wafer using the conventional particle beam inspection system, needs to wait for the wafer to be temperature stabilized before starting the inspection. This temperature stabilization is required because the wafer changes size as the temperature changes, which causes elements on the wafer to move as the wafer expands or contracts. For example,FIG.1Cshows that elements180,182,184, and186can move to new locations170,172,174, and178as a wafer160expands due to the temperature change. And when the precision for inspecting a wafer is in nanometers, this change in location is substantial. Accordingly, for the operator to precisely locate and inspect the elements on the wafer, the operator must wait until the wafer temperature stabilizes. The improved load lock system conditions the wafer so that its temperature is close to a temperature of an inspection wafer stage that will hold the wafer. The improved load lock system can condition the wafer by including a conditioning plate that transfers heat to or from the wafer before it is placed onto the wafer stage. By conditioning the wafer before it is placed onto the wafer stage, the inspection can begin with much less delay. Therefore, the operator can inspect more wafers within a given period of time, thereby achieving an increased throughput. Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described. As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component may include A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component may include A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. Reference is now made toFIG.1A, which is a schematic diagram illustrating an exemplary charged particle beam inspection system100, consistent with embodiments of the present disclosure. As shown inFIG.1A, charged particle beam inspection system100includes a main chamber10, a load lock chamber20, an electron beam tool40, and an equipment front end module (EFEM)30. Electron beam tool40is located within main chamber10. While the description and drawings are directed to an electron beam, it is appreciated that the embodiments are not used to limit the present invention to specific charged particles. It is further appreciated that electron beam tool40can be a single-beam tool that utilizes a single electron beam or a multi-beam tool that utilizes multiple electron beams. EFEM30includes a first loading port30aand a second loading port30b. EFEM30may include additional loading port(s). First loading port30aand second loading port30bmay, for example, receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples are collectively referred to as “wafers” hereafter). One or more robot arms (e.g., the robotic arms shown inFIG.1B) in EFEM30transport the wafers to load lock chamber20. Load lock chamber20may be attached to main chamber10with a gate valve (e.g., gate valve26ofFIG.1B) between the chambers. Load lock chamber20may include a sample holder (not shown) that can hold one or more wafers. Load lock chamber20may also include a mechanical transfer apparatus (e.g., robot arm12ofFIG.1B) to move wafers to and from main chamber10. Load lock chamber20may be connected to a load lock vacuum pump system (not shown), which removes gas molecules in load lock chamber20to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robot arms (shown inFIG.1B) transport the wafer from load lock chamber20to main chamber10. Main chamber10is connected to a main chamber vacuum pump system (not shown), which removes gas molecules in main chamber10to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by electron beam tool40. A controller50is electronically connected to electron beam tool40. Controller50may be a computer configured to execute various controls of charged particle beam inspection system100. While controller50is shown inFIG.1Aas being outside of the structure that includes main chamber10, load lock chamber20, and EFEM30, it is appreciated that controller50may be part of the structure. While the present disclosure provides examples of main chamber10housing an electron beam inspection tool, it should be noted that aspects of the disclosure in their broadest sense are not limited to a chamber housing an electron beam inspection tool. Rather, it is appreciated that the foregoing principles may also be applied to other tools that operate under the second pressure. Reference is now made toFIG.1B, which is a schematic diagram illustrating an exemplary wafer loading sequence in charged particle beam inspection system100ofFIG.1A, consistent with embodiments of the present disclosure. In some embodiments, charged particle beam inspection system100may include a robot arm11located in EFEM30and a robot arm12located in main chamber10. In some embodiments, EFEM30may also include a pre-aligner60configured to position a wafer accurately before transporting the wafer to load lock chamber20. In some embodiments, first loading port30aand second loading port30b, for example, may receive wafer front opening unified pods (FOUPs) that contain wafers. Robot arm11in EFEM30may transport the wafers from any of the loading ports to pre-aligner60for assisting with the positioning. Pre-aligner60may use mechanical or optical aligning methods to position the wafers. After pre-alignment, robot arm11may transport the wafers to load lock chamber20. After the wafers are transported to load lock chamber20, a load lock vacuum pump (not shown) may remove gas molecules in load lock chamber20to reach a first pressure below the atmospheric pressure. After reaching the first pressure, a robot arm12may transport the wafer from load lock chamber20to a wafer stage80of electron beam tool40in main chamber10. Main chamber10is connected to a main chamber vacuum pump system (not shown), which removes gas molecules in main chamber10to reach a second pressure below the first pressure. After reaching the second pressure, the wafer may be subject to inspection by electron beam tool. In some embodiments, main chamber10may include a parking station70configured to temporarily store a wafer before inspection. For example, when the inspection of a first wafer is completed, the first wafer may be unloaded from wafer stage80, and then a robot arm12may transport a second wafer from parking station70to wafer stage80. Afterwards, robot arm12may transport a third wafer from load lock chamber20to parking station70to store the third wafer temporarily until the inspection for the second wafer is finished. Reference is now made toFIG.2, which is an exemplary graph showing a wafer temperature change over time for a charged particle beam inspection system. The vertical axis represents temperature change, and the horizontal axis represents passage of time. The graph shows that the wafer temperature changes over time while the wafer is processed through multiple stages of wafer load sequence. According to the exemplary data shown inFIG.2, when a FOUP, containing wafers to be inspected, is loaded to first loading port30aor second loading port30b, the temperature of the wafer is approximately 22.5 degrees. After the wafer is transported to a load lock chamber, the wafer temperature sharply drops almost one degree when the load lock chamber is pumped down to a vacuum. This sudden temperature drop may be referred to as a pump-down effect. Subsequently, when the wafer is transported and loaded onto the wafer stage, the wafer and the wafer stage may be at different temperatures. For example, the graph inFIG.2shows that, when the wafer is loaded to wafer stage (annotated inFIG.2as210), there may be roughly a 2.5-degree temperature difference between the wafer located in the load lock chamber (annotated inFIG.2as220) and the wafer stage located in the main chamber (annotated inFIG.2as230). Under such circumstances, heat transfer may occur between the wafer and the wafer stage, thereby resulting in a deformation (e.g. a thermal expansion shown inFIG.1C) of the wafer (or the wafer stage). While the wafer stage or wafer is undergoing a thermal deformation, the inspection of the target area may not be possible or may have a reduced accuracy. Thus, to perform a more accurate inspection, the system waits for a significant period of time until the wafer temperature stabilizes before an inspection can commence. This waiting time reduces the throughput of the inspection system. An example of wafer stage for quicker temperature stabilization may be found in European Patent Application No. EP18174642.1, titled PARTICLE BEAM APPARATUS and filed on May 28, 2018, which is incorporated by reference in its entirety. Another way to cope with this long stabilization time is conditioning the wafer temperature by pre-heating or pre-cooling the wafer to match the temperature of the wafer stage before the wafer is loaded onto the wafer stage. In such embodiments, the conditioning step may be performed while the previous wafer is inspected on the wafer stage, and therefore, the overall throughput of the inspection system may be increased compared to a system in which the conditioning is performed after the wafer is loaded onto the wafer stage. In some embodiments, the temperature conditioning function may be implemented in a load lock chamber, which may provide throughput improvement as well as flexibility for the future. If the temperature conditioning of the wafer is performed in the load lock chamber, the wafer next in the pipeline can be loaded into load lock chamber while an inspection of previous wafer is in progress. In some examples, it is calculated that, in this sequence, the maximum available time to condition a wafer would be approximately 5-10 minutes, which is about the minimum inspection time of a wafer with the shortest user case in scope now. Therefore, one of the advantages of performing the wafer temperature conditioning in the load lock chamber is that the wafer conditioning time can be hidden under the inspection time because the conditioning of the next wafer and the inspection of the current wafer can occur simultaneously. This may improve the overall throughput of the particle beam inspection system. In some embodiments, a charged particle beam inspection system (such as charged particle beam inspection system100ofFIG.1B) may include a coarse temperature conditioner and a fine temperature conditioner. For example, a pre-aligner (such as pre-aligner60ofFIG.1B) may include a coarse conditioner, while a load lock chamber (such as load lock chamber20) includes a fine conditioner. The coarse conditioner may condition the wafer from, for example, a coarse offset of 2 degrees to 500 mk, while the fine conditioner can condition the wafer from, for example, a fine offset of 500 mK to 50 mK. Reference is now made toFIG.3A, which shows an exemplary load lock system300a, consistent with embodiments of the present disclosure. In some embodiments, load lock system300amay include a plurality of supporting structures325and a conditioning plate315configured to transfer heat to wafer320. In other embodiments, conditioning plate315may be configured to additionally or alternatively transfer heat from wafer320. Supporting structures325, coupled to conditioning plate315, may support wafer320such that there is a space between wafer320and conditioning plate315. While it is appreciated that more efficient heat transfer may be achieved as wafer320is positioned closer to conditioning plate315, in some embodiments, it may be desirable to have sufficient distance in between wafer320and conditioning plate315to provide space for a robot arm to lift or transport wafer320. In some embodiments, the distance between wafer320and conditioning plate315may be in a range of 1.5 mm to 10 mm to provide space to accommodate a variety of robot arm sizes in lifting or transporting a wafer. In some embodiments, the distance between wafer320and conditioning plate315may be in a range of 3 mm to 5 mm to provide space to accommodate a certain type of robot arms while providing more efficient heat transfer, without requiring a special treatment for robot arm transportation. In some embodiments, a special mechanism for lifting wafer320may be used, allowing the distance to be narrower. Furthermore, even if two supporting structures325are shown inFIG.3A, it is appreciated that system300amay include any number of supporting structures325. In some embodiments, wafer320may be passively placed on top of supporting structures325without any means of active coupling (e.g. electrostatic clamping). In other embodiments, wafer320may be held onto supporting structures325using an active holding mean, such as electrostatic clamping. Load lock system300amay include a load lock chamber310, such as load lock chamber20ofFIG.1A. In some embodiments, load lock chamber310may be configured to change the internal pressure between atmospheric and vacuum. A pump, such as a turbo pump (not shown), may be connected to load lock chamber310to maintain a vacuum level at an appropriate level for conditioning the temperature of wafer320. It is appreciated that the pump may be a type of pump different from a turbo pump as long as the pump is suitable for establishing a vacuum in load lock chamber310. In some embodiments, conditioning plate315may include a heat transfer element340configured to change the temperature of conditioning plate315, which in turn affect the temperature of wafer320. Heat transfer element340may be coupled to a heater/cooler360. In some embodiments, heater/cooler360may be placed outside of load lock chamber310. In other embodiments, heater/cooler360may be placed inside of load lock chamber310. Load lock system300amay further include a controller350configured to adjust heater/cooler360or heat transfer element340to change the temperature of conditioning plate315, which in turn affects the temperature of wafer320. In some embodiments, controller350may receive a stage-temperature data about the temperature of wafer stage395in a main chamber390. For example, in some embodiments, controller350may receive an electric signal conveying the stage-temperature data from a temperature sensor396configured to measure the temperature of wafer stage395. In such embodiments, controller350may control heater/cooler360to adjust the temperature of conditioning plate315based on the stage-temperature data about the temperature of wafer stage395. In some embodiments, controller350may receive a heater-temperature data about the temperature of output of heater/cooler360. In such embodiments, controller350may control heater/cooler360to adjust the temperature of conditioning plate315based on the heater-temperature data. For example, in some embodiments, heater/cooler360may be a water heater or water cooler. In such embodiments, heated or cooled water flows through heat transfer elements340in conditioning plate315, and controller350may receive the heater-temperature data about the temperature of water at the output of heater/cooler360. Controller350may adjust heater/cooler360based on the water temperature. In some embodiments, controller350may receive an electric signal conveying the heater-temperature data from a temperature sensor365configured to measure the temperature of water. In some embodiments, controller350may use both stage-temperature data and heater-temperature data to adjust the temperature of conditioning plate315. In such embodiments, for example, controller350may adjust heater/cooler360to match the heater temperature (e.g. water temperature at the output of heater/cooler360) to the temperature of wafer stage395. In some embodiments, controller350may be further optimized with additional temperature sensors. For example, in some embodiments, system may include one or more additional sensors configured to measure the temperature of wafer320and conditioning plate315. In some embodiments, load lock system300amay include one or more gas vents (e.g., gas vents330or335) to feed gas338from a gas supply into load lock chamber310. In such embodiments, gas338may increase thermal conduction between wafer320and conditioning plate315, resulting in a reduced time for wafer320to reach the stable temperature. For example, heat transfer between wafer320and conditioning plate315may be created by radiation and gas338. Gas338may be nitrogen, helium, hydrogen, argon, CO2, or compressed dry air. It is appreciated that gas338may be any other gas suitable for heat transfer. There may be valves370and375located between the gas supply and load lock chamber310. Gas vents330and335may be connected to gas supply through gas tubes running from the gas supply to vents330and335, which may be opened into load lock chamber310to provide gas between wafer320and conditioning plate315. In some embodiments, gas vents330and335may be opened after load lock chamber is pumped down to vacuum level. In some embodiments, while gas338is supplied into load lock chamber310, the load lock vacuum pump (e.g. turbo pump) may be enabled to continuously remove some of gas338molecules and maintain the vacuum level during wafer conditioning process. As shown inFIG.3F, the efficiency of the heat transfer increases when the gas pressure increases. However, the efficiency may not improve much more when the gas pressure approaches to a certain level, for example 100 Pa or above inFIG.3F. Therefore, in some embodiments, the gas pressure in the space between wafer320and conditioning plate315may be in a range of 50 Pa to 5,000 Pa during conditioning of wafer320to provide an efficient heat transfer while keeping the gas pressure level sufficiently low. In some embodiments, the gas pressure may be in a range of 100 Pa to 1,000 Pa during conditioning of wafer320to provide a balance between the heat transfer efficiency while keeping the gas pressure close to vacuum. In some embodiments, gas338may be temperature conditioned so that the gas molecules themselves may provide heat transfer to wafer320. For example, the gas supply, gas valves370and375, or any other part of load lock system300amay include a heater to precondition the temperature of gas338before providing gas338into chamber310. In some embodiments, one or more gas vents330and335may be included in load lock chamber310as shown inFIG.3A. In other embodiments, such as load lock system300bshown inFIG.3B, at least one of gas vents (e.g. gas vent330inFIG.3B) may be included in conditioning plate315and provide gas338directly into the space between wafer320and conditioning plate315. For example, in such embodiments, gas vent330may be included in conditioning plate315and located at or near to the center of wafer320. It is appreciated that gas vents may be located at any other places as long as the vents are suitable for providing gas338into the space between wafer320and conditioning plate315in load lock chamber310. It is also appreciated that load lock system300aand300bmay include any number of gas vents. In some embodiments, controller350may be configured to adjust gas vents330or335to change the gas flow rate into load lock chamber310. FIG.3Cshows an exemplary graph showing a wafer temperature change over time during wafer temperature conditioning in a load lock system. As the heat is transferred to the wafer, the temperature of wafer (Twafer) gradually approaches the temperature of wafer stage wafer, (Twafer stage). The conditioning process may be completed when the wafer temperature reaches a stable temperature (Tstable). In some embodiments, Tstablemay be the same as the temperature of wafer stage. In other embodiments, Tstablemay be set to a point approximately 100 mK lower than the wafer stage temperature (Twafer stage−100 mK) to provide efficient throughput improvement. In some embodiments, Tstablemay be a setpoint at approximately 22° C. In other examples, Tstablemay be a setpoint within a range of 20-28° C. In some embodiments, as illustrated inFIG.6C, when Twaferapproaches near to Tstable, a controller (such as controller350inFIG.3A) may adjust a heater (such as heater/cooler360inFIG.3A) such that the conditioning plate temperature may be gradually reduced to prevent an overshoot of the wafer temperature. After wafer320has reached Tstable, the conditioning step is finished, and thereafter the gas flow through gas vents (such as gas vents330and335inFIG.3A) may be stopped. In some embodiments, after stopping the gas flow, the load lock vacuum pump may continue to run until the pressure in the load lock chamber (such as load lock chamber310inFIG.3A) becomes at or near the pressure in the main chamber (such as main chamber390inFIG.3A). Because the pressure inside the load lock chamber may have already been maintained close to a vacuum (e.g. 10-10,000 Pa), the pressure difference between the load lock chamber and the main chamber may be relatively small. In some embodiments, the heater (such as heater/cooler360inFIG.3A) may maintain the temperature of conditioning plate such that the residual radiation from the conditioning plate may help to keep the temperature of wafer during the pump down. When the gas pressure in the load lock chamber reaches at or near the pressure in the main chamber, in some embodiments, the wafer may be transported to the wafer stage (such as wafer stage395inFIG.3A) for inspection. Because the temperature of the wafer may be at or near the temperature of the wafer stage, the inspection can begin with a minimal wait period. In other embodiments, the wafer may be transported to a parking station (such as parking station70ofFIG.1B) and be temporarily stored until the on-going inspection of the previous wafer is completed. Reference is now made toFIG.3D, which shows another exemplary load lock system300d, consistent with embodiments of the present disclosure. In some embodiments, load lock system300dmay include a plurality of supporting structures325and a conditioning plate315configured to transfer heat to wafer320. In some embodiments, conditioning plate315may include a heat transfer element340. In some embodiments, as illustrated inFIG.3D, conditioning plate315may be positioned above wafer320. In such embodiments, wafer320is supported by supporting structures325coupled to a supporting plate319. While it is appreciated that more efficient heat transfer may be achieved as wafer320is positioned closer to conditioning plate315, in some embodiments, it may be desirable to have sufficient distance in between wafer320and conditioning plate315to provide space for a robot arm to lift or transport wafer320. In the configuration shown inFIG.3D, however, because conditioning plate315is positioned above wafer320, conditioning plate315may be placed much closer to wafer320. In some embodiments, the distance may be reduced to approximately 1 mm between wafer320and conditioning plate315. In some embodiments, load lock system300dmay include gas vents330and335to provide gas338to the space between wafer320and conditioning plate315. In some embodiments, at least one gas vent may be included in conditioning plate315to provide gas338to the space. It is appreciated that gas vents330or335may be located at other place of load lock system300das long as those places are suitable for providing gas338into the space between wafer320and conditioning plate315in load lock chamber310. It is also appreciated that load lock system300dmay include any number of gas vents. Reference is now made toFIG.3E, which shows another exemplary load lock system300e, consistent with embodiments of the present disclosure. Load lock system300emay include a plurality of conditioning plates configured to transfer heat to wafer320from multiple directions. For example, load lock system300emay include an upper conditioning plate317configured to transfer heat in a downward direction and a lower conditioning plate318configured to transfer heat in an upward direction. In some embodiments, upper conditioning plate317may include a heat transfer element340. In some embodiment, lower conditioning plate may include a heat transfer element340. Lower conditioning plate318may be coupled to supporting structures325configured to support wafer320. Load lock system300emay include gas vents330and335to provide gas338to a space between wafer320and conditioning plates317and318. In some embodiments, at least one gas vent may be included in upper conditioning plate317. In some embodiments, at least one gas vent may be included in lower conditioning plate318. Reference is now made toFIG.4, which is a schematic diagram of an exemplary pre-aligner in an equipment front end module (EFEM), consistent with embodiments of the present disclosure. In some embodiments, pre-aligner may include one or more supporting structures425configured to support a wafer420and conditioning plate415configured to transfer heat via heated compressed air from one or more air vents440. In some embodiments, conditioning plate415further comprises one or more vacuum channel450configured to remove air. In such embodiments, heat transfer between wafer420and conditioning plate415may be created mainly by convection via temperature conditioned compressed air provided via one or more air vents440. Because wafer conditioning is performed through forced convection of the temperature conditioned compressed air, the heat is transferred to or from wafer420efficiently, and therefore the wafer temperature may stabilize quickly to a stable temperature. Reference is now made toFIG.5, which shows a schematic diagram illustrating an exemplary configuration of a wafer conditioning system500, consistent with embodiments of the present disclosure. In some embodiments, wafer conditioning system500may include a plurality of supporting structures525and a conditioning plate515configured to transfer heat to wafer520. Supporting structures525, coupled to conditioning plate515, may support wafer520and conduct heat to wafer520. It is appreciated that supporting structures525may be in any shape suitable to support and conduct heat. In some embodiments, conditioning plate515may include a heat transfer element540configured to change the temperature of conditioning plate515, which in turn affects the temperature of wafer520. Heat transfer element540may be coupled to a heater560. In some embodiments, heater560may be placed outside of a vacuum chamber510. In other embodiments, heater560may be placed inside of vacuum chamber510. In some embodiments, conditioning plate515may further include an electrostatic clamp570. Electrostatic clamp570may hold wafer520to conditioning plate515via an electric charge. A power source (not shown) provides the electric charge connecting wafer520to electrostatic clamp570. For example, electrostatic clamp570may be part of or comprised in the conditioning plate515. In other examples, electrostatic clamp570may be separate to conditioning plate515. In some embodiments, conditioning plate515may include lifting structures526configured to lift wafer520to accommodate robot arms (not shown) for transporting wafer520. In some embodiments, vacuum chamber510may include a heat transfer element545configured to change the temperature of vacuum chamber510. In such embodiments, heat may be transferred from internal surfaces of vacuum chamber510to wafer520via radiation (as illustrated inFIG.5). Vacuum chamber510may be a load lock chamber20ofFIG.1B, part of parking station70ofFIG.1B, or main chamber10ofFIG.1B. Reference is now made toFIG.6A, which shows a schematic diagram illustrating another exemplary configuration of a wafer conditioning system600, consistent with embodiments of the disclosure. System600may include a vacuum chamber610and one or more supporting structures625configured to support a wafer620. In some embodiments, wafer conditioning system600may include one or more of heating devices configured to transfer heat to wafer620via radiation from multiple directions. For example, as shown inFIG.6A, system600may include upper heating device617and lower heating device618. In some embodiments, heating device617or618may be a conditioning plate, one or more tubes, or one or more coils configured to radiate heat to wafer620. In some embodiments, system600may include a single heating device, which may be positioned above or below wafer620. In some embodiments, system600may include upper heating device617and lower heating device618positioned relative to wafer620. In some embodiments, system600may include three or more heating devices. In some embodiments, system600may include a heater660configured to provide heat to heating device617or618. Heater660, in some embodiments, may be a water heater or any other type of heater that can provide heat to heating devices617or618. In some embodiments, supporting structure625may include a temperature sensor627configured to measure the temperature of wafer620. Temperature sensor627may comprise a thermocouple (TC), an NTC thermistor, a PTC thermistor, resistance thermometer, an infrared thermometer, or any other devices suitable for measuring the temperature of wafer620. For example, as shown inFIG.6B, supporting structure625may include a thermocouple configured to measure a temperature of wafer620. To enable measuring the temperature of wafer, supporting structure625may include a spring-like structure to push the thermocouple to come into contact with wafer620. In some embodiments, the thermocouple and the spring-like structure may be enclosed by supporting structure625. Since system600operates in vacuum chamber610, the heat transfer from wafer to the thermocouple, for measurement of wafer temperature, may be via conduction and radiation. For some embodiments, to measure the temperature of wafer620more accurately, it may be desired to minimize the heat radiation to the thermocouple. Accordingly, the surfaces of the thermocouple, except for the surface contacting wafer620, may be covered by one or more structures made of a material that does not transmit heat, such that the thermocouple may receive heat via conduction from wafer620. In some embodiments, supporting structure625may be made of the material preventing heat transfer. In some embodiments, system600may include multiple thermocouples to collect temperature information from multiple parts of wafer620. In such embodiments, a controller (such as controller650shown inFIG.6E) may determine the temperature distribution characteristics of wafer620. Reference is now made toFIG.6C, which is an exemplary graph illustrating temperature changes during the conditioning process. A wafer conditioning system may include a control mechanism to change the temperature of heating devices on the fly while wafer conditioning is in progress. Furthermore, in some embodiments, the wafer conditioning system may include one or more temperature sensors configured to measure temperatures of various part of the system. In some embodiments, the wafer conditioning system may include one or more temperature sensors configured to measure the temperature of the wafer itself.FIG.6Cillustrates the temperature change over time in an example of such embodiments. In such embodiments, it is possible to start the conditioning process with high temperatures of heating devices (even higher than the desired stable temperature, Tstable), and then bring the temperatures down gradually to the desired stable temperature as Twaferapproaches TstableIn some embodiments, this process may be further optimized by the temperature information from the sensors. As shown inFIG.6C, controlling the temperature in such way may reduce the conditioning time significantly. Reference is now made toFIG.6D, which is a schematic diagram illustrating an exemplary control circuit of a wafer conditioning system, consistent with embodiments of the present disclosure. In some embodiments, a wafer conditioning system, such as system600inFIG.6A, may include a controller and one or more of temperature sensors configured to measure various parts of the system. In some embodiments, the wafer conditioning system may include one or more temperature sensors configured to measure the temperature of wafer. For example, controller650may receive temperature data about the temperature of incoming wafer from a temperature sensor696in an equipment front end module (such as EFEM30ofFIG.1A). Controller650may receive wafer temperature data about the temperature of wafer from temperature sensor627. Controller650may receive heater temperature data about the temperature of the output of heater660(e.g. water at the output of a water heater) from temperature sensor665. In some embodiments, controller650may control heater660based on the at least one of the temperature data from sensors696,627, and665. For example, heater660may comprise an electric water heater configured to transfer heat to water. With the temperature feedback, controller650may adjust the electric current supplied to heater660, thereby resulting in the change of the temperature of heat transfer elements (e.g. heating devices617or618inFIG.6A). In some embodiments, controller650may be calibrated based on the types or conditions of wafer. Even if the control mechanism is described in context of system600ofFIG.6Ato explain the functionality, it is appreciated that the same control mechanism may be applied to any of the embodiments of wafer conditioning system shown in this disclosure. Reference is now made toFIG.7, which is a flow chart illustrating an exemplary method for conditioning a wafer temperature, consistent with embodiments of the present disclosure. The method may be performed by a load lock system (e.g., load lock systems300a,300b,300d, and300eofFIGS.3A-3D) of an e-beam system (e.g., charged particle beam inspection system100ofFIG.1A). In step710, a wafer is loaded by a robot arm into a load lock chamber relative to a conditioning plate. In some embodiments, the wafer may be placed above the conditioning plate. In other embodiments, the wafer may be placed below the conditioning plate. In some embodiments, the wafer may be placed between two conditioning plates. In step720, after the wafer is loaded into a load lock chamber (e.g., load lock chamber20inFIG.1A), a controller (e.g, controller50ofFIG.1A) enables a vacuum pump to remove air from the load lock chamber. In step730, the temperature of wafer stage (e.g. wafer stage395ofFIG.3A) is determined and provided to the controller. In step740, a gas supply (e.g. gas supply inFIG.3A) provides a gas to the load lock chamber for heat transfer between the conditioning plate and the wafer. The gas may be temperature conditioned to match the measured temperature of wafer stage to provide more efficient heat transfer. In step750, the controller receives the wafer stage temperature data and adjusts the heating temperature based on the determined temperature of the wafer stage. In step760, after the wafer conditioning is completed, the wafer conditioning system transfers the conditioned wafer from the load lock chamber to a main chamber (e.g. main chamber390inFIG.3A) or a parking station (e.g. parking station70inFIG.3B). In some embodiments, if a temperature sensor is present to measure the temperature of wafer, the controller may monitor the wafer temperature and determine whether the wafer conditioning is completed. It is appreciated that a controller of the wafer conditioning system could use software to control the functionality described above. For example, the controller may send instructions to the aforementioned heater to change the temperature of heat transfer elements. The controller may also send instructions to adjust input voltage or current to the heater. The software may be stored on a non-transitory computer readable medium. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with patterns of holes, a RAM, a PROM, and EPROM, cloud storage, a FLASH-EPROM or any other flash memory, NVRAM, a cache, a register, any other memory chip or cartridge, and networked versions of the same. Reference is now made toFIGS.8A and8B, which show schematic diagrams illustrating an exemplary charged particle beam inspection system800with a vacuum pump system, consistent with embodiments of the present disclosure. In some embodiments, charged particle beam inspection system800may include a main chamber890and a load lock chamber810. In some embodiments, system800may include a gas supply811, gas vent valve812, and gas vent diffuser813that is connected to load lock chamber810. Gas supply811may provide a gas (e.g., gas338inFIG.3A) into load lock chamber810during wafer conditioning process to increase thermal conductivity between a wafer (e.g., wafer320ofFIG.3A) and a conditioning plate (e.g., conditioning plate315ofFIG.3A). The gas may be nitrogen, helium, hydrogen, argon, CO2, or compressed dry air. It is appreciated that the gas may be any other gas suitable for heat transfer. In some embodiments, the vacuuming of load lock chamber810may be performed over two stages via two separate paths. This first path is called a roughing path and may comprise a load lock roughing line816and a load lock roughing valve853. During the roughing stage, load lock chamber810is pumped down from the atmospheric condition to a “rough” vacuum level (e.g., 5×10−1Torr). In the first stage, load lock roughing valve853is opened to initially pump down load lock chamber810via load lock roughing line816while the other path is closed. The second path is called a turbo pumping path and may comprise a load lock turbo valve814, a load lock turbo pump815, a load lock turbo pumping line817, and a load lock turbo pump backing valve851. After the roughing of load lock chamber810is completed, load lock turbo pump815takes over to pump out load lock chamber810to a deeper vacuum level (e.g., lower than 1.5×10−6Torr). In this second stage, load lock roughing valve853is first closed. Then load lock turbo valve814and load lock turbo pump backing valve851are opened, so that load lock turbo pump815pumps down load lock chamber810. Main chamber890may be vacuumed in a similar way. First, main chamber890is pumped down from the atmospheric condition to a “rough” vacuum level (e.g., 5×10−1Torr) via a main chamber roughing path (comprising a main chamber roughing line896and a main chamber roughing valve854). After roughing stage is completed, a main chamber turbo pump895takes over to pump further down to a deeper vacuum level (e.g., lower than 1.5×10−6Torr) via a main chamber turbo pumping path (comprising a main chamber turbo valve894, a main chamber turbo pump895, a main chamber turbo pumping line897, and a main chamber turbo pump backing valve852). In some embodiments, main chamber turbo pump895may continue to run until the wafer inspection is completed. WhileFIG.8Ashows system800having one roughing path and one turbo pumping path for load lock chamber810, it is appreciated that the system may utilize any number of roughing paths and turbo pumping paths to vacuum load lock chamber810. For example, system800may have two or more roughing paths parallelly connected to load lock chamber810. Independent from the number of roughing paths, system800may have two or more turbo pumps parallelly connected to load lock chamber810. Similarly, it is appreciated that the system may utilize any number of roughing path and turbo pumping path to pump down main chamber890. In some embodiments, system800may include a central manifold box850in which all roughing lines (e.g., load lock roughing line816and main chamber roughing line896) and all pumping lines (e.g., load lock turbo pumping line817and main chamber turbo pumping line897) are merged. Central manifold box850may house a number of valves to control the vacuuming process. For example, central manifold box850may include load lock roughing valve853, main chamber roughing valve854, load lock turbo pump backing valve851, and main chamber turbo pump backing valve852. After these individual valves, all lines are merged to a foreline858. The final exhaustion through a dry vacuum pump860is controlled by a foreline valve859that may be located before dry vacuum pump860. As described in the previous sections with respect toFIG.3A, in some embodiments, during the wafer temperature conditioning process, load lock chamber810may be continuously pumped down via roughing line816or turbo pump815to continuously remove some of the gas molecules (e.g., gas338ofFIG.3A) and maintain the vacuum level of load lock chamber810until the wafer conditioning is completed. As illustrated inFIG.8B, in some embodiments, this continuous pumping down of load lock chamber810may introduce a temporary pressure jump in the shared foreline (e.g., foreline858), thereby causing the inspection process in main chamber890to be interrupted. For example, as explained in the previous sections, the wafer temperature conditioning process may be performed in load lock chamber810at the same time a previous wafer is being inspected in main chamber890. When load lock roughing valve853is opened to begin the continuous pumping down process, however, the pressure within foreline858may increase because the high-pressure condition in load lock chamber810is exposed to foreline858due to the open connection established through load lock roughing line816. The increased pressure in foreline858may create higher back pressure to main chamber turbo pump895. Because main chamber turbo pump895, in some embodiments, may be concurrently running to maintain low pressure level in main chamber during the inspection of the previous wafer when the wafer temperature conditioning is performed in load lock chamber810, the sudden increase of back pressure may influence the dynamic behavior of turbo pump895. As a result, a sudden vibration on system800may occur. This sudden vibration may cause an inspection error. Therefore, if the vibration level is higher than a margin for the inspection error, the inspection process may need to be paused until the back pressure disappears and the vibration is damped. This interruption of the inspection process may hurt the system throughput. The increased back pressure may also cause the effective pumping speed of turbo pump895decreased, thereby increasing the pressure in main chamber890temporarily. This temporary increase of main chamber pressure may also impact the system throughput and the overall system performance. The effects are explained in more details in the next section with respect toFIG.9. Reference is now made toFIG.9, which an exemplary graph illustrating a pressure change in a main chamber (e.g., main chamber890ofFIGS.8A and8B) of a charged particle beam inspection system (e.g., charged particle beam inspection system800ofFIGS.8A and8B). As explained above with respect toFIG.8A, the main chamber is pumped down over two stages, which are roughing stage911and turbo pumping down stage912. During roughing stage911, the main chamber is pumped down from the atmospheric condition to a “rough” vacuum level910(e.g., 5×10−1Torr) via the roughing path. After the main chamber pressure reaches “rough” vacuum level910, a roughing valve (e.g., main chamber roughing valve854ofFIG.8A) is closed and a main chamber turbo pump (e.g., main chamber turbo pump895) takes over to bring the main chamber pressure further down to a deeper vacuum level. When the main chamber pressure becomes lower than an “inspection ready” vacuum level920(e.g., 1.5×10−6Torr), the wafer inspection process may begin. In some embodiments, main chamber turbo pump895may continue to run to maintain main chamber pressure level close to “inspection ready” level920. When the inspection of a first wafer is completed, in some embodiments, the wafer exchange may occur in a period923. During wafer exchange, the main chamber pressure may increase temporarily because the gate valve (e.g., gate valve26ofFIG.1B) between a load lock chamber (e.g., load lock chamber810ofFIG.8A) and the main chamber (e.g., main chamber890ofFIG.8A) is opened. After the wafer exchange, the inspection process may begin again once the main chamber turbo pump brings the main chamber pressure back down to “inspection ready” vacuum level920. Before the wafer exchange, while the first wafer is being inspected in the main chamber, the second wafer may go through the wafer temperature conditioning process, and as explained above, the main chamber pressure may temporarily increase due to the back pressures applied to the main chamber turbo pump. An example of the temporary pressure jump950is illustrated in the graph. If the temporary pressure jump950is still below “inspection ready” vacuum level920, the inspection of the first wafer may continue without an interruption as long as the vibration level stays within the margin of error. However, if the main chamber pressure increases higher than “inspection ready” vacuum level920during the temporary jump950, the inspection of the first wafer may need to be paused until the main chamber pressure comes back down to “inspection ready” level. As a result, the system throughput may be impacted by this interruption. Reference is now made toFIG.10, which shows a schematic diagram illustrating an exemplary charged particle beam inspection system1000with an improved vacuum pump system, consistent with embodiments of the present disclosure. In some embodiments, a separate pumping path may be added to a load lock chamber810to prevent the vibration and the pressure jump in a main chamber890. For example, in some embodiments, charged particle beam inspection system1000may include a load lock booster roughing valve1010, a load lock booster roughing pump1011, and an auxiliary exhaust system1012. All other part of system1000are the same as system800ofFIG.8A. In such embodiments, during the wafer temperature conditioning, load lock booster roughing pump1011may continuously run to remove the gas molecules (e.g., gas338ofFIG.3A). However, because load lock roughing valve853and load lock turbo pump backing valve851remain closed during this period, there is no pressure increase in foreline858, hence no back pressure may be incurred on main chamber turbo pump895. Accordingly, in some embodiments, pumping down process for load lock chamber810may be broken down to three stages. First, load lock booster roughing pump1011may operate from the atmospheric condition (after receiving a new set of wafers from EFEM (e.g., EFEM30ofFIG.1A) to a vacuum level for wafer temperature conditioning. Second, the regular load lock roughing path (via load lock roughing line816) may operate from the wafer temperature conditioning vacuum level to the “rough” vacuum level. Finally, load lock turbo pump815may operate from the “rough” vacuum level to the deeper vacuum level. The back pressure problem is the highest when foreline858is exposed to the viscous regime in the beginning of pumping near the atmospheric condition. As a result, after the load lock chamber pressure level is brought down to a wafer temperature conditioning vacuum level by the separate booster pump (e.g., load lock booster roughing pump1011), the regular pumping mechanisms (e.g., load lock roughing line816or load lock turbo pump815) can be used without creating too much back pressure. Reference is now made toFIG.11, which is a flow chart illustrating an exemplary method for controlling vacuum level of a load lock chamber of the charged particle beam inspection system ofFIG.10, consistent with embodiments of the present disclosure. The method may be performed by the charged particle beam inspection system ofFIG.10. In step1110, a wafer (or a plurality of wafers) is loaded by a robot arm (e.g., robot arm11ofFIG.1B) into a load lock chamber (e.g., load lock chamber810ofFIG.10). In step1111, a gas supply (e.g. gas supply811ofFIG.10) starts providing a gas (e.g., gas338ofFIG.3A) to the load lock chamber for the wafer temperature conditioning. In step1112, all gates (e.g., gate valve25and26ofFIG.1B) are closed in preparation of the vacuuming process. In some embodiments, step1111may occur after all gates are closed in step1112. In step1113, a booster pump valve (e.g., load lock booster roughing valve1010) is opened and a booster pump (e.g., load lock booster roughing pump1011) starts pumping down the load lock chamber. As explained above with respect toFIG.10, in this first stage, the load lock chamber is pumped down from the atmospheric condition to a vacuum level suitable for wafer temperature conditioning. Because the booster pumping line is connected to a separate exhaust system (e.g., auxiliary exhaust system1012ofFIG.10) and not merged with the regular roughing paths to form a shared foreline (e.g., foreline858ofFIG.10) in a manifold box (e.g., central manifold box850ofFIG.10), the booster pumping does not cause back pressure in the foreline. Therefore there may be no impact on the system throughput. In step1114, the wafer conditioning flow starts. This step may include adjusting the heating temperature of a conditioning plate (e.g., conditioning plate315ofFIG.3A) based on the determined temperature of the wafer stage (e.g., wafer stage395ofFIG.3A) in a main chamber (e.g., main chamber890ofFIG.10). While wafer temperature conditioning is performed, the booster pump continues to run to maintain the vacuum level suitable for wafer temperature conditioning. In step1115, when the wafer temperature reaches a stable temperature (e.g., TstableinFIG.3C), the conditioning process is completed. In step1116, after the wafer temperature conditioning is completed, a gas vent valve (e.g., gas vent valve812ofFIG.10) is closed and the gas supply is stopped. In step1117, the first stage of pumping down process is completed and the booster valve (e.g., load lock booster roughing valve1010) is closed. In step1118, the second stage of pumping down process begins by opening a load lock roughing valve (e.g., load lock roughing valve853ofFIG.10). During this second stage, the load lock chamber in some embodiments may be pumped down from the wafer conditioning vacuum level to a “rough” vacuum level (e.g., 5×10−1 Torr). After reaching the “rough” vacuum level, in step1119, the load lock roughing valve is closed. In step1120, the third stage of pumping down process begins and a turbo pump (e.g., load lock turbo pump815) takes over to pump out load lock chamber810to a deeper vacuum level close to the main chamber pressure. In step1121, after the wafer inspection for the previous wafer is completed, the previous wafer is removed from the main chamber and the temperature conditioned wafer is transferred from the load lock chamber to the main chamber. In step1122, when the wafer exchange is completed, the load lock turbo pump valve is closed. After step1122, step1110can be performed to load a new set of wafers to the load lock chamber. If an unconditioned and uninspected wafer is still present in the load lock chamber, the system may proceed to step1111to condition another wafer in preparation of the inspection process. It is appreciated that a controller of the wafer conditioning system could use software to control the functionality described above. For example, the controller may send instructions to the aforementioned valves and pumps to control the pumping down paths. The software may be stored on a non-transitory computer readable medium. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with patterns of holes, a RAM, a PROM, and EPROM, cloud storage, a FLASH-EPROM or any other flash memory, NVRAM, a cache, a register, any other memory chip or cartridge, and networked versions of the same. The embodiments may further be described using the following clauses: 1. A load lock system, comprising: a plurality of supporting structures configured to support a wafer; a first conditioning plate including a first heat transfer element configured to adjust a temperature of the wafer; a first gas vent configured to provide a gas between the first conditioning plate and the wafer; and a controller including a processor and a memory, the controller configured to assist with control of the first heat transfer element. 2. The load lock system of clause 1, wherein the first conditioning plate is positioned above the wafer. 3. The load lock system of clause 1, wherein the first conditioning plate is positioned below the wafer. 4. The load lock system of clause 3, wherein the plurality of supporting structures are coupled to the first conditioning plate. 5. The load lock system of any one of clauses 1-4, wherein the first gas vent is attached to the first conditioning plate. 6. The load lock system of any one of clauses 1-5, wherein the controller is further configured to assist with the control of the first heat transfer element based on a temperature of a wafer stage. 7. The load lock system of any one of clauses 1-6, wherein the controller is further configured to control a rate of gas flow through the first gas vent. 8. The load lock system of any one of clause 1-7, further comprising a second conditioning plate including a second heat transfer element configured to adjust the temperature of the wafer. 9. The load lock system of clause 8, wherein the plurality of supporting structures configured to support a wafer are positioned between the first conditioning plate and the second conditioning plate. 10. The load lock system of clause 9, further comprising a second gas vent configured to provide a portion of the gas between the second conditioning plate and the wafer. 11. The load lock system of clause 10, wherein the second gas vent is coupled to the second conditioning plate. 12. The load lock system of any one of clauses 8-11, wherein the controller is further configured to assist with controlling the second heat transfer element based on a temperature of the wafer stage. 13. The load lock system of any one of clauses 10-12, wherein the controller is further configured to control a rate of gas flow through the second gas vent. 14. The load lock system of any one of clauses 1-13, wherein the gas comprises nitrogen, helium, hydrogen, argon, CO2, or compressed air. 15. The load lock system of any one of clauses 1-14, further comprising a load lock chamber configured to enclose the first conditioning plate, the plurality of supporting structures, and the wafer. 16. The load lock system of clause 15, further comprising a first vacuum pump connected to the load lock chamber. 17. The load lock system of clause 16, wherein the controller is further configured to control the first vacuum pump to pump out the gas during a wafer conditioning process. 18. The load lock system of clause 17, wherein the controller is further configured to maintain a pressure inside of the load lock chamber in a range of 50 to 5,000 Pa during the wafer conditioning process. 19. The load lock system of any one of clauses 16-18, further comprising a second vacuum pump connected to the load lock chamber. 20. The load lock system of clause 19, wherein the controller is further configured to: enable the first vacuum pump to reduce pressure inside of the load lock chamber to a first pressure level, and enable the second vacuum pump to reduce pressure inside of the load lock chamber to a second pressure level, wherein the second pressure level is lower than the first pressure level. 21. The load lock system of clauses 20, wherein the second vacuum pump shares an exhaust path with a third vacuum pump connected to a main chamber. 22. The load lock system of any one of clauses 20 and 21, wherein the second vacuum pump is disabled while the first vacuum pump is enabled. 23. The load lock system of any one of clauses 20-22, wherein the first vacuum pump and the third vacuum pump are concurrently enabled. 24. A method of conducting a thermal conditioning of a wafer in a load lock system, comprising: loading a wafer to a load lock chamber of a load lock system; pumping down the load lock chamber; providing a gas to the load lock chamber; and enabling a first heat transfer element in a first conditioning plate to adjust a temperature of the first conditioning plate for transferring heat through the gas to the wafer. 25. The method of clause 24, wherein providing a gas to the load lock chamber further comprises conditioning a temperature of the gas before providing the gas to the load lock chamber. 26. The method of any one of clauses 24 and 25, wherein providing a gas to the load lock chamber further comprises providing the gas to a space between the first conditioning plate and the wafer. 27. The method of any one of clauses 24-26, further comprising determining a temperature of a wafer stage in a main chamber. 28. The method of any one of clauses 24-27, wherein enabling the first heat transfer element to adjust the temperature of the first conditioning plate further comprises adjusting the first heat transfer element based on the determined temperature of the wafer stage. 29. The method of any one of clauses 24-28, further comprising enabling a second heat transfer element in a second conditioning plate to adjust a temperature of the second conditioning plate for transferring heat through the gas to the wafer. 30. The method of any one of clauses 24-29, wherein the gas comprises nitrogen, helium, hydrogen, argon, CO2, or compressed air. 31. The method of any one of clauses 24-30, wherein pumping down the load lock chamber comprises pumping the gas out of the load lock chamber using a first vacuum pump connected to the load lock chamber. 32. The method of clause 31, wherein pumping down the load lock chamber further comprises: enabling the first vacuum pump to reduce pressure inside of the load lock chamber to a first pressure level; and enabling a second vacuum pump connected to the load lock chamber to reduce pressure inside of the load lock chamber to a second pressure level, wherein the second pressure level is lower than the first pressure level. 33. The method of clauses 32, wherein the second vacuum pump shares an exhaust path with a third vacuum pump connected to the main chamber. 34. The method of any one of clauses 32 and 33, wherein the second vacuum pump is disabled while the first vacuum pump is enabled. 35. The method of any one of clauses 32-34, wherein the first vacuum pump and the third vacuum pump are concurrently enabled. 36. A non-transitory computer readable medium including a set of instructions that is executable by one or more processors of a controller to cause the controller to perform a method conducting a thermal conditioning of a wafer, the method comprising: instructing a first vacuum pump to pump down a load lock chamber of a load lock system after a wafer is loaded into the load lock chamber; instructing a gas supply to provide a gas to the load lock chamber; and instructing a first heat transfer element in a first conditioning plate to adjust a temperature of the first conditioning plate for transferring heat through the gas to the wafer. 37. The computer readable medium of clause 36, wherein the set of instructions that is executable by the one or more processors of the controller to cause the controller to further perform: instructing a temperature sensor to determine a temperature of a wafer stage in a main chamber. 38. The computer readable medium of clause 37, wherein instructing the first heat transfer element in the first conditioning plate further comprises adjusting the first heat transfer element based on the determined temperature of the wafer stage. 39. The computer readable medium of any clauses 36-38, wherein the set of instructions that is executable by the one or more processors of the controller to cause the controller to further perform: instructing a second heat transfer element in a second conditioning plate to adjust a temperature of the second conditioning plate for transferring heat through the gas to the wafer. 40. The computer readable medium of clause 39, wherein instructing the second heat transfer element in the second conditioning plate further comprises adjusting the second heat transfer element based on the determined temperature of the wafer stage. 41. The computer readable medium of any clauses 36-40, wherein the set of instructions that is executable by the one or more processors of the controller to cause the controller to further perform: instructing the first vacuum pump to pump down the load lock chamber to a first pressure level; and instructing a second vacuum pump to pump down the load lock chamber to a second pressure level, wherein the second pressure level is lower than the first pressure level. 42. A method of pumping down a load lock chamber, the method comprising: pumping a gas out of the load lock chamber with a first vacuum pump configured to exhaust the gas to a first exhaust system; and pumping the gas out of the load lock chamber with a second vacuum pump configured to exhaust the gas to a second exhaust system. 43. The method of clause 42, further comprising: enabling the first vacuum pump to reduce pressure inside of the load lock chamber to a first pressure level; and enabling the second vacuum pump to reduce pressure inside of the load lock chamber to a second pressure level, wherein the second pressure level is lower than the first pressure level. 44. The method of clause 43, wherein the second vacuum pump shares the second exhaust system with a third vacuum pump configured to pump down a main chamber. 45. The method of any one of clauses 42-44, wherein the second vacuum pump is disabled while the first vacuum pump is enabled. 46. The method of any one of clauses 44-45, wherein the first vacuum pump and the third vacuum pump are concurrently enabled. Although the disclosed embodiments have been explained in relation to its preferred embodiments, it is to be understood that other modifications and variation can be made without departing the spirit and scope of the subject matter as hereafter claimed. | 66,334 |
11942341 | DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE INVENTION For consistency and clarity, like reference numerals will be retained for like components throughout the following description. FIG.7schematically shows an electroplating tool500with an input/output module510, a loader/unloader module530, workpiece holder storage module580, process modules501-505, close patterning shield storage module590, transporter support area570, maintenance support area506, electrical and chemical systems area507, and a workpiece holder cleaning module508. Tool500is a single-ended tool with unprocessed substrates introduced into the tool and processed substrates removed from the tool in the same input/output front-end module510. AlthoughFIG.7shows five process modules, tool500may have any number of process modules depending on the exact process to be performed, such as the number of different metals to be electroplated, the number of pre- and post-plating processes required and the number of duplicate modules used in parallel to increase tool throughput. Workpiece holder storage module580is used to store workpiece holders125when they are not in use. A local transporter (not shown) transfers workpiece holders125from storage area580to loader/unloader530to bring them into service. Transporter support area570provides mechanical, electrical and fluid support to two or more transporters571(seeFIG.17) which overhang loader/unloader530, process modules501-505and CPS storage area590. Electrical and chemical systems area507house power distribution systems and fluid handling systems for all other modules. Maintenance support area506allows support personnel access to equipment in the electrical and chemical systems area507and to all electrical and fluid connections in the process modules501-505. Workpiece holder cleaning module508comprises equipment for cleaning the workpiece holders125when they are not being used for processing workpieces. The processing flow for an unprocessed workpiece in tool500begins with its transfer, by a robot, from the input/output module510to the loader/unloader module530where the workpiece W is loaded into a workpiece holder125. The loaded workpiece holder is then transported using a transportation mechanism to a series of preprocessing modules501-502for wet processing steps such as pre-cleaning, pre-rinsing, and chemical activation. The loaded workpiece holder125is then transported to either of process modules503or504for electroplating. After electroplating, the loaded workpiece holder125is transported to process module505for further processing steps such as final rinsing and drying. Following final rinsing and drying, the loaded workpiece holder125is transported to the loader/unloader module530where the workpiece W is unloaded from the workpiece holder125. The processed workpiece W is then transferred to the input/output module510for storage until all the workpieces in the current batch have been processed. FIG.8schematically shows the input/output module510, loader module530and workpiece holder storage module580. Input/output module510comprises at least two front opening unified pods (FOUPs)511for storing workpieces, including unprocessed workpieces, such as unprocessed workpieces W and W′, and processed workpieces Wp and Wp′, with three FOUPs being shown inFIG.8. The input/output module510also includes a robot512configured to run along a robotic rail track515, the robot512including an end effector514which may rotate about a vertical axis between two rotational orientations, wherein in the first rotational orientation, shown inFIG.8, the end effector514points to the right, and in the second rotational orientation the end effector514points to the left. The loader module530comprises a loader535including a positioning mechanism comprising a positioning stage540and a pivot rotate opener or ‘PRO’550, described in more detail below. The workpiece holder storage module580comprises a carousel583adapted for the temporary storage of a plurality of workpiece holders125in an array therein, and a local transporter586having a pick-up arm582capable of loading workpiece holders125from a manual ejector area585. The local transporter586is arranged to transport empty workpiece holders125from the carousel583to a position where the transporter571can transport the workpiece holders125to loader/unloader module530for insertion into the PRO550. The robot512is arranged to transfer a single unprocessed workpiece W from the FOUP511to the transfer stage560(seeFIG.9) provided generally below the positioning stage540, using the end effector514to grab the unprocessed workpiece W from the FOUP511while in the second rotational orientation and aligned with the intended FOUP511through lateral movement along the robotic rail track515, rotating to the first rotational orientation and aligning with the transfer stage560through lateral movement along the robotic rail track515and then depositing it to the transfer stage560. Similarly, the robot512is arranged to return a processed workpiece Wp from the transfer stage560to the FOUP511after processing, by performing similar operations in reverse. The end effector514may for example comprise a lightweight, stiff material such as carbon-fiber composite. As shown, the end effector514may comprise mechanical features for gripping the edges of workpiece W. Alternatively, the end effector514may comprise other means, such as vacuum cups or Bernoulli gas jets for example, to grip the backside of workpiece W, and hold it flat for subsequent loading operations. Robot512may alternatively comprise two end effectors514to maximize system throughput when replacing an unprocessed workpiece with a processed workpiece via a so-called ‘give-and-get’ maneuver, and may be connected to multiple linkages513to allow sufficient reach to place workpiece W onto transfer stage560. FIG.9schematically shows a perspective view of the workpiece loader535comprising PRO550, positioning stage540and workpiece transfer stage560, all mounted on support frame539. PRO550is disposed in a horizontal position, rotated by pivot arm552about axis551as actuated by motor drive553. The upper end of the PRO550has two slots554and554′ formed therein, the slots554and554′ having edge guides555, the slots554and554′ configured to accept respective workpiece holders125(not shown inFIG.9). With PRO550in this horizontal position, a workpiece holder125may be inserted into slots554and554′ from above by transporter571. The workpiece transfer stage560comprises an upper transfer arm561and a lower transfer arm562. Upper transfer arm561is shown carrying an unprocessed workpiece W prior to alignment in the positioning stage540. Transfer stage560is shown in a lowered position, used for handoff of workpieces between the input/output module510and loader/unloader module530via upper transfer arm561. FIG.10schematically shows a perspective view of the workpiece loader535in a second configuration with the PRO550disposed in a vertical position, i.e. having been rotated by 90° about axis551compared to the position shown inFIG.9. Transfer stage560is shown slightly elevated compared toFIG.9in a position used for handoff of workpieces between the input/output module510and loader/unloader module530via lower transfer arm562. The workpiece holder125in slot554(not visible inFIG.10), which is arranged below slot554′ in this position, is now accessible for replacement of processed workpieces by unprocessed workpieces using transfer arms561and562. During transfer of processed workpieces from slot554to input/output stage510by linkages513, the PRO550is rotated by 180° into an inverse vertical position (not shown in the figures) making the other slot554′ accessible for replacement of processed workpieces with unprocessed workpieces. This sequence of steps is described in more detail below. FIG.11schematically shows, from above, the workpiece loader535with PRO550in a first, horizontal configuration. PRO550is shown with a workpiece holder125inserted into the slot554, which as shown is located to the right of slot554′ in this position. The workpiece holder125has pickup features556which mate with corresponding pickup features (not shown) in transporter571to allow the workpiece holder125(when loaded with workpiece W) to be lifted from slot554and transported to any of the modules501-505as required.FIG.11also shows the robot512with a workpiece W held by the end effector514being placed onto transfer arm561under positioning stage540. Following placement into the positioning stage540by transfer arm561, the workpiece W can be accurately positioned with respect to the positioning frame541by suitable actuation of the positioning actuators546attached to the positioning frame541. FIG.12schematically shows, from the side, the workpiece loader535with PRO550in its second configuration, i.e. in a vertical orientation, with a workpiece holder125inserted into a slot554. An elongated actuation member567is attached to the PRO550and contains a bladder opener566to effect opening of contact seal strips121,122(seeFIG.5) while a workpiece holder125is inserted into the slot554. A suitable actuation member567and bladder opener566is described in detail in U.S. Pat. No. 10,283,396 assigned to the present applicant and incorporated by reference. PRO550requires one bladder opener for each contact seal strip. Workpiece holders125adapted for holding one workpiece comprise two contact seal strips, and require two openers566, whereas workpiece holders125which are adapted for holding two workpieces comprise four contact seal strips, and therefore require four openers566. Each bladder opener566is inflatable to allow both unloading of a processed workpiece Wp by the lower transfer arm562and loading of an unprocessed workpiece W by the upper transfer arm561. As shown, the transfer stage560comprises the upper transfer arm561, shown supporting a workpiece W thereon, the lower transfer arm562, a vertical drive564and a horizontal drive565. The vertical and horizontal drives564and565are both motorized, and are respectively operative to position the transfer arms561and562vertically and horizontally with respect to the positioning stage540and workpiece holder125. Each of the upper transfer arm561and lower transfer arm562may act to “chuck” a workpiece thereon, i.e. to provide a stable and flat support for the workpiece. Such chucking may be switchable, for example, if vacuum chucking is used, a vacuum supply (not shown) may be switchably connected to each transfer arm561,562along with connections (not shown) to a positive pressure source for optionally floating workpieces on inert gas or compressed dry air during positioning. FIG.13schematically shows, from above, upper transfer arm561for use within transfer stage560for loading workpiece W into holder125within PRO550. Transfer arms561and562have similar features for gripping a workpiece as the end effector514, i.e. upper and lower transfer arms561and562may comprise mechanical features for gripping the edges of workpiece W, or alternatively they may comprise vacuum or suction cups or Bernoulli gas jets to grip the backside of workpiece W, and hold it flat for subsequent loading operations, in particular for loading a workpiece W into a workpiece holder125. In the particular embodiment shown inFIG.13, the upper transfer arm561may comprise a frame563, suction cups564and vacuum fittings565. Frame563may for example be fabricated from aluminum, carbon composite or other rigid light-weight material, and as shown comprises first and second parallel outer arms569, and an inner arm568arranged parallel thereto, which is shorter in length than the first and second outer arms569. Suction cups564may have multiple folds and sufficient compliance to allowing vacuum chucking of a workpiece W even with significant bow. The upper transfer arm561may also contain separate switchable vacuum connections (not shown) maintaining vacuum on outer arms569while having either no pressure or slight positive pressure on inner arm568. FIG.14schematically shows, in sectional side view, the upper transfer arm561, comprising frame563, suction cups564and vacuum fitting565, with a workpiece W located thereon. The vacuum fitting565may be switchably connected to a vacuum supply (not shown) in order to vacuum chuck workpiece W via suction cups564. The fitting565may also be switchably connected to a positive pressure gas supply (not shown) to allow workpiece W to float on a gas cushion during positioning. A cavity589is provided within the frame563which provides fluid communication between the vacuum fitting565and the suction cups564. FIGS.15and16schematically show, from above and below respectively, the positioning stage540in perspective view, including its positioning frame541with a workpiece W located therein, while supported by the upper transfer arm561(not shown). The positioning stage540is supported by a support545. A sensor cross bar544extends across the positioning frame541and carries a plurality of ultrasonic positioning sensors543. A charge-coupled device (CCD) positioning camera542is also provided on the positioning frame541. The CCD positioning camera542is operative to control actuation of the positioning actuators546based on observation of fiducial markings (not shown) provided on workpiece W and thus adjust positioning of the workpiece W within the positioning frame541. The ultrasonic positioning sensors543are preferably capable of resolving the distance between the respective sensor543and the workpiece W with a resolution of at least 0.3 mm. The plurality of ultrasonic sensors543attached to positioning frame541may be used to ensure that the workpiece W is both flat and well held by the upper transfer arm561prior to its loading into the PRO550(seeFIG.12for example). As shown, two ultrasonic sensors543are supported by the sensor cross bar544, and these may be used to measure the extent of any bowing of the workpiece W. This information may be used to determine the proper position of the CPS shield200with respect to the surface of the (potentially bowed) workpiece W in the ECD module503. Workpiece bow may be measured while workpiece chucking by transfer arm561is turned off. Workpiece bow may be measured in a state similar to that in holder125by, for example, only chucking workpiece W using suction cups564on outer arms569(seeFIG.13) while maintaining zero or slight positive pressure on suction cups564of center arm568. Various commercially available ultrasonic sensors may be suitable for use as the sensors543, including, by way of example only, the ‘UNDK’ series of ultrasonic distance measuring sensors available from Baumer Ltd. of Southington, CT The CCD positioning camera542is capable of locating fiducial markings and panel edge position with a resolution of 50 um or better. CCD cameras with the necessary resolution include, by way of example only, the ‘FLIR’ high performance cameras available from Edmunds Optics of Barrington, NJ The positioning actuators546are preferably linear stepper motors with positioning accuracy of 50 um or better, such as, by way of example only, the high performance ‘G series’ of actuators available from Hayden Kerk/Ametek of Waterbury CT. FIG.17schematically shows, from the side, the transporter571for transporting workpiece holders125one at a time from the loader/unloader module530to process modules501-505, and for transporting shield holders320from the shield holder storage module590to process modules501-505. The transporter571comprises a wheeled buggy575, a transporter vertical positioner573and an enclosed transporter572. The wheeled buggy575rides on a transporter rail574, which extends the length of transporter support area570, and is driven along the transporter rail574by a motor assembly579. The transporter rail574may support several transporters571, to allow transport of several workpiece holders125at a time to increase throughput, or to allow shield holders320in ECD module503to be changed while simultaneously processing workpieces in process modules501,502,504and/or505. The transporter vertical positioner573comprises a coiled belt spool577driven by a vertical spooling motor576. The enclosed transporter572comprises a drop-block578connected to coiled belt spool577by a metal lifting belt581. The drop-block578comprises a lifting clamp588which grips pick-up features556of workpiece holder125when actuated. FIG.18schematically shows the transporter571viewed from the front. A connector spool583attaches the transporter vertical positioner573to the enclosed transporter572and provides a conduit for electrical cables as well as gas lines, for example to purge the enclosed transporter572with nitrogen gas during transport. The enclosed transporter572comprises guide features585to guide the drop-block578during drop-off and pick-up operations, and a lower cover583, which may be activated to close during transport and to open during drop-off and pick-up. The enclosed transporter572may comprise an RFID reader584to identify workpiece holders125(which typically comprise an RFID tag) and/or shield holders320containing RFID tags when removing them from processing modules501-505and CPS storage area590. FIG.19schematically shows, from the front, the enclosed transporter572. The lifting clamp588of drop-block578grips lifting features556of the shield holder320for transport from the shield holder storage module590to ECD module503. FIG.20schematically shows, from above, the shield storage module590for storing a plurality of shield holders320, each retaining a respective CPS200, when not in use in process modules501-505. The shield storage module590comprises a plurality of storage bays594with features (not shown) to physically support and locate a respective shield holder320. Shield storage module590also comprises an ejector platform593for manually loading and unloading shield holders320into the shield storage module590, an overhead transporter597supported on transport rails596to transport shield holders320from the ejector platform593to target storage bays594. The shield storage module590also comprises a transporter hand-off platform591which interfaces with the overhead transporter597for transporting shield holders320to and from process modules501-505. During pick-up of a shield holder320by the overhead transporter597, the identity of the shield holder320holding CPS200may be verified by reading an RFID tag598located within the shield holder320using an RFID reader. Processing Steps The main processing steps for a method of improving the uniformity of features deposited by electroplating on workpieces, particularly for those for which spatial and thickness uniformity are particularly critical, will now be set out. Two sets of processing steps are listed, one set for the CPS200and a second set for workpieces W and W′. These two sets of processing steps may be asynchronous, i.e. the delivery of workpiece W to the FOUP511may occur before, during or after the CPS200preparation. Similarly, the transfer of the workpiece W to the transfer stage560may occur before, during or after the shield200selection and transport, as long as a CPS200is present in ECD module503during ECD processing of a workpiece125. The steps below describe operations for a workpiece holder125capable of holding two workpieces W and W′ in a workpiece holder125comprising four contact seal strips. For workpiece holders125configured to hold only a single workpiece W, workpiece process step 5 is not applicable. CPS Process Steps: 1. Prepare tool with close patterning shields200: At least two CPS200, which may include a variety of opening patterns, are loaded into respective associated shield holders320and manually stored in respective storage bays594using the ejector platform593and the overhead transporter597.2. Select CPS200from list of available CPS in shield storage module590: A particular CPS200is selected because the repeating sets of aperture patterns220on that particular shield correspond to target locations of desired plating features on a workpiece W.3. Transfer CPS200from shield storage module590to ECD process module503: The shield holder320with its CPS200is transferred from its storage bay594to transporter hand-off platform591using the overhead transporter597. The identity of CPS200may be confirmed by reading RFID tag598. The shield holder320with its CPS200is transported to the ECD process module503using the transporter571. The shield holder320is inserted into the process module503using the drop-block578. This step may be repeated for a second CPS for plating of a two-sided workpiece or for simultaneous plating of a single side of two workpieces.4. Return CPS200from ECD process module503to shield storage module590: The CPS200is transferred to storage module590once the operator indicates a different patterning shield is required in ECD module503. CPS process steps 1-3 are then repeated for a CPS200with a different aperture pattern220. Workpiece Process Steps:1. Load unprocessed workpiece W: Robot513transfers unprocessed workpiece W from FOUP511to upper transfer arm561of transfer stage560using the end effector514. Vacuum is applied to suction cups564and workpiece W is raised into position within positioning stage540to an elevation slightly below frame541, in vertical alignment with positioning actuator546.2. Position workpiece W in workpiece holder125: Vacuum to ports565of upper transfer arm561is turned off and a slight positive pressure may be applied, allowing workpiece W to float freely on the suction cups564of transfer arm561. Using images from the CCD positioning camera542to monitor fiducial images on workpiece W, positioning actuators546position workpiece W on upper transfer arm561such that target locations of features on the workpiece W will be in alignment with the corresponding apertures in shield200after step 7 below. The data to determine proper position may be based on a computer model of the system, or may be determined experimentally and stored in a database. Following positioning of the workpiece W, suction cups564in the outer arm569of upper transfer arm561are actuated to clamp workpiece W on upper transfer arm561. The bow of workpiece W may be measured using the ultrasonic sensors543and stored in a database prior to applying vacuum to suction cups564of central arm568.3. PRO500is pivoted to the horizontal position to allow access to workpiece holder125.Vacuum is applied to ports565of lower transfer arm562to chuck the workpiece. The bladder openers555are actuated to open contact seal strips121and122. The lower transfer arm562removes workpiece Wp from workpiece holder125.4. Load unprocessed workpiece W into workpiece holder125: Bladder openers566in slot554are activated to inflate, opening contact seal strips121,122in workpiece holder125. Workpiece W is then inserted into opened workpiece holder125using the upper transfer arm561. The bladder openers566are then deactivated prior to removing vacuum clamping of workpiece W on upper transfer arm561, thus ensuring that the workpiece W will be properly positioned when it is inserted in ECD module503.5. Repeat Positioning and Loading for unprocessed workpiece W′: Robot513transfers processed workpiece Wp from lower transfer arm562to FOUP511using end effector514. Workpiece Steps 1-4 are then repeated for unprocessed workpiece W′ in order to load into the second position of workpiece holder125.6. Load second workpiece holder125′: PRO550is rotated 180° such the second slot544′ of PRO550is accessible for unloading by upper and lower transfer arms561and562. Workpiece steps 1-5 are repeated to unload processed workpieces Wp″ and Wp′″ and load unprocessed workpieces W″ and W′″.7. Transfer workpiece holders125and125′ for pre-processing: The PRO550is pivoted to its second, horizontal, configuration, and the transporter571is operated to pick-up and transport the first workpiece holder125, including its up-processed workpieces W and W′, to pre-process module501. Transporter571then transports second workpiece holder125′ to pre-process module502.8. Transfer workpiece holders125and125′ for ECD processing: Transporter571transports pre-processed workpieces W and W′ to ECD module503. The workpiece holder125is then inserted into the ECD process module503using the drop-block578. Transporter571then transports preprocessed workpieces W″ and W′″ to ECD process module504.9. Adjust gap between CPS200and workpiece W: Using actuator325, the gap between the CPS200and the workpiece W within the workpiece holder125in ECD module503may be set to a value which optimizes the uniformity of features on workpiece W, while keeping the CPS200and workpiece W parallel. The optimal distance may be determined by computer modeling of the focal length of CPS200or by experimental methods. The optimal distance may also depend on the thickness of workpiece W and the bow of workpiece W, as measured in step 4 above. The gap for workpieces W′, W″ and W′″ may similarly be set.10. Deposit metal on the workpiece: Features on the workpieces W, W′, W″ and W′″ are filled with metal using electrochemical deposition.11. Complete post-processing: Workpiece holders125and125′ are transported to post-processing module505for rinse and dry operations.12. Unload processed workpieces: PRO550is pivoted to the vertical orientation. Workpiece holders125and125′ are transported to loader/unloader section530and inserted in slots554and554′. PRO550is pivoted to the horizontal orientation to allow unloading of now-processed workpieces W, W′, W″ and W′″ as described in Workpiece Step 3. | 25,654 |
11942342 | DETAILED DESCRIPTION OF THE DISCLOSURE The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. A conveying system is involved during semiconductor fabrication. The conveying system includes a conveying unit configured to travel along a rail and carry a semiconductor structure from one processing machine to another. The conveying unit may experience vibration during travelling along the rail. For example, the conveying unit may be severely oscillated upon travelling along a section of the rail configured in U shape, or there is a sudden change of travelling direction due to configuration of the rail. Such vibration may cause delamination of components from the semiconductor structure, particles or chippings in the carrier falling on the semiconductor structure, etc. The particles may contaminate or even damage the semiconductor structure. As a result, a reliability of the semiconductor structure may be adversely affected. In the present disclosure, a method of operating a conveying system is disclosed. The method includes providing a rail, a first conveying unit movably mounted on the rail, and a central controller configured to control the first conveying unit; displacing the first conveying unit along the rail at a first speed; obtaining a first vibration measurement upon the displacement of the first conveying unit along the rail at the first speed; analyzing the first vibration measurement; transmitting a first signal based on the analysis of the first vibration measurement from the first conveying unit to the central controller; providing a second conveying unit movably mounted on the rail; transmitting a first feedback signal based on the first signal from the central controller to the second conveying unit; and displacing the second conveying unit along the rail at a second speed based on the first feedback signal. The second (succeeding) conveying unit travels along the rail at a speed based on an analysis of vibration experienced by the first (previous) conveying unit upon travelling along the rail. As such, vibration experienced by the second conveying unit upon the travelling along the rail at the speed would be mitigated compared with the vibration of the first conveying unit. Therefore, particles falling on a semiconductor structure carried by the conveying unit upon travelling are minimized. Contamination and damages of the semiconductor structure are reduced or prevented. Further, another method of operating a conveying system is disclosed. The method includes providing a rail including a first section and a second section, a conveying unit movably mounted on the rail and configured to displace along the first section at a first predetermined speed and along the second section at a second predetermined speed, and a central controller configured to control the conveying unit; deriving a first speed by the central controller based on parameters associated with the conveying unit; displacing the conveying unit along the first section of the rail at the first speed; deriving a second speed by the central controller based on the parameters; and displacing the conveying unit along the second section of the rail at the second speed, wherein the first speed is derived by increasing or decreasing the first predetermined speed, and the second speed is derived by increasing or decreasing the second predetermined speed. The conveying unit can travel at an adjusted speed instead of the predetermined speed. The adjusted speed is derived based on the parameters associated with the conveying unit (such as total weight of the conveying unit, a lot size of semiconductor structures inside the conveying unit, etc.). As such, different conveying units would have different speed adjustments and thus would travel at different speeds along the same section of the rail. Therefore, the conveying unit can travel along a section of the rail at an optimized speed instead of a fixed predetermined speed, while vibration of the conveying unit travelling along the section of the rail is minimized or less than a predetermined vibration threshold. Further, a conveying unit is disclosed. The conveying unit is operable by the conveying system, The conveying unit includes a housing; a collision prevention mechanism disposed on a sidewall of the housing; a gripping member configured to hold a carrier for carrying a semiconductor structure; a sensor disposed on the gripping member and configured to measure and collect data associated with vibration of the gripping member; and an unit controller disposed on the gripping member and configured to analyze the data from the sensor and control a movement of the conveying unit. Therefore, the travelling speed of the conveying unit along the rail can be adjusted based on vibration measured by the sensor and analysis result from the unit controller. FIG.1is a schematic view of a conveying unit100in accordance with various embodiments of the present disclosure. In some embodiments, the conveying unit100includes a housing101, a collision prevention mechanism102, a gripping member103, a sensor104and an unit controller105. In some embodiments, the conveying unit100is configured to travel along a rail110. In some embodiments, the conveying unit100is configured to carry and transport a semiconductor structure111from a location to another location. In some embodiments, the conveying unit100is an overhead hoist transport (OHT) vehicle. In some embodiments, the conveying unit100is hung under the rail110. In some embodiments, the conveying unit100is movably mounted to the rail110. In some embodiments, the conveying unit100is configured to complement and cooperate with the rail110for moving laterally or horizontally along the rail110. In some embodiments, the conveying unit100includes a travelling mechanism112configured to moveably mount the housing101to the rail110. In some embodiments, the travelling mechanism112is installed between the housing101and the rail110. In some embodiments, the travelling mechanism112includes a motor (not shown in figures) and a wheel112amovably engaged with the rail110. The conveying unit100travels laterally upon rotation of the wheel112a. In some embodiments, the motor is configured to actuate the wheel112asuch that the wheel112acan be rotated and the conveying unit100can travel laterally along the rail110. In some embodiments, the housing101of the conveying unit100is a rigid frame surrounding several components such as the gripping member103, the sensor104and the unit controller105. In some embodiments, the housing101includes a chamber101aand an opening101bfor accessing the chamber101a. In some embodiments, the gripping member103, the sensor104and the unit controller105are disposed within the chamber101aand are accessible through the opening101b. In some embodiments, the collision prevention mechanism102is disposed on a sidewall of the housing101. In some embodiments, the collision prevention mechanism102is configured to prevent collision of the conveying unit100with another conveying unit100upon travelling and prevent damages on the conveying unit100. In some embodiments, the collision prevention mechanism102can prevent the conveying unit100from physical contact with another conveying unit. In some embodiments, the collision prevention mechanism102includes a magnet configured to repel with another magnet disposed on another conveying unit, such that the conveying unit100repels another conveying unit when another conveying unit is approaching. In some embodiments, the collision prevention mechanism102includes a shock absorber configured to absorb a force exerted on the conveying unit by another conveying unit upon collision. In some embodiments, the gripping member103is configured to hold a carrier113for carrying the semiconductor structure111. In some embodiments, the gripping member103securely holds the carrier113to transport the semiconductor structure111along the rail110from a location to another. In some embodiments, a bar103ais attached to the gripping member103and is extendable to bring the gripping member103out of the housing101and retractable to bring the gripping member103back to the housing101. In some embodiments, the bar103ais telescopically extendable and retractable. In some embodiments, the gripping member103is configured to hold and release the carrier113such as FOUP, standard mechanical interface (SMIF) pods, etc. In some embodiments, the carrier113is configured to hold several semiconductor structures111. In some embodiments, the semiconductor structure111is a substrate, a wafer, a package or the like. In some embodiments, the semiconductor structure111includes semiconductive materials such as silicon or other suitable materials. In some embodiments, the semiconductor structure111includes circuitries or electrical components disposed thereon. In some embodiments, a lot or a group of semiconductor structures111are disposed inside the carrier113to isolate from the surroundings and contamination. In some embodiments, the conveying unit100securely holds the carrier113inside the housing101by extending the bar103aout of the housing101, gripping a top portion of the carrier113by the gripping member103, and then retracting the bar103ato lift up the carrier113and the gripping member103back to the housing101. In some embodiments, the conveying unit100releases the carrier113by extending the bar103aout of the housing101, opening the gripping member103to release the carrier113, and then retracting the bar103ato lift up the gripping member103back to the housing101. In some embodiments, the bar103ais in a retracted status (as shown inFIG.1), and the gripping member103and the carrier113are disposed inside the housing101upon movement of the conveying unit100along the rail110. In some embodiments, the sensor104is disposed on the gripping member103and configured to collect data associated with vibration of the gripping member103. In some embodiments, the sensor104is disposed inside the housing101. In some embodiments, the sensor104is disposed inside the housing101when the bar103ais in the retracted status, while the sensor104is disposed out of the housing101when the bar103ais in the extended status (as shown inFIG.2). In some embodiments, the sensor104is disposed within the chamber101aof the housing101and inside the housing101upon the movement of the conveying unit100along the rail110. In some embodiments, the sensor104is attached to and contacts the gripping member103. In some embodiments, the sensor104is configured to sense and measure the vibration of the gripping member103when the conveying unit100is travelled along the rail110. In some embodiments, the vibration measured by the sensor104is the vibration of the gripping member103. Since the sensor104is attached to the gripping member103close to the carrier113and the semiconductor structure111, the vibration measured by the sensor104is substantially the same as the vibration experienced by the carrier113or vibration experienced by the semiconductor structure111in the carrier113. In other words, the sensor104is configured to measure the vibration of the carrier113or the vibration of the semiconductor structure111. The vibration experienced by the carrier113or the semiconductor structure111can be accurately measured. In some embodiments, the sensor104measures and records the vibration of the gripping member103upon displacement of the conveying unit100along the rail110. In some embodiments, magnitudes and frequencies of the vibration of the gripping member103upon displacement of the conveying unit100along the rail110are recorded for subsequent analysis. In some embodiments, the sensor104is a vibration sensor or meter. In some embodiments, the unit controller105is disposed on the gripping member103. In some embodiments, the unit controller105is disposed adjacent to the sensor104. In some embodiments, the unit controller105is configured to analyze the data associated with the vibration of the gripping member103from the sensor104. In some embodiments, the data associated with the vibration of the gripping member103is transmitted to the unit controller105. In some embodiments, the unit controller105is wirelessly communicable with the sensor104. In some embodiments, the unit controller105is electrically connected to the sensor104by a wire. In some embodiments, the unit controller105can analyze the data from the sensor104and derive several results, such as a maximum or minimum of the vibration, from the data. In some embodiments, the unit controller105is configured to transmit the results to another controller. In some embodiments, the unit controller105is configured to receive a signal from another controller. In some embodiments, the unit controller105is configured to control the movement of the conveying unit100. For example, the movement of the conveying unit100can be adjusted when the unit controller105receives a signal from another controller. In some embodiments, the unit controller105is a microcontroller, microprocessor or machine control unit (MCU) module. The sensor104is installed on the gripping member103for sensing and measuring the vibration experienced by the gripping member103, the carrier113or the semiconductor structure111. As such, a speed of the conveying unit100travelling along the rail110can be adjusted based on the vibration sensed and measured by the sensor104. For example, if the vibration is severe and is greater than an acceptable level or a predetermined threshold, the speed of the conveying unit100would be decreased or adjusted until the vibration is less than or equal to the predetermined threshold. Therefore, the vibration is minimized or in the acceptable level. As such, particles or contaminates falling on the semiconductor structure111from the carrier113due to the vibration can be minimized or prevented. As a result, quality of the semiconductor structure111would not be adversely affected. In the present disclosure, a method of operating a conveying system is disclosed. A method200includes a number of operations and the description and illustration are not deemed as a limitation as the sequence of the operations.FIG.3is an embodiment of the method200of operating a first conveying system300. The method200includes a number of operations (201,202,203,204,205,206,207and208). In operation201, a rail110, a first conveying unit100-1and a central controller106are provided as shown inFIG.4. In some embodiments, the first conveying system300includes the rail110, the first conveying unit100-1hung under the rail110and the central controller106. In some embodiments, the rail110and the first conveying unit100-1are in configurations as described above or shown inFIGS.1-2. In some embodiments, the first conveying unit100-1is movably mounted on the rail110. In some embodiments, the first conveying unit100-1includes a first housing101-1, a first gripping member103-1disposed inside the first housing101-1, a first sensor104-1disposed on the first gripping member103-1, and a first unit controller105-1disposed on the first gripping member103-1, which are in configurations as described above or shown inFIGS.1-2. In some embodiments, the central controller106is configured to receive a signal from the first unit controller105-1of the first conveying unit100-1, transmit a feedback signal to the first unit controller105-1, and control movement of the first conveying unit100-1. In some embodiments, the central controller106is wirelessly communicable with the first unit controller105-1. In some embodiments, the central controller106is an OHT controller. In operation202, the first conveying unit100-1is displaced along the rail110at a first speed. In some embodiments, the first conveying unit100-1is moved laterally along the rail110at the first speed. In some embodiments, the first speed is a predetermined speed for the first conveying unit100-1travelling along the rail110. In some embodiments, the predetermined speed is derived only based on factors (such as a configuration or shape of the rail110, etc.) unrelated to parameters associated with the first conveying unit100-1. In some embodiments, the first speed is derived based on the predetermined speed and factors (such as a weight of the first semiconductor structures111-1in the first carrier113-1, etc.) related to the parameters associated with the first conveying unit100-1. In some embodiments, a vibration is experienced by the first conveying unit100-1upon displacement along the rail110at the first speed. In operation203, a first vibration measurement is obtained by the first sensor104-1upon the displacement of the first conveying unit100-1along the rail110at the first speed. In some embodiments, the first vibration measurement includes several vibration measurements measured by the first sensor104-1during a predetermined duration of the displacement. For example, several vibration measurements are obtained by measuring the vibration of the first conveying unit100-1every second upon the displacement of the first conveying unit100-1along the rail110at the first speed. In some embodiments, each vibration measurement includes parameters such as magnitude or frequency of the vibration. In some embodiments, the first vibration measurement is vibration experienced by the first gripping member103-1, the first carrier113-1or the first semiconductor structure111-1. In some embodiments, the first vibration measurement including several vibration measurements is collected and recorded by the first sensor104-1. In operation204, the first vibration measurement is analyzed by the first unit controller105-1. In some embodiments, the first vibration measurement is transmitted from the first sensor104-1to the first unit controller105-1for vibration analysis. In some embodiments, the first vibration measurement is wirelessly transmitted from the first sensor104-1to the first unit controller105-1. In some embodiments, the first sensor104-1is electrically connected to the first unit controller105-1by a wire, and the first vibration measurement is transmitted from the first sensor104-1to the first unit controller105-1through the wire. In some embodiments, several results (such as a maximum or minimum among the first vibration measurement, a position of the rail where the maximum or minimum vibration occurred, etc.) are derived by the first unit controller105-1after the analysis of the first vibration measurement. In operation205, a first signal based on the analysis of the first vibration measurement is transmitted from the first unit controller105-1to the central controller106. In some embodiments, the first signal is generated based on the analysis of the first vibration measurement, and then transmitted to the central controller106. In some embodiments, the first signal is wirelessly transmitted from the first unit controller105-1to the central controller106. In operation206, a second conveying unit100-2is provided as shown inFIG.5. In some embodiments, the second conveying unit100-2is in configuration similar to the first conveying unit100-1described above or shown inFIGS.1-2. In some embodiments, parameters associated with the first conveying unit100-1are different from parameters associated with the second conveying unit100-2. For example, a weight of the first conveying unit100-1is substantially different from a weight of the second conveying unit100-2, or a lot size of the first semiconductor structures111-1is substantially different from a lot size of the second semiconductor structures111-2. In some embodiments, the second conveying unit100-2is movably mounted on the rail110. In some embodiments, the second conveying unit100-2includes a second housing101-2, a second gripping member103-2disposed inside the second housing101-2, a second sensor104-2disposed on the second gripping member103-2, and a second unit controller105-2disposed on the second gripping member103-2, which are in configurations similar to the first housing101-1, the first gripping member103-1, the first sensor104-1and the first unit controller105-1respectively described above or shown inFIGS.1-2. In operation207, a first feedback signal based on the first signal is transmitted from the central controller106to the second unit controller105-2. In some embodiments, the first feedback signal is generated based on the first signal from the first sensor104-1, and then transmitted to the second unit controller105-2of the second conveying unit100-2. In some embodiments, the first feedback signal is wirelessly transmitted from the central controller106to the second unit controller105-2. In some embodiments, the first signal is analyzed by the central controller106, and then the first feedback signal is generated by the central controller106after the analysis. In some embodiments, the parameters associated with the second conveying unit100-2(such as a weight of the second semiconductor structures111-2in the second carrier113-2, etc.) and a predetermined speed for the second conveying unit100-2travelling along the rail110are considered upon the analysis by the central controller106. In operation208, the second conveying unit100-2is displaced along the rail110at a second speed based on the first feedback signal. In some embodiments, the second conveying unit100-2is moved laterally along the rail110at the second speed. In some embodiments, the second speed is derived based on the analysis of the first vibration measurement and the parameters associated with the second conveying unit100-2, etc. In some embodiments, the second speed is derived by adjusting a predetermined speed for the second conveying unit100-2travelling along the rail110based on the analysis of the first vibration measurement and the parameters associated with the second conveying unit100-2. In some embodiments, the first speed is substantially different from the second speed. In other words, the first conveying unit100-1and the second conveying unit100-2may travel at different speed along the same rail110. In some embodiments, the second speed is substantially less than the first speed if the first vibration measurement is substantially greater than a predetermined vibration threshold. For example, if the vibration experienced by the first conveying unit100-1is substantially greater than the predetermined vibration threshold, the second speed is derived by decreasing the first speed or decreasing the predetermined speed for the second conveying unit100-2travelling along the rail110. In other words, the second conveying unit100-2is decelerated compared with the displacement of the first conveying unit100-1. In some embodiments, the second speed is substantially greater than the first speed if the first vibration measurement is substantially less than a predetermined vibration threshold. For example, if the vibration experienced by the first conveying unit100-1is substantially less than the predetermined vibration threshold, the second speed is derived by increasing the first speed or increasing the predetermined speed for the second conveying unit100-2travelling along the rail110. In other words, the second conveying unit100-2is accelerated compared with the displacement of the first conveying unit100-1. In the present disclosure, another method of operating a conveying system is disclosed. A method400includes a number of operations and the description and illustration are not deemed as a limitation as the sequence of the operations.FIG.6is an embodiment of the method400of operating a second conveying system500. The method400includes a number of operations (401,402,403,404,405,406,407,408,409,410,411,412,413and414). The operations401-408are implemented in a way same as the operations201-208respectively, and therefore are not described again. In operation409, a second vibration measurement is obtained by the second sensor104-2of the second conveying unit100-2upon the displacement of the second conveying unit100-2along the rail110at the second speed. In some embodiments, the second vibration measurement includes several vibration measurements measured by the second sensor104-2during a predetermined duration of the displacement. For example, several vibration measurements are obtained by measuring the vibration of the second conveying unit100-2every second upon the displacement of the second conveying unit100-2along the rail110at the second speed. In some embodiments, each vibration measurement includes parameters such as magnitude or frequency of the vibration. In some embodiments, the second vibration measurement is vibration experienced by the second gripping member103-2, the second carrier113-2or the second semiconductor structure111-2. In some embodiments, the second vibration measurement including several vibration measurements is collected and recorded by the second sensor104-2. In some embodiments, the operation409is similar to the operation403. In some embodiments, the second vibration measurement is substantially less than or equal to the first vibration measurement. In some embodiments, the second vibration measurement is substantially less than or equal to the first vibration measurement and the predetermined vibration threshold. Since the second conveying unit100-2is displaced at the second speed which is derived based on the analysis of the first vibration measurement of the first conveying unit100-1(the operation408), the vibration experienced by the second conveying unit100-2upon the displacement at the second speed shall be less than the vibration experienced by the first conveying unit100-1upon the displacement at the first speed. In operation410, the second vibration measurement is analyzed by the second unit controller105-2. In some embodiments, the second vibration measurement is transmitted from the second sensor104-2to the second unit controller105-2for vibration analysis. In some embodiments, the second vibration measurement is wirelessly transmitted from the second sensor104-2to the second unit controller105-2. In some embodiments, several results (such as a maximum or minimum among the second vibration measurement, a position of the rail where the maximum or minimum vibration occurred, etc.) are derived by the second unit controller105-2after the analysis of the second vibration measurement. In some embodiments, the operation410is similar to the operation404. In operation411, a second signal based on the analysis of the second vibration measurement is transmitted from the second unit controller105-2to the central controller106. In some embodiments, the second signal is generated based on the analysis of the second vibration measurement, and then transmitted to the central controller106. In some embodiments, the second signal is wirelessly transmitted from the second unit controller105-2to the central controller106. In some embodiments, the operation411is similar to the operation405. In operation412, a third conveying unit100-3is provided as shown inFIG.7. In some embodiments, the third conveying unit100-3is in configuration similar to the first conveying unit100-1and the second conveying unit100-2described above or shown inFIGS.1,2and5. In some embodiments, parameters associated with the third conveying unit100-3are different from parameters associated with the first conveying unit100-1or the second conveying unit100-2. For example, a weight of the first conveying unit100-1, a weight of the second conveying unit100-2and a weight of the third conveying unit are different from each other. In some embodiments, the first conveying unit100-1, the second conveying unit100-2and the third conveying unit100-3are in same configuration. For example, a weight of the first conveying unit100-1, a weight of the second conveying unit100-2and a weight of the third conveying unit are same as each other. In some embodiments, the third conveying unit100-3is movably mounted on the rail110. In some embodiments, the third conveying unit100-3includes a third housing101-3, a third gripping member103-3disposed inside the third housing101-3, a third sensor104-3disposed on the third gripping member103-3, and a third unit controller105-3disposed on the third gripping member103-3, which are in configurations similar to the first housing101-1, the first gripping member103-1, the first sensor104-1and the first unit controller105-1respectively described above or shown inFIGS.1-2. In operation413, a second feedback signal based on the second signal is transmitted from the central controller106to the third unit controller105-3. In some embodiments, the second feedback signal is generated based on the second signal from the second sensor104-2, and then transmitted to the third unit controller105-3of the third conveying unit100-3. In some embodiments, the second feedback signal is wirelessly transmitted from the central controller106to the third unit controller105-3. In some embodiments, the second signal is analyzed by the central controller106, and then the second feedback signal is generated by the central controller106after the analysis. In some embodiments, the parameters associated with the third conveying unit100-3(such as a weight of the third semiconductor structures111-3in the third carrier113-3, etc.) and a predetermined speed for the third conveying unit100-3travelling along the rail110are considered upon the analysis by the central controller106. In some embodiments, the operation413is similar to the operation407. In operation414, the third conveying unit100-3is displaced along the rail110at the second speed or a third speed based on the second feedback signal. In some embodiments, the third conveying unit100-3is moved laterally along the rail110at the second speed or the third speed. In some embodiments, the third conveying unit100-3is displaced at the second speed. If the third conveying unit100-3is in same configuration as the second conveying unit100-2(such as the weight of the third conveying unit100-3is same as the weight of the second conveying unit100-2, etc.) and the vibration experienced by the second conveying unit100-2upon the displacement at the second speed is minimized or is substantially less than the predetermined vibration threshold, the vibration experienced by the third conveying unit100-3upon the displacement at the second speed shall also be minimized or is substantially less than the predetermined vibration threshold. In some embodiments, the third conveying unit100-3is displaced at the third speed if the third conveying unit100-3is in different configuration from the second conveying unit100-2(such as the weight of the third conveying unit100-3is different from the weight of the second conveying unit100-2, etc.) or the second vibration measurement is substantially greater than the predetermined vibration threshold. In some embodiments, the third speed is substantially different from the second speed. In other words, the second conveying unit100-2and the third conveying unit100-3may travel at different speed along the same rail110. In some embodiments, the third speed is derived based on the analysis of the second vibration measurement and the parameters associated with the third conveying unit100-3, etc. In some embodiments, the third speed is derived by adjusting the second speed based on the analysis of the second vibration measurement and the parameters associated with the third conveying unit100-3. In some embodiments, the third speed is substantially less than the second speed if the second vibration measurement is substantially greater than a predetermined vibration threshold. For example, if the vibration experienced by the second conveying unit100-2is substantially greater than the predetermined vibration threshold, the third speed is derived by decreasing the second speed. In other words, the third conveying unit100-3is decelerated compared with the displacement of the second conveying unit100-2. In some embodiments, the third speed is substantially greater than the second speed if the second vibration measurement is substantially less than a predetermined vibration threshold. For example, if the vibration experienced by the second conveying unit100-2is substantially less than the predetermined vibration threshold, the third speed is derived by increasing the second speed. In other words, the third conveying unit100-3is accelerated compared with the displacement of the second conveying unit100-2. In some embodiments, after the third speed is derived, a third vibration measurement is obtained by the third sensor104-3of the third conveying unit100-3upon the displacement of the third conveying unit100-3along the rail110at the third speed. In some embodiments, the third vibration measurement is collected and recorded by the third sensor104-3. In some embodiments, the vibration experienced by the third conveying unit100-3upon the displacement at the third speed shall also be minimized or is substantially less than the predetermined vibration threshold. In some embodiments, the third vibration measurement is substantially less than or equal to the second vibration measurement and the first vibration measurement. In the present disclosure, another method of operating a conveying system is disclosed. A method600includes a number of operations and the description and illustration are not deemed as a limitation as the sequence of the operations.FIG.8is an embodiment of the method600of operating a third conveying system700. The method600includes a number of operations (601,602,603,604and605). In operation601, a rail110, a first conveying unit100-1and a central controller106are provided as shown inFIG.9. In some embodiments, the third conveying system700includes the rail110including a first section110aand a second section110b, the first conveying unit100-1movably mounted on the rail110and configured to displace along the first section110aat a first predetermined speed and along the second section110bat a second predetermined speed, and the central controller106configured to control the first conveying unit100-1. In some embodiments, the first section110aand the second section110bof the rail110are in different configurations or shapes. In some embodiments, a top cross section of the first section110aand a top cross section of the second section110bare in different shapes. In some embodiments, the top cross section of the first section110aand the top cross section of the second section110bare respectively in a strip shape, U shape, N shape, Y shape, etc. In some embodiments, the first conveying unit100-1is configured to displace at different predetermined speeds along different sections of the rail110. In some embodiments, the first conveying unit100-1is in configuration as described above or shown inFIGS.1-2. In some embodiments, the first conveying unit100-1is movably mounted on the rail110. In some embodiments, the first conveying unit100-1includes a first housing101-1, a first gripping member103-1disposed inside the first housing101-1, a first sensor104-1disposed on the first gripping member103-1, and a first unit controller105-1disposed on the first gripping member103-1, which are in configurations as described above or shown inFIGS.1-2. In some embodiments, the central controller106is configured to receive a signal from the first unit controller105-1of the first conveying unit100-1, transmit a feedback signal to the first unit controller105-1, and control movement of the first conveying unit100-1. In some embodiments, the central controller106is wirelessly communicable with the first unit controller105-1. In operation602, a first speed is derived by the central controller based on several parameters associated with the first conveying unit100-1. In some embodiments, the first speed is derived by the central controller106based on the first predetermined speed, the parameters associated with the first conveying unit100-1(such as a weight of the first semiconductor structures111-1in the first carrier113-1, etc.), the shape of the first section110aof the rail110, vibration measurements obtained upon displacement of other previous conveying units along the first section110a, etc. In some embodiments, the first predetermined speed is adjusted to the first speed. In some embodiments, the first speed is derived by increasing or decreasing the first predetermined speed. In operation603, the first conveying unit100-1is displaced along the first section110aof the rail110at the first speed. The first conveying unit100-1is displaced at the first speed instead of the first predetermined speed. In some embodiments, a first vibration measurement is obtained by the first sensor104-1upon the displacement of the first conveying unit100-1along the first section110aof the rail110at the first speed. In some embodiments, the first vibration measurement is substantially less than or equal to a predetermined vibration threshold. In some embodiments, the first vibration measurement is collected and recorded by the first sensor104-1. In operation604, a second speed is derived by the central controller based on the parameters associated with the first conveying unit100-1. In some embodiments, the second speed is derived by the central controller based on the second predetermined speed, the parameters associated with the first conveying unit100-1, the shape of the second section110bof the rail110, vibration measurements obtained upon displacement of other previous conveying units along the second section110b, etc. In some embodiments, the second predetermined speed is adjusted to the second speed. In some embodiments, the second speed is derived by increasing or decreasing the second predetermined speed. In operation605, the first conveying unit100-1is displaced along the second section110bof the rail110at the second speed as shown inFIG.10. The first conveying unit100-1is displaced at the second speed instead of the second predetermined speed. In some embodiments, a second vibration measurement is obtained by the first sensor104-1upon the displacement of the first conveying unit100-1along the second section110bof the rail110at the second speed. In some embodiments, the second vibration measurement is substantially less than or equal to the predetermined vibration threshold. In some embodiments, the second vibration measurement is collected and recorded by the first sensor104-1. In some embodiments, a second conveying unit100-2is further provided as shown inFIG.11. In some embodiments, the second conveying unit100-2is movably mounted on the rail110and configured to displace along the first section110aat the first predetermined speed and along the second section110bat the second predetermined speed. In some embodiments, the second conveying unit100-2is in configuration similar to the first conveying unit100-1. In some embodiments, the central controller106is configured to control the second conveying unit100-2. In some embodiments, a third speed is derived by the central controller106based on several parameters associated with the second conveying unit100-2. In some embodiments, the third speed is derived by the central controller based on the first predetermined speed, the parameters associated with the second conveying unit100-2(such as a weight of the second semiconductor structures111-2in the second carrier113-2, etc.), the shape of the first section110aof the rail110, vibration measurements obtained upon displacement of other previous conveying units along the first section110a, etc. In some embodiments, the first predetermined speed is adjusted to the third speed. In some embodiments, the third speed is substantially different from the first speed. In some embodiments, the third speed is derived by increasing or decreasing the first predetermined speed. In some embodiments, the second conveying unit100-2is displaced along the first section110aof the rail110at the third speed. The second conveying unit100-2is displaced at the third speed instead of the first predetermined speed. In some embodiments, a third vibration measurement is obtained by the second sensor104-2upon the displacement of the second conveying unit100-2along the first section110aof the rail110at the third speed. In some embodiments, the third vibration measurement of the second conveying unit100-2is substantially less than or equal to the predetermined vibration threshold. In some embodiments, the third vibration measurement is collected and recorded by the second sensor104-2. In some embodiments, a fourth speed is derived by the central controller106based on several parameters associated with the second conveying unit100-2. In some embodiments, the fourth speed is derived by the central controller based on the second predetermined speed, the parameters associated with the second conveying unit100-2(such as a weight of the second semiconductor structures111-2in the second carrier113-2, etc.), the shape of the second section110bof the rail110, the second vibration measurement, vibration measurements obtained upon displacement of other previous conveying units along the second section110b, etc. In some embodiments, the second predetermined speed is adjusted to the fourth speed. In some embodiments, the fourth speed is substantially different from the second speed. In some embodiments, the fourth speed is derived by increasing or decreasing the second predetermined speed. In some embodiments as shown inFIG.12, the second conveying unit100-2is displaced along the second section110bof the rail110at the fourth speed. The second conveying unit100-2is displaced at the fourth speed instead of the second predetermined speed. In some embodiments, a fourth vibration measurement is obtained by the second sensor104-2upon the displacement of the second conveying unit100-2along the second section110bof the rail110at the fourth speed. In some embodiments, the fourth vibration measurement of the second conveying unit100-2is substantially less than or equal to the predetermined vibration threshold. In some embodiments, the fourth vibration measurement is collected and recorded by the second sensor104-2. In the present disclosure, a method is disclosed. The method includes providing a rail, a first conveying unit movably mounted on the rail, and a central controller configured to control the first conveying unit, wherein the first conveying unit includes a first housing, a first gripping member disposed inside the first housing, a first sensor disposed on the first gripping member, and a first unit controller disposed on the first gripping member; displacing the first conveying unit along the rail at a first speed; obtaining a first vibration measurement by the first sensor upon the displacement of the first conveying unit along the rail at the first speed; analyzing the first vibration measurement by the first unit controller; transmitting a first signal based on the analysis of the first vibration measurement from the first unit controller to the central controller; providing a second conveying unit movably mounted on the rail, wherein the second conveying unit includes a second housing, a second gripping member disposed inside the second housing, a second sensor disposed on the second gripping member and a second unit controller disposed on the second gripping member; transmitting a first feedback signal based on the first signal from the central controller to the second unit controller; and displacing the second conveying unit along the rail at a second speed based on the first feedback signal. In some embodiments, the first vibration measurement is substantially greater than a predetermined vibration threshold, and the second speed is substantially less than the first speed. In some embodiments, the first vibration measurement is substantially less than a predetermined vibration threshold, and the second speed is substantially greater than the first speed. In some embodiments, the first signal is wirelessly transmitted from the first unit controller to the central controller, and the first feedback signal is wirelessly transmitted from the central controller to the second unit controller. In some embodiments, the method further includes obtaining a second vibration measurement by the second sensor upon the displacement of the second conveying unit along the rail at the second speed, wherein the second vibration measurement is substantially less than or equal to the first vibration measurement. In some embodiments, the method further includes providing a third conveying unit movably mounted on the rail, wherein the third conveying unit includes a third housing, a third gripping member disposed inside the third housing, a third sensor disposed on the third gripping member and a third unit controller disposed on the third gripping member; and displacing the third conveying unit along the rail at the second speed. In some embodiments, the second conveying unit and the third conveying unit are in same configurations. In some embodiments, the method further includes obtaining a second vibration measurement by the second sensor upon the displacement of the second conveying unit along the rail at the second speed; providing a third conveying unit movably mounted on the rail, wherein the third conveying unit includes a third housing, a third gripping member disposed inside the third housing, a third sensor disposed on the third gripping member and a third unit controller disposed on the third gripping member; transmitting a second signal based on the analysis of the second vibration measurement from the second unit controller to the central controller; transmitting a second feedback signal based on the second signal from the central controller to the third unit controller; and displacing the third conveying unit along the rail at a third speed based on the second feedback signal. In some embodiments, the second vibration measurement is substantially greater than a predetermined vibration threshold, and the third speed is substantially less than the second speed. In some embodiments, the second vibration measurement is substantially less than a predetermined vibration threshold, and the third speed is substantially greater than the second speed. In some embodiments, the method further includes obtaining a third vibration measurement by the third sensor upon the displacement of the third conveying unit along the rail at the third speed, wherein the third vibration measurement is substantially less than or equal to the second vibration measurement and the first vibration measurement. In some embodiments, the method includes providing a rail including a first section and a second section, a first conveying unit movably mounted on the rail and configured to displace along the first section at a first predetermined speed and along the second section at a second predetermined speed, and a central controller configured to control the first conveying unit; deriving a first speed by the central controller based on a plurality of parameters associated with the first conveying unit; displacing the first conveying unit along the first section of the rail at the first speed; deriving a second speed by the central controller based on the plurality of parameters associated with the first conveying unit; and displacing the first conveying unit along the second section of the rail at the second speed, wherein the first speed is derived by increasing or decreasing the first predetermined speed, and the second speed is derived by increasing or decreasing the second predetermined speed. In some embodiments, a top cross section of the first section and a top cross section of the second section have different shapes. In some embodiments, the method further includes providing a second conveying unit movably mounted on the rail and configured to displace along the first section at the first predetermined speed; deriving a third speed by the central controller based on a plurality of second parameters associated with the second conveying unit; and displacing the second conveying unit along the first section of the rail at the third speed; wherein the third speed is derived by increasing or decreasing the first predetermined speed and is substantially different from the first speed. In some embodiments, the method further includes obtaining a first vibration measurement of the first conveying unit upon the displacement of the first conveying unit along the first section of the rail at the first speed; obtaining a second vibration measurement of the second conveying unit upon the displacement of the second conveying unit along the first section of the rail at the third speed; wherein the first vibration measurement and the second vibration measurement are substantially less than or equal to a predetermined vibration threshold. In the present disclosure, a conveying unit is disclosed. The conveying unit includes a housing; a collision prevention mechanism disposed on a sidewall of the housing; a gripping member configured to hold a carrier for carrying a semiconductor structure; a sensor disposed on the gripping member and configured to measure and collect data associated with vibration of the gripping member; and an unit controller disposed on the gripping member and configured to analyze the data from the sensor and control a movement of the conveying unit. In some embodiments, the gripping member is moveable into and out of the housing. In some embodiments, the sensor is a vibration meter. In some embodiments, the sensor and the unit controller are disposed inside the housing. In some embodiments, the housing is movably mountable on an overhead rail configured to convey the conveying unit along the overhead rail. The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure. | 52,182 |
11942343 | DETAILED DESCRIPTION The following description is presented to enable a person of ordinary skill in the art to make and use the various embodiments. Descriptions of specific systems, devices, methods, and applications are provided only as examples. Various modifications to the examples described herein will be readily apparent to those of ordinary skill in the art, and the general principles defined herein may be applied to other examples and applications without departing from the spirit and scope of the various embodiments. Thus, the various embodiments are not intended to be limited to the examples described herein and shown, but are to be accorded the scope consistent with the claims. An ion implantation system may include various processing stations for heating and/or cooling a wafer before and/or after the ion implanter implants a wafer with ions. A wafer's temperature within an ion implantation system before, during, and after ion implantation can play an important role in successfully implanting the wafer with ions as well as in the integrity of the wafer during its later use. Thus, conventional ion implantation systems employ various processes for measuring and monitoring a wafer's temperature within an ion implantation system. For example, one conventional process for measuring and monitoring a wafer's temperature within an ion implantation system includes detecting infrared emission from a wafer and determining the wafer's temperature based on the infrared emission. Another conventional process for measuring and monitoring a wafer's temperature within an ion implantation system includes contacting a wafer with a temperature sensor (e.g., a thermal couple), which can then provide the temperature at the point of contact with the wafer's surface. However, the conventional systems and processes for measuring wafer temperature described above have several shortcomings. For example, measuring a wafer's temperature by detecting infrared emission from a wafer is only suitable as a measurement means when the wafer is at high temperatures that are well above ambient temperature (e.g., 20 to 25 degrees Celsius). As another example, measuring a wafer's temperature by contacting the wafer with a temperature sensor can be unreliable with respect to making good thermal contact to the wafer surface. Further, a temperature sensor can also absorb infrared light directly (and thus heat up) when measuring a wafer's temperature while one or more infrared heating lamps heat the wafer. The above shortcomings can lead to inaccurate wafer temperature measurements. Further, contacting a wafer with a temperature sensor can create undesirable backside particles on the wafer's surface. Accordingly, there is a need for a more reliable, non-contact system and process for measuring wafer temperature that can be utilized for various types of ion implantation methods and that will reduce the undesirable results of the conventional methods for measuring wafer temperature within an ion implantation system. Systems and processes for efficiently and accurately measuring a temperature of a wafer during an ion implantation process without contacting the wafer are described herein. In particular, the present disclosure describes systems and process for measuring a temperature of a wafer during an ion implantation process based on, for example, the wafer's diameter, bandgap, thickness, and/or photoluminescence. FIG.1illustrates ion implantation system100, according to various examples. System100includes load lock chamber(s)102, robotic arm104, vacuum chamber106, pre-implantation station108, processing chamber110of an ion implanter, post-implantation station112, and controller114. Controller114includes memory116(which optionally includes one or more computer-readable storage mediums), processor(s)118, and input/output (I/O) interface120. As shown inFIG.1, robotic arm104is positioned within vacuum chamber106. Further, load lock chamber(s)102, pre-implantation station108, processing chamber110, and post-implantation station112are each coupled to vacuum chamber106such that robotic arm104is capable of accessing load lock chamber(s)102, pre-implantation station108, processing chamber110, and post-implantation station112. In some examples, during operation of ion implantation station100, a wafer is introduced into load lock chamber(s)102(e.g., by an operator of ion implantation station100). Robotic arm104moves the wafer from load lock chamber(s)102to pre-implantation station108, where the wafer is heated or cooled to a predetermined temperature. After the wafer is heated or cooled, robotic arm104moves the wafer to processing chamber110of the ion implanter, where the wafer undergoes ion implantation while at the predetermined temperature. After implantation is complete, robotic arm104moves the implanted wafer to the post-implantation station, where the wafer is heated or cooled to bring the temperature of the wafer back to a desired temperature (e.g., ambient temperature). Robotic arm104then returns the wafer to load lock chamber(s)102. The wafer can subsequently be removed from load lock chamber(s)102(e.g., by an operator of ion implantation station100). Load lock chamber(s)102is configured to hold one or more wafers before and/or after the one or more wafers are processed by ion implantation system100. In some examples, load lock chamber(s)102includes two separate load lock chambers. In these examples, each load lock chamber may be configured to receive wafers from a Front Opening Universal Pod (FOUP). For example, each load lock chamber may be configured such that at least 25 wafers may be transferred from a FOUP to a cassette of each of the load lock chambers. In some examples, load lock chamber(s)102includes a high vacuum pumping system configured to bring an interior of load lock chamber(s)102to a required high vacuum or ultra-high vacuum (UHV) (e.g., to an interior pressure greater than or equal to 5×10−7torr). Thus, in the example above wherein load lock chamber(s)102includes two separate load lock chambers, all the wafers from a first standard FOUP may be transferred into a first load lock chamber of load lock chamber(s)102prior to pumping down the first load lock chamber to the required high vacuum (e.g., using the high vacuum pumping system). All of the wafers from a second standard FOUP may then be transferred into a second load lock chamber of load lock chamber(s)102and pumped down to the required high vacuum in parallel while waiting for the wafers of the first load lock chamber to be implanted. Such a configuration may be desirable for achieving a high-throughput (e.g., greater than 400 wafers per hour) of ion implantation system100. As mentioned above, robotic arm104is capable of accessing load lock chamber(s)102, pre-implantation station108, processing chamber110, and post-implantation station112. In particular, robotic arm104is configured to hold a wafer as well as position the wafer at, and/or remove the wafer from, load lock chamber(s)102, pre-implantation station108, processing chamber110, and post-implantation station112. Robotic arm104is positioned within (e.g., at the center of) vacuum chamber106, the interior of which is kept at a high vacuum. An interior of pre-implantation station108, processing chamber110, and post-implantation station112are also kept at a high vacuum since pre-implantation station108, processing chamber110, and post-implantation station can each be accessed from the interior of vacuum chamber106. Thus, once a wafer is positioned within load lock chamber(s)102and an interior of load lock chamber(s)102is brought to a high vacuum (e.g., using a high vacuum pumping system), the wafer can remain within the high vacuum environment throughout ion implantation system100's ion implantation process and/or until the wafer is returned to load lock chamber(s)102and the interior of load lock chamber(s) is returned to an atmospheric pressure. In some examples, a gate valve is positioned between load lock chamber(s)102and vacuum chamber106so that vacuum chamber106may remain at a high vacuum when an interior of load lock chamber(s)102is at atmospheric pressure. For example, the gate valve can be closed when load lock chamber(s)102is at an atmospheric pressure in order to keep an interior of vacuum chamber106at a high vacuum. In some examples, when load lock chamber(s) includes more than one (e.g., two) separate load lock chambers, a gate valve is positioned between each separate load lock chamber and vacuum chamber106. Pre-implantation station108includes a processing chamber and is configured to heat or cool a wafer prior to implanting the wafer with ions at the ion implanter of ion implantation system100. Further, as mentioned above, an interior of pre-implantation station108's processing chamber is kept at a high vacuum. In some examples, pre-implantation108includes a cooling electrostatic chuck (“E-chuck”) that cools a wafer at pre-implantation station108(e.g., in a low-temperature ion implantation process). For example, the cooled E-chuck can be positioned within pre-implantation station108's processing chamber and can be cooled using a coolant (e.g., liquid nitrogen) such that a wafer that is positioned on the cooled E-chuck (e.g., by robotic arm104) can be cooled to low temperatures (e.g., −60 degrees Celsius, −100 degrees Celsius, −200 degrees Celsius, etc.). In some examples, pre-implantation station108includes a coolant release valve configured to cool a wafer to low temperatures (e.g., −60 degrees Celsius, −100 degrees Celsius, −200 degrees Celsius, etc.) by releasing a coolant (e.g., liquid nitrogen) into the interior of pre-implantation station108's processing chamber. In some examples, releasing a coolant into the interior of pre-implantation station108's processing chamber includes spraying the coolant directly at the wafer. In these examples, the processing chamber of pre-implantation station108can be sealed off from vacuum chamber106(e.g., via a gate valve) to prevent coolant from being released into vacuum chamber106. In some examples, robotic arm104holds the wafer in place while coolant is released into the interior of pre-implantation station108's processing chamber (e.g., without placing the wafer on a wafer stage or E-chuck). In some examples, pre-implantation station108includes one or more infrared heating lamps (described in greater detail below with reference toFIG.3) that heat a wafer at pre-implantation station108(e.g., in a high-temperature ion implantation process). For example, the one or more infrared heating lamps can be positioned within pre-implantation station108's processing chamber such that a wafer can be positioned on a stage beneath the one or more infrared heating lamps (e.g., by robotic arm104) so that the one or more infrared heating lamps heat the wafer with infrared light (e.g., to 300 degrees Celsius). Exemplary infrared heating lamps of pre-implantation station108include near infrared heating lamps (which produce infrared light with wavelengths between 780 nm to 1.4 μm), medium infrared heating lamps (which produce infrared light with wavelengths between 1.4 μm to 3 μm), and far infrared heating lamps (which produce infrared light with wavelengths between 3 μm to 100 μm). In some examples, robotic arm104holds the wafer in place while the wafer is heated (e.g., without placing the wafer on a wafer stage). As mentioned above, the ion implanter of ion implantation system100is configured to implant a wafer with ions from an ion beam and includes processing chamber110. The ion implanter may be similar or identical to ion implanter200described below with reference toFIG.2. In particular,FIG.2illustrates a two-dimensional, top-down perspective view of an ion implanter, according to various examples. As shown, ion implanter200includes ion source202and extraction manipulator204for generating ion beam205. Extraction manipulator204extracts ion beam205from ion source202and directs ion beam205into magnetic analyzer208where ion beam205is filtered by mass, charge, and/or energy. Ion beam205is further directed through multipole magnets210, electrode assembly206, and multipole magnets214to adjust the energy, shape, direction, angle, and/or uniformity of ion beam205. In particular, electrode assembly206is configured to adjust the energy of ion beam205, remove neutral species from ion beam205, and/or adjust the size, shape, and uniformity of ion beam205. Multipole magnets210and214are configured to adjust the uniformity, center angle, and/or divergence angle of ion beam205. Variable aperture assembly212is positioned between multipole magnets210and magnetic analyzer208. Variable aperture assembly212is configured to adjust the ion current of ion beam205. Ion implanter200further includes wafer support structure218, which is configured to position wafer216in the path of ion beam205, thereby causing implantation of ions into wafer216. Ion source202is configured to generate ions of a desired species. For example, for semiconductor device fabrication, desired ion species can include boron, phosphorus, or arsenic (e.g., B+, P+, and As+). In some examples, ion source202comprises a Bernas source, a Freeman source, or an indirectly heated cathode source. Ion source202includes arc chamber224, which is configured to receive one or more process gases from one or more gas sources. In some examples, ion source202is configured to form a plasma in arc chamber224by electron ionization of the one or more process gases. In these examples, ion source202includes a cathode disposed within arc chamber224. The cathode includes a filament that is heated to generate electrons for ionizing the one or more process gases. Further, the cathode is coupled to a power source, which biases the cathode at an arc voltage to accelerate the electrons from the cathode to the sidewalls of arc chamber224. The energized electrons ionize the one or more process gases in arc chamber224, thereby forming a plasma in arc chamber224. Ion source202further includes faceplate236on one side of arc chamber224. Faceplate236includes exit aperture226(e.g., arc slit) through which ions extracted from ion source202exit arc chamber224. For example, exit aperture226can be a slit or a slot configured to form a ribbon-shaped ion beam205. In some examples, faceplate236is coupled to a power source to bias faceplate236, thereby creating a potential difference (e.g., extraction voltage) between ion source202and extraction manipulator204to generate ion beam205. Extraction manipulator204includes suppression electrode220and ground electrode222. Suppression electrode220is configured to resist electrons from back-flowing into ion source202. For example, a power supply can be coupled to suppression electrode220to apply a suppression voltage to suppression electrode220. Ground electrode222is coupled to a ground potential. Extraction manipulator204is configured to generate an ion beam by extracting ions from ion source202. For example, suitable voltages can be applied to faceplate236and ground electrode222to generate a potential difference between faceplate236and ground electrode222. The generated potential difference can cause ions to be extracted from arc chamber224through exit aperture226and accelerated through ground electrode222to generate ion beam205. As shown inFIG.2, ion beam205is directed along a linear trajectory from extraction manipulator204to magnetic analyzer208. Magnetic analyzer208includes yoke207and electromagnetic coils209wrapped around opposite sidewalls of yoke207. Yoke207defines a channel through which ion beam205travels through magnetic analyzer208. As shown, ion beam205enters magnetic analyzer208through first opening211of yoke207and exits magnetic analyzer208through second opening213of yoke207. Magnetic analyzer208is configured to generate a magnetic field that causes ion beam205to deflect in a particular direction (e.g., the x-direction). While being deflected, the ions in ion beam205are filtered according to energy and mass-to-charge ratio such that only ions having a desired energy and mass-to-charge ratio may pass through magnetic analyzer208toward wafer216. In some examples, magnetic analyzer208directs ion beam205along a linear path from opening213to electrode assembly206. As shown inFIG.2, ion beam205is directed through variable aperture assembly212and multipole magnets210between magnetic analyzer208and electrode assembly206. Variable aperture assembly212includes two movable plates that define variable aperture215. However, in some examples, variable aperture212includes more than two moveable plates that define variable aperture215(e.g., three moveable plates, four moveable plates, etc.). In some examples, the movable plates are configured to adjust the size and shape of the variable aperture215. In some examples, the size and shape of the aperture defines the size and shape of ion beam205exiting variable aperture assembly212. Further, in some examples, variable aperture assembly212adjusts the ion current of ion beam205by adjusting the size of variable aperture215. For example, variable aperture215can be reduced to limit the ion current of ion beam205transmitted through variable aperture assembly212. By adjusting the size of variable aperture, the ion current may be quickly adjusted between implant processes, thereby increasing throughput and productivity. Multipole magnets210include an array of coils arranged on ferromagnetic supports. Electrical energy is supplied to the array of coils to generate a contiguous magnetic field. In some examples, multipole magnets210are configured such that electrical energy is independently supplied to the individual coils. This may enable the magnetic field gradient over the contiguous magnetic field to be adjusted. Thus, in these examples, a suitable non-uniform magnetic field is generated to adjust the size, shape, angle, and/or uniformity of ion beam205. For example, a suitable magnetic field can be generated by multipole magnets210to control the size and current density of the ion beam205. In doing so, multipole magnets210can be configured to adjust the shape of ion beam205as well as its spatial uniformity. Electrode assembly206is configured to accelerate and/or decelerate an ion beam to control the energy of the ion beam. In particular, electrode assembly206includes multiple electrodes for manipulating the ion beam as the ion beam travels through electrode assembly206. For example, the electrodes of electrode assembly206may be configured to decelerate the ion beam as the ion beam travels through electrode assembly206. The ion beam can thus enter opening217at an initial energy and exit opening219at a final energy that is lower than the initial energy. As another example, the electrodes of electrode assembly206may be configured to accelerate the ion beam or allow the ion beam to drift at constant velocity as the ion beam travels through electrode assembly206. The ion beam can thus enter opening217at an initial energy and exit opening219at a final energy that is equal to, or greater than, the initial energy. As shown inFIG.2, ion beam205exits opening219of electrode assembly206and is directed through multipole magnets214. In some examples, multipole magnets214are the same as multipole magnets210described above. In some examples, multipole magnets214include fewer or additional coils compared to multipole magnets210. In some examples, multipole magnets214are configured to adjust the shape, direction, focus, and/or uniformity of ion beam205. Further, in some examples, multipole magnets214are configured to steer ion beam205to strike the surface of wafer216in a particular location or to allow for other positional adjustments of ion beam205. In other examples, multipole magnets214may be configured to repeatedly deflect ion beam205to scan wafer216, which may be stationary or moving. Wafer support structure218is configured to position wafer216in front of ion beam205exiting multiple magnets214to cause ions to implant into wafer216. In some examples, wafer support structure218is configured to translate in one or more directions. For example, wafer support structure218can be configured to move wafer216with respect to ion beam205to scan ion beam205across wafer216. In some examples, wafer support structure218is configured to rotate wafer216. It should be recognized that wafer216may comprise any suitable substrate used in the manufacturing of semiconductor devices, solar panels, or flat-panel displays. In examples where wafer216comprises a semiconductor substrate (e.g., silicon, germanium, gallium arsenide, etc.), wafer216may include semiconductor devices at least partially formed thereon. Further, it should be appreciated that suitable variations and modifications may be made to ion implanter200. For example, ion implanter200can include additional components such as additional electrodes and magnets for manipulating ion beam205. As another example, ion implanter200can include more than one variable aperture assembly for controlling the current of ion beam205. Note, as shown inFIG.2, all of the components of ion implanter200are positioned outside of the processing chamber of ion implanter200(e.g., processing chamber110) except wafer216and wafer support structure218(which are positioned within an interior of the processing chamber). In some examples, components of ion implanter200that are outside of ion implanter200's processing chamber are coupled to an exterior surface of processing chamber110. In some examples, components of ion implanter200that are outside of ion implanter200's processing chamber are positioned near the processing chamber but are not coupled to the processing chamber. In any case, the components of ion implanter200that are positioned outside of ion implanter200's processing chamber are positioned and configured in such a way that allows ion beam205to enter processing chamber110while maintaining an interior of processing chamber110at a high vacuum. Returning toFIG.1, post-implantation station112includes a processing chamber and is configured to heat or cool a wafer after the wafer is implanted with ions by the ion implanter. Further, as mentioned above, the processing chamber of post-implantation station112is configured to maintain a high vacuum. Note, whileFIG.1illustrates post-implantation station112as including its own separate processing chamber, in some examples, post-implantation station112is located within load lock chamber(s)102. In these examples, load lock chamber(s)102includes at least two separate load lock chambers, wherein the chamber(s) in which a wafer is positioned (e.g., by robotic arm104) after the ion implanter implants a wafer with ions is different from the chamber(s) that hold the wafer prior to being cooled or heated at pre-implantation station108. Further, in some examples, post-implantation station112is located within an auxiliary chamber of load lock chamber(s)102. In some examples, the auxiliary chamber is coupled to load lock chamber(s)102and is accessible via load lock chamber(s)102(e.g., instead of via vacuum chamber106). Further, in some examples, load lock chamber(s)102includes its own robotic arm configured to position a wafer in, and remove the wafer from, the auxiliary chamber. Thus, in these examples, a wafer is positioned within load lock chamber(s)102(e.g., by robotic arm104) after the wafer is implanted with ions by the ion implanter, and then the robotic arm of load lock chamber(s)102positions the wafer at post-implantation station112within the auxiliary chamber. After post-implantation station112heats or cools the wafer within the auxiliary chamber, the robotic arm of load lock chamber(s)102moves the wafer and positions it back within load lock chamber(s)102. Similar to pre-implantation station108, in some examples, post-implantation station112includes a cooling E-chuck that cools a wafer at post-implantation station112. Further, in some examples, pre-implantation station108includes a coolant release valve configured to cool a wafer by releasing a coolant (e.g., liquid nitrogen) into the interior of the processing chamber of post-implantation station112. For example, in a high-temperature ion implantation process where a wafer is heated in pre-implantation station108prior to the wafer being implanted with ions by the ion implanter (e.g., to 300 degrees Celsius), the cooling E-chuck and/or the coolant release valve can cool a wafer and bring the wafer's temperature back down to ambient temperature (e.g., 20 to 25 degrees Celsius) after the wafer has been implanted with ions by the ion implanter. Further, in some examples, robotic arm104holds the wafer in place while coolant is released into the interior of post-implantation station112's processing chamber (e.g., without placing the wafer on a wafer stage or E-chuck). In some examples, post-implantation station112includes one or more infrared heating lamps that heat a wafer at post-implantation station112. For example, in a low-temperature ion implantation process where a wafer is cooled in pre-implantation station108prior to the wafer being implanted with ions by the ion implanter (e.g., to −100 degrees Celsius), the one or more infrared heating lamps of post-implantation station112can heat the cooled wafer back to ambient temperature after the cooled wafer is implanted with ions by the ion implanter. As with the one or more infrared heating lamps of pre-implantation station108, exemplary infrared heating lamps of post-implantation station112include near infrared heating lamps (which produce infrared light with wavelengths between 780 nm to 1.4 μm), medium infrared heating lamps (which produce infrared light with wavelengths between 1.4 μm to 3 μm), and far infrared heating lamps (which produce infrared light with wavelengths greater than 3 μm to 100 μm).). In some examples, robotic arm104holds the wafer in place while the wafer is heated (e.g., without placing the wafer on a wafer stage). In some examples, the one or more infrared heating lamps of post-implantation station112(and/or of pre-implantation station108) are configured similarly or identically to infrared heating lamp(s) configuration300described below with reference toFIG.3(e.g., within the processing chamber of pre-implantation station108and/or post-implantation station112, load lock chamber(s)102, and/or the auxiliary chamber of load lock chamber(s)102described above).FIG.3illustrates a two-dimensional, side perspective view of an infrared heating lamp(s) configuration, according to various examples. As shown, infrared heating lamp(s) configuration300includes wafer302, stage304, lamp housing306, and infrared heating lamps308. WhileFIG.3illustrates infrared heating lamps308as including four infrared heating lamps, in some examples, infrared heating lamp(s) configuration300includes more or less infrared heating lamps. Further, in some examples, a distance between infrared heating lamps308and wafer302can vary based on where infrared heating lamp(s) configuration300is positioned. For example, a distance between infrared heating lamps308and wafer302can be greater when infrared heating lamp(s) configuration300is positioned within post-implantation station112's processing chamber than when infrared heating lamp(s) configuration300is positioned within load lock chamber(s)102and/or the auxiliary chamber of load lock chamber(s)102. Returning toFIG.1, in some examples, pre-implantation station108and/or post-implantation station112are further configured to measure a current temperature of a wafer. For example, pre-implantation station108and/or post-implantation station112can be configured to perform one or more of the methods described below with reference toFIGS.9-12to determine the current temperature of the wafer. In some examples, pre-implantation station108and/or post-implantation station112include various temperature measurement components that are used to measure a temperature of a wafer. In some examples, the various temperature measurement components included in the pre-implantation station108and/or post-implantation station are based on the one or more methods that pre-implantation station108and/or post-implantation station112use to measure a temperature of a wafer. In other words, pre-implantation station108and/or post-implantation station112can include different temperature measurement components depending on the one or more methods used to measure a temperature of the wafer. In some examples, both pre-implantation station108and post-implantation station112are configured to measure a current temperature of a wafer. In some of these examples, pre-implantation station108and post-implantation station112are both configured to use the same method to determine the current temperature of the wafer and thus include the same temperature measurement components. In other examples, pre-implantation station108and post-implantation station112are configured to use different methods to determine the current temperature of the wafer and thus include different temperature measurement components based on the one or more methods that they are each configured to use. In some examples, the various temperature measurement components are configured and operated in such a way that allows pre-implantation station108and/or post-implantation station112to quickly and continuously measure a temperature of a wafer, even while pre-implantation station108and/or post-implantation station112heats or cools the wafer (as will be described in greater detail below with respect toFIGS.4-7and9-12). For example, although it may only take pre-implantation station108and/or post-implantation station112several seconds to heat or cool a wafer to a desired temperature (e.g., less than 10 seconds), pre-implantation station108and/or post-implantation station112can measure a temperature of the wafer (using the various temperature measurement components and controller114) multiple times within the time it takes to heat or cool the wafer to a desired temperature. For example, the pre-implantation station108and/or post-implantation station can measure a temperature of the wafer once every second, or more than once a second, so as to provide a continuous and dynamic wafer temperature measurement. Note, for the sake of simplicity,FIGS.4-7and9-13and their corresponding descriptions below refer only to post-implantation configuration112instead of both pre-implantation station and post-implantation station. However, the configurations described with reference toFIGS.4-7and the processes for determining a temperature of a wafer described with reference toFIGS.9-13also apply to pre-implantation station108. In other words, as mentioned above, pre-implantation station108can include temperature measurement components in accordance withFIGS.4-7and can be configured to perform one or more of the methods illustrated inFIGS.9-13despite the fact that those figures and their corresponding descriptions do not refer to a pre-implantation station. FIG.4. illustrates a two-dimensional, top-down perspective view of a post-implantation station configuration for measuring a temperature of a wafer using a single-laser method (e.g., process900described below with reference toFIG.9), according to various examples. Post-implantation station configuration400includes various temperature measurement components, such as laser unit404, laser source406, laser sensor408, and laser unit track410. In some examples, laser source406is a narrow-band, tunable laser source. For example, laser source406can generate a laser beam having a wavelength between 400 nm and 779 nm. In other examples, laser source406can be a near infrared laser source (e.g., which produces a laser beam having a wavelength between 780 nm to 1.4 μm), a mid-infrared laser source (e.g., which produces a laser beam having a wavelength between 1.4 μm to 3 μm), or a far infrared laser source (e.g., which produces a laser beam having a wavelength between 3 μm to 100 μm). Note, the wavelength of a laser beam generated by laser source406is not limited to the example wavelength ranges described above. Laser sensor408is a time-of-flight laser sensor that is configured to determine a distance from an object (e.g., a wafer) based on an amount of time it takes for a laser beam that laser source406generates/directs to the object to reflect off of the object and return to laser sensor408. Laser source406is communicatively connected (e.g., via one or more wired connections) to laser sensor408. Further, controller114is communicatively connected (e.g., via one or more wired connections) to laser source406and laser sensor408. In some examples, laser source406and laser sensor408are not communicatively connected to one another. As shown inFIG.4, the dimensions (e.g., diameter, thickness, etc.) of a semiconductor wafer (in this case, a silicon wafer) change as the wafer's temperature changes. For example, in a high-temperature ion implantation process, a wafer's dimensions can expand as a result of the wafer's high temperature (e.g., 300 degrees Celsius). The wafer's dimensions can then reduce in size as the wafer cools down. Alternatively, in a low-temperature ion implantation process, a wafer's dimensions can reduce as a result of the wafer's low (e.g., −60 degrees Celsius). The wafer's dimensions can then increase in size as the wafer heats up. The single-laser method utilizes this material characteristic of semiconductor materials to determine a current temperature of a wafer based on the wafer's current diameter. Thus,FIG.4illustrates wafer402and expanded wafer420(which has a larger diameter than wafer402). As also shown inFIG.4, the various temperature measurement components of post-implantation station configuration400are positioned outside of the processing chamber of post-implantation station112. The temperature measurement components of post-implantation station configuration400can be similarly positioned in the examples described above wherein post-implantation station112is located within load lock chamber(s)102or an auxiliary chamber. During operation, wafer402/expanded wafer420is positioned at post-implantation station112(e.g., within the processing chamber of post-implantation station112). For example, wafer402/expanded wafer420can be placed on a wafer stage or a cooling E-chuck (e.g., in a high-temperature ion implantation process). Wafer402/expanded wafer420is similar or identical to wafer216described above with reference toFIG.2. In this case, wafer402/expanded wafer420is a silicon wafer. In some examples, wafer402/expanded wafer420is made of one or more other semiconductor materials, such as germanium, gallium arsenide, silicon carbide, gallium nitride, gallium phosphide, cadmium sulphide, and so forth. In particular, as shown inFIG.4, laser unit404(which includes laser source406and laser sensor408) moves along laser unit track410, which is parallel to X Axis416. In some examples, laser unit404's movement along laser unit track410is controlled by controller114. As laser unit404travels along laser unit track410, laser source406directs a laser beam to a point on an edge of wafer402(or expanded wafer420) and laser sensor408receives the laser beam (after the laser beam reflects of the edge of the wafer) at Position 1, Position 2, and Position 3. For example, as shown at Position 1, laser source406directs laser beam412to a point on the edge of wafer402or expanded wafer420(e.g., via a view port of the processing chamber). Laser beam412travels parallel to Y Axis418, reflects off of the edge of expanded wafer420(e.g., as laser beam414A) or wafer402(e.g., as laser beam414B), and returns to laser sensor408. In some examples, after the above process is performed at Position 1, Position 2, and Position 3, laser unit410can return to Position 1 to repeat the process at each position. In some examples, instead of returning to Position 1 to repeat the above process, laser unit410can repeat the above process starting at Position 3 and subsequently repeat the process once again after it returns to Position 1. Controller114determines a distance between laser source406and a point on the edge of the wafer based on an amount of time it takes for a laser beam from laser source406to reflect off the edge of wafer402/expanded wafer420and return to laser sensor408. For example, as shown inFIG.4, controller114can determine distance d1, d2, and d3between laser source406and wafer402(e.g., as a coordinate on Y Axis418) at Position 1, Position 2, and Position 3, respectively. Then, as will be explained in greater detail below with reference toFIG.9, controller114uses the three distance measurements from each laser source406position, as well as laser source406's horizontal position along X Axis416at each position (e.g., as a coordinate on X Axis416), to determine a current temperature of wafer402/expanded wafer420. For example, controller114can determine a center point of wafer402/expanded wafer420(e.g., an X Axis416coordinate and Y Axis418coordinate) based on the X Axis416and Y Axis418coordinates at each position. After, controller114can determine the diameter of wafer402/expanded wafer420based on the center point. Lastly, controller114can determine the current temperature of wafer402/expanded wafer420based on the determined diameter of wafer402/expanded wafer420and a coefficient of linear thermal expansion for silicon. The various temperature measurement components ofFIG.4(e.g., laser source406, laser sensor408, etc.) can be configured to quickly and continuously acquire and provide the above information (e.g., X Axis416horizontal position coordinates, Y Axis418distance coordinates, etc.) as wafer402/expanded wafer420heats up/cools down such that controller114can continuously determine and provide a current wafer temperature. Further, although not illustrated inFIG.4, post-implantation configuration400can include one or more infrared heating lamps (e.g., in a heating lamp housing), a cooling E-chuck, and/or a coolant release valve for releasing a coolant (e.g., as described above with reference toFIG.1). However, regardless of which heating/cooling components that post-implantation station configuration400includes, a current temperature of wafer402/expanded wafer420is still determined according to the process described above (and described in greater detail below with reference toFIG.9). FIG.5illustrates a two-dimensional, side perspective view of a post-implantation station configuration for measuring a temperature of a wafer using a bandgap method (e.g., process1000described below with reference toFIG.10), according to various examples. Post-implantation station configuration500includes various temperature measurement components, such as laser source508, optical fiber510, infrared barrier512, and photodetector518. Post-implantation station configuration500further includes wafer stage504and heating lamp housing506(including one or more infrared heating lamps). In some examples, laser source508is a narrow-band, tunable laser source. For example, laser source406can generate a laser beam having a wavelength between 400 nm and 779 nm. In other examples, laser source508can be a near infrared laser source (e.g., which produces a laser beam having a wavelength between 780 nm to 1.4 μm), a mid-infrared laser source (e.g., which produces a laser beam having a wavelength between 1.4 μm to 3 μm), or a far infrared laser source (e.g., which produces a laser beam having a wavelength between 3 μm to 100 μm). Note, the wavelength of a laser beam generated by laser source508is not limited to the example wavelength ranges described above. Further, in some examples, the wavelength of a laser beam generated by laser source508is based on the semiconductor material that a wafer is made of For example, the wavelength of a laser beam generated by laser source508when a wafer is made of silicon may be different from a laser beam generated by laser source508when a wafer is made of gallium arsenide. Photodetector518is a broadband photodetector. In some examples, photodetector518is a narrowband detector. In yet other examples, photodetector518is a photodetector (e.g., broadband or narrowband) that tracks the wavelength at which laser source508is generating a laser beam. In general, photodetector518can be a photoemission photodetector, a semiconductor photodetector, a thermal photodetector, or a photochemical photodetector. More specifically, photodetector518can be a photodiode, a thermopile, a bolometer, a pyrometer, or any other type of photodetector. In some examples, photodetector518incorporates one or more filters that remove extraneous wavelengths of light (e.g., light that falls outside of a predetermined wavelength range). In some examples, photodetector518has an acceptance angle limited to receive only light from a laser beam generated by laser source508(or, at the very least, to reduce an amount of light that is not generated by laser source508that photodetector518receives). Controller114is communicatively connected to laser source508and photodetector518(e.g., via one or more wired connections). Infrared barrier512is a rectangular-shaped flat plate made of an infrared-blocking material (e.g., a material that reflects, absorbs, and/or blocks more infrared light than the material transmits, and thus reduces an amount of infrared light that passes through the material). For example, infrared barrier512can be made of metal (e.g., aluminum), a material coated in metal, graphite, infrared-opaque polymer(s), ceramic, heat-absorbing glass, and/or any other material that reflects, absorbs, and/or blocks more infrared light than it transmits. In some examples, infrared barrier512is a circular-shaped flat plate, a triangular-shaped flat plate, a square-shaped flat plate, a diamond-shaped flat plate, a hexagon-shaped flat plate, or an octagon-shaped flat plate. Further, in some examples, infrared barrier512is another three-dimensional shape other than a flat plate. For example, a thickness/height of infrared barrier512can be increased such that infrared barrier is a cube, a prism, a cone, etc. As another example, infrared barrier512can be a sphere. In some examples, a size of infrared barrier512(e.g., an area of a side of infrared barrier512that faces heating lamp housing506) is based on an area of a shadow (created via the infrared light from the one or more heating lamps of heating lamp housing506) that infrared barrier512casts on a first side of wafer502. Specifically, in some examples, a size of infrared barrier512must be at least large enough to cast a shadow on the first side of wafer502that encompasses a spot of laser beam514. For example, if a spot of laser beam514on the first side of wafer502has a diameter of 1 mm (i.e., an area of 0.79 mm2), a size of a circular-shaped flat plate infrared barrier512must be large enough to cast a shadow (on the first side of wafer502) having a diameter that is at least greater than 1 mm (e.g., 1.5 mm, 2 mm, etc.). In this manner, infrared barrier512reduces (or more preferably eliminates) an amount of infrared light from the one or more infrared heating lamps that directly strikes the portion of the first side of wafer502where the spot of laser beam514strikes. Note, one of ordinary skill in the art would appreciate that the area of the shadow that infrared barrier512casts on wafer502is also based on a distance between infrared barrier512and a first side of wafer502. Thus, the size of infrared barrier512in the examples above is also based on a distance between infrared barrier512and the first side of wafer502. As shown inFIG.5, laser source508and a first portion of optical fiber510are positioned outside of the processing chamber of post-implantation station112whereas wafer stage504, heating lamp housing506, a second portion of optical fiber510, infrared barrier512, and photodetector518are positioned within the processing chamber of post-implantation station112. The above components of post-implantation station configuration500can be similarly positioned in the examples described above wherein post-implantation station112is located within load lock chamber(s)102or an auxiliary chamber. For example, if post-implantation station112is located within load lock chamber(s)102, laser source508and a first portion of optical fiber510can be positioned outside of load lock chamber(s)102while wafer stage504, heating lamp housing506, a second portion of optical fiber510, infrared barrier512, and photodetector518are positioned within load lock chamber(s)102. During operation, wafer502is positioned at post-implantation station112(e.g., within the processing chamber of post-implantation station112) on wafer stage504. In some examples, wafer502is placed on a cooling E-chuck (e.g., in a high-temperature ion implantation process) instead of wafer stage504. Wafer502is similar or identical to wafer216described above with reference toFIG.2. In this case, wafer502is a silicon wafer. In some examples, wafer502is made of one or more other semiconductor materials, such as germanium, gallium arsenide, silicon carbide, gallium nitride, gallium phosphide, cadmium sulphide, and so forth. The bandgap (also known as the band gap energy or energy gap) of a semiconductor wafer (in this case, a silicon wafer) changes as a function of temperature. Specifically, the bandgap of semiconductor materials (measured in electron volts (eV)) decreases as the temperature of the semiconductor materials increases. Thus, the bandgap method for determining a current temperature of a wafer utilizes this material characteristic of semiconductors to determine a current temperature of a wafer based on the wafer's current bandgap value. In particular, as shown inFIG.5, laser source508generates laser beam514, which is directed to an interior of the processing chamber of post-implantation station112by optical fiber510. An output end of optical fiber510then directs laser beam514to a spot on a first side of wafer502. Laser beam514strikes the spot on the first side of wafer502and is transmitted from a second side of wafer502as laser beam516. Photodetector518then collects transmitted laser beam516and measures an intensity of transmitted laser beam516. As shown, infrared barrier512is positioned between heating lamp housing506and wafer502, and directly above the output end of optical fiber510. In some examples, infrared barrier512is held in this position using one or more support structures. For example, infrared barrier512can be held in the position shown inFIG.5by a support arm having a first and second end that is connected/attached to infrared barrier512at the first end and connected/attached to the processing chamber of post-implantation station112at the second end. As mentioned above, infrared barrier512reflects, absorbs, and/or blocks infrared light and is positioned such that it casts a shadow on a first side of wafer502that is large enough to encompass a spot of laser beam514. Thus, infrared barrier512reduces (or more preferably, eliminates) an amount of infrared light that directly strikes the spot on the first side of wafer502that laser beam514strikes. In this manner, infrared barrier512reduces an amount of infrared light that is transmitted through the spot on the first side of wafer502and subsequently collected by photodetector518while still allowing the infrared light to directly strike (and heat) the portions of the first side of wafer502that are not covered by infrared barrier512. Infrared light can create “noise” (e.g., additional/undesired intensity measurements) when photodetector518measures an intensity of transmitted laser beam516. Thus, reducing (or more preferably, eliminating) an amount of infrared light that photodetector518collects allows photodetector518to more accurately measure an intensity of transmitted laser beam516. While laser beam514strikes the spot on the first side of wafer502(and photodetector518collects transmitted laser beam516), controller114varies (e.g., increases or decreases) a frequency of laser beam514(e.g., via tunable laser source508) across a predefined frequency range (e.g., 2.72×1014Hz to 2.76×1014Hz). As controller114varies the frequency of laser beam514, an amount of laser beam514that wafer502absorbs will change (e.g., increase or decrease) and thus the intensity of transmitted laser beam516will also change (as laser beam absorption and transmission are inversely related). For example, as wafer502's absorption of laser beam514increase, the intensity of transmitted laser beam516decreases. After controller114varies the frequency of laser beam514across the predefined frequency range, controller114generates an absorption profile of wafer502across the predefined frequency range based on photodetector518's measurements of transmitted laser beam516's intensity across the predefined frequency range. In some examples, controller114generates the absorption profile of wafer502while controller114varies the frequency of laser beam514. As will be explained in greater detail below with reference toFIG.10, controller114determines a current temperature of wafer502based on the generated absorption profile. For example, if controller114tunes laser source508to scan the frequency of laser beam514from below the frequency corresponding to wafer502's bandgap (i.e., the bandgap frequency) to above wafer502's bandgap frequency, there will be a noticeable change in wafer502's absorption of laser beam514at the bandgap frequency. Specifically, the absorption profile will indicate a low absorption by wafer502(i.e., a high transmitted laser beam516intensity) when laser source508is tuned to a frequency below wafer502's bandgap frequency. However, the absorption profile will indicate a dramatic increase in wafer502's absorption of laser beam514(i.e., a dramatic decrease in the intensity of transmitted laser beam516) once laser source508is tuned to a frequency that exceeds wafer502's bandgap frequency. Laser source508's frequency at the point of the dramatic increase in wafer502's absorption of laser beam514represents the bandgap frequency of wafer502at wafer502's current temperature. Controller114then determines the current temperature of wafer502based on wafer502's determined bandgap frequency. Note, this current temperature determination is also based on wafer502's material (in this case, silicon). In particular, the determined bandgap frequency may correspond to a different wafer502temperature based on the material wafer502is made of. For example, a determined bandgap frequency can correspond to a first temperature for a silicon wafer while also corresponding to a second temperature for a gallium arsenide wafer. The various temperature measurement components ofFIG.5(e.g., laser source508, photodetector518, etc.) can be configured to quickly and continuously acquire and provide the above information (e.g., frequency of laser beam514, intensity of laser beam516, etc.) as wafer502heats up/cools down such that controller114can continuously determine and provide a current wafer temperature. For example, once controller114generates an absorption profile of wafer502across a predefined frequency, controller114can once again begin tuning laser source508to scan the frequency of laser beam514from a low frequency to a high frequency (and photodetector518can continue measuring an intensity of transmitted laser beam516) in order to generate another absorption profile of wafer502. In this manner, controller114can continually generate absorption profiles of wafer502and thus continually determine wafer502's current temperature until wafer502reaches a desired temperature. Note, whileFIG.5illustrates infrared barrier512positioned between heating lamp housing506and wafer502, in some examples, infrared barrier512is positioned proximate to (e.g., directly above) photodetector518(or an input end of a second optical fiber described in greater detail below). In these examples, infrared barrier512is a filter that transmits transmitted laser beam516but reflects, blocks, and/or absorbs infrared light generated by the one or more infrared heating lamps of infrared heating lamp housing506. In some examples, the filter is a dielectric mirror, such as a broadband hot mirror filter. In other examples, the filter is a dichroic mirror, such as a longpass dichroic mirror filter. For example, if a wavelength of transmitted laser beam516is expected to range from 1000 nm to 1200 nm, infrared barrier512can be a broadband hot mirror filter or a longpass dichroic mirror filter that transmits infrared light having a wavelength between 1000 nm and 1200 nm while reflecting, blocking, and/or absorbing the infrared light generated by the one or more infrared heating lamps. Note, in these examples, in order for the filter to successfully reduce an amount of infrared light generated by the one or more infrared heating lamps that photodetector518(or the input end of the second optical fiber) collects, a wavelength spectrum of the infrared light generated by the one or more heating lamps should not overlap with the wavelength range that the filter transmits, as this could result in the filter transmitting the infrared light generated by the one or more infrared heating lamps. For example, in the example above wherein the broadband hot mirror filter/longpass dichroic mirror filter transmits infrared light having a wavelength between 1000 nm and 1200 nm, the one or more heating lamps should only generate infrared light that does not have a wavelength between 1000 nm and 1200 nm. In some examples, post-implantation configuration500does not include infrared barrier512. In these examples, post-implantation configuration500utilizes other components and/or processes to reduce an amount of infrared light that photodetector518collects when collecting transmitted laser beam516. For example, controller114can be communicatively connected to heating lamp housing506(and thus the one or more infrared heating lamps included therein) such that controller114can be configured to turn off the one or more infrared heating lamps while photodetector518collects transmitted laser beam516(e.g., as described in greater detail below with reference to step812ofFIG.8). In some examples, post-implantation configuration500utilizes other components and/or processes to reduce an amount of infrared light that photodetector518collects when collecting transmitted laser beam516in addition to infrared barrier512. Moreover, whileFIG.5illustrates photodetector518within the processing chamber of post-implantation station112, in some examples, photodetector518is positioned outside of the processing chamber of post-implantation station112(or load lock chamber(s)102/the auxiliary chamber when post-implantation station112is positioned therein). In these examples, an input end of a second optical fiber is positioned proximate to the second side wafer502(e.g., where photodetector518is positioned inFIG.5) and an output end of the second optical fiber is connected to photodetector508, such that a first portion of the second optical fiber is within the processing chamber and a second portion of the optical fiber is outside of the processing chamber. The input end of the second optical fiber faces the second side of wafer502so that the second optical fiber collects transmitted laser beam516(i.e., via the input end), directs transmitted laser beam516to photodetector518(positioned outside of the processing chamber), and provides transmitted laser beam516to photodetector518(e.g., via the output end). Photodetector518then measures an intensity of transmitted laser beam516as described above. As mentioned above with reference toFIG.1, in some examples, post-implantation station112includes a cooling E-chuck and/or a coolant release valve that are configured to cool a wafer (e.g., in high-temperature ion implantation process). In these examples, post-implantation configuration500does not include infrared barrier512and heating lamp housing506(or the one or more infrared heating lamps included therein). Further, in the examples where post-implantation station112includes a cooling E-chuck, post-implantation configuration500does not include wafer stage504. Rather, in these examples, wafer502is positioned on the cooling E-chuck (similarly to how wafer502is positioned on wafer stage504) in order for the cooling E-chuck to cool the wafer. However, despite the above alterations to post-implantation station configuration500in these examples, a current temperature of wafer502is still determined according to the process described above (and described in greater detail below with reference toFIG.10). FIG.6illustrates a two-dimensional, side perspective view of a post-implantation station configuration for measuring a temperature of a wafer using a capacitance method (e.g., process1100described below with reference toFIG.11), according to various examples. Post-implantation station configuration600includes two temperature measurement components—top capacitive sensor608and bottom capacitive sensor610. Capacitive sensors608and610are non-contact, object detection capacitive sensors. In some examples, capacitive sensors608and610are non-contact, level detection capacitive sensors. Post-implantation station configuration600further includes wafer stage604and heating lamp housing606(including one or more infrared heating lamps). In some examples, post-implantation station configuration600does not include wafer stage604. In these examples, a robotic arm (e.g., robotic arm104) holds a wafer in a fixed position between capacitive sensors608and610. Controller114is communicatively connected to top capacitive sensor608and bottom capacitive sensor610(e.g., via one or more wired connections). As shown inFIG.6, wafer stage604, heating lamp housing606, top capacitive sensor608, and bottom capacitive sensor610are all positioned within the processing chamber of post-implantation station112. The above components of post-implantation station configuration600can be similarly positioned in the examples described above wherein post-implantation station112is located within load lock chamber(s)102or an auxiliary chamber. For example, if post-implantation station112is located within load lock chamber(s)102, wafer stage604, heating lamp housing606, and capacitive sensors608and610can be positioned within load lock chamber(s)102. During operation, wafer602is positioned at post-implantation station112(e.g., within the processing chamber of post-implantation station112) on wafer stage604. In some examples, wafer602is placed on a cooling E-chuck (e.g., in a high-temperature ion implantation process) instead of wafer stage604. Wafer602is similar or identical to wafer216described above with reference toFIG.2. In this case, wafer602is a silicon wafer. In some examples, wafer602is made of one or more other semiconductor materials, such as germanium, gallium arsenide, silicon carbide, gallium nitride, gallium phosphide, cadmium sulphide, and so forth. Top capacitive sensor608and bottom capacitive sensor610are positioned near a top side of wafer602and a bottom side of wafer602, respectively. Further, top capacitive sensor608and bottom capacitive sensor610are positioned at a predefined distance from one another. For example, top capacitive sensor608and bottom capacitive sensor610can be positioned 5 mm apart from one another, with wafer602positioned in between. In some examples, top capacitive sensor608and bottom capacitive sensor610can be as close as 0.2 mm apart from one another or as far as 6 mm apart from one another. However, at no point does top capacitive sensor608or bottom capacitive sensor610make contact with wafer602. As explained above with respect to the single-laser method of determining a current temperature of a semiconductor wafer (described with reference toFIG.4), semiconductor wafers change dimensions (e.g., diameter, thickness, etc.) as the temperature of the semiconductor wafers changes. Specifically, the thickness of a semiconductor wafer will increase as the semiconductor wafer heats up and decrease as the semiconductor wafer cools down. Thus, the capacitance method for determining a current temperature of a semiconductor wafer (in this case, a silicon wafer) utilizes this material characteristic of semiconductors to determine a current temperature of a wafer based on the wafer's current thickness. In particular, top capacitive sensor608measures a top capacitance between itself and the top side of wafer602while bottom capacitive sensor610measures a bottom capacitance between itself and the bottom side of wafer602. Controller114then determines a first distance between top capacitive sensor608and the top side of wafer602, and a second distance between bottom capacitive sensor610and the bottom side of wafer602, based on the top capacitance measurement and the bottom capacitance measurement, respectively. After, controller114determines a current thickness of wafer602based on the first distance, the second distance, and the predefined distance between top capacitive sensor608and bottom capacitive sensor610. For example, if controller114determines a first distance of 80 μm and a second distance of 60 μm, and top capacitive sensor608is positioned 300 μm apart from bottom capacitive sensor610, controller114can determine a current wafer thickness of 160 μm (i.e., 300 μm−(60 μm+80 μm)=160 μm). As will be explained in greater detail below with respect toFIG.11, controller114uses the determined current thickness of wafer602to determine the current temperature of wafer602. As mentioned above, the temperature measurement components ofFIG.6(e.g., top capacitive sensor608and bottom capacitive sensor610) can be configured to quickly and continuously acquire and provide the above information (e.g., top and bottom capacitance measurements) as wafer602heats up/cools down such that controller114can continuously determine and provide a current wafer temperature. For example, controller114can continually receive top and bottom capacitance measurements from top capacitive sensor608and bottom capacitive sensor610, respectively, and thus continually determine a current thickness of wafer602. In this manner, controller114can continually wafer602's current temperature until wafer502reaches a desired temperature. Moreover, as mentioned above with reference toFIG.1, in some examples, post-implantation station112includes a cooling E-chuck and/or a coolant release valve that are configured to cool a wafer (e.g., in high-temperature ion implantation process). In these examples, post-implantation configuration600does not include heating lamp housing606(or the one or more infrared heating lamps included therein). Further, in the examples where post-implantation station112includes a cooling E-chuck, post-implantation configuration600does not include wafer stage604. Rather, in these examples, wafer602is positioned on the cooling E-chuck (similarly to how wafer602is positioned on wafer stage504) in order for the cooling S-chuck to cool the wafer. However, despite the above alterations to post-implantation station configuration600in these examples, a current temperature of wafer602is still determined according to the process described above (and described in greater detail below with reference toFIG.11). FIG.7illustrates a two-dimensional, side perspective view of a post-implantation station configuration for measuring a temperature of a wafer using a photoluminescence method (e.g., process1200described below with reference toFIG.12), according to various examples. Post-implantation station configuration700includes various temperature measurement components, such as laser source708, optical fiber710, optics module712, infrared barrier718, spectrophotometer720, and amplifier722. Post-implantation station configuration700further includes wafer stage704and heating lamp housing706(including one or more infrared heating lamps). Controller114is communicatively connected to laser source708, spectrophotometer720, and amplifier722(e.g., via one or more wired connections). In some examples, laser source708is a narrow-band, tunable laser source. For example, laser source708can generate a laser beam having a wavelength between 400 nm and 779 nm. In other examples, laser source406can be a near infrared laser source (e.g., which produces a laser beam having a wavelength between 780 nm to 1.4 μm), a mid-infrared laser source (e.g., which produces a laser beam having a wavelength between 1.4 μm to 3 μm), or a far infrared laser source (e.g., which produces a laser beam having a wavelength between 3 μm to 100 μm). Note, the wavelength of a laser beam generated by laser source406is not limited to the example wavelength ranges described above. Optics module712includes one or more lenses that are configured to shape and/or focus a laser beam generated by laser source708and received from optical fiber710(e.g., laser beam714). For example, the one or more lenses of optics module712can be configured to reduce a spot size of a laser beam received from optical fiber710. The one or more lenses of optics module712are further configured to direct a laser beam to wafer702(e.g., to an edge of wafer702). In some examples, optics module712includes an optical chopper that is configured to change a frequency of a laser beam generated by laser source708. For example, the optical chopper can be a variable frequency rotating disc chopper, a fixed frequency turning fork chopper, or an optical shutter. In this manner, the optical chopper can control a frequency at which a laser beam generated by laser source708strikes wafer702(and thus allows the frequency to be changed during an implantation process). Infrared barrier718is a rectangular-shaped flat plate made of an infrared-blocking material (e.g., a material that reflects, absorbs, and/or blocks more infrared light than the material transmits, and thus reduces an amount of infrared light that passes through the material). For example, infrared barrier718can be made of metal (e.g., aluminum), a material coated in metal, graphite, infrared-opaque polymer(s), ceramic, heat-absorbing glass, and/or any other material that reflects, absorbs, and/or blocks more infrared light than it transmits. In some examples, infrared barrier718is a circular-shaped flat plate, a triangular-shaped flat plate, a square-shaped flat plate, a diamond-shaped flat plate, a hexagon-shaped flat plate, or an octagon-shaped flat plate. Further, in some examples, infrared barrier718is another three-dimensional shape other than a flat plate. For example, a thickness/height of infrared barrier718can be increased such that infrared barrier is a cube, a prism, a cone, etc. As another example, infrared barrier718can be a sphere. In some examples, a portion of infrared barrier718extends over the edge of the wafer where laser beam714strikes such that infrared barrier718reduces (or more preferably, eliminates) an amount of infrared light from the one or more infrared heating lamps that directly strikes a portion of the top surface of wafer702proximate to that edge of the wafer. Such sizing/positioning of infrared barrier718can reduce (or more preferably, eliminate) an amount of infrared light from the one or more infrared heating lamps that passes in between infrared barrier718and wafer702(if any) and that is subsequently collected by spectrophotometer720. Similarly, in some examples, a portion of infrared barrier718extends over optics module712. Such sizing/positioning of infrared barrier718can reduce (or more preferably, eliminate) an amount of infrared light from the one or more infrared heating lamps that passes in between infrared barrier718and optics module712(if any) and that is subsequently collected by spectrophotometer720. Spectrophotometer720is an infrared spectrophotometer. For example, spectrophotometer720can be a Fourier transform infrared (FTIR) spectrophotometer or a dispersive infrared spectrophotometer. In some examples, spectrophotometer720is an ultraviolet (UV) light spectrophotometer or an atomic spectrophotometer. In some examples, post-implantation station configuration700includes a monochromator instead of spectrophotometer720. In these examples, the monochromator is configured to receive emitted fluorescent light716(instead of spectrophotometer720) and measure/detect a narrow band of emitted fluorescent light716based on the wavelength of emitted fluorescent light716. For example, the monochromator can be configured to only measure/detect emitted fluorescent light716that falls within a predetermined wavelength or frequency range. In some examples, the narrow band of emitted fluorescent light716that the monochromator detects/measures is subsequently directed to amplifier722. Amplifier722is a lock-in amplifier configured to receive signals from spectrophotometer720, extract and/or amplify signals corresponding to fluorescent light detected by spectrophotometer720(i.e., from the signals received from spectrophotometer720), and provide the extracted fluorescent light signals to controller114. For example, the lock-in-amplifier can be used to extract and/or amplify a desired range of fluorescent light signals from the detected fluorescent light signals. In the examples described above wherein spectrophotometer720is replaced with a monochromator, amplifier722receives signals corresponding to detected fluorescent light from the monochromator and subsequently extracts and/or amplifies the desired fluorescent light signals from the received signals. During operation, wafer702is positioned at post-implantation station112(e.g., within the processing chamber of post-implantation station112) on wafer stage704. In some examples, wafer702is placed on a cooling E-chuck (e.g., in a high-temperature ion implantation process) instead of wafer stage704. Wafer702is similar or identical to wafer216described above with reference toFIG.2. In this case, wafer702is a silicon wafer. In some examples, wafer702is made of one or more other semiconductor materials, such as germanium, gallium arsenide, silicon carbide, gallium nitride, gallium phosphide, cadmium sulphide, and so forth. As shown inFIG.7, laser source708, a first portion of optical fiber710, and amplifier722are positioned outside of the processing chamber of post-implantation station112whereas wafer stage704, heating lamp housing706, a second portion of optical fiber710, infrared barrier718, and spectrophotometer720are positioned within the processing chamber of post-implantation station112. The above components of post-implantation station configuration700can be similarly positioned in the examples described above wherein post-implantation station112is located within load lock chamber(s)102or an auxiliary chamber. For example, if post-implantation station112is located within load lock chamber(s)102, laser source708, a first portion of optical fiber710, and amplifier722can be positioned outside of load lock chamber(s)102while wafer stage704, heating lamp housing706, a second portion of optical fiber710, infrared barrier718, and spectrophotometer720are positioned within load lock chamber(s)102. The photoluminescence of semiconductor materials (i.e., the emission of fluorescent light in response to the absorption of electromagnetic radiation (e.g., laser beam energy)) changes as a function of temperature. Thus, as will be explained in greater detail below, the photoluminescence method for determining a current temperature of a wafer utilizes this material characteristic of semiconductors to determine a current temperature of a semiconductor wafer (in this case, a silicon wafer) based on fluorescent light that the wafer emits in response to absorbing energy from a laser beam. In particular, as shown inFIG.7, laser source708generates laser beam714, which is directed to optics module712(within the processing chamber of post-implantation station112) by optical fiber710. The one or more lenses included in optics module712focus and reduce the spot size of laser beam714such that laser beam714only strikes a portion of an edge of wafer702(i.e., because the spot size is smaller than wafer702's thickness). For example, the one or more lenses can reduce the spot size of laser beam714such that laser beam714strikes an edge of wafer702in between an implant layer on the top of wafer702and a film layer on the bottom of wafer702(i.e., without directly striking the implant or film layers of wafer702). The one or more lenses of optic module712then direct laser beam714to an edge of wafer702. Note, in some examples, optics module712is configured and/or positioned to direct laser beam714to another portion of the wafer surface. For example, the optics module can be configured and/or positioned to direct laser beam714to a spot on a portion of the bottom surface of wafer702that is not in contact with wafer stage704(e.g., the portion of the bottom surface of wafer702that extends beyond wafer stage704). While laser beam714strikes the edge of wafer702, wafer702absorbs energy (i.e., electromagnetic radiation) from laser beam714and in response, emits fluorescent light716. In some examples, laser beam714strikes the edge of wafer714for a predetermined period of time. Spectrophotometer720detects emitted fluorescent light716, and provides a plurality of signals including one or more signals representing the detected fluorescent light to amplifier722. Then, amplifier722extracts the one or more signals representing the detected fluorescent light from the plurality of signals received from spectrophotometer720, and subsequently provides the one or more signals representing the detected fluorescent light to controller114. As shown, infrared barrier718is positioned between heating lamp housing706and spectrophotometer720. In some examples, infrared barrier718is held in this position using one or more support structures. For example, infrared barrier718can be held in the position shown inFIG.7by a support arm (having a first and second end) that is connected/attached to infrared barrier718at the first end and connected/attached to the processing chamber of post-implantation station112at the second end. As mentioned above, infrared barrier718reflects, absorbs, and/or blocks infrared light and thus reduces an amount of infrared light that passes through infrared barrier718. Thus, infrared barrier718reduces (or more preferably, eliminates) an amount of infrared light from the one or more infrared heating lamps that is collected by spectrophotometer720. Infrared light can create “noise” (e.g., additional/undesired intensity measurements) when spectrophotometer720measures an intensity and/or wavelength of emitted fluorescent light716. Thus, reducing (or more preferably, eliminating) an amount of infrared light that spectrophotometer720collects allows spectrophotometer720to more accurately measure an intensity and/or wavelength of transmitted laser beam716. After controller114receives the one or more signals representing the detected fluorescent light from amplifier722, controller114determines an intensity profile of the detected fluorescent light based on the one or more signals. Specifically, controller114determines an intensity profile (e.g., a bell curve) representing an intensity of the detected fluorescent light as a function of the detected fluorescent light's wavelength. As mentioned above, the photoluminescence of a silicon wafer changes as a function of temperature. Thus, as will be explained in greater detail below with respect toFIGS.12and13, controller114determines wafer702's current temperature based on a peak wavelength and/or a full width at half maximum (FWHM) of an intensity peak in the intensity profile described above, as the peak wavelength and FWHM of the intensity peak are each related to a current temperature of wafer702. As used herein, the peak wavelength of a detected fluorescent light intensity profile represents the wavelength at which the detected fluorescent light has the highest intensity. In other words, the peak wavelength of such an intensity profile is the wavelength corresponding to an amplitude of an intensity peak in the intensity profile. Further, as used herein, the FWHM of a detected fluorescent light intensity profile represents a width of an intensity peak in the intensity profile (i.e., on the x-axis of the intensity profile) at half of the maximum intensity (i.e., half of the intensity peak's amplitude). For example, if the peak intensity of an intensity peak is 1, the FWHM is the difference between the two wavelength measurements having an intensity of 0.5. Thus, if the two wavelength measurements having an intensity of 0.5 are 1100 nm and 1200 nm, the FWHM of the intensity profile is 100 nm (i.e., 1200 nm−1100 nm=100 nm). As mentioned above, the various temperature measurement components ofFIG.7(e.g., laser source708, optics module712, spectrophotometer720, amplifier722, etc.) can be configured to quickly and continuously acquire and provide the above information (e.g., one or more signals representing detected fluorescent light) as wafer702heats up/cools down such that controller114can continuously determine and provide a current wafer temperature. For example, once controller114generates an intensity profile of wafer702, controller114can once again begin cause laser source508to generate laser beam714(and spectrophotometer720can continue detecting emitted fluorescent light716) in order to determine another intensity profile representing a normalized intensity of the detected fluorescent light as a function of the detected fluorescent light's wavelength. In this manner, controller114can continually determine intensity profiles representing detected fluorescent light and thus continually determine wafer702's current temperature until wafer702reaches a desired temperature. Note, whileFIG.7illustrates infrared barrier718positioned between heating lamp housing706and wafer702, in some examples, infrared barrier718is positioned proximate to (e.g., directly above) spectrophotometer720(or an input end of a second optical fiber described in greater detail below). In these examples, infrared barrier718is a filter that transmits emitted fluorescent light716but reflects, blocks, and/or absorbs infrared light generated by the one or more infrared heating lamps of infrared heating lamp housing706. In some examples, the filter is a dielectric mirror, such as a broadband hot mirror filter. In other examples, the filter is a dichroic mirror, such as a longpass dichroic mirror filter. For example, if a wavelength of emitted fluorescent light716is expected to range from 900 nm to 1400 nm, infrared barrier718can be a broadband hot mirror filter or a longpass dichroic mirror filter that transmits infrared light having a wavelength between 900 nm and 1400 nm while reflecting, blocking, and/or absorbing the infrared light generated by the one or more infrared heating lamps. Note, in these examples, in order for the filter to successfully reduce an amount of infrared light generated by the one or more infrared heating lamps that spectrophotometer720(or the input end of the second optical fiber) collects, a wavelength spectrum of the infrared light generated by the one or more heating lamps should not overlap with the wavelength range that the filter transmits, as this could result in the filter transmitting the infrared light generated by the one or more infrared heating lamps. For example, in the example above wherein the broadband hot mirror filter/longpass dichroic mirror filter transmits infrared light having a wavelength between 900 nm and 1400 nm, the one or more heating lamps should only generate infrared light that does not have a wavelength between 900 nm and 1400 nm. In some examples, post-implantation configuration700does not include infrared barrier718. In these examples, post-implantation configuration700utilizes other components and/or processes to reduce an amount of infrared light that spectrophotometer720(or a monochromator) collects when collecting emitted fluorescent light716. For example, controller114can be communicatively connected to heating lamp housing506(and thus the one or more infrared heating lamps included therein) such that controller114can be configured to turn off the one or more infrared heating lamps while spectrophotometer720(or a monochromator) collects emitted fluorescent light716(e.g., as will be described in greater detail below with reference to step812ofFIG.8). As another example, optics module712can include an optical chopper that changes a frequency of a laser beam generated by laser source708such that laser beam714strikes wafer702at the frequency set by the chopper. In some examples, the frequency of laser beam714that the chopper sets is predetermined and is maintained throughout the temperature-measurement process. When laser beam714strikes wafer702at the frequency set by the chopper, emitted fluorescent light716will also have the same frequency. Thus, in these examples, spectrophotometer720(or a monochromator) will be configured to only detect/measure the intensity of light that is at the frequency set by the chopper. Similarly, in these examples, amplifier722is configured to extract and/or amplify detected fluorescent light signals (received from spectrophotometer720(or a monochromator)) having the frequency set by the chopper. This in turn prevents spectrophotometer720(or a monochromator) and/or amplifier722from detecting, measuring, extracting, and/or amplifying infrared light from the one or more heating lamps and/or light from the environment (e.g., because the infrared light/environment light do not have the same frequency as emitted fluorescent light716). In other words, using a chopper in this manner filters out unwanted infrared light and/or environment light. Note, in some examples, post-implantation configuration700utilizes the above components and/or processes to reduce an amount of infrared light that spectrophotometer720(or a monochromator) collects when collecting emitted fluorescent light716in addition to infrared barrier718. Moreover, whileFIG.7illustrates spectrophotometer720positioned within the processing chamber of post-implantation station112and proximate to wafer702, in some examples, spectrophotometer720(or a monochromator) is positioned outside of the processing chamber of post-implantation station112(or load lock chamber(s)102/the auxiliary chamber when post-implantation station112is positioned therein). In these examples, an input end of a second optical fiber is positioned proximate to wafer702(e.g., proximate to an edge and/or side of wafer702) and an output end of the second optical fiber is connected to spectrophotometer720(or a monochromator), such that a first portion of the second optical fiber is within the processing chamber and a second portion of the optical fiber is outside of the processing chamber. The input end of the second optical fiber faces towards (or in the general direction of) the predefined location on the wafer (i.e., where laser beam714strikes wafer702) so that the second optical fiber collects emitted fluorescent light716(i.e., via the input end). In some examples, the second optical fiber directs emitted fluorescent light716to spectrophotometer720positioned outside of the processing chamber (or a monochromator positioned outside of the processing chamber) and provides emitted fluorescent light716to spectrophotometer720(e.g., via the output end). Spectrophotometer720(or a monochromator) then detects emitted fluorescent light716and generates one or more signals representing emitted fluorescent light716as described above. Moreover, as mentioned above with reference toFIG.1, in some examples, post-implantation station112includes a cooling E-chuck and/or a coolant release valve that are configured to cool a wafer (e.g., in high-temperature ion implantation process). In these examples, post-implantation configuration700does not include infrared barrier718and heating lamp housing706(or the one or more infrared heating lamps included therein). Further, in the examples where post-implantation station112includes a cooling E-chuck, post-implantation configuration700does not include wafer stage704. Rather, in these examples, wafer702is positioned on the cooling E-chuck (similarly to how wafer702is positioned on wafer stage704) in order for the cooling E-chuck to cool the wafer. However, despite the above alterations to post-implantation station configuration700in these examples, a current temperature of wafer702is still determined according to the process described above (and described in greater detail below with reference toFIGS.12and13). Returning toFIG.1, as mentioned above, ion implantation system100further includes controller114. Controller114can be implemented on one or more standalone data processing devices or a distributed network of computers. Further, although controller114is illustrated as a single controller inFIG.1, one of ordinary skill in the art would appreciate that controller114can include any number of controllers necessary to perform the controller114processes and functions disclosed herein. As shown, controller114includes memory116, processor(s)118, and input/output (I/O) interface120. I/O interface120facilitates input and output processing for controller114. For example, I/O interface120can facilitate input and output processing for one or more input devices (e.g., a keyboard, mouse, etc.) and/or one or more output devices (e.g., a display) that are communicatively connected to controller114(e.g., via one or more wired connections) and that an operator of ion implantation system100can use to observe and control the processes and functions of controller114. Processor(s)118utilize memory116to execute the instructions stored therein. In some examples, memory116includes random access memory (RAM), including but not limited to volatile RAM (e.g., DRAM, SRAM) and non-volatile RAM (e.g., NAND). In some examples, memory116further includes computer-readable storage media. In some examples, the computer-readable storage media are tangible and non-transitory. For example, memory116can include high-speed random access memory and can also include non-volatile memory, such as one or more magnetic disk storage devices, flash memory devices, or other non-volatile solid-state memory devices. In some examples, the computer-readable storage media of memory116store one or more programs for execution by processor(s)118, the one or more programs including instructions for performing any of the methods and processes described herein (e.g., with reference toFIGS.8-14). FIG.8illustrates a process for measuring a temperature of a wafer within an ion implantation system, according to various examples. In some examples, process800is performed by a system similar or identical to system100, described above with reference toFIGS.1-7. Process800is described below with simultaneous reference toFIGS.1-7. Note, whileFIG.8illustrates a process wherein a wafer temperature is determined only at a post-implantation station, in some examples, a wafer temperature is determined at a pre-implantation station (e.g., as described in greater detail below with reference toFIG.14). At step802, process800causes a controller (e.g., controller114) to control a robotic arm (e.g., robotic arm104) to transfer a wafer (e.g., wafer216,402,420,502,602, or702) from a load lock chamber (e.g., load lock chamber(s)102) to a pre-implantation station (e.g., pre-implantation station108). For example, the robotic can position the wafer on a wafer stage located within a processing chamber of the pre-implantation station. As another example, in a low-temperature ion implantation process, the robotic arm can position the wafer on a cooling S-chuck located within the processing chamber of the pre-implantation station. After the robotic arm positions the wafer at the pre-implantation station, at step804, process800causes the controller to control the pre-implantation station to heat or cool the wafer to a first predetermined temperature. In some examples, process800causes the controller to control the pre-implantation station to heat the wafer to a first predetermined temperature (e.g., to 300 degrees Celsius). For example, process800can cause the controller to control one or more infrared heating lamps (e.g., infrared heating lamps308) located within the processing chamber of the pre-implantation station to heat the wafer to the first predetermined temperature. In other examples, process800causes the controller to control the pre-implantation station to cool the wafer to a first predetermined temperature (e.g., −100 to 0 degrees Celsius). For example, process800can cause the controller to control the cooling E-chuck mentioned above and/or a coolant release valve within the processing chamber of the pre-implantation station to cool the wafer to the first predetermined temperature. At step806, process800causes the controller to control the robotic arm to transfer the wafer (while at the first predetermined temperature) to an ion implanter (e.g., ion implanter200). For example, process800can cause the controller to control the robotic arm to position the wafer on a wafer support structure (e.g., wafer support structure218) within a processing chamber of the ion implanter (e.g., processing chamber110). The robotic arm can quickly transfer the wafer to the ion implanter such that the wafer is still at the first predetermined temperature when positioned on the wafer support structure. At step808, process800causes the controller to control the ion implanter to implant the wafer with ions from an ion beam (e.g., ion beam205). For example, process800can cause the controller to control the ion implanter to generate the ion beam and direct the ion beam to the wafer. Process800can also cause the controller to control the wafer support structure to translate and/or rotate in one or more directions such that the ion beam is scanned across the wafer. In some examples, the ion implanter implants the wafer with ions while the wafer is maintained at, or approximately at, the first predetermined temperature (e.g., within 1 degrees Celsius of the first predetermined temperature). For example, the ion implanter can quickly implant the wafer with ions (e.g., in several seconds) such that the wafer is still at the first predetermined temperature when the ion implantation is complete. After the wafer is implanted with ions at the ion implanter, at step810, process800causes the controller to control the robotic arm to transfer the implanted wafer to a post-implantation station (e.g., post-implantation station112). For example, process800can cause the controller to control the robotic arm to position the wafer on a wafer stage (e.g., wafer stage504,604,704, etc.). Alternatively, process800can cause the controller to control the robotic arm to position the wafer on a cooling E-chuck. In some examples, the post-implantation station includes a processing chamber. In these examples, the wafer stage or cooling E-chuck are positioned within the processing chamber. In some examples, the post-implantation station is located within a load lock chamber (e.g., load lock chamber(s)102), and thus the wafer stage or cooling E-chuck are positioned within the load lock chamber. For example, the wafer stage or cooling E-chuck can be located within the initial load lock chamber from which the robotic arm removed the wafer at step802(or another load lock chamber adjacent to the initial load lock chamber). In some examples, the post-implantation station is located within an auxiliary chamber of a load lock chamber, and thus the wafer stage or cooling E-chuck are positioned within the auxiliary chamber. In these examples, process800causes the controller to control the robotic arm to position the wafer within the load lock chamber. Then, a robotic arm of the load lock chamber transfers the wafer to the auxiliary chamber and positions the wafer on the wafer stage or cooling E-chuck. In some examples, the wafer is positioned at the post-implantation station while the wafer is still at the first predetermined temperature. For example, as mentioned above, the wafer can still be at the first predetermined temperature after the wafer is implanted with ions. Thus, in these examples, the robotic arm can quickly transfer the implanted wafer to the post-implantation station such that the wafer is still at the first predetermined temperature when positioned on the wafer stage or cooling E-chuck. After the wafer is transferred to the post-implantation station, at step812, process800causes the controller to control the post-implantation station to heat or cool the wafer. In some examples (e.g., in a low-temperature ion implantation process), process800causes the controller to control the post-implantation station to heat the wafer to a second predetermined temperature (e.g., ambient temperature). For example, process800can cause the controller to control one or more infrared heating lamps (e.g., infrared heating lamps308) of the post-implantation station (e.g., located within the processing chamber, load lock chamber, or auxiliary chamber) to heat the wafer from the first predetermined temperature (e.g., −60 degrees Celsius) to ambient temperature (e.g., 20 to 25 degrees Celsius). In other examples (e.g., in a high-temperature ion implantation process), process800causes the controller to control the post-implantation station to cool the wafer to a second predetermined temperature (e.g., ambient temperature). For example, process800can cause the controller to control a cooling E-chuck and/or a coolant release valve of the post-implantation station (e.g., located within the processing chamber, load lock chamber, or auxiliary chamber) to cool the wafer from the first predetermined temperature (e.g., 200 degrees Celsius) to ambient temperature. In some examples, after the robotic arm transfers the wafer to the post-implantation station and before process800causes the controller to control the post-implantation station to heat or cool the wafer, process800causes the controller to control the post-implantation station (e.g., the temperature measurement components of the post-implantation station) to determine a reference wafer temperature. In these examples, the reference wafer temperature is the wafer's current temperature after being implanted with ions at the ion implanter. In some examples, process800causes the controller to determine the reference wafer temperature using one or more of the single-laser method (e.g., process900), the bandgap method (e.g., process1000), the capacitance method (e.g., process1100), and the photoluminescence method (e.g., process1200), which are described in greater detail below with reference toFIGS.9-13. After the wafer is heated or cooled at the post-implantation station, at step814, process800causes the controller to determine a current temperature of the wafer. In some examples, process800causes the controller to determine the current temperature of the wafer after the wafer is heated or cooled at the post-implantation station for a predetermined period of time (e.g., 1 second, 2 seconds, 5 seconds, etc.). In some examples, process800causes the controller to periodically determine a current temperature (e.g., every 0.5 seconds, every 2 seconds, etc.) after the wafer is heated or cooled at the post-implantation station for a predetermined period of time (e.g., 1 second, 2 seconds, 5 seconds, etc.). For example, after the wafer is heated at the post-implantation station for 2 seconds, process800can thereafter cause the controller to determine a current temperature of the wafer every second. In some examples, process800causes the controller to continually determine the current temperature of the wafer after the wafer is heated or cooled at the post-implantation station for a predetermined period of time (e.g., 1 second, 2 seconds, 5 seconds, etc.) and until the wafer reaches a predetermined target temperature. In some examples, process800causes the controller to determine the current temperature of the wafer while the wafer is heated or cooled at the post-implantation station. For example, after one or more infrared heating lamps of the post-implantation heat the wafer for a predetermined period of time, process800can cause the controller to determine the current temperature of the wafer while the one or more infrared heating lamps continue to heat the wafer. In other examples, process800causes the controller to control the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station to cease heating or cooling the wafer while the controller determines the current temperature of the wafer. For example, process800can cause the controller to turn off the one or more infrared heating lamps or stop the flow of coolant to the cooling E-chuck and/or coolant release valve. In these examples, after the controller determines the current temperature of the wafer (which can take less than a second), process800can cause the controller to control the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station to continue (i.e., resume) heating or cooling the wafer. For example, process800can cause the controller to turn on the one or more infrared heating lamps or resume the flow of coolant to the cooling E-chuck and/or coolant release valve. In some examples, ceasing to heat or cool the wafer while the controller determines the current temperature of the wafer allows the controller to more accurately determine the current temperature of the wafer. For example, as described above with reference toFIGS.5and7, infrared light from the one or more infrared heating lamps of the post-implantation station can create unwanted “noise” (e.g., unwanted infrared light intensity and/or wavelength measurements) when determining the current temperature of the wafer based on a bandgap method (e.g., process1000) and/or a photoluminescence method (e.g., process1200). The unwanted noise can subsequently lead to inaccurate current temperature determinations, as the bandgap and photoluminescence methods both utilize infrared light intensity and/or wavelength measurements to determine a current temperature of the wafer. Thus, ceasing to heat the wafer with the one or more infrared heating lamps in these examples can prevent a photodetector (e.g., photodetector518) and/or a spectrophotometer (e.g., spectrophotometer720) of the post-implantation station from collecting/detecting infrared light from the one or more heating lamps (and subsequently generating the unwanted noise mentioned above) while the controller determines the current temperature of the wafer based on the bandgap method and/or the photoluminescence method, respectively. Process800causes the controller to determine the current temperature of the wafer at step814based on one or more of a single-laser method (e.g., process900), a bandgap method (e.g., process1000), a capacitance method (e.g., process1100), and/or a photoluminescence method (e.g., process1200).FIGS.9-12illustrate the various processes for determining the current temperature of the wafer based on each the above methods. FIG.9illustrates a process for determining a temperature of a wafer at a post-implantation station using a single laser method, according to various examples. In some examples, a controller performs process900using a post-implantation station configuration similar or identical to post-implantation station configuration400, described above with reference toFIG.4. Process900is described below with simultaneous reference toFIG.4. At step902, process900causes a controller (e.g., controller114) to control a laser source (e.g., laser source406) to direct a first laser beam (e.g., laser beam412) from the laser source at a first position (e.g., Position 1) to a first point on an edge of a wafer (e.g., wafer402/expanded wafer420). In particular, the laser source directs the first laser beam along a path that is parallel to a y-axis (e.g., Y-Axis418). At step904, process900causes the controller to determine a first distance from the first position of the laser source to the first point on the edge of the wafer based on detecting a reflection of the first laser beam (e.g., laser beam414A or414B) using a laser sensor (e.g., laser sensor408) of the post-implantation station. In particular, process900causes the controller to determine the first distance based on an amount of time it takes for the first laser beam to reflect off of the first point on the edge of the wafer and return to the laser sensor. The controller defines the first distance as a coordinate on the y-axis (e.g., d1) and the first position of the laser source as a coordinate on an x-axis (e.g., X-Axis416) such that the first point on the edge of the wafer is defined as a coordinate with x and y dimensions (e.g., 0, d1). For example, the controller can define the first point on the edge of the wafer as (0.3 cm), with “0” representing the laser source's first position on the x-axis and “3 cm” representing the distance from the laser source to the first point on the edge of the wafer. Note, whileFIG.4illustrates Position 1 as having an x-axis coordinate value of 0, in some examples, the controller defines the first position of the laser source as an x-axis coordinate having a value other than 0. For example, the controller can define the first point on the edge of the wafer as (1 cm, 3 cm). After determining the first distance, the controller controls a laser unit (e.g., laser unit410) that includes the laser source and laser sensor to move along a laser unit track from the first position to a second position (e.g., Position 2). In particular, the laser unit moves along the laser unit track in a straight line that is parallel to the x-axis. At step906, process900causes the controller to control the laser source to direct a second laser beam from the laser source at the second position to a second point on the edge of the wafer. As with the first laser beam, the laser source directs the second laser beam along a path that is parallel to the y-axis. At step908, process900causes the controller to determine a second distance from the second position of the laser source to the second point on the edge of the wafer based on detecting a reflection of the second laser beam using the laser sensor. In particular, process900causes the controller to determine the second distance based on an amount of time it takes for the second laser beam to reflect off of the second point on the edge of the wafer and return to the laser sensor. The controller defines the second distance as a coordinate on the y-axis (e.g., d2) and the second position of the laser source as a coordinate on the x-axis (e.g., P2x) such that the second point on the edge of the wafer is defined as a coordinate with x and y dimensions (e.g., P2x, d2). For example, the controller can define the second point on the edge of the wafer as (7 cm, 1.5 cm), with “7 cm” representing the laser source's second position on the x-axis and “1.5 cm” representing the distance from the laser source to the second point on the edge of the wafer. After determining the second distance, the controller controls the laser unit to move along the laser unit track from the second position to a third position (e.g., Position 3). At step910, process900causes the controller to control the laser source to direct a third laser beam from the laser source at the third position to a third point on the edge of the wafer. At step912, process900causes the controller to determine a third distance from the third position of the laser source to the third point on the edge of the wafer based on detecting a reflection of the third laser beam using the laser sensor. In particular, process900causes the controller to determine the third distance based on an amount of time it takes for the third laser beam to reflect off of the third point on the edge of the wafer and return to the laser sensor. The controller defines the third distance as a coordinate on the y-axis (e.g., d3) and the third position of the laser source as a coordinate on the x-axis (e.g., P3x) such that the third point on the edge of the wafer is defined as a coordinate with x and y dimensions (e.g., P3x, d3). For example, the controller can define the third point on the edge of the wafer as (10 cm, 1.2 cm), with “10 cm” representing the laser source's third position on the x-axis and “1.2 cm” representing the distance from the laser source to the third point on the edge of the wafer. At step914, process900causes the controller to determine a current diameter of the wafer based at least on the first distance, second distance, and third distance (e.g., y1, y2, and y3determined at steps904,908, and912, respectively). In particular, the controller first uses the three coordinate pairs defining the three points on the edge of the wafer and equations (1) and (2) shown below to determine a center point of the wafer (e.g., an x coordinate and y coordinate defining the center point of the wafer). x=(x12+y12)(y2-y3)+(x22+y22)(y3-y1)+(x32+y32)(y1-y2)2(x1(y2-y3)-y1(x2-x3)+x2y3-x3y2)(1)y=(x12+y12)(x3-x2)+(x22+y22)(x1-x3)+(x32+y32)(x2-x1)2(x1(y2-y3)-y1(x2-x3)+x2y3-x3y2)(2) As shown in equations (1) and (2), “x” represents the x coordinate of the center point of the wafer and “y” represents the y coordinate of the center point of the wafer. Further, “x1” and “y1” represent the x and y coordinates defining the first point on the edge of the wafer, “x2” and “y2” represent the x and y coordinates defining the second point on the edge of the wafer, and “x3” and “y3” represent the x and y coordinates defining the third point on the edge of the wafer. Thus, the controller uses equation (1) to determine the x coordinate of the center point and equation (2) to determine the y coordinate of the center point. After the controller determines the coordinate pair defining the center point of the wafer (e.g., x, y), the controller determines the current diameter of the wafer using the coordinate pair defining the center point and equation (3) shown below. r=√{square root over ((x−x1)2+(y−y1)2)} (3) As shown in equation (3), “r” represents the current radius of the wafer, “x” represents the x coordinate of the center point, “y” represents the y coordinate of the center point, “x1” represents the x coordinate of the first point on the edge of the wafer, and “y1” represents the y coordinate of the first point on the edge of the wafer. Thus, the controller uses equation (3) to determine the current radius of the wafer. The controller then determines the current diameter of the wafer by multiplying the current radius by two (i.e., current wafer diameter=2×r). At step916, process900causes the controller to determine a current temperature of the wafer based on the determined current diameter of the wafer. In particular, as described above with reference toFIG.4, this step in the single-laser method for determining a current temperature of a wafer (e.g., process900) utilizes the material characteristic of semiconductors (e.g., silicon, gallium arsenide, etc.) to change size based on temperature. Specifically, the dimensions (e.g., length, width, diameter, thickness, etc.) of semiconductor materials increase in size as the material heats up and decrease in size as the material cools down. The coefficient of linear thermal expansion of a semiconductor material represents the extent to which the dimensions of that specific semiconductor material change in response to a change in temperature. Thus, the controller uses the coefficient of linear thermal expansion of a wafer's semiconductor material, the change in the wafer's diameter, and equation (4) below to determine a current temperature of a wafer. ΔL=Lc−L0=α×L0×(Tc−T0) (4) As shown in equation (4), “ΔL” represents the change in a wafer's diameter, with “Lc” representing the wafer's current diameter and “L0” representing a reference diameter of the wafer. Further, “α” represents the coefficient of linear thermal expansion of the wafer's semiconductor material. For example, if the wafer is made of silicon, α would be the coefficient of linear thermal expansion of silicon (i.e., 2.6×10−6° C.−1). Lastly, “Tc” represents the wafer's current temperature and “To” represents the wafer's reference temperature (i.e., the wafer's temperature corresponding to the wafer's reference diameter). In some examples, the reference temperature of the wafer (T0) is the second predetermined temperature (e.g., the final temperature that the wafer will be heated/cooled to at post-implantation station112discussed above with reference to step812ofFIG.8). In these examples, the reference diameter of the wafer (L0) is the wafer's diameter corresponding to the second predetermined temperature. In some examples, the wafer's diameter corresponding to the second predetermined temperature is a predetermined average diameter of one or more similar wafers at the second predetermined temperature. In these examples, the one or more similar wafers can be wafers that are made of the same material as the wafer and that have the same size (or nearly the same size) as the wafer at ambient temperature. For example, if the second predetermined temperature is 25 degrees Celsius, the wafer's diameter corresponding to the second predetermined temperature can be a predetermined average diameter of one or more silicon wafers at 25 degrees Celsius. The controller can then use this predetermined average wafer diameter at 25 degrees Celsius as the reference diameter for equation (4). In other examples, the wafer's diameter corresponding to the second predetermined temperature is determined prior to the wafer undergoing an ion implantation process (e.g., prior to the wafer being placed in a load lock chamber). For example, if the second predetermined temperature is 20 degrees Celsius, an operator of an ion implantation system in which the wafer is to undergo an ion implantation process can measure the wafer's diameter before the wafer undergoes the ion implantation process and while the wafer is at 20 degrees Celsius. The controller can then use this measured wafer diameter at 20 degrees Celsius as the reference diameter for equation (4). In yet other examples, the controller determines the wafer's diameter corresponding to the second predetermined temperature before the wafer is heated or cooled at a pre-implantation station (e.g., pre-implantation station108). In these examples, the wafer is kept at the second predetermined temperature prior to the wafer being placed in a load lock chamber (e.g., load lock chamber(s)102). Soon after the wafer is placed in the load lock chamber and before process800causes the controller to control a robotic arm (e.g., robotic arm104) to transfer the wafer to the pre-implantation station (e.g., at step802ofFIG.8), the controller controls the robotic arm to transfer the wafer to a post-implantation station (e.g., post-implantation station112). Because the wafer is quickly transferred to the post-implantation station after being kept at the second predetermined temperature, it is assumed that the wafer is still at the second predetermined temperature when the robotic arm positions the wafer at the post-implantation station. Then, without heating or cooling the wafer at the post-implantation station, the controller performs steps902-914of process900described above to determine the wafer's diameter. For example, the controller can control the various temperature measurement components of the post-implantation station (e.g., post-implantation station configuration400) to measure/determine a first reference distance, a second reference distance, and a third reference distance in the same manner that the controller controls the temperature measurement components to measure/determine the first distance, the second distance, and the third distance at steps902-912of process900. Then, the controller can determine the wafer's diameter based at least on the first reference distance, second reference distance, and third reference distance in the same manner that the controller determines the current wafer diameter based on the first distance, second distance, and third distance at step914of process900. The controller then uses this determined wafer diameter as the reference diameter for equation (4). In the examples described above wherein the reference temperature of the wafer (T0) is the second predetermined temperature, the controller uses equation (4) to solve for the wafer's current temperature (Tc). In particular, since the controller will have values for the current wafer diameter (Lc) (e.g., determined at step914), the reference wafer diameter (L0), the reference wafer temperature (T0) (e.g., the second predetermined temperature), and the coefficient of linear thermal expansion for the wafer material (α), the controller can solve for the current wafer temperature (Tc), as it is the only remaining unknown variable of equation (4). In some examples, the reference temperature of the wafer (T0) is the wafer's temperature after being implanted with ions at the ion implanter and prior to any heating or cooling at the post-implantation station. In some examples, it is assumed that the implanted wafer is still at the temperature it was heated or cooled to in the pre-implantation station (e.g., the first predetermined temperature discussed above with reference to step804ofFIG.8) after the robotic arm positions the implanted wafer at the post-implantation station because it only takes several seconds (e.g., 10 seconds) to implant the wafer with ions after the wafer is heated or cooled at the pre-implantation station. For example, if a wafer is cooled to −60 degrees Celsius in the pre-implantation station, it is assumed that the wafer is still at −60 degrees Celsius when a robotic arm positions the wafer at the post-implantation station. Thus, in this case, the reference temperature of the wafer would be −60 degrees Celsius. In the examples described above wherein the reference temperature of the wafer (T0) is the wafer's temperature after being implanted with ions at the ion implanter and prior to any heating or cooling at the post-implantation station, the controller determines a reference wafer diameter (L0) after the robotic arm transfers the wafer to the post-implantation station (e.g., after step810ofFIG.8) and before the wafer is heated or cooled at the post-implantation station (e.g., before step812ofFIG.8). In particular, the controller determines the reference wafer diameter by performing steps902-914of process900described above before any heating or cooling of the wafer occurs. For example, the controller can control the various temperature measurement components of the post-implantation station (e.g., post-implantation station configuration400) to measure/determine a first reference distance, a second reference distance, and a third reference distance in the same manner that the controller controls the temperature measurement components to measure/determine the first distance, second distance, and third distance at steps902-912of process900. Then, the controller can determine the reference wafer diameter based at least on the first reference distance, second reference distance, and third reference distance in the same manner that the controller determines the current wafer diameter based at least on the first distance, second distance, and third distance at step914of process900. After the controller determines the reference wafer diameter (corresponding to the wafer's temperature after being implanted with ions at the ion implanter), the controller controls the post-implantation station to begin heating or cooling the wafer (e.g., as described above with reference to step812ofFIG.8). Then, after the post-implantation station heats or cools the wafer (e.g., for a predetermined period of time), the controller once again performs steps902-914of process900described above to determine a current wafer diameter (Lc). The controller then uses equation (4) to solve for the wafer's current temperature (Tc). In particular, since the controller will have values for the current wafer diameter (Lc), the reference wafer diameter (L0), the reference wafer temperature (T0) (e.g., the assumed wafer temperature corresponding to the determined reference wafer diameter), and the coefficient of linear thermal expansion for the wafer material (α), the controller can solve for the current wafer temperature (Tc), as it is the only remaining unknown variable of equation (4). Once the controller determines a current temperature of a wafer at step916, the controller can return to process800and perform steps816,818,820, and/or822as will be described in greater detail below with reference toFIG.8. It should be appreciated that some steps in process900may be combined, the order of some steps can be changed, and some steps can be omitted. Further, it should be appreciated that additional steps may be performed. FIG.10illustrates a process for determining a temperature of a wafer at a post-implantation station using a bandgap method, according to various examples. In some examples, a controller performs process1000using a post-implantation station configuration similar or identical to post-implantation station configuration500, described above with reference to FIG. Process1000is described below with simultaneous reference toFIG.5. At step1002, process1000causes a controller (e.g., controller114) to control a laser source (e.g., laser source508) to direct a laser beam (e.g., laser beam514) to a first side (e.g., a top or bottom surface) of a wafer (e.g., wafer502). As shown inFIG.5, in some examples, process1000causes the controller to control the laser source to direct the laser beam to an input end of an optical fiber (e.g., optical fiber510). The optical fiber then directs the laser beam to the first side of the wafer (e.g., via an output end of the optical fiber). Further, as will be discussed below with reference to step1006, when the laser beam strikes the first side of the wafer, it travels through the wafer and is transmitted from a second side (e.g., a top or bottom surface) of the wafer. Note, as mentioned above with reference to step812ofFIG.8, in some examples, the controller controls the post-implantation station to cease heating or cooling the wafer while the controller determines the current temperature of the wafer. With respect to process1000, in some examples, the controller controls the post-implantation station to cease heating or cooling the wafer once the controller controls the laser source to direct the laser beam to the first side of the wafer (or the input end of the optical fiber). In some examples, the controller does not control the post-implantation to resume heating or cooling the wafer until after step1008,1010, or1012(described in greater detail below). For example, the controller can control the post-implantation to resume heating or cooling the wafer once the controller generates a wafer absorption profile at step1008. At step1004, process1000causes the controller to control the laser source to vary a frequency of the laser beam across a predefined frequency range while the laser source (or the optical fiber) directs the laser beam at the first side of the wafer. In other words, process1000causes the controller to control the laser source to vary the frequency of the laser beam while the laser beam strikes the first side of the wafer. For example, the predefined frequency range can include, or fall within, 2.72×1014Hz to 2.76×1014Hz. In some examples, after the controller has controlled the laser source to vary the frequency of the laser beam across the entire predefined frequency range, the controller controls the laser source to cease directing the laser beam at the first side of the wafer (or the input end of the optical fiber). At step1006, process1000causes the controller to obtain data representing an intensity of the transmitted laser beam from a photodetector (e.g., photodetector518) proximate to the second side of the wafer. In particular, as mentioned above, when the laser beam strikes the first side of the wafer, it travels through the wafer and is transmitted from the second side of the wafer. As shown inFIG.5, the photodetector is positioned proximate to the second side of the wafer such that the photodetector receives/detects the transmitted laser beam and measures the transmitted laser beam's intensity. The photodetector subsequently provides data representing the measured intensity of the transmitted laser beam to the controller. At step1008, process1000causes the controller to generate an absorption profile of the wafer across the predefined frequency range based on the data representing the intensity of the transmitted laser beam. In particular, as the laser source varies the frequency of the laser beam, the intensity of the transmitted laser beam will also vary. The intensity of the transmitted laser beam varies because the amount of laser energy from the laser beam that the wafer absorbs is based in part on the frequency of the laser beam. For example, the wafer may absorb less laser energy when the laser beam is at a lower frequency (e.g., 2.72×1014Hz) compared to when the laser beam is at a higher frequency (e.g., 2.76×1014Hz). Further, because the intensity of the transmitted laser beam is inversely related to the amount of laser energy the wafer absorbs, the transmitted laser beam in the example above will have a higher intensity when the laser beam is at the lower frequency (i.e., since the wafer absorbs less laser energy at the lower frequency). Thus, in some examples, the absorption profile correlates the varying transmitted laser beam intensity to a corresponding laser beam frequency across the predefined frequency range. In other words, the absorption profile includes a transmitted laser beam intensity value for one or more (or all) frequency values within the predefined frequency range that the laser source sets the frequency of the laser beam to. At step1010, process1000causes the controller to determine a frequency corresponding to a current bandgap value of the wafer based on the absorption profile of the wafer. As described above with reference toFIG.5, the bandgap (also known as the band gap energy or energy gap) of a semiconductor material (e.g., silicon, gallium arsenide, etc.) changes as a function of temperature. Specifically, the bandgap of semiconductor materials (measured in electron volts (eV)) decreases as the temperature of the semiconductor materials increases. Moreover, the bandgap of semiconductor materials affects how the semiconductor materials absorb laser energy from a laser beam. Specifically, there is a noticeable change in a semiconductor material's absorption of laser energy from a laser beam when the frequency of the laser beam reaches the frequency corresponding to the semiconductor's current bandgap value (i.e., the bandgap frequency). Thus, as the semiconductor material's temperature changes, the semiconductor material's bandgap and bandgap frequency will also change. Steps1010and1012of the bandgap method for determining a current temperature of a wafer (e.g., process1000) utilize the above material characteristics of semiconductor materials to determine a current temperature of a semiconductor wafer. In particular, the controller uses the absorption profile (e.g., generated at step1008) to determine the frequency at which there is a noticeable change in the wafer's absorption of the laser beam's energy, as that frequency corresponds to the wafer's current bandgap. For example, if at step1004, the controller tunes the laser source to scan the frequency of the laser beam from below the wafer's bandgap frequency to above the wafer's bandgap frequency, the absorption profile will indicate a low absorption by the wafer (i.e., a high transmitted laser beam intensity) when the laser source is tuned to a frequency below the wafer's bandgap frequency. However, the absorption profile will indicate a dramatic increase in the wafer's absorption of the laser beam (i.e., a dramatic decrease in the intensity of the transmitted laser beam) once the laser source is tuned to a frequency that exceeds the wafer's bandgap frequency. The laser source's frequency at the point of the dramatic increase in the wafer's absorption of the laser beam represents the bandgap frequency of the wafer at the wafer's current temperature. After the controller determines the bandgap frequency of the wafer, at step1012, process1000causes the controller to determine a current temperature of the wafer corresponding to the determined bandgap frequency. In particular, the controller uses known temperature and bandgap frequency relationships for silicon, such as those illustrated in table (1) below, to determine a temperature corresponding to the wafer's current bandgap frequency. For example, if the controller determines that the wafer's current bandgap frequency is 2.73×1014Hz (e.g., at step1010), the controller can use the known temperature and bandgap frequency relationships for silicon shown in table (1) to determine that the wafer's current temperature is 0 degrees Celsius. TABLE (1)Si BandgapTemperatureTempWavelengthFrequency(eV)(° K.)(° C.)(nm)(Hz)1.122290014293201104.8837512.72E+141.12721868327301100.0527392.73E+141.131943468253−201095.4610682.74E+141.136450291233−401091.1167962.75E+141.13861721223−501089.0402762.75E+141.140723749213−601087.0291792.76E+141.142767751203−701085.0848732.76E+14 Note, temperature and bandgap frequency relationships can vary between different semiconductor materials. Thus, while table (1) only includes temperature/bandgap frequency relationships for silicon, in some examples, the controller uses known temperature and bandgap frequency relationships for other semiconductor materials based on the one or more semiconductor materials of which the wafer is made. For example, if the wafer is made of gallium arsenide, the controller can use known temperature and bandgap frequency relationships for gallium arsenide to determine a current temperature of the wafer. Further, in some examples, the controller can determine a wavelength corresponding to the determined bandgap frequency (since wavelength and frequency are directly related) and subsequently determine the wafer's current temperature based on the determined bandgap wavelength. For example, this bandgap wavelength determination may be preferable when bandgap frequencies of a semiconductor material for a range of temperatures (e.g., 20 to −70 degrees Celsius) fall within a narrow range (such as the frequencies shown above in table (1)). As mentioned above with reference to step812ofFIG.8, in some examples, after the robotic arm transfers the wafer to the post-implantation station and before the controller controls the post-implantation station to heat or cool the wafer, the controller controls the post-implantation station to determine a reference wafer temperature. In some examples, the controller determines a reference wafer temperature by performing steps1002-1012of process1000described above before any heating or cooling of the wafer occurs. For example, the controller can control various temperature measurement components of the post-implantation station (e.g., the temperature measurement components of post-implantation station configuration500) to measure an intensity of a transmitted reference laser beam across a predefined frequency range and generate an absorption profile based on the measured intensity of the transmitted reference laser beam in the same manner that the controller controls the temperature measurement components to measure the intensity of the transmitted laser beam across the predefined frequency range and generates the absorption profile at steps1002-1008. Then, the controller can determine a frequency corresponding to a reference bandgap value of the wafer based on the generated absorption profile and determine the reference wafer temperature based on the determined reference bandgap frequency in the same manner that the controller determines the bandgap frequency and current temperature of the wafer at steps1010and1012, respectively. In some examples, the controller uses the determined reference wafer temperature at step816ofFIG.8(described in greater detail below). For example, if the predetermined condition of step816includes a requirement that the wafer temperature increase or decrease by a certain amount, the controller can use the determined reference wafer temperature and the determined current wafer temperature to determine whether the predetermined condition is satisfied. For example, if the reference wafer temperature is −60 degrees Celsius, the current wafer temperature is 20 degrees Celsius, and the predetermined condition includes a requirement that the wafer temperature increase by 80 degrees Celsius, the controller can determine that the predetermined condition is satisfied. Once the controller determines the current temperature of the wafer at step1012, the controller can return to process800and perform steps816,818,820, and/or822as will be described in greater detail below with reference toFIG.8. It should be appreciated that some steps in process1000may be combined, the order of some steps can be changed, and some steps can be omitted. Further, it should be appreciated that additional steps may be performed. FIG.11illustrates a process for determining a temperature of a wafer at a post-implantation station using a capacitance method, according to various examples. In some examples, a controller performs process1100using a post-implantation station configuration similar or identical to post-implantation station configuration600, described above with reference toFIG.6. Process1100is described below with simultaneous reference toFIG.6. At step1102, process1100causes a controller (e.g., controller114) to obtain data representing a top capacitance from a top capacitive sensor (e.g., top capacitive sensor608). In particular, the top capacitive sensor measures the capacitance between itself and a top side of a wafer (e.g., wafer602) and subsequently provides the data representing the top capacitance to the controller. At step1104, process1100causes the controller to determine a first distance between the top side of the wafer and the top capacitive sensor based on the data representing the top capacitance (e.g., obtained at step1102). At step1106, process1100causes the controller to obtain data representing a bottom capacitance from a bottom capacitive sensor (e.g., bottom capacitive sensor610). In particular, the bottom capacitive sensor measures the capacitance between itself and a bottom side of the wafer and subsequently provides the data representing the bottom capacitance to the controller. At step1108, process1100causes the controller to determine a second distance between the bottom side of the wafer and the bottom capacitive sensor based on the data representing the bottom capacitance (e.g., obtained at step1106). At step1110, process1100causes the controller to determine a current thickness of the wafer based on the first distance, the second distance, and a predefined distance between the top capacitive sensor and the bottom capacitive sensor. For example, if the predefined distance between the top and bottom capacitive sensors is 1 mm, the first distance is 500 μm, and the second distance is 300 μm, the controller can determine that the current thickness of the wafer is 200 μm (i.e., 1 mm−500 μm−300 μm=200 μm). At step1112, process1100causes the controller to determine a current temperature of the wafer based on the determined current thickness of the wafer. In particular, as described above with reference toFIG.6, this step in the capacitance method for determining a current temperature of a wafer (e.g., process1100) utilizes the material characteristic of semiconductors (e.g., silicon, gallium arsenide, etc.) to change size based on temperature. Specifically, the dimensions (e.g., length, width, diameter, thickness, etc.) of semiconductor materials increase in size as the material heats up and decreases in size as the material cools down. The coefficient of linear thermal expansion of a semiconductor material represents the extent to which the dimensions of that specific semiconductor material change in response to a change in temperature. Thus, the controller uses the coefficient of linear thermal expansion of a wafer's semiconductor material, the change in the wafer's thickness, and equation (5) below to determine a current temperature of a wafer. Δd=dc−d0=α×d0×(Tc−T0) (5) As shown in equation (5), “Δd” represents the change in a wafer's thickness, with “dc” representing the wafer's current thickness and “d0” representing a reference thickness of the wafer. Further, “α” represents the coefficient of linear thermal expansion of the wafer's semiconductor material. For example, if the wafer is made of silicon, α would be the coefficient of linear thermal expansion of silicon (i.e., 2.6×10−6° C.−1). Lastly, “Tc” represents the wafer's current temperature and “T0” represents the wafer's reference temperature (i.e., the wafer's temperature corresponding to the wafer's reference thickness). In some examples, the reference temperature of the wafer (T0) is the second predetermined temperature (e.g., the final temperature that the wafer will be heated/cooled to at post-implantation station112discussed above with reference to step812ofFIG.8). In these examples, the reference thickness of the wafer (d0) is the wafer's thickness corresponding to the second predetermined temperature. In some examples, the wafer's thickness corresponding to the second predetermined temperature is a predetermined average thickness of one or more similar wafers at the second predetermined temperature. In these examples, the one or more similar wafers can be wafers that are made of the same material as the wafer and that have the same size (or nearly the same size) as the wafer at ambient temperature. For example, if the second predetermined temperature is 25 degrees Celsius, the wafer's thickness corresponding to the second predetermined temperature can be a predetermined average thickness of one or more silicon wafers at 25 degrees Celsius. The controller can then use this predetermined average wafer thickness at 25 degrees Celsius as the reference thickness for equation (5). In other examples, the wafer's thickness corresponding to the second predetermined temperature is determined prior to the wafer undergoing an ion implantation process (e.g., prior to the wafer being placed in a load lock chamber). For example, if the second predetermined temperature is 20 degrees Celsius, an operator of an ion implantation system in which the wafer is to undergo an ion implantation process can measure the wafer's thickness before the wafer undergoes the ion implantation process and while the wafer is at 20 degrees Celsius. The controller can then use this measured wafer thickness at 20 degrees Celsius as the reference thickness for equation (5). In yet other examples, the controller determines the wafer's thickness corresponding to the second predetermined temperature before the wafer is heated or cooled at a pre-implantation station (e.g., pre-implantation station108). In these examples, the wafer is kept at the second predetermined temperature prior to the wafer being placed in a load lock chamber (e.g., load lock chamber(s)102). Soon after the wafer is placed in the load lock chamber and before the controller controls a robotic arm (e.g., robotic arm104) to transfer the wafer to the pre-implantation station (e.g., at step802ofFIG.8), the controller controls the robotic arm to transfer the wafer to a post-implantation station (e.g., post-implantation station112). Because the wafer is quickly transferred to the post-implantation station after being kept at the second predetermined temperature, it is assumed that the wafer is still at the second predetermined temperature when the robotic arm positions the wafer at the post-implantation station. Then, without heating or cooling the wafer at the post-implantation station, the controller performs steps1102-1110of process1100described above to determine the wafer's thickness. For example, the controller can control the various temperature measurement components of the post-implantation station (e.g., post-implantation station configuration600) to measure/determine a first reference distance and a second reference distance in the same manner that the controller controls the temperature measurement components to measure/determine the first distance and the second distance at steps1102-1108of process1100. Then, the controller can determine the wafer's thickness based on the first reference distance, the second reference distance, and the predefined distance between the top and bottom capacitive sensors in the same manner that the controller determines the current wafer thickness based on the first distance, the second distance, and the predefined distance between the top and bottom capacitive sensors at step1110of process1100. The controller then uses this determined wafer thickness as the reference thickness for equation (5). In the examples described above wherein the reference temperature of the wafer (T0) is the second predetermined temperature, the controller uses equation (5) to solve for the wafer's current temperature (Tc). In particular, since the controller will have values for the current wafer thickness (dc) (e.g., determined at step1110), the reference wafer thickness (do), the reference wafer temperature (T0) (e.g., the second predetermined temperature), and the coefficient of linear thermal expansion for the wafer material (α), the controller can solve for the current wafer temperature (Tc), as it is the only remaining unknown variable of equation (5). In some examples, the reference temperature of the wafer (T0) is the wafer's temperature after being implanted with ions at the ion implanter and prior to any heating or cooling at the post-implantation station. In some examples, it is assumed that the implanted wafer is still at the temperature it was heated or cooled to in the pre-implantation station (e.g., the first predetermined temperature discussed above with reference to step804ofFIG.8) after the robotic arm positions the implanted wafer at the post-implantation station because it only takes several seconds (e.g., 10 seconds) to implant the wafer with ions after the wafer is heated or cooled at the pre-implantation station. For example, if a wafer is cooled to −60 degrees Celsius in the pre-implantation station, it is assumed that the wafer is still at −60 degrees Celsius when a robotic arm positions the wafer at the post-implantation station. Thus, in this case, the reference temperature of the wafer would be −60 degrees Celsius. In the examples described above wherein the reference temperature of the wafer (T0) is the wafer's temperature after being implanted with ions at the ion implanter and prior to any heating or cooling at the post-implantation station, the controller determines a reference wafer thickness (do) after the robotic arm transfers the wafer to the post-implantation station (e.g., after step810ofFIG.8) and before the wafer is heated or cooled at the post-implantation station (e.g., before step814ofFIG.8). In particular, the controller determines the reference wafer thickness by performing steps1102-1110of process1100described above before any heating or cooling of the wafer occurs. For example, the controller can control the various temperature measurement components of the post-implantation station (e.g., post-implantation station configuration600) to measure/determine a first reference distance and a second reference distance in the same manner that the controller controls the temperature measurement components to measure/determine the first distance and the second distance at steps1102-1108of process1100. Then, the controller can determine the reference wafer thickness based on the first reference distance, the second reference distance, and the predefined distance between the top and bottom capacitive sensors in the same manner that the controller determines the current wafer thickness based on the first distance, the second distance, and the predefined distance between the top and bottom capacitive sensors at step1110of process1100. After the controller determines the reference wafer thickness (corresponding to the wafer's temperature after being implanted with ions at the ion implanter), the controller controls the post-implantation station to begin heating or cooling the wafer (e.g., as described above with reference to step812ofFIG.8). Then, after the post-implantation station heats or cools the wafer (e.g., for a predetermined period of time), the controller once again performs steps1102-1110of process1100described above to determine a current wafer thickness (dc). The controller then uses equation (5) to solve for the wafer's current temperature (Tc). In particular, since the controller will have values for the current wafer thickness (dc), the reference wafer thickness (d0), the reference wafer temperature (T0) (e.g., the assumed wafer temperature corresponding to the determined reference wafer thickness), and the coefficient of linear thermal expansion for the wafer material (α), the controller can solve for the current wafer temperature (Tc), as it is the only remaining unknown variable of equation (5). Once the controller determines a current temperature of a wafer at step1112, the controller can return to process800and perform steps816,818,820, and/or822as will be described in greater detail below with reference toFIG.8. It should be appreciated that some steps in process1100may be combined, the order of some steps can be changed, and some steps can be omitted. Further, it should be appreciated that additional steps may be performed. FIG.12illustrates a process for determining a temperature of a wafer at a post-implantation station using a photoluminescence method, according to various examples. In some examples, a controller performs process1200using a post-implantation station configuration similar or identical to post-implantation station configuration700, described above with reference toFIG.7. Process1200is described below with simultaneous reference toFIGS.7and13. At step1202, process1200causes a controller (e.g., controller114) to control a laser source (e.g., laser source708) to direct a laser beam (e.g., laser beam714) to a predefined location on a wafer (e.g., wafer702). In some examples, process1200causes the controller to control the laser source to direct the laser beam to an optics module (e.g., optics module712). The optics module then directs the laser beam to the predefined location on the wafer. As shown inFIG.7, in some examples, process1200causes the controller to control the laser source to direct the laser beam to an input end of an optical fiber (e.g., optical fiber710). The optical fiber then directs the laser beam to the optics module (e.g., via an output end of the optical fiber), which directs the laser beam to the predefined location on the wafer. In other examples, the optical fiber directs the laser beam to the predefined location on the wafer (e.g., via an output end of the optical fiber) instead of directing the laser beam to the optics module. In some examples, the optics module includes an optical chopper. In these examples, the optics module directs the laser beam to the predefined location on the wafer at a frequency set by the optical chopper. In some examples, the laser beam frequency set by the optical chopper is predetermined and is maintained throughout the temperature-measurement process. In some examples, the predefined location on the wafer is on an edge of the wafer. In these examples, one or more lenses included in the optics module mentioned above reduce a size of a spot of the laser beam such that the diameter of the laser beam spot is smaller than the thickness of the wafer. For example, the one or more lenses can reduce the size of the laser beam spot such that the optics module can direct the laser beam to a predefined location in between an implant layer (e.g., the portion of the wafer that includes implanted ions) and a film layer of the wafer without the laser beam directly striking either the implant later or the film layer (i.e., because the laser beam spot does not overlap either layer). In other examples, the predefined location on the wafer is on a side of the wafer (e.g., a bottom or top surface of the wafer). At step1204, process1200causes the controller to obtain data representing detected fluorescent light that the wafer emits in response to absorbing laser energy of the laser beam. In particular, as explained above with reference toFIG.7, while the laser beam strikes the predefined location on the wafer, the wafer absorbs energy (i.e., electromagnetic radiation) from the laser beam and in response, emits fluorescent light (e.g., emitted fluorescent light716). A spectrophotometer (e.g., spectrophotometer720) proximate to the wafer (e.g., proximate to the predefined location on the wafer) detects the emitted fluorescent light. Specifically, in some examples, the spectrophotometer detects an intensity and/or a wavelength of the emitted fluorescent light. In some examples, the controller obtains the data representing the detected fluorescent light from the spectrophotometer. In other examples, as shown inFIG.7, the controller obtains the data representing the detected fluorescent light from an amplifier (e.g., amplifier722). In these examples, the amplifier receives the data representing the detected fluorescent light from the spectrophotometer. The amplifier then extracts specific data from the data representing the detected fluorescent light and provides the extracted data to the controller. In some examples, the amplifier extracts data representing detected fluorescent light of a specific intensity and/or wavelength range. For example, the amplifier can extract data representing detected fluorescent light having a wavelength between 900 nm and 1400 nm, and subsequently provide the extracted data to the controller. In this manner, the amplifier can remove unwanted or unhelpful data from the data representing the detected fluorescent light, such as data representing infrared light generated by one or more heating lamps that is detected by the spectrophotometer (e.g., when the infrared heating lamp light falls outside of the specific intensity and/or wavelength range). At step1206, process1200causes the controller to determine an intensity profile of the detected fluorescent light based on the data representing the detected fluorescent light. In some examples, the intensity profile represents an intensity of the detected fluorescent light as a function of the detected fluorescent light's wavelength. In some examples, the controller normalizes the data representing the intensity of the detected fluorescent light such that the intensity profile represents a normalized intensity of the detected fluorescent light as a function of the detected fluorescent light's wavelength. For example, the controller can normalize the data representing the intensity of the detected fluorescent light by dividing a relative fluorescence intensity (i.e., the detected fluorescence intensity) at each wavelength of the detected fluorescent light by the relative fluorescence intensity at the peak wavelength of the detected fluorescent light. In this manner, the data representing the intensity of the detected fluorescent light can be converted from the detected units of measurement for fluorescent light intensity (e.g., lumens, lux, etc.) to a fluorescent light intensity scale that ranges from 0 to 1. For example,FIG.13illustrates a plurality of exemplary fluorescent light intensity profiles corresponding to a wafer (e.g., wafer702) at various temperatures. In particular, intensity profiles1300are bell curve graphs representing a normalized intensity of detected fluorescent light1302as a function of the detected fluorescent light's wavelength1304that the wafer emitted while at various temperatures (e.g., at 25 degrees Celsius, 31 degrees Celsius, etc.). In other words, each intensity profile of intensity profiles1300corresponds to a different wafer temperature. As shown, because the detected fluorescent light intensity is normalized, the intensity profile at each wafer temperature has a minimum intensity of 0 and a maximum intensity of 1. Further, each intensity profile has a peak wavelength and a FWHM. For example,FIG.13illustrates a peak wavelength1306and a FWHM1308for the intensity profile corresponding to the fluorescent light emitted by the wafer (and detected by the spectrophotometer) while the wafer was at 25 degrees Celsius. Note, whileFIG.13illustrates the plurality of intensity profiles as bell curve graphs, one of ordinary skill in the art would appreciate that the controller can determine an intensity profile at step1206without having to generate a corresponding graph of the intensity profile. Rather, the intensity profile can be, for example, a data set including data representing the intensity of the detected fluorescent light as a function of the detected fluorescent light's wavelength. Returning toFIG.12, at step1208, process1200causes the controller to determine a current temperature of the wafer based on one or more characteristics that the controller determines from the intensity profile. In some examples, the one or more characteristics that the controller determines include a peak wavelength of an intensity peak in the intensity profile (e.g., peak wavelength1306) and/or a FWHM of the intensity peak (e.g., FWHM1308). In particular, as described above with reference toFIG.7, the photoluminescence of semiconductor materials (i.e., the emission of fluorescent light in response to the absorption of electromagnetic radiation (e.g., laser beam energy)) changes as a function of temperature. For example, a peak wavelength and/or FWHM of a semiconductor material's emitted fluorescent light changes as a function of temperature. Thus, this step in the photoluminescence method for determining a current temperature of a wafer (e.g., process1200) utilizes the above material characteristic of semiconductor materials to determine a current temperature of a semiconductor wafer. Specifically, in some examples, the controller uses predetermined equations representing relationships between a semiconductor material's emitted fluorescent light peak wavelength/emitted fluorescent light FWHM and the semiconductor material's current temperature to solve for a semiconductor wafer's current temperature. In some examples, the equations are determined by incrementally measuring peak wavelength/FWHM of a single wafer (made of a known semiconductor material) at various temperatures (e.g., prior to performing process800), recording the peak wavelength/FWHM results in a database table for each of the various temperatures, and subsequently deriving the equations based on the peak wavelength/FWHM results and their corresponding wafer temperatures. For example, when the one or more characteristics that the controller determines include a peak wavelength of an intensity peak in an intensity profile, the controller can determine the current temperature of a silicon wafer based on equation (6) below, which represents a nonlinear relationship between an emitted fluorescent light peak wavelength of silicon and a current temperature of silicon: y=5×10−7x5−6×10−5x4+0.00051x3−0.2098x2+4.2022x+1108.1 (6) As shown in equation (6), “y” represents the peak wavelength of the intensity peak in the intensity profile and “x” represents the current temperature of silicon. Thus, in these examples, after the controller determines a silicon wafer's emitted fluorescent light peak wavelength (y), the controller can solve for the current temperature of the silicon wafer (x), as it is the only remaining unknown variable of equation (6). As another example, when the one or more characteristics that the controller determines include a FWHM of an intensity peak in an intensity profile, the controller can additionally or alternatively determine the current temperature of a silicon wafer based on equation (7) below, which represents a nonlinear relationship between an emitted fluorescent light FWHM of silicon and a current temperature of silicon: y=5×10−6x4−0.001x3+0.0726x2−2.1272x+107.62 (7) As shown in equation (7), “y” represents the FWHM of the intensity peak in the intensity profile and “x” represents the current temperature of silicon. Thus, in these examples, after the controller determines a silicon wafer's emitted fluorescent light FWHM (y), the controller can solve for the current temperature of the silicon wafer (x), as it is the only remaining unknown variable of equation (7). Note, relationships between photoluminescence and current temperature can vary between different semiconductor materials. In some examples, the controller uses predetermined equations representing the above relationships for other semiconductor materials based on the one or more semiconductor materials that a wafer is made of For example, if a wafer is made of gallium arsenide, the controller can use predetermined equations representing the above relationships for gallium arsenide to determine a current temperature of the gallium arsenide wafer. Further, relationships between photoluminescence and current temperature can even vary between wafers made of the same semiconductor material but that are from different batches or produced by different manufacturers. Thus, equations (6) and (7) are simply examples of the nonlinear relationships between silicon's emitted fluorescent light peak wavelength and current temperature, and silicon's emitted fluorescent light FWHM and current temperature, respectively, and should not be considered as the only equations that the controller uses for silicon wafers at this step. In some examples, the controller uses a database table (such as the database table described above) to determine a semiconductor wafer's current temperature instead of using predetermined equations. For example, the controller can use such a database table to determine the wafer temperature that corresponds to a semiconductor wafer's emitted fluorescent light peak wavelength. As described above, the controller can generate these database tables prior to process800by measuring the peak wavelength/FWHM of a semiconductor wafer (e.g., of a batch of similar semiconductor wafers) at known temperatures. As mentioned above with reference to step812ofFIG.8, in some examples, after the robotic arm transfers the wafer to the post-implantation station and before the controller controls the post-implantation station to heat or cool the wafer, the controller controls the post-implantation station to determine a reference wafer temperature. In some examples, the controller determines a reference wafer temperature by performing steps1202-1208of process1200described above before any heating or cooling of the wafer occurs. For example, the controller can control various temperature measurement components of the post-implantation station (e.g., the temperature measurement components of post-implantation station configuration700) to direct a laser beam to a predefined location on a wafer, detect fluorescent light emitted from the wafer, and determine a reference intensity profile based on the detected fluorescent light in the same manner that the controller controls the temperature measurement components to direct the laser beam to the predefined location on the wafer, detect fluorescent light emitted from the wafer, and determine the intensity profile based on the detected fluorescent light at steps1202-1206. Then, the controller can determine a reference temperature of the wafer based on characteristics determined from the reference intensity profile in the same manner that the controller determines the current temperature of the wafer based on characteristics determined from the intensity profile at step1208. In some examples, the controller uses the determined reference wafer temperature at step816ofFIG.8(described in greater detail below). For example, if the predetermined condition of step816includes a requirement that the wafer temperature increase or decrease by a certain amount, the controller can use the determined reference wafer temperature and the determined current wafer temperature to determine whether the predetermined condition is satisfied. For example, if the reference wafer temperature is −60 degrees Celsius, the current wafer temperature is 0 degrees Celsius, and the predetermined condition includes a requirement that the wafer temperature increase by 85 degrees Celsius, the controller can determine that the predetermined condition is not satisfied. Once the controller determines the current temperature of the wafer at step1208, the controller can return to process800and perform steps816,818,820, and/or822as will be described in greater detail below with reference toFIG.8. It should be appreciated that some steps in process1200may be combined, the order of some steps can be changed, and some steps can be omitted. Further, it should be appreciated that additional steps may be performed. Returning toFIG.8, at step816, process800causes the controller to determine whether the determined current temperature of the wafer (e.g., determined by process900,1000,1100, and/or1200) satisfies a predetermined condition. In some examples, the predetermined condition includes a requirement that the determined current temperature of the wafer be greater than or equal to a third predetermined temperature (e.g., when the wafer is heated at the post-implantation station). For example, the predetermined condition can include a requirement that the determined current temperature of the wafer be greater than or equal to 20 degrees Celsius. In other examples, the predetermined condition includes a requirement that the determined current temperature of the wafer be less than or equal to a third predetermined temperature (e.g., when the wafer is cooled at the post-implantation station). For example, the predetermined condition can include a requirement that the determined current temperature of the wafer be less than or equal to 25 degrees Celsius. In some examples, the third predetermined temperature is the same temperature as the second predetermined temperature described above with reference to step812. If the controller determines that the determined current temperature of the wafer satisfies the predetermined condition, at step818, process800causes the controller to control the post-implantation station to forgo continuing to heat or cool the wafer at the post-implantation station. For example, in the examples described above wherein the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station heat or cool the wafer while the controller determines the current temperature of the wafer, the controller can turn off the one or more infrared heating lamps or stop the flow of coolant to the cooling E-chuck and/or coolant release valve. Alternatively, in the examples described above wherein the controller controls the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station to cease heating or cooling the wafer while the controller determines the current temperature of the wafer, the controller can keep the one or more infrared heating lamps turned off or continue to stop the flow of coolant to the cooling S-chuck and/or coolant release valve. At step820, process800causes the controller to control the robotic arm to remove the wafer from the post-implantation station. In some examples, process800causes the controller to control the robotic arm to remove the wafer from the post-implantation station (e.g., from the processing chamber of the post-implantation station) and transfer the wafer to a load lock chamber (e.g., load lock chamber(s)102). In some examples, process800causes the controller to control the robotic arm to transfer the wafer to the initial load lock chamber from which the robotic arm removed the wafer at step802(or another load lock chamber adjacent to the initial load lock chamber). In the examples described above wherein the post-implantation station is located within an auxiliary chamber of a load lock chamber, the robotic arm of the load lock chamber transfers the wafer from the auxiliary chamber back to the load lock chamber. In the examples described above wherein the post-implantation station is located within a load lock chamber, the controller forgoes performing step820and the wafer remains in the load lock chamber/post-implantation station. Alternatively, the controller controls the robotic arm to remove the wafer from the load lock chamber/post-implantation station and subsequently transfer the wafer to another load lock chamber. In any case, an operator of the ion implantation system, or another automated mechanism and/or system (e.g., controlled by the controller), removes the wafer from the ion implantation station via the load lock chamber. If the controller determines that the determined current temperature of the wafer does not satisfy the predetermined condition, at step822, process800causes the controller to control the post-implantation station to continue heating or cooling the wafer at the post-implantation station. For example, in the examples described above wherein the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station heat or cool the wafer while the controller determines the current temperature of the wafer, the controller can keep the one or more infrared heating lamps turned on or continue the flow of coolant to the cooling E-chuck and/or coolant release valve. Alternatively, in the examples described above wherein the controller controls the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station to cease heating or cooling the wafer while the controller determines the current temperature of the wafer, the controller can turn on the one or more infrared heating lamps or resume the flow of coolant to the cooling E-chuck and/or coolant release valve. After the controller controls the post-implantation station to continue heating or cooling the wafer at step820, the controller once again performs steps814and816(e.g., after a predetermined period of time of continued heating/cooling). In some examples, the controller continues performing steps814,816, and822until the predetermined condition is satisfied at step816. For example, the controller will continue determining the current temperature of the wafer and controlling the post-implantation station to heat or cool the wafer until the determined current temperature of the wafer is greater than or equal to 20 degrees Celsius. It should be appreciated that some steps in process800may be combined, the order of some steps can be changed, and some steps can be omitted. Further, it should be appreciated that additional steps may be performed. For example, if the ion implanter of ion implantation system100includes one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve (e.g., within processing chamber110of the ion implanter), process800may additionally include a step for heating or cooling the wafer while implanting the wafer with ions from an ion beam at the ion implanter (e.g., in between steps808and810). As another example, as will be described in greater detail below with reference toFIG.14, process800may additionally include one or more steps for determining a temperature of a wafer at a pre-implantation station, or may include one or more steps for determining a temperature of a wafer at a pre-implantation station instead of determining a temperature of a wafer at a post-implantation station. FIG.14illustrates a process for measuring a temperature of a wafer within an ion implantation system, according to various examples. In some examples, process1400is performed by a system similar or identical to system100, described above with reference toFIGS.1-7. In particular,FIG.14illustrates steps that can be performed in addition to the steps of process800(e.g., steps1406-1410and1414) or instead of certain steps of process800(e.g., instead of steps814-818and822). At step1402, process1400causes a controller (e.g., controller114) to control a robotic arm (e.g., robotic arm104) to transfer a wafer (e.g., wafer216,402,420,502,602, or702) from a load lock chamber (e.g., load lock chamber(s)102) to a pre-implantation station (e.g., pre-implantation station108). In some examples, step1402is identical to step802of process800. After the robotic arm positions the wafer at the pre-implantation station, at step1404, process1400causes the controller to control the pre-implantation station to heat or cool the wafer to a first predetermined temperature. In some examples, step1404is identical to step804of process800. In some examples, after the robotic arm transfers the wafer to the pre-implantation station and before process1400causes the controller to control the pre-implantation station to heat or cool the wafer, process1400causes the controller to control the pre-implantation station (e.g., the temperature measurement components of the pre-implantation station) to determine a reference wafer temperature. The reference temperature of the wafer will typically be ambient temperature or the temperature at which the wafer was kept prior to being introduced into the ion implantation system. In some examples, process1400causes the controller to determine the reference wafer temperature using one or more of the single-laser method (e.g., process900), the bandgap method (e.g., process1000), the capacitance method (e.g., process1100), and the photoluminescence method (e.g., process1200), which are described in greater detail above with reference toFIGS.9-12. After the wafer is heated or cooled at the pre-implantation station, at step1406, process1400causes the controller to determine a current temperature of the wafer. In some examples, process1400causes the controller to determine the current temperature of the wafer at step1406based on one or more of a single-laser method (e.g., process900), a bandgap method (e.g., process1000), a capacitance method (e.g., process1100), and/or a photoluminescence method (e.g., process1200). In some examples, process1400causes the controller to determine the current temperature of the wafer after the wafer is heated or cooled at the pre-implantation station for a predetermined period of time (e.g., 1 second, 2 seconds, 5 seconds, etc.). In some examples, process1400causes the controller to periodically determine a current temperature (e.g., every 0.5 seconds, every 2 seconds, etc.) after the wafer is heated or cooled at the pre-implantation station for a predetermined period of time (e.g., 1 second, 2 seconds, 5 seconds, etc.). For example, after the wafer is heated at the pre-implantation station for 2 seconds, process1400can thereafter cause the controller to determine a current temperature of the wafer every second. In some examples, process1400causes the controller to continually determine the current temperature of the wafer after the wafer is heated or cooled at the pre-implantation station for a predetermined period of time (e.g., 1 second, 2 seconds, 5 seconds, etc.) and until the wafer reaches a predetermined target temperature. In some examples, process1400causes the controller to determine the current temperature of the wafer while the wafer is heated or cooled at the pre-implantation station. For example, after one or more infrared heating lamps of the post-implantation heat the wafer for a predetermined period of time, process1400can cause the controller to determine the current temperature of the wafer while the one or more infrared heating lamps continue to heat the wafer. In other examples, process1400causes the controller to control the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station to cease heating or cooling the wafer while the controller determines the current temperature of the wafer. For example, process1400can cause the controller to turn off the one or more infrared heating lamps or stop the flow of coolant to the cooling E-chuck and/or coolant release valve. In these examples, after the controller determines the current temperature of the wafer (which can take less than a second), process1400can cause the controller to control the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the post-implantation station to continue (i.e., resume) heating or cooling the wafer. For example, process1400can cause the controller to turn on the one or more infrared heating lamps or resume the flow of coolant to the cooling E-chuck and/or coolant release valve. In some examples, ceasing to heat or cool the wafer while the controller determines the current temperature of the wafer allows the controller to more accurately determine the current temperature of the wafer. For example, as described above with reference toFIGS.5and7, infrared light from the one or more infrared heating lamps can create unwanted “noise” (e.g., unwanted infrared light intensity and/or wavelength measurements) when determining the current temperature of the wafer based on a bandgap method (e.g., process1000) and/or a photoluminescence method (e.g., process1200). The unwanted noise can subsequently lead to inaccurate current temperature determinations, as the bandgap and photoluminescence methods both utilize infrared light intensity and/or wavelength measurements to determine a current temperature of the wafer. Thus, ceasing to heat the wafer with the one or more infrared heating lamps in these examples can prevent a photodetector (e.g., photodetector518), a spectrophotometer (e.g., spectrophotometer720), and/or a monochromator of the pre-implantation station from collecting/detecting infrared light from the one or more heating lamps (and subsequently generating the unwanted noise mentioned above) while the controller determines the current temperature of the wafer based on the bandgap method and/or the photoluminescence method, respectively. At step1408, process1400causes the controller to determine whether the determined current temperature of the wafer (e.g., determined by process900,1000,1100, and/or1200) satisfies a predetermined condition. In some examples, the predetermined condition includes a requirement that the determined current temperature of the wafer be greater than or equal to the first predetermined temperature (e.g., when the wafer is heated at the pre-implantation station). For example, the predetermined condition can include a requirement that the determined current temperature of the wafer be greater than or equal to 200 degrees Celsius. In other examples, the predetermined condition includes a requirement that the determined current temperature of the wafer be less than or equal to the first predetermined temperature (e.g., when the wafer is cooled at the post-implantation station). For example, the predetermined condition can include a requirement that the determined current temperature of the wafer be less than or equal to −100 degrees Celsius. If the controller determines that the determined current temperature of the wafer satisfies the predetermined condition, at step1410, process1400causes the controller to control the pre-implantation station to forgo continuing to heat or cool the wafer at the pre-implantation station. For example, in the examples described above wherein the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the pre-implantation station heat or cool the wafer while the controller determines the current temperature of the wafer, the controller can turn off the one or more infrared heating lamps or stop the flow of coolant to the cooling E-chuck and/or coolant release valve. Alternatively, in the examples described above wherein the controller controls the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the pre-implantation station to cease heating or cooling the wafer while the controller determines the current temperature of the wafer, the controller can keep the one or more infrared heating lamps turned off or continue to stop the flow of coolant to the cooling S-chuck and/or coolant release valve. At step1412, process1400causes the controller to control the robotic arm to remove the wafer from the pre-implantation station and transfer the wafer (while at the first predetermined temperature) to an ion implanter (e.g., ion implanter200). In some examples, step1412is identical to step806of process800. If at step1408, the controller determines that the determined current temperature of the wafer does not satisfy the predetermined condition, at step1414, process1400causes the controller to control the pre-implantation station to continue heating or cooling the wafer at the pre-implantation station. For example, in the examples described above wherein the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the pre-implantation station heat or cool the wafer while the controller determines the current temperature of the wafer, the controller can keep the one or more infrared heating lamps turned on or continue the flow of coolant to the cooling E-chuck and/or coolant release valve. Alternatively, in the examples described above wherein the controller controls the one or more infrared heating lamps, cooling E-chuck, and/or coolant release valve of the pre-implantation station to cease heating or cooling the wafer while the controller determines the current temperature of the wafer, the controller can turn on the one or more infrared heating lamps or resume the flow of coolant to the cooling E-chuck and/or coolant release valve. After the controller controls the pre-implantation station to continue heating or cooling the wafer at step1414, the controller once again performs steps1406and1408(e.g., after a predetermined period of time of continued heating/cooling). In some examples, the controller continues performing steps1406,1408, and1414until the predetermined condition is satisfied at step1408. For example, the controller will continue determining the current temperature of the wafer and controlling the pre-implantation station to heat or cool the wafer until the determined current temperature of the wafer is less than or equal to −150 degrees Celsius. In some examples, after the controller performs step1412, the controller returns to process800and perform steps808-820(and822if necessary) as described in greater detail above with reference toFIG.8. For example, the controller can return to process800and perform steps808-820(and822if necessary) when the temperature of a wafer is also determined in the post-implantation station. In other examples, after the controller performs step1412, the controller returns to process800and perform steps808-812and818-820as described in greater detail above with reference toFIG.8. For example, the controller can return to process800and perform steps808-812and818-820when the temperature of a wafer is not determined in the post-implantation station (e.g., when the heating/cooling at step812is based on time instead of the current temperature of the wafer). It should be appreciated that some steps in process1400may be combined, the order of some steps can be changed, and some steps can be omitted. Further, it should be appreciated that additional steps may be performed. While specific components, configurations, features, and functions are provided above, it will be appreciated by one of ordinary skill in the art that other variations may be used. Additionally, although a feature may appear to be described in connection with a particular example, one skilled in the art would recognize that various features of the described examples may be combined. Moreover, aspects described in connection with an example may stand alone. Although embodiments have been fully described with reference to the accompanying drawings, it should be noted that various changes and modifications will be apparent to those skilled in the art. Such changes and modifications are to be understood as being included within the scope of the various examples as defined by the appended claims. | 177,973 |
11942344 | DETAILED DESCRIPTION OF THE EMBODIMENTS Hereinafter, example embodiments will be explained in detail with reference to the accompanying drawings. As is traditional in the field of the inventive concepts, embodiments may be described and illustrated in terms of blocks which carry out a described function or functions. These blocks, which may be referred to herein as units or modules or the like, are physically implemented by analog and/or digital circuits such as logic gates, integrated circuits, microprocessors, microcontrollers, memory circuits, passive electronic components, active electronic components, optical components, hardwired circuits and the like, and may optionally be driven by firmware and/or software. The circuits may, for example, be embodied in one or more semiconductor chips, or on substrate supports such as printed circuit boards and the like. The circuits constituting a block may be implemented by dedicated hardware, or by a processor (e.g., one or more programmed microprocessors and associated circuitry), or by a combination of dedicated hardware to perform some functions of the block and a processor to perform other functions of the block. Each block of the embodiments may be physically separated into two or more interacting and discrete blocks without departing from the scope of the inventive concepts. Likewise, the blocks of the embodiments may be physically combined into more complex blocks without departing from the scope of the inventive concepts. FIG.1illustrates a block diagram of an apparatus for determining a critical temperature of a semiconductor package in accordance with example embodiments of the inventive concepts.FIG.2illustrates a perspective view of the apparatus inFIG.1. Referring toFIGS.1and2, the apparatus determines a critical temperature of a semiconductor package P at which swelling is generated (i.e., occurs) in the semiconductor package P. Swelling of the semiconductor package P may be the result of peeling of layers in the semiconductor package P at high temperature. For example, the semiconductor package P may include a plurality of elements such as a package substrate, an interposer, a semiconductor chip, etc. The elements of the semiconductor package P may have respective different thermal expansion coefficients. Thus, when heat is applied to the semiconductor package P, warpage may be generated or occur in the semiconductor package P due to the different thermal expansion coefficients of the elements. The warpage may bring about swelling so that interfaces between the layers of the semiconductor package P may be separated from each other. A temperature at which swelling is generated or occurs may correspond to the critical temperature of the semiconductor package P. In example embodiments, the apparatus may include a heater100, a temperature sensor200, a height sensor module300and a controller500. The heater100, the temperature sensor200and the height sensor module300may be installed on the gantry400. The semiconductor package P may be arranged on an upper surface of the heater100. The heater100may apply heat to the semiconductor package P. The temperature sensor200may be arranged at a side of the heater100. For example, the temperature sensor200may be installed on a bracket410(e.g., seeFIG.3) of the gantry400. The temperature sensor200may measure a temperature of the semiconductor package P heated by the heater100. The height sensor module300may be arranged over the heater100. The height sensor module300may measure a height of the semiconductor package P heated by the heater100. As mentioned above, when the heater100applies heat to the semiconductor package P, warpage may occur at the semiconductor package P. The warpage may change the height of the semiconductor package P. The height sensor module300may measure changes in height of the semiconductor package P in accordance with temperatures of the semiconductor package P. Further, the height sensor module300may also measure height changes by regions of the semiconductor package P. The height sensor module300may include a height sensor320(e.g., seeFIG.6). The height sensor320may for example include a point sensor, a line sensor, etc. In some embodiments, when the height sensor320includes the line sensor, the height sensor320may scan the semiconductor package P to measure the heights of the semiconductor package P. For example, the height sensor320may measure the height of the semiconductor package P at different regions. The height sensor module300may be moved by a first actuator600along a first horizontal direction and a second horizontal direction substantially perpendicular to the first horizontal direction. The first actuator600may include a first driver610that moves the height sensor module300along the first horizontal direction, and a second driver620that moves the height sensor module300along the second horizontal direction. The first driver610may include a motor. For example, the first driver610may include a coreless motor. The second driver620may be movably connected to a guide rail630installed at the gantry400. The second driver620may include a core type motor. The first driver610may move the second driver620along the guide rail630, i.e., the first horizontal direction. The height sensor module300may be connected to the second driver620. The second driver620may move the height sensor module300along the second horizontal direction. The controller500may control operations of the heater100, the temperature sensor200and the height sensor module300. The controller500may be implemented with hardware, firmware, software, or any combination thereof. For example, the controller500may be a computing device such as a workstation computer, a desktop computer, a laptop computer, and a tablet computer or the like. For example, the controller500may include a memory device such as read only memory (ROM) and random access memory (RAM), and a processor configured to perform predetermined operations, e.g., a microprocessor, a CPU, a GPU. Also, the controller500may include a receiver and a transmitter for receiving and transmitting electrical signals. For example, the controller500may control the heat applied from the heater100to the semiconductor package P. Further, the controller500may set a rapid temperature-rising period and a critical temperature measurement period for the heater100. The controller500may receive the temperatures of the semiconductor package P measured by the temperature sensor200. The controller500may receive the height of the semiconductor package P measured by the height sensor module300. The controller500may identify a point at which a height of the semiconductor package P measured by the height sensor module300is sharply increased. As the temperature of the semiconductor package P is gradually increased, the warpage may also continuously increase. Eventually, the separation of the elements in the semiconductor package P (i.e., the continuous increasing of the warpage) may cause swelling. The height of the semiconductor package P, which may have gradually increased, may be sharply increased by the swelling. A temperature of the semiconductor package P corresponding to a point at which the height of the semiconductor package P is sharply increased may correspond to the critical temperature of the semiconductor package P. The controller500thus may determine the temperature of the semiconductor package P corresponding to the point at which the height of the semiconductor package P is sharply increased as the critical temperature of the semiconductor package P. The swelling may be continuously generated over a range of temperatures as well as at any one temperature point. In example embodiments, the controller500may set a temperature of a point within the range of temperatures at which a height change rate of the semiconductor package P is maximum as the critical temperature of the semiconductor package P. Further, the controller500may receive the height changes at regions of the semiconductor package P from the height sensor module300. The controller500may accurately recognize a region of the semiconductor package P at which the warpage may be generated based on the height changes at the regions. FIG.3illustrates an enlarged perspective view of a heater and a temperature sensor of the apparatus inFIG.2.FIG.4illustrates a cross-sectional view of the heater inFIG.3. Referring toFIGS.3and4, the heater100may include a heating block110, a fixing block120, a base block130and an adiabatic block140. The heating block110may include an upper surface configured to receive the semiconductor package P. The fixing block120may be arranged on the upper surface of the heating block110to fix the semiconductor package P. Particularly, the fixing block120may fix semiconductor packages P having various sizes. In some embodiments of the inventive concepts the fixing block120may include brass, but in other embodiments the fixing block120may include other materials. The base block130may be arranged under the heating block110. In order to rapidly cool the heating block110after determining the critical temperature of the semiconductor package P, a cooling passage132may be formed in the base block130. A cooling fluid may be introduced into the cooling passage132to cool the heating block110. The adiabatic block140may be interposed between the base block130and the heating block110. In some embodiments the adiabatic block140may include ceramic, but in other embodiments the adiabatic block140may include other materials. The temperature sensor200may be arranged over the heater100. The bracket410may be installed at a side of the heater100. The bracket410may have a slanted surface oriented toward the upper surface of the heater100. The temperature sensor200may be installed at the slanted surface of the bracket410. Thus, the temperature sensor200may be oriented toward the upper surface of the heater100along a slanted direction. For example, the temperature sensor200may be oriented toward a central portion of the semiconductor package P on the upper surface of the heater100. In some embodiments the temperature sensor200may include an infrared ray (IR) sensor, however in other embodiments the temperature sensor200may include other types of sensors instead of an IR sensor. FIG.5illustrates a perspective view of a plurality of the heaters and a plurality of the temperature sensors such as shown inFIG.3, for a corresponding plurality of semiconductor packages P.FIG.6illustrates a perspective view of a height sensor module for use with the heaters and the temperature sensors inFIG.5.FIG.7illustrates a perspective view of the height sensor module inFIG.6applied to the heaters and the temperature sensors inFIG.5. Referring toFIGS.5to7, in order to simultaneously determine the critical temperatures of the semiconductor packages P, a plurality of the heaters100may be arranged on an upper surface of a base plate102. The heaters100may be arranged in the first horizontal direction and the second horizontal direction. Respective semiconductor packages P may be arranged on the plurality of heaters100. Each of the temperature sensors200may be arranged adjacent to respective ones of the heaters100. That is, one temperature sensor200may measure the temperature of one semiconductor package P on one heater100. Thus, the temperature sensors200may also be arranged in the first horizontal direction and the second horizontal direction. The height sensor module300may include a sensing block310and a plurality of height sensors320. The height sensors320may be attached to the sensing block310. A gap between the height sensors320may correspond to a gap between the heaters100. The number of height sensors320may correspond to the number of heaters100arranged along the first horizontal direction. For example, when the number of heaters100along the first horizontal direction is three and the number of heaters100along the second horizontal direction is three such as shown inFIGS.5and7, the number of height sensors320attached to the sensing block310may also be three. When the sensing block310is moved along the second horizontal direction, the three height sensors320may scan the three semiconductor packages P on the three heaters100to simultaneously measure the heights of the three semiconductor packages P that are disposed along the first horizontal direction in the second row. The height sensor module300including the three height sensors320may thus make one scanning pass along the second horizontal direction to measure the heights of the nine semiconductor packages P. That is, sensing block310may simultaneously measure the heights of the semiconductor packages P arranged in a same direction, i.e., the first horizontal direction. In the embodiment shown inFIGS.5and7, the number of heaters100along the first horizontal direction and the second horizontal direction is three, but in other embodiments the number of heaters100disposed along the first and second horizontal directions may be greater or less than three. FIG.8illustrates a perspective view of the temperature sensors inFIG.5moved along the second horizontal direction by a first driver of a second actuator according to embodiments of the inventive concepts.FIG.9illustrates an enlarged perspective view of a portion “Z” inFIG.8.FIG.10illustrates a perspective view of a second driver of the second actuator for moving the temperature sensors inFIG.8along the first horizontal direction.FIGS.11and12illustrates cross-sectional views of the temperature sensors moved along the first horizontal direction by the second driver of the second actuator inFIG.10; Referring toFIGS.8to10, a temperature sensor200may measure a temperature of the central portion of a semiconductor package P. That is, a temperature sensor200may be aligned with the central portion of a semiconductor package P to accurately measure the temperature of the semiconductor package P. A position of the central portion of a semiconductor package P may change in accordance with a size of the semiconductor package P, so that it may be required to move the temperature sensor200along the first horizontal direction and the second horizontal direction in accordance with the size of the semiconductor package P loaded onto the heater100. Thus, the temperature sensors200may be moved along the first horizontal direction and the second horizontal direction by a second actuator. The second actuator may include a first driver210that moves the temperature sensor200along the second horizontal direction, and a second driver220that moves the temperature sensor200along the first horizontal direction. The first driver210may include a motor212, a ball screw216, a slider214and a guide rail218. The ball screw216may be arranged along the second horizontal direction. The ball screw216may be rotated by the motor212. The slider214may be engaged with the ball screw216. Thus, the slider214may be reciprocally moved along the second horizontal direction in accordance with the rotational direction of the ball screw216. The plurality of the temperature sensors200may be arranged at a stage202. The stage202may be connected to the slider214. Thus, the stage202may be moved together with the slider214along the second horizontal direction. Alternatively, the temperature sensors200may be directly connected to the slider214. The guide rail218may be arranged along the second horizontal direction to guide the movement of the stage202. That is, the stage202may be movably connected to the guide rail218along the second horizontal direction. For example, in order to prevent interference between the semiconductor packages P and the temperature sensors200during loading of the semiconductor packages P onto the heaters100, a cylinder230may be arranged on the base plate102along the second horizontal direction. The stage202may be connected to the cylinder230. The cylinder230may move the stage202along the second horizontal direction to expose the heaters100. After loading of the semiconductor packages P, the cylinder230may return the stage202to an original position to place the temperature sensors200adjacent to the heaters100. The second driver220may include a step motor. With the temperature sensors200arranged on the stage202, the second driver220may move the temperature sensors200on the stage202along the first horizontal direction. Thus, the temperature sensors200may be movably connected to the upper surface of the stage202along the first horizontal direction. For example, the temperature sensors200may be movably inserted into guide grooves formed on the upper surface of the stage202along the first horizontal direction. As shown inFIGS.11and12, the temperature sensors200may be forwardly or backwardly moved on the upper surface of the stage202along the first horizontal direction in accordance with rotational direction of the second driver220. FIG.13illustrates a flow chart of a method of determining a critical temperature of a semiconductor package using the apparatus inFIG.1.FIG.14illustrates a graph showing heights of a plurality of semiconductor packages in accordance with temperatures.FIG.15illustrates a graph showing change rate of heights of semiconductor packages in accordance with temperatures.FIG.16illustrates a graph showing heights by positions of a semiconductor package in accordance with temperatures. Referring toFIGS.1-13, in step ST700, the number of the semiconductor packages P, sizes of the semiconductor packages P, a temperature-rising rate, etc., are input to the controller500. In example embodiments, critical temperatures of first to fourth semiconductor packages P may be determined. In step ST710, the cylinder230moves the stage202along the second horizontal direction to expose the heaters100. In step ST720, the semiconductor packages P are loaded onto the heaters100. The semiconductor packages P may be placed on the upper surfaces of the heating blocks110, respectively. The fixing block120of a heater100may fix a semiconductor package P to the upper surface of a heating block110. In step ST730, the cylinder230moves the stage202along the second horizontal direction to return the stage202to the original position. Thus, each of the temperature sensors200may be positioned adjacent to respective ones of the heaters100. In step ST740, the second actuator moves the temperature sensors200along the first horizontal direction and the second horizontal direction to locate the temperature sensors200adjacent to the central portions of the semiconductor packages P. In step ST750, the first actuator600moves the height sensor module300along the first horizontal direction and the second horizontal direction to place the height sensor module300at an optimal position where the height sensor module300may accurately measure the heights of the semiconductor packages P. In step ST760, the heaters100apply heat to the semiconductor packages P to increase the temperature of the semiconductor packages P. The heaters100may rapidly increase the temperature of the semiconductor package P during the rapid temperature-rising period. After the rapid temperature-rising period, the heaters100may slowly increase the temperature of the semiconductor packages P. In step ST770, the temperature sensors200measure the temperature of the semiconductor packages P. The temperature of the semiconductor packages P measured by the temperature sensors200may be transmitted to the controller500. In step ST780, the height sensor module300measures the height of the semiconductor packages P. The height sensor module300may measure the heights of the semiconductor packages P as the heat applied to the semiconductor packages is gradually increased. For example, the line sensor type height sensor module300may scan the semiconductor packages P to simultaneously measure the heights of the semiconductor packages P. The heights of the semiconductor packages P measured by the height sensor module300may be transmitted to the controller500. In step ST790, as shown inFIG.14, the controller500identifies height changes of the semiconductor packages P in accordance with the temperatures of the semiconductor packages P. InFIG.14, a line A may represent a height of the first semiconductor package, a line B may represent a height of the second semiconductor package, a line C may represent a height of the third semiconductor package, and a line D may represent a height of the fourth semiconductor package. The controller500may identify points where the heights of the semiconductor packages P are sharply increased. For example, the controller500may identify a first point PA at which the height of the first semiconductor package is sharply increased. The controller500may identify a second point PB at which the height of the second semiconductor package is sharply increased. The controller500may identify a third point PC at which the height of the third semiconductor package is increased. The controller500may identify a fourth point PD at which the height of the fourth semiconductor package is sharply increased. That is, the controller500may recognize the generation (i.e., the occurrence) of swelling in the first to fourth semiconductor packages in temperature ranges to which the first to fourth points PA, PB, PC and PD may belong. In step ST800, the controller500determines a temperature of the semiconductor packages P measured at points where the height change ratios of the semiconductor packages are maximums in the temperature range in which swelling may be generated as the critical temperatures of the semiconductor packages. For example, as shown inFIG.15, the controller500may identify a point where a height change ratio of the first semiconductor package is a maximum. The controller500may determine a temperature of the first semiconductor package measured at the point as a critical temperature TA of the first semiconductor package. The controller500may identify a point where a height change ratio of the second semiconductor package is a maximum. The controller500may determine a temperature of the second semiconductor package measured at the point as a critical temperature TB of the second semiconductor package. The controller500may identify a point where a height change ratio of the third semiconductor package is a maximum. The controller500may determine a temperature of the third semiconductor package measured at the point as a critical temperature TC of the third semiconductor package. The controller500may identify a point where a height change ratio of the fourth semiconductor package is a maximum. The controller500may determine a temperature of the fourth semiconductor package measured at the point as a critical temperature TD of the fourth semiconductor package. In step ST810, as shown inFIG.16, the controller500identifies a region of a semiconductor package P where the warpage is generated based on the height changes by or at regions of the semiconductor package P received from the height sensor module500. In step ST820, after determining the critical temperature of the semiconductor packages P, the controller500stops the heaters100. Further, cooling fluid may be introduced into the cooling passages132of the base blocks130of the heaters100to rapidly cool the semiconductor packages P. According to example embodiments, when heat is applied to the semiconductor package, swelling may be generated in the semiconductor package. The height of the semiconductor package may be sharply increased by the swelling. The temperature of the semiconductor package measured when the height of the semiconductor package is sharply increased may be determined as the critical temperature of the semiconductor package. Thus, the critical temperature of the semiconductor package may be accurately determined. The above description is illustrative of example embodiments of the inventive concepts and should not to be construed as limiting. Although a few example embodiments have been described, those skilled in the art should readily appreciate that many modifications are possible in the example embodiments without materially departing from the novel teachings and advantages of the inventive concepts. Accordingly, all such modifications are intended to be included within the scope of the inventive concepts as defined in the claims. | 24,485 |
11942345 | DETAILED DESCRIPTION Methods of centering a substrate within a chamber using pyrometers are described herein. In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments. It will be apparent to one skilled in the art that embodiments may be practiced without these specific details. In other instances, well-known aspects are not described in detail in order to not unnecessarily obscure embodiments. Furthermore, it is to be understood that the various embodiments shown in the accompanying drawings are illustrative representations and are not necessarily drawn to scale. As noted above, current processes for centering a substrate in a chamber involve human involvement and opening the chamber. As such, the process is susceptible to human error and there is considerable down time for the chamber. Accordingly, embodiments disclosed herein include a substrate centering process that can be implemented by a processor without the need to open the chamber. Particularly, embodiments utilize pyrometers that are present in the chamber in order to detect the presence of the substrate. The locations of the pyrometers relative to the center of the chamber are known. As such, the edge of the substrate can be detected at multiple locations and at multiple times. This allows for the calculation of an offset of the substrate from the center of the chamber. Embodiments disclosed herein allow for both centering in the X-direction and the Y-direction. In an embodiment, the edge detection is possible due to the structure of the chamber. A plurality of lamps may be provided opposite from the pyrometers. For example, the lamps may be used to heat the substrate for thermal processing operations, such as thermal oxidation or the like. In an embodiment, the lamps are kept on between the processing of different substrates in order to keep the lamps warm. As such, the pyrometers detect a relatively strong signal when there is no substrate present. As the next substrate is inserted into the chamber, the substrate blocks the thermal signal from the lamps. Accordingly, the signal from the pyrometers decreases. The decrease in the signal can be used as an indicator for the presence of the edge of the substrate. By monitoring the time the various pyrometers detect an edge, the offset of the substrate can be determined. Referring now toFIG.1A, a cross-sectional illustration of a semiconductor processing tool100is shown, in accordance with an embodiment. In an embodiment, the semiconductor processing tool100may be a thermal processing tool, such as a rapid thermal processing (RTP) tool or the like. The semiconductor processing tool100may be used to implement processing operations, such as thermal oxidation, annealing, or the like. In an embodiment, the semiconductor processing tool100may include a bottom105and a lid112. The bottom105and the lid112may be part of an enclosure that forms an internal volume in which the processing occurs. In an embodiment, a plurality of lamps113may be provided above the lid112. The lid112may be substantially transparent to infrared radiation. As such, the lamps113may provide thermal energy into the internal volume of the semiconductor processing tool100in order to process substrates, such as substrate101. The lamps113may be controlled in a plurality of zones. For example, the lamps113may include an inner zone, a middle zone, and an outer zone. Though, it is to be appreciated that embodiments may include any number of lamp zones (e.g., one or more zones). In an embodiment, a plurality of pyrometers120may be provided through the bottom105of the semiconductor processing tool100. In the illustrated embodiment, all of the pyrometers120A-120D are shown in a single plane for ease of illustration. Though, it is to be appreciated that the pyrometers120may be in different planes from each other, as will be shown in the plan view ofFIG.1B. As shown, the pyrometers120receive signals (e.g., thermal signals) from the lamps113, as indicated by the arrows. However, a first pyrometer120A has the signal blocked by the substrate101. Despite being shown as being covered by the substrate101, the signal to the second pyrometer120B passes through the substrate101. In actuality, the second pyrometer120B is not covered by the substrate101, as will be shown inFIG.1B. In an embodiment, a substrate101may be inserted into the semiconductor processing tool100. For example a robot arm110(e.g., an end effector) may secure the substrate101and deliver the substrate101into the semiconductor processing tool100. The robot arm110may place the substrate101within an edge ring107. The robot arm110may include functionality to displace the substrate101in both the X-direction (into and out of the plane ofFIG.1A) and the Y-direction (left to right inFIG.1A). In an embodiment, the substrate101may be any substrate suitable for semiconductor processing operations. In a particular embodiment, the substrate101may be a silicon wafer with any form factor (e.g., 300 mm, 450 mm, etc.). Though other semiconductor substrates101, or any other material substrate101may be used as well. Referring now toFIG.1B, a plan view illustration of the semiconductor processing tool100is shown, in accordance with an embodiment. In the illustrated embodiment, the lid112and the lamps113are omitted in order to clearly see the substrate101and the pyrometers120. As shown, the substrate101is inserted by the robot arm110. As the substrate101is inserted into the semiconductor processing tool100, the pyrometers120are covered. For example, at the point in time illustrated inFIG.1B, the first pyrometer120A is covered by the substrate101, and the remaining pyrometers120B,120C, and120D are left exposed. As the substrate101continues into the semiconductor processing tool, the remainder of the pyrometers120will be covered. As each pyrometer is covered a signal that indicates an edge detection is provided, as will be described in greater detail below. By combining the edge detection signal with a time that the edge is detected, the centering of the substrate101can be determined. A more detailed process of how centering is calculated is provided in greater detail below. In the illustrated embodiment, a set of four pyrometers120A-120D are shown. However, it is to be appreciated that embodiments may implement centering operations with as few as two pyrometers. Additionally, greater than four pyrometers120may be used. Increasing the number of pyrometers may allow for more precise centering of the substrate101. For example, the centering of the substrate may be provided down to an error of approximately 0.25 mm or less. Since the existing process is a manual process, such an error is considered acceptable since it will generally be more precise than human error currently provides. Referring now toFIG.1C, a plan view illustration depicting the planes (in the X-Y dimension) of the robot handler and the chamber is shown, in accordance with an embodiment. Particularly, the robot has a plane196defined by Xrobotand Yrobot, and the chamber has a plane197defined by Xchamberand Ychamber. The robot blade198may be moved within the robot plane196, which overlaps a portion of the chamber plane197. As such, the robot blade198may be inserted into the chamber197. It is to be appreciated that the placing is done by the robot blade198by reaching waypoints on an Xrobot, yrobotplane defined by the reach of the robot handler center and parallel to the Xchamber, Ychamberplane. The waypoint for the chamber is taught to match the center of the chamber. This is done by finding robot plane values Xrobot, Yrobot(e.g., (A,B)) that represent a point Xchamber, Ychamberthat is (0,0) on the chamber plane197. More generally, the process includes matching the robot's coordinate system (Xrobot,Yrobot) with the chamber coordinate system (Xchamber, Ychamber). This process may be commonly referred to as “robot teaching”. Referring now toFIG.2A, an illustration of the edge detection over time is shown, in accordance with an embodiment. In the embodiment illustrated inFIG.2A, the substrate201is shown as being perfectly centered on the X-axis (up and down). This is considered the ideal situation and is used to illustrate the edge detection process. As shown inFIG.2A, a series of substrate edges2011-2015are shown as the substrate201moves through the semiconductor processing tool. Each of the detected edges2011-2014correspond to the location of a pyrometer220A-220D. The edge2015is the ideal ending location where the substrate center is at the chamber center L0 (i.e., (0,0)). A more detailed description of how the Y-axis centering is implemented is provided in greater detail below. In the ideal situation shown inFIG.2A, the center points (L1-L4) of the substrate201at each location is provided at X=0. The location in the Y-direction can be calculated using trigonometry since the locations (X,Y) of the pyrometers220are known, and the radius of the substrate is known. For example, for the fourth pyrometer220D, the X-Y location is X=140 and Y=0. With a substrate radius of 150 mm, the center L4 of substrate201at time2013is provided by the Equation 1: Y(L4)=Y(220D)−(R2−X(220D)2)1/2=−53.8 Equation 1 Similar equations can be constructed using trigonometry to find the Y-values of the other center points. In an embodiment, the substrate201moves through the pyrometers220A-220D at a constant speed. The substrate may then decelerate to reach the endpoint location at time2015. Accordingly, the time differences between locations L1-L4 are proportional to the distances in the graph. As will be described in greater detail below the time values at different locations220A-220D can be used in order to determine the offset in the X-direction. Referring now toFIG.2B, a graph of the signals2211-2214detected by each of the pyrometers is shown with respect to time. The graph inFIG.2Bis a normalized graph with a maximum of 1 and a minimum of 0. As shown, each signal2211-2214has a sharp decline at the point where the substrate covers the pyrometer. This is because the substrate blocks the thermal radiation from the overlying lamps, which are kept at a constant power. As shown inFIG.2B, the time at which the pyrometer is considered to be covered is the point where the signal221passes the 0.5 mark of the signal strength. As shown, the slopes of the signals2211-2214may not be uniform. For example signal2214has a smaller slope than signal2211. This may be due to the location of the pyrometers. That is, pyrometers with an X-coordinate that is closer to 0 may have a relatively steeper slope than pyrometers with an X-coordinate further from 0. In the illustrated embodiment, each pyrometer is covered at a different time (e.g., t(L1), t(L2), t(L3), and t(L4)). In order to correlate each of the times to each other, one of the pyrometers is used as a reference point. For example, delta time values (Δt) are provided with respect to the first time t(L1). That is, Equation 2 may be used to find the Δt values. Δt(L2)=t(L2)−t(L1)=0.05 Equation 2 Similar equations can be provided to find the Δt values for other pyrometers. Referring now toFIG.3A, an illustration depicting a perfectly centered substrate301Aand a substrate301Bthat is offset by a distance dx is shown, in accordance with an embodiment.FIG.3Ais shown in order to illustrate how time offset values (dΔt(Ln)) are calculated for various X-offsets. For example, inFIG.3A, the dx distance is 30 mm. First the ideal substrate301Ahas a center point y(L2) calculated. Equation 1 can be used to calculate the center point y(L2). Then, the center point y′(L2) is calculated for the offset substrate3013using Equation 3. y′(L2)=y(320B)−(R2−(x(320B)−dx)2)1/2Equation 3 Similar equations can be provided for the other L values (L1, L3, and L4). Thereafter, a delta y value (dy(Ln)) is calculated using Equation 4. dy(Ln)=y′(Ln)−y(Ln) Equation 4 Since the distance is proportional to time, the time associated with each delta y can be provided by Equation 5. dt(Ln)=dy(Ln)/vEquation 5 In Equation 5, v is the velocity of the robot arm. Ultimately, a time offset dΔt(Ln) can be provided by subtracting dt(L1) from the time associated with each of the other delta y values. By changing the value of the offset dx, the time offsets dΔt(Ln) can be determined for all values of the offset dx. These values can be stored as a graph or a lookup table. In an alternative embodiment, the time offsets dΔt(Ln) can be determined by experimentation and/or machine learning. Referring now toFIG.3B, a graph showing the plot of the time offsets dΔt(L2), dΔt(L3), and dΔt(L4) and the corresponding dx value is shown, in accordance with an embodiment. The circles represent the time offset values that have been calculated for an offset substrate. The time offset values are fitted to the lines in order to provide the most accurate value of dx. For example, inFIG.3B, the time offset values correspond to a dx of approximately 1.4 mm. Accordingly, the robot arm would need to be offset by 1.4 mm in order to correct the centering of the substrate. While shown in graphical form, it is to be appreciated that a lookup table or the like may also be used to determine the offset dx. Additionally, it is to be appreciated that fewer than three time offset values or more than three time offset values may be used in order to determine the dx value. For example, a set of two pyrometers may be used in order to determine a single dΔt(L2) value, which can be used to determine dx. Referring now toFIG.3C, a process flow diagram illustrating a process380for determining an offset of a substrate in a direction perpendicular to the motion of the robot is shown, in accordance with an embodiment. In the described process380, a set of two pyrometers are used. However, it is to be appreciated that more than two pyrometers may be used in some embodiments. In an embodiment, the process380begins with operation381, which comprises inserting the substrate into the chamber with a robot arm. The chamber may be any suitable chamber with heating lamps and two or more pyrometers. For example, a semiconductor processing tool similar to the semiconductor processing tool100described in greater detail above may be used. In an embodiment, the robot arm may insert the substrate into the chamber in a linear direction. In the context of embodiments described herein, the linear direction may be in Y-axis as described above. In an embodiment, the robot arm may not be properly aligned to a center of the chamber. That is, the robot arm may have an offset in the X-direction (i.e., perpendicular to the direction of displacement of the robot arm). In an embodiment, the process380may continue with operation382, which comprises obtaining a delta time value for a second pyrometer relative to a first pyrometer. The delta time value may be the time between detecting an edge of the substrate with a first pyrometer and detecting the edge of the substrate with a second pyrometer. Edge detection of the substrate may be determined by looking at the signal of the pyrometers. For example, as the substrate passes over a pyrometer the signal may significantly drop, similar to the illustration inFIG.2B. In a particular embodiment, the edge detection may use the normalized midpoint of the pyrometer signal as the time when the pyrometer is considered to be covered. In an embodiment, the process380may continue with operation383, which comprises calculating a time offset value of the delta time value relative to an ideal delta time value. In an embodiment, the ideal delta time value may be the delta time value between the first pyrometer and the second pyrometer when the substrate is perfectly aligned. The ideal delta time value may be a measured value that is stored in a memory, or the ideal delta time value may be a calculated value that is stored in a memory. In an embodiment, the process380may continue with operation384, which comprises comparing the time offset value to a graph or lookup table that correlates the time offset value to a distance offset value. In an embodiment, when a graph is used, the graph may be similar to the graph shown inFIG.3B. The graph or lookup table may be generated analytically, as described above, and stored in a memory. In other embodiments, the graph or lookup table may be determined experimentally using machine learning algorithms or the like. In an embodiment, the distance offset value is the distance that the substrate is offset from true center in the direction perpendicular to the direction of travel of the substrate (i.e., in the X-direction using the coordinate system described herein). In an embodiment, the process380may continue with operation385, which comprises retracting the substrate from the chamber. In an embodiment, the substrate may be retracted along the same path that was used to insert the substrate into the chamber. In an embodiment, the process380may continue with operation386, which comprises moving the robot arm by the distance offset value in the direction perpendicular to the direction of travel of the substrate into and out of the chamber. Ideally the distance offset value corrects the misalignment of the substrate. In an embodiment, the process380may continue with operation387, which comprises inserting the substrate into the chamber with the robot arm. In the ideal case, the alignment is now corrected. However, it is to be appreciated that the alignment can be rechecked by repeating the process380any number of times. In a particular embodiment, the process380may repeat until the measured offset is within a given specification. For example, the specification may be within 5 mm or true center, within 2 mm of true center, or within 0.25 mm of true center. It is to be appreciated that the process380may be executed without human involvement. That is, a processor with access to the pyrometer signals, stored values in a memory, and the like, may automatically implement the process380. The process380may be executed after a preset number of substrates have been processed, after planned maintenance, or after any other desired duration of time or after other predetermined events. Referring now toFIG.4A, an illustration depicting a method for centering the substrate in the direction of motion (i.e., the Y-direction inFIG.4A) is shown, in accordance with an embodiment. In an embodiment, centering in the direction of motion is complicated due to there being a non-constant velocity of the substrate. That is, after passing the pyrometers, the robot arm must decelerate in order to stop at the proper center point in the Y-direction. In an embodiment, the Y-direction centering may be executed after the X-direction centering is completed. With the substrate properly aligned in the X-direction, the location of the center point L1 of the substrate4011when the first pyrometer420A is covered is known. Accordingly, if the deceleration process is used to stop the substrate on the first pyrometer420A, then a simple offset (equal to the distance between L1 and L0 (i.e., (0,0)) can be applied to the robot in order to make the substrate have a center point that lands at L0 when the substrate is at point401E. The first pyrometer420A may be considered to be covered when the normalized pyrometer signal is at approximately 0.5. If the signal strength is above or below 0.5 (or outside of a threshold around 0.5) then the deceleration process is adjusted and is rechecked until the signal strength is at 0.5 or within the predetermined threshold. In the described embodiment, a single pyrometer reading420A is all that is necessary in order to center the substrate in the Y-direction. Of course the center point can further be confirmed by using additional pyrometers (e.g., second pyrometer420B at position4012). Referring now toFIG.4B, a process flow diagram explaining a process490for centering the substrate in the direction of motion (i.e., the Y-direction as described herein) is shown, in accordance with an embodiment. In an embodiment, process490begins with operation491, which comprises inserting the substrate into the chamber a first distance with the robot arm so that the substrate stops at the first pyrometer. Operation491may begin after the substrate has been aligned properly in the orthogonal direction (i.e., the X-direction as described herein). With the center in the X-direction known, the distance to the first pyrometer should be known. That known distance can be used as a starting point for the first distance. In an embodiment, the first distance may be traversed with a constant velocity until near the end of the first distance. At that point a deceleration process may be implemented in order to stop the substrate at the first pyrometer. In an embodiment, the process490may continue with operation492, which comprises determining if the substrate properly stops at the first pyrometer. In an embodiment, the substrate is considered to be properly stopped if the normalized pyrometer signal is at 0.5 or within a predetermined range of 0.5. If the substrate is not stopped at the desired position, then operation491and492are repeated with changes to the first distance and/or the deceleration process until the proper position is obtained. If the pyrometer signal is greater 0.5, a positive offset is provided, and if the pyrometer signal is less than 0.5, a negative offset is provided. The amount of movement needed may be given by the slope of the pyrometer signal and the pyrometer signal value. That is the time axis inFIG.2Bis converted into a Y value using the equation Y=v*t, where v is velocity and t is time. In an embodiment, the process490may continue with operation493, which comprises adding a centering offset to the first distance when the substrate properly stops at the first pyrometer. In an embodiment, the centering offset may be equal to the Y-value of the center point of the substrate when the first pyrometer is initially covered. The addition of the Y-value, therefore, results in the endpoint401Ebeing properly centered at the (0,0) coordinate (i.e., the center of the chamber). In an embodiment, the process490may continue with operation494, which comprises retracting the substrate from the chamber. In an embodiment, the retraction of the substrate may be the opposite of the speed, acceleration, distance, etc. used to insert the substrate into the chamber. In an embodiment, process490may continue with operation495, which comprises inserting the substrate into the chamber a second distance equal to the sum of the first distance and the centering offset. Additionally, the acceleration and the deceleration process used to find the centering offset may also be used in this insertion of the substrate. Accordingly, the substrate should land with a center point on L0 (i.e., (0,0)) or within a desired threshold of (0,0). More particularly, the acceleration, the deceleration, and the constant velocity of the substrate are the same between the operation for finding the centering offset, and the insertion included in operation495. What is changed is the duration of the constant velocity. The duration of the constant velocity can be determined using the centering offset (e.g., the centering offset distance is divided by the constant velocity in order to determine the additional duration to apply the constant velocity in order to land on (0,0)). FIG.5illustrates a diagrammatic representation of a machine in the exemplary form of a computer system500within which a set of instructions, for causing the machine to perform any one or more of the methodologies described herein, may be executed. In alternative embodiments, the machine may be connected (e.g., networked) to other machines in a Local Area Network (LAN), an intranet, an extranet, or the Internet. The machine may operate in the capacity of a server or a client machine in a client-server network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a Personal Digital Assistant (PDA), a cellular telephone, a web appliance, a server, a network router, switch or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by that machine. Further, while only a single machine is illustrated, the term “machine” shall also be taken to include any collection of machines (e.g., computers) that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies described herein. The exemplary computer system500includes a processor502, a main memory504(e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.), a static memory506(e.g., flash memory, static random access memory (SRAM), MRAM, etc.), and a secondary memory518(e.g., a data storage device), which communicate with each other via a bus530. Processor502represents one or more general-purpose processing devices such as a microprocessor, central processing unit, or the like. More particularly, the processor502may be a complex instruction set computing (CISC) microprocessor, reduced instruction set computing (RISC) microprocessor, very long instruction word (VLIW) microprocessor, processor implementing other instruction sets, or processors implementing a combination of instruction sets. Processor502may also be one or more special-purpose processing devices such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), network processor, or the like. Processor502is configured to execute the processing logic526for performing the operations described herein. The computer system500may further include a network interface device508. The computer system500also may include a video display unit510(e.g., a liquid crystal display (LCD), a light emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device512(e.g., a keyboard), a cursor control device514(e.g., a mouse), and a signal generation device516(e.g., a speaker). The secondary memory518may include a machine-accessible storage medium (or more specifically a computer-readable storage medium)532on which is stored one or more sets of instructions (e.g., software522) embodying any one or more of the methodologies or functions described herein. The software522may also reside, completely or at least partially, within the main memory504and/or within the processor502during execution thereof by the computer system500, the main memory504and the processor502also constituting machine-readable storage media. The software522may further be transmitted or received over a network520via the network interface device508. While the machine-accessible storage medium532is shown in an exemplary embodiment to be a single medium, the term “machine-readable storage medium” should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more sets of instructions. The term “machine-readable storage medium” shall also be taken to include any medium that is capable of storing or encoding a set of instructions for execution by the machine and that cause the machine to perform any one or more of the methodologies of the present disclosure. The term “machine-readable storage medium” shall accordingly be taken to include, but not be limited to, solid-state memories, and optical and magnetic media. In accordance with an embodiment of the present disclosure, a machine-accessible storage medium has instructions stored thereon which cause a data processing system to perform a method of centering a substrate in a chamber using pyrometers. The method includes measuring a delta time value between the covering of a first pyrometer and the covering of a second pyrometer. The method includes calculating a time offset value of the delta time value relative to an ideal delta time value. The method includes comparing the time offset value to a graph or lookup table that correlates the time offset value to a distance offset value. The method includes retracting the substrate, adjusting the robot arm by the distance offset value, and reinserting the substrate into the chamber. Thus, methods for centering a substrate using pyrometer data is disclosed. | 28,688 |
11942346 | DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Modes for carrying out the present invention, i.e., embodiments of the present invention, will hereinafter be described in detail with reference to the drawings. The present invention is not limited to the details of the embodiments described below. The components described below cover those which could easily be anticipated by those skilled in the art and those which are essentially identical thereto. Furthermore, the arrangements described below can be used in appropriate combinations. Various omissions, replacements, or changes of the arrangements may be made without departing from the scope of the present invention. First Embodiment A resin applying machine1according to a first embodiment of the present invention will be described below with reference to the drawings.FIG.1illustrates in perspective a structural example of the resin applying machine1according to the first embodiment. The resin applying machine1is an apparatus for coating a face side201that is one surface of a wafer200with a resin302(seeFIGS.9and10). According to the first embodiment, the wafer200, which is an object to be coated with the resin302by the resin applying machine1, is a semiconductor wafer, an optical device wafer, or the like that is shaped as a circular plate made of a base material such as silicon, sapphire, or gallium arsenide, for example. Since the wafer200is also an object to be processed according to the first embodiment on the resin applying machine1, the wafer200is also referred to as “workpiece.” The wafer200includes a device area202(seeFIG.3) where devices are formed on the face side201and an outer circumferential excess area203(seeFIG.3) surrounding the device area202. Plural bumps204(seeFIG.3) having a function as electrodes are disposed on face sides of devices formed on the face side201of the wafer200within the device area202. The bumps204protrude from the face sides of the devices. The devices have surface irregularities on their face sides because of the bumps204thereon. The wafer200has a flat reverse side205(seeFIG.3) opposite the face side201thereof. As the devices on the wafer200have surface irregularities on their face sides because of the bumps204thereon, the resin applying machine1according to the first embodiment is highly advantageous when applied to the wafer200. However, the present invention is not limited to such an application, but may be applied to a packaged substrate having surface irregularities in which devices and wires connected to the devices by wire bonding are sealed by a sealant made of a molding resin, a wafer having no surface irregularities, a packaged substrate having no surface irregularities, or an as-sliced wafer before devices are formed thereon. As illustrated inFIG.1, the resin applying machine1includes a processing chamber10, a temperature measuring unit15for measuring the temperature in the processing chamber10, and a controller70for controlling the members and mechanisms of the resin applying machine1. The processing chamber10of the resin applying machine1includes a holder20for holding the wafer200, a table30disposed in facing relation to the holder20, a resin supply unit40for supplying a liquid resin301to the table30, a moving unit50for moving the holder20and the table30relatively closely to each other to coat the wafer200with the liquid resin301, and a hardening unit60for hardening the liquid resin301applied to the wafer200. The holder20holds the wafer200on a lower end thereof under suction forces applied to the wafer200from above. The holder20is vertically movably supported on the moving unit50. The holder20includes a pressing force measuring unit22disposed vertically above the position where the wafer200is held, i.e., the lower end of the holder20. The pressing force measuring unit22is capable of measuring a pressing force applied downwardly through the holder20. Specifically, the pressing force measuring unit22can measure a pressing force applied when the holder20spreads the liquid resin301. The table30has a holding surface31that is slightly larger in diameter than the diameter of the wafer200. The table30holds on the holding surface31thereof a sheet92supplied from a sheet supply unit90to be described later. The liquid resin301supplied from the resin supply unit40is supplied to the sheet92held on the holding surface31. A hardening unit60is disposed vertically below the table30, which is integrally combined with the hardening unit60. The hardening unit60hardens the liquid resin301supplied to the sheet92through the sheet92held on the holding surface31. The resin supply unit40includes a resin supply source41as a source for supplying the liquid resin301and a nozzle42for ejecting the liquid resin301from the resin supply source41toward the holding surface31of the table30. According to the first embodiment, the liquid resin301supplied from the resin supply unit40should preferably have a viscosity in the range of 0.5 to 400 Pa·s. According to the first embodiment, the liquid resin301supplied from the resin supply unit40is an ultraviolet-curable resin. However, the present invention is not limited to such details. The liquid resin301may instead be a thermosetting resin. In a case where the liquid resin301supplied from the resin supply unit40is an ultraviolet-curable resin, it is made up of an ultraviolet-curable resin component and a binder polymer component such as acrylic polymer. In a case where the liquid resin301supplied from the resin supply unit40is a thermosetting resin, it is made up of a thermosetting resin component such as an epoxy resin or a phenolic resin and a binder polymer component such as acrylic polymer. The liquid resin301supplied from the resin supply unit40may alternatively be a mixture of ultraviolet-curable resin and thermosetting resin. According to the first embodiment, inasmuch as the liquid resin301is an ultraviolet-curable resin, the hardening unit60includes a plurality of ultraviolet ray emission sections61(seeFIG.2, etc.) arrayed in a horizontal array for emitting ultraviolet rays62(seeFIG.9). The ultraviolet ray emission sections61may be ultraviolet light-emitting diodes (LEDs), for example. Therefore, the table30and the sheet92, to be described later, are made of materials capable of transmitting therethrough at least part of the ultraviolet rays62. For example, the table30may be made of glass transparent to ultraviolet rays. However, the present invention is not limited to such details. The liquid resin301may be a thermosetting resin, the hardening unit60may be a heater, and the table30and the sheet92may be made of a material that is sufficiently thermally conductive. The controller70controls the members and mechanisms of the resin applying machine1to enable the resin applying machine1to perform various operations. The controller70is a computer including an arithmetic processing apparatus having a microprocessor such as a central processing unit (CPU), a storage apparatus having a memory such as a read only memory (ROM) or a random access memory (RAM), and an input/output interface apparatus. The arithmetic processing apparatus of the controller70carries out arithmetic processing operations according to computer programs stored in the storage apparatus to output control signals for controlling the resin applying machine1through the input/output interface apparatus to the members and mechanisms of the resin applying machine1. The controller70includes a correlation data storage unit71. The function of the correlation data storage unit71is realized when the storage apparatus of the controller70records predetermined correlation data73(seeFIG.7) therein. The correlation data73will be described later. As illustrated inFIG.1, the resin applying machine1further includes a pair of cassettes81and82, a loading/unloading unit83, and a delivery unit86. Each of the cassettes81and82is constructed as a housing for accommodating wafers200, the housing having a plurality of slots for receiving the respective wafers200therein. The cassette81accommodates therein wafers200to be processed by the resin applying machine1, whereas the cassette82accommodates therein wafers200that have been processed by the resin applying machine1. The loading/unloading unit83unloads a wafer200to be processed from the cassette81onto a temporary rest base111of a wafer detecting unit110and loads a processed wafer200from an excess portion removing unit120, to be described later, into the cassette82. The delivery unit86delivers a wafer200, whose diameter have been measured by the wafer detecting unit110and whose center and orientation have been aligned by the wafer detecting unit110, from the temporary rest base111to the holder20, and delivers a wafer200, whose face side201has been coated with the resin302, from the holder20to the excess portion removing unit120. As illustrated inFIG.1, the resin applying machine1further includes the sheet supply unit90. The sheet supply unit90pulls out a sheet92from a sheet roll91where the sheet92with both surfaces being flat is wound in a roll, and cuts the sheet92into a predetermined length. The sheet92of the cut length is attracted and held under suction by attracting members94(seeFIG.2) disposed vertically beneath a sheet delivery unit93, and is then delivered onto the holding surface31of the table30by the sheet delivery unit93that is actuated by an actuator95. According to the first embodiment, the sheet92is slightly larger than the holding surface31of the table30. According to the first embodiment, the sheet92is made of a material capable of transmitting therethrough at least part of the ultraviolet rays62. For example, the sheet92may be made of polyolefin (PO), polyethylene terephthalate (PET), or the like. As illustrated inFIG.1, the resin applying machine1further includes a wafer detecting unit110. As illustrated inFIG.1, the wafer detecting unit110includes a temporary rest base111, an illuminating unit112, and an image capturing unit113. The illuminating unit112is disposed below the temporary rest base111in the thicknesswise directions of the wafer200, and extends horizontally in radial directions of the wafer200. The illuminating unit112emits illuminating light toward the wafer200that is placed on the temporary rest base111thereabove. The image capturing unit113is disposed above the center of the temporary rest base111in the thicknesswise directions of the wafer200, and faces downwardly. The image capturing unit113captures an image of the wafer200that is placed on the temporary rest base111, and detects illuminating light emitted from the illuminating unit112. The image capturing unit113detects the center of the wafer200from the captured image of the wafer200, and also detects the radial shape of the wafer200from the detected illuminating light emitted from the illuminating unit112. The wafer detecting unit110can measure the wafer diameter that represents the radial size of the wafer200on the basis of the detected radial shape of the wafer200from the image capturing unit113. Furthermore, the wafer detecting unit110aligns the center of the wafer200and aligns the orientation of the wafer200on the basis of the detected center of the wafer200and the detected radial shape of the wafer200from the image capturing unit113. As illustrated inFIG.1, the resin applying machine1further includes an excess portion removing unit120. The excess portion removing unit120has a holding table121for holding a wafer200whose face side201has been coated with the resin302, and a cutter122for cutting off an excess portion, which protrudes radially outwardly from the outer edge of the wafer200, of the resin302that has coated the face side201of the wafer200held on the holding table121. Operation of the resin applying machine1according to the first embodiment will be described below.FIG.2illustrates in cross section essential details of a sheet placing operation of the resin applying machine1illustrated inFIG.1.FIG.3illustrates in cross section essential details of a wafer holding operation of the resin applying machine1illustrated inFIG.1.FIG.4illustrates in cross section essential details of a resin supplying operation of the resin applying machine1illustrated inFIG.1.FIG.5is a cross-sectional view illustrating a moved distance27in the resin applying machine1illustrated inFIG.1.FIG.6is a graph illustrating a correlation between a temperature in a processing chamber10and the resin thickness312of a resin302to be applied at a predetermined moved distance27in the resin applying machine1illustrated inFIG.1.FIG.7is a graph illustrating a correlation between a temperature in the processing chamber10and the moved distance27in a case where a wafer is coated with the resin302to a predetermined resin thickness312in the resin applying machine1illustrated inFIG.1.FIGS.8A and8Billustrate in cross section essential details of a resin applying operation of the resin applying machine1illustrated inFIG.1.FIG.8Aillustrates the components before the holder20and the table30are moved closely to each other, andFIG.8Billustrates the components after the holder20and the table30have been moved closely to each other.FIG.9illustrates in cross section essential details of a hardening operation of the resin applying machine1illustrated inFIG.1.FIG.10illustrates in cross section essential details of an excess portion removing operation of the resin applying machine1illustrated inFIG.1. As illustrated inFIG.2, the resin applying machine1performs a sheet placing operation in which the sheet supply unit90supplies the sheet92onto the holding surface31of the table30. Though the sheet placing operation may be omitted from a sequence of operations of the resin applying machine1to coat the face side201of the wafer200with the resin302, it should preferably be performed because the sheet92can prevent the liquid resin301from smearing or otherwise damaging the holding surface31of the table30when the liquid resin301is supplied to holding surface31of the table30. As illustrated inFIG.3, the resin applying machine1performs a wafer holding operation in which the holder20holds the wafer200. As illustrated inFIG.3, the holder20includes an attracting member20-2having a flat holding surface20-1as its lower surface and a frame20-3supporting the attracting member20-2securely fitted in a cavity defined centrally in the frame20-3and opening downwardly. The attracting member20-2is of a disk shape and made of porous ceramics or the like having a number of pores therein. The attracting member20-2is connected to a vacuum suction source, not illustrated, through a vacuum suction channel, not illustrated. The holding surface20-1in its entirety holds the wafer200thereon under suction forces generated by the vacuum suction source and acting through the vacuum suction channel on the holding surface20-1. In the wafer holding operation, the moving unit50keeps the holding surface20-1of the holder20sufficiently spaced from the holding surface31of the table30. Then, in the wafer holding operation, the delivery unit86delivers the wafer200, whose wafer diameter has been measured and whose center and orientation have been aligned by the wafer detecting unit110, with the reverse side205facing vertically upwardly to a position below the holding surface20-1of the holder20. In the wafer holding operation, the holder20draws the upwardly facing reverse side205of the wafer200delivered to the position below the holding surface20-1, under suction onto the holding surface20-1. In the wafer holding operation, therefore, the holder20holds the wafer200under suction on the holding surface20-1while the face side201with the bumps204is facing the holding surface31of the table30disposed therebelow, as illustrated inFIG.3. As illustrated inFIG.4, the resin applying machine1performs a resin supplying operation in which the resin supply unit40supplies the liquid resin301to the table30that faces the holder20. In the resin supplying operation, specifically, the controller70calculates an appropriate amount of the liquid resin301to be supplied on the basis of the wafer diameter obtained by the wafer detecting unit110and a desired resin thickness311(seeFIG.5) for the liquid resin301with which to coat the face side201of the wafer200. The desired resin thickness311for the liquid resin301is calculated on the basis of a desired resin thickness312(seeFIG.9) for the resin302with which to coat the face side201of the wafer200and a shrinkage factor at which the liquid resin301is hardened into the resin302. In the resin supplying operation, next, the resin supply unit40moves the tip end of the nozzle42from a retracted position away from the holding surface31of the table30to a supply position disposed above and facing the holding surface31of the table30. In the resin supplying operation, thereafter, the resin supply unit40supplies the appropriate amount of the liquid resin301calculated by the controller70from the nozzle42to the holding surface31of the table30on which the sheet92has been placed in the sheet placing operation. In the resin applying machine1according to the first embodiment, the sheet placing operation, the wafer holding operation, and the resin supplying operation may not necessarily be carried out in the order named. In the resin applying machine1according to the first embodiment, specifically, the resin supplying operation may be carried out after the sheet placing operation, and the wafer holding operation as a processing operation on the wafer200and the sheet placing operation and the resin supplying operation as a series of processing operations on the table30may be carried out in any sequence or concurrent with each other. A resin applying operation to be described below is carried out after all the processing operations including the sheet placing operation, the wafer holding operation, and the resin supplying operation have been carried out. The resin applying machine1performs a resin applying operation in which the moving unit50relatively moves the holder20and the table30closely to each other to coat the wafer200with the liquid resin301, as illustrated inFIGS.8A and8B. In the resin applying operation, as illustrated inFIG.5, the controller70sets, in the moving unit50, a moved distance27by which the holder20and the table30are to be relatively moved, i.e., a relatively moved distance27, corresponding to the temperature measured by the temperature measuring unit15, by referring to the correlation data73recorded in the correlation data storage unit71, for coating the wafer200with the resin302to the predetermined resin thickness312. According to the first embodiment, as illustrated inFIG.5, the temperature measuring unit15includes a thermocouple15-1mounted in a hole defined in the frame20-3and directed toward the holding surface20-1of the attracting member20-2of the holder20, and a radiation-type thermometer15-2disposed on a side of the holder20and directed toward the holding surface31of the table30. According to the first embodiment, the thermocouple15-1measures the temperature of the holder20in the processing chamber10, and the radiation-type thermometer15-2measures the temperature of the table30. According to the present invention, however, the temperature measuring unit15is not limited to the above configuration according to the first embodiment, but may be of any configuration as long as it is capable of measuring the temperature in the processing chamber10. The temperature measuring unit15should preferably measure the temperatures of at least either one of the holder20and the table30directly involved in coating the wafer200with the liquid resin301, and should more preferably measure the temperatures of both the holder20and the table30. The resin applying machine1according to the first embodiment needs to conduct a predetermined experiment in order to record the correlation data73beforehand in the correlation data storage unit71. Specifically, the predetermined experiment is conducted to measure the resin thickness312of the resin302applied to the wafer200when the moving unit50has relatively moved the holder20and the table30over the same moved distance27at different temperatures in the processing chamber10. Stated otherwise, it is possible according to the predetermined experiment to acquire a correlation between the temperature in the processing chamber10and the resin thickness312of the resin302applied to the wafer200when the moved distance27by which the moving unit50has relatively moved the holder20and the table30is constant. More specifically, correlation data72illustrated inFIG.6, for example, can be acquired by performing a fitting process on the result of the experiment with a predetermined smooth approximate function. In the predetermined experiment to be conducted beforehand by the resin applying machine1according to the first embodiment, it is preferable to employ an arithmetic mean of the temperature of the holder20measured by the thermocouple15-1and the temperature of the table30measured by the radiation-type thermometer15-2, as the temperature in the processing chamber10. In such a case, the temperature in the processing chamber10can be handled as an appropriate representative value. According to the present invention, the temperature in the processing chamber10that is used in the predetermined experiment conducted in advance by the resin applying machine1is not limited to the arithmetic mean referred to above, but may be the temperature of the holder20measured by the thermocouple15-1or the temperature of the table30measured by the radiation-type thermometer15-2, or a temperature in the processing chamber10that is measured in another location or by another process. Taking into account the fact that the bumps204are embedded in the liquid resin301as illustrated inFIG.5when the liquid resin301is deformed in the resin applying operation, the wafer200that has the thickness210, the liquid resin301to be applied to the desired resin thickness311, and the sheet92that has the known thickness97are vertically layered between the holding surface20-1of the holder20and the holding surface31of the table30. In view of this, the predetermined experiment to be conducted beforehand by the resin applying machine1according to the first embodiment is carried out taking into consideration the thickness97of the sheet92and the thickness210of the wafer200illustrated inFIG.5, and corrections are made as by subtracting these thicknesses. Moreover, the predetermined experiment is conducted taking into consideration a shrinkage factor at which the liquid resin301is hardened into the resin302and appropriate corrections are made, similarly in a case where the appropriate amount of the liquid resin301to be supplied is calculated in the resin supplying operation. In the predetermined experiment, in a case where the sheet placing operation is omitted, it is not necessary to take into account the thickness97of the sheet92and to make corrections by subtracting the thickness97of the sheet92. According to the first embodiment, as illustrated inFIG.6, the correlation data72is represented by a monotonously decreasing function according to which the resin thickness312decreases as the temperature increases within the range of the temperature in the processing chamber10when the resin applying machine1is actually used. This is considered to be caused by the fact that the thermal expansion of the components such as the holder20, the table30, the moving unit50, etc. as apparatus parts in the processing chamber10of the resin applying machine1tends to reduce the spacing between the face side201of the wafer200and the upper surface of the sheet92in the range of the temperature, and the shrinkage factor of the liquid resin301and the thermal expansion of the resin302determine the final resin thickness312of the resin302based on the spacing. According to the first embodiment, the correlation data72is approximated by a linear function with respect to the temperature and the resin thickness312in the range of the temperature. This is considered to be because in the range of the temperature, since the thermal expansion of the components referred to above can be approximated by a linear function, the reduction of the spacing referred to above can similarly be approximated by a linear function. The resin applying machine1according to the first embodiment further needs to carry out predetermined data processing based on a plurality of correlation data72acquired by the above predetermined experiment with respect to respective various moved distances27. Specifically, according to the predetermined data processing, a correlation between the temperature in the processing chamber10and the moved distance27by which the moving unit50has relatively moved the holder20and the table30in a case where the resin thickness312of the applied resin302is of a predetermined value can be acquired on the basis of the plurality of correlation data72, and correlation data73illustrated inFIG.7, for example, can be acquired by performing predetermined computer processing. The correlation data73thus acquired becomes data for making the resin thickness312of the applied resin302constant even at different temperatures in the processing chamber10. The resin applying machine1according to the first embodiment records the correlation data73thus acquired in the correlation data storage unit71. According to the first embodiment, inasmuch as the correlation data72is represented by a monotonously decreasing function according to which the resin thickness312decreases as the temperature increases within the range of the temperature in the processing chamber10when the resin applying machine1is actually used, the correlation data73is represented by a monotonously decreasing function according to which the moved distance27decreases as the temperature increases as illustrated inFIG.7, as is the case with the correlation data72. According to the first embodiment, since the correlation data72is approximated by a linear function with respect to the temperature and the resin thickness312in the range of the temperature, the correlation data73is represented by a linear function with respect to the temperature and the moved distance27, as is the case with the correlation data72. In the resin applying operation, as illustrated inFIGS.8A and8B, the controller70controls the moving unit50to move the holder20downwardly closely to the table30by the moved distance27set by referring to the correlation data73recorded in the correlation data storage unit71, causing the holding surface20-1of the holder20and the holding surface31of the table30to horizontally spread the liquid resin301therebetween with the wafer200and the sheet92interposed therebetween. In the resin applying operation, consequently, the liquid resin301to coat the face side201of the wafer200is formed between the face side201of the wafer200and the sheet92. In the resin applying operation, since the sheet92is flat, the surface of the liquid resin301that is held in contact with the sheet92is formed flatwise. The resin applying machine1performs a hardening operation in which the hardening unit60hardens the liquid resin301applied to the wafer200in the resin applying operation into the resin302, as illustrated inFIG.9. In the hardening operation, according to the first embodiment, the ultraviolet ray emission sections61of the hardening unit60emit ultraviolet rays62through the table30and the sheet92to the liquid resin301that is an ultraviolet-curable resin, hardening the liquid resin301into the resin302, as illustrated inFIG.9. In the hardening operation, as the liquid resin301is hardened into the resin302, the liquid resin301that has the resin thickness311is shrunk into the resin302that has the resin thickness312smaller than the resin thickness311. As illustrated inFIG.10, the resin applying machine1performs an excess portion removing operation in which the excess portion removing unit120cuts off an excess portion, which protrudes radially outwardly from the outer edge of the wafer200, of the resin302that has coated the face side201of the wafer200. In the excess portion removing operation, specifically, the delivery unit86delivers the wafer200whose face side201has been coated with the resin302by the processing up to the hardening operation, from the holder20to the excess portion removing unit120, and places the wafer200on the holding table121with the resin302facing vertically downwardly. In the excess portion removing operation, next, the excess portion removing unit120causes the cutter122to cut into the resin302vertically downwardly along the outer edge of the wafer200held on the holding table121, as illustrated inFIG.10. In the excess portion removing operation, thereafter, the excess portion removing unit120moves the cutter122that has cut into the resin302circumferentially along the outer edge of the wafer200, cutting off the excess portion of the resin302. In the excess portion removing operation, the cutter122is caused to cut into the sheet92beyond the resin302, so that any excess portion of the sheet92can be cut off simultaneously when the excess portion of the resin302is cut off. Even if the resin302is free of any excess portion, it is preferable to carry out the excess portion removing operation in order to cut off any excess portion of the sheet92. The resin applying machine1according to the first embodiment is able to produce the wafer200that has been coated with the resin302to the desired resin thickness312, all over the face side201as one of the surfaces of the wafer200, through the processing ranging from the sheet placing operation to the excess portion removing operation described above. In the resin applying machine1according to the first embodiment, which is arranged as described above, the controller70includes the correlation data storage unit71for recording the correlation data73with respect to the temperature in the processing chamber10and the moved distance27by which the moving unit50has relatively moved the holder20and the table30at the temperature, as data for making the resin thickness312of the applied resin302constant even at different temperatures in the processing chamber10, the data being acquired on the basis of measured resin thicknesses312of the resin302that has coated the wafer200when the moving unit50has relatively moved the holder20and the table30by the same moved distance27at different temperatures in the processing chamber10, sets the moved distance27corresponding to the temperature measured by the temperature measuring unit15in the moving unit50, and coats the wafer200with the resin302to the predetermined resin thickness312. Since the resin applying machine1according to the first embodiment changes the moved distance27set in the moving unit50in order to coat the wafer200with the resin302to the desired resin thickness312depending on the temperature in the processing chamber10, the resin applying machine1is advantageous in that it can reduce thickness variations of the resin302that has coated the wafer200, which variations would possibly be caused by variations of the temperature in the processing chamber10. According to a conventional method, in a case where the resin thickness312of the resin302to coat the wafer200is set to 100 μm, even when the temperature in the processing chamber10varies slightly by approximately 1° C. within the range of the temperature referred to above, the resin302that has coated the wafer200tends to have a thickness variation of approximately 2 μm, and its relative error reaches 2%. With the resin applying machine1according to the first embodiment, however, each time it performs the resin applying operation, it measures the temperature in the processing chamber10and optimizes the moved distance27to be set in the moving unit50. Therefore, it can be seen that thickness variations of the resin302that has coated the wafer200that possibly tend to occur due to variations of the temperature in the processing chamber10are greatly reduced in terms of a converted relative error. According to the process disclosed in Japanese Patent Laid-Open No. 2017-168565, in a case where the pressing force applied to the liquid resin301in the resin applying operation is controlled, the resin302that has coated the wafer200is likely to suffer large thickness variations due to variations of the viscosity of the liquid resin301. The resin applying machine1according to the first embodiment, however, is able to essentially prevent the resin302that has coated the wafer200from suffering thickness variations that possibly tend to occur due to variations of the viscosity of the liquid resin301because a controlling factor in the resin applying operation is the moved distance27as a parameter directly acting on the resin thickness312, instead of the pressing force. In the resin applying machine1according to the first embodiment, the temperature measuring unit15measures the temperature of at least one of the holder20and the table30. Since the resin applying machine1according to the first embodiment uses the temperature of the holder20or the table30close to the liquid resin301as the temperature in the processing chamber10, the resin applying machine1can accurately grasp the thermal expansion of the components including the holder20, the table30, the moving unit50, etc. and the resin302and optimize the moved distance27set in the moving unit50. Therefore, the resin applying machine1is advantageous in that it can appropriately reduce thickness variations of the resin302that has coated the wafer200, which thickness variations would possibly be caused by variations of the temperature in the processing chamber10. Furthermore, in the resin applying machine1according to the first embodiment, the temperature measuring unit15measures the temperatures of the holder20and the table30and uses their average as the temperature in the processing chamber10. Therefore, since the resin applying machine1according to the first embodiment can accurately grasp the temperature of the liquid resin301as the temperature in the processing chamber10and optimize the moved distance27set in the moving unit50, the resin applying machine1is advantageous in that it can appropriately reduce thickness variations of the resin302that has coated the wafer200, which variations would possibly be caused by variations of the temperature in the processing chamber10. Second Embodiment A resin applying machine1according to a second embodiment of the present invention will be described below with reference to the drawings.FIGS.11A and11Billustrate in cross section essential details of a tape affixing operation of the resin applying machine1according to the second embodiment.FIG.11Aillustrates the wafer200and a tape220before the tape220is affixed to the wafer200.FIG.11Billustrates the wafer200and the tape220after the tape220has been affixed to the wafer200.FIG.12illustrates in cross section essential details of resin applying operation of the resin applying machine1according to the second embodiment. Those parts inFIGS.11A,11B, and12which are identical to those of the first embodiment are denoted by identical reference characters, and will not be described in detail below. The resin applying machine1according to the second embodiment is similar to the resin applying machine1according to the first embodiment except that a tape affixing unit130is added. As illustrated inFIGS.11A and11B, the tape affixing unit130includes a holding table131for holding the wafer200as an object to which the tape220is to be affixed and an annular frame225to be mounted on an outer edge portion of the tape220, and a tape supply unit, not illustrated, for supplying the tape220and affixing the tape220to the wafer200and the annular frame225. According to the second embodiment, the tape affixing unit130includes the tape supply unit. However, the present invention is not limited to such details. Rather, the tape supply unit may be dispensed with, and the tape220may be supplied and affixed to the wafer200and the annular frame225by the operator. As illustrated inFIGS.11A and11B, the holding table131includes an attracting member131-2having a flat holding surface131-1as its upper surface and a frame131-3supporting the attracting member131-2securely fitted in a cavity defined centrally in the frame131-3and opening upwardly, as is the case with the holder20. The attracting member131-2is made of a material similar to that of the attracting member20-2. The attracting member131-2is connected to a vacuum suction source, not illustrated, through a vacuum suction channel, not illustrated, as is the case with the attracting member20-2. The holding surface131-1in its entirety holds the wafer200and the annular frame225thereon under suction forces generated by the vacuum suction source and acting through the vacuum suction channel on the holding surface131-1. The tape220used in the tape affixing unit130includes a tape base221larger than the diameter of the wafer200and an adhesive layer222disposed on a surface of the tape base221. The tape base221has a central area facing the device area202of the wafer200and free of the adhesive layer222, and an outer circumferential area including an outer edge portion that faces the outer circumferential excess area203of the wafer200and the annular frame225, the adhesive layer222being disposed on the outer circumferential area. Operation of the resin applying machine1according to the second embodiment will be described below. In the first embodiment, prior to the wafer holding operation, the operation of the resin applying machine1according to the second embodiment further performs the tape affixing operation, with resulting changes in resin applying operation. As illustrated inFIGS.11A and11B, the tape affixing unit130of the resin applying machine1carries out the tape applying operation in which the tape220is affixed to the face side201of the wafer200, which is a surface to be coated with the resin302, and the annular frame225is mounted on the outer edge portion of the tape220. In the tape affixing operation, specifically, as illustrated inFIG.11A, the holding table131of the tape affixing unit130holds the reverse side205of the wafer200under suction on a central area of the holding surface131-1, and the outer circumferential area of the holding surface131-1holds the annular frame225under suction thereon. Next, in the tape affixing operation, the tape supply unit of the tape affixing unit130supplies the tape220to a position over the wafer200and the annular frame225, where the central area of the tape220that is free of the adhesive layer222faces the face side201of the device area202of the wafer200and the surface, which faces the adhesive layer222, of the outer circumferential area of the tape220with the adhesive layer222disposed thereon faces the face side201of the outer circumferential excess area203of the wafer200and the annular frame225. In the tape affixing operation, thereafter, as illustrated inFIG.11B, the tape supply unit of the tape affixing unit130brings the central area of the tape220that is free of the adhesive layer222into intimate contact with the face side201of the device area202of the wafer200, and affixes the outer circumferential area of the tape220on which the adhesive layer222is disposed to the face side201of the outer circumferential excess area203of the wafer200and the annular frame225with the adhesive layer222interposed therebetween. In the resin applying operation according to the second embodiment, when the controller70sets a moved distance27in the moving unit50by referring to the correlation data73recorded in the correlation data storage unit71, the controller70sets the moved distance27by which the holder20and the table30are to be moved closely to each other in a case where the thickness of the tape220is corrected by further subtracting the thickness of the central area of the tape220that is free of the adhesive layer222that has been brought into intimate contact with the face side201of the device area202of the wafer200in the tape affixing operation, i.e., the thickness of the tape base221, from the initial spacing between the holding surface20-1of the holder20and the holding surface31of the table30, in the resin applying operation according to the first embodiment. The resin applying operation according to the second embodiment is based on the moved distance27by which the holder20and the table30are to be moved closely to each other in a case where the thickness of the tape220is corrected in the resin applying operation according to the first embodiment. The resin applying machine1according to the second embodiment, which is arranged as described above, is advantageous in that it can reduce thickness variations of the resin302that has coated the wafer200, which variations would otherwise be caused by variations of the temperature in the processing chamber10, as is the case with the resin applying machine1according to the first embodiment. In addition, the resin applying machine1according to the second embodiment offers other advantages similar to that of the resin applying machine1according to the first embodiment. Furthermore, inasmuch as the resin applying machine1according to the second embodiment carries out resin applying operation while correcting the thickness of the tape220, the resin applying machine1according to the second embodiment is also advantageous in that it can reduce thickness changes of the resin302that has coated the wafer200, which changes would otherwise be caused by the thermal expansion of the tape220. The present invention is not limited to the embodiments described above. Various changes and modifications may be made therein without departing from the scope of the invention. The present invention is not limited to the details of the above described preferred embodiments. The scope of the invention is defined by the appended claims and all changes and modifications as fall within the equivalence of the scope of the claims are therefore to be embraced by the invention. | 42,311 |
11942347 | DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The following describes preferred embodiments of the present invention with reference to the drawings. However, the present invention is not limited to the preferred embodiments. In the drawings, scale is changed as necessary to illustrate the preferred embodiments, such as by enlarging or by emphasizing a part. In the following drawings, an XYZ coordinate system is used to describe the directions in each drawing. In this XYZ coordinate system, the vertical direction is taken as the Z direction, and the horizontal directions are taken as the X direction and the Y direction. The Y direction is one direction in the horizontal direction, and is the traveling direction of a crane40, an overhead transport vehicle50, and a second overhead transport vehicle60, which will be described later. The X direction is a direction perpendicular or substantially perpendicular to the Y direction. Also, in each of the X, Y, and Z directions, where appropriate, the orientation indicated by the arrow is expressed as a positive (+) direction (for example, +X direction), and the direction opposite thereof is expressed as a negative (−) direction (for example, −X direction). First Preferred Embodiment FIG.1is a diagram showing an example of a storage system SYS according to a first preferred embodiment, as viewed from the Y direction.FIG.2is a diagram showing the storage system SYS as viewed from the X direction.FIG.3is a diagram schematically showing the storage system SYS as viewed in a plan view. InFIG.3, in order to facilitate drawing distinctions in the figure, an overhead crane track20and storages11of an overhead stocker100are shown in white, an overhead track30and receiving/delivering ports12of an overhead transport vehicle system200are shown with hatched lines, and load ports LP of a processing apparatuses TL are shown in black. The storage system SYS shown inFIG.1toFIG.3is installed in a semiconductor device manufacturing factory or the like, and stores articles2such as FOUPs accommodating semiconductor wafers or reticle pods accommodating processing members such as reticles, which are used for manufacturing semiconductor devices. In the present preferred embodiment, an example is described in which the articles2are FOUPs, but the articles2may be other types of articles other than FOUPs. The storage system SYS can also be applied to facilities of other fields other than the semiconductor field, and the articles2may be another type of articles that can be stored in the storage system SYS. As shown inFIG.1toFIG.3, the storage system SYS includes an overhead stocker100, an overhead transport vehicle system200, and a transporter300. The overhead stocker100includes shelving10including a plurality of storages11, an overhead crane track20, and a crane40. The shelving10is arranged on the inner side and on the outer side of the overhead crane track20, on which the crane40travels (seeFIG.3). As shown inFIG.1, the plurality of storages11provided in the shelving10are held by a frame13and are arranged in three tiers in the vertical direction (the Z direction). The number of tiers of the storages11can be set arbitrarily. The plurality of storages11are arranged in line along the traveling direction (the Y direction) of the crane40, which will be described later. In the present preferred embodiment, the storage11is a space to place and store an article2therein or a storage space. That is to say, the storage11is a storage space for an article2in which a surface on which to place an article2thereon (for example, the upper surface of a shelf board11a) and the space between this surface and the ceiling or the like thereof (for example, the lower surface of the shelf board11a) are combined. The plurality of storages11each include the shelf board11a, on which an article2is placed. In the following description, placing an article2in the storages11includes placing the article2on the shelf board11aof the storage11. On the shelf board11aof the storage11, there may be provided a plurality of pins that enter grooves provided on the bottom surface of the article2when the article2is placed on the shelf board11a. When these pins enter the grooves of the article2, the article2is positioned with respect to the storage11. The shelving10is suspended from a system ceiling SC1via the frame13. The system ceiling SC1is suspended from a ceiling C of the building via metal hangers3. The frame13may be suspended directly from the ceiling C instead of being suspended from the system ceiling SC1. A lower end of the shelving10is set higher than the height of the processing apparatus TL from the floor surface F. The processing apparatus TL performs various processes such as a film formation process or an etching process on semiconductor wafers accommodated in a FOUP, which is an article2, for example. The height of a lower end of the crane40described later is also set higher than the height of the processing apparatus TL. That is to say, the overhead stocker100is arranged above the processing apparatus TL. The lower end of the crane40is set to a height with which operators can walk on the floor surface F with no hindrance. As a result, a portion of the space below the overhead stocker100can be used as an operator passage PS. The crane40places an article2in the storage11and takes an article2therefrom. The second overhead transport vehicle60described later also places an article2in the storage11and takes an article2therefrom. The storage11from or to which the second overhead transport vehicle60receives or delivers an article2is the storage11on the uppermost tier of the shelving10. The vertical dimension of the storage11is a dimension required for a transferer42of the crane40, which will be described later, to lift an article2. The transferer42of the crane40includes, for example, a configuration to support and lift an article2from the lower surface side, and does not require a large space above the article2. For example, the vertical dimension of the storage11can be set to a dimension that would add several centimeters to the vertical dimension of the article2. As shown inFIG.1, the overhead crane track20is suspended from the system ceiling SC1via metal hangers5. The overhead crane track20may be suspended directly from the ceiling C instead of being suspended from the system ceiling SC1. As shown inFIG.3, the overhead crane track20is an annular track that includes linear portions21extending in the Y direction and turning portions22. The overhead crane track20being an annular track enables the shelving10to be installed on both sides in the X direction with respect to the two linear portions21in a plan view. As shown inFIG.1, the overhead crane track20is higher from the floor surface F than the overhead track30of the overhead transport vehicle system200. The crane40travels on the overhead crane track20to hold and move an article2. The crane40transfers the article2between a storage11and another storage11. The crane40circulates and travels on the overhead crane track20. The number of cranes40provided on a single overhead crane track20is not limited to one. For example, two or more cranes40may be provided on a single overhead crane track20. As shown inFIG.1andFIG.2, the crane40is suspended from the overhead crane track20. FIG.4is a diagram showing an example of the crane40. The crane40travels on the overhead crane track20installed on the ceiling side, and it is, therefore, not necessary to provide a track on the floor surface F side (the ground side). The crane40includes two crane travelers41(seeFIG.2) and a transferer42. An upper support47is attached to the lower side of the crane traveler41via an connector46, and two crane travelers41are connected by the upper support47. Each crane traveler41includes a traveling driver not shown in the drawings and a plurality of wheels41a, and travels along the overhead crane track20. The traveling driver may be, for example, an electric motor which is provided in the crane traveler41to drive the wheels41a, or may be a linear motor which is provided using the overhead crane track20. In the crane40of the present preferred embodiment, the transferer42and the article2, which are heavy objects, can be reliably supported by using two crane travelers41. The crane40uses two crane travelers41, however, it is not limited to this configuration, and one, or three or more crane travelers41may be used. The transferer42includes masts43, an elevation platform44, drivers45, an extender/retractor48, and a placement platform49. Each mast43extends in the vertical direction while being suspended from the upper support47(the crane traveler41), and one mast43is provided at front and at rear respectively in the traveling direction of the crane traveler41(seeFIG.2). Each mast43preferably has a hollow or solid rod shape, and the cross section thereof preferably has a circular shape, an elliptical shape, an oval shape, or a polygonal shape such as a quadrangular shape. For attachment of the masts43to the upper support47, fastening members such as bolts and nuts may be used or welding or the like may be used, for example. The total number of masts43is not limited to two, and may be one. As mentioned above, the height of the lower end of the mast43from the floor surface F is set higher than the height of the processing apparatus TL. For example, the lower end of the mast43is the lower end of the crane40. The extender/retractor includes a plurality of arms capable of extending and retracting in a direction perpendicular or substantially perpendicular to the traveling direction of the crane traveler41. The placement platform49is provided at a distal end of the extender/retractor48. The placement platform49is a triangular plate on which an article2can be placed. The placement platform49is a holder that holds the article2by placing the article2thereon. On the upper surface of the placement platform49, there is provided a pin that is to be inserted into a groove provided on the bottom surface of the article2to position the article2. The shelf board11amentioned above is provided with a cutout (not shown in the drawings) through which the placement platform49can pass in the vertical direction. When receiving an article2from the storage11, the transferer42raises the elevation platform44in a state where the extender/retractor48is extended and the placement platform49is positioned below the article2, to pick up the article2with the placement platform49. The transferer42positions the placement platform49with the article2placed thereon above the elevation platform44, by retracting the extender/retractor48while the article2is placed on the placement platform49. Delivering of the article2to the storage11via the transferer42is performed by performing the above operations in a reversed manner. The transferer42is not limited to the above configuration, and may be of another configuration such as one in which a portion of an article2(for example, a flange2aprovided on the upper portion of a FOUP defining and functioning as the article2) is held and raised. The drivers45raise or lower the elevation platform44along the masts43, using a hoist or the like for example. Each driver45includes a suspender45aand a driving unit not shown in the drawings. The suspenders45aare belts or wires, and the elevation platform44is suspended from the upper support47by the suspenders45a. The driving unit not shown in the drawings is provided on the upper support47and feeds out or winds up the suspenders45a. When the driving unit feeds out the suspenders, the elevation platform44is lowered by being guided by the masts43. When the driving unit winds up the suspenders45a, the elevation platform44is raised, being guided by the masts43. The drivers45are controlled by a controller or the like not shown in the drawings to lower or raise the elevation platform44at a predetermined speed. The drivers45are controlled by the controller or the like to maintain the elevation platform44at a target height. As shown inFIG.4, the drivers45are provided on the upper support47(the crane traveler41). The drivers45may be provided, for example, on the elevation platform44instead of being provided on the upper support47. As a configuration of providing the drivers45on the elevation platform44, the elevation platform44may be raised or lowered by winding up or feeding out the belts or wires suspended from the upper support47, via a hoist or the like mounted on the elevation platform44, for example. Also, the elevation platform44may be raised or lowered by mounting an electric motor or the like that drives a pinion gear, defining a rack that meshes with the pinion gear, on the masts43, and driving the electric motor and so forth to rotate the pinion gear. The overhead transport vehicle system200includes the overhead transport vehicle50that travels along the overhead track30, and that receives or delivers articles2from or to the load port LP of the processing apparatus TL, which is a predetermined transfer destination arranged below the overhead track30. As shown inFIG.1, the overhead track30is attached to the lower face side of the system ceiling SC2. The system ceiling SC2is suspended from the ceiling C via metal hangers4. The overhead track30may be suspended from a system ceiling SC1or from the ceiling C instead of being suspended from the system ceiling SC2. The overhead track30is located between an inter-bay route (inter-bay track) R1and an inter-bay route R2in a plan view. The overhead track30is an intra-bay route provided in each bay (in each intra-bay), and the inter-bay route R1or the like is provided to connect a plurality of overhead tracks30defining and functioning as intra-bay routes, to each other. The overhead track30is connected from the inter-bay route R1via two branch tracks S1used to enter or exit, and is connected from the inter-bay route R2via two branch tracks S2used to enter or exit. The overhead track30includes linear portions31, turning portions32, and branching portions33. The overhead transport vehicle50can travel to circulate in one direction (for example, in the clockwise direction in a plan view) along the linear portions31and the turning portions32. The linear portions31are arranged, directly above the load ports LP, in the Y direction along the plurality of load ports LP. The two linear portions31are parallel or substantially parallel to the linear portions21of the overhead crane track20in a plan view. The turning portion32is arranged at both the +Y side end and at the −Y side end and includes curved portions, connecting the two linear portions31to each other. The branching portion33is arranged on the inner side in a plan view on the overhead track30, which is a circular track, and connects the two linear portions31to each other (seeFIG.3). A buffer B, in which an article2can be placed, is provided on the +X side and on the −X side of the branching portion33(seeFIG.1). The branching portion33and the buffer B need not be provided. The overhead track30is arranged below the lower end (the lower end of the overhead stocker100) of the crane40(the mast43). The lower end of the crane40is set at a height H1from the floor surface F, and the upper end of the overhead track30is set at a height H2from the floor surface F (seeFIG.2). The height H2is set lower than the height H1, and as a result, the overhead track30is located below the lower end of the overhead stocker100. The overhead transport vehicle50that travels on the overhead track30travels below the lower end of the overhead stocker100. With this configuration, the overhead stocker100and the overhead transport vehicle50of the overhead transport vehicle system200do not overlap with each other in a side view. The overhead transport vehicle50enters the overhead track30from the inter-bay route R1or R2via the branch track S1or S2, or exits the overhead track30to the inter-bay route R1or R2via the branch track S1or S2. The overhead transport vehicle50travels along the overhead track30, and transfers articles2between the load ports LP of the processing apparatus TL and the receiving/delivering ports12, which will be described later, on the linear portion31. The linear portion31of the overhead track30extends directly above the plurality of load ports LP facing each other across a predetermined clearance (the operator passage PS). In the present preferred embodiment, the load ports LP are provided at four locations on one processing apparatus TL (seeFIG.3), however, the configuration is not limited to this example. For example, load ports LP may be provided at one to three locations on one processing apparatus TL, or may be provided at five or more locations. Since the overhead track30extends directly above the load ports LP, the article2can be received from or delivered to the load port LP simply by the overhead transport vehicle50on the overhead track30raising and lowering the article2. The overhead transport vehicle50on the overhead track30can receive or deliver the article2from or to the receiving/delivering port12by laterally extending the gripper53to the receiving/delivering port12(by a lateral transfer operation). As shown inFIG.1andFIG.2, the overhead transport vehicle50includes a traveler51and a main body52. The main body52includes the gripper53that holds an article2, a lift driver54that raises or lowers the article2being held, and a lateral extender55that laterally moves the lift driver54relative to the traveler51. The traveler51includes a traveling driver not shown in the drawings and a plurality of wheels51a, and travels along the overhead track30. The traveling driver may be, for example, an electric motor that is provided in the traveler51to drive the wheels51a, or may be a linear motor that is provided using the overhead track30. The main body52is attached to the lower portion of the traveler51via an connector52a. The main body52includes a gripper53that holds an article2, the lift driver54that suspends and raises or lowers the gripper53, and a lateral extender55that moves the lift driver54to a lateral side of the track. The gripper53grips the flange2aof an article2from above, to suspend and hold the article2. The gripper53is, for example, a chuck including claws53acapable of moving forward and backward in the horizontal direction, and it inserts the claws53aunder the flange2aof the article2and raises the gripper53to suspend and hold the article2. The gripper53is connected to suspenders53bsuch as wires and belts. The gripper53ascends or descends while being suspended from the lift driver54. The lift driver54is, for example, a hoist, and lowers the gripper53by feeding out the suspenders53band raises the gripper53by winding up the suspenders53b. The lift driver54is controlled by a controller or the like not shown in the drawings to lower or raise the gripper53at a predetermined speed. Also, the lift driver54is controlled by the controller to maintain the gripper53at a target height. The lateral extender55includes movable plates stacked in the vertical direction, for example. The movable plates are movable to a lateral side of the traveling direction of the traveler51(in a direction perpendicular or substantially perpendicular to the traveling direction, or in a lateral direction). The lift driver54is attached to the movable plates. The main body52includes a guide not shown in the drawings that guides the lateral extender55, and a driving unit not shown in the drawings that drives the lateral extender55. The lateral extender55moves the lift driver54and the gripper53between a projecting position and a storing position, via the driving force of a driver such as an electric motor. The projecting position is a position at which the gripper53is projected to the lateral side from the main body52. The storing position is a position at which the gripper53is stored in the main body52. A rotating mechanism to rotate the lift driver54(the gripper53) about an axis along the vertical direction between the lift driver54and the gripper53. The overhead transport vehicle50can receive or deliver an article2from or to the load port LP by the lift driver54raising or lowering the article2. The overhead transport vehicle50can also receive or deliver an article2from or to the receiving/delivering port12that is present below the lift driver54having been moved by the lateral extender55, by raising or lowering the article2via the lift driver54in the state where the lateral extender55has moved the lift driver54to above any one of the plurality of receiving/delivering ports12. A transporter300vertically transports an article2between the overhead stocker100and the overhead transport vehicle system200. In the present preferred embodiment, the transporter300is a second overhead transport vehicle60. The storage system SYS includes a receiving/delivering port12to receive or deliver an article2between the overhead transport vehicle system200and the transporter300(the second overhead transport vehicle60). The receiving/delivering port12is arranged at a plurality of locations below the linear portion21of the overhead crane track20on which the second overhead transport vehicle60travels. The receiving/delivering ports are provided on a lateral side of and below the overhead track30. As a result, as described above, the overhead transport vehicle50can receive or deliver an article2from or to the receiving/delivering port12through a lateral transfer operation). The second overhead transport vehicle60vertically transports articles2between the overhead stocker100and the receiving/delivering port12.FIG.5is a diagram showing an example of the second overhead transport vehicle60. The second overhead transport vehicle60includes a second traveler61and a second main body62. The second traveler61has a configuration similar to that of the crane traveler41of the crane applied thereto, and it includes a traveling driver not shown in the drawings and a plurality of wheels61a, and travels along the overhead crane track20. The second main body62is attached to the lower portion of the second traveler61via an connector62a. The second main body62includes a second gripper63that holds an article2, a second lift driver64that raises or lowers the second gripper63, and a second lateral extender65that moves the second lift driver64to a lateral side of the track. The second gripper63is, for example, a chuck including claws63aand is connected to suspenders63b. The second lift driver64is, for example, a hoist, and raises or lowers the second gripper63by feeding out or winding up the suspenders63b. The second lateral extender65moves the second lift driver64and the second gripper63between a projecting position and a storing position. The projecting position is a position at which the second gripper63projects to the lateral side from the second main body62. The storing position is a position at which the second gripper63is stored in the second main body62. Between the second lateral extender65and the second lift driver64, there may be provided a rotating mechanism to rotate the second lift driver64(the second gripper63) about an axis along the vertical direction. The second traveler61, the second main body62, the second gripper63, the second lift driver64, and the second lateral extender65have configurations similar to those of the traveler51, the main body52, and the gripper53, the lift driver54, and the lateral extender55of the above overhead transport vehicle50applied thereto. Therefore, the overhead transport vehicle50of the overhead transport vehicle system200can be applied to the second overhead transport vehicle60in an unchanged manner. Since the second overhead transport vehicle60travels on the overhead crane track20, it is not necessary to provide a separate track, and the manufacturing cost of the storage system SYS can be reduced. The second overhead transport vehicle60can receive or deliver an article2from or to the receiving/delivering port12by the second lift driver64raising or lowering the article2. Also, the second overhead transport vehicle60can receive or deliver an article2from or to the storage11that is present below the second lift driver64having been moved by the second lateral extender65, by raising or lowering the article2via the second lift driver64in the state where the second lateral extender65has moved the second lift driver64to above at least one of the plurality of tiers of the storages11. In the present preferred embodiment, an article2can be received from or delivered to the uppermost tier storage11of the shelving10. The storage11from or to which the second overhead transport vehicle60receives or delivers the article2may be a storage11other than the one on the uppermost tier. FIG.6is a diagram showing an enlarged view of a portion ofFIG.3, and shows an example of the positional relationship between the shelving10of the overhead stocker100and the load ports LP. As shown inFIG.6, in the present preferred embodiment, a portion of the shelving10overlaps with the load ports LP of the processing apparatus TL defining and functioning as a predetermined transfer destination as viewed in a plan view. Therefore, the shelving10can be expanded in the horizontal direction to above the load ports LP to store a large number of articles2. The shelving10also overlaps with the overhead track30of the overhead transport vehicle system200in a plan view. That is to say, the shelving10can be provided regardless of the arrangement of the overhead track30of the overhead transport vehicle system200. As a result, a high degree of freedom can be achieved in the arrangement of the shelving10, and it is possible to easily realize an arrangement of the shelving10to accommodate articles2in a highly efficient manner. FIG.7is a diagram showing an enlarged view of a portion ofFIG.3, and shows an example of the positional relationship between the receiving/delivering port12and the load ports LP. InFIG.7, in order to facilitate drawing distinctions in the figure, the configuration on the overhead stocker100side is omitted. As shown inFIG.7, the receiving/delivering port12and the load ports LP are arranged so as not to overlap with each other in a plan view. That is to say, the receiving/delivering port12and the overhead track30of the overhead transport vehicle system200directly above the load ports LP are arranged so as to be spaced apart from each other in a plan view (so as not to overlap with each other in the plan view). As a result, when the second overhead transport vehicle60receives or delivers an article2from or to the receiving/delivering port12, it is possible to avoid interference with the overhead track30or with the overhead transport vehicle50traveling on the overhead track30. Also, when the second overhead transport vehicle60receives or delivers an article2from or to the receiving/delivering port12, the overhead transport vehicle50is still allowed to travel, and it is therefore possible to avoid reduction in the efficiency of the overhead transport vehicle system200transporting articles2. The storage system SYS includes a controller not shown in the drawings. This controller controls the storage system SYS in a comprehensive manner. The controller controls operations of the crane40, the overhead transport vehicle50, and the second overhead transport vehicle60via wireless or wired communication. The controller may be divided into a controller that controls the crane40, a controller that controls the overhead transport vehicle50, and a controller that controls the second overhead transport vehicle60. FIG.8toFIG.11are diagrams showing an example of operations performed when an article2is transported from the storage unit11to the load port LP in the storage system SYS. The controller not shown in the drawings controls the second overhead transport vehicle60(the transporter300) to receive the transport target article2from the uppermost tier storage11and then to deliver the article2to the specified receiving/delivering port12. First, when the transport target article2is in a storage11other than the one on the uppermost tier, the crane40of the overhead stocker100transfers the article2to the uppermost tier storage11in the shelving10. Next, as shown inFIG.8, after having traveled along the overhead crane track20, stopped at a side of the storage11in which the transport target article2is placed, and caused the second lift driver64to project via the second lateral extender65, the second overhead transport vehicle60lowers the second gripper63via the second lift driver64, and grips the article2via the second gripper63. Next, after having raised the second gripper63via the second lift driver64, the second overhead transport vehicle60retracts the second lateral extender65and returns the second gripper63to the storing position, to accommodate the article2in the second main body62. Next, the second overhead transport vehicle60travels along the overhead crane track20while holding the article2via the second gripper63, and stops directly above the specified receiving/delivering port12. Next, as shown inFIG.9, after having driven the second lift driver64to lower the second gripper63and the article2and placed the article2on the receiving/delivering port12, the second overhead transport vehicle60releases the gripping of the second gripper63to deliver the article2to the receiving/delivering port12. Next, the controller not shown in the drawings controls the overhead transport vehicle50of the overhead transport vehicle system200to receive the article2from the receiving/delivering port12and then to deliver the article2to the specified load port LP. As shown inFIG.10, after having traveled along the overhead track30, stopped at a side of the receiving/delivering port12in which the article2is placed, and caused the lift driver54to project via the lateral extender55, the overhead transport vehicle50lowers the gripper53via the lift driver54, and grips the article2via the gripper53. Then, after having raised the gripper53via the lift driver54, the overhead transport vehicle50retracts the lateral extender55and returns the gripper53to the storing position, to thereby accommodate the article2in the main body52. Next, the overhead transport vehicle50travels along the overhead track30while holding the article2via the gripper53, and stops directly above the specified load port LP. Next, as shown inFIG.11, after having driven the lift driver54to lower the gripper53and the article2and placed the article2on the load port LP, the overhead transport vehicle50releases the gripping of the gripper53to deliver the article2to the load port LP. Through the series of these operations, the article2is transported from the storage11(the shelving10) of the overhead stocker100to the load port LP of the processing apparatus TL via the receiving/delivering port12. When transporting an article2from the load port LP of the processing apparatus TL to the storage11of the overhead stocker100, the series of above operations shown inFIG.8toFIG.11are performed in a reversed manner. As a result, the article2is transported from the load port LP of the processing apparatus TL to the storage11of the overhead stocker100via the receiving/delivering port12. In a case where the transfer destination of the article2is other than the load port LP, operations are similar to those described above and operations are also similar to those described above in a case where the article2is received from a location other than the load port LP. As described above, according to the storage system SYS of the present preferred embodiment, the second overhead transport vehicle60of the overhead transport vehicle system200travels below the lower end of the overhead stocker100. Therefore, even if the overhead track30of the overhead transport vehicle system200is installed to align with the load ports LP, the shelving10can be arranged regardless of the arrangement of the overhead track30, and the efficiency of storing articles2can be improved. Moreover, storage of a large number of articles2becomes possible by expanding the shelving10easily in a horizontal direction. Since the crane40transfers articles2between the multiple tiers of storages11, the articles2can easily be transferred even when the shelving10is expanded in the horizontal direction. Also, the second overhead transport vehicle60(the transporter300) can efficiently transport articles2between the overhead stocker100and the overhead transport vehicle system200, such that the efficiency of transporting articles2can be improved. Second Preferred Embodiment The above first preferred embodiment described a configuration in which the transporter300is the second overhead transport vehicle60, however, the present invention is not limited to this configuration.FIG.12is a side view showing an example of a storage system SYS2according to a second preferred embodiment.FIG.12is a diagram showing the storage system SYS2as viewed from the X direction. In the following description, the same or similar configurations as or to those in the first preferred embodiment described above are assigned with the same reference signs and the descriptions thereof are omitted or simplified. In the storage system SYS2shown inFIG.12, a conveyor70is used as a transporter300A. The conveyor70includes an upper port14arranged in a portion of the lowermost tier of the plurality of storages11, and a lower port15to receive or deliver an article2from or to the overhead transport vehicle system200. Therefore, the lower port15is a receiving/delivering port12to receive or deliver an article2between the conveyor70(the transporter300A) and the overhead transport vehicle system200. An elevation shelf board11bthat can be raised and lowered in the vertical direction is arranged in the upper port14and the lower port15. The elevation shelf board11bis provided so as to allow an article2to be placed thereon, and can be raised or lowered between a first position P1set in the upper port14and a second position P2set in the lower port15. InFIG.12, two conveyors70are used. In such a case, both of the two conveyors70may transport articles2to or from the overhead stocker100, or one of the conveyors70may be used to transport articles2from the overhead stocker100and the other conveyor70may be used to transport articles2into the overhead stocker100. The number of conveyors70is arbitrary, and a single conveyor70may be used as the transporter300A, or three or more conveyors70may be used. In the storage system SYS2, when transporting an article2from the storage system11to the load port LP, the controller not shown in the drawings controls the crane40so that the crane40of the overhead stocker100moves the article2from the storage11to the upper port14. After having received the article2from the predetermined storage11, the crane40travels along the overhead crane track20and stops at the side of the upper port14to deliver the article2to the elevation shelf board11bin the upper port14via the transferer42. The article2is transported from the storage11to the upper port14through this operation. Subsequently, the controller not shown in the drawings controls the conveyor70so that the conveyor70transports the article2from the upper port14to the lower port15. The conveyor70lowers the elevation shelf board11bwith the article2placed thereon from the first position P1to the second position P2. As a result, the article2moves to the lower port15. That is to say, the article2is now placed on the receiving/delivering port12. Next, the controller not shown in the drawings controls the overhead transport vehicle50so that the overhead transport vehicle50of the overhead transport vehicle system200receives the article2from the elevation shelf board11bof the lower port15and then delivers it to the load port LP. After having traveled along the overhead track30, stopped at a side of the elevation shelf board11bof the lower port15in which the article2is placed, and caused the lateral extender55to project, the overhead transport vehicle50lowers the gripper53via the lift driver54, and grips the article2via the gripper53. Then, after having raised the gripper53via the lift driver54, the overhead transport vehicle50retracts the lateral extender55and returns the gripper53to the storing position, to accommodate the article2in the main body52. The subsequent operation is similar to that of the above first preferred embodiment in that the overhead transport vehicle50delivers the article2held by the gripper53to the specified load port LP. When transporting the article2from the load port LP of the processing apparatus TL to the storage11of the overhead stocker100, the article2is transported from the load port LP of the processing apparatus TL to the storage11of the overhead stocker100via the elevation shelf board11bof the conveyor70, by performing the above operations in the reversed manner. In a case where the transfer destination of the article2is other than the load port LP, operations are similar to those described above, and in a case where the article2is received from a location other than the load port LP, operations are also similar to those described above. As described above, according to the storage system SYS2of the second preferred embodiment, as with the storage system SYS of the first preferred embodiment, even if the overhead track30of the overhead transport vehicle system200is installed to align with the load ports LP, the shelving10can be arranged regardless of the arrangement of the overhead track30, and the efficiency of storing articles2can be improved. Moreover, storage of a large number of articles2becomes possible by expanding the shelving10easily in a horizontal direction. Since the crane40transfers articles2between the multiple tiers of storages11, the articles2can easily be transferred even when the shelving10is expanded in the horizontal direction. Also, the conveyor70(the transporter300A) can efficiently transport articles2between the overhead stocker100and the overhead transport vehicle system200, such that the efficiency of transporting articles2can be improved. In the storage system SYS2, for example, a local transport trolley may be used instead of the conveyor70, which serves as the transporter300A. This local transport trolley travels along a local track that is provided from directly above one or more storages11to directly above the receiving/delivering port12, and includes a hoist that raises or lowers an article2while holding it. After having traveled along the local track, received an article2placed in the storage11directly below the local track, traveled along the local track, and stopped directly above the receiving/delivering port12, the local transport trolley can deliver the article2to the receiving/delivering port12via the hoist lowering the article2. Also, after having received an article2placed in the receiving/delivering port12and raised the article2via the hoist, the local transport trolley travels along the local track and stops directly above the storage11. Then, the local transport trolley can deliver the article2to the storage11directly below the local transport trolley. As described above, in the storage system SYS2, even with a configuration that uses, for example, a local transport trolley as a transporter instead of the conveyor70, articles2can be transported vertically between the overhead stocker100and the overhead transport vehicle system200. The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above description, and various modifications may be made without departing from the gist of the present invention. For example, in the above preferred embodiments, the configuration in which the overhead crane track20and the overhead track30are not connected in the storage systems SYS, SYS2, has been described as an example. However, the present invention is not limited to this configuration. For example, the overhead crane track20and the overhead track30may be connected via connection tracks or the like. Also, in the above preferred embodiments, the configuration in which the shelving10, the overhead crane track20, and the overhead track30are suspended from the ceiling C or from the system ceilings SC1, SC2in the storage systems SYS, SYS2, has been described as an example. However, the present invention is not limited to this configuration. For example, at least one of the shelving10, the overhead crane track20, and the overhead track30may be supported by a supporting column, a frame, a pedestal, or the like provided on the floor surface F, so that the floor surface F bears the load of the shelving10and so forth. One or more of the elements or features described in the above preferred embodiments may be omitted in some cases. One or more of the elements or features described in the above preferred embodiments may be appropriately combined. The contents of Japanese Patent Application No. 2018-242936 and all documents cited in the detailed description of the present invention are incorporated herein by reference to the extent permitted by law. While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims. | 41,687 |
11942348 | DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. As described above, a notch may be cut or formed in a semiconductor wafer to facilitate positioning of the semiconductor wafer in a repeatable manner during a processing flow. However, during a processing flow, the positioning of the semiconductor wafer is typically performed first, after which the semiconductor wafer is transferred to one or more processing chambers. During this processing flow, the position of the semiconductor wafer may shift (such that the notch is shifted from an initial position). Such a shift may be caused by, for example, an orienting error by a semiconductor processing tool, a shake or vibration of a mechanism associated with transferring the semiconductor wafer among processing chambers, a lack of friction between the semiconductor wafer and a surface on which the semiconductor wafer is carried, a vibration of a processing chamber, an instability of a process gas flow, among other examples. To determine whether a semiconductor wafer has shifted, a position of a semiconductor wafer can in some cases be inspected based on a notch in the semiconductor wafer and using an image sensor-based technique. According to such a technique, an image sensor may capture an image of a portion of a semiconductor wafer. The image sensor may provide information associated with the image to a processing device. The processing device may process and/or analyze the information using one or more techniques (e.g., gray scale analysis, red-green-blue (RGB) splitting, and/or the like) to determine whether the notch is present and/or whether the notch, and therefore the semiconductor wafer, is in the correct position. However, image sensor-based processing is a complex process that involves high-end processing hardware. Moreover, image sensor-based processing is susceptible to interference based on lighting conditions in different semiconductor processing tools. As a result, image sensor-based processing for notch positioning detection is prone to a high failure rate and, therefore, is applicable to a limited range of semiconductor processes. Further, image sensor-based processing for notch positioning may result in false-positive detections, where a semiconductor wafer is determined to be in the correct position and/or alignment when the semiconductor wafer is actually out of position and/or mis-aligned. This can result in decreased semiconductor wafer yield, increased semiconductor wafer scrap, and/or the like. Some implementations described herein provide techniques and apparatuses for wafer notch positioning detection using a beam of light (e.g., a laser beam) for detecting the position of a semiconductor wafer notch (rather than image sensor-based notch positioning detection). In some implementations, a position detection device includes a light source to provide a beam of light, a reflector to receive and redirect the beam of light, and a light gate having an opening to permit the beam of light to travel through the opening. The position detection device may include a light sensor to receive a portion of the beam of light after the beam of light travels through the opening, and to convert the portion of the beam of light to a signal. The position detection device may further include a processing device to determine, based on the signal, whether an amount of a shift in a position of the notch satisfies a notch shift threshold, whether the notch is in an allowable position, and/or the like. Additional details are described below. The use of a beam of light to detect the position of a wafer notch is less susceptible to lighting conditions than other notch detection techniques, such as the image sensor-based position detection technique described above. This permits the position detection device to be used across a more diverse range of semiconductor manufacturing processes. Moreover, this reduces detection errors and reduces false-positives (e.g., reduces the likelihood that a notch is erroneously detected as being in the correct position when the notch actually is not). In addition, the position detection device that uses the beam of light to detect the position of the notch is less complex and requires less processing and memory resources than other notch detection techniques. FIGS.1A and1Bare diagrams of example semiconductor processing tool configurations100and150, respectively, in which systems, devices, and/or methods described herein may be implemented. As shown inFIGS.1A and1B, the semiconductor processing tool configuration100and the semiconductor processing tool configuration150may include a group of semiconductor processing chambers102and a handler device104. In some implementations, the semiconductor processing chambers102of the semiconductor processing tool configurations100and150may be used to perform one or more processing techniques on a wafer comprising a semiconductor device. Such processing techniques may include, for example, forming one or more layers of the semiconductor device, removing portions of one or more layers of the semiconductor device, preparing the semiconductor device for one or more processing layers, and/or the like. A semiconductor processing chamber102may be used to perform a processing technique on a wafer comprising a semiconductor device. A given semiconductor processing chamber102may be, for example, a load-lock chamber, an orienting chamber, a cool down chamber, an expansion chamber, a pre-clean chamber, a degas chamber, a high bottom coverage chamber, a deposition chamber (e.g., a physical vapor deposition (PVD) chamber, a chemical vapor deposition (CVD) chamber, and/or the like), a rapid thermal anneal (RTA) chamber, and/or another type of semiconductor processing chamber. In some implementations, the semiconductor processing tool configuration100and/or the semiconductor processing tool configuration150may include one or more of a given type of the above-mentioned semiconductor processing chambers102. Handler device104includes a device associated with transferring, carrying, or moving a wafer to and/or between one or more of the aforementioned semiconductor processing chambers102. For example, handler device104may include a robotic arm, a group of robotic arms, and/or the like. The arrangements of the semiconductor processing chambers102in the semiconductor processing tool configuration100shown inFIG.1Aand the semiconductor processing tool configuration150shown inFIG.1Bare for explanatory purposes. One or more of the semiconductor processing chambers102in either semiconductor processing tool configuration100or150may be differently arranged, one or more of the semiconductor processing chambers102may be spaced apart from other semiconductor processing chambers102(e.g., semiconductor processing chambers102may be spaced apart and the handler device110may be a robot that transports a wafer to and/or from the spaced-apart semiconductor processing chambers102), and/or the like. Moreover, the semiconductor processing chambers102included in the semiconductor processing tool configurations100and150illustrated inFIGS.1A and1Bmay be used in conjunction with other semiconductor processing tools and/or chambers to further prepare and/or process a semiconductor device, such as an etch tool, a photoresist tool. As further shown inFIGS.1A and1B, the semiconductor processing tool configuration100and the semiconductor processing tool configuration150may further include an optical system associated with determining information relating to a position of the wafer. For example, the optical system (herein referred to as a position detection device200) may determine whether an amount of a shift in a position of the notch satisfies a notch shift threshold, whether the notch is in an allowable position, and/or the like, as described in further detail below. In some implementations, as indicated inFIGS.1A and1B, the position detection device200may be arranged on, in, or near one of the semiconductor processing chambers102. For example, the position detection device200may arranged on, in, or near a cool down chamber of the semiconductor processing tool configuration100or the semiconductor processing tool configuration150. As indicated above,FIGS.1A and1Bare provided merely examples. Other examples may differ from what is described with regard toFIGS.1A and1B. FIGS.2A-2Dare diagrams associated with an example implementation of a position detection device200for performing wafer notch positioning detection as described herein. As shown inFIG.2A, position detection device200may include a light source202, a reflector204, a light gate206including an opening208, a light sensor210, and a processing device212. In some implementations, as noted above, the position detection device200may be capable of determining whether an amount of a shift in a position of a notch252of a wafer250satisfies a notch shift threshold, whether the notch252is in an allowable position, and/or the like. The components of position detection device200are described below, followed by a description of an example operation of position detection device200. The light source202includes a component to provide a beam of light220. For example, the light source202may include an emitter such as a laser, a light emitting diode (LED), and/or the like. In some implementations, as indicated inFIG.2A, the light source202may be arranged to provide the beam of light220toward reflector204. The reflector204includes a component to redirect the beam of light220(e.g., toward light gate206). In some implementations, the light source202includes one or more reflective surfaces204sto redirect the beam of light220. As a particular example, as shown inFIG.2B, the position detection device200may include a first surface204s1(e.g., a first mirror) and a second surface204s2(e.g., a second mirror), which are angled with respect to an axis (e.g., a horizontal axis) by angles α1and α2, respectively. As shown, the reflector204may be arranged so as to redirect the beam of light220by reflecting the beam of light220from the first surface204s1toward the second surface204s2, and then reflecting the beam of light220from the second surface204s2toward the opening208of the light gate206. In some implementations, angles α1and α2are the same angle. In some implementations, angles α1and α2are different angles. Whether angles α1and α2are the same angle or different angles may depend on the arrangement of components of position detection device200. Notably, while the reflector204shown inFIGS.2A and2Bincludes two reflective surfaces204s, in other implementations, the reflector204may include a different number of reflective surfaces204s(e.g., one reflective surface204s, three or more reflective surfaces204s, and/or the like) depending on the arrangement of components of position detection device200. Returning toFIG.2A, the light gate206includes a device to permit the beam of light220to travel toward the light sensor210. For example, the light gate206may include an opening208to permit the beam of light220to propagate toward the light sensor210. In some implementations, the opening208may act to filter out divergent light from the beam of light220. FIG.2Cis a diagram illustrating a plan view of an example top surface of light gate206. As shown inFIG.2C, the light gate206may have a length a and a width b. In some implementations, the length a and the width b may be on the order of tens of millimeters (mm). For example, the length a may be approximately 24 mm and the width b may be approximately 40 mm, in some implementations. As further shown inFIG.2C, the opening208may have a length c and a width d, where the length c is less than the length a and the width d is less than the width b. In some implementations, the length c and the width d may be on the other order of millimeters or micrometers. Notably, while the light gate206shown inFIGS.2A and2Cincludes one opening208, in other implementations, the light gate206may include two or more openings208. In some implementations, a size of the opening208(e.g., the length c) may be greater than or equal to a size of the notch252. For example, the length c may be greater than or equal to a width of a widest portion of the notch252. In some implementations, the size of the opening208corresponds to a range of allowable positions of the notch252, as described below. Returning toFIG.2A, in some implementations, the light gate206may include a partial enclosure206e. The partial enclosure206emay serve to prevent the opening208from permitting unwanted light (e.g., ambient light) to travel toward light sensor210. The light sensor210includes a component to convert a portion220pof the beam of light220to a signal225(e.g., an electrical signal). For example, the light sensor210may include one or more photodiodes (e.g., an array of photodiodes) capable of converting light, incident thereon, into an electrical current. The portion220pof the beam of light220is a portion of the beam of light220that reaches (e.g., is incident on) the light sensor210after the beam of light220travels through the opening208. The portion220pof the beam of light220is defined herein to include the entirety of the beam of light220, some portion of the beam of light220that is less than the entirety of the beam of light220, or none of the beam of light220. In some implementations, the light sensor210converts the portion220pof the beam of light220to the signal225such that a value of a characteristic of the signal225(e.g., a current, a voltage, and/or the like) corresponds to an intensity of the portion220pof the beam of light220. Therefore, in some implementations, the characteristic of the signal225may be indicative of the intensity of the portion220pof the beam of light220. In some implementations, as shown inFIG.2A, the light sensor210may be arranged to receive the portion220pof the beam of light220after the beam of light220travels through the opening208. The processing device212includes a component to determine positional information, associated with the notch252of the wafer250, based on the signal225. For example, the processing device212may be capable of determining, based on the signal225, whether the notch252of the wafer250is in an allowable position. As another example, the processing device212may be capable of determining, based on the signal225, whether an amount of a shift in a position of the notch252(e.g., a deviation from a position of the notch252after orientation of the wafer250) satisfies a notch shift threshold. In some implementations, the processing device212may determine the positional information based on the signal225. For example, a value of a characteristic (e.g., a voltage, a current) of the signal225may depend on an intensity of the portion220pof the beam of light220incident on the light sensor210, as described above. Therefore, a comparatively larger portion220pof the beam of light220results in a larger value of the characteristic of the signal225, while a comparatively smaller portion220pof the beam of light220results in a comparatively smaller value of the characteristic of the signal225. Here, the processing device212may determine whether the value of the characteristic (e.g., a voltage level that corresponds to the intensity of the portion220pof the beam of light220) is satisfies a threshold value. If the value is greater than or equal to the threshold value (indicating that the notch252is substantially over the opening208), then the processing device212may determine that the notch252is in an allowable position and/or that an amount of a shift in a position of the notch252satisfies a notch shift threshold. Conversely, if the value is less than the threshold value (indicating that the notch252is not substantially over the opening208), then the processing device212may determine that the notch252is not in an allowable position and/or that an amount of a shift in a position of the notch252does not satisfy a notch shift threshold. FIG.2Dincludes example diagrams illustrating this concept. In the left portion ofFIG.2D, the notch252is substantially over the opening208(e.g., a length of the notch252is entirely within the length c of the opening208. This means that a comparatively larger portion220pof the beam of light220travels through the notch252. Thus, the intensity of the portion220pis comparatively higher at the light sensor210(as indicated by the bottom diagrams inFIG.2D). As a result, the value of the characteristic of the signal225may be greater than or equal to the threshold value, and so processing device212may determine that the notch252is in an allowable position and/or that an amount of a shift in a position of the notch252satisfies a notch shift threshold. Conversely, in the right portion ofFIG.2D, the notch252is not substantially over the opening208(e.g., a length of the notch252is largely outside of the length c of the opening208. This means that a comparatively smaller portion220pof the beam of light220travels through the notch252. Thus, the intensity of the portion220pis comparatively lower at the light sensor210(as indicated by the bottom diagrams inFIG.2D). As a result, the value of the characteristic of the signal225may be less than the threshold value, and so processing device212may determine that the notch252is not in an allowable position and/or that an amount of a shift in a position of the notch252does not satisfy a notch shift threshold. Notably, in this example, the size of the opening208defines allowable displacement of the notch252and/or the notch shift threshold (e.g., from an initial position). In some implementations, the processing device212may provide an indication of whether the notch252in the allowable position and/or whether the amount of the shift in the position of the notch252satisfies the notch shift threshold. For example, the processing device212may trigger an alarm when the processing device212determines that the notch252is not in the allowable position and/or determines that the amount of the shift in the position of the notch252does not satisfy the notch shift threshold. Additionally, or alternatively, the processing device212may cause an action to be performed based on a result of whether the notch252in the allowable position and/or whether the amount of the shift in the position of the notch252satisfies the notch shift threshold. For example, if the processing device212determines that the notch252is not in the allowable position or that the amount of the shift in the position of the notch252does not satisfy the notch shift threshold, then the processing device212may cause an action associated with attempting to save the wafer250to be performed. Such actions may include, for example, causing the wafer250to be transferred for reworking or repairing, causing lithography alignment marks on the wafer250to be adjusted based on the shift of the notch252, and/or the like. As another example, if the processing device212determines that the notch252is in the allowable position or that the amount of the shift in the position of the notch252satisfies the notch shift threshold, then the processing device212may cause the wafer250to proceed to a next step in the processing flow (e.g., the processing device212may cause the wafer250to proceed to a next semiconductor processing tool for further processing). In operation, the light source202provides the beam of light220toward the reflector204. Next, the reflector204receives and redirects the beam of light220toward the light gate206. The light gate206has the opening208, which permits the beam of light220, from the reflector204, to travel through the opening208toward the light sensor210. The light sensor210receives a portion220pof the beam of light220after the beam of light220travels through the opening208and the notch252. The light sensor210converts the portion220pof the beam of light220to the signal225, and provides the signal225to the processing device212. The processing device212then determines, based on the signal225, whether the notch252of the wafer250is in an allowable position and/or whether an amount of a shift in a position of the notch252satisfies a notch shift threshold. In some implementations, the processing device212provides an indication associated with the result of the determination, triggers an alarm based on the result of the determination, and/or causes an action to be performed based on the result of the determination, as described above. As indicated above,FIGS.2A-2Dare provided merely examples. Other examples may differ from what is described with regard toFIGS.2A-2D. FIG.3is a diagram of example components of a device300. In some implementations, a semiconductor processing chamber102, a handler device110, a light source202, a light sensor210, and/or a processing device212may include one or more devices300and/or one or more components of device300. As shown inFIG.3, device300may include a bus310, a processor320, a memory330, a storage component340, an input component350, an output component360, and a communication component370. Bus310includes a component that enables wired and/or wireless communication among the components of device300. Processor320includes a central processing unit, a graphics processing unit, a microprocessor, a controller, a microcontroller, a digital signal processor, a field-programmable gate array, an application-specific integrated circuit, and/or another type of processing component. Processor320is implemented in hardware, firmware, or a combination of hardware and software. In some implementations, processor320includes one or more processors capable of being programmed to perform a function. Memory330includes a random access memory, a read only memory, and/or another type of memory (e.g., a flash memory, a magnetic memory, and/or an optical memory). Storage component340stores information and/or software related to the operation of device300. For example, storage component340may include a hard disk drive, a magnetic disk drive, an optical disk drive, a solid state disk drive, a compact disc, a digital versatile disc, and/or another type of non-transitory computer-readable medium. Input component350enables device300to receive input, such as user input and/or sensed inputs. For example, input component350may include a touch screen, a keyboard, a keypad, a mouse, a button, a microphone, a switch, a sensor, a global positioning system component, an accelerometer, a gyroscope, an actuator, and/or the like. Output component360enables device300to provide output, such as via a display, a speaker, and/or one or more light-emitting diodes. Communication component370enables device300to communicate with other devices, such as via a wired connection and/or a wireless connection. For example, communication component370may include a receiver, a transmitter, a transceiver, a modem, a network interface card, an antenna, and/or the like. Device300may perform one or more processes described herein. For example, a non-transitory computer-readable medium (e.g., memory330and/or storage component340) may store a set of instructions (e.g., one or more instructions, code, software code, program code, and/or the like) for execution by processor320. Processor320may execute the set of instructions to perform one or more processes described herein. In some implementations, execution of the set of instructions, by one or more processors320, causes the one or more processors320and/or the device300to perform one or more processes described herein. In some implementations, hardwired circuitry may be used instead of or in combination with the instructions to perform one or more processes described herein. Thus, implementations described herein are not limited to any specific combination of hardware circuitry and software. The number and arrangement of components shown inFIG.3are provided as an example. Device300may include additional components, fewer components, different components, or differently arranged components than those shown inFIG.3. Additionally, or alternatively, a set of components (e.g., one or more components) of device300may perform one or more functions described as being performed by another set of components of device300. FIG.4is a flowchart of an example process400relating to wafer notch positioning detection as described herein. In some implementations, one or more process blocks ofFIG.4may be performed by a position detection device (e.g., position detection device200). Additionally, or alternatively, one or more process blocks ofFIG.4may be performed by one or more components of a device300, such as processor320, memory330, storage component340, input component350, output component360, communication component370, and/or the like. As shown inFIG.4, process400may include providing a beam of light toward a reflector (block410). For example, a light source202of the position detection device200may provide a beam of light220toward a reflector204of the position detection device200, as described above. As further shown inFIG.4, process400may include redirecting the beam of light toward a light gate, the light gate having an opening that permits the beam of light to travel toward a light sensor (block420). For example, the reflector204of the position detection device200may redirect the beam of light220toward a light gate206of the position detection device200, the light gate206having an opening208that permits the beam of light220to travel toward a light sensor210of the position detection device200, as described above. As further shown inFIG.4, process400may include receiving a portion of the beam of light (block430). For example, the light sensor210of the position detection device200may receive a portion220pof the beam of light220, as described above. As further shown inFIG.4, process400may include converting the portion of the beam of light to a signal (block440). For example, the light sensor210of the position detection device200may convert the portion220pof the beam of light220to a signal225, as described above. As further shown inFIG.4, process400may include determining, based on the signal, whether an amount of a shift in a position of a wafer notch satisfies a notch shift threshold (block450). For example, the processing device212of the position detection device200may determine, based on the signal225, whether an amount of a shift in a position of a wafer notch252of a wafer250(e.g., a semiconductor wafer) satisfies a notch shift threshold, as described above. Process400may include additional implementations, such as any single implementation or any combination of implementations described below and/or in connection with one or more other processes described elsewhere herein. In some implementations, process400includes filtering, by the opening208of the light gate206, divergent light from the beam of light220in association with permitting the beam of light220to travel toward the light sensor210. In some implementations, redirecting the beam of light220toward the light gate206includes reflecting, by a first surface204s1of the reflector204, the beam of light220toward a second surface204s2of the reflector204, and reflecting, by the second surface204s2of the reflector204, the beam of light220toward the opening208. In some implementations, a value of a characteristic of the signal225is dependent on an intensity of the portion220pof the beam of light220. In some implementations, process400includes providing (e.g., by the processing device212) an indication of a result of determining whether the amount of the shift in the position of the wafer notch252satisfies the notch shift threshold. In some implementations, process400includes triggering (e.g., by the processing device212) an alarm when a result of determining whether the amount of the shift in the position of the wafer notch252satisfies the notch shift threshold is that the amount of the shift in the position of the wafer notch252does not satisfy the notch shift threshold. In some implementations, the light gate206comprises a partial enclosure206e. In some implementations, a size of the opening208is greater than or equal to a size of the wafer notch252. In some implementations, a size of the opening208corresponds to a range of allowable positions of the wafer notch252. AlthoughFIG.4shows example blocks of process400, in some implementations, process400may include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted inFIG.4. Additionally, or alternatively, two or more of the blocks of process400may be performed in parallel. In this way, wafer notch positioning detection can be performed by a position detection device that uses a beam of light. For example, a position detection device200may include a light source202to provide a beam of light220, a reflector204to receive and redirect the beam of light220, and a light gate206having an opening208to permit the beam of light220to travel through the opening208. The position detection device200may further include a light sensor210to receive a portion220pof the beam of light220after the beam of light220travels through the opening208, and to convert the portion220pof the beam of light220to a signal225. The position detection device200may further include a processing device212to determine, based on the signal225, whether an amount of a shift in a position of the notch252satisfies a notch shift threshold, whether the notch252is in an allowable position, and/or the like. Notably, operation of position detection device200is less susceptible to lighting conditions than other notch detection techniques, such as the image sensor-based position detection technique described above. This permits the position detection device200to be used across a more diverse range of semiconductor manufacturing processes. Moreover, the position detection device200reduces detection errors and reduces false-positives (e.g., reduces the likelihood that a notch is erroneously detected as being in the correct position when the notch actually is not). In addition, the position detection device200is less complex and requires less processing and memory resources than other notch detection techniques. As described in greater detail above, some implementations described herein provide an optical system, a method, and position detection device associated with performing wafer notch positioning detection. In some implementations, the optical system includes a light source to provide a beam of light, a reflector to receive and redirect the beam of light, and a light gate having an opening to permit the beam of light, from the reflector, to travel through the opening. In some implementations, the optical system includes a light sensor to receive a portion of the beam of light after the beam of light travels through the opening, and convert the portion of the beam of light to a signal. In some implementations, the optical system includes a processing device to determine whether a notch of a wafer is in an allowable position based on the signal. In some implementations, the method includes providing, by a light source, a beam of light toward a reflector. In some implementations, the method includes redirecting, by the reflector, the beam of light toward a light gate, the light gate having an opening that permits the beam of light to travel toward a light sensor. In some implementations, the method includes receiving, by the light sensor, a portion of the beam of light and converting, by the light sensor, the portion of the beam of light to a signal. In some implementations, the method includes determining, by a processing device and based on the signal, whether an amount of a shift in a position of a wafer notch satisfies a notch shift threshold. In some implementations, the position detection device includes a reflector to redirect a beam of light. In some implementations, the position detection device includes a light gate comprising a partial enclosure and having one or more openings to permit the beam of light, from the reflector, to travel through an opening of the one or more openings. In some implementations, the position detection device includes a light sensor to convert a portion of the beam of light, received from the opening of the light gate, to a signal. In some implementations, the position detection device includes a processing device to detect, based on the signal, whether a notch of a wafer is in an allowable position. The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure. | 34,909 |
11942349 | DESCRIPTION OF EMBODIMENTS Hereinafter, the present invention will be described with reference to drawings. Subjects shown herein are illustrative one and one for describing embodiments of the present invention exemplarily, and are described for the purpose of providing one believed to be explanation in which the principles and conceptual characteristics of the invention can be understood most effectively and without any difficulty. In this point, the present invention shows clearly that the embodiments are necessary for fundamental comprehension of the present invention and how some embodiments of the present invention are embodied in practice by an explanation in connection with drawings without intending indication of a structural detail of the present invention above a certain level to those skilled in the art. In the following description, items common to the film for manufacturing semiconductor component and the film for electronic component manufacture are sometimes described simply as “film for component manufacture”. [1] Film for Manufacturing Semiconductor Component A film1for manufacturing semiconductor component is a film used in a method for manufacturing a semiconductor component. The film1for manufacturing semiconductor component includes a base layer11and an adhesive layer12(seeFIG.1). The adhesive layer12is provided only on the other surface side of the base layer11, and is not usually provided on one surface side of the base layer11. Further, the base layer11and the adhesive layer12may be in direct contact with each other, or may be in contact with each other with another layer interposed between the base layer11and the adhesive layer12. <1> Base Layer In the base layer11, the arithmetic average roughness (Ra) of the surface of the one surface11aon which the adhesive layer12is not provided is 0.1 μm or more and 2.0 μm or less and the maximum height (Rz) is 1.0 μm or more and 15 μm or less. Thereby, even when it is used in an environment accompanied by a change in temperature, it is possible to prevent vacuum break from becoming impossible because one surface11aof the film1for component manufacture is firmly brought into close contact with a table surface of the suction table90having high smoothness. Then, the film1for component manufacture can be easily removed from the table surface after the suction is stopped. In addition, it is possible to stabilize the close contact state between the table surface and the film1for component manufacture so as not to change for each operation, and it is possible to keep the force necessary for removing the film1for component manufacture constant. Therefore, the work efficiency is improved, and this is particularly advantageous in the case of automation. Since the lower limit value of Ra is 0.1 μm or more and the lower limit value of Rz is 1.0 μm or more, it is possible to prevent effective vacuum breakdown from becoming impossible. On the other hand, when the upper limit value of Ra is 2.0 μm or less and the upper limit value of Rz is 15 μm or less, it is possible to prevent sufficient close contact from becoming impossible when the film1for component manufacture is suctioned to the suction table90. Among the above, Ra may be in the range of 0.1 μm or more and 2.0 μm or less, more preferably 0.15 μm or more and 1.9 μm or less, more preferably 0.17 μm or more and 1.8 μm or less, particularly preferably 0.19 μm or more and 1.7 μm or less, and particularly preferably 0.20 μm or more and 1.5 μm or less. Further, Rz may be in the range of 1.0 μm or more and 15 μm or less, more preferably 1.5 μm or more and 14 μm or less, more preferably 2.0 μm or more and 13 μm or less, particularly preferably 2.2 μm or more and 12 μm or less, and particularly preferably 2.4 μm or more and 5.9 μm or less. Also, it is preferred that the ratio of the elastic modulus E′ of the base layer at a high temperature to the elastic modulus E′ of the base layer at a normal temperature is within a predetermined range. Specifically, when the ratio of the elastic modulus E′(100) at 100° C. to the elastic modulus E′(25) at 25° C. is denoted by RE1(=E′(100)/E′(25)), the ratio RE1is preferably 0.2 or more and 1 or less (0.2≤RE1≤1). Herein, “E′(100)” represents the tensile elastic modulus of the base layer at 100° C., and “E′(25)” represents the tensile elastic modulus of the base layer at 25° C. As described above, in the case of 0.2≤RE1≤1, it is possible to maintain the surface roughness at ordinary temperature even at a high temperature enough to such an extent that the surface roughness can function sufficiently. On the other hand, even when the base layer has RE1<0.2, it can be used as a film for component manufacture, but in particular when it is attempted to obtain characteristics that a film is easily removed from the table surface after stopping suction at high temperature, it is necessary to further increase the surface roughness, and the suction efficiency tends to be lowered. Accordingly, it is preferred to set the ratio RE1to satisfy a relationship of 0.2≤RE1≤1, in order to achieve an ease of removal from the table surface at high temperature while securing sufficient suction to the suction table from room temperature to high temperature The ratio RE1is preferably 0.2≤RE1≤1, more preferably 0.23≤RE1≤0.90, more preferably 0.25≤RE1≤0.80, more preferably 0.28≤RE1≤0.78, furthermore preferably 0.30≤RE1≤0.75, furthermore preferably 0.31≤RE1≤0.73, and furthermore preferably 0.33≤RE1≤0.70. In these preferred ranges, in particular, even at a high temperature, it is possible to make the film for component manufacture which is easily removed from the table surface after stopping suction and can stabilize the close contact state with the table surface. That is, when a high-temperature evaluation test is carried out using an suction table, the film for component manufacture is removed from the suction table without waiting for the temperature of the suction table to be lowered for each evaluation, and the next object to be evaluated can be placed on the suction table and the evaluation work can be carried out efficiently. Here, the suction table is a device equipped with a table having a smooth top surface, and is a device capable of suctioning the film1for component manufacture on this smooth top surface by suction. For example, the suction table is also referred to a vacuum chuck table or the like. The material constituting this table is not particularly limited; however, it usually has a structure capable of being suctioned, for example, a molded body (metal molded body, ceramic molded body, resin molded body or the like) having a suction hole and a porous molded body (metal molded body, ceramic molded body, resin molded body or the like) can be used. In particular, in the process of using a suction table having a metal table, the film1for component manufacture can effectively exert its action. Further, within the range of 0.2≤RE1≤1, E′(25) is preferably 35 MPa≤E′(25)≤3500 MPa, more preferably 40 MPa≤E′(25)≤3000 MPa, more preferably 42 MPa≤E′(25)≤2800 MPa, more preferably 44 MPa≤E′(25)≤2000 MPa, more preferably 46 MPa≤E′(25)≤1000 MPa, more preferably 48 MPa≤E′(25)≤500 MPa, more preferably 50 MPa≤E′(25)≤400 MPa, more preferably 58 MPa≤E′(25)≤350 MPa, more preferably 60 MPa≤E′(25)≤300 MPa, more preferably 65 MPa≤E′(25)≤250 MPa, more preferably 68 MPa≤E′(25)≤200 MPa, and more preferably 70 MPa≤E′(25)≤150 MPa. The value of E′(25) may be different in the MD direction and the TD direction of the base layer, but it is preferred that it is in the above-mentioned range in both the MD direction and the TD direction of the base layer. On the other hand, E′(100) in the above case is preferably 7 MPa≤E′(100)≤3100 MPa, more preferably 10 MPa≤E′(100)≤3060 MPa, more preferably 12 MPa≤E′(100)≤2650 MPa, more preferably 15 MPa≤E′(100)≤2500 MPa, more preferably 16 MPa≤E′(100)≤2330 MPa, more preferably 17 MPa≤E′(100)≤2230 MPa, more preferably 18 MPa≤E′(100)≤1960 MPa, more preferably 19 MPa≤E′(100)≤1000 MPa, more preferably 20 MPa≤E′(100)≤500 MPa, more preferably 21 MPa≤E′(100)≤250 MPa, more preferably 22 MPa≤E′(100)≤100 MPa, and more preferably 23 MPa≤E′(100)≤70 MPa. The value of E′(100) may be different in the MD direction and the TD direction of the base layer, but it is preferred that it is in the above-mentioned range in both the MD direction and the TD direction of the base layer. Each elastic modulus E′ related to the base layer is measured by a dynamic viscoelasticity measurement device (DMA: Dynamic Mechanical Analysis). Specifically, a sample size was set to a width of 10 mm, a distance between chucks was set to 20 mm, and measurement was carried out from −50° C. to 200° C. under the conditions of a frequency of 1 Hz and a temperature raising rate of 5° C./min, and data at each temperature was read from the resulting data to obtain the tensile elastic modulus. That is, a value at 25° C. is taken as a tensile elastic modulus E′(25), and a value at 100° C. is taken as a tensile elastic modulus E′(100). In addition, it is preferred that the ratio of the elastic modulus E′ of the base layer at a high temperature to the elastic modulus E′ of the base layer at a low temperature is within a predetermined range. Specifically, the ratio of the elastic modulus E′(160) at 160° C. to the elastic modulus E′(−40) at −40° C. is denoted by RE2(=E′(160)/E′(—40)), the ratio RE2is preferably 0.01 or more and 1 or less (0.01≤RE2≤1). Herein, “E′(160)” represents the tensile elastic modulus of the base layer at 160° C., and “E′(−40)” represents the tensile elastic modulus of the base layer at −40° C. As described above, in the case of 0.01≤RE2≤1, even when an evaluation step is performed in the respective temperature ranges of low temperature of −40° C. or higher and 0° C. or lower and/or high temperature of 100° C. or higher and 160° C. or lower at the time of manufacturing the semiconductor component, it is unnecessary to detach the semiconductor wafer or the semiconductor component from the film for component manufacture and to replace it with another film for component manufacture which is required in the next step, and then it is possible to use the film for component manufacture commonly to two or more different steps such as the evaluation step, the segmenting step, and the pickup step as in a process or the like. More specifically, in recent years, semiconductor components are sometimes manufactured by the following procedures (1) and (2), for example. (1) A procedure is that after a semiconductor wafer (before segmentation) is placed on a dedicated tray or adhesive film and evaluated in a wafer form, another adhesive film (another adhesive film having characteristic required in the next step) is bonded to the back surface (non-circuit surface) of the evaluated wafer, and then the wafer is separated into semiconductor components (dicing), the semiconductor components are picked-up from the adhesive film, and only the semiconductor components that passed the previous evaluation are bonded again to another adhesive film in order to use them in the subsequent steps. (2) A procedure is that adhesive film (another adhesive film (another adhesive film having characteristic required in the next step) is bonded to the back surface (non-circuit surface) of the evaluated semiconductor wafer before evaluation (before segmentation), and then the semiconductor wafer is separated into semiconductor components (dicing), the semiconductor components are picked-up from the adhesive film, replaced in a dedicated tray, and only the semiconductor components that passed the previous evaluation are bonded again to another adhesive film in order to use them in the subsequent steps. In any of these procedures, it is necessary to perform work to change the semiconductor components among a plurality of adhesive films or the like, the number of man-hours for replacement is large, and the kind of the adhesive film to be used also increases. Therefore, if there are films for component manufacture that can be commonly used in different steps, the above problem can be solved and the number of man-hours reduction and cost reduction can be realized. On the other hand, in the present film for component manufacture, as described above, when including a characteristic of 0.2≤RE1≤1 in addition to characteristics of 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15, it is possible to use a film that is common over the steps from an evaluation step accompanied by a change in temperature to a pickup step (which can provide flexibility required in a pickup step) performed by stretching a film for semiconductor manufacture. Further, as described above, when the film for semiconductor manufacture has the characteristics of 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15 and further have the characteristic of 0.2≤RE1≤1, and in addition, the characteristic of 0.01≤RE2≤1, it is also possible to meet an evaluation step having a high-temperature process or a low-temperature process, and it is possible to use a film that is common over the steps from such an evaluation step to a pickup step (which can provide flexibility required in a pickup step) performed by stretching the film for semiconductor manufacture. As described above, there is no need to change to a dedicated adhesive film for each step, which is advantageous in terms of productivity of semiconductor components. In addition to this, since either the evaluation step or the segmenting step (step of separating the semiconductor wafer into segments) can be performed while bonding the present film for component manufacture to the semiconductor wafer or the semiconductor component, any of these steps can be performed first, and flexibility of a step can be enhanced compared with the case of using a dedicated adhesive film or tray. The ratio RE2is preferably 0.01≤RE2≤1, more preferably 0.01≤RE2≤0.9, more preferably 0.013≤RE2≤0.7, more preferably 0.017≤RE2≤0.5, furthermore preferably 0.020≤RE2≤0.3, furthermore preferably 0.023≤RE2≤0.2, furthermore preferably 0.025≤RE2≤0.1, and furthermore preferably 0.027≤RE2≤0.05. In these preferred ranges, particularly high sharing among steps can be exerted. Further, it is preferred that E′(−40) is 10 MPa≤E′(−40)≤4500 MPa in the range of 0.01≤RE2≤1. In the present film for component manufacture, when the E′(−40) of the base layer is 10 MPa≤E′(−40)≤4500 MPa, the flexibility of the film for component manufacture can be maintained in a low temperature environment. For example, sometimes the film1for component manufacture is used as a protecting member15(seeFIG.2) accompanied by a frame (ring frame, etc.)7as described later. In the evaluation steps (see R3′ inFIG.16), an article to be evaluated (semiconductor wafer20is exemplified inFIG.16, but this can be applied to semiconductor component21, array-shaped electronic component50, electronic component51) is subjected to an evaluation with a back surface of the article bonded to the adhesive layer12of the film1for component manufacture fixed to a protecting member15. On this evaluation, in order to avoid contact between each part on the measuring device side such as the probe card8and the frame7, jigs such as a stopper91are arranged on the inside of the frame7, and the frame7is pressed downward (e.g., 0.5 to 15 mm), and thereby the frame7can be located away from the measuring equipment such as the probe card8. In such a case, when the frame7is moved downward, the film1for component manufacture bonded to the frame7is stretched within an opening71, and therefore the film1for component manufacture requires flexibility capable of following this movement. Moreover, as described later, the evaluation is also made at low temperatures, and the tensile elastic modulus E′ at a low temperature of the base layer11is necessarily higher than the tensile elastic modulus E′ at a high temperature, and therefore it is important to maintain the flexibility at a low temperature. As described above, in the film1for component manufacture required to undergo the evaluation step, it is preferred to be able to maintain the flexibility in a low temperature environment. However, a material easily attaining heat resistance under high temperature is usually a material having a high tensile elastic modulus at high temperature, and the tensile elastic modulus of such a material further increases at low temperature, and therefore it is difficult for the material to endure the above-mentioned conditions. In this respect, the film1for component manufacture in which the ratio RE2of the base layer11is 0.01≤RE2≤1 and E′(−40) is 10 MPa≤E′(−40)≤4500 MPa can satisfies the above requirement. The E′(−40) is preferably 20 MPa≤E′(−40)≤4300 MPa, more preferably 50 MPa≤E′(−40)≤4200 MPa, more preferably 80 MPa≤E′(−40)≤4100 MPa, more preferably 100 MPa≤E′(−40)≤4000 MPa, more preferably 120 MPa≤E′(−40)≤3800 MPa, more preferably 150 MPa≤E′(−40)≤2500 MPa, more preferably, 200 MPa≤E′(−40)≤1400 MPa, more preferably 250≤E′(−40)≤500 MPa, and more preferably 300 MPa≤E′(−40)≤400 MPa. The value of E′(−40) may be different in the MD direction and the TD direction of the base layer, but it is preferred that it is in the above range in both the MD direction and the TD direction of the base layer. On the other hand, E′(160) in the above case is preferably 0.1 MPa≤E′(160)≤600 MPa, more preferably 0.15 MPa≤E′(160)≤580 MPa, more preferably 0.2 MPa≤E′(160)≤560 MPa, more preferably 0.3 MPa≤E′(160)≤540 MPa, more preferably 0.4 MPa≤E′(160)≤520 MPa, more preferably 0.5 MPa≤E′(160)≤500 MPa, more preferably 0.6 MPa≤E′(160)≤100 MPa, more preferably 0.8 MPa≤E′(160)≤50 MPa, and more preferably 1 MPa≤E′(160)≤40 MPa. The value of E′(160) may be different in the MD direction and the TD direction of the base layer, but it is preferred that it is in the above-mentioned range in both the MD direction and the TD direction of the base layer. Each elastic modulus E′ related to the base layer is measured by a dynamic viscoelasticity measurement device (DMA: Dynamic Mechanical Analysis). Specifically, a sample size was set to a width of 10 mm, a distance between chucks was set to 20 mm, and measurement was carried out from −50° C. to 200° C. under the conditions of a frequency of 1 Hz and a temperature raising rate of 5° C./min, and data at each temperature was read from the resulting data to obtain the tensile elastic modulus. That is, a value at −40° C. is taken as a tensile elastic modulus E′(−40), and a value at 160° C. is taken as a tensile elastic modulus E′(160). Further, a thickness of the base layer is not particularly limited, and it is preferably 50 μm or more and 200 μm or less, more preferably 80 μm or more and 200 μm or less, and particularly preferably 80 μm or more and 150 μm or less. In addition, it does not matter whether the base layer is stretched or not stretched. It is only necessary that the base layer has the above-mentioned various characteristics and can support the adhesive layer, and a material of the base layer is not particularly limited. A material constituting the base layer is preferably a resin. Further, among resins, a resin having elastomeric properties is preferred from the viewpoint of achieving the various characteristics. Examples of the resin having elastomeric properties include thermoplastic elastomers, silicone and the like. These resins may be used singly, or may be used in combination of two or more thereof. Among these, a resin having thermoplasticity is preferred, and thermoplastic elastomers are preferred. When the base layer contains the thermoplastic elastomer, the ratio of the thermoplastic elastomer to the whole resin constituting the base layer can be set to, for example, 30% by mass or more and 100% by mass or less. That is, the resin constituting the base layer may be composed of only a thermoplastic elastomer. A ratio of the thermoplastic elastomer is preferably 50% by mass or more and 100% by mass or less, and more preferably 70% by mass or more and 100% by mass or less. The thermoplastic elastomer may be composed of a block copolymer having a hard segment and a soft segment or a polymer alloy of a hard polymer and a soft polymer, or may be one having characteristics of both of the block copolymer and the polymer alloy. Values of the elastic moduli E of the base layer can be controlled by adjusting these components constituting the base layer. That is, the values of the tensile elastic moduli can be controlled by adjusting kinds of resins, ratios of resins in the case of containing plural kinds of resins and molecular structures (ratios of the hard segment and the soft segment) of polymers constituting resins. Examples of the thermoplastic elastomer include polyester-based thermoplastic elastomers, polyamide-based thermoplastic elastomers, styrene-based thermoplastic elastomers, olefin-based thermoplastic elastomers, vinyl chloride-based thermoplastic elastomers, polyimide-based thermoplastic elastomers (polyimide ester type, polyimide urethane type, etc.) and the like. These elastomers may be used singly, or may be used in combination of two or more thereof. Among these thermoplastic elastomers, polyester-based thermoplastic elastomers, polyamide-based thermoplastic elastomers and polyimide-based thermoplastic elastomers are preferred, and polyester-based thermoplastic elastomers and/or polyamide-based thermoplastic elastomers are particularly preferred. The polyester-based thermoplastic elastomer may have any constitution except for containing a polyester component as a hard segment. As the soft segment, polyester, polyether, polyether-ester or the like can be used. These elastomers may be used singly, or may be used in combination of two or more thereof. That is, for example, as the polyester component constituting the hard segment, a constituent unit derived from a monomer such as dimethyl terephthalate may be contained. On the other hand, as the component constituting the soft segment, a constituent unit derived from a monomer such as 1,4-butanediol and poly(oxytetramethylene)glycol, may be contained. More specifically, PBT-PE-PBT type polyester-based thermoplastic elastomer and the like can be mentioned. Specific examples of the polyester-based thermoplastic elastomers includes “PRIMALLOY (trade name)” manufactured by Mitsui Chemicals, Inc., “Hytrel (trade name)” manufactured by Du pont-Toray Co., Ltd., “PELPRENE (trade name)” manufactured by TOYOBO CO., LTD., “HYPER ALLOY ACTYMER (trade name)” manufactured by RIKEN TECHNOS CORPORATION, and the like. These elastomers may be used singly, or may be used in combination of two or more thereof. The polyamide-based thermoplastic elastomer may have any constitution except for containing a polyamide component as a hard segment. As the soft segment, polyester, polyether, polyether-ester or the like can be used. These elastomers may be used singly, or may be used in combination of two or more thereof. That is, examples of the polyamide component constituting the hard segment include polyamide 6, polyamide 11, polyamide 12 and the like. These polyamide components may be used singly, or may be used in combination of two or more thereof. Various lactams and the like can be used as a monomer for these polyamide components. On the other hand, as the component constituting the soft segment, a monomer such as dicarboxylic acid or a constituent unit derived from polyether polyol, may be contained. As the polyether polyol among these, polyether diol is preferred, and examples thereof include poly(tetramethylene)glycol, poly(oxypropylene)glycol and the like. These elastomers may be used singly, or may be used in combination of two or more thereof. More specific examples thereof include polyether amide type polyamide-based thermoplastic elastomers, polyester amide type polyamide-based thermoplastic elastomers, polyether ester amide type polyamide-based thermoplastic elastomers, and the like. Specific examples of the polyamide-based thermoplastic elastomers include “Pebax (trade name)” manufactured by ARKEMA K. K., “DAIAMID (trade name)” manufactured by Daicel-Evonik Ltd., “VESTAMID (trade name)” manufactured by Daicel-Evonik Ltd., “UBESTA XPA (trade name)” manufactured by Ube Industries, Ltd., and the like. These elastomers may be used singly, or may be used in combination of two or more thereof. When the base layer is a resin other than the thermoplastic elastomer, examples of such a resin include polyester, polyamide, polycarbonate, an acrylic resin and the like. These resins may be used singly, or may be used in combination of two or more thereof. Among these resins, polyester and/or polyamide is preferred, and specific examples thereof include polyesters such as polyethylene terephthalate, polybutylene terephthalate, polyethylene naphthalate and polybutylene naphthalate; and polyamides such as nylon 6 and nylon 12. Furthermore, the base layer can contain various additives such as a plasticizer and a softener (mineral oil, etc.), fillers (carbonate, sulfate, titanate, silicate, oxides (titanium oxide, magnesium oxide), silica, talc, mica, clay, fiber filler, etc.), antioxidant, photostabilizer, anti-static agent, lubricant, coloring agent and the like in a resin constituting the base layer. These additives may be used singly, or may be used in combination of two or more thereof. <2> Adhesive Layer The adhesive layer12is a layer formed of an adhesive material and is usually provided only on the other surface of the base layer11(one surface11aof the base layer11is a surface having characteristics of 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15). The adhesive layer12may be disposed in direct contact with the base layer11, or may be disposed on the base layer11with another layer interposed between the adhesive layer12and the base layer11. Furthermore, the adhesive force of the adhesive layer12is not particularly limited; however, it is preferred that the adhesive force to a silicon wafer (measured in an environment of a temperature of 23° C. and a relative humidity of 50%), measured according to JIS Z 0237, at the time when the adhesive layer12is peeled off from the surface of a silicon wafer after being bonded to the surface of a silicon wafer and left standing for 60 minutes, is 0.1 to 10 N/25 mm. When the adhesive force is within the above range, it is possible to suppress the adhesive residue when peeling off the adherend while ensuring good adhesion to the adherend (semiconductor wafer, semiconductor component, electronic component, etc.). This adhesive strength is more preferably 0.2 N/25 mm or more and 9 N/25 mm or less, and further preferably 0.3 N/25 mm or more and 8 N/25 mm or less. A thickness (thickness of one surface side of the base layer11) of the adhesive layer12is not particularly limited, and it is preferably 1 μm or more and 40 μm or less, more preferably 2 μm or more and 35 μm or less, and particularly preferably 3 μm or more and 25 μm or less. The adhesive may have characteristics described above, and any material may be used. The adhesive usually includes at least an adhesive main agent. Examples of the adhesive main agent include an acrylic adhesive agent, a silicone-based adhesive agent, a rubber-based adhesive agent and the like. These adhesive agents may be used singly, or may be used in combination of two or more thereof. Among these adhesive agents, the acrylic adhesive agent is preferred. Examples of the acrylic adhesive agent include a homopolymer of an acrylate compound, a copolymer of an acrylate compound and a comonomer, and the like. These adhesive agents may be used singly, or may be used in combination of two or more thereof. Further, examples of the acrylate compound include methyl acrylate, ethyl acrylate, butyl acrylate, 2-ethylhexyl acrylate and the like. These acrylate compounds may be used singly, or may be used in combination of two or more thereof. Furthermore, examples of the comonomer include vinyl acetate, acrylonitrile, acrylamide, styrene, methyl(meth)acrylate, (meth)acrylic acid, hydroxyethyl methacrylate, dimethylaminoethyl methacrylate, glycidyl methacrylate, maleic anhydride and the like. Furthermore, the adhesive may contain a cross-linking agent other than the adhesive main agent. Examples of the cross-linking agent include epoxy-based cross-linking agents (pentaerythritol polyglycidyl ether, etc.), isocyanate-based cross-linking agents (diphenylmethane diisocyanate, tolylene diisocyanate, tetramethylene diisocyanate, hexamethylene diisocyanate, polyisocyanate, etc.). These cross-linking agents may be used singly, or may be used in combination of two or more thereof. When the cross-linking agent is contained in the adhesive, the content of the cross-linking agent is preferably set to 10 parts by mass or less with respect to 100 parts by mass of the whole adhesive. The adhesive force of the adhesive layer can be adjusted by the content of the cross-linking agent. Specifically, a method described in JP 2004-115591 A can be employed. The adhesive agent may be an energy-curable adhesive which is cured by energy rays, or may be an energy-non-curing adhesive which is not cured by energy rays. When the adhesive agent is the energy-curable adhesive, it is possible to cure the adhesive by irradiating the adhesive with energy rays to reduce the adhesive force thereof. Thus, the adhesive residue to the electronic component can be prevented with more reliability when the resulting electronic component (electronic component in which the semiconductor components are sealed in an array configuration) and the film for manufacturing semiconductor component are separated. The energy-curable adhesive material may be one that is cured by any energy ray. Examples of the energy ray include ultraviolet rays, electron beam, infrared rays and the like. These energy rays may be used singly, or may be used in combination of two or more thereof. Specific examples thereof include an ultraviolet curable adhesive agent which is cured with ultraviolet rays. When the adhesive is an energy-curable adhesive, the adhesive can contain a compound having a carbon-carbon double bond in a molecule (hereinafter, referred to as merely “curable compound”) and a photo-polymerization initiator capable of initiating the polymerization of the curable compound in response to the energy rays other than the above-mentioned adhesive main agent. The curable compound is preferably a monomer, an oligomer and/or a polymer which has a carbon-carbon double bond in a molecule and can be cured through radical polymerization. Specific examples of the curable compound include trimethylolpropane tri(meth)acrylate, pentaerythritol tri (meth)acrylate, dipentaerythritol hexa(meth)acrylate, tetraethyleneglycol di(meth)acrylate, 1,6-hexanediol di(meth)acrylate, neopentylglycol di(meth)acrylate and the like. These curable compounds may be used singly, or may be used in combination of two or more thereof. When the curable compound is contained in the adhesive, the content of the curable compound is preferably 0.1 to 20 parts by mass with respect to 100 parts by mass of the adhesive. In addition, the carbon-carbon double bond in a molecule may be contained by inclusion in a molecule of the adhesive main agent described above. That is, for example, the adhesive main agent can be an energy-curable polymer having a carbon-carbon double bond in a side chain. As described above, when the adhesive main agent has a curable structure in a molecule, the curable compound may be mixed, or does not have to be mixed. On the other hand, as the photo-polymerization initiator, a compound capable of producing a radical by irradiation of energy rays is preferred. Specific examples of such a photo-polymerization initiator include acetophenone-based photo-polymerization initiators (methoxyacetophenone, etc.), α-ketol compounds (4-(2-hydroxyethoxy)phenyl (2-hydroxy-2-propyl)ketone, α-hydroxycyclohexyl phenyl ketone, etc.), ketal-based compounds (benzyl dimethyl ketal, etc.), benzoin-based photo-polymerization initiators (benzoin, benzoin alkyl ethers (benzoin methyl ether, benzoin isopropyl ether, benzoin isobutyl ether), etc.), benzophenone-based photo-polymerization initiators (benzophenone, benzoylbenzoic acid, etc.), aromatic ketals (benzyl dimethyl ketal, etc.), and the like. These photo-polymerization initiators may be used singly, or may be used in combination of two or more thereof. When the photo-polymerization initiator is contained in the adhesive, the content of the photo-polymerization initiator is preferably set to 5 to 15 parts by mass with respect to 100 parts by mass of the adhesive. <3> Other Layers The film1for the present component manufacture may include only the base layer11and the adhesive layer12, or may include other layers. Examples of other layers include a projection-depression absorbing layer which can absorb a projection and depression shape of a bonding plane to make a film surface smooth, an interface-strength improving layer which improves strength of an interface with the adhesive, a migration preventive layer which suppress the migration of a low molecular weight component from a base material to an adhesive surface, and the like. These layers may be used singly, or may be used in combination of two or more thereof. <4> Manufacture of Film for Manufacturing Semiconductor Component The present film for manufacturing semiconductor component may be manufactured by any method, and the method is not particularly limited. Specifically, the film can be manufactured by a method such as a co-extrusion method, an extrusion lamination method, an adhesive lamination method or an application method. Among these methods, the co-extrusion method is a method in which a molten resin serving as the adhesive layer12is laminated on a molten resin serving as the base layer11by co-extrusion to manufacture a film for manufacturing semiconductor component. The extrusion lamination method is a method of laminating a molten resin serving as the adhesive layer12on the base layer11by extrusion to manufacture a film for manufacturing semiconductor component. Furthermore, the application method is a method of laminating a molten resin serving as the adhesive layer12on the base layer11by application or coating to manufacture a film for manufacturing semiconductor component. When the energy-curable adhesive is used as an adhesive constituting the adhesive layer12, the application method is preferably used. Further, the adhesive lamination method is a method of laminating the adhesive layer12on the base layer11through thermocompression bonding, an adhesive or hot-melt to manufacture a film for manufacturing semiconductor component. These methods may be used singly, or may be used in combination of two or more thereof. Furthermore, as described above, regardless of whether the film for component manufacture is manufactured by any of a co-extrusion method, an extrusion lamination method, an adhesion lamination method, a coating method and the like, the base layer11can be formed by an appropriate method such as an extrusion molding method, a calendar It can be formed by an appropriate method such as an extrusion molding method or a calendar molding method. One surface11aof the present base layer11of the film1for component manufacture has a predetermined surface roughness. The one surface11ahaving this predetermined surface roughness may be provided at the time of forming the base layer11or may be provided after the formation. For example, when a predetermined surface roughness is provided at the time of forming the base layer11, and extrusion molding is used, the sheet extruded from the extruder is passed through a roll having a predetermined surface unevenness (a satin roll or the like) to transfer the surface unevenness of the roll to the sheet, and thereby, the base layer11provided with a predetermined surface roughness can be formed. When a predetermined surface roughness is provided at the time of forming the base layer11, and calendar molding is used, the softened or melted resin is kneaded and rolled between a plurality of rolls to be formed into a film, and in a step after the calendering step, the base layer11having a predetermined surface roughness provided can be formed by passing the film through a roll having a predetermined surface unevenness (satin roll, etc.) to transfer the unevenness on the surface of the roll to a sheet. The surface roughness of the surface of the base layer11opposite to the one surface11ais not particularly limited. From the viewpoint of forming the adhesive layer12, when the opposite surface of the one surface11aand the adhesive layer12can be formed with good adhesion, even if the surface is smoother, the arithmetic average roughness (Ra) of the surface or the maximum height (Rz) may be large. Further, when providing a predetermined surface roughness after formation of the base layer11, it is possible to provide predetermined surface roughness by passing a smooth film previously formed through a roll having a predetermined surface unevenness (satin roll or the like) to transfer the surface unevenness of the roll to the film. At this time, the film can be heated as necessary. Furthermore, it is possible to provide a predetermined surface roughness by applying sand blasting to a smooth film previously formed. Even in these cases, it is similarly preferred that the opposite surface of the one surface11aof the base layer11is a smoother surface, unlike the one surface11a, from the viewpoint of forming the adhesive layer12. [2] Method for Manufacturing Semiconductor Component The present film1for component manufacture is used in a method for manufacturing a semiconductor component21. The method for manufacturing a semiconductor component includes a segmenting step R4(seeFIG.5), an evaluation step R3(seeFIG.4) and/or an evaluation step R5(seeFIG.6), and a pickup step R8(seeFIG.9). Among them, the segmenting step R4(seeFIG.5) is a step of separating a semiconductor wafer20into segments in a state in which the adhesive layer12of the film1for manufacturing semiconductor component is bonded to a back surface of the semiconductor wafer20having circuits formed thereon to obtain semiconductor components21. Further, the pickup step R8(seeFIG.9) is a step of separating the semiconductor component21from the adhesive layer12. Then, the manufacturing method includes at least one step of the evaluation step R3(seeFIG.4) and the evaluation step R5(seeFIG.6) prior to the pickup step R8(seeFIG.9). Of these steps, the evaluation step R3is a step of evaluating the semiconductor wafer20in a temperature range of 25° C. or lower or 75° C. or higher. On the other hand, the evaluation step R5is a step of evaluating the semiconductor component21in a temperature range of 25° C. or lower or 75° C. or higher. Among the above steps, the bonding step R2(seeFIG.3) is usually provided as a precedent step of the segmenting step R4(seeFIG.5). The bonding step R2(seeFIG.3) is a step of bonding the adhesive layer12of the film1for component manufacture to a back surface of the semiconductor wafer20having circuits formed thereon. Usually, the film for component manufacture is used as a protecting member15by bonding the adhesive layer12of the film1for component manufacture to one surface7aof the frame7having an opening71so as to cover the opening71of the frame7(protecting member forming step R1, seeFIG.2). Further, the bonding step R2(seeFIG.3) is a step of bonding a semiconductor wafer20to the surface12aof the adhesive layer12that is exposed via the opening71of the frame7of the protecting member15, and these protecting member forming step R1(seeFIG.2) and bonding step R2(seeFIG.3) are simultaneously performed. In addition, naturally, the protecting member forming step R1(seeFIG.2) and the bonding step R2(seeFIG.3) can also be performed separately, as required. The semiconductor wafer20may be a semiconductor wafer which can be suitably bonded to the present film1for component manufacture, and a kind of the semiconductor wafer is not particularly limited, and examples thereof include a silicon substrate, a sapphire substrate, a germanium substrate, a germanium-arsenic substrate, a gallium-phosphorus substrate, a gallium-arsenic-aluminum substrate, and the like. Examples of the semiconductor wafer using the sapphire substrate among these semiconductor substrates include a semiconductor wafer in which a semiconductor layer (GaN, etc.) is laminated on the sapphire substrate. Circuits are usually formed on the surfaces of these semiconductor wafers. Examples of the circuits include a wiring, a capacitor, a diode, a transistor and the like. These substrates may be used singly, or may be used in combination of two or more thereof. The segmenting step R4(seeFIG.5) is a step of separating (dicing) a semiconductor wafer20, a back surface of which a film1for component manufacture is bonded to, into segments to obtain semiconductor components21. The segmenting step R4can be appropriately performed using a publicly known method. In addition, the segmentation may be performed so that at least one semiconductor circuit region is contained in one semiconductor component21, or may be performed so that two or more semiconductor circuit regions are contained in one semiconductor component21. The pickup step R8(seeFIG.9) is a step of separating the segmented semiconductor components21from the adhesive layer12of the film1for component manufacture. The pickup step R8can be appropriately performed using a publicly known method, and for example, as exemplified inFIG.9, a semiconductor component21′, a pickup object, is pushed up with a pushing-up member92from a side of the base layer11of the film1for manufacturing semiconductor component, and the pushed-up semiconductor component21′ can be picked-up through a method such as suction or the like by a pickup instrument93. The evaluation step is a step of evaluating the semiconductor wafer20or the semiconductor component21prior to the pickup step R8. This evaluation step includes an evaluation step R3(seeFIG.4) for evaluating the semiconductor wafer20prior to the segmenting step R4and prior to the pickup step R8, and an evaluation step R5(seeFIG.6) for evaluating the semiconductor component21after the segmenting step R4and prior to the pickup step R8. Only any one of the evaluation step R3and the evaluation step R5may be performed, or both of them may be performed, as required. An evaluation of the semiconductor wafer20or the semiconductor component21specifically includes the following (1) semiconductor wafer evaluation and the following (2) semiconductor component evaluation. Of these, (1) semiconductor wafer evaluation is an evaluation made in a state of a semiconductor wafer, by use of a prober, on whether or not electrical properties of a plurality of circuits (corresponding to a circuit of each semiconductor component) formed on a semiconductor wafer, are desired properties in a predetermined temperature region (25° C. or lower, or 75° C. or higher). On the other hand, (2) semiconductor component evaluation is an evaluation made in a state in which a semiconductor wafer is separated into segments and a plurality of semiconductor components are arranged in an array configuration, by use of a prober, on whether or not electrical properties of these semiconductor components are desired properties in a predetermined temperature region (25° C. or lower, or 75° C. or higher). These evaluations include one intended to verify an operation in the above-mentioned temperature region and one intended for an accelerated endurance test in a predetermined temperature region (e.g., burn-in test). When the evaluation step R3(seeFIG.4) of the above-mentioned evaluation steps is performed, that is, when the evaluation is performed subsequent to the segmenting step R4and prior to the pickup step R8(evaluation is performed on a semiconductor wafer20), for example, a probe card8having a plurality of probes81formed thereon is brought into contact with predetermined corresponding locations of the semiconductor wafer20to make electrical connection, and an evaluation is performed by determining whether a signal communicated between the probe81and a circuit formed on the semiconductor wafer20is right or wrong (probe test) (see FIG.4). In this case, as shown inFIG.4, the film1for component manufacture is fixed to the frame body7of the protecting member15, and in a state in which the back surface of the semiconductor wafer20is bonded to the adhesive layer12of the film, the measuring device such as a probe card8and the suction table90can be brought close to each other so that the probe81can be brought into contact with the surface of the semiconductor wafer20. In this case, as shown inFIG.16, jigs such as the suction table90and the stopper91are arranged on the inside of the frame body7in order to avoid contact between each part on the measuring device side such as the probe card8and the frame body7, and the frame body7can be pushed downward, and thereby, the frame body7can be prevented from coming into contact with the measuring device such as the probe card8. On the other hand, as shown inFIG.6, when the evaluation step R5(seeFIG.6) of the above-mentioned evaluation steps is performed, that is, when the evaluation is performed subsequent to the segmenting step R4and prior to the pickup step R8(evaluation is performed on a semiconductor component21), for example, a probe card8having a plurality of probes81formed thereon is brought into contact with predetermined corresponding locations of the semiconductor component21to make electrical connection, and an evaluation is performed by determining whether a signal communicated between the probe81and a circuit formed on the semiconductor component21is right or wrong (probe test) (seeFIG.6). Similarly in this case, as shown inFIG.16, the frame body7can be pushed downward, and thereby, the frame body7can be prevented from coming into contact with the measuring device such as the probe card8. These evaluations may include non-contact optical evaluation other than electrical evaluation (probe test) performed by bringing the probe81into contact as described above. Further, the evaluation temperature range is not particularly limited, and it may be, for example, 25° C. or lower, or 75° C. or higher. Particularly, when the present film1for component manufacture has characteristics that 0.2≤RE1≤1 and 35 MPa≤E′(25)≤3500 MPa, the film has characteristics such that the film can withstand evaluation in at least a temperature range of 25° C. to 100° C. Further, by having the characteristic of 0.01≤RE2≤1, even when the evaluation step is carried out at a temperature of −80° C. or higher and 0° C. or lower (further −60° C. or higher and −10° C. or lower, particularly −40° C. or higher and −10° C. or lower) on the low temperature side, the film1for component manufacture can maintain required flexibility in the evaluation process. Furthermore, the film1for component manufacture does not interfere with the pickup step R8(seeFIG.9). That is, the film1for component manufacture maintains flexibility in pushing up the film1with the pushing-up member92in the pickup step R8, and the film1for component manufacture can be pushed up without being broken. Particularly, when the method includes the component-isolating step R7(seeFIG.8) prior to the pickup step R8, the film1for component manufacture is further susceptible to break, but the break can be prevented to smoothly perform pickup by using the aforementioned film1for component manufacture. Furthermore, even when the evaluation step is carried out at a temperature of 100° C. or higher and 170° C. or lower (further 110° C. or higher and 170° C. or lower, particularly 120° C. or higher and 160° C. or lower) on the high temperature side, the film1for component manufacture can maintain required flexibility in the evaluation process. Furthermore, the film1for component manufacture does not interfere with the pickup step R8(seeFIG.9). That is, the film1for component manufacture maintains flexibility in pushing up the film1with the pushing-up member92in the pickup step R8, and the film1for component manufacture can be pushed up without being broken. Particularly, when the method includes the component-isolating step R7(seeFIG.8) prior to the pickup step R8, the film1for component manufacture is further susceptible to break, but the break can be prevented to smoothly perform pickup by using the aforementioned film1for component manufacture. Furthermore, these evaluations may be made only on any one of a low-temperature side and a high-temperature side; however, the present film1for component manufacture can be one which does not interfere with the pickup step R8(seeFIG.9) even if these evaluations are made on both sides. In the present manufacturing method, in general, the film-isolating step R6(seeFIG.7) is further included other than the bonding step R2(seeFIG.3), the evaluation step R3(seeFIG.4), the segmenting step R4(seeFIG.5), the evaluation step R5(seeFIG.6) and the pickup step R8(seeFIG.9). The film-isolating step R6(seeFIG.7) is a step of separating the suction table90and the film1for component manufacture from each other in a state in which the adherend (the semiconductor wafer20or the semiconductor component21) is bonded to the film1for component manufacture. In the present method, since the above-mentioned film1for component manufacture is used, the surface of one side11aof the base layer11on which the adhesive layer12is not provided satisfies 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15, and this film-separating step R6can be easily and stably carried out. This film-isolating step R6(seeFIG.7) can be performed, for example, between the evaluation step R5(seeFIG.6) and the pickup step R8(seeFIG.9). That is, this is a process required when changing the table (such as the suction table90) on which the film1for component manufacture is placed. In the present manufacturing method, other steps may be included other than the bonding step R2(seeFIG.3), the evaluation step R3(seeFIG.4), the segmenting step R4(seeFIG.5), the evaluation step R5(seeFIG.6), the film-isolating step R6(seeFIG.7) and the pickup step R8(seeFIG.9). Examples of other steps include the protecting member forming step R1(seeFIG.2) and the component-isolating step R7(seeFIG.8). Of these steps, the protecting member forming step R1(seeFIG.2) is a step of bonding an adhesive layer12of the film1for manufacturing semiconductor component-to one surface7aof the frame7having an opening71so as to cover the opening71of the frame7. As the frame7, for example, a ring frame can be used. An outline of the frame7is not particularly limited, and it can appropriately have a shape responsive to necessity. For example, a circle, a quadrangle or the like can be employed. Similarly, an outline of the opening71is also not particularly limited, and can appropriately have a shape responsive to necessity, and for example, a circle, a quadrangle or the like can be employed. Also, a material constituting the frame7is not limited, and a resin and/or metal or the like can be used. Further, heating may be performed as required when the adhesive layer12of the film1for manufacturing semiconductor component is bonded to one surface7aof the frame7so as to cover the opening71of the frame7. The component-isolating step R7(seeFIG.8) is a step of isolating the segmented semiconductor components21on the film1for component manufacture by stretching the film1for component manufacture. Stretching of the film1for component manufacture can be performed while abutting a stopper91against the inside of the frame7. [3] Film for Electronic Component Manufacture A film1for electronic component manufacture of the present invention is a film used in a method for manufacturing an electronic component51. The film1for electronic component manufacture has the same structure as the film1for manufacturing semiconductor component (seeFIG.1). Accordingly, with respect to base layer11in the film1for electronic component manufacture, the aforementioned description (<1> Base Layer) of the base layer11in the film1for manufacturing semiconductor component can be applied as-is. With respect to the adhesive layer12in the film1for electronic component manufacture, the aforementioned description (<2> Adhesive Layer) of the adhesive layer12in the film1for manufacturing semiconductor component can be applied as-is. Further, with respect to the other layers in the film1for electronic component manufacture, the aforementioned description (<3> Other Layers) of the other layers in the film1for manufacturing semiconductor component can be applied as-is. In the above-mentioned descriptions, the term “film for manufacturing semiconductor component” in the description about the film1for manufacturing semiconductor component is replaced with “base layer in the film1for electronic component manufacture”, the term “semiconductor wafer” is replaced with “array-shaped electronic component”, and the term “semiconductor component” is replaced with “electronic component”. With respect to the manufacture of the film for electronic component manufacture in the film1for electronic component manufacture, the aforementioned description (<4> Manufacture of Film for Manufacturing Semiconductor Component) of manufacture of the film for manufacturing semiconductor component in the film1for manufacturing semiconductor component can be applied as-is. Herein, the term “film for manufacturing semiconductor component” in the description about manufacturing of the film1for manufacturing semiconductor component is replaced with “film1for electronic component manufacture”, the term “semiconductor wafer” is replaced with “array-shaped electronic component”, and the term “semiconductor component” is replaced with “electronic component”. [4] Method for Manufacturing Electronic Component The film1for electronic component manufacture is used in a method for manufacturing an electronic component51. The method for manufacturing an electronic component includes a segmenting step R4(seeFIG.11), an evaluation step R3(seeFIG.10) and/or an evaluation step R5(seeFIG.12), and a pickup step R8(seeFIG.15). Among these steps, the segmenting step R4(seeFIG.11) is a step of separating (dicing) an array-shaped electronic component50, a back surface of which a film1for component manufacture is bonded to, into segments to obtain electronic components51. The segmenting step R4can be appropriately performed using a publicly known method. In addition, the segmentation may be performed so that at least one semiconductor component is contained in one electronic component51, or may be performed so that two or more semiconductor components are contained in one electronic component51. Further, in the segmenting step R4(seeFIG.11), as is the case with the film1for manufacturing semiconductor component, the frame7can be used as a protecting member15also in the present film1for electronic component manufacture. The array-shaped electronic component50is one in which the semiconductor components are sealed in an array configuration. Specifically, the array-shaped electronic component50includes the following electronic components (1) to (3). The array-shaped electronic component (1) is an array-shaped electronic component obtained by arraying, on a lead frame, semiconductor components (chip, die) obtained by separating the semiconductor wafer having circuits formed thereon into segments, performing wire bonding of the semiconductor components, and sealing the semiconductor components with a sealant. The array-shaped electronic component (2) is an array-shaped electronic component50obtained by arraying, in a state of being apart from each other, semiconductor components21(chip, die) obtained by separating the semiconductor wafer having circuits formed thereon into segments, sealing the semiconductor components with a sealant30, and then forming external circuits40attaining external conduction, such as a rewiring layer and a bump electrode, collectively (seeFIG.10andFIG.11). That is, the array-shaped electronic component (2) is an array-shaped electronic component obtained in a fan-out system (eWLB system). The array-shaped electronic component (3) is an array-shaped electronic component obtained by using a semiconductor wafer as a semiconductor component as in a state of a wafer, and forming external circuits attaining external conduction, such as a rewiring layer and a bump electrode, and a sealing layer sealed with a sealant, collectively. The semiconductor wafer in the array-shaped electronic component (3) is in a state of pre-segmentation and includes a configuration in which semiconductor components (chip, die) are formed in an array configuration and a pattern in which a semiconductor wafer is used as a substrate (pattern in which a chip having a circuit is joined onto a non-circuit silicon substrate and used). That is, the array-shaped electronic component (3) is an array-shaped electronic component obtained in a wafer level chip size package (WLCSP) system. In addition, in the array-shaped electronic component (2), the film for electronic component manufacture of the present invention can be used in forming the array-shaped electronic component (2). Specifically, an array-shaped electronic component can be obtained by arraying semiconductor components in a state of being apart from each other on the film1for electronic component manufacture, sealing the semiconductor components with a sealant, and then forming external circuits attaining external conduction, such as a rewiring layer and a bump electrode, collectively. The evaluation step is a step of evaluating the array-shaped electronic component50or the electronic component51prior to the pickup step R8. This evaluation step includes an evaluation step R3(seeFIG.10) for evaluating the array-type electronic component50prior to the segmenting step R4and prior to the pickup step R8, and an evaluation step R5(seeFIG.12) for evaluating the electronic component51after the segmenting step R4and prior to the pickup step R8. Only any one of the evaluation step R3and the evaluation step R5may be performed, or both of them may be performed, as required. An evaluation of the array-shaped electronic component50or the electronic component51specifically includes the following (1) array-shaped electronic component evaluation and the following (2) electronic component evaluation. Of these, (1) array-shaped electronic component evaluation is an evaluation of the array-shaped electronic component50made as in the form of an array, by use of a prober, on whether or not electrical properties of internal circuits contained in the array-shaped electronic component50and external circuits (circuits for leading out the internal circuit) formed corresponding to these internal circuits are desired properties in a temperature region of 25° C. or lower, or 75° C. or higher. On the other hand, (2) electronic component evaluation is an evaluation made in a state in which an array-shaped electronic component50is separated into segments and a plurality of electronic components51are arranged in an array configuration, by use of a prober, on whether or not electrical properties of these electronic components51are desired properties in a temperature region of 25° C. or lower, or 75° C. or higher. These evaluations include one intended to verify an operation in the above-mentioned temperature region and one intended for an accelerated endurance test in the above-mentioned temperature region (e.g., burn-in test). When the evaluation step R3(seeFIG.10) of the above-mentioned evaluation steps is performed, that is, when the evaluation is performed subsequent to the segmenting step R4and prior to the pickup step R8(evaluation is performed on an array-shaped electronic component50), for example, a probe card8having a plurality of probes81formed thereon is brought into contact with an external circuit (bump electrodes or the like) formed on the array-shaped electronic component50to make electrical connection, and an evaluation is performed by determining whether a signal communicated between the probe81and the external circuit formed on the array-shaped electronic component50is right or wrong (probe test) (seeFIG.10). Also, in this case, as shown inFIG.10, the film1for component manufacture is fixed to the frame body7of the protecting member15, and in a state in which the back surface of the arrayed electronic component50is bonded to the adhesive layer12of the film, the measuring device such as a probe card8and the suction table90can be brought close to each other so that the probe81can be brought into contact with the surface of the array-shaped electronic component50. In this case, as shown inFIG.16, jigs such as the suction table90and the stopper91are arranged on the inside of the frame body7in order to avoid contact between each part on the measuring device side such as the probe card8and the frame body7, and the frame body7can be pushed downward, and thereby, the frame body7can be prevented from coming into contact with the measuring device such as the probe card8. On the other hand, as shown inFIG.12, when the evaluation step R5(seeFIG.12) of the evaluation steps is performed, that is, when the evaluation is performed subsequent to the segmenting step R4and prior to the pickup step R8(evaluation is performed on an electronic component51), for example, a probe card8having a plurality of probes81formed thereon is brought into contact with predetermined corresponding locations of the electronic component51to make electrical connection, and an evaluation is performed by determining whether a signal communicated between the probe81and a circuit formed on the electronic component51is right or wrong (probe test) (seeFIG.12). Similarly in this case, as shown inFIG.16, the frame body7can be pushed downward, and thereby, the frame body7can be prevented from coming into contact with the measuring device such as the probe card8. These evaluations may include non-contact optical evaluation other than electrical evaluation (probe test) performed by bringing the probe81into contact as described above. Further, the evaluation temperature range is not particularly limited, and it may be, for example, 25° C. or lower, or 75° C. or higher. Particularly, when the present film1for component manufacture has characteristics that 0.2≤RE1≤1 and 35 MPa≤E′(25)≤3500 MPa, the film has characteristics such that the film can withstand evaluation in at least a temperature range of 25° C. to 100° C. Further, by having the characteristic of 0.01≤RE2≤1, even when the evaluation step is carried out at a temperature of −80° C. or higher and 0° C. or lower (further −60° C. or higher and −10° C. or lower, particularly −40° C. or higher and −10° C. or lower) on the low temperature side, the film1for component manufacture can maintain required flexibility in the evaluation process. Furthermore, the film1for component manufacture does not interfere with the pickup step R8(seeFIG.15). That is, the film1for component manufacture maintains flexibility in pushing up the film1with the pushing-up member92in the pickup step R8, and the film1for component manufacture can be pushed up without being broken. Particularly, when the method includes the component-isolating step R7(seeFIG.14) prior to the pickup step R8, the film1for component manufacture is further susceptible to break, but the break can be prevented to smoothly perform pickup by using the aforementioned film1for component manufacture. Furthermore, even when the evaluation step is carried out at a temperature of 100° C. or higher and 170° C. or lower (further 110° C. or higher and 170° C. or lower, particularly 120° C. or higher and 160° C. or lower) on the high temperature side, the film1for component manufacture can maintain required flexibility in the evaluation process. Furthermore, the film1for component manufacture does not interfere with the pickup step R8(seeFIG.15). That is, the film1for component manufacture maintains flexibility in pushing up the film1with the pushing-up member92in the pickup step R8, and the film1for component manufacture can be pushed up without being broken. Particularly, when the method includes the component-isolating step R7(seeFIG.14) prior to the pickup step R8, the film1for component manufacture is further susceptible to break, but the break can be prevented to smoothly perform pickup by using the aforementioned film1for component manufacture. Furthermore, these evaluations may be made only on any one of a low-temperature side and a high-temperature side; however, the present film1for component manufacture can be one which does not interfere with the pickup step R8(seeFIG.15) even if these evaluations are made on both sides. In the present manufacturing method, in general, the film-isolating step R6(seeFIG.13) is further included other than the evaluation step R3(seeFIG.10), the segmenting step R4(seeFIG.11), the evaluation step R5(seeFIG.12) and the pickup step R8(seeFIG.15). The film-isolating step R6(seeFIG.13) is a step of separating the suction table90and the film1for component manufacture from each other in a state in which the adherend (the array-shaped electronic device50or the electronic component51) is bonded to the film1for component manufacture. In the present method, since the above-mentioned film1for component manufacture is used, the surface of one side11aof the base layer11on which the adhesive layer12is not provided satisfies 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15, and this film-separating step R6can be easily and stably carried out. This film-isolating step R6(seeFIG.13) can be performed, for example, between the evaluation step R5(seeFIG.12) and the pickup step R8(seeFIG.15). That is, this is a process required when changing the table (such as the suction table90) on which the film1for component manufacture is placed. In the present manufacturing method, other steps may be included other than the evaluation step R3(seeFIG.10), the segmenting step R4(seeFIG.11), the evaluation step R5(seeFIG.12), the film-isolating step R6(seeFIG.13) and the pickup step R8(seeFIG.15). Examples of other steps include the component-isolating step R7(seeFIG.14). The component-isolating step R7(seeFIG.14) is a step of isolating the segmented electronic components51on the film1for component manufacture by stretching the film1for component manufacture. Stretching of the film1for component manufacture can be performed while abutting a stopper91against the inside of the frame7. EXAMPLES Hereinafter, the present invention will be specifically described by way of examples. [1] Base Layer for Film for Component Manufacture In order to manufacture a film for component manufacture, a base layer using various resins was prepared. Specifically, as a base layer11, films for a base layer were prepared which were obtained by processing films of various resins, which will be described later, so as to have having a surface roughness in a predetermined range by each of a mirror finishing roll (1), a mirror finishing roll (2), a satin finishing roll (1), a satin finishing roll (2), a satin finishing roll (3), sandblast processing, and a satin finishing roll (4). An arithmetic average roughness (Ra) and a maximum height (Rz) of each film serving as each base layer by each processing were measured with a small surface roughness tester (SJ-210, manufactured by Mitutoyo Corporation) in accordance with ISO 4287-1997. In this case, the reference length was 4.0 mm, the speed was 0.5 mm/s, and the cutoff was 0.8 mm. As a result, the surface roughness by each processing is as follows.Mirror finishing roll (1): Ra: 0.01 to 0.05, Rz: 0.35 to 0.55Mirror finishing roll (2): Ra: 0.05 to 0.15, Rz: 0.60 to 0.70Satin finishing roll (1): Ra: 0.20 to 0.35, Rz: 2.50 to 2.80Satin finishing roll (2): Ra: 0.20 to 0.40, Rz: 3.00 to 3.20Satin finishing roll (3): Ra: 0.50 to 0.70, Rz: 4.30 to 4.45Sandblast processing: Ra: 0.55 to 0.70, Rz: 6.00 to 7.00Satin finishing roll (4): Ra: 1.5, Rz: 10.7 [2] Manufacture of Film for Component Manufacture Experiment Example 1 (1) Base Layer As the base layer11, 6 types (excluding satin finishing roll (4)) of films which were polyester-based thermoplastic elastomer (TPEE) films (melting point 200° C.) having a thickness of 80 μm and differ in the above-mentioned surface roughness, were used. Using a film by the mirror finishing roll (1), a tensile elastic modulus E was measured by a dynamic viscoelasticity measurement device (DMA: Dynamic Mechanical Analysis) (product name: RSA-3, manufactured by TA Instruments Co.). Specifically, a sample size was set to a width of 10 mm, a distance between chucks was set to 20 mm, and measurement was carried out from −50° C. to 200° C. under the conditions of a frequency of 1 Hz and a temperature raising rate of 5° C./min, and the tensile elastic modulus at each temperature was read from the resulting data. As a result, the tensile elastic modulus E′(−40) was 440 MPa, the tensile elastic modulus E′(25) was 95 MPa, the tensile elastic modulus E′(100) was 38 MPa, and the tensile elastic modulus E′(160) was 12 MPa. Accordingly, RE1(=E′(100)/E′(25)) was 0.40, and RE2(=E′(160)/E′(−40)) was 0.03. (2) Adhesive Layer As an adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm was used. (3) Lamination of Adhesive Layer on Base Layer The adhesive layer12of the above (2) was laminated on one side of each of 6 types of the base layers11described in the above (1) to obtain the film1for component manufacture of Experiment Examples 1-1 to 1-6. Using the obtained film1for component manufacture of Experiment Example 1, the adhesive strength was measured in accordance with JIS Z 0237 by the following method. That is, the obtained film for component manufacture (the film processed by the mirror finishing roll (1)) was made into a test piece of 25 mm in width, and the adhesive layer12was pasted on a 4 inch silicon wafer while applying pressure with a rubber roll of about 2 kg. Then, the test piece was left standing for 60 minutes in an environment of a temperature of 23° C. and a relative humidity of 50%. Thereafter, an adhesive force at the time when the test piece was peeled off from the silicon wafer at a peeling speed of 300 mm/min in a direction of 180°, was measured. The measurement of the adhesive force was performed twice, and an average value thereof was taken as “adhesive force” (N/25 mm). As a result of this, the adhesive force of the film for component manufacture of Experiment Example 1 was 1.2 N/25 mm. Experiment Example 2 As the base layer11, 6 types (excluding satin finishing roll (4)) of films which were the same polyester-based thermoplastic elastomer films (melting point 200° C.) as in Experiment Example 1 except for having a thickness of 150 μm and differ in the above-mentioned surface roughness, were used. As the adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm which was similar to that of Example 1, was used. As with Experiment Example 1, the adhesive layer12was laminated on the base layer11to obtain films1for component manufacture of Experiment Examples 2-1 to 2-6. Using each of the obtained films for component manufacture of Experiment Example 2, the adhesive force was measured in the same manner as in Experiment Example 1, and consequently, the adhesive force was 1.2 N/25 mm. Experiment Example 3 As the base layer11, 6 types (excluding satin finishing roll (4)) of films which were nylon-based thermoplastic elastomer (TPAE) films (melting point 160° C.) having a thickness of 150 μm and differ in the above-mentioned surface roughness, were used. Using each of the base layers11(films processed by a mirror finishing roll (1)), measurement was carried out in the same manner as in Experiment Example 1, and consequently, the tensile elastic modulus E′(−40) was 280 MPa, the tensile elastic modulus E′(25) was 72 MPa, the tensile elastic modulus E′(100) was 24 MPa, and the tensile elastic modulus E′(160) was 0.27 MPa. Accordingly, RE1(=E′(100)/E′(25)) was 0.34, and RE2(=E′(160)/E′(−40)) was 0.001. As the adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm which was similar to that of Example 1, was used. As with Experiment Example 1, the adhesive layer12was laminated on the base layer11to obtain films1for component manufacture of Experiment Examples 3-1 to 3-6. Using each of the obtained films for component manufacture of Experiment Example 3, the adhesive force was measured in the same manner as in Experiment Example 1, and consequently, the adhesive force was 1.2 N/25 mm. Experiment Example 4 As the base layer11, 6 types (excluding satin finishing roll (4)) of films which were polyethylene terephthalate (PET) films (melting point 263° C.) having a thickness of 75 μm and differ in the above-mentioned surface roughness, were used. Using each of the base layers11(films processed by a mirror finishing roll (1)), measurement was carried out in the same manner as in Experiment Example 1, and consequently, the tensile elastic modulus E′(−40) was 4000 MPa, the tensile elastic modulus E′(25) was 3000 MPa, the tensile elastic modulus E′(100) was 2150 MPa, and the tensile elastic modulus E′(160) was 550 MPa. Accordingly, RE1(=E′(100)/E′(25)) was 0.72, and RE2(=E′(160)/E′(−40)) was 0.14. As the adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm which was similar to that of Example 1, was used. As with Experiment Example 1, the adhesive layer12was laminated on the base layer11to obtain films1for component manufacture of Experiment Examples 4-1 to 4-6. Using each of the obtained films for component manufacture of Experiment Example 4, the adhesive force was measured in the same manner as in Experiment Example 1, and consequently, the adhesive force was 1.2 N/25 mm. Experiment Example 5 As the base layer11, seven types of films which were polybutylene terephthalate (PBT) films (melting point 220° C.) having a thickness of 75 μm and differ in the above-mentioned surface roughness, were used. Using each of the base layers11(films processed by a mirror finishing roll (1)), measurement was carried out in the same manner as in Experiment Example 1, and consequently, the tensile elastic modulus E′(−40) was 1500 MPa, the tensile elastic modulus E′(25) was 550 MPa, the tensile elastic modulus E′(100) was 138 MPa, and the tensile elastic modulus E′(160) was 90 MPa. Accordingly, RE1(=E′(100)/E′(25)) was 0.25, and RE2(=E′(160)/E′(−40)) was 0.06. As the adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm which was similar to that of Example 1, was used. As with Experiment Example 1, the adhesive layer12was laminated on the base layer11to obtain films1for component manufacture of Experiment Examples 5-1 to 5-7. Using each of the obtained films for component manufacture of Experiment Example 5, the adhesive force was measured in the same manner as in Experiment Example 1, and consequently, the adhesive force was 1.2 N/25 mm. Experiment Example 6 As the base layer11, 6 types (excluding satin finishing roll (4)) of films which were random polypropylene (rPP) films (melting point 138° C.) having a thickness of 80 μm and differ in the above-mentioned surface roughness, were used. Using each of the base layers11(films processed by a mirror finishing roll (1)), measurement was carried out in the same manner as in Experiment Example 1, and consequently, the tensile elastic modulus E′(−40) was 1500 MPa, the tensile elastic modulus E′(25) was 775 MPa, and the tensile elastic modulus E′(100) was 81 MPa. In addition, the tensile elastic modulus E′(160) was unmeasurable due to break. Accordingly, RE1(=E′(100)/E′(25)) was 0.10, and RE2(=E′(160)/E′(−40)) was less than 0.01. As the adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm which was similar to that of Example 1, was used. As with Experiment Example 1, the adhesive layer12was laminated on the base layer11to obtain films1for component manufacture of Experiment Examples 6-1 to 6-6. Using each of the obtained films for component manufacture of Experiment Example 6, the adhesive force was measured in the same manner as in Experiment Example 1, and consequently, the adhesive force was 1.2 N/25 mm. Experiment Example 7 As the base layer11, 6 types (excluding satin finishing roll (4)) of films which were linear low density polyethylene (LLDPE) films (melting point 116° C.) having a thickness of 80 μm and differ in the above-mentioned surface roughness, were used. Using each of the base layers11(films processed by a mirror finishing roll (1)), measurement was carried out in the same manner as in Experiment Example 1, and consequently, the tensile elastic modulus E′(−40) was 520 MPa, the tensile elastic modulus E′(25) was 118 MPa, and the tensile elastic modulus E′(100) was 12 MPa. In addition, the tensile elastic modulus E′(160) was unmeasurable due to break. Accordingly, RE1(=E′(100)/E′(25)) was 0.10, and RE2(=E′(160)/E′(−40)) was less than 0.01. As the adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm which was similar to that of Example 1, was used. As with Experiment Example 1, the adhesive layer12was laminated on the base layer11to obtain films1for component manufacture of Experiment Examples 7-1 to 7-6. Using each of the obtained films for component manufacture of Experiment Example 7, the adhesive force was measured in the same manner as in Experiment Example 1, and consequently, the adhesive force was 1.2 N/25 mm. Experiment Example 8 As the base layer11, seven types of films which were polyester-based thermoplastic elastomer (TPEE) films (melting point 199° C.) having a thickness of 120 μm and differ in the above-mentioned surface roughness, were used. Using each of the base layers11(films processed by a mirror finishing roll (1)), measurement was carried out in the same manner as in Experiment Example 1, and consequently, the tensile elastic modulus E′(−40) was 374 MPa, the tensile elastic modulus E′(25) was 56 MPa, the tensile elastic modulus E′(100) was 32 MPa, and the tensile elastic modulus E′(160) was 8.5 MPa. Accordingly, RE1(=E′(100)/E′(25)) was 0.6, and RE2(=E′(160)/E′(−40)) was 0.02. As the adhesive layer12, a non-curable acrylic adhesive agent having a thickness of 10 μm which was similar to that of Example 1, was used. As with Experiment Example 1, the adhesive layer12was laminated on the base layer11to obtain films1for component manufacture of Experiment Examples 8-1 to 8-7. Using each of the obtained films for component manufacture of Experiment Example 8, the adhesive force was measured in the same manner as in Experiment Example 1, and consequently, the adhesive force was 1.2 N/25 mm. TABLE 1Experimental Examples12345678BaseResinTPEETPEETPAEPETPBTr PPLLDPETPEELayerThickness (μm)8015015075758080120E′(25) (Mpa)959572300055077511856E′(100) (Mpa)3838242150138811232RE10.40.40.340.720.250.10.10.6E′(−40) (Mpa)440440280400015001500520374E′(160) (Mpa)12120.2755090breakbreak8.5RE20.030.030.0010.140.06≤0.01≤0.010.02Melting Point (° C.)200200160263220138116199 [2] Test Using Film for Component Manufacture The following test was carried out using Experiment Examples 1 to 8. That is, each film1for component manufacture of Experiment Examples 1 to 8 (each 6 to 7 types) obtained in the above [1] was bonded to a metal frame7so as to cover an opening71of the frame7by bonding the adhesive layer12of each film1for component manufacture to one side of a frame body7ato form a protecting member15(FIG.2). Further, simultaneously with the formation of the protecting member15, a 4 inch size silicon wafer was bonded to the adhesive layer12side. Thereafter, the one surface11aside of the base layer11of the protecting member15to which each film1for component manufacture was bonded was suctioned and fixed to an suction table set at each temperature (table surface temperature: 25° C., 75° C., 100° C., 160° C.). After lapse of 10 minutes, vacuum break was carried out, and each film1for component manufacture was removed from a wafer table by grasping the frame7. In doing so, ease of removal from the wafer table was rated according the following criteria, and the result of rating was shown in Tables 2 to 5. “◯” . . . Film1could be removed regardless of the surface temperature of the suction table. “Δ” . . . Film1could not be removed without waiting for the surface temperature of the suction table to fall, but it was able to be removed by the surface temperature drop. “×” Even when the surface temperature of the suction table reached 25° C., it was difficult to remove. The suction table used in this test is made of metal, and its surface roughness Ra is 0.48 μm and Rz is 2.64 μm. The measurement method is the same as in the case of the above-described film. TABLE 2Test Temperature 25° C.MirrorMirrorSandSurface 1Surface 2Satin 1Satin 2Satin 3BlastSatin 4Ra (μm)0.01~0.05~0.20~0.20~0.50~0.55~0.050.150.350.400.700.701.5Rz (μm)Experimental0.35~0.60~2.50~3.00~4.30~6.00~Examples0.550.702.803.204.457.0010.71RE1= 0.4RE2= 0.03(1-1)(1-2)(1-3)(1-4)(1-5)(1-6)—xx∘∘∘∘2RE1= 0.4RE2= 0.03(2-1)(2-2)(2-3)(2-4)(2-5)(2-6)xx∘∘∘∘3RE1= 0.34RE2= 0.001(3-1)(3-2)(3-3)(3-4)(3-5)(3-6)xx∘∘∘∘4RE1= 0.72RE2= 0.14(4-1)(4-2)(4-3)(4-4)(4-5)(4-6)xx∘∘∘∘5RE1= 0.25RE2= 0.06(5-1)(5-2)(5-3)(5-4)(5-5)(5-6)(5-7)xx∘∘∘∘∘6RE1= 0.1RE2≤ 0.01(6-1)(6-2)(6-3)(6-4)(6-5)(6-6)—xx∘∘∘∘7RE1= 0.1RE2≤ 0.01(7-1)(7-2)(7-3)(7-4)(7-5)(7-6)xx∘∘∘∘8RE1= 0.6RE2= 0.02(8-1)(8-2)(8-3)(8-4)(8-5)(8-6)(8-7)xx∘∘∘∘∘ TABLE 3Test Temperature 75° C.MirrorMirrorSandSurface 1Surface 2Satin 1Satin 2Satin 3BlastSatin 4Ra (μm)0.01~0.05~0.20~0.20~0.50~0.55~0.050.1.50.350.400.700.701.5Rz (μm)Experimental0.35~0.60~2.50~3.00~4.30~6.00~Examples0.550.702.803.204.457.0010.71RE1= 0.4RE2= 0.03(1-1)(1-2)(1-3)(1-4)(1-5)(1-6)—xx∘∘∘∘2RE1= 0.4RE2= 0.03(2-1)(2-2)(2-3)(2-4)(2-5)(2-6)xx∘∘∘∘3RE1= 0.34RE2= 0.001(3-1)(3-2)(3-3)(3-4)(3-5)(3-6)xx∘∘∘∘4RE1= 0.72RE2= 0.14(4-1)(4-2)(4-3)(4-4)(4-5)(4-6)xx∘∘∘∘5RE1= 0.25RE2= 0.06(5-1)(5-2)(5-3)(5-4)(5-5)(5-6)(5-7)xx∘∘∘∘∘6RE1= 0.1RE2≤ 0.01(6-1)(6-2)(6-3)(6-4)(6-5)(6-6)—xxΔΔΔΔ7RE1= 0.1RE2≤ 0.01(7-1)(7-2)(7-3)(7-4)(7-5)(7-6)xxΔΔΔΔ8RE1= 0.6RE2= 0.02(8-1)(8-2)(8-3)(8-4)(8-5)(8-6)(8-7)xx∘∘∘∘∘ TABLE 4Test Temperature 100° C.MirrorMirrorSandSurface 1Surface 2Satin 1Satin 2Satin 3BlastSatin 4Ra (μm)0.01~0.05~0.20~0.20~0.50~0.55~0.050.150.350.400.700.701.5Rz (μm)Experimental0.35~0.60~2.50~3.00~4.30~6.00~Examples0.550.702.803.204.457.0010.71RE1= 0.4RE2= 0.03(1-1)(1-2)(1-3)(1-4)(1-5)(1-6)—xx∘∘∘∘2RE1= 0.4RE2= 0.03(2-1)(2-2)(2-3)(2-4)(2-5)(2-6)xx∘∘∘∘3RE1= 0.34RE2= 0.001(3-1)(3-2)(3-3)(3-4)(3-5)(3-6)xx∘∘∘∘4RE1= 0.72RE1= 0.14(4-1)(4-2)(4-3)(4-4)(4-5)(4-6)xx∘∘∘∘5RE1= 0.25RE2= 0.06(5-1)(5-2)(5-3)(5-4)(5-5)(5-6)(5-7)xx∘∘∘∘∘8RE1= 0.6RE2= 0.02(8-1)(8-2)(8-3)(8-4)(8-5)(8-6)(8-7)xx∘∘∘∘∘ TABLE 5Test Temperature 160° C.MirrorMirrorSandSurface 1Surface 2Satin 1Satin 2Satin 3BlastSatin 4Ra (μm)0.01~0.05~0.20~0.20~0.50~0.55~0.050.150.350.400.700.701.5Rz (μm)Experimental0.35~0.60~2.50~3.00~4.30~6.00~Examples0.550.702.803.204.457.0010.71RE1= 0.4RE2= 0.03(1-1)(1-2)(1-3)(1-4)(1-5)(1-6)—xx∘∘∘∘2RE1= 0.4RE2= 0.03(2-1)(2-2)(2-3)(2-4)(2-5)(2-6)xx∘∘∘∘3RE1= 0.34RE2= 0.001(3-1)(3-2)(3-3)(3-4)(3-5)(3-6)xxΔΔΔΔ4RE1= 0.72RE1= 0.14(4-1)(4-2)(4-3)(4-4)(4-5)(4-6)xx∘∘∘∘5RE1= 0.25RE2= 0.06(5-1)(5-2)(5-3)(5-4)(5-5)(5-6)(5-7)xx∘∘∘∘∘8RE1= 0.6RE2= 0.02(8-1)(8-2)(8-3)(8-4)(8-5)(8-6)(8-7)xx∘∘∘∘∘ [3] Effect of Examples As shown in Table 2, films for component manufacture in which the surface roughness on one surface11aside of the base layer11is 0.01≤Ra (μm)≤0.05 and 0.35≤Rz (μm)≤0.55 (Experiment Examples 1-1, 2-1, 3-1, 4-1, 5-1, 6-1, 7-1, 8-1) were difficult to remove even when the surface temperature of the suction table was 25° C., irrespective of the material constituting the base layer11. In addition, films for component manufacture in which the surface roughness is 0.05≤Ra (μm)≤0.15 and 0.60≤Rz (μm)≤0.70 (Experiment Examples 1-2, 2-2, 3-2, 4-2, 5-2, 6-2, 7-2, 8-2) were difficult to remove even when the surface temperature of the suction table was 25° C., irrespective of the material constituting the base layer11. On the other hand, films1for component manufacture having surface roughness of 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15 could be easily removed from the suction table with the surface temperature of 25° C. As shown in Table 3, even when the surface roughness on the one surface11aside of the base layer11of the film1for component manufacture is 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15, in Experiment Examples 6 (Experiment Examples 6-1 to 6-6) and Experiment Examples 7 (Experiment Examples 7-1 to 7-6) in which the RE1of the base layer was 0.10, it was difficult to remove the film without waiting for the surface temperature of the suction table to fall after the test (75° C.), but it was possible to remove the film by drop of the surface temperature of the suction table. In contrast to this, films1for component manufacture in which the surface roughness on one surface11aside of the base layer11of the film1for component manufacture is 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15 and in which the RE1of the base layer is 0.2≤RE1≤1 and E′(25) is 35 MPa or more and 3500 MPa or less, could be easily removed from the suction table with the surface temperature of 75° C. As shown in Table 4, films1for component manufacture in which the surface roughness on one surface11aside of the base layer11of the film1for component manufacture is 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15 and in which the RE2of the base layer is 0.01≤RE2≤1, could be easily removed from the suction table even in a state in which the surface temperature is 100° C. As shown in Table 5, even when the surface roughness on the one surface11aside of the base layer11of the film1for component manufacture is 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15, in Experiment Examples 3 (Experiment Examples 3-1 to 3-6) in which the RE2of the base layer was 0.001, it was difficult to remove the film without waiting for the surface temperature of the suction table to fall after the test (160° C.), but it was possible to remove the film by drop of the surface temperature of the suction table. On the other hand, films1for component manufacture in which the surface roughness on one surface11aside of the base layer11of the film1for component manufacture is 0.1≤Ra (μm)≤2.0 and 1.0≤Rz (μm)≤15 and in which the RE2of the base layer is 0.01≤RE2≤1, could be easily removed from the suction table even in a state in which the surface temperature is 160° C. In addition, in the present invention, the invention is not limited to the above-mentioned specific embodiments, and widely different embodiments of this invention may be made within the scope of the invention according to the object and the use of the invention. INDUSTRIAL APPLICABILITY The film for manufacturing semiconductor component, the method for manufacturing a semiconductor component, the film for electronic component manufacture, and the method for manufacturing an electronic component of the present invention are widely used in uses of semiconductor component manufacture and electronic component manufacture. Particularly, these films and manufacturing methods of the present invention are suitably used in manufacturing components with excellent productivity since when using the method for manufacturing a semiconductor component or the method for manufacturing an electronic component respectively including an evaluation step accompanied by a change in temperature, a segmenting step and a pickup step, these films can be used commonly in these steps. REFERENCE SIGNS LIST 1; Film for manufacturing semiconductor component, film for electronic component manufacture15; Protecting member11; Base Layer12; Adhesive Layer12a; Surface of an adhesive layer (surface of an adhesive layer12that is exposed via an opening71)20; Semiconductor wafer21; Semiconductor component30; Sealing material50; Array-shaped electronic component51; Electronic component7; Frame7a; One side of a frame71; Opening of a frame8; Probe card81; Probe90; Suction table91; Stopper92; Pushing-up member93; Pickup instrumentR1; Protecting member forming stepR2; Bonding stepR3; Evaluation step (semiconductor wafer evaluation step, array-shaped electronic component evaluation step)R4; Segmenting stepR5; Evaluation step (semiconductor component evaluation step, electronic component evaluation step)R6; Film-isolating stepR7; Component-isolating stepR8; Pickup step | 89,225 |
11942350 | DESCRIPTION OF EMBODIMENTS In the following, embodiments will be described by referring to the accompanying drawings. In the drawings, the same elements are referred to by the same references, and a duplicate description thereof may be omitted. FIG.1is a cross-sectional view providing a schematic illustration of a substrate holding device according to an embodiment. As illustrated inFIG.1, a substrate holding device1includes a baseplate10, an adhesive layer20, and an electrostatic chuck30as main components. The baseplate10serves to support the electrostatic chuck30. The thickness of the baseplate10may approximately be in a range of 20 mm to 40 mm, for example. The baseplate10may be made of aluminum, for example, which may also serve as an electrode or the like for controlling plasma. Supplying a predetermined high-frequency electric power to the baseplate10enables the control of energy with which generated plasma ions impact a wafer held on the electrostatic chuck30, thereby achieving an efficient etching process. The baseplate10has a gas supply section11provided therein that supplies a gas for cooling a wafer held on the electrostatic chuck30. The gas supply section11includes a gas passage111, a gas injecting section112, and gas ejecting sections113. The gas passage111is a hole formed in a ring shape inside the baseplate10, for example. The gas injecting section112is a hole whose one end communicates with the gas passage111and whose opposite end is an opening situated at a lower surface10bof the baseplate10. Through the gas injecting section112, an inert gas (e.g., He, Ar, or the like) is introduced into the gas passage111from the outside of the substrate holding device1. The gas ejecting sections113are holes, each of which has one end thereof communicating with the gas passage111and the other end thereof being an opening situated at an upper surface10aof the baseplate10and connected to a hole extending through the adhesive layer20. The gas ejecting sections113discharge the inert gas introduced into the gas passage111. The gas ejecting sections113are scattered across the upper surface10aof the baseplate10in a plan view. The number of gas ejecting sections113, which can properly be determined according to need, may approximately be few tens to few hundreds, for example. A plan view refers to a view of an object taken in the direction perpendicular to a support surface31aof a base31, and a plane shape refers to the shape of an object as viewed in the direction perpendicular to the support surface31aof the base31. The baseplate10has a cooling mechanism15provided therein, for example. The cooling mechanism15includes a coolant passage151, a coolant introducing section152, and a coolant discharging section153. The coolant passage151is a hole formed in a ring shape inside the baseplate10, for example. The coolant introducing section152is a hole whose one end communicates with the coolant passage151and whose opposite end is an opening situated at the lower surface10bof the baseplate10. Through the coolant introducing section152, coolant (e.g., coolant water, Galden, or the like) is introduced into the coolant passage151from the outside of the substrate holding device1. The coolant discharging section153is a hole whose one end communicates with the coolant passage151and whose opposite end is an opening situated at the lower surface10bof the baseplate10. The coolant discharging section153discharges the coolant introduced into the coolant passage151. The cooling mechanism15is connected to a coolant control apparatus (not shown) provided outside the substrate holding device1. The coolant control apparatus (not shown) feeds coolant into the coolant passage151through the coolant introducing section152, and receives the coolant discharged from the coolant discharging section153. Circulating the coolant through the cooling mechanism15to cool the baseplate10causes a wafer held on the electrostatic chuck30to be cooled. The electrostatic chuck30serves to attract and hold a wafer, which is an object to be held. The plane shape of the electrostatic chuck30may be circular, for example. The diameter of the wafer that is an object to be held by the electrostatic chuck30may be 8, 12, or, 18 inches, for example. The electrostatic chuck30is disposed on the upper surface10aof the baseplate10through the adhesive layer20. A silicone-based adhesive, for example, may be used as the adhesive layer20. The thickness of the adhesive layer20is approximately in a range of 0.1 mm to 1.0 mm, for example. The adhesive layer20bonds the baseplate10to the electrostatic chuck30and reduces the stress caused by the difference in thermal expansion coefficients between the ceramic electrostatic chuck30and the aluminum baseplate10. The electrostatic chuck30includes the base31and an electrostatic electrode32. The upper surface of the base31is the support surface31afor supporting an object to be held. The electrostatic chuck30may be a Johnsen-Rahbeck electrostatic chuck. The electrostatic chuck30may alternatively be a Coulomb-type electrostatic chuck. The base31is made of a dielectric material, which may be a ceramic such as aluminum oxide (Al2O3), aluminum nitride (AlN), or the like. The base31may contain, as auxiliary agent, oxides of two or more elements selected from silicon (Si), magnesium (Mg), calcium (Ca), aluminum (Al), and yttrium (Y), for example. The thickness of the base31may approximately be in a range of 5 mm to 10 mm. The relative permittivity of the base31at 1 kHz may approximately be in a range of 9 to 10. The electrostatic electrode32is a thin-film electrode that is embedded in the base31. The electrostatic electrode32is coupled to a power supply (not shown) provided separately from the substrate holding device1. Upon receiving a predetermined voltage from the power supply, the electrostatic electrode32generates an electrostatic-based attracting force with respect to a wafer. This causes the wafer to be attracted to and held on the support surface31aof the base31of the electrostatic chuck30. The attracting force increases as the voltage applied to the electrostatic electrode32increases. The electrostatic electrode32may have either a monopole structure or a dipole structure. Tungsten, molybdenum, or the like may be used as the material of the electrostatic electrode32. A heating element may be provided inside the base31to generate heat by receiving voltage from outside the substrate holding device1to thereby increase the temperature of the support surface31aof the base31to a predetermined temperature. Gas holes33, which are through holes extending through the base31to expose the ends of the gas ejecting sections113, are provided at the positions corresponding to the positions of the gas ejecting sections113of the base31. The gas holes33communicate with the gas supply section11, so that a gas is supplied to the support surface31avia the gas supply section11and the gas holes33. The gas holes33have a porous material60disposed therein. The porous material60contains angular ceramic particles and mixed oxides that bond and integrate the angular ceramic particles. FIG.2is an SEM (scanning electron microscope) image of coarse alumina particles presented as an example of angular ceramic particles. As illustrated inFIG.2, unlike a spherical ceramic particle, an angular ceramic particle has at least one sharp point, and is a polyhedron-like structure whose overall shape is angular. As the angular ceramic particles, a material used as an abrasive powder in the semiconductor manufacturing process and having an appropriate particle size distribution or the like may be used, for example. A preferred example of angular ceramic particles is coarse alumina particles. As an alternative to alumina particles, a high-melting point inorganic material, such as zirconium dioxide (ZrO2) or silicon carbide (SiC), may be used. The particle size of angular ceramic particles is preferably greater than or equal to 10 μm and less than or equal to 100 μm, and more preferably greater than or equal to 10 μm and less than or equal to 50 μm. In the example illustrated inFIG.2, the average particle size of angular ceramic particles is approximately 30 μm. The particle size of an angular ceramic particle refers to the length of the longest length of the particle. Preferably, the angular ceramic particles contained in the porous material60account for a weight ratio of greater than or equal to 80 wt % and less than or equal to 97 wt %. Mixed oxides adhere to a portion of the outer surface of angular ceramic particles to support them. The mixed oxides are comprised of oxides of two or more elements selected from silicon (Si), magnesium (Mg), calcium (Ca), aluminum (Al), and yttrium (Y), for example. Pores are formed inside the porous material60. The pores communicate with the outside, so that a gas can pass from the lower side of the porous material60to the upper side thereof. The porosity of pores formed in the porous material60is preferably in a range of 20% to 50% of the total cubic volume of the porous material60. The inner surface of the pores is constituted by portions of the outer surfaces of angular ceramic particles and the mixed oxides. In the case in which the base31is formed of aluminum oxide, the base31preferably contains oxides of two or more elements selected from silicon, magnesium, calcium, and yttrium as additional components. The composition ratio of oxides of two or more elements selected from silicon, magnesium, calcium, and yttrium contained in the base31is preferably set equal to the composition ratio of oxides of two or more elements selected from silicon, magnesium, calcium, and yttrium contained as the mixed oxides in the porous material60. Use of the same composition ratio of oxides for both the base31and the mixed oxides of the porous material60ensures that no intermixing of elements occurs at the time of sintering the porous material60, thereby making it possible to secure the planarity of the interface between the base31and the porous material60. Further, the resultant thermal expansion coefficients of the base31and the porous material60are comparable to each other, so that damage caused by stress or the like can be avoided. [Method of Making Substrate Holding Device] FIGS.3A through3CandFIGS.4A through4Care drawings illustrating examples of the process steps of making the substrate holding device of the present embodiment. These figures illustrate the base31and the like ofFIG.1in a simplified fashion. In the following, the process steps and the like of forming the gas holes33and the porous material60in the electrostatic chuck30will mainly be described with reference toFIGS.3A through3CandFIGS.4A through4C. As illustrated inFIG.3A, the base31having the electrostatic electrode32(not shown inFIG.3A) embedded therein may be produced by a conventional manufacturing procedure including a step of forming vias through a green sheet, a step of filling the vias with conductive paste, a step of forming a pattern to become an electrostatic electrode, a step of laminating another green sheet over the noted green sheet for calcination, and a step of planarizing the surfaces. Then, as illustrated inFIG.3B, gas holes33extending through the base31are formed. The gas holes33may be made by drilling, for example. As Illustrated inFIG.3C, the base31is disposed on a stage100with a release sheet (not shown) intervening therebetween. A paste60a, which is the precursor of the porous material60, is prepared. A squeegee110is moved horizontally to sweep the paste60a, thereby filling the gas holes33of the base31with the paste60a. In so doing, pressure may be applied to the paste60ato increase the amount of injection. The paste60a, which is the precursor of the porous material60, contains angular ceramic particles at a predetermined weight ratio, for example. The rest of the paste60acontains oxides of two or more elements selected from silicon, magnesium, calcium, aluminum, and yttrium, as well as an organic binder and a solvent, for example. As the organic binder, polyvinyl butyral may be used, for example. An alcohol, for example, may be used as the solvent. FIG.4Aillustrates the result of the above-noted arrangement, in which the paste60ahas been injected into the gas holes33of the base31. The base31has already been sintered, so that there is no risk of contraction or the like occurring in the subsequent sintering process that would change the size or position of the gas holes33. Further, even in the case in which the diameter of the gas holes33is as small as 3 mm or less, the gas holes33can be easily filled with the paste60a. As illustrated inFIG.4B, the paste60ais sintered at a temperature of approximately 1400° C., which is approximately 100° C. lower than the sintering temperature of the base31, thereby forming the porous material60in the gas holes33of the base31. The composition ratio of any of silicon, magnesium, calcium, and yttrium is set to be the same for the base31and the mixed oxides of the paste60a. With this arrangement, the sintering process does not cause the intermixing of elements between the base31and the paste60a, thereby making it possible to ensure the planarity of the interface between the inner wall of the gas holes33of the base31and the porous material60. The porous material60protrudes upwardly from the upper end of the gas holes33of the base31. As illustrated inFIG.4C, the upper surfaces of the base31and the porous material60are subjected to surface grinding, which makes the upper surface of the base31and the upper surface of the porous material60flat and flush with each other. If necessary, surface grinding may also be applied to the lower surfaces of the base31and the porous material60. Through the process steps described above, the structure in which the porous material60is disposed in the gas holes33of the base31is obtained. Subsequently, the baseplate10having the cooling mechanism15and the like provided therein is arranged, and an adhesive layer20(uncured) is formed on the baseplate10. The base31illustrated inFIG.4Cis then placed on the baseplate10with the adhesive layer20intervening therebetween, followed by curing the adhesive layer20. With the process steps described above, the substrate holding device1illustrated inFIG.1is completed in final form. In the following, the advantages of the substrate holding device1will be described by referring to a comparative example.FIG.5Ais an SEM image of a comparative example structure which is made by injecting spherical ceramic particles into a gas hole.FIG.5Bis an SEM image of a gas-hole structure of the first embodiment which is made by injecting angular ceramic particles into a gas hole. Comparison ofFIG.5AandFIG.5Breveals that, despite discrepancies in size, the amount of spaces is clearly smaller inFIG.5Bthan inFIG.5A. As is shown, filling a gas hole with angular ceramic particles reduces the overall volume of spaces compared with the use of spherical ceramic particles. In the case of a hollow structure without spherical ceramic particles or angular ceramic particles injected into gas holes, exposure of the electrostatic chuck to a dense plasma environment causes an abnormal discharge to be triggered in the gas holes, which results in damage to a wafer mounted on the base and to the electrostatic chuck. Abnormal discharge can be mitigated to some extent by filling the gas holes with spherical ceramic particles, but the use of spherical ceramic particles do not sufficiently reduce the total volume of spaces in the gas holes due to the nature of their spherical shape. In contrast, filling the gas holes with angular ceramic particles significantly reduces the overall volume of spaces as illustrated inFIG.5Bbecause angular ceramic particles tend to come closer to each other than spherical ceramic particles do. Consequently, abnormal discharge is significantly reduced. If there is no space in a gas hole, a gas cannot pass through the gas hole, which thus fails to achieve its intended purpose. However, a gas hole filled with angular ceramic particles still have a proper amount of spaces, and thus properly functions as a gas passage.FIG.6illustrates the results of an experiment in which the relationship between the diameter of a gas hole and the gas flow rate was measured. 18 gas holes with a diameter of 1 mm were formed through a base. Each gas hole was filled with angular ceramic particles having an average particle size of approximately 30 μm. The flow rate of a gas flowing through each gas hole was measured. Further, 18 gas holes with a diameter of 2 mm were formed through a base. Each gas hole was filled with angular ceramic particles having an average particle size of approximately 30 μm. The flow rate of a gas flowing through each gas hole was measured. As illustrated inFIG.6, with the gas holes having a diameter of 1 mm, the gas flow rate was approximately 3 sccm on average. With the gas holes having a diameter of 2 mm, the gas flow rate was approximately 10 sccm on average. Both figures are satisfactory as the gas flow rate of a gas hole used in an electrostatic chuck. Further, because there is a correlation between the diameter of a gas hole and the gas flow rate, it is easy to design a gas hole achieving a desired gas flow rate. According to at least one embodiment, the likelihood of abnormal electrical discharge at an electrostatic chuck is further reduced. The object to be held on the substrate holding device is not limited to a semiconductor wafer (i.e., silicon wafer or the like), and may as well be a glass substrate or the like that is used in the process of manufacturing a liquid crystal display panel or the like, for example. All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although the embodiment(s) of the present inventions have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the scope of the invention. | 18,513 |
11942351 | In the drawings, reference numbers may be reused to identify similar and/or identical elements. DETAILED DESCRIPTION An ESC holds a substrate during processing of the substrate. The ESC holds the substrate in place using electrostatic force in, for example, a vacuum processing chamber. The ESC may have a two-plate arrangement including a thin top plate (e.g., 1.25 millimeters (mm) thick) formed of a dielectric material (e.g., ceramic) and a bulk (or thick) baseplate. The top plate may include seals, mesas, coolant grooves and an electrode. The seals separate coolant zones between top surfaces of the ESC and the substrate. The substrate is disposed on the seals and the mesas during processing and is held down to the ESC by electrostatic force via the electrode, which electrostatically clamps the substrate on the ESC. Thermal contact between the substrate and the top plate of the ESC is needed in order to modulate a temperature of the substrate during processing. This is true regardless of whether the process being performed includes sinking heat from or sourcing heat into the substrate. A coolant gas (e.g., helium gas) may be contained (i) between contact surfaces of the substrate and the top plate, and (ii) between the seals of the top plate. The seals are disposed between the substrate and the top plate and are an integral part of the top plate. The sealed zones are formed when the substrate is electrostatically clamped on the top plate. The sealed zones are disposed radially between the seals and vertically between the top surface of the top plate and a bottom opposing surface (or backside) of the substrate. Coolant gas leakage may occur between the sealed zones and/or between a radially outermost sealed zone and an interior of the vacuum processing chamber. An amount of coolant gas pressure that may be provided in the sealed zones without an excessive amount of gas leakage is limited by the electrostatic clamping force provided by the electrode and corresponding clamping system. The more clamping force provided to hold the substrate on the top plate of the ESC, the higher the coolant gas pressure that can be provided. Thus, there is a limit to the amount of coolant gas pressure that can be used to affect heat transfer between the substrate and the top plate. Also, parameters such as a heat transfer rate, a pressure of coolant gas, and a distance between a substrate and a top plate of an ESC are related. For example, as the distance decreases, the heat transfer rate increases. However, decreasing the distance causes a decrease in an amount of lateral flow conductance, which can cause pressure non-uniformities between the substrate and the top plate. The resultant pressure changes can result in inadequate heat transfer (i) globally between the substrate and the ESC resulting in elevated substrate temperatures, and/or (ii) locally in areas across a top surface area of the ESC resulting in temperature non-uniformities. Supply and pressure of the coolant gas may be adjusted to provide adequate heat transfer. Coolant gas grooves may be incorporated to aid in uniformly distributing coolant gas to prevent the temperature non-uniformities. Dielectric breakdown and subsequent arcing can occur between coolant gas grooves and electrostatic clamping electrodes if distances between the coolant gas grooves and the electrostatic clamping electrodes are less than a predetermined distance. For example, an ESC having a thin top plate and a clamping electrode disposed near a top surface of the top plate and near one or more coolant gas grooves can experience dielectric breakdown and arcing between the clamping electrode and the coolant gas grooves. Arcing can cause irreparable damage to an ESC and be a source of defects. The examples set forth herein include ESCs with top plates having coolant gas groove patterns and corresponding clamping electrodes that uniformly distribute coolant gas while providing proper separation between coolant gas grooves and clamping electrodes. The coolant gas groove patterns include tree-patterned groove sets that are uniformly distributed across top surfaces of top plates to uniformly distribute coolant gas and properly cool backsides of substrates. The coolant gas grooves promote distribution of the coolant gas across the top plates. The clamping electrodes are monopolar electrodes, where each ESC includes a single non-segmented clamping electrode. The clamping electrodes cover more than a predetermined radial surface area of the ESCs and have respective groove opening patterns. By covering more than a predetermined amount (e.g., more than 95%) of a total top plate/substrate interface surface area, the clamping electrodes provide improved substrate clamping. Clamping force is proportional to surface area of an electrode. The groove opening patterns provide a predetermined amount of space between the clamping electrodes and the coolant gas grooves to prevent dielectric breakdown and arcing. FIG.1shows a substrate processing system100incorporating an ESC101. The ESC101may be configured the same or similarly as any of the ESCs disclosed herein. AlthoughFIG.1shows a capacitive coupled plasma (CCP) system, the embodiments disclosed herein are applicable to transformer coupled plasma (TCP) systems, electron cyclotron resonance (ECR) plasma systems, inductively coupled plasma (ICP) systems and/or other systems and plasma sources that include a substrate support. The embodiments are applicable to PVD processes, PECVD processes, chemically enhanced plasma vapor deposition (CEPVD) processes, ion implantation processes, plasma etching processes, and/or other etch, deposition, and cleaning processes. The ESC101includes a top plate102and a baseplate103. Both of the plates102,103may be formed of ceramic and/or other suitable materials. The plates102,103, other top plates and baseplates, and other features of the disclosed ESCs are further described below with respect to the examples shown inFIGS.1-8. Although the ESCs ofFIGS.1-8are each shown as having certain features and not other features, each of the ESCs may be modified to include any of the features disclosed herein and inFIGS.1-8. The substrate processing system100includes a processing chamber104. The ESC101is enclosed within the processing chamber104. The processing chamber104also encloses other components, such as an upper electrode105, and contains RF plasma. During operation, a substrate107is arranged on and electrostatically clamped to the top plate102of the ESC101. For example only, the upper electrode105may include a showerhead109that introduces and distributes gases. The showerhead109may include a stem portion111including one end connected to a top surface of the processing chamber104. The showerhead109is generally cylindrical and extends radially outward from an opposite end of the stem portion111at a location that is spaced from the top surface of the processing chamber104. A substrate-facing surface or the showerhead109includes holes through which process or purge gas flows. Alternately, the upper electrode105may include a conducting plate and the gases may be introduced in another manner. One or both of the plates102,103may perform as a lower electrode. An intermediate (or bond) layer114is arranged between the plates102,103. The intermediate layer114may bond the top plate102to the baseplate103. As an example, the intermediate layer may be formed of an adhesive material suitable for bonding the top plate102to the baseplate103. The baseplate103may include one or more gas channels115and/or one or more coolant channels116for flowing backside (or coolant) gas to a backside of the substrate107and coolant through the baseplate103. An RF generating system120generates and outputs RF voltages to the upper electrode105and lower electrodes (e.g., one or more electrodes121in the plate103). One of the upper electrode105and the ESC101may be DC grounded, AC grounded or at a floating potential. For example only, the RF generating system120may include one or more RF generators122(e.g., a capacitive coupled plasma RF power generator, a bias RF power generator, and/or other RF power generator) that generate RF voltages, which are fed by one or more matching and distribution networks124to the upper electrode105and/or the ESC101. As an example, a plasma RF generator123, a bias RF generator125, a plasma RF matching network127and a bias RF matching network129are shown. The plasma RF generator123may be a high-power RF generator producing, for example 6-10 kilo-watts (kW) of power or more. The bias RF matching network supplies power to RF electrodes, such as RF electrodes121in the plate103. A gas delivery system130includes one or more gas sources132-1,132-2, . . . , and132-N(collectively gas sources132), where N is an integer greater than zero. The gas sources132supply one or more precursors and gas mixtures thereof. The gas sources132may also supply etch gas, carrier gas and/or purge gas. Vaporized precursor may also be used. The gas sources132are connected by valves134-1,134-2, . . . , and134-N(collectively valves134) and mass flow controllers136-1,136-2, . . . , and136-N(collectively mass flow controllers136) to a manifold140. An output of the manifold140is fed to the processing chamber104. For example only, the output of the manifold140is fed to the showerhead109. The substrate processing system100further includes a cooling system141that includes a temperature controller142. Although shown separately from a system controller160, the temperature controller142may be implemented as part of the system controller160. One or more of the plates102,103may include multiple temperature controlled zones. The temperature controller142and/or the system controller160may control flow rate of backside gas (e.g., helium) to the gas channels115for cooling the substrate by controlling flow from one or more of the gas sources132to the gas channels115. The temperature controller142may also communicate with a coolant assembly146to control flow of a first coolant (pressures and flow rates of a cooling fluid) through the channels116. The first coolant assembly146may receive a cooling fluid from a reservoir (not shown). For example, the coolant assembly146may include a coolant pump and reservoir. The temperature controller142operates the coolant assembly146to flow the coolant through the channels116to cool the baseplate103. The temperature controller142may control the rate at which the coolant flows and a temperature of the coolant. The temperature controller142controls pressure and flow rates of gas and/or coolant supplied to channels115,116based on detected parameters from sensors143within the processing chamber104. The temperature sensors143may include resistive temperature devices, thermocouples, digital temperature sensors, and/or other suitable temperature sensors. During an etch process, the substrate107may be heated up by a predetermined temperature (e.g., 120 degrees Celsius (° C.)) in presence of high-power plasma. Flow of gas and/or coolant through the channels115,116reduces temperatures of the baseplate103, which reduces temperatures of the substrate107(e.g., cooling from 120° C. to 80° C.). A valve156and pump158may be used to evacuate reactants from the processing chamber104. The system controller160may control components of the substrate processing system100including controlling supplied RF power levels, pressures and flow rates of supplied gases, RF matching, etc. The system controller160controls states of the valve156and the pump158. A robot170may be used to deliver substrates onto, and remove substrates from, the ESC101. For example, the robot170may transfer substrates between the ESC101and a load lock172. The robot170may be controlled by the system controller160. The system controller160may control operation of the load lock172. A power source180may provide power, including a high voltage) to a monopolar clamping electrode182to electrostatically clamp the substrate107to the top plate102. The power source180may be controlled by the system controller160. The valves, gas and/or coolant pumps, power sources, RF generators, etc. may be referred to as actuators. The gas channels, coolant channels, etc. may be referred to as temperature adjusting elements. FIG.2shows an ESC200that includes a top plate202and a base plate204. The top plate202may be bonded to the baseplate204via an intermediate layer (an example of which is shown inFIG.1). The top plate202includes seals206A,206B,206C,206D which separate (i) sealed (or gas coolant) zones208A,208B,208C,208D, and (ii) zone208A from an interior of a processing chamber (e.g., the processing chamber104ofFIG.1). The zones208are concentric. Each of the sealed zones208includes mesas209. The mesas209may be uniformly distributed across the top plate202and/or in predetermined patterns having predetermined dimensions. Although the ESC200is shown as having four coolant gas zones, the ESC200may have three or more coolant gas zones. An example, of an ESC having three zones is shown inFIG.4. The seals206are annular-shaped and protrude upward from the top plate202. The seals206may be formed of the same material as the top plate202and may be integrally formed as part of the top plate202. The seals206may be concentric, as shown. The radially outer most sealed zone208A includes coolant gas grooves210A,210B,210C,210D that are in series and extend along a same circle (or circular path). The coolant gas grooves210may collectively be referred to as a single segmented groove that is circular shaped and has multiple gaps. The single segmented groove may have any number of gaps and corresponding grooves. In one embodiment, the number of gaps in the single segmented groove is minimized for improved coolant gas distribution while maintaining distribution symmetry. The coolant gas grooves210may each have any number of coolant gas supply holes through which coolant gas (e.g., helium) is supplied to the coolant gas grooves210. An example of a gas supply hole is shown inFIG.8. Each of the sealed zones208includes multiple coolant gas groove sets, where each coolant gas groove set is tree-shaped and includes a radially extending groove and multiple pairs of annularly extending grooves (referred to as branch pairs). Each coolant gas groove set may have any number of branch pairs. In the example shown, the sealed zone208B includes 9 coolant gas groove sets, the sealed zone208C includes 7 coolant gas groove sets, and the radially inner most sealed zone208D includes 4 coolant gas groove sets. As an example, a radially extending groove220and branches222,224,226,228are identified for one of the coolant gas groove sets of the sealed zone208B. One of the coolant gas groove sets of each of the sealed zones208C,208D are designated respectively230,240. The branches, in each of the branch pairs, oppose each other and extend in opposite directions away from a corresponding intersection, where the branches meet the corresponding one of the radially extending grooves. InFIG.2, the grooves of the coolant gas groove sets are shown as lines. In actuality, the grooves are shallow trenches that direct and distribute coolant gas uniformly throughout the sealed zones208. Each of the grooves has a corresponding maximum depth and a corresponding maximum width. As an example, each of the grooves may have a maximum depth of 100 micron (μ) and have a maximum width of 300μ. The grooves may have non-uniform depth and thus not have a rectangular-shaped cross section. As shown, the lengths of the branches of each of the coolant gas groove sets decrease along the corresponding radially extending groove, such that the radially outer most branches are the longest and the radially inner most branches are the shortest. As an example, each of the coolant gas groove sets may have one or more corresponding coolant gas supply holes. Each of the coolant gas groove sets may have one or more corresponding coolant gas return holes. In an embodiment, the coolant gas groove sets include coolant gas supply holes and not coolant gas return holes. In another embodiment, the coolant gas groove sets include coolant gas supply holes and coolant gas return holes. In another embodiment, each of the coolant gas groove sets includes only a single coolant gas supply hole and only one coolant gas return hole. The coolant gas supply hole may be located in a groove intersection at a radially outermost end of the corresponding radially extending groove. Each groove intersection is where a radially extending groove meets inner most ends of two branches. The coolant gas return hole may be (i) at a radially innermost end of the radially extending groove, (ii) in a groove of the corresponding coolant gas groove set and at a furthest point away from the coolant gas supply hole, or (iii) at a point therebetween. The top plate202may include a single monopolar electrode (herein after referred to as an electrode) with a corresponding clamping electrode pattern (an example of which is shown inFIGS.5-6. The electrode has a coolant gas groove opening pattern, where an opening is provided for each coolant gas groove and corresponding supply hole and return hole of a corresponding top plate. The coolant gas groove opening pattern has a coolant gas groove opening that is larger than and mimics the shape of one or more coolant gas grooves and/or one of the corresponding coolant gas groove sets. This is further described below with respect toFIGS.5-7. The coolant gas groove sets of each sealed zone includes branches that are in series with branches in the other coolant gas groove sets of the same sealed zone. For example, the outer most branches of each of the coolant gas groove sets of the sealed zone208B extend in series along a same circle (or circular path). Although the branches along a same circle (or circular path) may not be shown as having a same length, each of the branches that are along a same circle (or circular path) may have a same length, such that the corresponding radially extending grooves are each centered between two equal length branches. The branches of each coolant gas groove set is separated from adjacent ones of the coolant gas groove sets by circumferential gaps (e.g., gaps250between branches of coolant gas groove set252and branches of coolant gas groove set254). Each of the radially extending grooves of each of the sealed zones is staggered from the radially extending grooves of other ones of the sealed zones. This is unlike the radially extending grooves of the ESC ofFIG.3. None of the coolant gas grooves extend from one of the sealed zones to another one of the sealed zones. This aids in maintaining pressures and temperatures selected for each of the sealed zones. FIG.3shows an ESC300that includes a top plate302and a base plate304. The top plate302may be bonded to the baseplate304via an intermediate layer (an example of which is shown inFIG.1). The top plate302includes seals306A,306B,306C, which separate sealed (or gas coolant) zones308A,308B,308C,308D. The zones308are concentric. Each of the sealed zones308includes mesas309. Although the ESC300is shown as having four coolant gas zones, the ESC300may have three or more coolant gas zones. An example, of an ESC having three zones is shown inFIG.4. The seals306are annular-shaped and protrude upward from the top plate302. The seals306may be formed of the same material as the top plate302and may be integrally formed as part of the top plate302. The seals306may be concentric, as shown. The radially outer most sealed zone308A includes coolant gas grooves310A,310B,310C,310D that are in series and extend along a same circle (or circular path). The coolant gas grooves310may collectively be referred to as a single segmented groove that is circular shaped and has multiple gaps (non-groove areas). The single segmented groove may have any number of gaps and corresponding grooves. The coolant gas grooves310may each have any number of coolant gas supply holes through which coolant gas is supplied to the coolant gas grooves310. An example of a gas supply hole is shown inFIG.8. Each of the sealed zones308includes multiple coolant gas groove sets, where each coolant gas groove set is tree-shaped and includes a radially extending groove and multiple pairs of annularly extending grooves (referred to as branch pairs). Each coolant gas groove set may have any number of branch pairs. In the example shown, the sealed zone308B includes 9 coolant gas groove sets, the sealed zone308C includes 7 coolant gas groove sets, and the radially inner most sealed zone308D includes 4 coolant gas groove sets. As an example, a radially extending groove320and branches322,324,326,328are identified for one of the coolant gas groove sets of the sealed zone308B. One of the coolant gas groove sets of each of the sealed zones308C,308D are designated respectively330,340. The branches, in each of the branch pairs, oppose each other and extend in opposite directions away from a corresponding intersection, where the branches meet the corresponding one of the radially extending grooves. InFIG.3, the grooves of the coolant gas groove sets are shown as lines. In actuality, the grooves are shallow trenches that direct and distribute coolant gas uniformly throughout the sealed zones308. Each of the grooves has a corresponding maximum depth and a corresponding maximum width, as described above with respect to the ESC ofFIG.2. As shown, the lengths of branches of each of the coolant gas groove sets decrease along the corresponding radially extending groove, such that the radially outer most branches are the longest and the radially inner most branches are the shortest. As an example, each of the coolant gas groove sets of the sealed zones308may have one or more corresponding coolant gas supply holes. Each of the coolant gas groove sets may have one or more corresponding coolant gas return holes. In an embodiment, the coolant gas groove sets include coolant gas supply holes and not coolant gas return holes. In another embodiment, the coolant gas groove sets include coolant gas supply holes and coolant gas return holes. In another embodiment, each of the coolant gas groove sets includes only a single coolant gas supply hole and only one coolant gas return hole. The coolant gas supply hole may be located in a groove intersection at a radially outermost end of the corresponding radially extending groove. Each groove intersection is where a radially extending groove meets inner most ends of two branches. The coolant gas return hole may be (i) at a radially innermost end of the radially extending groove, (ii) in a groove of the corresponding coolant gas groove set and at a furthest point away from the coolant gas supply hole, or (iii) at a point therebetween. The top plate302may include a single monopolar electrode (herein after referred to as an electrode) with a corresponding clamping electrode pattern (an example of which is shown inFIGS.5-6. The electrode has a coolant gas groove opening pattern, where an opening is provided for each coolant gas groove and corresponding supply hole and return hole of a corresponding top plate. The coolant gas groove opening pattern has a coolant gas groove opening that is larger than and mimics the shape of one or more coolant gas grooves and/or one of the corresponding coolant gas groove sets. This is further described below with respect toFIGS.5-7. The coolant gas groove sets of each of the sealed zones308includes branches that are in series with branches in the other coolant gas groove sets of the same sealed zone. For example, the outer most branches of each of the coolant gas groove sets of the sealed zone308B extend in series along a same circle (or circular path). Although the branches along a same circle (or circular path) may not be shown as having a same length, each of the branches that are along a same circle (or circular path) may have a same length, such that the corresponding radially extending grooves are each centered between two equal length branches. The branches of each coolant gas groove set is separated from adjacent ones of the coolant gas groove sets by circumferential gaps (e.g., gaps350between branches of coolant gas groove set352and branches of coolant gas groove set354). Some of the radially extending grooves of each of the sealed zones308are radially in alignment with other radially extending grooves of the other sealed zones308. For example, the radially extending grooves360,362,364are in series and extend along a same linear line. The radially extending grooves are separated by the seals306B,306C. None of the coolant gas grooves extend from one of the sealed zones to another one of the sealed zones. This aids in maintaining pressures and temperatures selected for each of the sealed zones. FIG.4shows an ESC400that includes a top plate402and a base plate404. The top plate402may be bonded to the baseplate404via an intermediate layer (an example of which is shown inFIG.1). The top plate402includes seals406A,406B,406C, which separate sealed (or gas coolant) zones408A,408B,408C. The zones408are concentric. Each of the sealed zones408includes mesas409. Although the ESC400is shown as having three coolant gas zones, the ESC400may have three or more coolant gas zones. The seals406are annular-shaped and protrude upward from the top plate402. The seals406may be formed of the same material as the top plate402and may be integrally formed as part of the top plate402. The seals406may be concentric, as shown. The radially outer most sealed zone408A includes coolant gas grooves410A,410B,410C,410D that are in series and extend along a same circle (or circular path). The coolant gas grooves410extend along an outside of the seal406B, unlike the coolant gas grooves310ofFIG.3, which extend along the inside of the seal306A. The coolant gas grooves410may collectively be referred to as a single segmented groove that is circular shaped and has multiple gaps. The single segmented groove may have any number of gaps and corresponding grooves. The coolant gas grooves410may each have any number of coolant gas supply holes through which coolant gas is supplied to the coolant gas grooves410. An example of a gas supply hole is shown inFIG.8. Each of the sealed zones408includes multiple coolant gas groove sets, where each coolant gas groove set is tree-shaped and includes a radially extending groove and multiple pairs of annularly extending grooves (referred to as branch pairs). Each coolant gas groove set may have any number of branch pairs. In the example shown, the sealed zone408B includes 10 coolant gas groove sets and the sealed zone408C includes 10 coolant gas groove sets. As an example, a radially extending groove420and branches422,424,426,428are identified for one of the coolant gas groove sets of the sealed zone408B. One of the coolant gas groove sets of the sealed zones408C are designated430. The branches, in each of the branch pairs, oppose each other and extend in opposite directions away from a corresponding intersection, where the branches meet the corresponding one of the radially extending grooves. InFIG.4, the grooves of the coolant gas groove sets are shown as lines. In actuality, the grooves are shallow trenches that direct and distribute coolant gas uniformly throughout the sealed zones408. Each of the grooves has a corresponding maximum depth and a corresponding maximum width, as described above with respect to the ESC ofFIG.2. As shown, the lengths of branches of each of the coolant gas groove sets decrease along the corresponding radially extending groove, such that the radially outer most branches are the longest and the radially inner most branches are the shortest. As an example, each of the coolant gas groove sets of the sealed zones408may have one or more corresponding coolant gas supply holes. Each of the coolant gas groove sets may have one or more corresponding coolant gas return holes. In an embodiment, the coolant gas groove sets include coolant gas supply holes and not coolant gas return holes. In another embodiment, the coolant gas groove sets include coolant gas supply holes and coolant gas return holes. In another embodiment, each of the coolant gas groove sets includes only a single coolant gas supply hole and only one coolant gas return hole. The coolant gas supply hole may be located in a groove intersection at a radially outermost end of the corresponding radially extending groove. Each groove intersection is where a radially extending groove meets inner most ends of two branches. The top plate402may include a single monopolar electrode (herein after referred to as an electrode) with a corresponding clamping electrode pattern (an example of which is shown inFIGS.5-6. The electrode has a coolant gas groove opening pattern, where an opening is provided for each coolant gas groove and corresponding supply hole and return hole of a corresponding top plate. The coolant gas groove opening pattern has a coolant gas groove opening that is larger than and mimics the shape of one or more coolant gas grooves and/or one of the corresponding coolant gas groove sets. This is further described below with respect toFIGS.5-7. The coolant gas groove sets of each of the sealed zones408includes branches that are in series with branches in the other coolant gas groove sets of the same sealed zone. For example, the outer most branches of each of the coolant gas groove sets of the sealed zone408B extend in series along a same circle (or circular path). Although the branches along a same circle (or circular path) may not be shown as having a same length, each of the branches that are along a same circle (or circular path) may have a same length, such that the corresponding radially extending grooves are each centered between two equal length branches. The branches of each coolant gas groove set is separated from adjacent ones of the coolant gas groove sets by circumferential gaps (e.g., gaps450between branches of coolant gas groove set452and branches of coolant gas groove set454). Some of the radially extending grooves of each of the sealed zones408are radially in alignment with other radially extending grooves of the other sealed zones408. For example, the radially extending grooves420,460,462,464are in series and extend along a same linear line. In the example shown there are four other similar series of radially extending grooves that extend along respective linear lines. The radially extending grooves are separated by the seal406B and a center area470. None of the coolant gas grooves extend from one of the sealed zones to another one of the sealed zones. This aids in maintaining pressures and temperatures selected for each of the sealed zones. FIG.5shows a monopolar clamping electrode500having a clamping electrode pattern502and coolant gas groove opening pattern504. The patterns502and504are for four coolant gas zones, where each of the four coolant gas (or sealed) zones includes respective coolant gas openings506A,506B,506C,506D. The patterns502and504may be modified for three or more coolant gas zones. The coolant gas openings506have corresponding gas supply portions (some of which designated510). In an embodiment, the monopolar clamping electrode500is a conductive film layer that covers more than a predetermined percentage of a radial surface area of a top plate of an ESC. The clamping electrode pattern502of the monopolar clamping electrode500provides a unitary structure that when in use is at a single voltage potential. The clamping electrode pattern502provides improved clamping force across the top plate. In the example shown, the monopolar clamping electrode may receive power from the power source180ofFIG.1. The monopolar clamping electrode may be connected to a terminal, which may be connected to the power source180. Although a certain number of coolant gas openings are shown for each of the sealed zones of the corresponding top plate, any number of gas openings may be included for each of the sealed zones. Each of the coolant gas openings506A have multiple gas supply hole portions and groove openings connected in series. For example, the gas supply hole portions and groove openings of one of the coolant gas openings506A are designated520and522. Although each of the coolant gas openings506A is shown having five gas supply hole portions, the coolant gas openings506A may have a different number of gas supply hole portions than shown. The gas supply hole portions correspond to multiple coolant gas supply holes in corresponding coolant gas grooves of a top plate. By having multiple coolant gas supply holes per coolant gas groove set in an outermost zone, coolant gas pressure is maintained near a perimeter of the top plate. This compensates for coolant gas leakage through a radially outermost seal (e.g., the seal206A ofFIG.2) of the top plate. Each of the coolant gas openings506B,506C,506D has radially extending portions (one of which is designated530) and branch pair portions (single branch portions extending from one side of the radially extending portion530are designated532,534,536,538). The radially extending portions and branch pair portions are beneath corresponding radially extending grooves and groove branch pairs of a top plate. The radially extending grooves are centered over the radially extending portions. The groove branch pair grooves are centered over the branch pair portions. The radially extending portion530has at a radially outermost end with a gas supply opening portion540. As shown, the lengths of the branch pair portions decrease in length along the corresponding radially extending portions, such that the radially outer most branch portions are the longest and the radially inner most branch portions are the shortest. The coolant gas groove opening pattern504of the monopolar clamping electrode500corresponds to a groove pattern similar to that of the ESC200ofFIG.2, except the portion of the monopolar clamping electrode500corresponding to a radially inner most coolant zone is different. The radially inner most coolant zone of the corresponding top plate has two branch pairs per coolant gas groove set (instead of three branch pairs per coolant gas groove set) and thus the monopolar clamping electrode500has two corresponding branch pair portions per coolant gas opening set. FIG.6shows a monopolar clamping electrode600that has a clamping electrode pattern600and coolant gas groove opening pattern602for four coolant gas zones including coolant gas openings with gas supply and return portions. By having return holes corresponding to the return portions, coolant gas flow may be increased. The monopolar clamping electrode600is similar to the monopolar clamping electrode500ofFIG.5, except the monopolar clamping electrode600includes gas return portions for the coolant gas groove openings in the radially inner three zones. The patterns602and604are for four coolant gas zones, where each of the four coolant gas (or sealed) zones includes respective coolant gas openings606A,606B,606C,606D. The coolant gas openings606have corresponding gas supply portions (some of which designated610). In an embodiment, the monopolar clamping electrode600is a conductive film layer that covers more than a predetermined percentage of a radial surface area of a top plate of an ESC. The clamping electrode pattern602of the monopolar clamping electrode600provides a unitary structure that when in use is at a single voltage potential. The clamping electrode pattern602provides improved clamping force across the top plate. Each of the coolant gas openings606A have multiple gas supply hole portions and groove openings connected in series. For example, the gas supply hole portions and groove openings of one of the coolant gas openings606A are designated620and622. Although each of the coolant gas openings606A is shown having five gas supply hole portions, the coolant gas openings606A may have a different number of gas supply hole portions than shown. The gas supply hole portions correspond to multiple coolant gas supply holes in corresponding coolant gas grooves of a top plate. By having multiple coolant gas supply holes per coolant gas groove set in an outermost zone, coolant gas pressure is maintained near a perimeter of the top plate. This compensates for coolant gas leakage through a radially outermost seal (e.g., the seal206A ofFIG.2) of the top plate. Each of the coolant gas openings606B,606C,606D has radially extending portions (one of which is designated630) and branch pair portions (single branch portions extending from one side of the radially extending portion630are designated632,634,636,638). The radially extending portions and branch pair portions are beneath corresponding radially extending grooves and groove branch pairs of a top plate. The radially extending grooves are centered over the radially extending portions. The groove branch pair grooves are centered over the branch pair portions. The radially extending portion630has at a radially outermost end with a gas supply opening portion640. As shown, the lengths of the branch pair portions decrease in length along the corresponding radially extending portions, such that the radially outer most branch portions are the longest and the radially inner most branch portions are the shortest. The coolant gas groove opening pattern604of the monopolar clamping electrode600corresponds to a groove pattern similar to that of the ESC200ofFIG.2, except the portion of the monopolar clamping electrode600corresponding to a radially inner most coolant zone is different. The radially inner most coolant zone of the corresponding top plate has two branch pairs per coolant gas groove set (instead of three branch pairs per coolant gas groove set) and thus the monopolar clamping electrode600has two corresponding branch pair portions per coolant gas opening set. FIG.7shows a portion700of a top plate of an ESC illustrating seals702, mesas704, coolant grooves706and a monopolar clamping electrode (portions708of which are shown). The portion700may be a portion of, for example, the top plate202ofFIG.2. The seals702may protrude upwards to a level above other portions of the top plate. Although the mesas704are shown as having a same height as the seals702, the mesas704may have varying heights and may be shorter or taller than the seals702. As an example, the heights of at least some of the mesas704may be 10p. In one embodiment, the heights of the seals702and/or other seals of the top plate that are separating sealed zones may have heights equal to 0-100% of heights of surrounding surface features, such as the heights of the mesas704. The portions708of the monopolar clamping electrode are a predetermined distance away from the grooves706. This prevents dielectric breakdown of the top plate700in areas between the portions708and the grooves706. The coolant gas grooves706are examples of the coolant grooves disclosed herein and have a varying depth and width. A maximum of the depth is at a center of the groove. A maximum of the width (e.g., 300μ) is at a top of the groove. A depth D1of the monopolar clamping electrode may be, for example, 300μ. A depth D2of the coolant gas grooves706may be, for example, 100μ. Although the monopolar clamping electrode is shown having separated portions708inFIG.7, the portions708are connected by other portions of the monopolar clamping electrode. In an embodiment, a plane extends radially through all of the portions of the monopolar clamping electrode. FIG.8shows a portion800of an ESC that includes a top plate852, an intermediate layer854, and a baseplate856. The baseplate856includes a gas channel860that directs a backside gas into a gas channel862, which extends upwards from the gas channel860through the intermediate layer854, through a coolant gas supply hole863, and into a coolant gas groove864. Although the coolant gas supply hole863is provided as an example of a coolant gas supply hole, coolant gas return holes described above may be configured similarly as the coolant gas supply hole863and have corresponding gas channels similar to the gas channels860,862. Portions866of a monopolar clamping electrode are also shown. FIG.9shows an example portion of a sealed zone including a coolant gas groove opening set901of a monopolar clamping electrode and a corresponding coolant gas groove set902disposed between seals903of a top plate904of an ESC. The sets901,902are provided as examples to show relationships between branch pairs and branch opening pairs. Any of the grooves and/or groove openings disclosed herein may have similar relationships. The coolant gas groove opening set901includes radially extending groove906and annular extending grooves (or branch pairs)908. The coolant gas groove set902includes radially extending groove opening910and annular extending groove openings (or branch opening pairs)912.FIG.9also shows example coolant a gas supply hole914at a radially outermost end of the radially extending groove906and a gas return hole916at a radially innermost end of the radially extending groove906. The coolant gas groove opening set901is below and a perimeter of which, as viewed from above, surrounds the coolant gas groove set902and the holes914,916. The coolant groove opening set901is at least a predetermined distance from the coolant gas groove set902and the holes914,916. The above-described examples include electrode patterns and coolant gas groove patterns that are structured to provide improved electrostatic clamping and coolant gas distribution for multiple zones. The ESCs disclosed herein include multiple coolant gas zones that may be set at different coolant gas pressures (e.g., between 10 torr (T) to 80 T). The zones may include a center circular zone and multiple corresponding concentric zones. Each of the zones may have a predetermined number (e.g., 4 or more) of coolant gas supply holes, which may be in corresponding coolant gas grooves. For multi-zone ESC, it can be important to have a sufficient supply of coolant gas across a zone and at each boundary (e.g., seal band) of the zone to minimize pressure influence from adjacent zones and make zonal (radial) temperature tuning efficient. The disclosed patterns facilitate providing this supply and corresponding distribution of coolant gas without dielectric material breakdown. Another benefit of the disclosed groove patterns is the ability to efficiently deliver coolant gas along an entire seal band, which reduces effect of temperature drift due to coolant gas leakage between zones. This is especially true as seal bands wear and become less efficient in separating the zones. The disclosed high conductance grooves aid in creating an isobaric condition in each zone. Heights of mesas and other structures can cause a high impedance to gas flow. The disclosed grooves compensate for this high impedance by increasing gas flow. Placing an electrostatic clamp electrode below a coolant gas groove can create high electric fields across thin dielectric material and result in a light-up in the coolant gas groove and/or break down of the dielectric material between the electrostatic clamp electrode and the coolant gas groove. The disclosed examples do not include a clamp electrode directly under a coolant gas groove. Each of the clamp electrodes is in a layer of a top plate below a layer in which the coolant gas grooves are located and has openings directly under the coolant gas grooves. Material of the clamp electrodes is at least a predetermined distance away from the coolant gas grooves. Areas of the coolant gas openings are greater than areas of corresponding coolant gas grooves. Thin top plates make it challenging and impractical to include multiple separate electrodes connected via underlying conductive bus layers. The disclosed examples include monopolar clamping electrodes that are each disposed in a single layer of respective ESC. The corresponding groove patterns aid in creating an isobaric condition for each annular zone, and have gaps where the clamp electrode resides in an internal dielectric layer. The distribution groove patterns may take on a variety of different patterns based on coolant gas pressures, coolant gas zone dimensions, etc. The use of more annular grooves per zone improves distribution. In an embodiment, the annular grooves within each zone include annular discontinuities (or gaps between adjacent grooves along a same circle). Within each set of annular grooves between two adjacent radial discontinuities (or seals) of a zone, the annular grooves are connected by a radial groove to create a branch pattern. The radial groove provides continuity within each branch pattern and improves coolant gas distribution. In an embodiment, each branch pattern includes at least one hole which is supplied coolant gas. The disclosed patterns allow for the use of a monopolar clamping electrode for a thin top plate having few layers. It is not feasible to have multiple electrode layers interconnected by underlying conductive bus layers in a thin top plate having a thickness of, for example 1-1.25 mm and moderately thick green sheet construction (e.g., 0.3-0.8 mm). Green sheet construction refers to the stacking of layers of thin material (e.g., dielectric tape) and sintering the stack to form a plate. It is difficult to manufacture an underlying bus layer for this type of top plate, as there are inadequate layers for the bus layers. Also, the layers of a stack including multiple electrode layers can be too close to a top surface and break down through surrounding dielectric material. The disclosed discontinuous branched helium groove patterns provide uniform coolant gas distribution while providing a continuous monopolar clamping electrode (i.e., a monopolar clamping electrode that is not separated into multiple sections) disposed close to (within a predetermined distance of) a top surface of an ESC. The top surface is a surface exposed to the coolant gas existing between the top plate and a substrate. The top surface may face a backside surface of the substrate. The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. It should be understood that one or more steps within a method may be executed in different order (or concurrently) without altering the principles of the present disclosure. Further, although each of the embodiments is described above as having certain features, any one or more of those features described with respect to any embodiment of the disclosure can be implemented in and/or combined with features of any of the other embodiments, even if that combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and permutations of one or more embodiments with one another remain within the scope of this disclosure. Spatial and functional relationships between elements (for example, between modules, circuit elements, semiconductor layers, etc.) are described using various terms, including “connected,” “engaged,” “coupled,” “adjacent,” “next to,” “on top of,” “above,” “below,” and “disposed.” Unless explicitly described as being “direct,” when a relationship between first and second elements is described in the above disclosure, that relationship can be a direct relationship where no other intervening elements are present between the first and second elements, but can also be an indirect relationship where one or more intervening elements are present (either spatially or functionally) between the first and second elements. As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A OR B OR C), using a non-exclusive logical OR, and should not be construed to mean “at least one of A, at least one of B, and at least one of C.” In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system. Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer. The controller, in some implementations, may be a part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber. Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers. As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory. | 53,927 |
11942352 | DETAILED DESCRIPTION OF THE INVENTION Hereinafter, the method for manufacturing an LED display according to the present exemplary embodiment will be described with reference to the accompanying drawings.FIG.1is a flowchart illustrating the outline of a method for manufacturing an LED display according to the present exemplary embodiment. Referring toFIG.1, the method for manufacturing an LED display includes the steps of picking up a plurality of LED chips spaced apart at a first interval with a stretchable stamp S100, spacing apart the plurality of LED chips at a second interval by stretching the stretchable stamp S200, and transferring the plurality of LED chips to a target substrate S300. FIG.2is a plan view schematically illustrating a wafer110on which LED chips100are formed, andFIG.3is a cross-sectional view schematically illustrating a wafer110on which LED chips100are formed. Referring toFIGS.2and3, a wafer110is formed with LED chips100that provide light at a predetermined wavelength to a grown epitaxial layer. In one exemplary embodiment, the wafer110may be individualized by dicing along the boundaries of the LED chips100such that each LED chip may be transferred. The LED chips100formed on the wafer110may each be spaced apart at a first interval. In one exemplary embodiment, the wafer110may be a wafer in which an aluminum gallium arsenide (AlGaAs) epitaxial layer is grown on a gallium arsenide (GaAs) substrate, which may be diced to form an LED chip100that provides a wavelength in the red region. In another exemplary embodiment, the wafer may be a wafer having an indium gallium nitride (InGaN) epitaxial layer or a gallium nitride (GaN) epitaxial layer grown on a sapphire substrate, which may be diced to form an LED chip100that provides light at wavelengths in the green region or in the blue region. In one example, the chips100may be micro-LED chips having a width and/or length dimension of 100 μm or less. FIG.4(a)is a diagram illustrating the process of aligning a stretchable stamp200and LED chips100, andFIG.4(b)is a diagram illustrating the step of picking up LED chips100with a stretchable stamp200. Referring toFIG.4A, the stretchable stamp200and the LED chips100are aligned. In one exemplary embodiment, the stretchable stamp200may include a body B and a pick-up pillar P. The pick-up pillar P and the body B of the stretchable stamp may be formed of an elastomer. In one example, the body B and the pick-up pillar P may be formed of the same elastomer. In another example, the body B and the pick-up pillar P may be formed of different elastomers. In one example, the elastomer that makes up the stretchable stamp200may be any one of PDMS, PMMA, Ecoflex and a hydrogel. Preferably, the elastomer may have a Young's modulus of 10 Pa to 10 MPa. If the Young's modulus is less than 10 Pa, the yield strength is lowered such that the restoring force of the stretchable stamp is lowered and the long-term durability may be lowered. In addition, if the Young's modulus is more than 10 MPa, an error in the degree of elongation may occur partially. In one exemplary embodiment, the stretchable stamp200may be aligned by an actuator (not illustrated) that controls the position of the stretchable stamp200. The stretchable stamp200may be aligned such that the pick-up pillars P are located on top of the LED chips100. Referring toFIG.4(b), the stretchable stamp200is lowered such that the surface of the pick-up pillar P adheres to the surface of the LED chip100. Subsequently, as the stretchable stamp200is raised, the LED chips100are attached to the surface of the pick-up pillar P and raised with the stretchable stamp200S100. The LED chip100is attached to the pick-up pillar P by a Van der Waals force. The pick-up pillar P is made of an elastomer, and the surface of the pick-up pillar P to which the LED chip100is attached is flat and soft such that conformal contact between the LED chips100and the pick-on pillar P occurs, and thus the attachment force is maximized. The pick-up pillar may preferably be made of an elastomer having a Young's modulus of 10 Pa to 10 MPa. When the Young's modulus is less than 10 Pa, there is a problem that the adhesion force to the LED chip is reduced because the pick-up pillar is excessively deformed at the time of stretching the stretchable stamp, and when it is more than 10 MPa, there is a concern that the long-term durability of the entire stretchable stamp may be reduced. The pick-up pillar preferably includes a cylinder portion connected to the body and a top portion having a larger cross-sectional area than the cylinder portion on the upper surface of the cylinder portion and contacting an LED chip when the LED chip is transferred, and the cylinder portion and the top portion may have a height ratio of 2:3 to 2:1. By having such a configuration, the stretchable stamp according to the present invention may have a T-shaped cross section of the pick-up pillar in a direction perpendicular to the body plane, and the cross sections of the cylinder portion and the top portion may preferably be circular. In this case, the cylinder portion and the top portion may each have a columnar shape. In the case of the T-shape as described above, the deformation rate of the upper surface of the top portion is reduced due to the stretching of the body part, and thus, a decrease in the adhesion force to the LED chip may be small. The cross sections of the cylinder portion and the top portion are not necessarily limited to a circular shape, and may have various shapes such as a rectangular shape, an elliptical shape and the like. Preferably, the cross-sectional area ratio of the cylinder portion and the top portion may be 100:130 to 100:300. If the cross-sectional area of the top portion is less than 130% of the cross section of the cylinder portion, the strain on the upper surface of the top portion may be increased upon stretching of the stretchable stamp body, resulting in a decrease of the adhesion force to the LED chip, substantially similar to that consisting of only a cylinder portion without a top portion. On the other hand, when the cross-sectional area of the top portion is more than three times that of the cylinder portion, the durability of the pick-up pillar may be structurally weakened, which may reduce the long-term durability of the entire stretchable stamp. FIG.5is a diagram schematically illustrating a state in which the stretchable stamp is stretched. Referring toFIG.5, a tensile force is provided to stretch the stretchable stamp200. The stretchable stamp200is stretched such that the LED chips100attached to the pick-up pillar P are spaced apart at a second interval d2that is greater than a first interval d1. In one example, the second interval d2may correspond to the spacing distance of a target location at which the LED chips are disposed in a target substrate300. In one exemplary embodiment, the stretchable stamp200may be stretched by providing a tensile force in two different directions (x and y directions). In another exemplary embodiment, the stretchable stamp200may be stretched by providing a tensile force in either direction. Preferably, the second interval may be 1.1 to 10 times the first interval. By stretching the LED chip by 1.1 times or more, the number of transfers may be reduced when transferring LED chips. However, when stretching by more than 10 times, deformation may occur in the stretchable stamp, resulting in poor transfer accuracy, and there is a concern that the long-term durability of the stretchable stamp may be reduced. In addition, preferably, the stretchable stamp according to the present invention may have an elongation ratio of the body of 10% to 1,000%. As used herein, the term “elongation ratio” is the ratio of the stretched length (Ala) to the original length until the member is stretched and broken. If the elongation ratio is less than 10%, the yield strength is lowered such that permanent deformation may occur in the stretchable stamp, and if it is more than 1,000%, there is a problem that the Young's modulus becomes excessively high. FIG.6is a diagram illustrating a state in which the LED chips100are transferred to a target substrate400in a state in which the stretchable stamp200is stretched. Referring toFIG.6, an actuator (not illustrated) aligns the position of the stretchable stamp200with the target substrate300in a stretched state. Subsequently, the stretchable stamp200may be lowered to dispose the LED chips100at a target location formed in the target substrate100. The target location may be formed with one or more pads (not illustrated) that are coupled to a line that provides electrical signals and electrically coupled to the LED chip to transfer electrical signals. In addition, an adhesive layer (not illustrated) may be formed at each target location such that the LED chips100attached to the pick-up pillar P are attached on the substrate. Thus, after the stretchable stamp200is aligned to a location at which the LED chips are disposed at a target location, the LED chips100may be secured at the target location as the stretchable stamp200provides a compressive force against the target substrate300. FIG.7is a diagram illustrating an example in which light-emitting elements providing light of different colors are disposed on a target substrate300. Referring toFIG.7, in the target substrate300, LED chips may be disposed adjacent to LED chips that provide light of different colors. Experimental Results Hereinafter, experimental results of the present exemplary embodiment will be described with reference toFIG.8toFIG.11.FIG.8is a graph measuring the applied tensile forces and changes in distance between attached LED chips100when the stretchable stamp is stretched along a single axis. Referring toFIG.8, it can be confirmed that as the stretching force increases, the distance between the chips increases linearly along the direction in which the stretching force is provided. However, it can be confirmed that the spacing between the LED chips100is somewhat reduced in a direction orthogonal to the direction in which the stretching force is provided. FIG.9is a graph measuring the applied tensile forces and changes in distance between attached LED chips, when the stretchable stamp is stretched along two axes that are orthogonal to each other. Referring toFIG.9, it can be confirmed that the distance between the LED chips is formed linearly with the magnitude of the stretching force provided similarly to the above experimental results. FIG.10is a diagram illustrating a change in the cross-sectional shape of a pillar when a stretching force is applied in a single direction (x direction) to pick-up pillars having a single height and different diameters. Referring toFIG.10, it can be seen that as the stretching force provided in the x-direction gradually increases, the smaller the aspect ratio obtained by dividing the diameter of the pick-up pillar by the height of the pickup pillar, the less the change in the cross-sectional diameter of the pillar, and as the aspect ratios increase from 1.18, 1.75 to 2.45, the cross section of the pick-up pillar deforms from a circle to an ellipse. These facts can also be confirmed from the microscopic images illustrated inFIGS.11(a),11(b) and11(c).FIGS.11(a) to11(c)are microscopic images of the cross sections of pick-up pillars when stretchable stamps having aspect ratios of 1.18, 1.75 and 2.45 are subjected to the same tensile force, respectively. Referring toFIGS.11(a) to11(c), it can be confirmed that as the aspect ratio of the pick-up pillar increases, the change in the cross-sectional shape of the picking-up pillar is greater. FIGS.12(a) to12(d)are diagrams illustrating examples of directions in which the stretchable stamp is stretched.FIG.12(a)shows a state in which the stretchable stamp is not provided with a stretching force. When the stretchable stamp is provided with a stretching force in the upper left and lower right directions, respectively, as shown inFIG.12(b), the stretchable stamp is stretched in a diagonal direction, and the light-emitting elements arranged in a diagonal direction may be positioned by using the same. As illustrated inFIG.12(c), it is possible to provide a stretching force at the lower left and lower right, fix the upper left and upper right, or to provide a small stretching force. Thus, it can be seen that the stretchable stamp is further stretched to the lower left and lower right provided with a large stretching force. In addition, as illustrated inFIG.12(d), the light-emitting elements may be disposed in such a manner that one of the points of the stretchable stamp is fixed, and a stretching force is applied in a circumferential direction based on the fixed point to rotate in the circumferential direction. Conventionally, each LED chip was transferred one by one to the target position of a target substrate to form an LED display. This transfer process has become a factor in increasing the cost of manufacturing LED displays. However, according to the present exemplary embodiment, it is possible to arrange a plurality of LED chips at a target position with a stretchable stamp, thereby reducing the time consumed in the process and thus providing an advantage that the manufacturing cost may be reduced therefrom. Although the present invention has been described with reference to the exemplary embodiments illustrated in the drawings in order to help the understanding of the invention, these are only exemplary as exemplary embodiments for implementation, and those of ordinary skill in the art will understand that various modifications and other equivalent exemplary embodiments are possible therefrom. Accordingly, the true technical protection scope of the present invention should be defined by the appended claims. EXPLANATION OF REFERENCE NUMERALS S100to S300: Each step of the method for manufacturing an LED display according to the present exemplary embodiment100: LED chip110: Wafer200: Stretchable stamp300: Target substrated1: First intervald2: Second intervalB: BodyP: Pick-up pillar | 14,191 |
11942353 | DETAILED DESCRIPTION Hereinafter, a semiconductor processing adhesive tape according to the present invention will be described in further detail. First, main terms used in the present specification is described. In the present specification, for example, “(meth)acrylate” is used as a term indicating both “acrylate” and “methacrylate”, and the same applies to other similar terms. The term “semiconductor processing” includes steps such as carrying a semiconductor wafer, backside grinding, dicing, and picking up semiconductor chips. A “front surface” of a semiconductor wafer refers to a surface on which circuits are formed, and a “back surface” refers to a surface on which no circuit is formed. Dicing of a semiconductor wafer means dividing a semiconductor wafer into individual circuit to obtain semiconductor chips. DBG refers to a method of forming a groove having a predetermined depth to a front surface side of a wafer, then grinding from a back surface of the wafer and dicing the wafer by grinding. The groove formed to the front surface side of the wafer is formed by a method such as blade dicing, laser dicing, plasma dicing, and the like. Also, LDBG is a modified example of DBG, and refers to a method of providing a modified region to the inside of a wafer by laser and dicing the wafer by means of, for example, a stress applied when the back surface of the wafer is ground. Next, the configurations of respective members of the semiconductor processing adhesive tape according to the present invention will now be described in further detail. Note that, the semiconductor processing adhesive tape according to the present invention may be simply referred as an “adhesive tape”. In the present embodiment according to the present invention, as shown in FIGURE, an adhesive tape10is a laminate including a base11, a buffer layer12provided on one surface of the base11, and an adhesive layer13provided at least on the other surface of the base11. Note that, other constituent layers besides mentioned in above may be also included. For example, a primer layer may be formed to the surface of the base on the adhesive layer side, and a release sheet for protecting the adhesive layer until use may be laminated on the surface of the adhesive layer. Also, the base may be a single layer, or may be multilayers. Same applies to the buffer layer and the adhesive layer. Hereinafter, the configuration of respective members of the semiconductor processing adhesive tape according to the embodiment of the present invention will now be described in further detail. [Base] The Young's modulus at 23° C. of the base is larger than the Young's modulus at 23° C. of the buffer layer which is described in below. The tape debris can be reduced by making the Young's modulus at 23° C. of the base is larger than the Young's modulus at 23° C. of the buffer layer. Specifically, the base preferably has a Young's modulus at 23° C. of 1000 MPa or more. If a base having a Young's modulus of less than 1000 MPa is used, a retaining capability of the semiconductor processing adhesive tape to a semiconductor wafer or semiconductor chips decreases; and it is therefore impossible to suppress vibrations and the like when backside grinding is performed, and chipping or breakage of semiconductor chips may easily occur. On the other hand, when the base has a Young's modulus at 23° C. of 1000 MPa or more, the retaining capability of the adhesive tape to the semiconductor wafer or semiconductor chips increases, and it is thereby possible to suppress vibrations and the like when backside grinding is performed, thus chipping and breakage of the semiconductor chips can be suppressed. Also, it is possible to reduce a stress applied when the adhesive tape is released from the semiconductor chips, thus chipping and breakage of the chips while releasing the adhesive tape can be suppressed. Further, a workability can also be improved while adhering the adhesive tape to the semiconductor wafer. From such point of view, the Young's modulus of the base at 23° C. is more preferably 1800 to 30000 MPa, and even more preferably 2500 to 6000 MPa. A thickness of the base is not particularly limited, and preferably it is 110 μm or less, more preferably 15 to 110 μm, and even more preferably 20 to 105 μm. By setting the thickness of the base to be 110 μm or less, a releasing force of the adhesive tape can be controlled easily. By setting the thickness to 15 μm or more, the base can easily function as a support of the adhesive tape. A material of the base is not particularly limited as long as the base satisfies the above-mentioned physical properties, and various resin films can be used. Here, as the base having a Young's modulus at 23° C. of 1000 MPa or more, for example, resin films such as polyethylene terephthalate, polyethylene naphthalate, polybutylene terephthalate, polyesters such as wholly aromatic polyester and the like, polyimide, polyamide, polycarbonate, polyacetal, modified-polyphenyleneoxide, polyphenylene sulfide, polysulfone, polyether ketone, biaxially oriented polypropylene, and the like may be mentioned. Among these resin films, a film including at least one selected from a polyester film, a polyamide film, a polyimide film, and a biaxially oriented polypropylene film is preferable; a film including a polyester film is more preferable; and a film containing a polyethylene terephthalate film is even more preferable. The base may include a plasticizer, a lubricant, an infrared absorber, an ultraviolet absorber, a filler, a colorant, an antistatic agent, an antioxidant, a catalyst, and the like as long as the effects of the present invention are not impaired. Also, the base may be transparent or opaque, and may be colored or vapor-deposited as desired. At least one surface of the base may be subjected to an adhesion treatment such as a corona treatment in order to improve adhesion with at least one of the buffer layer and the adhesive layer. The base may include the above-mentioned resin film and an easy-adhesion layer which is coated to at least one of the surfaces of the resin film. An easy-adhesion layer forming composition which is used to form the easy-adhesion layer is not particularly limited, and for example, a composition including a polyester-based resin, a urethane-based resin, a polyester-urethane-based resin, an acrylic-based resin and the like may be mentioned. The easy-adhesion layer forming composition may include a crosslinking agent, a photopolymerization initiator, an antioxidant, a softener (plasticizer), a filler, a rust inhibitor, a pigment, a dye, and the like, if needed. The easy-adhesion layer has a thickness of preferably 0.01 to 10 μm and more preferably 0.03 to 5 μm. Note that, since the easy-adhesion layer in examples of the present application is thin with respect to the thickness of the base, the thickness of the resin film including the easy-adhesion layer and the thickness of the base are substantially the same. Also, since the material of the easy-adhesion layer is soft, the Young's modulus is barely affected, and thus the Young's modulus of the base is substantially the same as the Young's modulus of the resin film even when the base includes the easy-adhesion layer. For example, the Young's modulus of the base can be controlled by choice of the resin composition, addition of a plasticizer, and conditions of stretching while producing the resin film. Specifically, when a polyethylene terephthalate film is used as the base, the Young's modulus of the base tends to decrease if the content ratio of the ethylene component in the copolymerization component increases. The Young's modulus of the base tends to decrease if the amount of the plasticizer is large relative to the amount of the resin composition constituting the base. [Buffer Layer] The buffer layer allows to relieve the stress applied during backside grinding of the semiconductor wafer, and prevents crack and chipping of the semiconductor wafer. After the adhesive tape is adhered to the semiconductor wafer and the adhesive tape is cut along the outer circumference of the semiconductor wafer, it is placed on a chuck table via the adhesive tape and then backside grinding is performed. Since the adhesive tape includes the buffer layer as a constituent layer, the semiconductor wafer is appropriately held by the chuck table. On the other hand, since the buffer layer is soft compared to the base, it has been found that the tape debris is generated when the adhesive tape is cut. As a result of keen study, it is found that when the buffer layer satisfies the following properties, the tape debris can be reduced. The Young's modulus at 23° C. of the buffer layer is smaller than the Young's modulus at 23° C. of the base. Specifically, the Young's modulus at 23° C. of the buffer layer is 10 to 400 MPa. When the Young's modulus at 23° C. of the buffer layer is less than 10 MPa, the buffer layer deforms largely along the cutter blade while cutting and the buffer layer adheres to the cutter blade, thus friction increases and the tape debris may be generated. Also, when the Young's modulus at 23° C. is larger than 400 MPa, the buffer layer does not deform along the cutter blade while cutting, hence stress does not concentrate to a cross section and a rough cross section may be formed thus the tape debris may be generated. According to such point of view, the Young's modulus at 23° C. of the buffer layer is preferably 10 to 350 MPa and more preferably 15 to 300 MPa. The breaking energy at 23° C. of the buffer layer is 1 to 9 MJ/m3. The adhesive tape is adhered to the semiconductor wafer around normal temperature (23° C.), and then the adhesive tape is cut along the outer circumference of the wafer. When the breaking energy at normal temperature (23° C.) of the buffer layer is 1 to 9 MJ/m3, the buffer layer is cut instantaneously when the cutter blade contacts with the buffer layer while cutting, thus warpage and deform of the buffer layer can be suppressed while cutting, and the tape debris can be reduced. On the other hand, when the breaking energy at 23° C. of the buffer layer is lower than 1 MJ/m3, the strength of the buffer layer may not be enough. Also, when the breaking energy at 23° C. of the buffer layer is larger than 9 MJ/m3, the buffer layer is deformed when the blade of the cutter contacts while cutting and does not regain the initial form, hence the buffer layer may warp or tear off which may generate the tape debris. Note that, even in case the blade of the cutter is heated for cutting, if the breaking energy at 23° C. of the buffer layer is 1 to 9 MJ/m3, warpage and deformation of the buffer layer during cutting is suppressed and the tape debris can be reduced. From the point of the above, the breaking energy at 23° C. of the buffer layer is preferably 1.0 to 8.0 MJ/m3, more preferably, 1.5 to 6.0 MJ/m3, and even more preferably 1.5 to 5.0 MJ/m3. The breaking energy is a value obtained by integrating to a breaking point in a stress-strain curve which is a curve of stress and strain obtained from a tensile test at 23° C. based on JIS K7161:1994 and JIS K7127:1999. The strain (mm) can be calculated from “initial length of test piece (mm)×elongation (%)”. Note that, a breaking stress and a breaking elongation which are described in below are respectively stress and elongation at the point of breaking during the tensile test as mentioned in above. From the point of obtaining the breaking energy of the above-mentioned range, the breaking stress at 23° C. of the buffer layer is preferably 3 to 40 MPa, more preferably 5 to 20 MPa, and even more preferably 8 to 15 MPa. The breaking stress can be measured based on JIS K7161:1994 and JIS K7127:1999. The breaking elongation at 23° C. of the buffer layer is preferably 5 to 150%, more preferably 10 to 100%, and even more preferably 20 to 70%. When the breaking elongation is less than 5%, the buffer layer does not deform along the cutter blade while cutting, hence stress does not concentrate, and a rough cross section may be formed and the tape debris may be generated. On the other hand, when the breaking stress is 150% or more, the deformed buffer layer while cutting does not return to its original form, hence the buffer layer may warp and teared off and the tape debris may be generated. Therefore, the breaking elongation at 23° C. of the buffer layer is preferably within the above-mentioned range. The breaking elongation can be measured based on JIS K7161:1994 and JIS K7127:1999. The thickness of the buffer layer is preferably 1 to 100 μm, more preferably 5 to 80 μm, and even more preferably 10 to 60 μm. By setting the thickness of the buffer layer within the above-mentioned range, the buffer layer can release the stress appropriately during backside grinding. The buffer layer is preferably a cured product of the buffer layer forming composition including the energy ray polymerizable compound. Also, it may be a layer including a polyolefin resin film, or a layer including polyether as a main agent. Below describes components included in the layer formed by the buffer layer forming composition including the energy ray polymerizable compound; and components included in the layer including a polyolefin resin film in this order. <Layer Formed of Buffer Layer Forming Composition Including Energy Ray Polymerizable Compound> The buffer layer forming composition including the energy ray polymerizable compound can be cured by irradiating energy ray. Note that, the term “energy ray” refers to ultraviolet rays, electron beams, and the like; and preferably ultraviolet rays are preferably used. Also, more specifically, the buffer layer forming composition including the energy ray polymerizable compound preferably includes a urethane (meth)acrylate (a1) and a polymerizable compound (a2) having an alicyclic group or a heterocyclic group having 6 to 20 ring atoms. By including these two components in the buffer layer forming composition, the breaking energy of the buffer layer is easily within the above-mentioned range. Also, in addition to the above-mentioned components (a1) and (a2), the buffer layer forming composition may include a polyfunctional polymerizable compound (a3) and/or a polymerizable compound (a4) having a functional group. Further, in addition to the above-mentioned components (a1) to (a4), the buffer layer forming composition preferably includes a photopolymerization initiator, and other additives and resin components may be included within a range which does not compromise the effects of the present invention. In below, components included in the buffer layer forming composition including the energy ray polymerizable compound is described. (Urethane (Meth)Acrylate (a1)) Urethane (meth)acrylate (a1) is a compound having at least a (meth)acryloyl group and urethane bonds, and has a property of being polymerized and cured by energy ray irradiation. The urethane (meth)acrylate (a1) is oligomer or polymer. The weight average molecular weight (Mw) of the component (a1) is preferably 1000 to 100000, more preferably 2000 to 60000, and even more preferably 3000 to 15000. A number of (meth)acryloyl groups (which may also be referred to as “number of functional groups” in the following description) in the component (a1) may be monofunctional, bifunctional, or trifunctional or greater; and monofunctional or bifunctional is preferable. The component (a1) can be obtained by, for example, reacting (meth)acrylate having a hydroxyl group with a terminal isocyanate urethane prepolymer which is obtained by reacting a polyol compound with a polyvalent isocyanate compound. Note that, as the component (a1), one kind may be used alone, or two or more kinds may be combined for use. The polyol compound as a material of the component (a1) is not particularly limited as long as it is a compound having two or more hydroxy groups. Specific examples of the polyol compound include alkylene diol, polyether type polyol, polyester type polyol, polycarbonate type polyol, and the like. Among these, polyester type polyol or polycarbonate type polyol is preferable. The polyol compound may be any one of bifunctional diol, trifunctional triol, and tetrafunctional polyol or greater; but bifunctional diol is preferable; and polyester type diol or polycarbonate type diol is more preferable. Examples of the polyvalent isocyanate compound include; aliphatic polyisocyanates such as tetramethylene diisocyanate, hexamethylene diisocyanate, trimethylhexamethylene diisocyanate, and the like; alicyclic diisocyanates such as isophorone diisocyanate, norbornane diisocyanate, dicyclohexylmethane-4,4′-diisocyanate, dicyclohexylmethane-2,4′-diisocyanate, ω-ω′-diisocyanate dimethylcyclohexane, and the like; and aromatic diisocyanates such as 4,4′-diphenylmethane diisocyanate, tolylene diisocyanate, xylylene diisocyanate, tolidine diisocyanate, tetramethylene xylylene diisocyanate, naphthalene-1,5-diisocyanate, and the like. Among these, isophorone diisocyanate, hexamethylene diisocyanate, and xylylene diisocyanate are preferable. Urethane (meth)acrylate (a1) can be obtained by reacting (meth)acrylate having a hydroxy group with a terminal isocyanate urethane prepolymer obtained from the reaction of the above-mentioned polyol compound and a polyvalent isocyanate compound. The (meth)acrylate having a hydroxy group is not particularly limited as long as it is a compound having at least a hydroxy group and a (meth)acryloyl group in one molecule. Specific examples of the (meth)acrylate having a hydroxy group include; hydroxyalkyl (meth)acrylates such as 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, 4-hydroxybutyl (meth)acrylate, 4-hydroxycyclohexyl (meth)acrylate, 5-hydroxycyclooctyl (meth)acrylate, 2-hydroxy-3-phenyloxypropyl (meth)acrylate, pentaerythritol tri(meth)acrylate, polyethylene glycol mono(meth)acrylate, polypropylene glycol mono(meth)acrylate, and the like; hydroxy group-containing (meth)acrylamides such as N-methylol (meth)acrylamide and the like; and a reaction product obtained by reacting (meth)acrylic acid with vinyl alcohol, vinyl phenol, and diglycidyl ester of bisphenol A. Among these, hydroxyalkyl (meth)acrylate is preferable, and 2-hydroxyethyl (meth)acrylate is more preferable. Preferable condition for reacting terminal isocyanate urethane prepolymer and (meth)acrylate having a hydroxy group is under 60° C. to 100° C. for 1 to 4 hours in the presence of a solvent or a catalyst added if necessary. The content of the component (a1) in the buffer layer forming composition is preferably 10 to 70 mass %, and more preferably 20 to 60 mass % with respect to a total amount (100 mass %) of the buffer layer forming composition. (Polymerizable Compound (a2) Having an Alicyclic Group or a Heterocyclic Group Having 6 to 20 Ring-Forming Atoms) The component (a2) is a polymerizable compound having an alicyclic group or a heterocyclic group having 6 to 20 ring-forming atoms; more preferably a compound having at least one (meth)acryloyl group; and more preferably a compound having one (meth)acryloyl group. By using the component (a2), a film-forming property of the buffer layer forming composition can be improved. Although the definition of the component (a2) and the definition of the component (a4) which will be described in below partially overlap, the overlapping part is included in the component (a4). For example, a compound having at least one (meth)acryloyl group; an alicyclic group or a heterocyclic group having 6 to 20 ring-forming atoms; a functional group such as a hydroxyl group, an epoxy group, an amide group, an amino group, and the like; are included in the definitions of both of the component (a2) and the component (a4), but in the present invention, it is considered that such compounds are included in the component (a4). The number of ring-forming atoms of the alicyclic group or heterocyclic group included in the component (a2) is preferably 6 to 20, more preferably 6 to 18, even more preferably 6 to 16, and particularly preferably 7 to 12. Examples of the atom forming the ring structure of the heterocyclic group include a carbon atom, a nitrogen atom, an oxygen atom, a sulfur atom, and the like. Note that, the number of ring-forming atoms represents the number of atoms constituting the ring itself of a compound having a structure in which atoms are bonded in a ring form; and the number of ring-forming atoms does not include an atom which is not an constituent of the ring (for example, a hydrogen atom bonded to an atom constituting the ring) or an atom included in a substituent when the ring is substituted by the substituent. Specific examples of the component (a2) include; alicyclic group-containing (meth)acrylates such as isobornyl (meth)acrylate, dicyclopentenyl (meth)acrylate, dicyclopentanyl (meth)acrylate, dicyclopentenyloxy (meth)acrylate, cyclohexyl (meth)acrylate, adamantane (meth)acrylate, and the like; and heterocyclic group-containing (meth)acrylates such as tetrahydrofurfuryl (meth)acrylate, morpholine (meth)acrylate, and the like. Note that, as the component (a2), one kind of the component (a2) may be used alone, or two or more kinds may be combined for use. Among the alicyclic group-containing (meth)acrylates, isobornyl (meth)acrylate is preferable; and tetrahydrofurfuryl (meth)acrylate is preferable among the heterocyclic group-containing (meth)acrylates. A content of the component (a2) in the buffer layer forming composition is preferably 10 to 85 mass % and more preferably 15 to 80 mass % with respect to a total amount (100 mass %) of the buffer layer forming composition. Also, when isobornyl acrylate (IBXA) is used as the component (a2), a content of IBXA in the buffer layer forming composition is preferably 15 to 35 mass % with respect to a total amount (100 mass %) of the buffer layer forming composition. By having the content of IBXA within the above-mentioned range, the Young's modulus at 23° C. of the buffer layer can be easily controlled to be within the above-mentioned range. (Polyfunctional Polymerizable Compound (a3)) The polyfunctional polymerizable compound refers to a compound having two or more photopolymerizable unsaturated groups. A photopolymerizable unsaturated group is a functional group containing a carbon-carbon double bond, and examples thereof include a (meth)acryloyl group, a vinyl group, an allyl group, a vinylbenzyl group, and the like. Two or more kinds of photopolymerizable unsaturated groups may be used in combination. A three-dimensional network structure (crosslinked structure) is formed by a reaction between the photopolymerizable unsaturated group in the polyfunctional polymerizable compound and the (meth)acryloyl group in the component (a1), or by the photopolymerizable unsaturated groups in the component (a3) reacting with one another. When a polyfunctional polymerizable compound is used, the crosslinked structure formed by energy ray irradiation increases compared to a case in which a compound including only one photopolymerizable unsaturated group is used, thus the buffer layer exhibits a specific viscoelasticity, and the breaking energy can be easily regulated within the above-mentioned range. Although the definition of the component (a3), and the definition of the component (a2) and the component (a4) described partially overlap, the overlapping part is considered included in the component (a3). For example, a compound having an alicyclic group or a heterocyclic group having 6 to 20 ring-forming atoms and having two or more (meth)acryloyl groups is included in the definitions of both the component (a3) and the component (a2), but in the present invention, it is considered included in the component (a3). Also, although a compound containing a functional group such as a hydroxyl group, an epoxy group, an amide group, an amino group, and the like and also containing two or more (meth)acryloyl groups is included in the definition of both the component (a3) and the component (a4), but in the present invention, it is considered included in the component (a3). In view of the foregoing, the number of the photopolymerizable unsaturated groups (the number of functional groups) in the polyfunctional polymerizable compound is preferably 2 to 10, and more preferably 3 to 6. The weight average molecular weight of the component (a3) is preferably 30 to 40000, more preferably 100 to 10000, and even more preferably 200 to 1000. Specific examples of the component (a3) include diethylene glycol di(meth)acrylate, ethylene glycol di(meth)acrylate, tetraethylene glycol di(meth)acrylate, neopentyl glycol di(meth)acrylate, 1,6-hexanediol di(meth)acrylate, trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, pentaerythritol tetra(meth)acrylate, dipentaerythritol hexa(meth)acrylate, divinyl benzene, vinyl (meth)acrylate, divinyl adipate, N, N′-methylenebis (meth)acrylamide, and the like. As the component (a3), one kind of the component (a3) may be used alone, or two or more kinds may be combined for use. Among these, dipentaerythritol hexa(meth) acrylate is preferable. A content of the component (a3) in the buffer layer forming composition is preferably 2 to 40 mass %, more preferably 3 to 20 mass %, and even more preferably 5 to 15 mass % with respect to a total amount (100 mass %) of the buffer layer forming composition. (Polymerizable Compound (a4) Having a Functional Group) The component (a4) is a polymerizable compound including a functional group such as a hydroxyl group, an epoxy group, an amide group, an amino group, and the like; and the component (a4) is preferably a compound having at least one (meth)acryloyl group, more preferably it is a compound having one (meth)acryloyl group. The component (a4) has a good compatibility with the component (a1), and the component (a4) allows to easily adjust a viscosity of the buffer layer forming composition within an appropriate range. Also, the braking energy of the buffer layer formed from such composition tends to be easily within the above-mentioned range, and even when the buffer layer is made relatively thin, a good buffering property can be attained. Examples of the component (a4) include a hydroxyl group-containing (meth)acrylate, an epoxy group-containing compound, an amide group-containing compound, an amino group-containing (meth)acrylate, and the like. Examples of the hydroxyl group-containing (meth)acrylate include 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, 3-hydroxypropyl (meth)acrylate, 2-hydroxybutyl (meth)acrylate, 3-hydroxybutyl (meth)acrylate, 4-hydroxybutyl (meth)acrylate, phenylhydroxypropyl (meth)acrylate, 2-hydroxy-3-phenoxypropyl acrylate, and the like. Examples of the epoxy group-containing compound include glycidyl (meth)acrylate, methylglycidyl (meth)acrylate, allyl glycidyl ether, and the like; and among these, epoxy group-containing (meth)acrylates such as glycidyl (meth)acrylate, methylglycidyl (meth)acrylate, and the like are preferable. Examples of the amide group-containing compound include (meth)acrylamide, N, N-dimethyl (meth)acrylamide, N-butyl (meth)acrylamide, N-methylol (meth)acrylamide, N-methylolpropane (meth)acrylamide, N-methoxymethyl (meth)acrylamide, N-butoxymethyl (meth)acrylamide, and the like. Examples of the amino group-containing (meth)acrylate include primary amino group-containing (meth)acrylate, secondary amino group-containing (meth)acrylate, tertiary amino group-containing (meth)acrylate, and the like. Among these, hydroxyl group-containing (meth)acrylate is preferable, and hydroxyl group-containing (meth)acrylate having an aromatic ring such as phenylhydroxypropyl (meth)acrylate is more preferable. Note that, as the component (a4), one kind of the component (a4) may be used alone, or two or more kinds may be combined for use. In order to easily attain the breaking energy of the buffer layer within the above-mentioned range and to improve the film forming property of the buffer layer forming composition, a content of the component (a4) in the buffer layer forming composition is preferably 5 to 40 mass %, more preferably 7 to 35 mass %, even more preferably 10 to 30 mass %, and particularly preferably 13 to 25 mass % with respect to a total amount (100 mass %) of the buffer layer forming composition. In addition, the content ratio [(a2)/(a4)] of the component (a2) and the component (a4) in the buffer layer forming composition is preferably 0.5 to 3.0, more preferably 1.0 to 3.0, even more preferably 1.3 to 3.0, and particularly preferably 1.5 to 2.8. (Polymerizable Compound (a5) Other than Components (a1) to (a4)) The buffer layer forming composition may include polymerizable compounds (a5) other than the above-mentioned components (a1) to (a4) as long as the effects of the present invention are not impaired. Examples of the component (a5) include alkyl (meth)acrylates having an alkyl group having 1 to 20 carbon atoms; and vinyl compounds such as styrene, hydroxyethyl vinyl ether, hydroxybutyl vinyl ether, N-vinylformamide, N-vinylpyrrolidone, N-vinylcaprolactam, and the like. As the component (a5), one kind of the component (a5) may be used alone, or two or more kinds may be combined for use. The content of the component (a5) in the buffer layer forming composition is preferably 0 to 20 mass %, more preferably 0 to 10 mass %, even more preferably 0 to 5 mass %, and particularly preferably 0 to 2 mass %. (Photopolymerization Initiator) When the buffer layer is formed, the buffer layer forming composition preferably further includes a photopolymerization initiator to reduce polymerization time by light irradiation and to reduce the amount of light irradiation. Examples of the photopolymerization initiator include benzoin compounds, acetophenone compounds, acylphosphine oxide compounds, titanocene compounds, thioxanthone compounds, peroxide compounds, and further include photosensitizers such as amines, quinones, and the like. More specific examples include 1-hydroxycyclohexyl phenyl ketone, 2-hydroxy-2-methyl-1-phenyl-propane-1-one, benzoin, benzoin methyl ether, benzoin ethyl ether, benzoin isopropyl ether, benzylphenyl sulfide, tetramethylthiuram monosulfide, azobisisobutyrol nitrile, dibenzyl, diacetyl, 8-chloranthraquinone, bis (2,4,6-trimethylbenzoyl) phenylphosphine oxide, and the like. As these photopolymerization initiators, one photopolymerization initiator may be used alone, or two or more thereof may be combined for use. A content of the photopolymerization initiator in the buffer layer forming composition is preferably 0.05 to 15 parts by mass, more preferably 0.1 to 10 parts by mass, and even more preferably 0.3 to 5 parts by mass with respect to 100 parts by mass of the total amount of the energy ray polymerizable compound. (Other Additives) The buffer layer forming composition may include other additives as long as the effects of the present invention are not impaired. Examples of other additives include an antistatic agent, an antioxidant, a softener (plasticizer), a filler, a rust inhibitor, a pigment, a dye, and the like. When these additives are used, a content of each additive in the buffer layer forming composition is preferably 0.01 to 6 parts by mass, more preferably 0.1 to 3 parts by mass with respect to 100 parts by mass of the total amount of the energy ray polymerizable compound. (Resin Component) The buffer layer forming composition may contain a resin component as long as the effects of the present invention are not impaired. Examples of the resin component include a polyene-thiol-based resin; a polyolefin-based resin such as polybutene, polybutadiene, polymethylpentene, and the like; a thermoplastic resin such as a styrene-based copolymer, and the like. The content of these resin components in the buffer layer forming composition is preferably 0 to 20 mass %, more preferably 0 to 10 mass %, even more preferably 0 to 5 mass %, and particularly preferably 0 to 2 mass %. The buffer layer formed of the buffer layer forming composition which includes the energy ray polymerizable compound is obtained by polymerizing and curing the buffer layer forming composition having the above-mentioned composition by energy ray irradiation. That is, the buffer layer is a cured product of the buffer layer forming composition. Thus, the buffer layer includes a polymerization unit derived from the component (a1) and a polymerization unit derived from the component (a2). Also, the buffer layer preferably includes a polymerization unit derived from the component (a3) and/or a polymerization unit derived from the component (a4), and the buffer layer may further include a polymerization unit derived from the component (a5). The content ratio of each polymerization unit in the buffer layer usually matches with the ratio (feed ratio) of each component constituting the buffer layer forming composition. For example, when the content of the component (a1) in the buffer layer forming composition is 10 to 70 mass % with respect to a total amount (100 mass %) of the buffer layer forming composition, the buffer layer includes 10 to 70 mass % of the polymerization unit derived from the component (a1). Further, when the content of the component (a2) in the buffer layer forming composition is 10 to 85 mass % with respect to a total amount (100 mass %) of the buffer layer forming composition, the buffer layer includes 10 to 85 mass % of the polymerization unit derived from the component (a2). The same applies to the components (a3) to (a5). <Layer Including Polyolefin Resin Film> By forming the buffer layer using the layer including a polyolefin resin film, the breaking energy of the buffer layer is easily regulated within the above-mentioned range. When the buffer layer is the layer including a polyolefin resin film, a stress relieving property may be lower than when the buffer layer is a layer formed by a buffer layer forming composition which includes an energy ray polymerizable compound. In this case, warpage may occur to the adhesive tape having the buffer layer formed of the layer including the polyolefin resin film on one surface of the base. The buffer layer formed by the layer including the polyolefin resin film is provided on at least one surface of the base, however from the point of preventing such problems, the buffer layer formed by the layer including a polyolefin resin film is preferably provided on the both faces of the base. The polyolefin resin is not particularly limited, and examples thereof include polyethylene resins such as very low density polyethylene (VLDPE, density: 880 kg/m3or more and less than 910 kg/m3), low density polyethylene (LDPE, density: 910 kg/m3or more and less than 930 kg/m3), medium density polyethylene (MDPE, density: 930 kg/m3or more and less than 942 kg/m3), high density polyethylene (HDPE, density: 942 kg/m3or more) and the like; a polypropylene resin; a polyethylene-polypropylene copolymer; an olefin-based elastomer (TPO); a cycloolefin resin; an ethylene-vinyl acetate copolymer (EVA); an ethylene-vinyl acetate maleic anhydride copolymer; an ethylene-(meth)acrylic acid copolymer; an ethylene-(meth)acrylic acid ester copolymer; an ethylene-(meth)acrylic acid ester-maleic anhydride copolymer; and the like. These polyolefin resins may be used alone, or two or more thereof may be combined for use. Among the above-mentioned polyolefin resins, a polyethylene resin is preferable, and a low-density polyethylene is more preferable in view of obtaining the buffer layer having specific physical properties. The buffer layer may include additives such as a plasticizer, a lubricant, an infrared absorber, an ultraviolet absorber, a filler, a colorant, an antistatic agent, an antioxidant, a catalyst, and the like as long as the effects of the present invention are not impaired. Also, the buffer layer described above may be transparent or opaque, and may be colored or vapor-deposited as desired. In the present embodiment, when the buffer layer is the cured product of the buffer layer forming composition including energy ray curable compound, the Young's modulus and the breaking energy at 23° C. of the buffer layer can be controlled by regulating the weight average molecular weight of the above-mentioned urethane (meth)acrylate (a1) and by regulating the thickness of the buffer layer, and also by appropriately selecting the type of the monomer. Also, when the buffer layer is the layer including a polyolefin resin film, the breaking energy and the Young's modulus at 23° C. of the buffer layer can be controlled by regulating the density of polyolefin, and also by appropriately selecting the additives. [Adhesive Layer] The adhesive layer is not particularly limited as long as it has an appropriate pressure sensitive adhesiveness at normal temperature, and preferably the adhesive layer has a shear storage elastic modulus at 23° C. of 0.05 to 0.50 MPa. Circuits and the like are formed on the front surface of the semiconductor wafer, thus the surface of the wafer is usually uneven. By having the shear storage elastic modulus of the adhesive layer within the above-mentioned range, when the adhesive tape is adhered to the uneven surface of the wafer, the unevenness of the surface of the wafer and the adhesive layer can sufficiently contact with each other, and the adhesiveness of the adhesive layer is appropriately exhibited. Therefore, the adhesive tape can be securely adhered to the semiconductor wafer, and also the wafer surface can be appropriately protected while backside grinding is performed. From such point of view, the shear storage elastic modulus of the adhesive layer is more preferably 0.12 to 0.35 MPa. Note that, the shear storage elastic modulus of the adhesive layer means a shear storage elastic modulus before curing by energy ray irradiation in case the adhesive layer is formed by an energy ray curable adhesive agent. The shear storage elastic modulus can be measured by the following method. An adhesive layer having a thickness of approximately 0.5 to 1 mm is punched into a circular shape having a diameter of 7.9 mm, and then this is used as a measurement sample. Using a dynamic viscoelasticity measuring apparatus ARES manufactured by Rheometric Scientific Ltd., the elastic modulus of the measurement sample is measured while changing temperature at a temperature increasing rate of 3° C./min and at a frequency of 1 Hz within a temperature range of −30° C. to 150° C. The elastic modulus at the measurement temperature of 23° C. is defined as the shear storage elastic modulus at 23° C. The thickness of the adhesive layer is preferably less than 100 μm, more preferably 5 to 80 μm, and even more preferably 10 to 70 μm. When the adhesive layer is made thin as mentioned in above, the tape debris generated while cutting the adhesive tape can be reduced, and also cracks to the semiconductor chips can be prevented even more easily which is generated during backside grinding is performed to the semiconductor wafer. The adhesive layer is formed by, for example, an acrylic-based adhesive agent, a urethane-based adhesive agent, a rubber-based adhesive agent, a silicone-based adhesive agent, and the like; and an acrylic-based adhesive agent is preferable. Also, the adhesive layer is preferably formed by an energy ray curable adhesive agent. By forming the adhesive layer using an energy ray curable adhesive agent, the shear storage elastic modulus at 23° C. can be regulated within the above-mentioned range before curing by energy ray irradiation and the releasing force after curing can be easily regulated within 1000 mN/50 mm or less. Specific examples of the adhesive agent will now be described in detail, but these are non-limiting examples, and the adhesive layer of the present invention should not be limited thereto. As the energy ray curable adhesive agent, for example, in addition to a non-energy ray curable adhesive resin (also referred to as “adhesive resin I”), an energy ray curable adhesive composition including an energy ray curable compound other than the adhesive resin (also referred to as an “X-type adhesive composition” in the following) may be mentioned. Also, as the energy ray curable adhesive agent, an adhesive composition (also referred to as “Y-type adhesive composition” in the following) may also be used, which includes an energy ray curable adhesive resin (also referred to as “adhesive resin II” in the following) having an unsaturated group introduced into a side chain of a non-energy ray curable adhesive resin as a main component, and does not include an energy ray curable compound other than the adhesive resin. Moreover, as the energy ray curable adhesive agent, a combination of an X-type and a Y-type may be used, that is, an energy ray curable adhesive composition (also referred to as an “XY-type adhesive composition” in the following) may be used which includes an energy ray curable compound other than an adhesive resin, in addition to the energy ray curable adhesive resin II. Among these, the XY-type adhesive composition is preferably used. By using the XY-type, a sufficient adhesive property before curing can be attained and the releasing force against the semiconductor wafer after curing can be made sufficiently low. Note that, the adhesive agent may be formed by a non-energy ray curable adhesive composition which does not cure by energy ray irradiation. The non-energy ray curable adhesive composition includes at least the non-energy ray curable adhesive resin I but does not include the energy ray curable adhesive resin II and the energy ray curable compound which are mentioned in above. In below, the term “adhesive resin” is used as a term referring to one or both of the above-mentioned adhesive resin I and the adhesive resin II. Specific examples of the adhesive resin include an acrylic-based resin, a urethane-based resin, a rubber-based resin, a silicone-based resin, and the like; and an acrylic-based resin is preferable. Below describes in further detail regarding an acrylic-based adhesive agent using the acrylic-based resin as the adhesive resin. As the acrylic-based resin, acrylic-based polymer (b) is used. The acrylic-based polymer (b) is obtained by polymerizing a monomer including at least alkyl (meth)acrylate, and includes a structural unit derived from alkyl (meth)acrylate. Examples of alkyl (meth)acrylate include those having 1 to 20 carbon atoms of the alkyl group, and the alkyl group may be linear or branched. Specific examples of alkyl (meth)acrylate include methyl (meth)acrylate, ethyl (meth)acrylate, isopropyl (meth)acrylate, n-propyl (meth)acrylate, n-butyl (meth)acrylate, 2-ethylhexyl (meth)acrylate, n-octyl (meth)acrylate, isooctyl (meth)acrylate, nonyl (meth)acrylate, decyl (meth)acrylate, undecyl (meth)acrylate, dodecyl (meth)acrylate, and the like. One kind of the alkyl (meth)acrylates may be used alone or two or more kinds may be combined for use. Also, the acrylic-based polymer (b) preferably includes a structural unit derived from alkyl (meth)acrylate having 4 or more carbon atoms of an alkyl group from the point of improving the adhesive strength of the adhesive layer. The alkyl (meth)acrylate preferably has 4 to 12 carbon atoms, and more preferably 4 to 6 carbon atoms. The alkyl (meth)acrylate having 4 or more carbon atoms of an alkyl group is preferably alkyl acrylate. In the acrylic-based polymer (b), alkyl (meth)acrylate having 4 or more carbon atoms of an alkyl group is preferably 40 to 98 mass %, more preferably 45 to 95 mass %, and even more preferably 50 to 90 mass % with respect to the total amount of the monomers constituting the acrylic-based polymer (b) (also may be simply referred as “total amount of the monomer” in the following description). In order to adjust the elastic modulus and the adhesive properties of the adhesive layer, preferably the acrylic-based polymer (b) is a copolymer containing a structural unit derived from alkyl (meth)acrylate having 1 to 3 carbon atoms of an alkyl group, in addition to a structural unit derived from alkyl (meth)acrylate having 4 or more carbon atoms of an alkyl group. The alkyl (meth)acrylate is preferably alkyl (meth)acrylate having 1 or 2 carbon atoms, more preferably methyl (meth)acrylate, and most preferably methyl methacrylate. In the acrylic-based polymer (b), alkyl (meth)acrylate having 1 to 3 carbon atoms of an alkyl group is preferably 1 to 30 mass %, more preferably 3 to 26 mass %, and even more preferably 6 to 22 mass % with respect to the total amount of the monomer. The acrylic-based polymer (b) preferably has a structural unit derived from a functional group-containing monomer, in addition to the structural unit derived from the above-mentioned alkyl (meth)acrylate. Examples of the functional group of the functional group-containing monomer include a hydroxyl group, a carboxy group, an amino group, an epoxy group, and the like. The functional group-containing monomer reacts with a crosslinking agent described below to form crosslinking point, or reacts with an unsaturated group-containing compound and enables to introduce an unsaturated group to a side chain of the acrylic-based polymer (b). Examples of the functional group-containing monomer include a hydroxyl group-containing monomer, a carboxy group-containing monomer, an amino group-containing monomer, an epoxy group-containing monomer, and the like. One kind of these monomers may be used alone or two or more kinds may be combined for use. Among these, a hydroxyl group-containing monomer and a carboxy group-containing monomer are preferable; and a hydroxyl group-containing monomer is more preferable. Examples of the hydroxyl group-containing monomer include hydroxyalkyl (meth)acrylates such as 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, 3-hydroxypropyl (meth)acrylate, 2-hydroxybutyl (meth)acrylate, 3-hydroxybutyl (meth)acrylate, 4-hydroxybutyl (meth)acrylate, and the like; and unsaturated alcohols such as vinyl alcohol, allyl alcohol, and the like. Examples of the carboxy group-containing monomer include ethylene unsaturated monocarboxylic acids such as (meth)acrylic acid, crotonic acid, and the like; and ethylene unsaturated dicarboxylic acids such as fumaric acid, itaconic acid, maleic acid, citraconic acid, and anhydrides thereof; and 2-carboxyethyl methacrylate. The functional group-containing monomer is preferably 1 to 35 mass %, more preferably 3 to 32 mass %, and even more preferably 6 to 30 mass % with respect to the total amount of the monomers constituting the acrylic-based polymer (b). Also, the acrylic-based polymer (b) may include a structural unit derived from a monomer copolymerizable with the above-mentioned acrylic-based monomers such as styrene, α-methyl styrene, vinyltoluene, vinyl formate, vinyl acetate, acrylonitrile, acrylamide, and the like. The above-mentioned acrylic-based polymer (b) can be used as a non-energy ray curable adhesive resin I (acrylic-based resin). Examples of the energy ray curable acrylic resin include those obtained by reacting a compound having a photopolymerizable unsaturated group (also referred as an unsaturated group-containing compound) with the functional group of the above-mentioned acrylic-based polymer (b). The unsaturated group-containing compound is a compound having both a photopolymerizable unsaturated group and a substituent capable of bonding to a functional group of the acrylic-based polymer (b). Examples of the photopolymerizable unsaturated group include a (meth)acryloyl group, a vinyl group, an allyl group, a vinylbenzyl group, and the like; and a (meth)acryloyl group is preferable. Also, as examples of the substituent capable of bonding to the functional group included in the unsaturated group-containing compound, an isocyanate group, a glycidyl group, and the like may be mentioned. Thus, examples of the unsaturated group-containing compound include (meth)acryloyloxyethyl isocyanate, (meth)acryloyl isocyanate, glycidyl (meth)acrylate, and the like. Preferably, the unsaturated group-containing compound reacts with part of a functional group of the acrylic-based polymer (b); and specifically, more preferably the unsaturated group-containing compound reacts with 50 to 98 mol % and more preferably 55 to 93 mol % of the functional group included in the acrylic-based polymer (b). As such, in the energy ray curable acrylic resin, part of the functional group remains without being reacting with the unsaturated group-containing compound; and thereby crosslinking reaction by the crosslinking agent is facilitated. Note that, the weight average molecular weight (Mw) of the acrylic-based resin is preferably from 300000 to 1600000, more preferably 400000 to 1400000, and even more preferably 500000 to 1200000. (Energy Ray Curable Compound) The energy ray curable compound included in the X-type or XY-type adhesive composition is preferably a monomer or an oligomer having an unsaturated group in its molecule, and capable of being polymerized and cured by energy ray irradiation. Examples of such energy ray curable compounds include polyvalent (meth)acrylate monomers such as trimethylolpropane tri(meth)acrylate, pentaerythritol (meth)acrylate, pentaerythritol tetra(meth)acrylate, dipentaerythritol hexa(meth)acrylate, 1,4-butylene glycol di(meth)acrylate, 1,6-hexanediol (meth)acrylate, and the like; and oligomers such as urethane (meth)acrylate, polyester (meth)acrylate, polyether (meth)acrylate, epoxy (meth)acrylate, and the like. Among these, a urethane (meth)acrylate oligomer is preferable since the molecular weight is relatively high and the shear storage elastic modulus of the adhesive layer is barely lowered. The molecular weight (the weight average molecular weight in case of an oligomer) of the energy ray curable compound is preferably 100 to 12000, more preferably 200 to 10000, even more preferably 400 to 8000, and particularly preferably 600 to 6000. The content of the energy ray curable compound in the X-type adhesive composition is preferably 40 to 200 parts by mass, more preferably 50 to 150 parts by mass, and even more preferably 60 to 90 parts by mass with respect to 100 parts by mass of the adhesive resin. The content of the energy ray curable compound in the XY-type adhesive composition is preferably 1 to 30 parts by mass, more preferably 2 to 20 parts by mass, and even more preferably 3 to 15 parts by mass with respect to 100 parts by mass of the adhesive resin. In the XY-type adhesive composition, since the adhesive resin is energy ray curable, the releasing force can be sufficiently lowered after energy ray irradiation even if the content of the energy ray curable compound is small. (Crosslinking Agent) The adhesive composition preferably further includes a crosslinking agent. The crosslinking agent, for example, reacts with a functional group derived from a functional group-containing monomer included in the adhesive resin and thereby the adhesive resin is crosslinked. Examples of the crosslinking agent include isocyanate-based crosslinking agents such as tolylene diisocyanate, hexamethylene diisocyanate, and the like and also adducts thereof; epoxy-based crosslinking agents such as ethylene glycol glycidyl ether and the like; aziridine-based crosslinking agents such as hexane [1-(2-methyl)-aziridinyl) triphosphatriazine, and the like; and chelating-based crosslinking agents such as aluminum chelate and the like. One kind of these crosslinking agents may be used alone or two or more kinds may be combined for use. Among these, an isocyanate-based crosslinking agent is preferable in view of increasing the cohesive force to improve the adhesive strength, and also because it is easy to obtain. From the point of facilitating the crosslinking reaction, the amount of the crosslinking agent is preferably 0.01 to 10 parts by mass, more preferably 0.03 to 7 parts by mass, and even more preferably 0.05 to 4 parts by mass with respect to 100 parts by mass of the adhesive resin. (Photopolymerization Initiator) When the adhesive composition is energy-ray curable, the adhesive composition preferably further includes a photopolymerization initiator. By including the photopolymerization initiator, the curing reaction of the adhesive composition can be sufficiently facilitated even when energy ray having relatively low energy such as ultraviolet rays and the like is irradiated. Examples of the photopolymerization initiator include benzoin compounds, acetophenone compounds, acylphosphinoxide compounds, titanocene compounds, thioxanthone compounds, peroxide compounds, and photosensitizers such as amines, quinones, and the like. More specific examples include 1-hydroxycyclohexyl phenyl ketone, 2-hydroxy-2-methyl-1-phenyl-propan-1-one, benzoin, benzoin methyl ether, benzoin ethyl ether, benzoin isopropyl ether, benzylphenyl sulfide, tetramethylthiuram monosulfide, azobisisobutyrol nitrile, dibenzyl, diacetyl, 8-chloranthraquinone, bis (2,4,6-trimethylbenzoyl) phenylphosphine oxide, and the like. One kind of these photopolymerization initiators may be used alone or two or more kinds may be combined for use. The content of the photopolymerization initiator is preferably 0.01 to 10 parts by mass, more preferably 0.03 to 5 parts by mass, and even more preferably 0.05 to 5 parts by mass with respect to 100 parts by mass of the adhesive resin. (Other Additives) The adhesive composition may contain other additives as long as the effects of the present invention are not impaired. Examples of other additives include an antistatic agent, an antioxidant, a softener (plasticizer), a filler, a rust inhibitor, a pigment, a dye, and the like. When such additives are used, the content of the additive is preferably 0.01 to 6 parts by mass with respect to 100 parts by mass of the adhesive resin. From the point of improving the coating property of the adhesive composition against the base, the buffer layer, and the release sheet, the adhesive composition may be further diluted with an organic solvent to form the adhesive composition in a solution form. Examples of the organic solvent include methyl ethyl ketone, acetone, ethyl acetate, tetrahydrofuran, dioxane, cyclohexane, n-hexane, toluene, xylene, n-propanol, isopropanol, and the like. Regarding these organic solvents, the organic solvent used for the synthesis of the adhesive resin may be used as it is, or one or more kinds of organic solvents other than the ones used for the synthesis may be added so that the solution of the adhesive composition can be uniformly coated. [Release Sheet] A release sheet may be adhered to a surface of the adhesive tape. Specifically, the release sheet is adhered to the surface of the adhesive layer of the adhesive tape. The release sheet protects the adhesive layer during transportation and while storing by adhering to the surface of the adhesive layer. The release sheet is adhered to the adhesive tape in a releasable manner and it is released and removed from the adhesive tape before the adhesive tape is used (that is, before the wafer is adhered). As the release sheet, a release sheet having at least one surface performed with a releasing treatment is used, and a specific example is a release sheet of which a release agent is applied to a release sheet base. The release sheet base is preferably a resin film, and examples of the resin constituting the resin film include polyester resin films such as a polyethylene terephthalate resin, a polybutylene terephthalate resin, a polyethylene naphthalate resin, and the like; and polyolefin resins such as a polypropylene resin, a polyethylene resin, and the like. Examples of the release agent include a silicone-based resin, an olefin-based resin, an isoprene-based resin, a rubber-based elastomers such as a butadiene-based resin and the like, a long-chain alkyl based resin, an alkyd-based resin, a fluorine-based resin, and the like. A thickness of the release sheet is not particularly limited; and it is preferably 10 to 200 μm, and more preferably 20 to 150 μm. [Method for Producing Adhesive Tape] A method for producing the adhesive tape of the present invention is not particularly limited, and can be produced by a known method. For example, the following is a method for producing the adhesive tape having the base, the buffer layer provided on one surface of the base, and the adhesive layer provided on the other surface of the base. When the buffer layer is formed by the buffer layer forming composition that includes the energy ray polymerizable compound, the buffer layer provided by coating and curing the buffer layer forming composition on a release sheet is adhered to the base, and the release sheet is then removed, thereby a laminate of the buffer layer and the base is obtained. Also, when the buffer layer is a layer including a polyolefin resin film, the laminate of the buffer layer and the base is obtained by adhering the buffer layer and the base. Then, the adhesive layer provided on the release sheet is adhered to the laminate on the base side, and thereby the adhesive tape in which the release sheet is adhered to the surface of the adhesive layer can be produced. The release sheet adhered to the surface of the adhesive layer may be appropriately released and removed before using the adhesive tape. As a method for forming the buffer layer on the release sheet, the buffer layer may be formed by directly applying the buffer layer forming composition on the release sheet by a known coating method to form a coating film, and then energy ray is irradiated to the coating film. Alternatively, the buffer layer may be formed by directly applying the buffer layer forming composition to one surface of the base and the coating film may be heat-dried or energy ray may be irradiated. Examples of the coating method of the buffer layer forming composition include a spin coating method, a spray coating method, a bar coating method, a knife coating method, a roll coating method, a blade coating method, a die coating method, a gravure coating method, and the like. Also, in order to improve the coating property, the buffer layer forming composition may be combined with an organic solvent, and may be coated on the release sheet in a solution form. When the buffer layer forming composition includes an energy ray polymerizable compound, preferably the coating film of the buffer layer forming composition is cured by irradiating energy ray, and thereby the buffer layer is formed. The buffer layer may be cured by one curing treatment or curing may be performed in a plurality of individual times. For example, after the buffer layer is formed by completely curing the coating film on the release sheet, the buffer layer thus obtained may be adhered to the base; and alternatively, a buffer layer forming film in a semi-cured state may be formed without completely curing the coating film, and the buffer layer forming film may be adhered to the base and the buffer layer may be then completely cured by energy ray irradiation. Thereby, the buffer layer may be formed. Ultraviolet rays are preferable as energy ray irradiation for the curing treatment. Note that, the coating film of the buffer layer forming composition may be exposed at the time of curing, and preferably the coating film may be covered with the release sheet or the base and curing is preferably performed by energy ray irradiation while the coating film is unexposed. When the buffer layer is a layer including a polyolefin resin film, the buffer layer may be adhered to the base by extrusion lamination. Specifically, the polyolefin resin constituting the buffer layer is melted and kneaded by using a T-die film machine and the like, and the melted polyolefin resin is extrusion laminated on one surface of the base while moving the base at a constant speed. The buffer layer may be directly laminated on the base by heat sealing and the like. Further, the buffer layer may be laminated with an easy-adhesion layer in between by a method such as dry lamination and the like. As a method for forming the adhesive layer on the release sheet, the adhesive layer can be formed by directly coating the adhesive agent (adhesive composition) on the release sheet by a known coating method and then heat-drying the coating film. The adhesive layer may be formed by directly coating the adhesive agent (adhesive composition) to one surface of the base. Examples of the method for applying the adhesive agent include a spray coating method, a bar coating method, a knife coating method, a roll coating method, a blade coating method, a die coating method, a gravure coating method, and the like which are also shown in the method for producing the buffer layer. Note that, a method for producing the adhesive tape provided with buffer layers on both surfaces of the base may be performed by, for example, obtaining a laminate in which the buffer layer, the base, and the buffer layer are laminated in this order, and then the adhesive layer may be formed on one of the buffer layers. [Method for Producing Semiconductor Device] Preferably, the adhesive tape according to the present invention is adhered to the front surface of the semiconductor wafer and it is used when backside grinding of the wafer is performed. More preferably, the adhesive tape according to the present invention is used when performing DBG in which backside grinding of the wafer and dicing of the wafer are performed simultaneously. Particularly preferably, the adhesive tape according to the present invention is used in LDBG in which a group of chips each having a small kerf width is obtained when a semiconductor wafer is diced. The term “a group of chips” refers to a plurality of semiconductor chips having a wafer shape held on the adhesive tape according to the present invention. As a non-limiting example regarding the use of the adhesive tape, a method for producing a semiconductor device will now be described in detail. Specifically, the method for producing the semiconductor device includes at least steps 1 to 4 shown below.Step 1: adhering the above-mentioned adhesive tape to a front surface of the semiconductor wafer, and then cutting the adhesive tape along the outer circumference of the semiconductor wafer.Step 2: forming a groove from the front surface of the semiconductor wafer or forming a modified region inside the semiconductor wafer from the front surface or a back surface of the semiconductor wafer.Step 3: dicing the semiconductor wafer, of which the adhesive tape is adhered to the front surface and the above-mentioned groove or the modified region is formed, using the groove or the modified region as a starting point for forming a plurality of chips by grinding the semiconductor wafer from the back surface.Step 4: releasing the adhesive tape from the diced semiconductor wafer (that is, the plurality of chips). Each step of the above-mentioned method for producing the semiconductor device will now be described in detail. (Step 1) In Step 1, the adhesive tape according to the present invention is adhered to the front surface of the semiconductor wafer via the adhesive layer, then the adhesive tape is cut along the outer circumference of the semiconductor wafer. The adhesive tape is adhered so that it covers the semiconductor wafer and also outer table which extends around the semiconductor wafer. Then, the adhesive tape is cut along the outer circumference of the semiconductor wafer using a cutter and the like. A cutting speed is usually 10 to 300 mm/s. A temperature of a cutter blade may be room temperature, or the cutter blade may be heated and then cut. This step may be performed before Step 2, which will be described later, or may be performed after Step 2. For example, in case of forming the modified region in the semiconductor wafer, Step 1 is preferably performed before Step 2. On the other hand, in case of forming the groove to the front surface of the semiconductor wafer by dicing and the like, Step 1 is performed after Step 2. That is, the adhesive tape is adhered in this Step 1 to the front surface of the wafer having the groove formed in Step 2, which will be described later. The semiconductor wafer used in the present producing method may be a silicon wafer; a wafer of gallium arsenide, silicon carbide, lithium tantalate, lithium niobate, gallium nitride, indium phosphide, and the like; or a glass wafer. The thickness of the semiconductor wafer before grinding is not particularly limited, and usually it is about 500 to 1000 μm. Also, the semiconductor wafer usually has circuits formed on a surface thereof. The circuits are formed to the wafer surface by various methods including generally used conventional methods such as an etching method, a lift-off method, and the like. (Step 2) In Step 2, the groove is formed from the front surface of the semiconductor wafer, or the modified region is formed inside the semiconductor wafer from the front surface or the back surface of the semiconductor wafer. The groove formed in this step is a groove having a depth shallower than the thickness of the semiconductor wafer. The groove can be formed by dicing using a conventionally known wafer dicing apparatus and the like. In Step 3 which is described later, the semiconductor wafer is divided along the groove into a plurality of semiconductor chips. Also, the modified region is a brittle portion; and during the grinding step, the semiconductor wafer becomes thinner, or the semiconductor wafer is broken as force is applied during grinding, then the brittle portion function as a starting point to dice into the semiconductor chips. That is, the groove and the modified region formed during Step 2 are formed along a dividing line which is used to divide the semiconductor wafer into semiconductor chips in Step 3 that will be described later. The modified region is formed by laser irradiation which is focused to the inside of the semiconductor wafer, thereby the modified region is formed to the inside of the semiconductor wafer. The laser irradiation may be performed from the front surface side or the back surface side of the semiconductor wafer. Note that, when the modified region is formed, if Step 2 is performed after Step 1 and laser irradiation is performed from the front surface of the wafer, the semiconductor wafer is to be irradiated with laser beam through the adhesive tape. The semiconductor wafer adhered with the adhesive tape and formed with the modified region or the groove is placed on a chuck table, and the semiconductor wafer is sucked and held by the chuck table. At this time, the front surface side of the semiconductor wafer is placed on a side of the table and the semiconductor wafer is suctioned. (Step 3) After Step 1 and Step 2, the back surface of the semiconductor wafer on the chuck table is ground to dice the semiconductor wafer into a plurality of semiconductor chips. Here, when the groove is formed to the semiconductor wafer, backside grinding is performed by thinning the semiconductor wafer until at least to the bottom of the groove. By this backside grinding, the groove cuts through the wafer, and the semiconductor wafer is divided at this cut and thereby diced into individual semiconductor chips. On the other hand, when the modified region is formed, the grinding surface (the back surface of the wafer) may reach the modified region by grinding, but may not precisely reach the modified region. That is, the semiconductor wafer may be ground close to the modified region so that the semiconductor wafer is broken from the modified region as a starting point and diced into semiconductor chips. For example, actual dicing of the semiconductor chips may be performed by adhering a pickup tape that will be described later and then stretching the pickup tape. After backside grinding is completed, dry polishing may be performed prior to picking up the chips. Each of the diced semiconductor chips may have a square shape or an elongated shape such as a rectangular shape and the like. The thickness of the diced semiconductor chip is not particularly limited, and it is preferably about 5 to 100 μm, and more preferably 10 to 45 μm. According to LDBG in which the modified region is provided on the inside of the wafer by laser, and the wafer is diced by a stress and the like while backside grinding of the wafer, the thickness of the diced semiconductor chips is 50 or less, and more preferably 10 to 45 μm. Also, the size of the diced semiconductor chip is not particularly limited, but is preferably less than 600 mm2, more preferably less than 400 mm2, and even more preferably less than 300 mm2. When the adhesive tape of the present invention is used, even for such thin and/or compact semiconductor chips, cracks of the semiconductor chips are prevented while backside grinding (Step 3) and while releasing the adhesive tape (Step 4). (Step 4) Next, the semiconductor processing adhesive tape is released from the diced semiconductor wafer (that is, a plurality of semiconductor chips). This step is performed, for example, by the following method. First, when the adhesive layer of the adhesive tape is formed by an energy ray curable adhesive agent, the adhesive layer is cured by energy ray irradiation. Next, a pickup tape is adhered to the back surface side of the diced semiconductor wafer, and position and direction are aligned so that the chips can be picked up. At this time, a ring frame placed on the outer peripheral side of the wafer is also adhered to the pickup tape, and the outer peripheral edge portion of the pickup tape is fixed to the ring frame. The pickup tape may be adhered to the wafer and the ring frame at the same time, or may be adhered at different timings. The adhesive tape is then released from the plurality of semiconductor chips held by the pickup tape. Then, a plurality of semiconductor chips on the pickup tape are picked up and fixed on a substrate and the like to produce a semiconductor device. The pickup tape is not particularly limited, and is formed by, for example, an adhesive tape including a base and an adhesive layer provided on at least one surface of the base. Also, a bonding tape may be used instead of the pickup tape. Examples of the bonding tape include a laminate of a film-shaped bonding agent and a release sheet; a laminate of a dicing tape and a film-shaped bonding agent; a dicing die-bonding tape made of a release sheet and a bonding layer which function as both a dicing tape and a die-bonding tape. Also, before adhering the pickup tape, the film-shaped bonding agent may be adhered to the back surface side of the diced semiconductor wafer. When the film-shaped bonding agent is used, the film-shaped bonding agent may have a shape identical to the shape of the wafer. When the bonding tape is used or the film-shaped bonding agent is adhered to the back surface side of the semiconductor wafer which is diced before the pickup tape is adhered, the plurality of semiconductor chips on the bonding tape or the pickup tape are picked up together with the bonding layer divided into shapes identical to the shapes of the semiconductor chips. The semiconductor chips are then fixed on a substrate and the like with the bonding layer in between, thereby the semiconductor device is produced. The bonding layer is diced by laser or by expansion. Hereinabove, the adhesive tape according to the present invention is described using the method of dicing the semiconductor wafer by DBG or LDBG as examples, and the adhesive tape according to the present invention can be preferably used in LDBG in which a group of chips having even thinner thickness and has a small kerf width is obtained after dicing the semiconductor wafer. Note that, the adhesive tape according to the present invention can also be used for usual backside grinding, and can also be used to temporarily holding a workpiece while processing glass, ceramic, and the like. Also, the adhesive tape according to the present invention can also be used as various types of re-releasable adhesive tapes. EXAMPLES Hereinbelow, the present invention is described in further detail based on Examples, however the present invention is not limited thereto. A measurement method and an evaluation method are as described below. [Breaking Energy, Young's Modulus, Breaking Elongation, Breaking Stress] The breaking energy, the Young's modulus, the breaking elongation, and the breaking stress of the buffer layer were measured using an universal testing machine (product name: “Autograph AG-IS” made by Shimadzu Corporation). Specifically, a measurement sample having a size of width 1.5 mm×length 150 mm×thickness 0.2 mm was prepared from a cured product of a buffer layer forming composition used in Examples 1 to 5 and Comparative examples 1 to 4. The measurements were carried out to the measurement sample under the conditions of a chuck space 100 mm (both ends of 25 mm in a longitudinal direction of the measurement sample were fixed to the machine), a tensile speed of 200 mm/sec, 23° C., and 50% RH. [Evaluation of Tape Debris] A semiconductor processing adhesive tape produced in Examples 1 to 5 and Comparative examples 1 to 4 was adhered to a silicon wafer having a diameter of 12 inch and a thickness of 775 μm using a back grinding tape laminator (product name: “RAD-3510F/12” made by Lintec Corporation) and then the semiconductor processing adhesive tape was cut along an outer circumference of the silicon wafer. A cross section of the adhesive tape being cut was observed by a scanning election microscope (SEM), and was evaluated based on below standards.1: Cross section of sheet was rough and had tearing in many places.2: Cross section of sheet was rough and tearing was observed.3: Cross section of sheet was slightly rough and some tearing was observed.4: Cross section of sheet was slightly rough but had no tearing.5: No roughness was observed at the cross section and no tearing was observed. Note that, all parts by mass of the following Examples and Comparative Example are expressed in terms of solid content. Example 1 (1) Base As the base, a PET film with an easy-adhesion layer on both sides (Cosmoshine A4300 manufactured by Toyobo Co., Ltd., thickness: 50 μm, Young's modulus at 23° C.: 2550 MPa, and breaking energy at 23° C.: 55.3 MJ/m3) was prepared. (2) Buffer Layer (Synthesis of Urethane Acrylate Based Oligomer) A terminal isocyanate urethane prepolymer obtained by a reaction between polyester diol and isophorone diisocyanate was reacted with 2-hydroxyethyl acrylate to obtain a urethane acrylate based oligomer (UA-2) having a weight average molecular weight (Mw) of approximately 16000. (Preparation of Buffer Layer Forming Composition) 20 parts by mass of the above synthesized urethane acrylate based oligomer (UA-2), 20 parts by mass of isobornyl acrylate (IBXA), 30 parts by mass of tetrahydrofurfuryl acrylate (THFA), and 30 parts by mass of 4-acyloylmorpholine (ACMO) were combined, and 2.0 parts by mass of 2-hydroxy-2-methyl-1-phenyl-propan-1-one (product name: “Irgacure1173” manufactured by BASF Japan Ltd.) as a photopolymerization initiator was further combined, thereby the buffer layer forming composition was prepared. (3) Adhesive Layer (Preparation of Adhesive Composition) An acrylic-based polymer (b) was obtained by copolymerizing 52 parts by mass of n-butyl acrylate (BA), 20 parts by mass of methyl methacrylate (MMA), and 28 parts by mass of 2-hydroxyethyl acrylate (2HEA). This acrylic based polymer (b) was reacted with 2-methacryloyloxyethyl isocyanate (MOI) so as to be added to 90 mol % of hydroxyl groups of all of the hydroxyl groups of the acrylic-based polymer (b), and thereby an energy ray curable acrylic based resin (Mw: 500000) was obtained. To 100 parts by mass of this energy ray curable acrylic-based resin, 6 parts by mass of polyfunctional urethane acrylate as an energy ray curable compound, 1 part by mass of an isocyanate-based crosslinking agent (product name: “Coronate L” manufactured by Tosoh Corporation), and 1 part by mass of bis (2,4,6-trimethylbenzoyl) phenylphosphine oxide as a photopolymerization initiator were combined, and diluted with methyl ethyl ketone, thereby a coating liquid of the adhesive composition having a solid content concentration of 32 mass % was prepared. (4) Production of Adhesive Tape The coating liquid of the adhesive composition obtained in above was applied to a release treatment surface of a release sheet (product name: “SP-PET381031” manufactured by Lintec Corporation) and heat-dried, thereby the adhesive layer having a thickness of 30 μm on the release sheet was formed. The buffer layer forming composition was applied to a release treatment surface of another release sheet (product name: “SP-PET381031” manufactured by Lintec Corporation) to form a coating film. Next, ultraviolet ray was irradiated to the coating film to semi-cure the coating film, thereby the buffer layer forming film having a thickness of 53 μm was formed. Note that, the above-mentioned ultraviolet irradiation was performed by using a belt conveyor type ultraviolet irradiation apparatus (apparatus name: “US2-0801” manufactured by EYE GRAPHICS Co., Ltd.) and a high-pressure mercury lamp (apparatus name: “H08-L41” manufactured by EYE GRAPHICS Co., Ltd.) under an irradiation condition in which a lamp height was 230 mm, an output was 80 mW/cm, an illuminance was 90 mW/cm2at a wavelength of 365 nm, and an irradiation dose was 50 mJ/cm2. The surface of the buffer layer forming film was adhered to the base, and ultraviolet ray was irradiated again from the release sheet side on the buffer layer forming film, and the buffer layer forming film was thereby completely cured and formed the buffer layer having a thickness of 53 μm. Note that, the above-mentioned ultraviolet irradiation was performed by using the above-mentioned ultraviolet irradiation apparatus and the high-pressure mercury lamp under an irradiation condition of a lamp height of 220 mm, a conversion output of 120 mW/cm, an illuminance of 160 mW/cm2at a wavelength of 365 nm, and an irradiation dose of 650 mJ/cm2. The adhesive layer was then adhered to a surface of the base opposite to the surface on which the buffer layer was formed, thereby the semiconductor processing adhesive tape was made. Example 2 The adhesive tape was obtained as similar to Example 1 except that for the synthesis of urethane acrylate based oligomer of the buffer layer, urethane acrylate based oligomer having a weight average molecular weight of about 20000 (UA-3) was obtained; and for preparing the buffer layer forming composition, 20 parts by mass of the urethane acrylate based oligomer (UA-3) was used. Example 3 The adhesive tape was obtained as similar to Example 1 except that for preparing the buffer layer forming composition, 25 parts by mass of urethane acrylate based oligomer (UA-2), 30 parts by mass of tetrahydrofurfuryl acrylate (THFA), and 45 parts by mass of 4-acyloylmorpholine (ACMO) were combined, and 2.0 parts by mass of 2-hydroxy-2-methyl-1-phenyl-propan-1-one (product name: “Irgacure1173” manufactured by BASF Japan Ltd.) as a photopolymerization initiator was further combined. Example 4 The adhesive tape was obtained as similar to Example 3 except that for the synthesis of urethane acrylate based oligomer of the buffer layer, urethane acrylate based oligomer (UA-1) having a weight average molecular weight (Mw) of about 10000 was obtained; and for preparing the buffer layer forming composition, 30 parts by mass of urethane acrylate based oligomer (UA-1) and 25 parts by mass of tetrahydrofurfuryl acrylate (THFA) were used. Example 5 The adhesive tape was obtained as similar to Example 4 except that for preparing the buffer layer forming composition, 40 parts by mass of urethane acrylate based oligomer (UA-1), 25 parts by mass of tetrahydrofurfuryl acrylate (THFA), and 35 parts by mass of 4-acyloylmorpholine (ACMO) were used. Comparative Example 1 The adhesive tape was obtained as similar to Example 1 except that for preparing the buffer layer forming composition, 30 parts by mass of urethane acrylate based oligomer (UA-3), 20 parts by mass of tetrahydrofurfuryl acrylate (THFA), and 50 parts by mass of 4-acyloylmorpholine (ACMO) were combined, and 2.0 parts by mass of 2-hydroxy-2-methyl-1-phenyl-propan-1-one (product name: “Irgacure1173” manufactured by BASF Japan Ltd.) as a photopolymerization initiator was further combined. Comparative Example 2 The adhesive tape was obtained as similar to Example 1 except that for preparing the buffer layer forming composition, 35 parts by mass of urethane acrylate based oligomer (UA-1), 40 parts by mass of isobornyl acrylate (IBXA), and 25 parts by mass of phenylhydroxypropyl acrylate (HPPA) were combined, and 2.0 parts by mass of 2-hydroxy-2-methyl-1-phenyl-propan-1-one (product name: “Irgacure1173” manufactured by BASF Japan Ltd.) as a photopolymerization initiator was further combined. Comparative Example 3 The adhesive tape was obtained as similar to Comparative example 2 except that for preparing the buffer layer forming composition, 30 parts by mass of urethane acrylate based oligomer (UA-1) and 45 parts by mass of isobornyl acrylate (IBXA) were used. Comparative Example 4 The adhesive tape was obtained as similar to Example 4 except that for preparing the buffer layer forming composition, 35 parts by mass of urethane acrylate based oligomer (UA-1), 15 parts by mass of tetrahydrofurfuryl acrylate (THFA), and 50 parts by mass of 4-acyloylmorpholine (ACMO) were used. TABLE 1Amount of composition in buffer layerPhysical properties of buffer layerEvaluationforming composition (parts by mass)Young’sBreakingBreakingBreakingof crossUA-1UA-2UA-3modulusstresselongationenergysection and(10000)(16000)(20000)IBXATHFAACMOHPPA(MPa)(MPa)(%)(MJ/m3)tearingExample 1202030306315623.25Example 220203030158571.85Example 3253045348361.55Example 430254523510272.55Example 540253538616967.84Comparative3020501981714212.83example 1Comparative35402548313915.23example 2Comparative304525756163531example 3Comparative35155080030266.53example 4* Tape configuration: Byffer layer 53 μm/PET 50 μm/Adhesive layer 30 μm According to above results, it is apparent that by using the semiconductor processing adhesive tape according to the present invention, the tape debris can be reduced. The adhesive sheet which produces many tape debris has a high chance of breaking while cracking proceeds when the semiconductor device is produced. Thus, by using the adhesive tape according to the present invention, an excellent productivity of the semiconductor wafer can be attained. NUMERICAL REFERENCES 10. . . Adhesive sheet11. . . Base12. . . Buffer layer13. . . Adhesive layer | 83,390 |
11942354 | DETAILED DESCRIPTION We describe here an approach to laser-assisted transfer of discrete components from a thin, flexible dynamic release tape positioned on a support plate of a component transfer system. The dynamic release tape includes a multilayer dynamic release structure disposed on a support layer, such as a backing. Each layer of the dynamic release structure can be designed specifically to target one or more functionalities of the dynamic release structure, such as adhesion, optical properties, or mechanical properties. We also describe laser-assisted transfer of discrete components from a dynamic release tape that is disposed on a carrier substrate. FIGS.1A and1Bdepict a laser-assisted transfer process for high-throughput, low-cost contactless assembly of discrete components102onto rigid or flexible substrates. The term discrete component refers generally to, for example, any unit that is to become part of a product or electronic device, for example, electronic, electromechanical, photovoltaic, photonic, or optoelectronic components, modules, or systems, for example any semiconductor material having a circuit formed on a portion of the semiconducting material. In some examples, the discrete components can be light emitting diodes (LEDs). The discrete components can be ultra-thin, meaning having a maximum thickness of 50 μm or less, 40 μm or less, 30 μm or less, 25 μm or less, 20 μm or less, 10 μm or less, or 5 μm or less. The discrete components can be ultra-small, meaning having a maximum length or width dimension less than or equal to 300 μm per side, 100 μm per side, 50 μm per side, 20 μm per side, or 5 μm per side. The discrete components can be both ultra-thin and ultra-small. FIGS.1A and1Bshow a portion of a support fixture100of a component transfer system for laser-assisted transfer of discrete components102. The support fixture100holds a flexible discrete component assembly108in position for the laser-assisted transfer process. The support fixture (described in more detail below) can include a rigid support plate106mounted on a frame (not shown; described in more detail below). The frame provides stability to the rigid support plate106. In some examples, the frame can be manipulated, e.g., for alignment purposes. The discrete component assembly108can be attached to the support plate106by suction force, tensile stress, or in another way, as described in more detail below. The positioning of the discrete component assembly108on the support plate106is non-permanent, e.g., such that the discrete component assembly108can be removed from the support plate106after the laser-assisted transfer process is completed without damaging the support plate106. The non-permanent attachment of the discrete component assembly108on the support plate106makes the support plate106available for multiple transfer processes involving multiple discrete component assemblies108. The discrete component assembly108includes a dynamic release tape110mounted on a wafer ring (not shown), with a discrete component102adhered to the dynamic release tape110. Although we show only a single discrete component102here, multiple discrete components102can also be adhered to the dynamic release tape110and transferred by the component transfer system. A dynamic release tape (e.g., the tape110) is a tape that includes a flexible support layer112and a dynamic release structure114disposed on the flexible support layer112. A tape is a thin, flexible material composed of one or more layers. The flexible support layer112contacts the support plate106of the support fixture100, and the discrete component102is adhered to the dynamic release structure114. The dynamic release structure114can be a multi-layer structure, such as a structure having two, three, four, or more than four layers, as discussed in greater detail below. Referring also toFIG.1B, in the laser-assisted transfer process, a back side of the support plate106is irradiated with radiation116, such as light, e.g., a laser beam. The support plate106and the flexible support layer112of the dynamic release tape110are both transparent to the wavelength of the radiation116(e.g., the laser energy). An element that is transparent to a given wavelength is an element for which at least some radiation of the given wavelength passes through the element. The radiation116passes through the support plate106and the flexible support layer112of the dynamic release tape110and is incident on an area of the dynamic release structure114, causing ablation of a partial thickness of the dynamic release structure114in the area on which the radiation116is incident (which we refer to as the irradiated area). The ablation generates confined gas, which expands, generating a stress in the dynamic release structure114. The stress causes at least some of the material of the dynamic release structure114to deform, forming a blister118. The blister118exerts a mechanical force on the discrete component102. When the mechanical force exerted by the blister118is sufficient to overcome the adhesion between the discrete component102and the dynamic release structure114, the mechanical force exerted by the blister118(in combination with gravity) propels the discrete component away from the support plate106(e.g., in a downward direction) for transfer to a target substrate130. The target substrate130can be positioned in close proximity to the discrete component102, e.g., at a distance of between about 5 μm and about 300 μm. The use of a rigid support plate106to support the tape-based discrete component assembly108helps to maintain a consistent separation between the discrete components102of the discrete component assembly108and the target substrate130, e.g., by preventing sagging or other structural variations in the tape110. In some examples, the support plate106can be provided with a high degree of surface flatness. For instance, the support plate106can be machined to high precision. In some laser-assisted transfer processes, discrete components are adhered to a rigid, transparent carrier substrate by a dynamic release structure. The carrier substrate with adhered discrete components is provided to a component transfer system for laser-assisted transfer of the discrete components. The component transfer systems described here, in which a rigid, transparent support plate is incorporated into the component transfer system itself, enables discrete components to be transferred from a tape rather than from a rigid carrier substrate, reducing the cost (e.g., in materials, fabrication, transportation, etc.) of end-to-end discrete component transfer processes. For instance, rigid carrier substrates can be significantly more expensive than dynamic release tapes. Furthermore, dynamic release tapes are disposable, eliminating the need for and associated cost of refurbishing the rigid carrier substrates. In some examples, the dynamic release tapes used in discrete component transfer processes are freestanding tapes. Freestanding tapes are tapes that are not attached to a rigid substrate. In some examples, freestanding tapes can be positioned on, but not attached to, a rigid substrate for one or more steps of a discrete component transfer process. For instance, a freestanding tape can be positioned on a rigid substrate during attachment of discrete components to the tape, during introduction into a component transfer system, or during laser-assisted transfer of discrete components. In some examples, the dynamic release tapes used in discrete component transfer processes are not freestanding tapes, but instead are attached to a rigid substrate during attachment of discrete components to the tape, during introduction into a component transfer system, and during laser-assisted transfer of discrete components. Further description of laser-assisted transfer processes can be found in U.S. Patent Publication No. US 2014/0238592, the contents of which are incorporated here by reference in their entirety. FIGS.2A and2Bshow cutaway views of an example support fixture200including a support plate206for positioning a discrete component assembly208for a laser-assisted transfer process. The support plate206is a rigid plate that is transparent to the wavelength of the radiation used for the laser transfer process, e.g., ultraviolet (UV) light. For instance, the support plate206can be a glass plate, a quartz plate, or a plate of another material. The support plate206is mounted on a frame220of the support fixture. In some examples, such as is shown inFIGS.2A and2B, the frame220has an opening221to allow radiation to reach the support plate206. In some examples, the frame220can lack the opening and can be transparent to the wavelength of the radiation such that the radiation is transmitted through the frame220. The discrete component assembly208includes a freestanding dynamic release tape210mounted on a wafer ring222, with discrete components102adhered to the dynamic release tape210. For instance, the dynamic release tape210can be stretched on the wafer ring222. In the example ofFIGS.2A-2B, the dynamic release tape210includes a flexible support layer212with a multilayer dynamic release structure214disposed on the flexible support layer212. The example multilayer dynamic release structure214includes multiple sublayers224a,224bthat have adhesion, radiation absorption, and blistering functionality; and a component adhesive layer226that adheres to the discrete component102. Multilayer dynamic release structures214are discussed in greater detail below. Referring specifically toFIG.2B, to position the discrete component assembly208on the support plate206of the component transfer system, the wafer ring222is brought into contact with the frame220and the back side of the flexible support layer212of the dynamic release tape210is brought into contact with the support plate206. When positioned, a top surface223of the wafer ring222is substantially level with (e.g., aligned with) a top surface207of the support plate206, such that the dynamic release tape210is substantially flat across its entire lateral extent. A suction is applied through an air flow channel228, e.g., by a suction source of the component transfer system to hold the dynamic release tape210against the support plate206. For instance, the air flow channel228can be defined through a thickness of the frame220of the component transfer system (as shown) or through a thickness of the support plate206, or both. Application of a suction pulls the dynamic release tape210firmly against the support plate206, e.g., such that the dynamic release structure214is substantially flat. Referring toFIG.10, in some examples, a support fixture150includes a frame170but no support plate (e.g., no support plate206as shown inFIGS.2A and2B). The wafer ring222of the discrete component assembly208is mounted on the frame170of the support fixture150, and the dynamic release tape210remains otherwise freestanding for the laser-assisted transfer process. Laser-assisted transfer directly from the freestanding dynamic release tape210can be carried out when the dynamic release tape210is sufficiently rigid, such as rigid enough to maintain a substantially planar configuration throughout the duration of the laser-assisted transfer process. For instance, the dynamic release tape210can be sufficiently rigid such that when the discrete component assembly208is mounted on the frame170, the maximum deviation of the dynamic release tape210in a direction z perpendicular to the plane of the tape210is less than a threshold amount, e.g., less than 20 μm, less than 10 μm, or less than 5 μm. FIG.3shows a cutaway view of an example support fixture300including a support plate306for positioning the discrete component assembly208for a laser-assisted transfer process. The support plate306is a rigid plate that is transparent to the wavelength of the radiation used for the laser transfer process, e.g., UV light. The support plate306is mounted on a frame320of the support fixture300. The frame320has an opening321to allow radiation to reach the support plate306. In some examples, the frame320can be transparent to the wavelength of the radiation such that the radiation is transmitted through the frame320. In the example ofFIG.3, when the discrete component assembly208is positioned on the support fixture300, the top surface223of the wafer ring222is at a lower level than (e.g., misaligned from) a top surface307of the support plate306. For instance, the frame320of the support fixture300can be misaligned from the top surface of the support plate306by an amount such that when the discrete component assembly208is positioned on the support plate, there is still a misalignment between the support plate306and the wafer ring222. This misalignment introduces a tensile stress in the dynamic release tape210that holds the dynamic release tape210against the support plate306, e.g., such that the dynamic release structure214is substantially flat. The amount of tensile stress, and hence the force with which the dynamic release tape210is held against the support plate306, can be controlled by varying the height difference between the top surface223of the wafer ring222and the top surface307of the support plate306. In some examples, other approaches can be employed to position the dynamic release tape210on a support plate of a component transfer system, such as by using approaches involving magnetic forces, static electricity, mechanical fixation, or other approaches. FIG.4shows an example of a component transfer system450. The component transfer system450includes a support fixture400having a support plate406mounted on a frame420. The support fixture400is positioned such that a discrete component assembly408is held on the support plate406. The discrete component assembly408includes a dynamic release tape410with an attached discrete component102, with the dynamic release tape410mounted on a wafer ring422, e.g., stretched on the wafer ring422. For instance, the wafer ring422is positioned on the frame420and the stretched dynamic release tape410is held against the support plate406. The discrete component assembly408can be irradiated with radiation (e.g., light, such as UV light) from a light source452, e.g., a laser. Light from the light source452can be manipulated, e.g., focused, by an optical element454, such as a lens, disposed between the light source452and the support plate406. The frame420has an opening421to allow radiation from the light source452to reach the support plate406. A substrate holder432holds a target substrate430onto which the discrete components are transferred by the laser-assisted transfer process. In some examples, such as when the support fixture400is configured to hold a discrete component assembly against the support plate406by application of a suction, the component transfer system450can include a suction source434that is fluidically connected (e.g., by tubing, not shown) to one or more air flow channels (not shown) in the support plate406or the frame420. FIG.5shows an example of a component transfer system550having a light source552and an optical element554. The component transfer system550includes a support fixture500including a frame520. No support plate is mounted on the frame520. A discrete component assembly508is held on the frame520, the discrete component assembly508including a dynamic release tape510mounted on a wafer ring522. In this configuration, the wafer ring522of the discrete component assembly508is positioned on the frame520and the dynamic release tape510is a freestanding tape (meaning a tape that is not supported by a rigid substrate or support plate) during the laser-assisted transfer process. The discrete components102are transferred onto a target substrate530held by a substrate holder532. In some examples, the component transfer systems450,550can be configured for parallel transfer of multiple discrete components, or can be configured to have a single-component transfer mode and a multiple-component transfer mode, as described in more detail in WO 2018/231344, filed on Apr. 25, 2018, the contents of which are incorporated here by reference in their entirety. Referring toFIG.6, in some examples, discrete components602can be transferred to a dynamic release tape610after a dicing process. A wafer630including one or more electronic components (e.g., integrated circuits) is adhered (650) to a dicing tape632and diced (652) to form discrete components602, e.g., using standard wafer processing techniques for wafer dicing. For instance, the dicing tape632can be mounted on a wafer ring. In some examples, the dicing process can include stretching the dicing tape laterally to separate the discrete components602, e.g., by expanding the dicing tape632onto the wafer ring. The discrete components602are transferred (654) onto a dynamic release tape610and the dicing tape632is removed (656), leaving the discrete components602adhered to the dynamic release tape610. For instance, the discrete components602can be adhered to a component adhesion layer of the dynamic release tape610(discussed below). The dynamic release tape610with the adhered discrete components602is attached (658) to a transparent, rigid support plate606of a component transfer system for laser-assisted transfer of the discrete components602onto a target substrate. For instance, a flexible support layer of the dynamic release tape610is attached to the support plate, e.g., by suction, tensile stress, or in another way. Referring toFIG.7, in some examples, discrete components702can be diced directly on a dynamic release tape710. A wafer730including one or more semiconductor dies (e.g., integrated circuits) is adhered (750) to the dynamic release tape710, e.g., to a component adhesion layer of the dynamic release tape710. The adhered wafer730is diced (752) to form discrete components702, e.g., using standard wafer processing techniques for wafer dicing. For instance, the dynamic release tape710can be mounted on a wafer ring. In some examples, the dynamic release layer tape710is stretchable and the dicing process can include stretching the dynamic release layer tape710laterally to separate the discrete components702, e.g., by expanding the dynamic release tape on the wafer ring. The dynamic release layer tape710with the adhered discrete components702is attached (754) to a transparent, rigid support plate706of a component transfer system for laser-assisted transfer of the discrete components702onto a target substrate. For instance, a flexible support layer of the dynamic release tape710is attached to the support plate, e.g., by suction, tensile stress, or in another way. In the process ofFIG.7, the step of transferring the diced discrete components702from a dicing tape to the dynamic release layer tape is not included, making the process ofFIG.7streamlined and efficient. Referring toFIGS.8A-8C, dynamic release layer tapes800,820,840can be multi-layer tapes having a flexible support layer812and a multilayer dynamic release structure814,834,854, respectively, disposed on the flexible support layer812. Discrete components802can be adhered to the dynamic release structures814,834,854by a component adhesion layer808that forms part of each multilayer dynamic release structure814,834,854. The multilayer dynamic release structures814,834,854can be formed of varying numbers of layers having various compositions and functions. As shown inFIGS.8A-8C, the dynamic release layer tapes800,820,840can be positioned on a rigid support, such as a support plate806of a component transfer system, that is transparent to the radiation used for laser-assisted transfer processes. In some examples, the dynamic release layer tapes800,820,840can be used in other environments, such as attached to a wafer ring, or otherwise used. The flexible support layer812is a thin, flexible film that is transparent to the radiation used for the laser-assisted transfer processes, e.g., transparent to UV light. For instance, the flexible support layer812can be a polymer film, such as polyvinylchloride (PVC), polyethylene terephthalate (PET) or poly(methyl methacrylate) (PMMA). The flexible support layer812is sufficiently thin and flexible such that the dynamic release layer tape800,820,840can be manipulated, e.g., rolled, bent, or stretched, without breaking the tape. The presence of the flexible support layer812allows the dynamic release layer tapes800,820,840to be freestanding tapes, e.g., with sufficient mechanical integrity to be handled without being attached to a rigid substrate. Referring specifically toFIG.8A, in some examples, the dynamic release structure814of the dynamic release layer tape800can be a three-layer structure having an absorbing and adhesion layer804disposed on the flexible support layer812and an active layer805, such as a blistering layer (as shown inFIG.8A), disposed on the absorbing and adhesion layer804. The component adhesion layer808is disposed on the active layer805. The absorbing and adhesion layer804has a dual functionality: bonding of the active layer805to the flexible support layer812, and absorption of energy from the irradiation during a laser-assisted transfer process. For instance, the absorbing and adhesion layer804can absorb at least 90%, at least 95%, at least 98%, or at least 99% of the energy that is incident on the absorbing and adhesion layer804, e.g., to prevent the radiation from reaching and potentially damaging the discrete components adhered to the tape800. Energy absorption by the absorption and adhesion layer804results in ablation of the layer, generating a gas. The generated gas induces a mechanical response in the adjacent active layer805. For instance, as shown inFIG.8A, the active layer805can be a blistering layer in which a blister is formed (e.g., as shown inFIG.1B) responsive to the gas generation. Referring toFIG.8B, in some examples, the dynamic release structure834of the dynamic release layer tape820can be a three-layer structure having an adhesion layer824disposed on the flexible support layer812and an active layer826, such as an absorbing and blistering layer (as shown inFIG.8B), disposed on the adhesion layer824. The component adhesion layer808is disposed on the active layer826. The adhesion layer824exhibits an adhesion sufficient to bond the active layer826to the flexible support layer812. In the example ofFIG.8B, the active layer826is an absorbing and blistering layer. The active layer826absorbs energy from the irradiation during a laser-assisted transfer process, generating a gas which induces a mechanical response, such as formation of a blister, in the active layer826. For instance, the active layer826can absorb at least 90%, at least 95%, at least 98%, or at least 99% of the incident energy. Referring toFIG.8C, in some examples, the dynamic release structure854of the dynamic release layer tape840can be a four-layer structure having an adhesion layer844disposed on the flexible support layer812and an active layer structure846disposed on the adhesion layer844. The component adhesion layer808is disposed on the active layer structure846. The adhesion layer844exhibits an adhesion sufficient to bond the active layer structure846to the flexible support layer812. The active layer structure846includes two layers, an absorbing layer848and a blistering layer850. The absorbing layer848absorbs energy from the irradiation during a laser-assisted transfer process, generating a gas. For instance, the absorbing layer848can absorb at least 90%, at least 95%, at least 98%, or at least 99% of the incident energy. The generation of gas induces a mechanical response, such as formation of a blister, in the blistering layer850. Dynamic release structures (e.g., the dynamic release structures814,834,854) have multiple functionalities, e.g., adhesion to the flexible support layer, internal adhesion between layers, absorption of incident radiation, and mechanical response (e.g., blistering). The multilayer nature of the dynamic release structures814,834,854can allow for each layer to be designed specifically to achieve one or more of these functionalities. In the example ofFIG.8A, the absorbing and adhesion layer804can be designed to adhere to the support layer812, to absorb incident radiation, and to generate a sufficient amount of gas to cause formation of a blister in the active layer805. In some examples, the absorbing and adhesion layer804can be designed to promote internal adhesion, e.g., to adhere to the active layer805with sufficient adhesion to at least partially avoid delamination of the blister, which could result in a large diameter blister with the potential to impact the transfer of discrete components in neighboring positions, e.g., discrete components not intended for transfer. In the design of the absorbing and adhesion layer804, the optical and adhesion properties of the layer can be the focus of the design, while the mechanical properties of the layer, such as its strength or modulus, can be secondary to the design. In contrast, the thickness and composition of the active layer805can be designed with a focus on mechanical properties, e.g., to achieve a desired blistering response, while the optical and adhesion properties of the layer can be secondary. In some examples, the active layer805can be designed to have mechanical properties that allow for formation of blisters of a target size and that do not rupture, and to prevent any of the gas generated by the absorbing and adhesion layer804from escaping from the dynamic release structure814. For instance, the target size for a blister can be a height-to-diameter ratio of about one and a base diameter no greater than about three times the diameter of the irradiation beam (e.g., a laser beam). In a specific example, the active layer805can be a polymer film, e.g., a film of PET or a polyimide, with a thickness of between about 2 μm and about 5 μm. Furthermore, in the dynamic release structure814ofFIG.8A, the active layer805does not itself absorb energy, and so is not partially-ablated. Rather, the ablation occurs in the adjacent absorbing and adhesion layer804. Because no ablation occurs in the active layer805, the thickness of the active layer805is not affected by the amount of laser energy delivered to the blister location, meaning that the active layer805is not thinned by the irradiation. This separation of ablation and blister formation into two distinct layers allows for the use of higher pulse energies to create larger blisters. In some examples, such as when the discrete components802are transferred from a dicing tape (as inFIG.6) or other source substrate to a dynamic release layer tape, or when a wafer is diced directly on a dynamic release layer tape to form the discrete components802, the component adhesion layer808can be designed to have an adhesive strength that is greater than the force that holds the discrete components802to their source substrate. In some examples, a relatively low adhesion between the component adhesion layer808and the discrete components802can contribute to a high precision during the laser-assisted transfer process. The component adhesion layer808can be designed to have an adhesive strength that is as low as possible while still being sufficient to keep the discrete components adhered to the dynamic release layer tape prior to the laser-assisted transfer process. In some examples, to satisfy these contradicting criteria of the component adhesion layer808having both a high adhesive strength and a low adhesive strength, the component adhesion layer808can be designed to have an adhesive strength that can be modified by application of a stimulus, such as UV light or heat. The initial strong adhesion of the component adhesion layer808can facilitate a reliable transfer of the discrete components802from their source substrate to the dynamic release layer tape. The initial adhesion of the component adhesion layer808can also support a wafer during a dicing process to form the discrete components. Before the laser-assisted transfer process, a stimulus can be applied, reducing the adhesion between the component adhesion layer808and the discrete components802to a level that can contribute to precise component placement during the transfer. Referring toFIGS.9A-9C, in some examples, a multilayer dynamic release structure914,934,954can be applied to a rigid carrier substrate910, such a glass carrier substrate. Discrete components902can be adhered to the rigid carrier substrate910by the dynamic release structures914,934,954to form discrete component assemblies900,920,940. The discrete components902can be transferred onto a target substrate by a laser-assisted transfer process directly from the rigid carrier substrate910. The dynamic release structures can be provided as freestanding tapes and applied onto carrier substrate910as tapes, e.g., by roll coating or other ways of tape application. In some examples, dynamic release structures can be spin coated onto carrier substrates. The application of a dynamic release structure in tape form onto a carrier substrate can have advantages over spin coating, such as reduced cost, less labor intensive processing, and more efficient application. The dynamic release structures914,934,954provided in tape form for application to a rigid carrier substrate910can be multilayer structures such as those described above with respect toFIGS.8A-8C. Referring specifically toFIG.9A, in some examples, the dynamic release structure914can be a three-layer structure having an absorbing and adhesion layer904that adheres to the rigid carrier substrate910. An active layer906, such as a blistering layer (as shown inFIG.9A), is disposed on the absorbing and adhesion layer904. A component adhesion layer908is disposed on the active layer906. The absorbing and adhesion layer904has a dual functionality: bonding of the active layer906to the rigid carrier substrate910, and absorption of energy from the irradiation during a laser-assisted transfer process. Energy absorption by the absorption and adhesion layer904results in ablation of the layer, generating a gas. The generated gas induces a mechanical response in the adjacent active layer906. For instance, as shown inFIG.9A, the active layer906can be a blistering layer in which a blister is formed responsive to the gas generation, effecting transfer of the discrete components902. Referring toFIG.9B, in some examples, the dynamic release structure934can be a three-layer structure having an adhesion layer924that adheres to the rigid carrier substrate910and an active layer926, such as an absorbing and blistering layer (as shown inFIG.9B), disposed on the adhesion layer924. The component adhesion layer908is disposed on the active layer926. The adhesion layer924exhibits an adhesion sufficient to adhere to the carrier substrate910. In the example ofFIG.9B, the active layer926is an absorbing and blistering layer that absorbs energy from the irradiation during a laser-assisted transfer process, generating a gas which induces a mechanical response, such as formation of a blister, in the active layer926. Referring toFIG.9C, in some examples, the dynamic release structure954can be a four-layer structure having an adhesion layer944that adheres to the rigid carrier substrate910and an active layer structure946disposed on the adhesion layer944. The component adhesion layer908is disposed on the active layer structure946. The active layer structure946includes two layers, an absorbing layer948and a blistering layer950. The absorbing layer948absorbs energy from the irradiation during a laser-assisted transfer process, generating a gas. The generation of gas induces a mechanical response, such as formation of a blister, in the blistering layer950. The individual layers of the multilayer dynamic release structures can be designed to achieve desired functionalities, as described above with respect toFIGS.8A-8C. For instance, the adhesion layers904,924,954that adhere to the carrier substrate910can be designed to have an adhesion to the carrier substrate that is low enough to allow for easy removal, facilitating refurbishment of the carrier substrate after completion of the laser transfer process. A number of embodiments have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the invention. For example, some of the steps described above may be order independent, and thus can be performed in an order different from that described. Other implementations are also within the scope of the following claims. | 32,788 |
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