input
stringlengths 144
489k
| output
stringlengths 45
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| shard
stringclasses 16
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stringlengths 135
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{"name": "gen_helper_cmp_s_ngl", "code": "unsigned __int64 __fastcall gen_helper_cmp_s_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 406 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_s_ngl", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_s_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 407 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_ps_ngl", "code": "unsigned __int64 __fastcall gen_helper_cmp_ps_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 408 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_ps_ngl", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_ps_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 409 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_d_lt", "code": "unsigned __int64 __fastcall gen_helper_cmp_d_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 410 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_d_lt", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_d_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 411 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_s_lt", "code": "unsigned __int64 __fastcall gen_helper_cmp_s_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 412 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_s_lt", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_s_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 413 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_ps_lt", "code": "unsigned __int64 __fastcall gen_helper_cmp_ps_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 414 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_ps_lt", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_ps_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 415 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_d_nge", "code": "unsigned __int64 __fastcall gen_helper_cmp_d_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 416 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_d_nge", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_d_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 417 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_s_nge", "code": "unsigned __int64 __fastcall gen_helper_cmp_s_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 418 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_s_nge", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_s_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 419 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_ps_nge", "code": "unsigned __int64 __fastcall gen_helper_cmp_ps_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 420 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_ps_nge", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_ps_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 421 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_d_le", "code": "unsigned __int64 __fastcall gen_helper_cmp_d_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 422 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_d_le", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_d_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 423 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_s_le", "code": "unsigned __int64 __fastcall gen_helper_cmp_s_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 424 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_s_le", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_s_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 425 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_ps_le", "code": "unsigned __int64 __fastcall gen_helper_cmp_ps_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 426 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_ps_le", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_ps_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 427 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_d_ngt", "code": "unsigned __int64 __fastcall gen_helper_cmp_d_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 428 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_d_ngt", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_d_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 429 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_s_ngt", "code": "unsigned __int64 __fastcall gen_helper_cmp_s_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 430 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_s_ngt", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_s_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 431 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmp_ps_ngt", "code": "unsigned __int64 __fastcall gen_helper_cmp_ps_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 432 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_cmpabs_ps_ngt", "code": "unsigned __int64 __fastcall gen_helper_cmpabs_ps_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGArg"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 433 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_tlbwi", "code": "unsigned __int64 gen_helper_tlbwi ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbwi , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 434 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_tlbwr", "code": "unsigned __int64 gen_helper_tlbwr ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbwr , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 435 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_tlbp", "code": "unsigned __int64 gen_helper_tlbp ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbp , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 436 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_tlbr", "code": "unsigned __int64 gen_helper_tlbr ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbr , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 437 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_di", "code": "unsigned __int64 __fastcall gen_helper_di ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_di , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 438 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_ei", "code": "unsigned __int64 __fastcall gen_helper_ei ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_ei , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 439 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_eret", "code": "unsigned __int64 gen_helper_eret ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_eret , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 440 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_deret", "code": "unsigned __int64 gen_helper_deret ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_deret , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 441 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_rdhwr_cpunum", "code": "unsigned __int64 __fastcall gen_helper_rdhwr_cpunum ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_cpunum , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 442 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_rdhwr_synci_step", "code": "unsigned __int64 __fastcall gen_helper_rdhwr_synci_step ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_synci_step , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 443 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_rdhwr_cc", "code": "unsigned __int64 __fastcall gen_helper_rdhwr_cc ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_cc , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 444 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_rdhwr_ccres", "code": "unsigned __int64 __fastcall gen_helper_rdhwr_ccres ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_ccres , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 445 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_rdhwr_cc\", \"code\": \"unsigned __int64 __fastcall gen_helper_rdhwr_cc ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_cc , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_pmon", "code": "unsigned __int64 __fastcall gen_helper_pmon ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_pmon , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "args", "t": {"T": 2, "n": 1, "s": 8, "t": "TCGArg"}, "location": "s16"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 446 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_helper_wait", "code": "unsigned __int64 gen_helper_wait ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_wait , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 447 | [
"{\"name\": \"tcg_gen_helperN\", \"code\": \"unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_icount_start", "code": "unsigned __int64 gen_icount_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( use_icount ) { icount_label = gen_new_label ( ) ; @@v1@@ = tcg_temp_local_new_i32 ( ) ; tcg_gen_ld_i32 ( @@v1@@ , cpu_env , Number L ) ; icount_arg = gen_opparam_ptr + Number L ; tcg_gen_subi_i32 ( @@v1@@ , @@v1@@ , Number ) ; tcg_gen_brcondi_i32 ( Number , @@v1@@ , Number , icount_label ) ; tcg_gen_st16_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "count", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 448 | [
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ld_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_st16_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st16_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_subi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_subi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_sub_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i32 ( unsigned int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_brcond_i32 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_icount_end", "code": "unsigned __int64 __fastcall gen_icount_end ( __int64 @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( use_icount ) { * ( _QWORD * ) icount_arg = @@a2@@ ; gen_set_label ( icount_label ) ; tcg_gen_exit_tb ( @@a1@@ + Number ) ; } return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "tb", "t": {"T": 3, "t": "TranslationBlock_0"}, "location": "r56"}, {"n": "num_insns", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 449 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_exit_tb\", \"code\": \"unsigned __int64 __fastcall tcg_gen_exit_tb ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_io_start", "code": "unsigned __int64 gen_io_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 450 | [
"{\"name\": \"tcg_gen_st_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_io_end", "code": "unsigned __int64 gen_io_end ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 451 | [
"{\"name\": \"tcg_gen_st_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_load_gpr", "code": "unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "t", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 452 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_store_gpr", "code": "unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "t", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 453 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_load_srsgpr", "code": "unsigned __int64 __fastcall gen_load_srsgpr ( int @@a1@@ , int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i64 ( ) ; if ( @@a1@@ ) { @@v4@@ = tcg_temp_new_i32 ( ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , Number L ) ; tcg_gen_shri_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_andi_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_muli_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_ext_i32_i64 ( @@v5@@ , @@v4@@ ) ; tcg_gen_add_i64 ( @@v5@@ , cpu_env , @@v5@@ ) ; tcg_gen_ld_i64 ( @@v3@@ , @@v5@@ , Number L * @@a1@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_movi_i64 ( @@v3@@ , Number L ) ; } gen_store_gpr ( @@v3@@ , @@a2@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "from", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "to", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "addr", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 454 | [
"{\"name\": \"tcg_gen_ld_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_shr_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_muli_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_muli_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_mul_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ld_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_add_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_store_srsgpr", "code": "unsigned __int64 __fastcall gen_store_srsgpr ( int @@a1@@ , int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) { @@v3@@ = tcg_temp_new_i64 ( ) ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; gen_load_gpr ( @@v3@@ , @@a1@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , Number L ) ; tcg_gen_shri_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_andi_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_muli_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_ext_i32_i64 ( @@v5@@ , @@v4@@ ) ; tcg_gen_add_i64 ( @@v5@@ , cpu_env , @@v5@@ ) ; tcg_gen_st_i64 ( @@v3@@ , @@v5@@ , Number L * @@a2@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "from", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "to", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "addr", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 455 | [
"{\"name\": \"tcg_gen_ld_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_shr_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_muli_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_muli_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_mul_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_st_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_add_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_load_fpr32", "code": "unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "t", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 456 | [
"{\"name\": \"tcg_gen_ld_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_store_fpr32", "code": "unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "t", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 457 | [
"{\"name\": \"tcg_gen_st_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_load_fpr32h", "code": "unsigned __int64 __fastcall gen_load_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "t", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 458 | [
"{\"name\": \"tcg_gen_ld_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_store_fpr32h", "code": "unsigned __int64 __fastcall gen_store_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "t", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 459 | [
"{\"name\": \"tcg_gen_st_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_load_fpr64", "code": "unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "t", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 460 | [
"{\"name\": \"tcg_gen_ld_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_concat_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_concat_i32_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v5@@ , @@a3@@ ) ; tcg_gen_shli_i64 ( @@v5@@ , @@v5@@ , Number L ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_or_i64 ( @@a1@@ , @@a1@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_store_fpr64", "code": "unsigned __int64 __fastcall gen_store_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_st_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i64 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@a2@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ & Number ) ; tcg_gen_shri_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@v5@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "t", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 461 | [
"{\"name\": \"tcg_gen_st_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shr_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "get_fp_bit", "code": "__int64 __fastcall get_fp_bit ( int @@a1@@ ) { __int64 @@result@@ ; if ( @@a1@@ ) @@result@@ = ( unsigned int ) ( @@a1@@ + Number ) ; else @@result@@ = Number L ; return @@result@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "result", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]} | [{"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "result", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 462 | []
|
{"name": "gen_save_pc", "code": "unsigned __int64 __fastcall gen_save_pc ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_movi_i64 ( cpu_PC , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "pc", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 463 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "save_cpu_state", "code": "unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "do_save_pc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r8"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 464 | [
"{\"name\": \"tcg_gen_movi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_save_pc\", \"code\": \"unsigned __int64 __fastcall gen_save_pc ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_movi_i64 ( cpu_PC , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "restore_cpu_state", "code": "unsigned __int64 __fastcall restore_cpu_state ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = * ( _DWORD * ) ( @@a2@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) * ( _QWORD * ) ( @@a2@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r8"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 465 | []
|
{"name": "generate_exception_err", "code": "unsigned __int64 __fastcall generate_exception_err ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_const_i32 ( @@a2@@ ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; save_cpu_state ( @@a1@@ , Number ) ; gen_helper_raise_exception_err ( @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "err", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "excp", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "terr", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "texcp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 466 | [
"{\"name\": \"gen_helper_raise_exception_err\", \"code\": \"unsigned __int64 __fastcall gen_helper_raise_exception_err ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_raise_exception_err , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_raise_exception\", \"code\": \"unsigned __int64 __fastcall gen_helper_raise_exception ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_raise_exception , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "generate_exception", "code": "unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "excp", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 467 | [
"{\"name\": \"gen_helper_raise_exception\", \"code\": \"unsigned __int64 __fastcall gen_helper_raise_exception ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_raise_exception , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_op_addr_add", "code": "unsigned __int64 __fastcall gen_op_addr_add ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) tcg_gen_ext32s_i64 ( @@a2@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg0", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 468 | [
"{\"name\": \"tcg_gen_add_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "check_cp0_enabled", "code": "unsigned __int64 __fastcall check_cp0_enabled ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception_err ( @@a1@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 469 | [
"{\"name\": \"generate_exception_err\", \"code\": \"unsigned __int64 __fastcall generate_exception_err ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_const_i32 ( @@a2@@ ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; save_cpu_state ( @@a1@@ , Number ) ; gen_helper_raise_exception_err ( @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "check_cp1_enabled", "code": "unsigned __int64 __fastcall check_cp1_enabled ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception_err ( @@a1@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 470 | [
"{\"name\": \"generate_exception_err\", \"code\": \"unsigned __int64 __fastcall generate_exception_err ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_const_i32 ( @@a2@@ ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; save_cpu_state ( @@a1@@ , Number ) ; gen_helper_raise_exception_err ( @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "check_cop1x", "code": "unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 471 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "check_cp1_64bitmode", "code": "unsigned __int64 __fastcall check_cp1_64bitmode ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( ~ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 472 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "check_cp1_registers", "code": "unsigned __int64 __fastcall check_cp1_registers ( __int64 @@a1@@ , char @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( @@a2@@ & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "regs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 473 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "check_insn", "code": "unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "flags", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 474 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "check_mips_64", "code": "unsigned __int64 __fastcall check_mips_64 ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 475 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cmp_d", "code": "unsigned __int64 __fastcall gen_cmp_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_registers ( @@a1@@ , @@a3@@ | @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}]} | [{"n": "ft", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "helper_tmp_13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "fp1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 476 | [
"{\"name\": \"gen_helper_cmp_d_f\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_f ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_f , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_un\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_un ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_un , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_eq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_eq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_eq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_ueq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_ueq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ueq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_olt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_olt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_olt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_ult\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_ult ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ult , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_ole\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_ole ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ole , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_ule\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_ule ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ule , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_sf\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_sf ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_sf , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_ngle\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_ngle ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ngle , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_seq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_seq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_seq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_ngl\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_lt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_nge\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_le\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_d_ngt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_d_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_d_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_registers\", \"code\": \"unsigned __int64 __fastcall check_cp1_registers ( __int64 @@a1@@ , char @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( @@a2@@ & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cmpabs_d", "code": "unsigned __int64 __fastcall gen_cmpabs_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a3@@ | @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}]} | [{"n": "ft", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "helper_tmp_13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "fp1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 477 | [
"{\"name\": \"gen_helper_cmpabs_d_f\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_f ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_f , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_un\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_un ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_un , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_eq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_eq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_eq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_ueq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_ueq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ueq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_olt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_olt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_olt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_ult\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_ult ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ult , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_ole\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_ole ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ole , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_ule\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_ule ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ule , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_sf\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_sf ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_sf , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_ngle\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_ngle ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ngle , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_seq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_seq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_seq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_ngl\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_lt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_nge\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_le\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_d_ngt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_d_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_d_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cop1x\", \"code\": \"unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_registers\", \"code\": \"unsigned __int64 __fastcall check_cp1_registers ( __int64 @@a1@@ , char @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( @@a2@@ & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cmp_s", "code": "unsigned __int64 __fastcall gen_cmp_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v9@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}]} | [{"n": "ft", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "helper_tmp_13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "fp1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 478 | [
"{\"name\": \"gen_helper_cmp_s_f\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_f ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_f , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_un\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_un ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_un , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_eq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_eq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_eq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_ueq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_ueq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ueq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_olt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_olt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_olt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_ult\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_ult ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ult , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_ole\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_ole ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ole , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_ule\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_ule ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ule , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_sf\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_sf ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_sf , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_ngle\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_ngle ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ngle , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_seq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_seq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_seq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_ngl\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_lt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_nge\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_le\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_s_ngt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_s_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_s_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cmpabs_s", "code": "unsigned __int64 __fastcall gen_cmpabs_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; check_cop1x ( @@a1@@ ) ; gen_load_fpr32 ( @@v9@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}]} | [{"n": "ft", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "helper_tmp_13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "fp1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 479 | [
"{\"name\": \"gen_helper_cmpabs_s_f\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_f ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_f , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_un\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_un ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_un , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_eq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_eq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_eq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_ueq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_ueq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ueq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_olt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_olt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_olt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_ult\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_ult ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ult , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_ole\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_ole ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ole , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_ule\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_ule ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ule , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_sf\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_sf ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_sf , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_ngle\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_ngle ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ngle , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_seq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_seq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_seq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_ngl\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_lt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_nge\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_le\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_s_ngt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_s_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_s_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cop1x\", \"code\": \"unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cmp_ps", "code": "unsigned __int64 __fastcall gen_cmp_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_64bitmode ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}]} | [{"n": "ft", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "helper_tmp_13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "fp1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 480 | [
"{\"name\": \"gen_helper_cmp_ps_f\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_f ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_f , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_un\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_un ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_un , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_eq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_eq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_eq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_ueq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_ueq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ueq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_olt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_olt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_olt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_ult\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_ult ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ult , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_ole\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_ole ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ole , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_ule\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_ule ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ule , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_sf\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_sf ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_sf , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_ngle\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_ngle ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ngle , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_seq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_seq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_seq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_ngl\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_lt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_nge\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_le\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmp_ps_ngt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmp_ps_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmp_ps_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_64bitmode\", \"code\": \"unsigned __int64 __fastcall check_cp1_64bitmode ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( ~ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cmpabs_ps", "code": "unsigned __int64 __fastcall gen_cmpabs_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_64bitmode ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}]} | [{"n": "ft", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "helper_tmp_13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "fp1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 481 | [
"{\"name\": \"gen_helper_cmpabs_ps_f\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_f ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_f , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_un\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_un ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_un , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_eq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_eq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_eq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_ueq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_ueq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ueq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_olt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_olt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_olt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_ult\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_ult ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ult , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_ole\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_ole ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ole , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_ule\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_ule ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ule , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_sf\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_sf ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_sf , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_ngle\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_ngle ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ngle , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_seq\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_seq ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_seq , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_ngl\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_ngl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ngl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_lt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_lt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_lt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_nge\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_nge ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_nge , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_le\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_le ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_le , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cmpabs_ps_ngt\", \"code\": \"unsigned __int64 __fastcall gen_helper_cmpabs_ps_ngt ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cmpabs_ps_ngt , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_64bitmode\", \"code\": \"unsigned __int64 __fastcall check_cp1_64bitmode ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( ~ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_lb", "code": "unsigned __int64 __fastcall op_ld_lb ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld8s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 482 | [
"{\"name\": \"tcg_gen_qemu_ld8s\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld8s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_lbu", "code": "unsigned __int64 __fastcall op_ld_lbu ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld8u ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 483 | [
"{\"name\": \"tcg_gen_qemu_ld8u\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld8u ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lb\", \"code\": \"unsigned __int64 __fastcall op_ld_lb ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld8s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_lh", "code": "unsigned __int64 __fastcall op_ld_lh ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld16s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 484 | [
"{\"name\": \"tcg_gen_qemu_ld16s\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld16s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_lhu", "code": "unsigned __int64 __fastcall op_ld_lhu ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld16u ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 485 | [
"{\"name\": \"tcg_gen_qemu_ld16u\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld16u ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lh\", \"code\": \"unsigned __int64 __fastcall op_ld_lh ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld16s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_lw", "code": "unsigned __int64 __fastcall op_ld_lw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 486 | [
"{\"name\": \"tcg_gen_qemu_ld32s\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld32s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_lwu", "code": "unsigned __int64 __fastcall op_ld_lwu ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32u ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 487 | [
"{\"name\": \"tcg_gen_qemu_ld32u\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld32u ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lw\", \"code\": \"unsigned __int64 __fastcall op_ld_lw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_ld", "code": "unsigned __int64 __fastcall op_ld_ld ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld64 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 488 | [
"{\"name\": \"tcg_gen_qemu_ld64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ldst_op_i64_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_st_sb", "code": "unsigned __int64 __fastcall op_st_sb ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st8 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 489 | [
"{\"name\": \"tcg_gen_qemu_st8\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st8 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_st_sh", "code": "unsigned __int64 __fastcall op_st_sh ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st16 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 490 | [
"{\"name\": \"tcg_gen_qemu_st16\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st16 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_st_sw", "code": "unsigned __int64 __fastcall op_st_sw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st32 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 491 | [
"{\"name\": \"tcg_gen_qemu_st32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_st_sd", "code": "unsigned __int64 __fastcall op_st_sd ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st64 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 492 | [
"{\"name\": \"tcg_gen_qemu_st64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ldst_op_i64_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_ll", "code": "unsigned __int64 __fastcall op_ld_ll ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a3@@ + Number ) ) ; gen_helper_ll ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 493 | [
"{\"name\": \"gen_helper_ll\", \"code\": \"unsigned __int64 __fastcall gen_helper_ll ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_ll , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_ld_lld", "code": "unsigned __int64 __fastcall op_ld_lld ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a3@@ + Number ) ) ; gen_helper_lld ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 494 | [
"{\"name\": \"gen_helper_ll\", \"code\": \"unsigned __int64 __fastcall gen_helper_ll ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_ll , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_lld\", \"code\": \"unsigned __int64 __fastcall gen_helper_lld ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_lld , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_ll\", \"code\": \"unsigned __int64 __fastcall op_ld_ll ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a3@@ + Number ) ) ; gen_helper_ll ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_st_sc", "code": "unsigned __int64 __fastcall op_st_sc ( int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; @@v8@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a4@@ + Number ) ) ; gen_helper_sc ( @@v7@@ , @@a1@@ , @@a2@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 495 | [
"{\"name\": \"gen_helper_sc\", \"code\": \"unsigned __int64 __fastcall gen_helper_sc ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_sc , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "op_st_scd", "code": "unsigned __int64 __fastcall op_st_scd ( int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; @@v8@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a4@@ + Number ) ) ; gen_helper_scd ( @@v7@@ , @@a1@@ , @@a2@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 496 | [
"{\"name\": \"gen_helper_sc\", \"code\": \"unsigned __int64 __fastcall gen_helper_sc ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_sc , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_scd\", \"code\": \"unsigned __int64 __fastcall gen_helper_scd ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_scd , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sc\", \"code\": \"unsigned __int64 __fastcall op_st_sc ( int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; @@v8@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a4@@ + Number ) ) ; gen_helper_sc ( @@v7@@ , @@a1@@ , @@a2@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_base_offset_addr", "code": "unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 497 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_op_addr_add\", \"code\": \"unsigned __int64 __fastcall gen_op_addr_add ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) tcg_gen_ext32s_i64 ( @@a2@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "pc_relative_pc", "code": "unsigned __int64 __fastcall pc_relative_pc ( __int64 @@a1@@ ) { int @@v1@@ ; __int64 @@v3@@ ; @@v3@@ = * ( _QWORD * ) ( @@a1@@ + Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) @@v1@@ = Number ; else @@v1@@ = Number ; @@v3@@ -= @@v1@@ ; } return @@v3@@ & Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}]} | [{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "v1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "pc", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "s16"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 498 | []
|
{"name": "gen_ld", "code": "unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r80"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v19", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r80"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 499 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_ldl\", \"code\": \"unsigned __int64 __fastcall gen_helper_ldl ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_ldl , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_ldr\", \"code\": \"unsigned __int64 __fastcall gen_helper_ldr ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_ldr , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_lwl\", \"code\": \"unsigned __int64 __fastcall gen_helper_lwl ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_lwl , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_lwr\", \"code\": \"unsigned __int64 __fastcall gen_helper_lwr ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_lwr , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_op_addr_add\", \"code\": \"unsigned __int64 __fastcall gen_op_addr_add ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) tcg_gen_ext32s_i64 ( @@a2@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lb\", \"code\": \"unsigned __int64 __fastcall op_ld_lb ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld8s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lbu\", \"code\": \"unsigned __int64 __fastcall op_ld_lbu ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld8u ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lh\", \"code\": \"unsigned __int64 __fastcall op_ld_lh ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld16s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lhu\", \"code\": \"unsigned __int64 __fastcall op_ld_lhu ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld16u ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lw\", \"code\": \"unsigned __int64 __fastcall op_ld_lw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lwu\", \"code\": \"unsigned __int64 __fastcall op_ld_lwu ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32u ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_ld\", \"code\": \"unsigned __int64 __fastcall op_ld_ld ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld64 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_ll\", \"code\": \"unsigned __int64 __fastcall op_ld_ll ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a3@@ + Number ) ) ; gen_helper_ll ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lld\", \"code\": \"unsigned __int64 __fastcall op_ld_lld ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a3@@ + Number ) ) ; gen_helper_lld ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_base_offset_addr\", \"code\": \"unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"pc_relative_pc\", \"code\": \"unsigned __int64 __fastcall pc_relative_pc ( __int64 @@a1@@ ) { int @@v1@@ ; __int64 @@v3@@ ; @@v3@@ = * ( _QWORD * ) ( @@a1@@ + Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) @@v1@@ = Number ; else @@v1@@ = Number ; @@v3@@ -= @@v1@@ ; } return @@v3@@ & Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_st", "code": "unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v15", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 500 | [
"{\"name\": \"gen_helper_sdl\", \"code\": \"unsigned __int64 __fastcall gen_helper_sdl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_sdl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_sdr\", \"code\": \"unsigned __int64 __fastcall gen_helper_sdr ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_sdr , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_swl\", \"code\": \"unsigned __int64 __fastcall gen_helper_swl ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_swl , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_swr\", \"code\": \"unsigned __int64 __fastcall gen_helper_swr ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_swr , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sb\", \"code\": \"unsigned __int64 __fastcall op_st_sb ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st8 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sh\", \"code\": \"unsigned __int64 __fastcall op_st_sh ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st16 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sw\", \"code\": \"unsigned __int64 __fastcall op_st_sw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st32 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sd\", \"code\": \"unsigned __int64 __fastcall op_st_sd ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st64 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_base_offset_addr\", \"code\": \"unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_st_cond", "code": "unsigned __int64 __fastcall gen_st_cond ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_local_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; @@v10@@ = tcg_temp_local_new_i64 ( ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sc ( @@v10@@ , @@v9@@ , @@a3@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_scd ( @@v10@@ , @@v9@@ , @@a3@@ , @@a1@@ ) ; } tcg_temp_free_i64 ( @@v10@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 501 | [
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sc\", \"code\": \"unsigned __int64 __fastcall op_st_sc ( int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; @@v8@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a4@@ + Number ) ) ; gen_helper_sc ( @@v7@@ , @@a1@@ , @@a2@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_scd\", \"code\": \"unsigned __int64 __fastcall op_st_scd ( int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; @@v8@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a4@@ + Number ) ) ; gen_helper_scd ( @@v7@@ , @@a1@@ , @@a2@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_base_offset_addr\", \"code\": \"unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_flt_ldst", "code": "unsigned __int64 __fastcall gen_flt_ldst ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { @@v10@@ = tcg_temp_new_i64 ( ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; tcg_gen_qemu_st64 ( @@v10@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v10@@ ) ; goto LABEL_13 ; } if ( @@a2@@ > Number ) goto LABEL_12 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i32 ( ) ; @@v12@@ = tcg_temp_new_i64 ( ) ; gen_load_fpr32 ( @@v11@@ , @@a3@@ ) ; tcg_gen_extu_i32_i64 ( @@v12@@ , @@v11@@ ) ; tcg_gen_qemu_st32 ( @@v12@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; goto LABEL_13 ; } if ( @@a2@@ > Number ) { LABEL_12 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_13 ; } if ( @@a2@@ == Number ) { @@v14@@ = tcg_temp_new_i32 ( ) ; tcg_gen_qemu_ld32s ( @@v9@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v9@@ ) ; gen_store_fpr32 ( @@v14@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_12 ; @@v13@@ = tcg_temp_new_i64 ( ) ; tcg_gen_qemu_ld64 ( @@v13@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } LABEL_13 : tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v15", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ft", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "fp0_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "fp0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "fp0_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 502 | [
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_extu_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_extu_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_ld32s\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld32s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_ld64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ldst_op_i64_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_st32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_st64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ldst_op_i64_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_st_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i64 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@a2@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ & Number ) ; tcg_gen_shri_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@v5@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_base_offset_addr\", \"code\": \"unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cop1_ldst", "code": "unsigned __int64 __fastcall gen_cop1_ldst ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { check_cp1_enabled ( @@a2@@ ) ; gen_flt_ldst ( @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; } else { generate_exception_err ( @@a2@@ , Number , Number ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r80"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "op", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "imm", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r80"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 503 | [
"{\"name\": \"generate_exception_err\", \"code\": \"unsigned __int64 __fastcall generate_exception_err ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_const_i32 ( @@a2@@ ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; save_cpu_state ( @@a1@@ , Number ) ; gen_helper_raise_exception_err ( @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_enabled\", \"code\": \"unsigned __int64 __fastcall check_cp1_enabled ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception_err ( @@a1@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_flt_ldst\", \"code\": \"unsigned __int64 __fastcall gen_flt_ldst ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { @@v10@@ = tcg_temp_new_i64 ( ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; tcg_gen_qemu_st64 ( @@v10@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v10@@ ) ; goto LABEL_13 ; } if ( @@a2@@ > Number ) goto LABEL_12 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i32 ( ) ; @@v12@@ = tcg_temp_new_i64 ( ) ; gen_load_fpr32 ( @@v11@@ , @@a3@@ ) ; tcg_gen_extu_i32_i64 ( @@v12@@ , @@v11@@ ) ; tcg_gen_qemu_st32 ( @@v12@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; goto LABEL_13 ; } if ( @@a2@@ > Number ) { LABEL_12 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_13 ; } if ( @@a2@@ == Number ) { @@v14@@ = tcg_temp_new_i32 ( ) ; tcg_gen_qemu_ld32s ( @@v9@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v9@@ ) ; gen_store_fpr32 ( @@v14@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_12 ; @@v13@@ = tcg_temp_new_i64 ( ) ; tcg_gen_qemu_ld64 ( @@v13@@ , @@v9@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } LABEL_13 : tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_arith_imm", "code": "unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r80"}, {"n": "v17", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v16", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v18", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "imm", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r80"}, {"n": "uimm", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "s24"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "t2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "l1_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "t2_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "t1_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "t0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 504 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_and_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_and_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xori_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xori_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_xor_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_addi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_addi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_add_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}"
]
|
{"name": "gen_logic_imm", "code": "unsigned __int64 __fastcall gen_logic_imm ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned __int16 @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , ( __int16 ) @@a5@@ << Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ ) { tcg_gen_xori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } goto LABEL_14 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ ) { tcg_gen_ori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_14 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ ) tcg_gen_andi_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; } } } return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "r72"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "imm", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 505 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ori_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ori_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_or_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xori_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xori_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_xor_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_logic\", \"code\": \"unsigned __int64 __fastcall gen_logic ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_nor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else if ( @@a4@@ || ! @@a5@@ ) { if ( ! @@a4@@ || @@a5@@ ) tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number ) ; else tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_xor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) goto LABEL_27 ; if ( @@a4@@ && ! @@a5@@ ) goto LABEL_30 ; goto LABEL_39 ; } if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ && @@a5@@ ) { tcg_gen_or_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) { LABEL_27 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ && ! @@a5@@ ) { LABEL_30 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_39 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ || ! @@a5@@ ) goto LABEL_39 ; tcg_gen_and_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
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