input
stringlengths 144
489k
| output
stringlengths 45
339k
| shard
stringclasses 16
values | filename
stringlengths 135
135
| line_num
int64 0
2.62k
| context
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|---|---|---|---|---|---|
{"name": "gen_slt_imm", "code": "unsigned __int64 __fastcall gen_slt_imm ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v8@@ ; __int64 @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ = @@a5@@ ; if ( @@a3@@ ) { @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } tcg_temp_free_i64 ( @@v8@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "imm", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "uimm", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "s24"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 506 | [
"{\"name\": \"tcg_gen_setcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_setcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a4@@ ) ; tcg_gen_setcond_i64 ( @@a1@@ , @@a2@@ , @@a3@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt\", \"code\": \"unsigned __int64 __fastcall gen_slt ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_shift_imm", "code": "unsigned __int64 __fastcall gen_shift_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , char @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; __int64 @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v12@@ = @@a6@@ & Number ; if ( @@a4@@ ) { @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; else tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) { @@v11@@ = tcg_temp_new_i32 ( @@v10@@ ) ; tcg_gen_trunc_i64_i32 ( @@v11@@ , @@v10@@ ) ; tcg_gen_rotri_i32 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else { LABEL_14 : tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } } } else { switch ( @@a3@@ ) { case Number : tcg_gen_shli_i64 ( @@v10@@ , @@v10@@ , @@v12@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; break ; case Number : if ( ! @@v12@@ ) goto LABEL_14 ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; default : break ; } } } } tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v13@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "char", "s": 1}, "location": "r80"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v13", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "imm", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r80"}, {"n": "uimm", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "s24"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 507 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shli_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shr_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sari_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sari_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_sar_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotri_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotri_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) tcg_gen_rotli_i32 ( @@a1@@ , @@a2@@ , Number - @@a3@@ ) ; else tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotri_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) tcg_gen_rotli_i64 ( @@a1@@ , @@a2@@ , Number - @@a3@@ ) ; else tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift\", \"code\": \"unsigned __int64 __fastcall gen_shift ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_rotr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@v12@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@v12@@ ) ; tcg_gen_trunc_i64_i32 ( @@v13@@ , @@v11@@ ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v12@@ ) ; tcg_gen_andi_i32 ( @@v13@@ , @@v13@@ , Number ) ; tcg_gen_rotr_i32 ( @@v13@@ , @@v14@@ , @@v13@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_ext32u_i64 ( @@v12@@ , @@v12@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; default : break ; } } } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_arith", "code": "unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "v25", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v26", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}]} | [{"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "t2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "l1_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "t2_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "t1_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "t0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "l1_1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "t2_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "t1_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "t0_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "l1_2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "t2_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "t1_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "t0_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 508 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_add_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sub_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sub_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_and_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_and_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xor_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xor_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mul_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mul_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_neg_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_neg_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andc_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andc_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_not_i64 ( @@v5@@ , @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cond_move", "code": "unsigned __int64 __fastcall gen_cond_move ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = gen_new_label ( @@a1@@ ) ; if ( @@a2@@ == Number ) { if ( @@a5@@ ) tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a5@@ ] , Number L , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { if ( @@a5@@ ) tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a5@@ ] , Number L , @@v9@@ ) ; else tcg_gen_br ( @@v9@@ ) ; } if ( @@a4@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; gen_set_label ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 509 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_logic", "code": "unsigned __int64 __fastcall gen_logic ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_nor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else if ( @@a4@@ || ! @@a5@@ ) { if ( ! @@a4@@ || @@a5@@ ) tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number ) ; else tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_xor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) goto LABEL_27 ; if ( @@a4@@ && ! @@a5@@ ) goto LABEL_30 ; goto LABEL_39 ; } if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ && @@a5@@ ) { tcg_gen_or_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) { LABEL_27 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ && ! @@a5@@ ) { LABEL_30 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_39 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ || ! @@a5@@ ) goto LABEL_39 ; tcg_gen_and_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 510 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_and_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_and_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_or_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xor_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xor_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_not_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_not_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_nor_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_nor_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_or_i64 ( @@a1@@ , @@a2@@ , @@a3@@ ) ; tcg_gen_not_i64 ( @@a1@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_slt", "code": "unsigned __int64 __fastcall gen_slt ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 511 | [
"{\"name\": \"tcg_gen_setcond_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_setcond_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4i_i64 ( Number , @@a2@@ , @@a3@@ , @@a4@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_shift", "code": "unsigned __int64 __fastcall gen_shift ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_rotr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@v12@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@v12@@ ) ; tcg_gen_trunc_i64_i32 ( @@v13@@ , @@v11@@ ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v12@@ ) ; tcg_gen_andi_i32 ( @@v13@@ , @@v13@@ , Number ) ; tcg_gen_rotr_i32 ( @@v13@@ , @@v14@@ , @@v13@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_ext32u_i64 ( @@v12@@ , @@v12@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; default : break ; } } } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; } return __readfsqword ( Number ) ^ @@v15@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v15", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "t3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 512 | [
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shl_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shl_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shr_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shr_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sar_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sar_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotr_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotr_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotr_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotr_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_HILO", "code": "unsigned __int64 __fastcall gen_HILO ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ || @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_LO , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_LO , Number L ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_LO ) ; break ; case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_HI ) ; break ; case Number : if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_HI , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_HI , Number L ) ; break ; } } } return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 513 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_muldiv", "code": "unsigned __int64 __fastcall gen_muldiv ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; if ( @@a2@@ > Number ) { if ( @@a2@@ - Number > Number ) { LABEL_6 : @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; goto LABEL_7 ; } } else if ( @@a2@@ < Number ) { goto LABEL_6 ; } @@v7@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; LABEL_7 : gen_load_gpr ( @@v7@@ , @@a3@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { @@v9@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v9@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v10@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v9@@ , @@v9@@ , @@v10@@ ) ; tcg_gen_concat32_i64 ( @@v10@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v9@@ , @@v10@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v9@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v9@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v11@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v12@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_concat32_i64 ( @@v12@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v11@@ ) ; tcg_gen_shri_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ == Number ) { @@v13@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v13@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v14@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_gen_concat32_i64 ( @@v14@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v13@@ ) ; tcg_gen_shri_i64 ( @@v13@@ , @@v13@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v13@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) { @@v15@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v15@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v16@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_concat32_i64 ( @@v16@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v15@@ ) ; tcg_gen_shri_i64 ( @@v15@@ , @@v15@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } LABEL_29 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_30 ; } if ( @@a2@@ < Number ) goto LABEL_29 ; switch ( @@a2@@ ) { case Number : @@v25@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v25@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v26@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v25@@ , @@v25@@ , @@v26@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v25@@ ) ; tcg_gen_shri_i64 ( @@v25@@ , @@v25@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v25@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v23@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v23@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v24@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v23@@ ) ; tcg_gen_shri_i64 ( @@v23@@ , @@v23@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v21@@ = gen_new_label ( @@v8@@ ) ; @@v22@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32s_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32s_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v21@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v22@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v22@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v21@@ ) ; gen_set_label ( @@v22@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v21@@ ) ; break ; case Number : @@v20@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v20@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v20@@ ) ; break ; case Number : gen_helper_dmult ( @@v7@@ , @@v8@@ ) ; break ; case Number : gen_helper_dmultu ( @@v7@@ , @@v8@@ ) ; break ; case Number : @@v18@@ = gen_new_label ( @@v8@@ ) ; @@v19@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v18@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v19@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v19@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v18@@ ) ; gen_set_label ( @@v19@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v18@@ ) ; break ; case Number : @@v17@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v17@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v17@@ ) ; break ; default : goto LABEL_29 ; } LABEL_30 : tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v22", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s84"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s88"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s92"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s96"}]} | [{"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "t3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "t3_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "t2_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "l2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "l1_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "l2_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "l1_1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "l1_2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "t3_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "t2_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "t3_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "t2_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "t3_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "t2_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}, {"n": "t3_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s84"}, {"n": "t2_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s88"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s92"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s96"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 514 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_add_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sub_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sub_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shr_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mul_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mul_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_div_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_div_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_sari_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@a1@@ , @@v5@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rem_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rem_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_sari_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@v5@@ , @@a1@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_divu_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_divu_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_movi_i64 ( @@v5@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@a1@@ , @@v5@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_remu_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_remu_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_movi_i64 ( @@v5@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@v5@@ , @@a1@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_concat32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_concat32_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_shli_i64 ( @@v5@@ , @@a3@@ , Number L ) ; tcg_gen_or_i64 ( @@a1@@ , @@a1@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmult\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmult ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_dmult , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmultu\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmultu ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_dmultu , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mul_vr54xx", "code": "unsigned __int64 __fastcall gen_mul_vr54xx ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { gen_helper_msachiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_msachi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_macchiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_macchi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_mulshiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_mulshi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_mulhiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_mulhi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_msacu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_msac ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_maccu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : gen_helper_macc ( @@v9@@ , @@v9@@ , @@v10@@ ) ; break ; case Number : gen_helper_muls ( @@v9@@ , @@v9@@ , @@v10@@ ) ; break ; case Number : gen_helper_mulsu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; break ; default : goto LABEL_36 ; } LABEL_37 : gen_store_gpr ( @@v9@@ , @@a3@@ ) ; goto LABEL_38 ; } } } } } } LABEL_36 : generate_exception ( @@a1@@ , Number ) ; LABEL_38 : tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 515 | [
"{\"name\": \"gen_helper_muls\", \"code\": \"unsigned __int64 __fastcall gen_helper_muls ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_muls , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mulsu\", \"code\": \"unsigned __int64 __fastcall gen_helper_mulsu ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mulsu , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_macc\", \"code\": \"unsigned __int64 __fastcall gen_helper_macc ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_macc , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_maccu\", \"code\": \"unsigned __int64 __fastcall gen_helper_maccu ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_maccu , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_msac\", \"code\": \"unsigned __int64 __fastcall gen_helper_msac ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_msac , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_msacu\", \"code\": \"unsigned __int64 __fastcall gen_helper_msacu ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_msacu , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mulhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mulhi ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mulhi , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mulhiu\", \"code\": \"unsigned __int64 __fastcall gen_helper_mulhiu ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mulhiu , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mulshi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mulshi ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mulshi , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mulshiu\", \"code\": \"unsigned __int64 __fastcall gen_helper_mulshiu ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mulshiu , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_macchi\", \"code\": \"unsigned __int64 __fastcall gen_helper_macchi ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_macchi , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_macchiu\", \"code\": \"unsigned __int64 __fastcall gen_helper_macchiu ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_macchiu , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_msachi\", \"code\": \"unsigned __int64 __fastcall gen_helper_msachi ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_msachi , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_msachiu\", \"code\": \"unsigned __int64 __fastcall gen_helper_msachiu ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_msachiu , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cl", "code": "unsigned __int64 __fastcall gen_cl ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { gen_helper_dclo ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : gen_helper_dclz ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; case Number : gen_helper_clz ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; case Number : gen_helper_clo ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; } } tcg_temp_free_i64 ( @@v7@@ ) ; } return __readfsqword ( Number ) ^ @@v8@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 516 | [
"{\"name\": \"gen_helper_clo\", \"code\": \"unsigned __int64 __fastcall gen_helper_clo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_clo , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_clz\", \"code\": \"unsigned __int64 __fastcall gen_helper_clz ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_clz , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dclo\", \"code\": \"unsigned __int64 __fastcall gen_helper_dclo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_dclo , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dclz\", \"code\": \"unsigned __int64 __fastcall gen_helper_dclz ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_dclz , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_loongson_integer", "code": "unsigned __int64 __fastcall gen_loongson_integer ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; int @@v14@@ ; int @@v15@@ ; int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; int @@v28@@ ; int @@v29@@ ; int @@v30@@ ; unsigned __int64 @@v31@@ ; @@v31@@ = __readfsqword ( Number ) ; if ( ! @@a3@@ ) return __readfsqword ( Number ) ^ @@v31@@ ; if ( @@a2@@ > Number ) goto LABEL_9 ; if ( @@a2@@ < Number ) { if ( @@a2@@ > Number ) { if ( @@a2@@ - Number > Number ) { LABEL_9 : @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; goto LABEL_10 ; } } else if ( @@a2@@ < Number ) { goto LABEL_9 ; } } @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; LABEL_10 : gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ > Number ) { if ( @@a2@@ <= Number && @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : LABEL_18 : tcg_gen_mul_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; break ; case Number : LABEL_19 : tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_mul_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; break ; case Number : LABEL_20 : @@v28@@ = gen_new_label ( @@v10@@ ) ; @@v29@@ = gen_new_label ( @@v10@@ ) ; @@v30@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32s_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32s_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v28@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v30@@ ) ; gen_set_label ( @@v28@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v29@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v29@@ ) ; tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ ) ; tcg_gen_br ( @@v30@@ ) ; gen_set_label ( @@v29@@ ) ; tcg_gen_div_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v30@@ ) ; break ; case Number : LABEL_21 : @@v23@@ = gen_new_label ( @@v10@@ ) ; @@v24@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v23@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v24@@ ) ; gen_set_label ( @@v23@@ ) ; tcg_gen_divu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v24@@ ) ; break ; case Number : case Number : LABEL_24 : tcg_gen_mul_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; break ; case Number : LABEL_25 : @@v25@@ = gen_new_label ( @@v10@@ ) ; @@v26@@ = gen_new_label ( @@v10@@ ) ; @@v27@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v25@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v27@@ ) ; gen_set_label ( @@v25@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v26@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v26@@ ) ; tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ ) ; tcg_gen_br ( @@v27@@ ) ; gen_set_label ( @@v26@@ ) ; tcg_gen_div_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v27@@ ) ; break ; case Number : LABEL_26 : @@v21@@ = gen_new_label ( @@v10@@ ) ; @@v22@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v21@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v22@@ ) ; gen_set_label ( @@v21@@ ) ; tcg_gen_divu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v22@@ ) ; break ; case Number : LABEL_22 : @@v18@@ = gen_new_label ( @@v10@@ ) ; @@v19@@ = gen_new_label ( @@v10@@ ) ; @@v20@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v18@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v19@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v19@@ ) ; gen_set_label ( @@v18@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v20@@ ) ; gen_set_label ( @@v19@@ ) ; tcg_gen_rem_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v20@@ ) ; break ; case Number : LABEL_23 : @@v13@@ = gen_new_label ( @@v10@@ ) ; @@v14@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v13@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v14@@ ) ; gen_set_label ( @@v13@@ ) ; tcg_gen_remu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v14@@ ) ; break ; case Number : LABEL_27 : @@v15@@ = gen_new_label ( @@v10@@ ) ; @@v16@@ = gen_new_label ( @@v10@@ ) ; @@v17@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v16@@ ) ; gen_set_label ( @@v15@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v17@@ ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_rem_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v17@@ ) ; break ; case Number : LABEL_28 : @@v11@@ = gen_new_label ( @@v10@@ ) ; @@v12@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v11@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v12@@ ) ; gen_set_label ( @@v11@@ ) ; tcg_gen_remu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v12@@ ) ; break ; default : break ; } } } else if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : goto LABEL_18 ; case Number : case Number : goto LABEL_24 ; case Number : goto LABEL_19 ; case Number : goto LABEL_20 ; case Number : goto LABEL_25 ; case Number : goto LABEL_21 ; case Number : goto LABEL_26 ; case Number : goto LABEL_22 ; case Number : goto LABEL_27 ; case Number : goto LABEL_23 ; case Number : goto LABEL_28 ; default : break ; } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v31@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s100"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s104"}, {"n": "v30", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v29", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v28", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v27", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v26", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v25", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v24", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v23", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v22", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s72"}, {"n": "v16", "t": {"T": 1, "n": "int", "s": 4}, "location": "s76"}, {"n": "v31", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s80"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s84"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s88"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s92"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s96"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s100"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s104"}, {"n": "l3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "l2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "l3_1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "l2_3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "l1_3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "l2_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "l1_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "l2_4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "l1_4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "l3_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "l2_1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "l1_1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "l3_2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s72"}, {"n": "l2_5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "l1_5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s80"}, {"n": "l2_2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s84"}, {"n": "l1_2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s88"}, {"n": "l2_6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s92"}, {"n": "l1_6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s96"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 517 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mul_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mul_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_div_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_div_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_sari_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@a1@@ , @@v5@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rem_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rem_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_sari_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@v5@@ , @@a1@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_divu_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_divu_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_movi_i64 ( @@v5@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@a1@@ , @@v5@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_remu_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_remu_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_movi_i64 ( @@v5@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@v5@@ , @@a1@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_trap", "code": "unsigned __int64 __fastcall gen_trap ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { __int64 @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned __int64 @@v14@@ ; @@v9@@ = @@a1@@ ; @@v14@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = Number ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) { LABEL_20 : if ( @@a3@@ || @@a5@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; tcg_gen_movi_i64 ( @@v12@@ , @@a5@@ ) ; @@v10@@ = Number ; } } else { if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_22 ; } else if ( @@a2@@ < Number ) { goto LABEL_22 ; } if ( @@a3@@ != @@a4@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; gen_load_gpr ( @@v12@@ , @@a4@@ ) ; @@v10@@ = Number ; } } LABEL_22 : if ( @@v10@@ ) { @@v13@@ = gen_new_label ( @@a1@@ ) ; if ( @@a2@@ == Number ) { LABEL_64 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_59 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_63 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_62 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_61 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) LABEL_60 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case String : goto LABEL_60 ; case String : goto LABEL_61 ; case String : goto LABEL_62 ; case String : goto LABEL_63 ; case String : goto LABEL_59 ; case String : goto LABEL_64 ; default : break ; } } } } } } } generate_exception ( @@v9@@ , Number ) ; gen_set_label ( @@v13@@ ) ; } else if ( @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ <= Number && @@a2@@ >= Number ) ) ) ) ) { generate_exception ( @@v9@@ , Number ) ; } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; return __readfsqword ( Number ) ^ @@v14@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s40"}, {"n": "v14", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "imm", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "cond", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "ctxa", "t": {"T": 3, "t": "DisasContext_0"}, "location": "s40"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 518 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcond_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcond_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4ii_i64 ( Number , @@a2@@ , @@a3@@ , @@a1@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_goto_tb", "code": "unsigned __int64 __fastcall gen_goto_tb ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v5@@ ; _QWORD * @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = * ( _QWORD * * ) @@a1@@ ; if ( ( ( @@a3@@ ^ * * ( _QWORD * * ) @@a1@@ ) & Number ) != Number || * ( _DWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( @@a3@@ ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { save_cpu_state ( @@a1@@ , Number ) ; @@v5@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; } tcg_gen_exit_tb ( Number L ) ; } else { tcg_gen_goto_tb ( @@a2@@ ) ; gen_save_pc ( @@a3@@ ) ; tcg_gen_exit_tb ( ( __int64 ) @@v6@@ + @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 3, "t": "_QWORD"}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "dest", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "tb", "t": {"T": 3, "t": "TranslationBlock"}, "location": "s16"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 519 | [
"{\"name\": \"tcg_gen_exit_tb\", \"code\": \"unsigned __int64 __fastcall tcg_gen_exit_tb ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_goto_tb\", \"code\": \"unsigned __int64 __fastcall tcg_gen_goto_tb ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_raise_exception\", \"code\": \"unsigned __int64 __fastcall gen_helper_raise_exception ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_raise_exception , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_save_pc\", \"code\": \"unsigned __int64 __fastcall gen_save_pc ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_movi_i64 ( cpu_PC , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_compute_branch", "code": "unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r80"}, {"n": "v34", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s16"}, {"n": "v33", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v32", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v31", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v30", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v29", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v35", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "insn_bytes", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "offset", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r80"}, {"n": "btgt", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "s16"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "post_delay", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "bcond_compute", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "blink", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 520 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_setcond_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_setcond_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4i_i64 ( Number , @@a2@@ , @@a3@@ , @@a4@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_setcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_setcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a4@@ ) ; tcg_gen_setcond_i64 ( @@a1@@ , @@a2@@ , @@a3@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_bitops", "code": "unsigned __int64 __fastcall gen_bitops ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { int v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; __int64 v15 ; __int64 v16 ; __int64 v17 ; __int64 v18 ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; switch ( @@a2@@ ) { case Number : if ( @@a5@@ + @@a6@@ > Number ) goto LABEL_24 ; tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; if ( @@a6@@ == Number ) tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; else tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number << ( @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; if ( @@a6@@ != Number ) tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ + Number ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; if ( @@a6@@ - @@a5@@ > Number ) v6 = Number ; else v6 = ( Number << ( @@a6@@ - @@a5@@ + Number ) ) - Number ; v15 = v6 << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v15 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v15 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; if ( @@a6@@ - @@a5@@ > Number ) v7 = Number ; else v7 = ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ; v16 = v7 << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v16 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v16 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; v17 = ( ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ) << ( ( unsigned __int8 ) @@a5@@ + Number ) ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v17 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ + Number ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v17 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; v18 = ( ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ) << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v18 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v18 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; LABEL_25 : gen_store_gpr ( @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; default : LABEL_24 : generate_exception ( @@a1@@ , Number ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; } return __readfsqword ( Number ) ^ @@v19@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v19", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "lsb", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "msb", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 521 | [
"{\"name\": \"tcg_gen_andi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_or_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shli_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shr_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_bshfl", "code": "unsigned __int64 __fastcall gen_bshfl ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_ext16s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { tcg_gen_ext8s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { @@v8@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v8@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v8@@ , @@v8@@ , Number ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( @@v7@@ , @@v7@@ , @@v8@@ ) ; tcg_gen_shri_i64 ( @@v8@@ , @@v7@@ , Number L ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_or_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ , @@v8@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { @@v10@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v10@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v10@@ , @@v10@@ , Number L ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( @@v7@@ , @@v7@@ , @@v10@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_16 ; @@v9@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v9@@ , @@v9@@ , Number ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } LABEL_17 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } } } LABEL_16 : generate_exception ( @@a1@@ , Number ) ; tcg_temp_free_i64 ( @@v7@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "op2", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t1_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t1_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 522 | [
"{\"name\": \"tcg_gen_andi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_or_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shli_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shr_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext8s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext8s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext16s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext16s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mfc0_load32", "code": "unsigned __int64 __fastcall gen_mfc0_load32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_ld_i32 ( @@v3@@ , cpu_env , @@a2@@ ) ; tcg_gen_ext_i32_i64 ( @@a1@@ , @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "off", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 523 | [
"{\"name\": \"tcg_gen_ld_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0\", \"code\": \"unsigned __int64 __fastcall gen_mfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_mfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mfc0_load64", "code": "unsigned __int64 __fastcall gen_mfc0_load64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@a2@@ ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "off", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 524 | [
"{\"name\": \"tcg_gen_ld_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0\", \"code\": \"unsigned __int64 __fastcall gen_mfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_mfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mtc0_store32", "code": "unsigned __int64 __fastcall gen_mtc0_store32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_trunc_i64_i32 ( @@v3@@ , @@a1@@ ) ; tcg_gen_st_i32 ( @@v3@@ , cpu_env , @@a2@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "off", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 525 | [
"{\"name\": \"tcg_gen_st_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0\", \"code\": \"unsigned __int64 __fastcall gen_mtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( ( int ) @@a5@@ > Number ) goto LABEL_112 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_count ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_compare ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( ( int ) @@a5@@ > Number ) { LABEL_112 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } LABEL_110 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_112 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( ! @@a5@@ ) goto LABEL_110 ; if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : case Number : case Number : case Number : goto LABEL_110 ; case Number : gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_91 ; case Number : LABEL_91 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_92 ; case Number : LABEL_92 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_112 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_112 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ <= Number ) goto LABEL_110 ; goto LABEL_112 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mtc0_store64", "code": "unsigned __int64 __fastcall gen_mtc0_store64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a1@@ ) ; tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "off", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 526 | [
"{\"name\": \"tcg_gen_st_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0\", \"code\": \"unsigned __int64 __fastcall gen_mtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( ( int ) @@a5@@ > Number ) goto LABEL_112 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_count ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_compare ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( ( int ) @@a5@@ > Number ) { LABEL_112 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } LABEL_110 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_112 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( ! @@a5@@ ) goto LABEL_110 ; if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : case Number : case Number : case Number : goto LABEL_110 ; case Number : gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_91 ; case Number : LABEL_91 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_92 ; case Number : LABEL_92 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_112 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_112 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ <= Number ) goto LABEL_110 ; goto LABEL_112 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mfc0", "code": "unsigned __int64 __fastcall gen_mfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_mfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "sel", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 527 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ld_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_mvpcontrol\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_mvpcontrol ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_mvpcontrol , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_mvpconf0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_mvpconf0 ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_mvpconf0 , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_mvpconf1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_mvpconf1 ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_mvpconf1 , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_random\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_random ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_random , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tcstatus\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tcstatus ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tcstatus , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tcbind\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tcbind ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tcbind , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tcrestart\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tcrestart ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tcrestart , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tchalt\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tchalt ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tchalt , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tccontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tccontext ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tccontext , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tcschedule\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tcschedule ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tcschedule , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tcschefback\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tcschefback ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tcschefback , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_count\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_count ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_count , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_lladdr\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_lladdr ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_lladdr , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_watchlo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_watchlo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_watchlo , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_watchhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_watchhi ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_watchhi , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_debug\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_debug ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_debug , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_start\", \"code\": \"unsigned __int64 gen_io_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_end\", \"code\": \"unsigned __int64 gen_io_end ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0_load32\", \"code\": \"unsigned __int64 __fastcall gen_mfc0_load32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_ld_i32 ( @@v3@@ , cpu_env , @@a2@@ ) ; tcg_gen_ext_i32_i64 ( @@a1@@ , @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0_load64\", \"code\": \"unsigned __int64 __fastcall gen_mfc0_load64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@a2@@ ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mtc0", "code": "unsigned __int64 __fastcall gen_mtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( ( int ) @@a5@@ > Number ) goto LABEL_112 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_count ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_compare ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( ( int ) @@a5@@ > Number ) { LABEL_112 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } LABEL_110 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_112 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( ! @@a5@@ ) goto LABEL_110 ; if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : case Number : case Number : case Number : goto LABEL_110 ; case Number : gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_91 ; case Number : LABEL_91 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_92 ; case Number : LABEL_92 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_112 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_112 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ <= Number ) goto LABEL_110 ; goto LABEL_112 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "sel", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 528 | [
"{\"name\": \"gen_helper_mtc0_index\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_index ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_index , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_mvpcontrol\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_mvpcontrol ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_mvpcontrol , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpecontrol\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpecontrol ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpecontrol , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpeconf0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpeconf0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpeconf0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpeconf1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpeconf1 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpeconf1 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_yqmask\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_yqmask ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_yqmask , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpeopt\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpeopt ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpeopt , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_entrylo0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_entrylo0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_entrylo0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcstatus\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcstatus ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcstatus , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcbind\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcbind ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcbind , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcrestart\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcrestart ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcrestart , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tchalt\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tchalt ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tchalt , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tccontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tccontext ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tccontext , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcschedule\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcschedule ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcschedule , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcschefback\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcschefback ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcschefback , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_entrylo1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_entrylo1 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_entrylo1 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_context\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_context ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_context , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_pagemask\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_pagemask ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_pagemask , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_pagegrain\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_pagegrain ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_pagegrain , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_wired\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_wired ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_wired , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf1 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf1 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf2\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf2 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf2 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf3\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf3 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf3 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf4\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf4 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf4 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_hwrena\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_hwrena ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_hwrena , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_count\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_count ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_count , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_entryhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_entryhi ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_entryhi , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_compare\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_compare ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_compare , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_status\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_status ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_status , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_intctl\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_intctl ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_intctl , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsctl\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsctl ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsctl , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_cause\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_cause ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_cause , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_ebase\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_ebase ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_ebase , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_config0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_config0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_config0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_config2\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_config2 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_config2 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_lladdr\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_lladdr ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_lladdr , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_watchlo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_watchlo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_watchlo , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_watchhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_watchhi ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_watchhi , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_xcontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_xcontext ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_xcontext , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_framemask\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_framemask ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_framemask , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_debug\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_debug ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_debug , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_performance0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_performance0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_performance0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_taglo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_taglo ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_taglo , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_datalo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_datalo ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_datalo , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_taghi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_taghi ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_taghi , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_datahi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_datahi ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_datahi , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_start\", \"code\": \"unsigned __int64 gen_io_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_end\", \"code\": \"unsigned __int64 gen_io_end ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_save_pc\", \"code\": \"unsigned __int64 __fastcall gen_save_pc ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_movi_i64 ( cpu_PC , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0_store32\", \"code\": \"unsigned __int64 __fastcall gen_mtc0_store32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_trunc_i64_i32 ( @@v3@@ , @@a1@@ ) ; tcg_gen_st_i32 ( @@v3@@ , cpu_env , @@a2@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0_store64\", \"code\": \"unsigned __int64 __fastcall gen_mtc0_store64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a1@@ ) ; tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_dmfc0", "code": "unsigned __int64 __fastcall gen_dmfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_dmfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_dmfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "sel", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 529 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ld_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ld_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_mvpcontrol\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_mvpcontrol ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_mvpcontrol , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_mvpconf0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_mvpconf0 ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_mvpconf0 , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_mvpconf1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_mvpconf1 ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_mvpconf1 , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_random\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_random ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_random , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tcstatus\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tcstatus ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tcstatus , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_tcbind\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_tcbind ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_tcbind , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_count\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_count ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_count , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_watchhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_watchhi ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_watchhi , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfc0_debug\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfc0_debug ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mfc0_debug , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmfc0_tcrestart\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmfc0_tcrestart ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_dmfc0_tcrestart , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmfc0_tchalt\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmfc0_tchalt ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_dmfc0_tchalt , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmfc0_tccontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmfc0_tccontext ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_dmfc0_tccontext , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmfc0_tcschedule\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmfc0_tcschedule ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_dmfc0_tcschedule , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmfc0_tcschefback\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmfc0_tcschefback ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_dmfc0_tcschefback , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmfc0_lladdr\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmfc0_lladdr ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_dmfc0_lladdr , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmfc0_watchlo\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmfc0_watchlo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_dmfc0_watchlo , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_start\", \"code\": \"unsigned __int64 gen_io_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_end\", \"code\": \"unsigned __int64 gen_io_end ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0_load32\", \"code\": \"unsigned __int64 __fastcall gen_mfc0_load32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_ld_i32 ( @@v3@@ , cpu_env , @@a2@@ ) ; tcg_gen_ext_i32_i64 ( @@a1@@ , @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0\", \"code\": \"unsigned __int64 __fastcall gen_mfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_mfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_dmtc0", "code": "unsigned __int64 __fastcall gen_dmtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( @@a5@@ > Number ) goto LABEL_120 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( @@a5@@ ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_118 ; case Number : case Number : case Number : goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_count ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_compare ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( @@a5@@ > Number ) goto LABEL_120 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : if ( ! @@a5@@ ) goto LABEL_118 ; if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ == Number ) goto LABEL_118 ; if ( @@a5@@ > Number ) goto LABEL_120 ; if ( @@a5@@ == Number ) { gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) { LABEL_120 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } } else { gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } LABEL_118 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( ( unsigned int ) @@a5@@ > Number ) goto LABEL_120 ; @@v10@@ = tcg_const_i32 ( ( unsigned int ) @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_118 ; case Number : if ( ( unsigned int ) @@a5@@ > Number ) goto LABEL_120 ; @@v9@@ = tcg_const_i32 ( ( unsigned int ) @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_99 ; case Number : LABEL_99 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_100 ; case Number : LABEL_100 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_120 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_120 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( ( unsigned int ) @@a5@@ <= Number ) goto LABEL_118 ; goto LABEL_120 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_118 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_118 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( @@a5@@ ) goto LABEL_120 ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; default : goto LABEL_120 ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "sel", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 530 | [
"{\"name\": \"tcg_gen_st_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_st_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_index\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_index ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_index , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_mvpcontrol\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_mvpcontrol ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_mvpcontrol , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpecontrol\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpecontrol ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpecontrol , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpeconf0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpeconf0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpeconf0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpeconf1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpeconf1 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpeconf1 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_yqmask\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_yqmask ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_yqmask , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_vpeopt\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_vpeopt ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_vpeopt , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_entrylo0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_entrylo0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_entrylo0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcstatus\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcstatus ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcstatus , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcbind\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcbind ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcbind , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcrestart\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcrestart ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcrestart , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tchalt\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tchalt ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tchalt , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tccontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tccontext ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tccontext , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcschedule\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcschedule ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcschedule , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_tcschefback\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_tcschefback ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_tcschefback , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_entrylo1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_entrylo1 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_entrylo1 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_context\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_context ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_context , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_pagemask\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_pagemask ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_pagemask , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_pagegrain\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_pagegrain ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_pagegrain , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_wired\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_wired ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_wired , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf1\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf1 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf1 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf2\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf2 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf2 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf3\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf3 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf3 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsconf4\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsconf4 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsconf4 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_hwrena\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_hwrena ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_hwrena , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_count\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_count ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_count , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_entryhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_entryhi ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_entryhi , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_compare\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_compare ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_compare , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_status\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_status ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_status , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_intctl\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_intctl ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_intctl , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_srsctl\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_srsctl ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_srsctl , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_cause\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_cause ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_cause , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_ebase\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_ebase ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_ebase , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_config0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_config0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_config0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_config2\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_config2 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_config2 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_lladdr\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_lladdr ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_lladdr , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_watchlo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_watchlo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_watchlo , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_watchhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_watchhi ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_watchhi , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_xcontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_xcontext ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_xcontext , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_framemask\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_framemask ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_framemask , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_debug\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_debug ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_debug , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_performance0\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_performance0 ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_performance0 , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_taglo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_taglo ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_taglo , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_datalo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_datalo ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_datalo , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_taghi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_taghi ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_taghi , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtc0_datahi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtc0_datahi ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtc0_datahi , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_start\", \"code\": \"unsigned __int64 gen_io_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_end\", \"code\": \"unsigned __int64 gen_io_end ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_save_pc\", \"code\": \"unsigned __int64 __fastcall gen_save_pc ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_movi_i64 ( cpu_PC , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0_store32\", \"code\": \"unsigned __int64 __fastcall gen_mtc0_store32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_trunc_i64_i32 ( @@v3@@ , @@a1@@ ) ; tcg_gen_st_i32 ( @@v3@@ , cpu_env , @@a2@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0\", \"code\": \"unsigned __int64 __fastcall gen_mtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( ( int ) @@a5@@ > Number ) goto LABEL_112 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_count ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_compare ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( ( int ) @@a5@@ > Number ) { LABEL_112 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } LABEL_110 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_112 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( ! @@a5@@ ) goto LABEL_110 ; if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : case Number : case Number : case Number : goto LABEL_110 ; case Number : gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_91 ; case Number : LABEL_91 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_92 ; case Number : LABEL_92 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_112 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_112 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ <= Number ) goto LABEL_110 ; goto LABEL_112 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mftr", "code": "unsigned __int64 __fastcall gen_mftr ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , signed int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned __int64 @@v30@@ ; @@v30@@ = __readfsqword ( Number ) ; @@v12@@ = ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; if ( ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number || ( ( ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number L * @@v12@@ + Number ) ^ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ) & Number ) == Number ) && ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) <= ( int ) ( unsigned __int8 ) * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) { if ( @@a5@@ ) { if ( @@a6@@ == Number ) { @@v14@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_cfc1 ( @@v13@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; goto LABEL_57 ; } if ( @@a6@@ <= Number ) { switch ( @@a6@@ ) { case Number : if ( @@a7@@ ) { @@v15@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v15@@ , @@a3@@ ) ; tcg_gen_ext_i32_i64 ( @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; } else { @@v16@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v16@@ , @@a3@@ ) ; tcg_gen_ext_i32_i64 ( @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; } goto LABEL_57 ; case Number : @@v29@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_mftgpr ( @@v13@@ , @@v29@@ ) ; tcg_temp_free_i32 ( @@v29@@ ) ; goto LABEL_57 ; case Number : switch ( @@a3@@ ) { case Number : @@v28@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; goto LABEL_57 ; case Number : @@v27@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v27@@ ) ; tcg_temp_free_i32 ( @@v27@@ ) ; goto LABEL_57 ; case Number : @@v26@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; goto LABEL_57 ; case Number : @@v25@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; goto LABEL_57 ; case Number : @@v24@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; goto LABEL_57 ; case Number : @@v23@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; goto LABEL_57 ; case Number : @@v22@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; goto LABEL_57 ; case Number : @@v21@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; goto LABEL_57 ; case Number : @@v20@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; goto LABEL_57 ; case Number : @@v19@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; goto LABEL_57 ; case Number : @@v18@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; goto LABEL_57 ; case Number : @@v17@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; goto LABEL_57 ; case Number : gen_helper_mftdsp ( @@v13@@ ) ; goto LABEL_57 ; default : goto LABEL_58 ; } } } LABEL_58 : tcg_temp_free_i64 ( @@v13@@ ) ; generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v30@@ ; } if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) { LABEL_21 : gen_mfc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; goto LABEL_57 ; } if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) goto LABEL_21 ; if ( @@a3@@ == Number ) { switch ( @@a6@@ ) { case Number : gen_helper_mftc0_tcstatus ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcbind ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcrestart ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tchalt ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tccontext ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcschedule ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcschefback ( @@v13@@ ) ; break ; default : goto LABEL_21 ; } goto LABEL_57 ; } if ( @@a3@@ != Number ) goto LABEL_21 ; if ( @@a6@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , @@v13@@ , Number , @@a6@@ ) ; else gen_helper_mftc0_entryhi ( @@v13@@ ) ; } if ( @@a6@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; else gen_helper_mftc0_status ( @@v13@@ ) ; } if ( ! @@a6@@ ) { gen_helper_mftc0_debug ( @@v13@@ ) ; goto LABEL_57 ; } goto LABEL_21 ; } tcg_gen_movi_i64 ( @@v13@@ , Number ) ; LABEL_57 : gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; return __readfsqword ( Number ) ^ @@v30@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "signed int", "s": 4}, "location": "r80"}, {"n": "a7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "v29", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v28", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v27", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v30", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s80"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "u", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "sel", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "h", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "fp0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "other_tc", "t": {"T": 1, "n": "int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 531 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_tcstatus\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_tcstatus ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_tcstatus , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_tcbind\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_tcbind ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_tcbind , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_tcrestart\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_tcrestart ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_tcrestart , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_tchalt\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_tchalt ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_tchalt , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_tccontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_tccontext ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_tccontext , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_tcschedule\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_tcschedule ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_tcschedule , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_tcschefback\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_tcschefback ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_tcschefback , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_entryhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_entryhi ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_entryhi , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_status\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_status ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_status , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftc0_debug\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftc0_debug ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftc0_debug , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftgpr\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftgpr ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mftgpr , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftlo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftlo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mftlo , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mfthi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mfthi ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mfthi , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftacx\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftacx ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mftacx , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mftdsp\", \"code\": \"unsigned __int64 __fastcall gen_helper_mftdsp ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_mftdsp , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cfc1\", \"code\": \"unsigned __int64 __fastcall gen_helper_cfc1 ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cfc1 , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0\", \"code\": \"unsigned __int64 __fastcall gen_mfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_mfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mttr", "code": "unsigned __int64 __fastcall gen_mttr ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , signed int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned __int64 @@v30@@ ; @@v30@@ = __readfsqword ( Number ) ; @@v12@@ = ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v13@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( ( ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number L * @@v12@@ + Number ) ^ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ) & Number ) != Number || ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) > ( int ) ( unsigned __int8 ) * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) { goto LABEL_56 ; } if ( @@a5@@ ) { if ( @@a6@@ == Number ) { @@v14@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_ctc1 ( @@v13@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; goto LABEL_56 ; } if ( @@a6@@ <= Number ) { switch ( @@a6@@ ) { case Number : if ( @@a7@@ ) { @@v15@@ = tcg_temp_new_i32 ( @@v13@@ ) ; tcg_gen_trunc_i64_i32 ( @@v15@@ , @@v13@@ ) ; gen_store_fpr32h ( @@v15@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; } else { @@v16@@ = tcg_temp_new_i32 ( @@v13@@ ) ; tcg_gen_trunc_i64_i32 ( @@v16@@ , @@v13@@ ) ; gen_store_fpr32 ( @@v16@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; } goto LABEL_56 ; case Number : @@v29@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_mttgpr ( @@v13@@ , @@v29@@ ) ; tcg_temp_free_i32 ( @@v29@@ ) ; goto LABEL_56 ; case Number : switch ( @@a3@@ ) { case Number : @@v28@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; goto LABEL_56 ; case Number : @@v27@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v27@@ ) ; tcg_temp_free_i32 ( @@v27@@ ) ; goto LABEL_56 ; case Number : @@v26@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; goto LABEL_56 ; case Number : @@v25@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; goto LABEL_56 ; case Number : @@v24@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; goto LABEL_56 ; case Number : @@v23@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; goto LABEL_56 ; case Number : @@v22@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; goto LABEL_56 ; case Number : @@v21@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; goto LABEL_56 ; case Number : @@v20@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; goto LABEL_56 ; case Number : @@v19@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; goto LABEL_56 ; case Number : @@v18@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; goto LABEL_56 ; case Number : @@v17@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; goto LABEL_56 ; case Number : gen_helper_mttdsp ( @@v13@@ ) ; goto LABEL_56 ; default : goto LABEL_57 ; } } } LABEL_57 : tcg_temp_free_i64 ( @@v13@@ ) ; generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v30@@ ; } if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) goto LABEL_20 ; if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) goto LABEL_20 ; if ( @@a3@@ == Number ) { switch ( @@a6@@ ) { case Number : gen_helper_mttc0_tcstatus ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcbind ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcrestart ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tchalt ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tccontext ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcschedule ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcschefback ( @@v13@@ ) ; break ; default : goto LABEL_20 ; } goto LABEL_56 ; } if ( @@a3@@ != Number ) goto LABEL_20 ; if ( @@a6@@ ) gen_mtc0 ( @@a1@@ , @@a2@@ , @@v13@@ , Number , @@a6@@ ) ; else gen_helper_mttc0_entryhi ( @@v13@@ ) ; } if ( @@a6@@ ) gen_mtc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; else gen_helper_mttc0_status ( @@v13@@ ) ; } if ( ! @@a6@@ ) { gen_helper_mttc0_debug ( @@v13@@ ) ; goto LABEL_56 ; } LABEL_20 : gen_mtc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; LABEL_56 : tcg_temp_free_i64 ( @@v13@@ ) ; return __readfsqword ( Number ) ^ @@v30@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "signed int", "s": 4}, "location": "r80"}, {"n": "a7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "v29", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v28", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v27", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v30", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s80"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "u", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "sel", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "h", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "helper_tmp_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "helper_tmp_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "helper_tmp_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "helper_tmp_6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "helper_tmp_7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "helper_tmp_8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "helper_tmp_9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "helper_tmp_10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "helper_tmp_11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s64"}, {"n": "fp0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s68"}, {"n": "helper_tmp_12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s72"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "", "t": {"T": 10}, "location": "s8"}, {"n": "other_tc", "t": {"T": 1, "n": "int", "s": 4}, "location": "s80"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 532 | [
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_tcstatus\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_tcstatus ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_tcstatus , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_tcbind\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_tcbind ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_tcbind , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_tcrestart\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_tcrestart ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_tcrestart , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_tchalt\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_tchalt ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_tchalt , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_tccontext\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_tccontext ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_tccontext , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_tcschedule\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_tcschedule ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_tcschedule , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_tcschefback\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_tcschefback ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_tcschefback , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_entryhi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_entryhi ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_entryhi , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_status\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_status ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_status , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttc0_debug\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttc0_debug ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttc0_debug , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttgpr\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttgpr ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttgpr , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttlo\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttlo ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttlo , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mtthi\", \"code\": \"unsigned __int64 __fastcall gen_helper_mtthi ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mtthi , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttacx\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttacx ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttacx , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_mttdsp\", \"code\": \"unsigned __int64 __fastcall gen_helper_mttdsp ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_mttdsp , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_ctc1\", \"code\": \"unsigned __int64 __fastcall gen_helper_ctc1 ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_ctc1 , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0\", \"code\": \"unsigned __int64 __fastcall gen_mtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( ( int ) @@a5@@ > Number ) goto LABEL_112 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_count ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_compare ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( ( int ) @@a5@@ > Number ) { LABEL_112 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } LABEL_110 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_112 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( ! @@a5@@ ) goto LABEL_110 ; if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : case Number : case Number : case Number : goto LABEL_110 ; case Number : gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_91 ; case Number : LABEL_91 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_92 ; case Number : LABEL_92 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_112 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_112 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ <= Number ) goto LABEL_110 ; goto LABEL_112 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cp0", "code": "unsigned __int64 __fastcall gen_cp0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbr ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbwi ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbwr ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbp ( ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_eret ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) goto LABEL_34 ; gen_helper_deret ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; * ( _QWORD * ) ( @@a2@@ + Number ) += Number L ; save_cpu_state ( @@a2@@ , Number ) ; * ( _QWORD * ) ( @@a2@@ + Number ) -= Number L ; gen_helper_wait ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; default : goto LABEL_34 ; } } else if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mttr ( @@a1@@ , @@a2@@ , @@a5@@ , @@a4@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( @@a5@@ ) gen_mftr ( @@a1@@ , @@a2@@ , @@a4@@ , @@a5@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; gen_dmtc0 ( @@a1@@ , @@a2@@ , @@v8@@ , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; tcg_temp_free_i64 ( @@v8@@ ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_mtc0 ( @@a1@@ , @@a2@@ , @@v9@@ , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { if ( @@a4@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a4@@ ] , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; } else { if ( @@a3@@ != Number ) { LABEL_34 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v10@@ ; } check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( @@a4@@ ) gen_dmfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a4@@ ] , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; } } } } } return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 533 | [
"{\"name\": \"gen_helper_tlbwi\", \"code\": \"unsigned __int64 gen_helper_tlbwi ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbwi , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_tlbwr\", \"code\": \"unsigned __int64 gen_helper_tlbwr ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbwr , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_tlbp\", \"code\": \"unsigned __int64 gen_helper_tlbp ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbp , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_tlbr\", \"code\": \"unsigned __int64 gen_helper_tlbr ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_tlbr , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_eret\", \"code\": \"unsigned __int64 gen_helper_eret ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_eret , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_deret\", \"code\": \"unsigned __int64 gen_helper_deret ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_deret , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_wait\", \"code\": \"unsigned __int64 gen_helper_wait ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_wait , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0\", \"code\": \"unsigned __int64 __fastcall gen_mfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_mfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0\", \"code\": \"unsigned __int64 __fastcall gen_mtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( ( int ) @@a5@@ > Number ) goto LABEL_112 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_count ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_compare ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( ( int ) @@a5@@ > Number ) { LABEL_112 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } LABEL_110 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_112 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( ! @@a5@@ ) goto LABEL_110 ; if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : case Number : case Number : case Number : goto LABEL_110 ; case Number : gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_91 ; case Number : LABEL_91 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_92 ; case Number : LABEL_92 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_112 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_112 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ <= Number ) goto LABEL_110 ; goto LABEL_112 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_dmfc0\", \"code\": \"unsigned __int64 __fastcall gen_dmfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_dmfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_dmfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_dmtc0\", \"code\": \"unsigned __int64 __fastcall gen_dmtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( @@a5@@ > Number ) goto LABEL_120 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_118 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( @@a5@@ ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_118 ; case Number : case Number : case Number : goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_count ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_compare ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( @@a5@@ > Number ) goto LABEL_120 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : if ( ! @@a5@@ ) goto LABEL_118 ; if ( @@a5@@ != Number ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ == Number ) goto LABEL_118 ; if ( @@a5@@ > Number ) goto LABEL_120 ; if ( @@a5@@ == Number ) { gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) { LABEL_120 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } } else { gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } LABEL_118 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( ( unsigned int ) @@a5@@ > Number ) goto LABEL_120 ; @@v10@@ = tcg_const_i32 ( ( unsigned int ) @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_118 ; case Number : if ( ( unsigned int ) @@a5@@ > Number ) goto LABEL_120 ; @@v9@@ = tcg_const_i32 ( ( unsigned int ) @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_99 ; case Number : LABEL_99 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_100 ; case Number : LABEL_100 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_120 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_120 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( ( unsigned int ) @@a5@@ <= Number ) goto LABEL_118 ; goto LABEL_120 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_118 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_118 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_118 ; default : goto LABEL_120 ; } case Number : if ( @@a5@@ ) goto LABEL_120 ; tcg_gen_st_i64 ( @@a3@@ , cpu_env , Number L ) ; goto LABEL_118 ; case Number : if ( @@a5@@ ) goto LABEL_120 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_118 ; default : goto LABEL_120 ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mftr\", \"code\": \"unsigned __int64 __fastcall gen_mftr ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , signed int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned __int64 @@v30@@ ; @@v30@@ = __readfsqword ( Number ) ; @@v12@@ = ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; if ( ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number || ( ( ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number L * @@v12@@ + Number ) ^ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ) & Number ) == Number ) && ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) <= ( int ) ( unsigned __int8 ) * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) { if ( @@a5@@ ) { if ( @@a6@@ == Number ) { @@v14@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_cfc1 ( @@v13@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; goto LABEL_57 ; } if ( @@a6@@ <= Number ) { switch ( @@a6@@ ) { case Number : if ( @@a7@@ ) { @@v15@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v15@@ , @@a3@@ ) ; tcg_gen_ext_i32_i64 ( @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; } else { @@v16@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v16@@ , @@a3@@ ) ; tcg_gen_ext_i32_i64 ( @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; } goto LABEL_57 ; case Number : @@v29@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_mftgpr ( @@v13@@ , @@v29@@ ) ; tcg_temp_free_i32 ( @@v29@@ ) ; goto LABEL_57 ; case Number : switch ( @@a3@@ ) { case Number : @@v28@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; goto LABEL_57 ; case Number : @@v27@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v27@@ ) ; tcg_temp_free_i32 ( @@v27@@ ) ; goto LABEL_57 ; case Number : @@v26@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; goto LABEL_57 ; case Number : @@v25@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; goto LABEL_57 ; case Number : @@v24@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; goto LABEL_57 ; case Number : @@v23@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; goto LABEL_57 ; case Number : @@v22@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; goto LABEL_57 ; case Number : @@v21@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; goto LABEL_57 ; case Number : @@v20@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; goto LABEL_57 ; case Number : @@v19@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftlo ( @@v13@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; goto LABEL_57 ; case Number : @@v18@@ = tcg_const_i32 ( Number L ) ; gen_helper_mfthi ( @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; goto LABEL_57 ; case Number : @@v17@@ = tcg_const_i32 ( Number L ) ; gen_helper_mftacx ( @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; goto LABEL_57 ; case Number : gen_helper_mftdsp ( @@v13@@ ) ; goto LABEL_57 ; default : goto LABEL_58 ; } } } LABEL_58 : tcg_temp_free_i64 ( @@v13@@ ) ; generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v30@@ ; } if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) { LABEL_21 : gen_mfc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; goto LABEL_57 ; } if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) goto LABEL_21 ; if ( @@a3@@ == Number ) { switch ( @@a6@@ ) { case Number : gen_helper_mftc0_tcstatus ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcbind ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcrestart ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tchalt ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tccontext ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcschedule ( @@v13@@ ) ; break ; case Number : gen_helper_mftc0_tcschefback ( @@v13@@ ) ; break ; default : goto LABEL_21 ; } goto LABEL_57 ; } if ( @@a3@@ != Number ) goto LABEL_21 ; if ( @@a6@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , @@v13@@ , Number , @@a6@@ ) ; else gen_helper_mftc0_entryhi ( @@v13@@ ) ; } if ( @@a6@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; else gen_helper_mftc0_status ( @@v13@@ ) ; } if ( ! @@a6@@ ) { gen_helper_mftc0_debug ( @@v13@@ ) ; goto LABEL_57 ; } goto LABEL_21 ; } tcg_gen_movi_i64 ( @@v13@@ , Number ) ; LABEL_57 : gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; return __readfsqword ( Number ) ^ @@v30@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"signed int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"a7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s-16\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_mttr\", \"code\": \"unsigned __int64 __fastcall gen_mttr ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , signed int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned __int64 @@v30@@ ; @@v30@@ = __readfsqword ( Number ) ; @@v12@@ = ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v13@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( ( ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number L * @@v12@@ + Number ) ^ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) ) & Number ) != Number || ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) > ( int ) ( unsigned __int8 ) * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) { goto LABEL_56 ; } if ( @@a5@@ ) { if ( @@a6@@ == Number ) { @@v14@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_ctc1 ( @@v13@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; goto LABEL_56 ; } if ( @@a6@@ <= Number ) { switch ( @@a6@@ ) { case Number : if ( @@a7@@ ) { @@v15@@ = tcg_temp_new_i32 ( @@v13@@ ) ; tcg_gen_trunc_i64_i32 ( @@v15@@ , @@v13@@ ) ; gen_store_fpr32h ( @@v15@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; } else { @@v16@@ = tcg_temp_new_i32 ( @@v13@@ ) ; tcg_gen_trunc_i64_i32 ( @@v16@@ , @@v13@@ ) ; gen_store_fpr32 ( @@v16@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; } goto LABEL_56 ; case Number : @@v29@@ = tcg_const_i32 ( ( unsigned int ) @@a3@@ ) ; gen_helper_mttgpr ( @@v13@@ , @@v29@@ ) ; tcg_temp_free_i32 ( @@v29@@ ) ; goto LABEL_56 ; case Number : switch ( @@a3@@ ) { case Number : @@v28@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; goto LABEL_56 ; case Number : @@v27@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v27@@ ) ; tcg_temp_free_i32 ( @@v27@@ ) ; goto LABEL_56 ; case Number : @@v26@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; goto LABEL_56 ; case Number : @@v25@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; goto LABEL_56 ; case Number : @@v24@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; goto LABEL_56 ; case Number : @@v23@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; goto LABEL_56 ; case Number : @@v22@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; goto LABEL_56 ; case Number : @@v21@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; goto LABEL_56 ; case Number : @@v20@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; goto LABEL_56 ; case Number : @@v19@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttlo ( @@v13@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; goto LABEL_56 ; case Number : @@v18@@ = tcg_const_i32 ( Number L ) ; gen_helper_mtthi ( @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; goto LABEL_56 ; case Number : @@v17@@ = tcg_const_i32 ( Number L ) ; gen_helper_mttacx ( @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; goto LABEL_56 ; case Number : gen_helper_mttdsp ( @@v13@@ ) ; goto LABEL_56 ; default : goto LABEL_57 ; } } } LABEL_57 : tcg_temp_free_i64 ( @@v13@@ ) ; generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v30@@ ; } if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) goto LABEL_20 ; if ( @@a3@@ != Number ) { if ( @@a3@@ > Number ) goto LABEL_20 ; if ( @@a3@@ == Number ) { switch ( @@a6@@ ) { case Number : gen_helper_mttc0_tcstatus ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcbind ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcrestart ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tchalt ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tccontext ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcschedule ( @@v13@@ ) ; break ; case Number : gen_helper_mttc0_tcschefback ( @@v13@@ ) ; break ; default : goto LABEL_20 ; } goto LABEL_56 ; } if ( @@a3@@ != Number ) goto LABEL_20 ; if ( @@a6@@ ) gen_mtc0 ( @@a1@@ , @@a2@@ , @@v13@@ , Number , @@a6@@ ) ; else gen_helper_mttc0_entryhi ( @@v13@@ ) ; } if ( @@a6@@ ) gen_mtc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; else gen_helper_mttc0_status ( @@v13@@ ) ; } if ( ! @@a6@@ ) { gen_helper_mttc0_debug ( @@v13@@ ) ; goto LABEL_56 ; } LABEL_20 : gen_mtc0 ( @@a1@@ , @@a2@@ , @@v13@@ , @@a3@@ , @@a6@@ ) ; LABEL_56 : tcg_temp_free_i64 ( @@v13@@ ) ; return __readfsqword ( Number ) ^ @@v30@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"signed int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"a7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s-16\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s80\"}]}"
]
|
{"name": "gen_compute_branch1", "code": "unsigned __int64 __fastcall gen_compute_branch1 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; unsigned int v16 ; unsigned int v17 ; unsigned int v18 ; unsigned int v19 ; unsigned int v20 ; unsigned int v21 ; int v22 ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; __int64 @@v32@@ ; unsigned __int64 @@v33@@ ; @@v33@@ = __readfsqword ( Number ) ; @@v27@@ = tcg_temp_new_i32 ( @@a1@@ ) ; if ( @@a4@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v32@@ = * ( _QWORD * ) ( @@a2@@ + Number ) + @@a5@@ + Number L ; if ( @@a3@@ == Number ) { @@v28@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v18 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v18 ) ; v19 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v19 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; v20 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v20 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; v21 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v21 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v29@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v14 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v14 ) ; v15 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v15 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; v16 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v16 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; v17 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v17 ) ; tcg_gen_nor_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; tcg_temp_free_i32 ( @@v29@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v30@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v12 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v12 ) ; v13 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v30@@ , fpu_fcr31 , v13 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v30@@ ) ; tcg_temp_free_i32 ( @@v30@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v31@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v10 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v10 ) ; v11 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v31@@ , fpu_fcr31 , v11 ) ; tcg_gen_nor_i32 ( @@v27@@ , @@v27@@ , @@v31@@ ) ; tcg_temp_free_i32 ( @@v31@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; LABEL_27 : v22 = * ( _DWORD * ) ( @@a2@@ + Number ) ; BYTE1 ( v22 ) |= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = v22 ; goto LABEL_29 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { v8 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v8 ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_22 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { v6 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v6 ) ; tcg_gen_not_i32 ( @@v27@@ , @@v27@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; LABEL_22 : v9 = * ( _DWORD * ) ( @@a2@@ + Number ) ; BYTE1 ( v9 ) |= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = v9 ; LABEL_29 : * ( _QWORD * ) ( @@a2@@ + Number ) = @@v32@@ ; goto LABEL_30 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { v5 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v5 ) ; tcg_gen_not_i32 ( @@v27@@ , @@v27@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; } else { if ( @@a3@@ != Number ) goto LABEL_28 ; v7 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v7 ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; } goto LABEL_27 ; } LABEL_28 : generate_exception ( @@a2@@ , Number ) ; LABEL_30 : tcg_temp_free_i32 ( @@v27@@ ) ; return __readfsqword ( Number ) ^ @@v33@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v32", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v31", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v30", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v29", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v28", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v27", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v33", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "op", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "cc", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "offset", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r72"}, {"n": "btarget", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "s16"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "t1_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "t1_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "t1_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 534 | [
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_or_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shri_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shri_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_shr_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_extu_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_extu_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_not_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_not_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_nor_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_nor_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_or_i32 ( @@a1@@ , @@a2@@ , @@a3@@ ) ; tcg_gen_not_i32 ( @@a1@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_fp_bit\", \"code\": \"__int64 __fastcall get_fp_bit ( int @@a1@@ ) { __int64 @@result@@ ; if ( @@a1@@ ) @@result@@ = ( unsigned int ) ( @@a1@@ + Number ) ; else @@result@@ = Number L ; return @@result@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"result\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_cp1", "code": "unsigned __int64 __fastcall gen_cp1 ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , unsigned int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned __int64 @@v14@@ ; @@v14@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v8@@ = tcg_temp_new_i32 ( @@v7@@ ) ; tcg_gen_trunc_i64_i32 ( @@v8@@ , @@v7@@ ) ; gen_store_fpr32h ( @@v8@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v9@@ = tcg_const_i32 ( @@a4@@ ) ; gen_helper_ctc1 ( @@v7@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v7@@ , @@a4@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v10@@ = tcg_temp_new_i32 ( @@v7@@ ) ; tcg_gen_trunc_i64_i32 ( @@v10@@ , @@v7@@ ) ; gen_store_fpr32 ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v11@@ , @@a4@@ ) ; tcg_gen_ext_i32_i64 ( @@v7@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { @@v12@@ = tcg_const_i32 ( @@a4@@ ) ; gen_helper_cfc1 ( @@v7@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) { LABEL_24 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_25 ; } if ( @@a2@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v13@@ , @@a4@@ ) ; tcg_gen_ext_i32_i64 ( @@v7@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_24 ; gen_load_fpr64 ( @@a1@@ , @@v7@@ , @@a4@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } LABEL_25 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v14@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v14", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "fp0_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "fp0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "fp0_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 535 | [
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_cfc1\", \"code\": \"unsigned __int64 __fastcall gen_helper_cfc1 ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_cfc1 , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_ctc1\", \"code\": \"unsigned __int64 __fastcall gen_helper_ctc1 ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_ctc1 , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_st_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i64 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@a2@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ & Number ) ; tcg_gen_shri_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@v5@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_movci", "code": "unsigned __int64 __fastcall gen_movci ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { char @@v5@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) { @@v10@@ = gen_new_label ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v5@@ = get_fp_bit ( @@a4@@ ) ; tcg_gen_andi_i32 ( @@v11@@ , fpu_fcr31 , Number << @@v5@@ ) ; tcg_gen_brcondi_i32 ( @@a5@@ == Number , @@v11@@ , Number , @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a2@@ ] , Number L ) ; gen_set_label ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v12@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "tf_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 536 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i32 ( unsigned int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_brcond_i32 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_fp_bit\", \"code\": \"__int64 __fastcall get_fp_bit ( int @@a1@@ ) { __int64 @@result@@ ; if ( @@a1@@ ) @@result@@ = ( unsigned int ) ( @@a1@@ + Number ) ; else @@result@@ = Number L ; return @@result@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"result\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
]
|
{"name": "gen_movcf_s", "code": "unsigned __int64 __fastcall gen_movcf_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { char @@v4@@ ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v8@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v9@@ = gen_new_label ( @@a1@@ ) ; @@v4@@ = get_fp_bit ( @@a3@@ ) ; tcg_gen_andi_i32 ( @@v8@@ , fpu_fcr31 , Number << @@v4@@ ) ; tcg_gen_brcondi_i32 ( @@a4@@ == Number , @@v8@@ , Number , @@v9@@ ) ; gen_load_fpr32 ( @@v8@@ , @@a1@@ ) ; gen_store_fpr32 ( @@v8@@ , @@a2@@ ) ; gen_set_label ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "tf_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "fd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 537 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i32 ( unsigned int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_brcond_i32 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_fp_bit\", \"code\": \"__int64 __fastcall get_fp_bit ( int @@a1@@ ) { __int64 @@result@@ ; if ( @@a1@@ ) @@result@@ = ( unsigned int ) ( @@a1@@ + Number ) ; else @@result@@ = Number L ; return @@result@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"result\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_movcf_d", "code": "unsigned __int64 __fastcall gen_movcf_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { char @@v5@@ ; unsigned int @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v10@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v11@@ = gen_new_label ( @@a1@@ ) ; @@v5@@ = get_fp_bit ( @@a4@@ ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << @@v5@@ ) ; tcg_gen_brcondi_i32 ( @@a5@@ == Number , @@v10@@ , Number , @@v11@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@v10@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a2@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v12@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; gen_set_label ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v13@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "fd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "tf_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 538 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i32 ( unsigned int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_brcond_i32 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_st_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i64 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@a2@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ & Number ) ; tcg_gen_shri_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@v5@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_fp_bit\", \"code\": \"__int64 __fastcall get_fp_bit ( int @@a1@@ ) { __int64 @@result@@ ; if ( @@a1@@ ) @@result@@ = ( unsigned int ) ( @@a1@@ + Number ) ; else @@result@@ = Number L ; return @@result@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"result\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_movcf_ps", "code": "unsigned __int64 __fastcall gen_movcf_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { char v4 ; char v5 ; _BOOL4 @@v9@@ ; unsigned int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v10@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v11@@ = gen_new_label ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; @@v9@@ = @@a4@@ == Number ; v4 = get_fp_bit ( @@a3@@ ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << v4 ) ; tcg_gen_brcondi_i32 ( @@v9@@ , @@v10@@ , Number , @@v11@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a1@@ ) ; gen_store_fpr32 ( @@v10@@ , @@a2@@ ) ; gen_set_label ( @@v11@@ ) ; v5 = get_fp_bit ( @@a3@@ + Number ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << v5 ) ; tcg_gen_brcondi_i32 ( @@v9@@ , @@v10@@ , Number , @@v12@@ ) ; gen_load_fpr32h ( @@v10@@ , @@a1@@ ) ; gen_store_fpr32h ( @@v10@@ , @@a2@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; gen_set_label ( @@v12@@ ) ; return __readfsqword ( Number ) ^ @@v13@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "_BOOL4", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "cc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "tf_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "fd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "l2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "cond", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 539 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i32 ( unsigned int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_brcond_i32 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_fp_bit\", \"code\": \"__int64 __fastcall get_fp_bit ( int @@a1@@ ) { __int64 @@result@@ ; if ( @@a1@@ ) @@result@@ = ( unsigned int ) ( @@a1@@ + Number ) ; else @@result@@ = Number L ; return @@result@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"result\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_farith", "code": "unsigned __int64 __fastcall gen_farith ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , unsigned int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { __int64 @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; unsigned int @@v32@@ ; int @@v33@@ ; unsigned int @@v34@@ ; int @@v35@@ ; unsigned int @@v36@@ ; unsigned int @@v37@@ ; unsigned int @@v38@@ ; unsigned int @@v39@@ ; unsigned int @@v40@@ ; unsigned int @@v41@@ ; unsigned int @@v42@@ ; unsigned int @@v43@@ ; unsigned int @@v44@@ ; unsigned int @@v45@@ ; unsigned int @@v46@@ ; unsigned int @@v47@@ ; unsigned int @@v48@@ ; unsigned int @@v49@@ ; unsigned int @@v50@@ ; unsigned int @@v51@@ ; unsigned int @@v52@@ ; unsigned int @@v53@@ ; unsigned int @@v54@@ ; unsigned int @@v55@@ ; unsigned int @@v56@@ ; unsigned int @@v57@@ ; unsigned int @@v58@@ ; unsigned int @@v59@@ ; unsigned int @@v60@@ ; unsigned int @@v61@@ ; unsigned int @@v62@@ ; unsigned int @@v63@@ ; unsigned int @@v64@@ ; unsigned int @@v65@@ ; int @@v66@@ ; unsigned int @@v67@@ ; int @@v68@@ ; unsigned int @@v69@@ ; unsigned int @@v70@@ ; unsigned int @@v71@@ ; unsigned int @@v72@@ ; unsigned int @@v73@@ ; unsigned int @@v74@@ ; unsigned int @@v75@@ ; unsigned int @@v76@@ ; unsigned int @@v77@@ ; unsigned int @@v78@@ ; unsigned int @@v79@@ ; unsigned int @@v80@@ ; unsigned int @@v81@@ ; unsigned int @@v82@@ ; unsigned int @@v83@@ ; unsigned int @@v84@@ ; unsigned int @@v85@@ ; unsigned int @@v86@@ ; unsigned int @@v87@@ ; unsigned int @@v88@@ ; unsigned int @@v89@@ ; unsigned int @@v90@@ ; unsigned int @@v91@@ ; unsigned int @@v92@@ ; unsigned int @@v93@@ ; unsigned int @@v94@@ ; unsigned int @@v95@@ ; unsigned int @@v96@@ ; unsigned int @@v97@@ ; unsigned int @@v98@@ ; unsigned int @@v99@@ ; unsigned int @@v100@@ ; unsigned int @@v101@@ ; unsigned int @@v102@@ ; unsigned int @@v103@@ ; unsigned int @@v104@@ ; unsigned int @@v105@@ ; unsigned int @@v106@@ ; unsigned int @@v107@@ ; unsigned int @@v108@@ ; unsigned int @@v109@@ ; int @@v110@@ ; unsigned int @@v111@@ ; int @@v112@@ ; unsigned int @@v113@@ ; unsigned int @@v114@@ ; unsigned int @@v115@@ ; unsigned int @@v116@@ ; unsigned int @@v117@@ ; unsigned int @@v118@@ ; unsigned int @@v119@@ ; unsigned int @@v120@@ ; unsigned int @@v121@@ ; unsigned int @@v122@@ ; unsigned int @@v123@@ ; unsigned int @@v124@@ ; unsigned int @@v125@@ ; unsigned int @@v126@@ ; unsigned int @@v127@@ ; unsigned int @@v128@@ ; unsigned int @@v129@@ ; unsigned int @@v130@@ ; unsigned int @@v131@@ ; unsigned int @@v132@@ ; unsigned int @@v133@@ ; unsigned int @@v134@@ ; unsigned int @@v135@@ ; unsigned int @@v136@@ ; unsigned int @@v137@@ ; unsigned __int64 @@v138@@ ; @@v10@@ = @@a1@@ ; @@v138@@ = __readfsqword ( Number ) ; @@v11@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v44@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v45@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v44@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v45@@ , @@a3@@ ) ; gen_helper_float_add_ps ( @@v44@@ , @@v44@@ , @@v45@@ ) ; tcg_temp_free_i64 ( @@v45@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v44@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v44@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v42@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v43@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v42@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v43@@ , @@a3@@ ) ; gen_helper_float_sub_ps ( @@v42@@ , @@v42@@ , @@v43@@ ) ; tcg_temp_free_i64 ( @@v43@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v42@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v42@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v40@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v41@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v40@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v41@@ , @@a3@@ ) ; gen_helper_float_mul_ps ( @@v40@@ , @@v40@@ , @@v41@@ ) ; tcg_temp_free_i64 ( @@v41@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v40@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v40@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v39@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v39@@ , @@a4@@ ) ; gen_helper_float_abs_ps ( @@v39@@ , @@v39@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v39@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v39@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v38@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v38@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v38@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v38@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v37@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v37@@ , @@a4@@ ) ; gen_helper_float_chs_ps ( @@v37@@ , @@v37@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v37@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v37@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; gen_movcf_ps ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v35@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v35@@ ) ; } @@v36@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v36@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v36@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v36@@ ) ; gen_set_label ( @@v35@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v33@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v33@@ ) ; @@v34@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v34@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v34@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v34@@ ) ; gen_set_label ( @@v33@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v31@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v31@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v32@@ , @@a4@@ ) ; gen_helper_float_addr_ps ( @@v31@@ , @@v31@@ , @@v32@@ ) ; tcg_temp_free_i64 ( @@v32@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v31@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v31@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v29@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v30@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v29@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v30@@ , @@a4@@ ) ; gen_helper_float_mulr_ps ( @@v29@@ , @@v29@@ , @@v30@@ ) ; tcg_temp_free_i64 ( @@v30@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v29@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v29@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v27@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v28@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v27@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v28@@ , @@a5@@ ) ; gen_helper_float_recip2_ps ( @@v27@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i64 ( @@v28@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v27@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v27@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v26@@ , @@a4@@ ) ; gen_helper_float_recip1_ps ( @@v26@@ , @@v26@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v26@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v25@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_ps ( @@v25@@ , @@v25@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v25@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v23@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v24@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_ps ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v23@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v22@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v22@@ , @@a4@@ ) ; gen_helper_float_cvts_pu ( @@v22@@ , @@v22@@ ) ; gen_store_fpr32 ( @@v22@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v21@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v21@@ , @@a4@@ ) ; gen_helper_float_cvtpw_ps ( @@v21@@ , @@v21@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v21@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v20@@ , @@a4@@ ) ; gen_helper_float_cvts_pl ( @@v20@@ , @@v20@@ ) ; gen_store_fpr32 ( @@v20@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v18@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v19@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v18@@ , @@a5@@ ) ; gen_store_fpr32 ( @@v19@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v17@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v16@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v17@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v17@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v16@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v14@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v15@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v15@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v14@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v13@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v12@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v13@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v13@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v12@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v46@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v46@@ , @@a4@@ ) ; gen_helper_float_cvtd_l ( @@v46@@ , @@v46@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v46@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v46@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v47@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v48@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v48@@ , @@a4@@ ) ; gen_helper_float_cvts_l ( @@v47@@ , @@v48@@ ) ; tcg_temp_free_i64 ( @@v48@@ ) ; gen_store_fpr32 ( @@v47@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v47@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v49@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v49@@ , @@a4@@ ) ; gen_helper_float_cvtps_pw ( @@v49@@ , @@v49@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v49@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v49@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v50@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v51@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v50@@ , @@a4@@ ) ; gen_helper_float_cvtd_w ( @@v51@@ , @@v50@@ ) ; tcg_temp_free_i32 ( @@v50@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v51@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v51@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) { LABEL_125 : generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { @@v52@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v52@@ , @@a4@@ ) ; gen_helper_float_cvts_w ( @@v52@@ , @@v52@@ ) ; gen_store_fpr32 ( @@v52@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v52@@ ) ; } else if ( @@a2@@ > Number ) { if ( @@a2@@ > Number || @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v92@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v93@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v92@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v93@@ , @@a3@@ ) ; gen_helper_float_add_d ( @@v92@@ , @@v92@@ , @@v93@@ ) ; tcg_temp_free_i64 ( @@v93@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v92@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v92@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v90@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v91@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v90@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v91@@ , @@a3@@ ) ; gen_helper_float_sub_d ( @@v90@@ , @@v90@@ , @@v91@@ ) ; tcg_temp_free_i64 ( @@v91@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v90@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v90@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v88@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v89@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v88@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v89@@ , @@a3@@ ) ; gen_helper_float_mul_d ( @@v88@@ , @@v88@@ , @@v89@@ ) ; tcg_temp_free_i64 ( @@v89@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v88@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v88@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v86@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v87@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v86@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v87@@ , @@a3@@ ) ; gen_helper_float_div_d ( @@v86@@ , @@v86@@ , @@v87@@ ) ; tcg_temp_free_i64 ( @@v87@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v86@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v86@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v85@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v85@@ , @@a4@@ ) ; gen_helper_float_sqrt_d ( @@v85@@ , @@v85@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v85@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v85@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v84@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v84@@ , @@a4@@ ) ; gen_helper_float_abs_d ( @@v84@@ , @@v84@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v84@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v84@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v83@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v83@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v83@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v83@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v82@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v82@@ , @@a4@@ ) ; gen_helper_float_chs_d ( @@v82@@ , @@v82@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v82@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v82@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v81@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v81@@ , @@a4@@ ) ; gen_helper_float_roundl_d ( @@v81@@ , @@v81@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v81@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v81@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v80@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v80@@ , @@a4@@ ) ; gen_helper_float_truncl_d ( @@v80@@ , @@v80@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v80@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v80@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v79@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v79@@ , @@a4@@ ) ; gen_helper_float_ceill_d ( @@v79@@ , @@v79@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v79@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v79@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v78@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v78@@ , @@a4@@ ) ; gen_helper_float_floorl_d ( @@v78@@ , @@v78@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v78@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v78@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v76@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v77@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v77@@ , @@a4@@ ) ; gen_helper_float_roundw_d ( @@v76@@ , @@v77@@ ) ; tcg_temp_free_i64 ( @@v77@@ ) ; gen_store_fpr32 ( @@v76@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v76@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v74@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v75@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v75@@ , @@a4@@ ) ; gen_helper_float_truncw_d ( @@v74@@ , @@v75@@ ) ; tcg_temp_free_i64 ( @@v75@@ ) ; gen_store_fpr32 ( @@v74@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v74@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v72@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v73@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v73@@ , @@a4@@ ) ; gen_helper_float_ceilw_d ( @@v72@@ , @@v73@@ ) ; tcg_temp_free_i64 ( @@v73@@ ) ; gen_store_fpr32 ( @@v72@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v72@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v70@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v71@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v71@@ , @@a4@@ ) ; gen_helper_float_floorw_d ( @@v70@@ , @@v71@@ ) ; tcg_temp_free_i64 ( @@v71@@ ) ; gen_store_fpr32 ( @@v70@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v70@@ ) ; break ; case Number : gen_movcf_d ( @@a1@@ , @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v68@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v68@@ ) ; } @@v69@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v69@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v69@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v69@@ ) ; gen_set_label ( @@v68@@ ) ; break ; case Number : @@v66@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v66@@ ) ; @@v67@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v67@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v67@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v67@@ ) ; gen_set_label ( @@v66@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v65@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v65@@ , @@a4@@ ) ; gen_helper_float_recip_d ( @@v65@@ , @@v65@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v65@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v65@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v64@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v64@@ , @@a4@@ ) ; gen_helper_float_rsqrt_d ( @@v64@@ , @@v64@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v64@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v64@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v62@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v63@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v62@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v63@@ , @@a3@@ ) ; gen_helper_float_recip2_d ( @@v62@@ , @@v62@@ , @@v63@@ ) ; tcg_temp_free_i64 ( @@v63@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v62@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v62@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v61@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v61@@ , @@a4@@ ) ; gen_helper_float_recip1_d ( @@v61@@ , @@v61@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v61@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v61@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v60@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v60@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_d ( @@v60@@ , @@v60@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v60@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v60@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v58@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v59@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v58@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v59@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_d ( @@v58@@ , @@v58@@ , @@v59@@ ) ; tcg_temp_free_i64 ( @@v59@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v58@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v58@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v56@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v57@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v57@@ , @@a4@@ ) ; gen_helper_float_cvts_d ( @@v56@@ , @@v57@@ ) ; tcg_temp_free_i64 ( @@v57@@ ) ; gen_store_fpr32 ( @@v56@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v56@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v54@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v55@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v55@@ , @@a4@@ ) ; gen_helper_float_cvtw_d ( @@v54@@ , @@v55@@ ) ; tcg_temp_free_i64 ( @@v55@@ ) ; gen_store_fpr32 ( @@v54@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v54@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v53@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v53@@ , @@a4@@ ) ; gen_helper_float_cvtl_d ( @@v53@@ , @@v53@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v53@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v53@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : @@v136@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v137@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v136@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v137@@ , @@a3@@ ) ; gen_helper_float_add_s ( @@v136@@ , @@v136@@ , @@v137@@ ) ; tcg_temp_free_i32 ( @@v137@@ ) ; gen_store_fpr32 ( @@v136@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v136@@ ) ; break ; case Number : @@v134@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v135@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v134@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v135@@ , @@a3@@ ) ; gen_helper_float_sub_s ( @@v134@@ , @@v134@@ , @@v135@@ ) ; tcg_temp_free_i32 ( @@v135@@ ) ; gen_store_fpr32 ( @@v134@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v134@@ ) ; break ; case Number : @@v132@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v133@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v132@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v133@@ , @@a3@@ ) ; gen_helper_float_mul_s ( @@v132@@ , @@v132@@ , @@v133@@ ) ; tcg_temp_free_i32 ( @@v133@@ ) ; gen_store_fpr32 ( @@v132@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v132@@ ) ; break ; case Number : @@v130@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v131@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v130@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v131@@ , @@a3@@ ) ; gen_helper_float_div_s ( @@v130@@ , @@v130@@ , @@v131@@ ) ; tcg_temp_free_i32 ( @@v131@@ ) ; gen_store_fpr32 ( @@v130@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v130@@ ) ; break ; case Number : @@v129@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v129@@ , @@a4@@ ) ; gen_helper_float_sqrt_s ( @@v129@@ , @@v129@@ ) ; gen_store_fpr32 ( @@v129@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v129@@ ) ; break ; case Number : @@v128@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v128@@ , @@a4@@ ) ; gen_helper_float_abs_s ( @@v128@@ , @@v128@@ ) ; gen_store_fpr32 ( @@v128@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v128@@ ) ; break ; case Number : @@v127@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v127@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v127@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v127@@ ) ; break ; case Number : @@v126@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v126@@ , @@a4@@ ) ; gen_helper_float_chs_s ( @@v126@@ , @@v126@@ ) ; gen_store_fpr32 ( @@v126@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v126@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v124@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v125@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v124@@ , @@a4@@ ) ; gen_helper_float_roundl_s ( @@v125@@ , @@v124@@ ) ; tcg_temp_free_i32 ( @@v124@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v125@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v125@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v122@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v123@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v122@@ , @@a4@@ ) ; gen_helper_float_truncl_s ( @@v123@@ , @@v122@@ ) ; tcg_temp_free_i32 ( @@v122@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v123@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v123@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v120@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v121@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v120@@ , @@a4@@ ) ; gen_helper_float_ceill_s ( @@v121@@ , @@v120@@ ) ; tcg_temp_free_i32 ( @@v120@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v121@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v121@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v118@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v119@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v118@@ , @@a4@@ ) ; gen_helper_float_floorl_s ( @@v119@@ , @@v118@@ ) ; tcg_temp_free_i32 ( @@v118@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v119@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v119@@ ) ; break ; case Number : @@v117@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v117@@ , @@a4@@ ) ; gen_helper_float_roundw_s ( @@v117@@ , @@v117@@ ) ; gen_store_fpr32 ( @@v117@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v117@@ ) ; break ; case Number : @@v116@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v116@@ , @@a4@@ ) ; gen_helper_float_truncw_s ( @@v116@@ , @@v116@@ ) ; gen_store_fpr32 ( @@v116@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v116@@ ) ; break ; case Number : @@v115@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v115@@ , @@a4@@ ) ; gen_helper_float_ceilw_s ( @@v115@@ , @@v115@@ ) ; gen_store_fpr32 ( @@v115@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v115@@ ) ; break ; case Number : @@v114@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v114@@ , @@a4@@ ) ; gen_helper_float_floorw_s ( @@v114@@ , @@v114@@ ) ; gen_store_fpr32 ( @@v114@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v114@@ ) ; break ; case Number : gen_movcf_s ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v112@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v112@@ ) ; } @@v113@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v113@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v113@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v113@@ ) ; gen_set_label ( @@v112@@ ) ; break ; case Number : @@v110@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v110@@ ) ; @@v111@@ = tcg_temp_new_i32 ( Number L ) ; gen_load_fpr32 ( @@v111@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v111@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v111@@ ) ; gen_set_label ( @@v110@@ ) ; } break ; case Number : check_cop1x ( @@a1@@ ) ; @@v109@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v109@@ , @@a4@@ ) ; gen_helper_float_recip_s ( @@v109@@ , @@v109@@ ) ; gen_store_fpr32 ( @@v109@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v109@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v108@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v108@@ , @@a4@@ ) ; gen_helper_float_rsqrt_s ( @@v108@@ , @@v108@@ ) ; gen_store_fpr32 ( @@v108@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v108@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v106@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v107@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v106@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v107@@ , @@a5@@ ) ; gen_helper_float_recip2_s ( @@v106@@ , @@v106@@ , @@v107@@ ) ; tcg_temp_free_i32 ( @@v107@@ ) ; gen_store_fpr32 ( @@v106@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v106@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v105@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v105@@ , @@a4@@ ) ; gen_helper_float_recip1_s ( @@v105@@ , @@v105@@ ) ; gen_store_fpr32 ( @@v105@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v105@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v104@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v104@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_s ( @@v104@@ , @@v104@@ ) ; gen_store_fpr32 ( @@v104@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v104@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v102@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v103@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v102@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v103@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_s ( @@v102@@ , @@v102@@ , @@v103@@ ) ; tcg_temp_free_i32 ( @@v103@@ ) ; gen_store_fpr32 ( @@v102@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v102@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v100@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v101@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v100@@ , @@a4@@ ) ; gen_helper_float_cvtd_s ( @@v101@@ , @@v100@@ ) ; tcg_temp_free_i32 ( @@v100@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v101@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v101@@ ) ; break ; case Number : @@v99@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v99@@ , @@a4@@ ) ; gen_helper_float_cvtw_s ( @@v99@@ , @@v99@@ ) ; gen_store_fpr32 ( @@v99@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v99@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v97@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v98@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v97@@ , @@a4@@ ) ; gen_helper_float_cvtl_s ( @@v98@@ , @@v97@@ ) ; tcg_temp_free_i32 ( @@v97@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v98@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v98@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v94@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v95@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v96@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v95@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v96@@ , @@a3@@ ) ; tcg_gen_concat_i32_i64 ( @@v94@@ , @@v95@@ , @@v96@@ ) ; tcg_temp_free_i32 ( @@v96@@ ) ; tcg_temp_free_i32 ( @@v95@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v94@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v94@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } } return __readfsqword ( Number ) ^ @@v138@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": 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"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_concat_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_concat_i32_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v5@@ , @@a3@@ ) ; tcg_gen_shli_i64 ( @@v5@@ , @@v5@@ , Number L ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_or_i64 ( @@a1@@ , @@a1@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtd_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtd_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtd_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtd_w\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtd_w ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtd_w , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtd_l\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtd_l ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtd_l , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtl_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtl_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtl_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtl_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtl_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtl_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtps_pw\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtps_pw ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtps_pw , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtpw_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtpw_ps ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtpw_ps , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvts_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvts_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvts_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvts_w\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvts_w ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvts_w , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvts_l\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvts_l ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvts_l , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvts_pl\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvts_pl ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvts_pl , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvts_pu\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvts_pu ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvts_pu , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtw_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtw_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtw_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_cvtw_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_cvtw_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_cvtw_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_addr_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_addr_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_addr_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_mulr_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_mulr_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_mulr_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_roundl_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_roundl_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_roundl_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_roundl_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_roundl_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_roundl_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_roundw_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_roundw_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_roundw_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_roundw_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_roundw_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_roundw_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_truncl_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_truncl_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_truncl_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_truncl_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_truncl_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_truncl_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_truncw_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_truncw_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_truncw_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_truncw_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_truncw_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_truncw_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_ceill_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_ceill_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_ceill_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_ceill_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_ceill_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_ceill_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_ceilw_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_ceilw_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_ceilw_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_ceilw_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_ceilw_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_ceilw_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_floorl_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_floorl_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_floorl_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_floorl_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_floorl_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_floorl_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_floorw_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_floorw_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_floorw_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_floorw_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_floorw_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_floorw_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_sqrt_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_sqrt_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_sqrt_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_sqrt_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_sqrt_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_sqrt_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_abs_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_abs_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_abs_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_abs_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_abs_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_abs_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_abs_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_abs_ps ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_abs_ps , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_chs_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_chs_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_chs_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_chs_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_chs_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_chs_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_chs_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_chs_ps ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_chs_ps , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip1_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip1_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip1_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip1_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip1_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip1_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip1_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip1_ps ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip1_ps , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt1_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt1_s ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt1_s , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt1_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt1_d ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt1_d , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt1_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt1_ps ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt1_ps , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_add_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_add_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_add_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_add_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_add_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_add_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_add_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_add_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_add_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_sub_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_sub_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_sub_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_sub_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_sub_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_sub_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_sub_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_sub_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_sub_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_mul_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_mul_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_mul_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_mul_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_mul_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_mul_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_mul_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_mul_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_mul_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_div_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_div_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_div_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_div_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_div_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_div_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip2_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip2_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip2_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip2_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip2_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip2_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_recip2_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_recip2_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_recip2_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt2_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt2_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt2_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt2_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt2_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt2_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_rsqrt2_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_rsqrt2_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_rsqrt2_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_st_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i64 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@a2@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ & Number ) ; tcg_gen_shri_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@v5@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cop1x\", \"code\": \"unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_64bitmode\", \"code\": \"unsigned __int64 __fastcall check_cp1_64bitmode ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( ~ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_registers\", \"code\": \"unsigned __int64 __fastcall check_cp1_registers ( __int64 @@a1@@ , char @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( @@a2@@ & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cmp_d\", \"code\": \"unsigned __int64 __fastcall gen_cmp_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_registers ( @@a1@@ , @@a3@@ | @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmpabs_d\", \"code\": \"unsigned __int64 __fastcall gen_cmpabs_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a3@@ | @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmp_s\", \"code\": \"unsigned __int64 __fastcall gen_cmp_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v9@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmpabs_s\", \"code\": \"unsigned __int64 __fastcall gen_cmpabs_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; check_cop1x ( @@a1@@ ) ; gen_load_fpr32 ( @@v9@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmp_ps\", \"code\": \"unsigned __int64 __fastcall gen_cmp_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_64bitmode ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmpabs_ps\", \"code\": \"unsigned __int64 __fastcall gen_cmpabs_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_64bitmode ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movcf_s\", \"code\": \"unsigned __int64 __fastcall gen_movcf_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { char @@v4@@ ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v8@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v9@@ = gen_new_label ( @@a1@@ ) ; @@v4@@ = get_fp_bit ( @@a3@@ ) ; tcg_gen_andi_i32 ( @@v8@@ , fpu_fcr31 , Number << @@v4@@ ) ; tcg_gen_brcondi_i32 ( @@a4@@ == Number , @@v8@@ , Number , @@v9@@ ) ; gen_load_fpr32 ( @@v8@@ , @@a1@@ ) ; gen_store_fpr32 ( @@v8@@ , @@a2@@ ) ; gen_set_label ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movcf_d\", \"code\": \"unsigned __int64 __fastcall gen_movcf_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { char @@v5@@ ; unsigned int @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v10@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v11@@ = gen_new_label ( @@a1@@ ) ; @@v5@@ = get_fp_bit ( @@a4@@ ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << @@v5@@ ) ; tcg_gen_brcondi_i32 ( @@a5@@ == Number , @@v10@@ , Number , @@v11@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@v10@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a2@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v12@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; gen_set_label ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r8\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movcf_ps\", \"code\": \"unsigned __int64 __fastcall gen_movcf_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { char v4 ; char v5 ; _BOOL4 @@v9@@ ; unsigned int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v10@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v11@@ = gen_new_label ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; @@v9@@ = @@a4@@ == Number ; v4 = get_fp_bit ( @@a3@@ ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << v4 ) ; tcg_gen_brcondi_i32 ( @@v9@@ , @@v10@@ , Number , @@v11@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a1@@ ) ; gen_store_fpr32 ( @@v10@@ , @@a2@@ ) ; gen_set_label ( @@v11@@ ) ; v5 = get_fp_bit ( @@a3@@ + Number ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << v5 ) ; tcg_gen_brcondi_i32 ( @@v9@@ , @@v10@@ , Number , @@v12@@ ) ; gen_load_fpr32h ( @@v10@@ , @@a1@@ ) ; gen_store_fpr32h ( @@v10@@ , @@a2@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; gen_set_label ( @@v12@@ ) ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"_BOOL4\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_flt3_ldst", "code": "unsigned __int64 __fastcall gen_flt3_ldst ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a5@@ ) { if ( @@a6@@ ) { gen_load_gpr ( @@v11@@ , @@a6@@ ) ; gen_op_addr_add ( @@a1@@ , @@v11@@ , cpu_gpr [ @@a5@@ ] , @@v11@@ ) ; } else { gen_load_gpr ( @@v11@@ , @@a5@@ ) ; } } else { gen_load_gpr ( @@v11@@ , @@a6@@ ) ; } save_cpu_state ( @@a1@@ , Number ) ; switch ( @@a2@@ ) { case Number : check_cop1x ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_qemu_ld32s ( @@v11@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_gen_trunc_i64_i32 ( @@v18@@ , @@v11@@ ) ; gen_store_fpr32 ( @@v18@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a3@@ ) ; @@v17@@ = tcg_temp_new_i64 ( @@a1@@ ) ; tcg_gen_qemu_ld64 ( @@v17@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v17@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v17@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number ) ; @@v16@@ = tcg_temp_new_i64 ( @@v11@@ ) ; tcg_gen_qemu_ld64 ( @@v16@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v16@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v14@@ , @@a4@@ ) ; tcg_gen_extu_i32_i64 ( @@v15@@ , @@v14@@ ) ; tcg_gen_qemu_st32 ( @@v15@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v13@@ , @@a4@@ ) ; tcg_gen_qemu_st64 ( @@v13@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v13@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number ) ; @@v12@@ = tcg_temp_new_i64 ( @@v11@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a4@@ ) ; tcg_gen_qemu_st64 ( @@v12@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v12@@ ) ; break ; default : break ; } tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v19@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v19", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "fd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "fs_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "fp0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "fp0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "fp0_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "fp0_2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "fp0_3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "fp0_4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 541 | [
"{\"name\": \"tcg_gen_andi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_extu_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_extu_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_ld32s\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld32s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_ld64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_ld64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ldst_op_i64_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_st32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_qemu_st64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_qemu_st64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ldst_op_i64_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_st_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i64 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@a2@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ & Number ) ; tcg_gen_shri_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@v5@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_op_addr_add\", \"code\": \"unsigned __int64 __fastcall gen_op_addr_add ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) tcg_gen_ext32s_i64 ( @@a2@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cop1x\", \"code\": \"unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_64bitmode\", \"code\": \"unsigned __int64 __fastcall check_cp1_64bitmode ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( ~ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_registers\", \"code\": \"unsigned __int64 __fastcall check_cp1_registers ( __int64 @@a1@@ , char @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( @@a2@@ & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_flt3_arith", "code": "unsigned __int64 __fastcall gen_flt3_arith ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned int @@v34@@ ; unsigned int @@v35@@ ; unsigned int @@v36@@ ; unsigned int @@v37@@ ; unsigned int @@v38@@ ; unsigned int @@v39@@ ; unsigned int @@v40@@ ; unsigned int @@v41@@ ; unsigned int @@v42@@ ; unsigned int @@v43@@ ; unsigned int @@v44@@ ; unsigned int @@v45@@ ; unsigned int @@v46@@ ; unsigned int @@v47@@ ; unsigned int @@v48@@ ; unsigned int @@v49@@ ; int @@v50@@ ; int @@v51@@ ; unsigned __int64 @@v52@@ ; @@v52@@ = __readfsqword ( Number ) ; switch ( @@a2@@ ) { case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v47@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v48@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v49@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v50@@ = gen_new_label ( @@a1@@ ) ; @@v51@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v47@@ , @@a4@@ ) ; tcg_gen_andi_i64 ( @@v47@@ , @@v47@@ , Number L ) ; tcg_gen_brcondi_i64 ( Number , @@v47@@ , Number L , @@v50@@ ) ; gen_load_fpr32 ( @@v48@@ , @@a5@@ ) ; gen_load_fpr32h ( @@v49@@ , @@a5@@ ) ; gen_store_fpr32 ( @@v48@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v49@@ , @@a3@@ ) ; tcg_gen_br ( @@v51@@ ) ; gen_set_label ( @@v50@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v47@@ , Number L , @@v51@@ ) ; tcg_temp_free_i64 ( @@v47@@ ) ; gen_load_fpr32h ( @@v49@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v48@@ , @@a6@@ ) ; gen_store_fpr32 ( @@v49@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v48@@ , @@a3@@ ) ; gen_set_label ( @@v51@@ ) ; tcg_temp_free_i32 ( @@v48@@ ) ; tcg_temp_free_i32 ( @@v49@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v44@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v45@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v46@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v44@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v45@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v46@@ , @@a4@@ ) ; gen_helper_float_muladd_s ( @@v46@@ , @@v44@@ , @@v45@@ , @@v46@@ ) ; tcg_temp_free_i32 ( @@v44@@ ) ; tcg_temp_free_i32 ( @@v45@@ ) ; gen_store_fpr32 ( @@v46@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v46@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v41@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v42@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v43@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v41@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v42@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v43@@ , @@a4@@ ) ; gen_helper_float_muladd_d ( @@v43@@ , @@v41@@ , @@v42@@ , @@v43@@ ) ; tcg_temp_free_i64 ( @@v41@@ ) ; tcg_temp_free_i64 ( @@v42@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v43@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v43@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v38@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v39@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v40@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v38@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v39@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v40@@ , @@a4@@ ) ; gen_helper_float_muladd_ps ( @@v40@@ , @@v38@@ , @@v39@@ , @@v40@@ ) ; tcg_temp_free_i64 ( @@v38@@ ) ; tcg_temp_free_i64 ( @@v39@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v40@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v40@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v35@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v36@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v37@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v35@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v36@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v37@@ , @@a4@@ ) ; gen_helper_float_mulsub_s ( @@v37@@ , @@v35@@ , @@v36@@ , @@v37@@ ) ; tcg_temp_free_i32 ( @@v35@@ ) ; tcg_temp_free_i32 ( @@v36@@ ) ; gen_store_fpr32 ( @@v37@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v37@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v34@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v32@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v33@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v34@@ , @@a4@@ ) ; gen_helper_float_mulsub_d ( @@v34@@ , @@v32@@ , @@v33@@ , @@v34@@ ) ; tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v34@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v34@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v29@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v30@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v31@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v29@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v30@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v31@@ , @@a4@@ ) ; gen_helper_float_mulsub_ps ( @@v31@@ , @@v29@@ , @@v30@@ , @@v31@@ ) ; tcg_temp_free_i64 ( @@v29@@ ) ; tcg_temp_free_i64 ( @@v30@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v31@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v31@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v27@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v28@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v26@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v27@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v28@@ , @@a4@@ ) ; gen_helper_float_nmuladd_s ( @@v28@@ , @@v26@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; tcg_temp_free_i32 ( @@v27@@ ) ; gen_store_fpr32 ( @@v28@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v23@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v24@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v25@@ , @@a4@@ ) ; gen_helper_float_nmuladd_d ( @@v25@@ , @@v23@@ , @@v24@@ , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v25@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v22@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v20@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v21@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v22@@ , @@a4@@ ) ; gen_helper_float_nmuladd_ps ( @@v22@@ , @@v20@@ , @@v21@@ , @@v22@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v22@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v17@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v17@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v18@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v19@@ , @@a4@@ ) ; gen_helper_float_nmulsub_s ( @@v19@@ , @@v17@@ , @@v18@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_fpr32 ( @@v19@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v14@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v15@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v16@@ , @@a4@@ ) ; gen_helper_float_nmulsub_d ( @@v16@@ , @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v16@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v11@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v13@@ , @@a4@@ ) ; gen_helper_float_nmulsub_ps ( @@v13@@ , @@v11@@ , @@v12@@ , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; break ; default : generate_exception ( @@a1@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v52@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "v31", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s100"}, {"n": "v30", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s104"}, {"n": "v29", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s108"}, {"n": "v28", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s112"}, {"n": "v27", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s116"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s120"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s124"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s128"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s132"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s136"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s140"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s144"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s148"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s152"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s156"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s160"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s164"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s168"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s172"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s176"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s180"}, {"n": "v51", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v50", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v49", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v48", "t": 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"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_muladd_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_muladd_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_muladd_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_muladd_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_muladd_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_muladd_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_muladd_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_muladd_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_muladd_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_mulsub_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_mulsub_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_mulsub_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_mulsub_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_mulsub_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_mulsub_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_mulsub_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_mulsub_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_mulsub_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_nmuladd_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_nmuladd_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_nmuladd_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_nmuladd_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_nmuladd_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_nmuladd_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_nmuladd_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_nmuladd_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_nmuladd_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_nmulsub_s\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_nmulsub_s ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_nmulsub_s , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_nmulsub_d\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_nmulsub_d ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_nmulsub_d , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_float_nmulsub_ps\", \"code\": \"unsigned __int64 __fastcall gen_helper_float_nmulsub_ps ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_float_nmulsub_ps , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr32h\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr32h ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i32 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) + Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_load_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_ld_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i32 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v5@@ , @@a3@@ & Number ) ; gen_load_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_gen_concat_i32_i64 ( @@a2@@ , @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_fpr64\", \"code\": \"unsigned __int64 __fastcall gen_store_fpr64 ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { tcg_gen_st_i64 ( @@a2@@ , cpu_env , Number * ( @@a3@@ + Number L ) ) ; } else { @@v5@@ = tcg_temp_new_i64 ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@a2@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ & Number ) ; tcg_gen_shri_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v6@@ , @@v5@@ ) ; gen_store_fpr32 ( @@v6@@ , @@a3@@ | Number ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cop1x\", \"code\": \"unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_64bitmode\", \"code\": \"unsigned __int64 __fastcall check_cp1_64bitmode ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( ~ ( unsigned __int8 ) * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_registers\", \"code\": \"unsigned __int64 __fastcall check_cp1_registers ( __int64 @@a1@@ , char @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( @@a2@@ & Number ) != Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_rdhwr", "code": "unsigned __int64 __fastcall gen_rdhwr ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a4@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_ccres ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { if ( @@a4@@ > Number ) { LABEL_11 : generate_exception ( @@a2@@ , Number ) ; goto LABEL_12 ; } if ( @@a4@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_cc ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else if ( @@a4@@ ) { if ( @@a4@@ != Number ) goto LABEL_11 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_synci_step ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_cpunum ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } } LABEL_12 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 543 | [
"{\"name\": \"gen_helper_rdhwr_cpunum\", \"code\": \"unsigned __int64 __fastcall gen_helper_rdhwr_cpunum ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_cpunum , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_rdhwr_synci_step\", \"code\": \"unsigned __int64 __fastcall gen_helper_rdhwr_synci_step ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_synci_step , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_rdhwr_cc\", \"code\": \"unsigned __int64 __fastcall gen_helper_rdhwr_cc ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_cc , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_rdhwr_ccres\", \"code\": \"unsigned __int64 __fastcall gen_helper_rdhwr_ccres ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_rdhwr_ccres , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "handle_delay_slot", "code": "unsigned __int64 __fastcall handle_delay_slot ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { int @@v3@@ ; int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) return __readfsqword ( Number ) ^ @@v11@@ ; @@v6@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; * ( _DWORD * ) ( @@a2@@ + Number ) &= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; save_cpu_state ( @@a2@@ , Number ) ; @@v3@@ = @@v6@@ & Number ; if ( @@v3@@ != Number ) { if ( ( @@v6@@ & Number ) > Number ) return __readfsqword ( Number ) ^ @@v11@@ ; if ( @@v3@@ != Number ) { if ( ( @@v6@@ & Number ) > Number ) return __readfsqword ( Number ) ^ @@v11@@ ; if ( @@v3@@ != Number ) { if ( @@v3@@ == Number ) { @@v10@@ = gen_new_label ( @@a2@@ ) ; tcg_gen_brcondi_i64 ( Number , bcond , Number L , @@v10@@ ) ; gen_goto_tb ( @@a2@@ , Number , @@a3@@ + * ( _QWORD * ) ( @@a2@@ + Number ) ) ; gen_set_label ( @@v10@@ ) ; gen_goto_tb ( @@a2@@ , Number , * ( _QWORD * ) ( @@a2@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; } if ( ( @@v6@@ & Number ) != Number ) tcg_gen_xori_i32 ( hflags , hflags , Number ) ; } gen_goto_tb ( @@a2@@ , Number , * ( _QWORD * ) ( @@a2@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { @@v7@@ = tcg_temp_new_i64 ( @@a2@@ ) ; @@v8@@ = tcg_temp_new_i32 ( @@a2@@ ) ; tcg_gen_andi_i64 ( @@v7@@ , btarget , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v8@@ , @@v7@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; tcg_gen_andi_i32 ( hflags , hflags , Number ) ; tcg_gen_shli_i32 ( @@v8@@ , @@v8@@ , Number ) ; tcg_gen_or_i32 ( hflags , hflags , @@v8@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; tcg_gen_andi_i64 ( cpu_PC , btarget , Number ) ; } else { tcg_gen_mov_i64 ( cpu_PC , btarget ) ; } if ( * ( _DWORD * ) ( @@a2@@ + Number ) ) { save_cpu_state ( @@a2@@ , Number ) ; @@v9@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; } tcg_gen_exit_tb ( Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "insn_bytes", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "proc_hflags", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 544 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_or_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xori_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xori_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_xor_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shli_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shli_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_shl_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_andi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_trunc_i64_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_exit_tb\", \"code\": \"unsigned __int64 __fastcall tcg_gen_exit_tb ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_raise_exception\", \"code\": \"unsigned __int64 __fastcall gen_helper_raise_exception ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_raise_exception , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_goto_tb\", \"code\": \"unsigned __int64 __fastcall gen_goto_tb ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v5@@ ; _QWORD * @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = * ( _QWORD * * ) @@a1@@ ; if ( ( ( @@a3@@ ^ * * ( _QWORD * * ) @@a1@@ ) & Number ) != Number || * ( _DWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( @@a3@@ ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { save_cpu_state ( @@a1@@ , Number ) ; @@v5@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; } tcg_gen_exit_tb ( Number L ) ; } else { tcg_gen_goto_tb ( @@a2@@ ) ; gen_save_pc ( @@a3@@ ) ; tcg_gen_exit_tb ( ( __int64 ) @@v6@@ + @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 3, \"t\": \"_QWORD\"}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "xlat", "code": "__int64 __fastcall xlat ( int @@a1@@ ) { return ( unsigned int ) map_14897 [ @@a1@@ ] ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}]} | [{"n": "r", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 545 | []
|
{"name": "gen_mips16_save", "code": "unsigned __int64 __fastcall gen_mips16_save ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned __int64 @@v16@@ ; @@v16@@ = __readfsqword ( Number ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : @@v12@@ = Number ; LABEL_8 : switch ( @@v12@@ ) { case Number : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; goto LABEL_14 ; case Number : LABEL_14 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; goto LABEL_15 ; case Number : goto LABEL_16 ; } if ( @@v12@@ != Number ) goto LABEL_17 ; LABEL_15 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_16 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_17 : gen_load_gpr ( @@v14@@ , Number ) ; if ( @@a4@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } switch ( @@a2@@ ) { case Number : goto LABEL_26 ; case Number : goto LABEL_25 ; case Number : goto LABEL_24 ; case Number : goto LABEL_23 ; case Number : goto LABEL_22 ; case Number : goto LABEL_21 ; case Number : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_21 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_22 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_23 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_24 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_25 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_26 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; break ; default : break ; } if ( @@a6@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } if ( @@a5@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : @@v13@@ = Number ; break ; case Number : @@v13@@ = Number ; break ; default : goto LABEL_7 ; } if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } } } } tcg_gen_subi_i64 ( dword_29DD4 , dword_29DD4 , @@a7@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; return __readfsqword ( Number ) ^ @@v16@@ ; default : LABEL_7 : generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v16@@ ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "a7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v16", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "aregs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "do_ra", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "xsregs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "do_s0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "do_s1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "framesize", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "astatic", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "args", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 546 | [
"{\"name\": \"tcg_gen_subi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_subi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_sub_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sw\", \"code\": \"unsigned __int64 __fastcall op_st_sw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st32 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_base_offset_addr\", \"code\": \"unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_mips16_restore", "code": "unsigned __int64 __fastcall gen_mips16_restore ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , dword_29DD4 , @@a7@@ ) ; if ( @@a4@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } switch ( @@a2@@ ) { case Number : goto LABEL_10 ; case Number : goto LABEL_9 ; case Number : goto LABEL_8 ; case Number : goto LABEL_7 ; case Number : goto LABEL_6 ; case Number : goto LABEL_5 ; case Number : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_5 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_6 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_7 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_8 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_9 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_10 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; break ; default : break ; } if ( @@a6@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } if ( @@a5@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : @@v12@@ = Number ; LABEL_22 : if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } } } } tcg_gen_addi_i64 ( dword_29DD4 , dword_29DD4 , @@a7@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; default : generate_exception ( @@a1@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v15@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "a7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v15", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "aregs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "do_ra", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "xsregs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "do_s0", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "do_s1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "framesize", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-16"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "astatic", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 547 | [
"{\"name\": \"tcg_gen_addi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_addi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_add_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_subi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_subi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_sub_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lw\", \"code\": \"unsigned __int64 __fastcall op_ld_lw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_addiupc", "code": "unsigned __int64 __fastcall gen_addiupc ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { __int64 @@v5@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a5@@ && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v5@@ = pc_relative_pc ( @@a1@@ ) ; tcg_gen_movi_i64 ( @@v9@@ , @@v5@@ ) ; tcg_gen_addi_i64 ( cpu_gpr [ @@a2@@ ] , @@v9@@ , @@a3@@ ) ; if ( ! @@a4@@ ) tcg_gen_ext32s_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a2@@ ] ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "imm", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "is_64_bit", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "rx", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "extended", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r8"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 548 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_addi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_addi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_add_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"pc_relative_pc\", \"code\": \"unsigned __int64 __fastcall pc_relative_pc ( __int64 @@a1@@ ) { int @@v1@@ ; __int64 @@v3@@ ; @@v3@@ = * ( _QWORD * ) ( @@a1@@ + Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) @@v1@@ = Number ; else @@v1@@ = Number ; @@v3@@ -= @@v1@@ ; } return @@v3@@ & Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}]}"
]
|
{"name": "decode_i64_mips16", "code": "unsigned __int64 __fastcall decode_i64_mips16 ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ , int @@a6@@ ) { __int16 v6 ; __int16 v7 ; __int16 v8 ; __int16 v9 ; __int16 v10 ; __int16 v11 ; __int16 v12 ; __int16 v13 ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; switch ( @@a4@@ ) { case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v6 = @@a5@@ ; else v6 = Number * @@a5@@ ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v6 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v7 = @@a5@@ ; else v7 = Number * @@a5@@ ; gen_st ( @@a2@@ , Number , @@a3@@ , Number , v7 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v8 = @@a5@@ ; else v8 = ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) & Number ; gen_st ( @@a2@@ , Number , Number , Number , v8 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v9 = @@a5@@ ; else v9 = Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , v9 ) ; break ; case Number : if ( @@a6@@ && ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { generate_exception ( @@a2@@ , Number ) ; } else { if ( @@a6@@ ) v10 = @@a5@@ ; else v10 = Number * @@a5@@ ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v10 ) ; } break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v11 = @@a5@@ ; else v11 = ( char ) ( Number * @@a5@@ ) >> Number ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a3@@ , v11 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v12 = @@a5@@ ; else v12 = Number * @@a5@@ ; gen_addiupc ( @@a2@@ , @@a3@@ , v12 , Number , @@a6@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v13 = @@a5@@ ; else v13 = Number * @@a5@@ ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v13 ) ; break ; default : return __readfsqword ( Number ) ^ @@v18@@ ; } return __readfsqword ( Number ) ^ @@v18@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "v18", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ry", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "funct", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "extended", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 549 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_mips_64\", \"code\": \"unsigned __int64 __fastcall check_mips_64 ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_addiupc\", \"code\": \"unsigned __int64 __fastcall gen_addiupc ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { __int64 @@v5@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a5@@ && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v5@@ = pc_relative_pc ( @@a1@@ ) ; tcg_gen_movi_i64 ( @@v9@@ , @@v5@@ ) ; tcg_gen_addi_i64 ( cpu_gpr [ @@a2@@ ] , @@v9@@ , @@a3@@ ) ; if ( ! @@a4@@ ) tcg_gen_ext32s_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a2@@ ] ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "decode_extended_mips16_opc", "code": "__int64 __fastcall decode_extended_mips16_opc ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v2@@ ; __int16 v4 ; __int16 v5 ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; int @@v14@@ ; int @@v15@@ ; int @@v16@@ ; * ( _DWORD * ) ( @@a2@@ + Number ) = lduw_code ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) | ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) ; @@v6@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; @@v7@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v8@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v9@@ = xlat ( @@v8@@ ) ; @@v10@@ = xlat ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; v4 = ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) & Number | ( HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) << Number ) | * ( _WORD * ) ( @@a2@@ + Number ) & Number ; switch ( @@v6@@ ) { case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_addiupc ( @@a2@@ , @@v9@@ , v4 , Number , Number ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * v4 ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v9@@ , Number , Number * v4 ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v9@@ , Number , Number * v4 ) ; break ; case Number : @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( @@v2@@ == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } else if ( @@v2@@ == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } else if ( @@v2@@ ) { check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } else { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : v5 = ( __int16 ) ( Number * ( ( HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) << Number ) & Number | ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) & Number | * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ) >> Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { check_mips_64 ( @@a2@@ ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v5 ) ; } else { gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v5 ) ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v9@@ , v4 ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v9@@ , v4 ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v9@@ , v4 ) ; break ; case Number : switch ( @@v8@@ ) { case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * v4 ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , Number , Number , v4 ) ; break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , v4 ) ; break ; case Number : @@v11@@ = HIBYTE ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v12@@ = HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v13@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v14@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v15@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v16@@ = Number * ( ( unsigned __int8 ) ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) | * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_mips16_save ( @@a2@@ , @@v11@@ , @@v12@@ , @@v13@@ , @@v14@@ , @@v15@@ , @@v16@@ ) ; else gen_mips16_restore ( @@a2@@ , @@v11@@ , @@v12@@ , @@v13@@ , @@v14@@ , @@v15@@ , @@v16@@ ) ; break ; default : goto LABEL_45 ; } break ; case Number : tcg_gen_movi_i64 ( cpu_gpr [ @@v9@@ ] , ( unsigned __int16 ) v4 ) ; break ; case Number : tcg_gen_xori_i64 ( dword_29DC0 , cpu_gpr [ @@v9@@ ] , ( unsigned __int16 ) v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : decode_i64_mips16 ( @@a1@@ , @@a2@@ , @@v10@@ , @@v8@@ , v4 , Number ) ; break ; default : LABEL_45 : generate_exception ( @@a2@@ , Number ) ; break ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v16", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r8"}, {"n": "framesize", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s12"}, {"n": "do_s1", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s16"}, {"n": "do_s0", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s20"}, {"n": "do_ra", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s24"}, {"n": "aregs", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s28"}, {"n": "xsregs", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s32"}, {"n": "ry", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "rx", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "funct", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s44"}, {"n": "sa", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "op", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 550 | [
"{\"name\": \"lduw_code\", \"code\": \"__int64 __fastcall lduw_code ( unsigned __int64 @@a1@@ ) { unsigned int @@v2@@ ; unsigned int @@v3@@ ; @@v3@@ = cpu_mmu_index ( cpu_single_env ) ; if ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env ) == ( @@a1@@ & Number ) ) @@v2@@ = lduw_le_p ( ( unsigned __int16 * ) ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env + Number ) + @@a1@@ ) ) ; else @@v2@@ = ( unsigned __int16 ) _ldw_cmmu ( @@a1@@ , @@v3@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xori_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xori_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_xor_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_mips_64\", \"code\": \"unsigned __int64 __fastcall check_mips_64 ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt_imm\", \"code\": \"unsigned __int64 __fastcall gen_slt_imm ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v8@@ ; __int64 @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ = @@a5@@ ; if ( @@a3@@ ) { @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } tcg_temp_free_i64 ( @@v8@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift_imm\", \"code\": \"unsigned __int64 __fastcall gen_shift_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , char @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; __int64 @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v12@@ = @@a6@@ & Number ; if ( @@a4@@ ) { @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; else tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) { @@v11@@ = tcg_temp_new_i32 ( @@v10@@ ) ; tcg_gen_trunc_i64_i32 ( @@v11@@ , @@v10@@ ) ; tcg_gen_rotri_i32 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else { LABEL_14 : tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } } } else { switch ( @@a3@@ ) { case Number : tcg_gen_shli_i64 ( @@v10@@ , @@v10@@ , @@v12@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; break ; case Number : if ( ! @@v12@@ ) goto LABEL_14 ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; default : break ; } } } } tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_slt\", \"code\": \"unsigned __int64 __fastcall gen_slt ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift\", \"code\": \"unsigned __int64 __fastcall gen_shift ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_rotr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@v12@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@v12@@ ) ; tcg_gen_trunc_i64_i32 ( @@v13@@ , @@v11@@ ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v12@@ ) ; tcg_gen_andi_i32 ( @@v13@@ , @@v13@@ , Number ) ; tcg_gen_rotr_i32 ( @@v13@@ , @@v14@@ , @@v13@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_ext32u_i64 ( @@v12@@ , @@v12@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; default : break ; } } } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"xlat\", \"code\": \"__int64 __fastcall xlat ( int @@a1@@ ) { return ( unsigned int ) map_14897 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_mips16_save\", \"code\": \"unsigned __int64 __fastcall gen_mips16_save ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned __int64 @@v16@@ ; @@v16@@ = __readfsqword ( Number ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : @@v12@@ = Number ; LABEL_8 : switch ( @@v12@@ ) { case Number : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; goto LABEL_14 ; case Number : LABEL_14 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; goto LABEL_15 ; case Number : goto LABEL_16 ; } if ( @@v12@@ != Number ) goto LABEL_17 ; LABEL_15 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_16 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_17 : gen_load_gpr ( @@v14@@ , Number ) ; if ( @@a4@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } switch ( @@a2@@ ) { case Number : goto LABEL_26 ; case Number : goto LABEL_25 ; case Number : goto LABEL_24 ; case Number : goto LABEL_23 ; case Number : goto LABEL_22 ; case Number : goto LABEL_21 ; case Number : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_21 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_22 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_23 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_24 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_25 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_26 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; break ; default : break ; } if ( @@a6@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } if ( @@a5@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : @@v13@@ = Number ; break ; case Number : @@v13@@ = Number ; break ; default : goto LABEL_7 ; } if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } } } } tcg_gen_subi_i64 ( dword_29DD4 , dword_29DD4 , @@a7@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; return __readfsqword ( Number ) ^ @@v16@@ ; default : LABEL_7 : generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v16@@ ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"a7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s-16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mips16_restore\", \"code\": \"unsigned __int64 __fastcall gen_mips16_restore ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , dword_29DD4 , @@a7@@ ) ; if ( @@a4@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } switch ( @@a2@@ ) { case Number : goto LABEL_10 ; case Number : goto LABEL_9 ; case Number : goto LABEL_8 ; case Number : goto LABEL_7 ; case Number : goto LABEL_6 ; case Number : goto LABEL_5 ; case Number : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_5 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_6 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_7 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_8 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_9 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_10 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; break ; default : break ; } if ( @@a6@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } if ( @@a5@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : @@v12@@ = Number ; LABEL_22 : if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } } } } tcg_gen_addi_i64 ( dword_29DD4 , dword_29DD4 , @@a7@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; default : generate_exception ( @@a1@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"a7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s-16\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_addiupc\", \"code\": \"unsigned __int64 __fastcall gen_addiupc ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { __int64 @@v5@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a5@@ && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v5@@ = pc_relative_pc ( @@a1@@ ) ; tcg_gen_movi_i64 ( @@v9@@ , @@v5@@ ) ; tcg_gen_addi_i64 ( cpu_gpr [ @@a2@@ ] , @@v9@@ , @@a3@@ ) ; if ( ! @@a4@@ ) tcg_gen_ext32s_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a2@@ ] ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"decode_i64_mips16\", \"code\": \"unsigned __int64 __fastcall decode_i64_mips16 ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ , int @@a6@@ ) { __int16 v6 ; __int16 v7 ; __int16 v8 ; __int16 v9 ; __int16 v10 ; __int16 v11 ; __int16 v12 ; __int16 v13 ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; switch ( @@a4@@ ) { case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v6 = @@a5@@ ; else v6 = Number * @@a5@@ ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v6 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v7 = @@a5@@ ; else v7 = Number * @@a5@@ ; gen_st ( @@a2@@ , Number , @@a3@@ , Number , v7 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v8 = @@a5@@ ; else v8 = ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) & Number ; gen_st ( @@a2@@ , Number , Number , Number , v8 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v9 = @@a5@@ ; else v9 = Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , v9 ) ; break ; case Number : if ( @@a6@@ && ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { generate_exception ( @@a2@@ , Number ) ; } else { if ( @@a6@@ ) v10 = @@a5@@ ; else v10 = Number * @@a5@@ ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v10 ) ; } break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v11 = @@a5@@ ; else v11 = ( char ) ( Number * @@a5@@ ) >> Number ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a3@@ , v11 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v12 = @@a5@@ ; else v12 = Number * @@a5@@ ; gen_addiupc ( @@a2@@ , @@a3@@ , v12 , Number , @@a6@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v13 = @@a5@@ ; else v13 = Number * @@a5@@ ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v13 ) ; break ; default : return __readfsqword ( Number ) ^ @@v18@@ ; } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "decode_mips16_opc", "code": "__int64 __fastcall decode_mips16_opc ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { int v3 ; unsigned int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; __int16 @@v11@@ ; int v12 ; unsigned int v13 ; unsigned int @@v14@@ ; int v15 ; int v16 ; char @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int v21 ; unsigned int v22 ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; int @@v28@@ ; v12 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) v3 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; else LOBYTE ( v3 ) = Number ; @@v17@@ = v3 ; @@v18@@ = xlat ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v19@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v20@@ = xlat ( @@v19@@ ) ; v21 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v14@@ = Number ; switch ( v12 ) { case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_addiupc ( @@a2@@ , @@v18@@ , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) , Number , Number ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , ( __int16 ) ( Number * ( ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ) >> Number ) ; break ; case Number : v22 = Number * ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number << Number ) & Number | ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) & Number | lduw_code ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) v4 = Number ; else v4 = Number ; gen_compute_branch ( @@a2@@ , v4 , Number , @@v18@@ , @@v20@@ , v22 ) ; @@v14@@ = Number ; * @@a3@@ = Number ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v18@@ , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v18@@ , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : v5 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v5 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } else if ( v5 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } else if ( v5 ) { check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } else { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : @@v11@@ = ( char ) ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) >> Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { check_mips_64 ( @@a2@@ ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v11@@ ) ; } else { gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v11@@ ) ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v18@@ , ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v18@@ , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v18@@ , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_st ( @@a2@@ , Number , Number , Number , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : @@v26@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v27@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v28@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; v15 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v15 ) v16 = Number * v15 ; else v16 = Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_mips16_save ( @@a2@@ , Number , Number , @@v26@@ , @@v27@@ , @@v28@@ , v16 ) ; else gen_mips16_restore ( @@a2@@ , Number , Number , @@v26@@ , @@v27@@ , @@v28@@ , v16 ) ; break ; case Number : @@v25@@ = xlat ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; gen_arith ( @@a1@@ , @@a2@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number | ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , @@v25@@ , Number ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v20@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number ) ; break ; default : goto LABEL_113 ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_logic_imm ( @@a1@@ , Number , Number , @@v18@@ , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , v21 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : @@v24@@ = xlat ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; v6 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v6 == Number ) { gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } else if ( v6 == Number ) { check_mips_64 ( @@a2@@ ) ; gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } else if ( v6 ) { gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } else { check_mips_64 ( @@a2@@ ) ; gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } break ; case Number : switch ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) { case Number : @@v23@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) { if ( @@v23@@ ) v7 = Number ; else v7 = Number ; v13 = v7 ; } else { v13 = Number ; } if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) v8 = Number ; else v8 = @@v18@@ ; gen_compute_branch ( @@a2@@ , v13 , Number , v8 , Number , Number ) ; if ( ! @@v23@@ ) * @@a3@@ = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; break ; case Number : gen_slt ( @@a1@@ , Number , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_slt ( @@a1@@ , Number , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : generate_exception ( @@a2@@ , Number ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v20@@ , @@v17@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v20@@ , Number ) ; break ; case Number : gen_HILO ( @@a2@@ , Number , @@v18@@ ) ; break ; case Number : switch ( @@v19@@ ) { case Number : tcg_gen_ext8u_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : tcg_gen_ext16u_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; tcg_gen_ext32u_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : tcg_gen_ext8s_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : tcg_gen_ext16s_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; default : goto LABEL_113 ; } break ; case Number : gen_HILO ( @@a2@@ , Number , @@v18@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v20@@ , @@v17@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; default : goto LABEL_113 ; } break ; case Number : decode_extended_mips16_opc ( @@a1@@ , @@a2@@ ) ; @@v14@@ = Number ; break ; case Number : decode_i64_mips16 ( @@a1@@ , @@a2@@ , @@v20@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , v21 , Number ) ; break ; default : LABEL_113 : generate_exception ( @@a2@@ , Number ) ; break ; } return @@v14@@ ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_DWORD"}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v28", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v27", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v26", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v25", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v24", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v23", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "v17", "t": {"T": 1, "n": "char", "s": 1}, "location": "s72"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s84"}, {"n": "v11", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "s92"}]} | [{"n": "is_branch", "t": {"T": 3, "t": "int"}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "do_s1", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s12"}, {"n": "do_s0", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s16"}, {"n": "do_ra", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s20"}, {"n": "rz", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "rz_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "nd", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "ry", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "cnvt_op", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s64"}, {"n": "rx", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "sa", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "s72"}, {"n": "n_bytes", "t": {"T": 1, "n": "int", "s": 4}, "location": "s84"}, {"n": "imm_0", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "s92"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 551 | [
"{\"name\": \"lduw_code\", \"code\": \"__int64 __fastcall lduw_code ( unsigned __int64 @@a1@@ ) { unsigned int @@v2@@ ; unsigned int @@v3@@ ; @@v3@@ = cpu_mmu_index ( cpu_single_env ) ; if ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env ) == ( @@a1@@ & Number ) ) @@v2@@ = lduw_le_p ( ( unsigned __int16 * ) ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env + Number ) + @@a1@@ ) ) ; else @@v2@@ = ( unsigned __int16 ) _ldw_cmmu ( @@a1@@ , @@v3@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}]}",
"{\"name\": \"tcg_gen_ext8s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext8s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext16s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext16s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext8u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext8u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext16u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext16u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_mips_64\", \"code\": \"unsigned __int64 __fastcall check_mips_64 ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_logic_imm\", \"code\": \"unsigned __int64 __fastcall gen_logic_imm ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned __int16 @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , ( __int16 ) @@a5@@ << Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ ) { tcg_gen_xori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } goto LABEL_14 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ ) { tcg_gen_ori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_14 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ ) tcg_gen_andi_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; } } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt_imm\", \"code\": \"unsigned __int64 __fastcall gen_slt_imm ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v8@@ ; __int64 @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ = @@a5@@ ; if ( @@a3@@ ) { @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } tcg_temp_free_i64 ( @@v8@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift_imm\", \"code\": \"unsigned __int64 __fastcall gen_shift_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , char @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; __int64 @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v12@@ = @@a6@@ & Number ; if ( @@a4@@ ) { @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; else tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) { @@v11@@ = tcg_temp_new_i32 ( @@v10@@ ) ; tcg_gen_trunc_i64_i32 ( @@v11@@ , @@v10@@ ) ; tcg_gen_rotri_i32 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else { LABEL_14 : tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } } } else { switch ( @@a3@@ ) { case Number : tcg_gen_shli_i64 ( @@v10@@ , @@v10@@ , @@v12@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; break ; case Number : if ( ! @@v12@@ ) goto LABEL_14 ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; default : break ; } } } } tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_logic\", \"code\": \"unsigned __int64 __fastcall gen_logic ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_nor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else if ( @@a4@@ || ! @@a5@@ ) { if ( ! @@a4@@ || @@a5@@ ) tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number ) ; else tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_xor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) goto LABEL_27 ; if ( @@a4@@ && ! @@a5@@ ) goto LABEL_30 ; goto LABEL_39 ; } if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ && @@a5@@ ) { tcg_gen_or_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) { LABEL_27 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ && ! @@a5@@ ) { LABEL_30 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_39 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ || ! @@a5@@ ) goto LABEL_39 ; tcg_gen_and_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt\", \"code\": \"unsigned __int64 __fastcall gen_slt ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift\", \"code\": \"unsigned __int64 __fastcall gen_shift ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_rotr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@v12@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@v12@@ ) ; tcg_gen_trunc_i64_i32 ( @@v13@@ , @@v11@@ ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v12@@ ) ; tcg_gen_andi_i32 ( @@v13@@ , @@v13@@ , Number ) ; tcg_gen_rotr_i32 ( @@v13@@ , @@v14@@ , @@v13@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_ext32u_i64 ( @@v12@@ , @@v12@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; default : break ; } } } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_HILO\", \"code\": \"unsigned __int64 __fastcall gen_HILO ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ || @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_LO , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_LO , Number L ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_LO ) ; break ; case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_HI ) ; break ; case Number : if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_HI , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_HI , Number L ) ; break ; } } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_muldiv\", \"code\": \"unsigned __int64 __fastcall gen_muldiv ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; if ( @@a2@@ > Number ) { if ( @@a2@@ - Number > Number ) { LABEL_6 : @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; goto LABEL_7 ; } } else if ( @@a2@@ < Number ) { goto LABEL_6 ; } @@v7@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; LABEL_7 : gen_load_gpr ( @@v7@@ , @@a3@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { @@v9@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v9@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v10@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v9@@ , @@v9@@ , @@v10@@ ) ; tcg_gen_concat32_i64 ( @@v10@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v9@@ , @@v10@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v9@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v9@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v11@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v12@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_concat32_i64 ( @@v12@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v11@@ ) ; tcg_gen_shri_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ == Number ) { @@v13@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v13@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v14@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_gen_concat32_i64 ( @@v14@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v13@@ ) ; tcg_gen_shri_i64 ( @@v13@@ , @@v13@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v13@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) { @@v15@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v15@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v16@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_concat32_i64 ( @@v16@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v15@@ ) ; tcg_gen_shri_i64 ( @@v15@@ , @@v15@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } LABEL_29 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_30 ; } if ( @@a2@@ < Number ) goto LABEL_29 ; switch ( @@a2@@ ) { case Number : @@v25@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v25@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v26@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v25@@ , @@v25@@ , @@v26@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v25@@ ) ; tcg_gen_shri_i64 ( @@v25@@ , @@v25@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v25@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v23@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v23@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v24@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v23@@ ) ; tcg_gen_shri_i64 ( @@v23@@ , @@v23@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v21@@ = gen_new_label ( @@v8@@ ) ; @@v22@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32s_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32s_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v21@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v22@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v22@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v21@@ ) ; gen_set_label ( @@v22@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v21@@ ) ; break ; case Number : @@v20@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v20@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v20@@ ) ; break ; case Number : gen_helper_dmult ( @@v7@@ , @@v8@@ ) ; break ; case Number : gen_helper_dmultu ( @@v7@@ , @@v8@@ ) ; break ; case Number : @@v18@@ = gen_new_label ( @@v8@@ ) ; @@v19@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v18@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v19@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v19@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v18@@ ) ; gen_set_label ( @@v19@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v18@@ ) ; break ; case Number : @@v17@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v17@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v17@@ ) ; break ; default : goto LABEL_29 ; } LABEL_30 : tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s88\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"xlat\", \"code\": \"__int64 __fastcall xlat ( int @@a1@@ ) { return ( unsigned int ) map_14897 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_mips16_save\", \"code\": \"unsigned __int64 __fastcall gen_mips16_save ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned __int64 @@v16@@ ; @@v16@@ = __readfsqword ( Number ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : case Number : @@v12@@ = Number ; goto LABEL_8 ; case Number : @@v12@@ = Number ; LABEL_8 : switch ( @@v12@@ ) { case Number : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; goto LABEL_14 ; case Number : LABEL_14 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; goto LABEL_15 ; case Number : goto LABEL_16 ; } if ( @@v12@@ != Number ) goto LABEL_17 ; LABEL_15 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_16 : gen_base_offset_addr ( @@a1@@ , @@v14@@ , Number , Number ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_17 : gen_load_gpr ( @@v14@@ , Number ) ; if ( @@a4@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } switch ( @@a2@@ ) { case Number : goto LABEL_26 ; case Number : goto LABEL_25 ; case Number : goto LABEL_24 ; case Number : goto LABEL_23 ; case Number : goto LABEL_22 ; case Number : goto LABEL_21 ; case Number : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_21 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_22 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_23 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_24 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_25 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; LABEL_26 : tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; break ; default : break ; } if ( @@a6@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } if ( @@a5@@ ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : case Number : @@v13@@ = Number ; break ; case Number : case Number : @@v13@@ = Number ; break ; case Number : @@v13@@ = Number ; break ; default : goto LABEL_7 ; } if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; if ( @@v13@@ > Number ) { tcg_gen_subi_i64 ( @@v14@@ , @@v14@@ , Number L ) ; gen_load_gpr ( @@v15@@ , Number ) ; op_st_sw ( @@v15@@ , @@v14@@ , @@a1@@ ) ; } } } } tcg_gen_subi_i64 ( dword_29DD4 , dword_29DD4 , @@a7@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; return __readfsqword ( Number ) ^ @@v16@@ ; default : LABEL_7 : generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v16@@ ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"a7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s-16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mips16_restore\", \"code\": \"unsigned __int64 __fastcall gen_mips16_restore ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ , int @@a7@@ ) { int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , dword_29DD4 , @@a7@@ ) ; if ( @@a4@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } switch ( @@a2@@ ) { case Number : goto LABEL_10 ; case Number : goto LABEL_9 ; case Number : goto LABEL_8 ; case Number : goto LABEL_7 ; case Number : goto LABEL_6 ; case Number : goto LABEL_5 ; case Number : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_5 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_6 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_7 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_8 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_9 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; LABEL_10 : tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; break ; default : break ; } if ( @@a6@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } if ( @@a5@@ ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } switch ( @@a3@@ ) { case Number : case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : case Number : @@v12@@ = Number ; goto LABEL_22 ; case Number : @@v12@@ = Number ; LABEL_22 : if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; if ( @@v12@@ > Number ) { tcg_gen_subi_i64 ( @@v13@@ , @@v13@@ , Number L ) ; op_ld_lw ( @@v14@@ , @@v13@@ , @@a1@@ ) ; gen_store_gpr ( @@v14@@ , Number ) ; } } } } tcg_gen_addi_i64 ( dword_29DD4 , dword_29DD4 , @@a7@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; default : generate_exception ( @@a1@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"a7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s-16\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_addiupc\", \"code\": \"unsigned __int64 __fastcall gen_addiupc ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { __int64 @@v5@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a5@@ && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v5@@ = pc_relative_pc ( @@a1@@ ) ; tcg_gen_movi_i64 ( @@v9@@ , @@v5@@ ) ; tcg_gen_addi_i64 ( cpu_gpr [ @@a2@@ ] , @@v9@@ , @@a3@@ ) ; if ( ! @@a4@@ ) tcg_gen_ext32s_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a2@@ ] ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"decode_i64_mips16\", \"code\": \"unsigned __int64 __fastcall decode_i64_mips16 ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ , int @@a6@@ ) { __int16 v6 ; __int16 v7 ; __int16 v8 ; __int16 v9 ; __int16 v10 ; __int16 v11 ; __int16 v12 ; __int16 v13 ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; switch ( @@a4@@ ) { case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v6 = @@a5@@ ; else v6 = Number * @@a5@@ ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v6 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v7 = @@a5@@ ; else v7 = Number * @@a5@@ ; gen_st ( @@a2@@ , Number , @@a3@@ , Number , v7 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v8 = @@a5@@ ; else v8 = ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) & Number ; gen_st ( @@a2@@ , Number , Number , Number , v8 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v9 = @@a5@@ ; else v9 = Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , v9 ) ; break ; case Number : if ( @@a6@@ && ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { generate_exception ( @@a2@@ , Number ) ; } else { if ( @@a6@@ ) v10 = @@a5@@ ; else v10 = Number * @@a5@@ ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v10 ) ; } break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v11 = @@a5@@ ; else v11 = ( char ) ( Number * @@a5@@ ) >> Number ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a3@@ , v11 ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v12 = @@a5@@ ; else v12 = Number * @@a5@@ ; gen_addiupc ( @@a2@@ , @@a3@@ , v12 , Number , @@a6@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; if ( @@a6@@ ) v13 = @@a5@@ ; else v13 = Number * @@a5@@ ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@a3@@ , Number , v13 ) ; break ; default : return __readfsqword ( Number ) ^ @@v18@@ ; } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"decode_extended_mips16_opc\", \"code\": \"__int64 __fastcall decode_extended_mips16_opc ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v2@@ ; __int16 v4 ; __int16 v5 ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; int @@v14@@ ; int @@v15@@ ; int @@v16@@ ; * ( _DWORD * ) ( @@a2@@ + Number ) = lduw_code ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) | ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) ; @@v6@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; @@v7@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v8@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v9@@ = xlat ( @@v8@@ ) ; @@v10@@ = xlat ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; v4 = ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) & Number | ( HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) << Number ) | * ( _WORD * ) ( @@a2@@ + Number ) & Number ; switch ( @@v6@@ ) { case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_addiupc ( @@a2@@ , @@v9@@ , v4 , Number , Number ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * v4 ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v9@@ , Number , Number * v4 ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v9@@ , Number , Number * v4 ) ; break ; case Number : @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( @@v2@@ == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } else if ( @@v2@@ == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } else if ( @@v2@@ ) { check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } else { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v10@@ , @@v7@@ ) ; } break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : v5 = ( __int16 ) ( Number * ( ( HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) << Number ) & Number | ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) & Number | * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ) >> Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { check_mips_64 ( @@a2@@ ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v5 ) ; } else { gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v5 ) ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v9@@ , @@v9@@ , v4 ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v9@@ , v4 ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v9@@ , v4 ) ; break ; case Number : switch ( @@v8@@ ) { case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * v4 ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , Number , Number , v4 ) ; break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , v4 ) ; break ; case Number : @@v11@@ = HIBYTE ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v12@@ = HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v13@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v14@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v15@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v16@@ = Number * ( ( unsigned __int8 ) ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) | * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_mips16_save ( @@a2@@ , @@v11@@ , @@v12@@ , @@v13@@ , @@v14@@ , @@v15@@ , @@v16@@ ) ; else gen_mips16_restore ( @@a2@@ , @@v11@@ , @@v12@@ , @@v13@@ , @@v14@@ , @@v15@@ , @@v16@@ ) ; break ; default : goto LABEL_45 ; } break ; case Number : tcg_gen_movi_i64 ( cpu_gpr [ @@v9@@ ] , ( unsigned __int16 ) v4 ) ; break ; case Number : tcg_gen_xori_i64 ( dword_29DC0 , cpu_gpr [ @@v9@@ ] , ( unsigned __int16 ) v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v9@@ , Number , v4 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v10@@ , @@v9@@ , v4 ) ; break ; case Number : decode_i64_mips16 ( @@a1@@ , @@a2@@ , @@v10@@ , @@v8@@ , v4 , Number ) ; break ; default : LABEL_45 : generate_exception ( @@a2@@ , Number ) ; break ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}]}"
]
|
{"name": "mmreg", "code": "__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}]} | [{"n": "r", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 552 | []
|
{"name": "mmreg2", "code": "__int64 __fastcall mmreg2 ( int @@a1@@ ) { return ( unsigned int ) map_15528 [ @@a1@@ ] ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}]} | [{"n": "r", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 553 | [
"{\"name\": \"mmreg\", \"code\": \"__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}"
]
|
{"name": "gen_addiur1sp", "code": "unsigned __int64 __fastcall gen_addiur1sp ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v2@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v2@@ , Number , ( unsigned __int8 ) ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 554 | [
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"mmreg\", \"code\": \"__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}"
]
|
{"name": "gen_addiur2", "code": "unsigned __int64 __fastcall gen_addiur2 ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v3@@ ; int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v3@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v4@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v3@@ , @@v4@@ , decoded_imm_15538 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s12"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 555 | [
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"mmreg\", \"code\": \"__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}"
]
|
{"name": "gen_addiusp", "code": "unsigned __int64 __fastcall gen_addiusp ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int16 @@v3@@ ; unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( @@v4@@ > Number ) { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) @@v3@@ = @@v4@@ - Number ; else @@v3@@ = @@v4@@ - Number ; } else { @@v3@@ = @@v4@@ ; } } else { @@v3@@ = @@v4@@ + Number ; } gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , Number * @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v3", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "encoded", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "decoded", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 556 | [
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}"
]
|
{"name": "gen_addius5", "code": "unsigned __int64 __fastcall gen_addius5 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , ( __int16 ) ( ( unsigned __int16 ) ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) << Number ) >> Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 557 | [
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}"
]
|
{"name": "gen_andi16", "code": "unsigned __int64 __fastcall gen_andi16 ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v3@@ ; int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v3@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v4@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_logic_imm ( @@a1@@ , Number , @@v3@@ , @@v4@@ , decoded_imm_15557 [ * ( _DWORD * ) ( @@a2@@ + Number ) & Number ] ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s16"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 558 | [
"{\"name\": \"gen_logic_imm\", \"code\": \"unsigned __int64 __fastcall gen_logic_imm ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned __int16 @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , ( __int16 ) @@a5@@ << Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ ) { tcg_gen_xori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } goto LABEL_14 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ ) { tcg_gen_ori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_14 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ ) tcg_gen_andi_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; } } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_logic\", \"code\": \"unsigned __int64 __fastcall gen_logic ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_nor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else if ( @@a4@@ || ! @@a5@@ ) { if ( ! @@a4@@ || @@a5@@ ) tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number ) ; else tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_xor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) goto LABEL_27 ; if ( @@a4@@ && ! @@a5@@ ) goto LABEL_30 ; goto LABEL_39 ; } if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ && @@a5@@ ) { tcg_gen_or_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) { LABEL_27 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ && ! @@a5@@ ) { LABEL_30 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_39 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ || ! @@a5@@ ) goto LABEL_39 ; tcg_gen_and_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"mmreg\", \"code\": \"__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}"
]
|
{"name": "gen_ldst_multiple", "code": "unsigned __int64 __fastcall gen_ldst_multiple ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; @@v10@@ = tcg_const_i64 ( @@a3@@ ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; save_cpu_state ( @@a1@@ , Number ) ; if ( @@a2@@ == Number ) { gen_helper_sdm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_swm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_lwm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ == Number ) { gen_helper_ldm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } return __readfsqword ( Number ) ^ @@v12@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "reglist", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "t2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 559 | [
"{\"name\": \"gen_helper_lwm\", \"code\": \"unsigned __int64 __fastcall gen_helper_lwm ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_lwm , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_swm\", \"code\": \"unsigned __int64 __fastcall gen_helper_swm ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_swm , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_ldm\", \"code\": \"unsigned __int64 __fastcall gen_helper_ldm ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_ldm , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_sdm\", \"code\": \"unsigned __int64 __fastcall gen_helper_sdm ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_sdm , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_base_offset_addr\", \"code\": \"unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_pool16c_insn", "code": "unsigned __int64 __fastcall gen_pool16c_insn ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v6@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v7@@ = mmreg ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v7@@ , Number ) ; break ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v6@@ , @@v7@@ ) ; break ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v6@@ , @@v7@@ ) ; break ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v6@@ , @@v7@@ ) ; break ; case Number : case Number : case Number : case Number : gen_ldst_multiple ( @@a2@@ , Number , lwm_convert_15605 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] , Number , Number * ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) ) ; break ; case Number : case Number : case Number : case Number : gen_ldst_multiple ( @@a2@@ , Number , swm_convert_15611 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] , Number , Number * ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) ) ; break ; case Number : case Number : gen_compute_branch ( @@a2@@ , Number , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number , Number ) ; * @@a3@@ = Number ; break ; case Number : case Number : gen_compute_branch ( @@a2@@ , Number , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number , Number ) ; break ; case Number : case Number : @@v5@@ = Number ; goto LABEL_12 ; case Number : case Number : @@v5@@ = Number ; LABEL_12 : gen_compute_branch ( @@a2@@ , @@v5@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number , Number ) ; * @@a3@@ = Number ; break ; case Number : case Number : gen_HILO ( @@a2@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; break ; case Number : case Number : gen_HILO ( @@a2@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; break ; case Number : generate_exception ( @@a2@@ , Number ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; break ; case Number : case Number : @@v8@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , Number * @@v8@@ ) ; break ; default : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_DWORD"}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "is_branch", "t": {"T": 3, "t": "int"}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "imm", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "opc", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 560 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_logic\", \"code\": \"unsigned __int64 __fastcall gen_logic ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_nor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else if ( @@a4@@ || ! @@a5@@ ) { if ( ! @@a4@@ || @@a5@@ ) tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number ) ; else tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_xor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) goto LABEL_27 ; if ( @@a4@@ && ! @@a5@@ ) goto LABEL_30 ; goto LABEL_39 ; } if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ && @@a5@@ ) { tcg_gen_or_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) { LABEL_27 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ && ! @@a5@@ ) { LABEL_30 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_39 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ || ! @@a5@@ ) goto LABEL_39 ; tcg_gen_and_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_HILO\", \"code\": \"unsigned __int64 __fastcall gen_HILO ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ || @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_LO , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_LO , Number L ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_LO ) ; break ; case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_HI ) ; break ; case Number : if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_HI , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_HI , Number L ) ; break ; } } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"mmreg\", \"code\": \"__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_ldst_multiple\", \"code\": \"unsigned __int64 __fastcall gen_ldst_multiple ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; @@v10@@ = tcg_const_i64 ( @@a3@@ ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; save_cpu_state ( @@a1@@ , Number ) ; if ( @@a2@@ == Number ) { gen_helper_sdm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_swm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_lwm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ == Number ) { gen_helper_ldm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_ldxs", "code": "unsigned __int64 __fastcall gen_ldxs ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a2@@ ) ; if ( @@a3@@ ) { gen_load_gpr ( @@v8@@ , @@a3@@ ) ; tcg_gen_shli_i64 ( @@v8@@ , @@v8@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v7@@ , @@v8@@ , @@v7@@ ) ; } save_cpu_state ( @@a1@@ , Number ) ; op_ld_lw ( @@v8@@ , @@v7@@ , @@a1@@ ) ; gen_store_gpr ( @@v8@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 561 | [
"{\"name\": \"tcg_gen_shli_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_op_addr_add\", \"code\": \"unsigned __int64 __fastcall gen_op_addr_add ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) tcg_gen_ext32s_i64 ( @@a2@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lw\", \"code\": \"unsigned __int64 __fastcall op_ld_lw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_ldst_pair", "code": "unsigned __int64 __fastcall gen_ldst_pair ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number || @@a3@@ == Number || @@a3@@ == @@a4@@ ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ + Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ + Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_ld_lw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; op_ld_lw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ + Number ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_ld_ld ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; op_ld_ld ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ + Number ) ; } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "base", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "opc", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "offset", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "r72"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 562 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_op_addr_add\", \"code\": \"unsigned __int64 __fastcall gen_op_addr_add ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) tcg_gen_ext32s_i64 ( @@a2@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_lw\", \"code\": \"unsigned __int64 __fastcall op_ld_lw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld32s ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_ld_ld\", \"code\": \"unsigned __int64 __fastcall op_ld_ld ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_ld64 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sw\", \"code\": \"unsigned __int64 __fastcall op_st_sw ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st32 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"op_st_sd\", \"code\": \"unsigned __int64 __fastcall op_st_sd ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_qemu_st64 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a3@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_base_offset_addr\", \"code\": \"unsigned __int64 __fastcall gen_base_offset_addr ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , __int16 @@a4@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a4@@ ) { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; gen_op_addr_add ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a2@@ ) ; } else { gen_load_gpr ( @@a2@@ , @@a3@@ ) ; } } else { tcg_gen_movi_i64 ( @@a2@@ , @@a4@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_pool32axf", "code": "unsigned __int64 __fastcall gen_pool32axf ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , _DWORD * @@a5@@ ) { unsigned int v9 ; unsigned int v10 ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v11@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : if ( @@a3@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a4@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; break ; case Number : if ( @@v11@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_load_srsgpr ( @@a3@@ , @@a4@@ ) ; } else { if ( @@v11@@ != Number ) goto LABEL_70 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_store_srsgpr ( @@a3@@ , @@a4@@ ) ; } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a3@@ ) ; gen_mtc0 ( @@a1@@ , @@a2@@ , @@v14@@ , @@a4@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case Number : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; default : goto LABEL_70 ; } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : if ( @@v11@@ == Number ) { @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_di ( @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; tcg_temp_free_i64 ( @@v13@@ ) ; } else { if ( @@v11@@ != Number ) goto LABEL_70 ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_ei ( @@v12@@ ) ; gen_store_gpr ( @@v12@@ , @@a4@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; tcg_temp_free_i64 ( @@v12@@ ) ; } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : gen_bshfl ( @@a2@@ , Number , @@a4@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : gen_bshfl ( @@a2@@ , Number , @@a4@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : v9 = Number ; goto LABEL_17 ; case Number : v9 = Number ; LABEL_17 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cl ( @@a2@@ , v9 , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : gen_rdhwr ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : gen_bshfl ( @@a2@@ , Number , @@a4@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; LABEL_28 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_muldiv ( @@a2@@ , v10 , @@a4@@ , @@a3@@ ) ; break ; default : goto LABEL_70 ; } break ; case Number : if ( @@v11@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; } else { if ( ( unsigned __int8 ) ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) > Number ) goto LABEL_70 ; if ( @@v11@@ != Number ) { if ( @@v11@@ != Number ) goto LABEL_70 ; generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : if ( @@v11@@ > Number || ( ( Number L << @@v11@@ ) & Number ) == Number ) goto LABEL_70 ; generate_exception_err ( @@a2@@ , Number , Number ) ; break ; case Number : if ( @@v11@@ == Number ) { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } else { if ( ( unsigned __int8 ) ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) > Number ) goto LABEL_70 ; if ( @@v11@@ == Number ) { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } else if ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } else { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } } break ; case Number : if ( ( unsigned __int8 ) ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) > Number ) { if ( @@v11@@ - Number > Number ) goto LABEL_70 ; gen_compute_branch ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; * @@a5@@ = Number ; } else { gen_compute_branch ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; * @@a5@@ = Number ; } break ; default : LABEL_70 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v15@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 3, "t": "_DWORD"}, "location": "r72"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v15", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "is_branch", "t": {"T": 3, "t": "int"}, "location": "r72"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t0_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "minor", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 563 | [
"{\"name\": \"gen_helper_di\", \"code\": \"unsigned __int64 __fastcall gen_helper_di ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_di , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_ei\", \"code\": \"unsigned __int64 __fastcall gen_helper_ei ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_ei , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_srsgpr\", \"code\": \"unsigned __int64 __fastcall gen_load_srsgpr ( int @@a1@@ , int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i64 ( ) ; if ( @@a1@@ ) { @@v4@@ = tcg_temp_new_i32 ( ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , Number L ) ; tcg_gen_shri_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_andi_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_muli_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_ext_i32_i64 ( @@v5@@ , @@v4@@ ) ; tcg_gen_add_i64 ( @@v5@@ , cpu_env , @@v5@@ ) ; tcg_gen_ld_i64 ( @@v3@@ , @@v5@@ , Number L * @@a1@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_movi_i64 ( @@v3@@ , Number L ) ; } gen_store_gpr ( @@v3@@ , @@a2@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_srsgpr\", \"code\": \"unsigned __int64 __fastcall gen_store_srsgpr ( int @@a1@@ , int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) { @@v3@@ = tcg_temp_new_i64 ( ) ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; gen_load_gpr ( @@v3@@ , @@a1@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , Number L ) ; tcg_gen_shri_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_andi_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_muli_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_ext_i32_i64 ( @@v5@@ , @@v4@@ ) ; tcg_gen_add_i64 ( @@v5@@ , cpu_env , @@v5@@ ) ; tcg_gen_st_i64 ( @@v3@@ , @@v5@@ , Number L * @@a2@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception_err\", \"code\": \"unsigned __int64 __fastcall generate_exception_err ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_const_i32 ( @@a2@@ ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; save_cpu_state ( @@a1@@ , Number ) ; gen_helper_raise_exception_err ( @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_HILO\", \"code\": \"unsigned __int64 __fastcall gen_HILO ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ || @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_LO , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_LO , Number L ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_LO ) ; break ; case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_HI ) ; break ; case Number : if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_HI , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_HI , Number L ) ; break ; } } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_muldiv\", \"code\": \"unsigned __int64 __fastcall gen_muldiv ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; if ( @@a2@@ > Number ) { if ( @@a2@@ - Number > Number ) { LABEL_6 : @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; goto LABEL_7 ; } } else if ( @@a2@@ < Number ) { goto LABEL_6 ; } @@v7@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; LABEL_7 : gen_load_gpr ( @@v7@@ , @@a3@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { @@v9@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v9@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v10@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v9@@ , @@v9@@ , @@v10@@ ) ; tcg_gen_concat32_i64 ( @@v10@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v9@@ , @@v10@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v9@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v9@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v11@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v12@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_concat32_i64 ( @@v12@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v11@@ ) ; tcg_gen_shri_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ == Number ) { @@v13@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v13@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v14@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_gen_concat32_i64 ( @@v14@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v13@@ ) ; tcg_gen_shri_i64 ( @@v13@@ , @@v13@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v13@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) { @@v15@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v15@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v16@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_concat32_i64 ( @@v16@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v15@@ ) ; tcg_gen_shri_i64 ( @@v15@@ , @@v15@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } LABEL_29 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_30 ; } if ( @@a2@@ < Number ) goto LABEL_29 ; switch ( @@a2@@ ) { case Number : @@v25@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v25@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v26@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v25@@ , @@v25@@ , @@v26@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v25@@ ) ; tcg_gen_shri_i64 ( @@v25@@ , @@v25@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v25@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v23@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v23@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v24@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v23@@ ) ; tcg_gen_shri_i64 ( @@v23@@ , @@v23@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v21@@ = gen_new_label ( @@v8@@ ) ; @@v22@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32s_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32s_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v21@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v22@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v22@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v21@@ ) ; gen_set_label ( @@v22@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v21@@ ) ; break ; case Number : @@v20@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v20@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v20@@ ) ; break ; case Number : gen_helper_dmult ( @@v7@@ , @@v8@@ ) ; break ; case Number : gen_helper_dmultu ( @@v7@@ , @@v8@@ ) ; break ; case Number : @@v18@@ = gen_new_label ( @@v8@@ ) ; @@v19@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v18@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v19@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v19@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v18@@ ) ; gen_set_label ( @@v19@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v18@@ ) ; break ; case Number : @@v17@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v17@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v17@@ ) ; break ; default : goto LABEL_29 ; } LABEL_30 : tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s88\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"gen_cl\", \"code\": \"unsigned __int64 __fastcall gen_cl ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { gen_helper_dclo ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : gen_helper_dclz ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; case Number : gen_helper_clz ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; case Number : gen_helper_clo ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; } } tcg_temp_free_i64 ( @@v7@@ ) ; } return __readfsqword ( Number ) ^ @@v8@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_trap\", \"code\": \"unsigned __int64 __fastcall gen_trap ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { __int64 @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned __int64 @@v14@@ ; @@v9@@ = @@a1@@ ; @@v14@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = Number ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) { LABEL_20 : if ( @@a3@@ || @@a5@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; tcg_gen_movi_i64 ( @@v12@@ , @@a5@@ ) ; @@v10@@ = Number ; } } else { if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_22 ; } else if ( @@a2@@ < Number ) { goto LABEL_22 ; } if ( @@a3@@ != @@a4@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; gen_load_gpr ( @@v12@@ , @@a4@@ ) ; @@v10@@ = Number ; } } LABEL_22 : if ( @@v10@@ ) { @@v13@@ = gen_new_label ( @@a1@@ ) ; if ( @@a2@@ == Number ) { LABEL_64 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_59 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_63 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_62 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_61 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) LABEL_60 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case String : goto LABEL_60 ; case String : goto LABEL_61 ; case String : goto LABEL_62 ; case String : goto LABEL_63 ; case String : goto LABEL_59 ; case String : goto LABEL_64 ; default : break ; } } } } } } } generate_exception ( @@v9@@ , Number ) ; gen_set_label ( @@v13@@ ) ; } else if ( @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ <= Number && @@a2@@ >= Number ) ) ) ) ) { generate_exception ( @@v9@@ , Number ) ; } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; return __readfsqword ( Number ) ^ @@v14@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_bshfl\", \"code\": \"unsigned __int64 __fastcall gen_bshfl ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_ext16s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { tcg_gen_ext8s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { @@v8@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v8@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v8@@ , @@v8@@ , Number ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( @@v7@@ , @@v7@@ , @@v8@@ ) ; tcg_gen_shri_i64 ( @@v8@@ , @@v7@@ , Number L ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_or_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ , @@v8@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { @@v10@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v10@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v10@@ , @@v10@@ , Number L ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( @@v7@@ , @@v7@@ , @@v10@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_16 ; @@v9@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v9@@ , @@v9@@ , Number ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } LABEL_17 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } } } LABEL_16 : generate_exception ( @@a1@@ , Number ) ; tcg_temp_free_i64 ( @@v7@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mfc0\", \"code\": \"unsigned __int64 __fastcall gen_mfc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf1 ( @@a3@@ ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpconf0 ( @@a3@@ ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_mvpcontrol ( @@a3@@ ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_random ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load64 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcstatus ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcbind ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcrestart ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tchalt ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tccontext ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschedule ( @@a3@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mfc0_tcschefback ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; if ( use_icount ) gen_io_start ( ) ; gen_helper_mfc0_count ( @@a3@@ ) ; if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { if ( ( int ) @@a5@@ > Number ) goto LABEL_116 ; if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; } else { gen_mfc0_load32 ( @@a3@@ , Number L ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_helper_mfc0_lladdr ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mfc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : goto LABEL_105 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mfc0_debug ( @@a3@@ ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : switch ( @@a5@@ ) { case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ > Number ) goto LABEL_116 ; LABEL_105 : tcg_gen_movi_i64 ( @@a3@@ , Number L ) ; break ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; case Number : case Number : case Number : case Number : gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : goto LABEL_116 ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_116 ; tcg_gen_ld_i64 ( @@a3@@ , cpu_env , Number L ) ; tcg_gen_ext32s_i64 ( @@a3@@ , @@a3@@ ) ; break ; case Number : if ( @@a5@@ ) goto LABEL_116 ; gen_mfc0_load32 ( @@a3@@ , Number L ) ; break ; default : LABEL_116 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_mtc0\", \"code\": \"unsigned __int64 __fastcall gen_mtc0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a5@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( use_icount ) gen_io_start ( ) ; switch ( @@a4@@ ) { case Number : if ( @@a5@@ == Number ) goto LABEL_14 ; if ( ( int ) @@a5@@ > Number ) goto LABEL_112 ; if ( @@a5@@ == Number ) { LABEL_14 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_mvpcontrol ( @@a3@@ ) ; } else { gen_helper_mtc0_index ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpecontrol ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_yqmask ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_vpeopt ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_entrylo0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcstatus ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcbind ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcrestart ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tchalt ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tccontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschedule ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_tcschefback ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entrylo1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_context ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_pagegrain ( @@a3@@ ) ; } else { gen_helper_mtc0_pagemask ( @@a3@@ ) ; } goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_wired ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf0 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf1 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf2 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf3 ( @@a3@@ ) ; goto LABEL_110 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsconf4 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_hwrena ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_count ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_entryhi ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_compare ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { if ( ( int ) @@a5@@ > Number ) { LABEL_112 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( @@a5@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_srsctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else if ( @@a5@@ ) { if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_intctl ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_status ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } LABEL_110 : if ( use_icount ) { gen_io_end ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; case Number : if ( @@a5@@ ) goto LABEL_112 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_mtc0_cause ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( ! @@a5@@ ) goto LABEL_110 ; if ( @@a5@@ != Number ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_ebase ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_config0 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : case Number : case Number : case Number : goto LABEL_110 ; case Number : gen_helper_mtc0_config2 ( @@a3@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_lladdr ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v10@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchlo ( @@a3@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ > Number ) goto LABEL_112 ; @@v9@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_mtc0_watchhi ( @@a3@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_mtc0_xcontext ( @@a3@@ ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_helper_mtc0_framemask ( @@a3@@ ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_debug ( @@a3@@ ) ; gen_save_pc ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; case Number : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_91 ; case Number : LABEL_91 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_92 ; case Number : LABEL_92 : * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : break ; default : goto LABEL_112 ; } * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_112 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : switch ( @@a5@@ ) { case Number : gen_helper_mtc0_performance0 ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ <= Number ) goto LABEL_110 ; goto LABEL_112 ; case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taglo ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datalo ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : switch ( @@a5@@ ) { case Number : case Number : case Number : case Number : gen_helper_mtc0_taghi ( @@a3@@ ) ; goto LABEL_110 ; case Number : case Number : case Number : case Number : gen_helper_mtc0_datahi ( @@a3@@ ) ; goto LABEL_110 ; default : goto LABEL_112 ; } case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store64 ( @@a3@@ , Number L ) ; goto LABEL_110 ; case Number : if ( @@a5@@ ) goto LABEL_112 ; gen_mtc0_store32 ( @@a3@@ , Number L ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_110 ; default : goto LABEL_112 ; } }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cp0\", \"code\": \"unsigned __int64 __fastcall gen_cp0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbr ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbwi ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbwr ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbp ( ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_eret ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) goto LABEL_34 ; gen_helper_deret ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; * ( _QWORD * ) ( @@a2@@ + Number ) += Number L ; save_cpu_state ( @@a2@@ , Number ) ; * ( _QWORD * ) ( @@a2@@ + Number ) -= Number L ; gen_helper_wait ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; default : goto LABEL_34 ; } } else if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mttr ( @@a1@@ , @@a2@@ , @@a5@@ , @@a4@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( @@a5@@ ) gen_mftr ( @@a1@@ , @@a2@@ , @@a4@@ , @@a5@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; gen_dmtc0 ( @@a1@@ , @@a2@@ , @@v8@@ , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; tcg_temp_free_i64 ( @@v8@@ ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_mtc0 ( @@a1@@ , @@a2@@ , @@v9@@ , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { if ( @@a4@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a4@@ ] , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; } else { if ( @@a3@@ != Number ) { LABEL_34 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v10@@ ; } check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( @@a4@@ ) gen_dmfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a4@@ ] , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; } } } } } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_rdhwr\", \"code\": \"unsigned __int64 __fastcall gen_rdhwr ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a4@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_ccres ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { if ( @@a4@@ > Number ) { LABEL_11 : generate_exception ( @@a2@@ , Number ) ; goto LABEL_12 ; } if ( @@a4@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_cc ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else if ( @@a4@@ ) { if ( @@a4@@ != Number ) goto LABEL_11 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_synci_step ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_cpunum ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } } LABEL_12 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_pool32fxf", "code": "unsigned __int64 __fastcall gen_pool32fxf ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , unsigned int @@a4@@ ) { int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( @@v5@@ == Number ) goto LABEL_76 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_77 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_76 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) { LABEL_78 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@v5@@ == Number ) { LABEL_77 : gen_movci ( @@a2@@ , @@a3@@ , @@a4@@ , ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number , Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_76 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_77 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) { if ( @@v5@@ != Number ) goto LABEL_78 ; LABEL_76 : gen_movci ( @@a2@@ , @@a3@@ , @@a4@@ , ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number , Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_78 ; switch ( @@v5@@ ) { case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : case Number : case Number : case Number : goto LABEL_77 ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : case Number : case Number : goto LABEL_76 ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; default : goto LABEL_78 ; } return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "extension", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 564 | [
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cp1\", \"code\": \"unsigned __int64 __fastcall gen_cp1 ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , unsigned int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned __int64 @@v14@@ ; @@v14@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v8@@ = tcg_temp_new_i32 ( @@v7@@ ) ; tcg_gen_trunc_i64_i32 ( @@v8@@ , @@v7@@ ) ; gen_store_fpr32h ( @@v8@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v9@@ = tcg_const_i32 ( @@a4@@ ) ; gen_helper_ctc1 ( @@v7@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v7@@ , @@a4@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v10@@ = tcg_temp_new_i32 ( @@v7@@ ) ; tcg_gen_trunc_i64_i32 ( @@v10@@ , @@v7@@ ) ; gen_store_fpr32 ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v11@@ , @@a4@@ ) ; tcg_gen_ext_i32_i64 ( @@v7@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { @@v12@@ = tcg_const_i32 ( @@a4@@ ) ; gen_helper_cfc1 ( @@v7@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) { LABEL_24 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_25 ; } if ( @@a2@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v13@@ , @@a4@@ ) ; tcg_gen_ext_i32_i64 ( @@v7@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_24 ; gen_load_fpr64 ( @@a1@@ , @@v7@@ , @@a4@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } LABEL_25 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v14@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movci\", \"code\": \"unsigned __int64 __fastcall gen_movci ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { char @@v5@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) { @@v10@@ = gen_new_label ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v5@@ = get_fp_bit ( @@a4@@ ) ; tcg_gen_andi_i32 ( @@v11@@ , fpu_fcr31 , Number << @@v5@@ ) ; tcg_gen_brcondi_i32 ( @@a5@@ == Number , @@v11@@ , Number , @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a2@@ ] , Number L ) ; gen_set_label ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r8\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_farith\", \"code\": \"unsigned __int64 __fastcall gen_farith ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , unsigned int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { __int64 @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; unsigned int @@v32@@ ; int @@v33@@ ; unsigned int @@v34@@ ; int @@v35@@ ; unsigned int @@v36@@ ; unsigned int @@v37@@ ; unsigned int @@v38@@ ; unsigned int @@v39@@ ; unsigned int @@v40@@ ; unsigned int @@v41@@ ; unsigned int @@v42@@ ; unsigned int @@v43@@ ; unsigned int @@v44@@ ; unsigned int @@v45@@ ; unsigned int @@v46@@ ; unsigned int @@v47@@ ; unsigned int @@v48@@ ; unsigned int @@v49@@ ; unsigned int @@v50@@ ; unsigned int @@v51@@ ; unsigned int @@v52@@ ; unsigned int @@v53@@ ; unsigned int @@v54@@ ; unsigned int @@v55@@ ; unsigned int @@v56@@ ; unsigned int @@v57@@ ; unsigned int @@v58@@ ; unsigned int @@v59@@ ; unsigned int @@v60@@ ; unsigned int @@v61@@ ; unsigned int @@v62@@ ; unsigned int @@v63@@ ; unsigned int @@v64@@ ; unsigned int @@v65@@ ; int @@v66@@ ; unsigned int @@v67@@ ; int @@v68@@ ; unsigned int @@v69@@ ; unsigned int @@v70@@ ; unsigned int @@v71@@ ; unsigned int @@v72@@ ; unsigned int @@v73@@ ; unsigned int @@v74@@ ; unsigned int @@v75@@ ; unsigned int @@v76@@ ; unsigned int @@v77@@ ; unsigned int @@v78@@ ; unsigned int @@v79@@ ; unsigned int @@v80@@ ; unsigned int @@v81@@ ; unsigned int @@v82@@ ; unsigned int @@v83@@ ; unsigned int @@v84@@ ; unsigned int @@v85@@ ; unsigned int @@v86@@ ; unsigned int @@v87@@ ; unsigned int @@v88@@ ; unsigned int @@v89@@ ; unsigned int @@v90@@ ; unsigned int @@v91@@ ; unsigned int @@v92@@ ; unsigned int @@v93@@ ; unsigned int @@v94@@ ; unsigned int @@v95@@ ; unsigned int @@v96@@ ; unsigned int @@v97@@ ; unsigned int @@v98@@ ; unsigned int @@v99@@ ; unsigned int @@v100@@ ; unsigned int @@v101@@ ; unsigned int @@v102@@ ; unsigned int @@v103@@ ; unsigned int @@v104@@ ; unsigned int @@v105@@ ; unsigned int @@v106@@ ; unsigned int @@v107@@ ; unsigned int @@v108@@ ; unsigned int @@v109@@ ; int @@v110@@ ; unsigned int @@v111@@ ; int @@v112@@ ; unsigned int @@v113@@ ; unsigned int @@v114@@ ; unsigned int @@v115@@ ; unsigned int @@v116@@ ; unsigned int @@v117@@ ; unsigned int @@v118@@ ; unsigned int @@v119@@ ; unsigned int @@v120@@ ; unsigned int @@v121@@ ; unsigned int @@v122@@ ; unsigned int @@v123@@ ; unsigned int @@v124@@ ; unsigned int @@v125@@ ; unsigned int @@v126@@ ; unsigned int @@v127@@ ; unsigned int @@v128@@ ; unsigned int @@v129@@ ; unsigned int @@v130@@ ; unsigned int @@v131@@ ; unsigned int @@v132@@ ; unsigned int @@v133@@ ; unsigned int @@v134@@ ; unsigned int @@v135@@ ; unsigned int @@v136@@ ; unsigned int @@v137@@ ; unsigned __int64 @@v138@@ ; @@v10@@ = @@a1@@ ; @@v138@@ = __readfsqword ( Number ) ; @@v11@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v44@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v45@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v44@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v45@@ , @@a3@@ ) ; gen_helper_float_add_ps ( @@v44@@ , @@v44@@ , @@v45@@ ) ; tcg_temp_free_i64 ( @@v45@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v44@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v44@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v42@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v43@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v42@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v43@@ , @@a3@@ ) ; gen_helper_float_sub_ps ( @@v42@@ , @@v42@@ , @@v43@@ ) ; tcg_temp_free_i64 ( @@v43@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v42@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v42@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v40@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v41@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v40@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v41@@ , @@a3@@ ) ; gen_helper_float_mul_ps ( @@v40@@ , @@v40@@ , @@v41@@ ) ; tcg_temp_free_i64 ( @@v41@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v40@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v40@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v39@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v39@@ , @@a4@@ ) ; gen_helper_float_abs_ps ( @@v39@@ , @@v39@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v39@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v39@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v38@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v38@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v38@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v38@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v37@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v37@@ , @@a4@@ ) ; gen_helper_float_chs_ps ( @@v37@@ , @@v37@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v37@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v37@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; gen_movcf_ps ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v35@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v35@@ ) ; } @@v36@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v36@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v36@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v36@@ ) ; gen_set_label ( @@v35@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v33@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v33@@ ) ; @@v34@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v34@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v34@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v34@@ ) ; gen_set_label ( @@v33@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v31@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v31@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v32@@ , @@a4@@ ) ; gen_helper_float_addr_ps ( @@v31@@ , @@v31@@ , @@v32@@ ) ; tcg_temp_free_i64 ( @@v32@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v31@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v31@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v29@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v30@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v29@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v30@@ , @@a4@@ ) ; gen_helper_float_mulr_ps ( @@v29@@ , @@v29@@ , @@v30@@ ) ; tcg_temp_free_i64 ( @@v30@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v29@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v29@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v27@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v28@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v27@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v28@@ , @@a5@@ ) ; gen_helper_float_recip2_ps ( @@v27@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i64 ( @@v28@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v27@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v27@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v26@@ , @@a4@@ ) ; gen_helper_float_recip1_ps ( @@v26@@ , @@v26@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v26@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v25@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_ps ( @@v25@@ , @@v25@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v25@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v23@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v24@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_ps ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v23@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v22@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v22@@ , @@a4@@ ) ; gen_helper_float_cvts_pu ( @@v22@@ , @@v22@@ ) ; gen_store_fpr32 ( @@v22@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v21@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v21@@ , @@a4@@ ) ; gen_helper_float_cvtpw_ps ( @@v21@@ , @@v21@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v21@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v20@@ , @@a4@@ ) ; gen_helper_float_cvts_pl ( @@v20@@ , @@v20@@ ) ; gen_store_fpr32 ( @@v20@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v18@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v19@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v18@@ , @@a5@@ ) ; gen_store_fpr32 ( @@v19@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v17@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v16@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v17@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v17@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v16@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v14@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v15@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v15@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v14@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v13@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v12@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v13@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v13@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v12@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v46@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v46@@ , @@a4@@ ) ; gen_helper_float_cvtd_l ( @@v46@@ , @@v46@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v46@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v46@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v47@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v48@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v48@@ , @@a4@@ ) ; gen_helper_float_cvts_l ( @@v47@@ , @@v48@@ ) ; tcg_temp_free_i64 ( @@v48@@ ) ; gen_store_fpr32 ( @@v47@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v47@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v49@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v49@@ , @@a4@@ ) ; gen_helper_float_cvtps_pw ( @@v49@@ , @@v49@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v49@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v49@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v50@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v51@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v50@@ , @@a4@@ ) ; gen_helper_float_cvtd_w ( @@v51@@ , @@v50@@ ) ; tcg_temp_free_i32 ( @@v50@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v51@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v51@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) { LABEL_125 : generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { @@v52@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v52@@ , @@a4@@ ) ; gen_helper_float_cvts_w ( @@v52@@ , @@v52@@ ) ; gen_store_fpr32 ( @@v52@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v52@@ ) ; } else if ( @@a2@@ > Number ) { if ( @@a2@@ > Number || @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v92@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v93@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v92@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v93@@ , @@a3@@ ) ; gen_helper_float_add_d ( @@v92@@ , @@v92@@ , @@v93@@ ) ; tcg_temp_free_i64 ( @@v93@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v92@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v92@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v90@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v91@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v90@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v91@@ , @@a3@@ ) ; gen_helper_float_sub_d ( @@v90@@ , @@v90@@ , @@v91@@ ) ; tcg_temp_free_i64 ( @@v91@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v90@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v90@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v88@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v89@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v88@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v89@@ , @@a3@@ ) ; gen_helper_float_mul_d ( @@v88@@ , @@v88@@ , @@v89@@ ) ; tcg_temp_free_i64 ( @@v89@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v88@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v88@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v86@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v87@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v86@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v87@@ , @@a3@@ ) ; gen_helper_float_div_d ( @@v86@@ , @@v86@@ , @@v87@@ ) ; tcg_temp_free_i64 ( @@v87@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v86@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v86@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v85@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v85@@ , @@a4@@ ) ; gen_helper_float_sqrt_d ( @@v85@@ , @@v85@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v85@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v85@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v84@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v84@@ , @@a4@@ ) ; gen_helper_float_abs_d ( @@v84@@ , @@v84@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v84@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v84@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v83@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v83@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v83@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v83@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v82@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v82@@ , @@a4@@ ) ; gen_helper_float_chs_d ( @@v82@@ , @@v82@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v82@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v82@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v81@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v81@@ , @@a4@@ ) ; gen_helper_float_roundl_d ( @@v81@@ , @@v81@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v81@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v81@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v80@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v80@@ , @@a4@@ ) ; gen_helper_float_truncl_d ( @@v80@@ , @@v80@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v80@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v80@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v79@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v79@@ , @@a4@@ ) ; gen_helper_float_ceill_d ( @@v79@@ , @@v79@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v79@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v79@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v78@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v78@@ , @@a4@@ ) ; gen_helper_float_floorl_d ( @@v78@@ , @@v78@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v78@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v78@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v76@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v77@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v77@@ , @@a4@@ ) ; gen_helper_float_roundw_d ( @@v76@@ , @@v77@@ ) ; tcg_temp_free_i64 ( @@v77@@ ) ; gen_store_fpr32 ( @@v76@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v76@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v74@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v75@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v75@@ , @@a4@@ ) ; gen_helper_float_truncw_d ( @@v74@@ , @@v75@@ ) ; tcg_temp_free_i64 ( @@v75@@ ) ; gen_store_fpr32 ( @@v74@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v74@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v72@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v73@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v73@@ , @@a4@@ ) ; gen_helper_float_ceilw_d ( @@v72@@ , @@v73@@ ) ; tcg_temp_free_i64 ( @@v73@@ ) ; gen_store_fpr32 ( @@v72@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v72@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v70@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v71@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v71@@ , @@a4@@ ) ; gen_helper_float_floorw_d ( @@v70@@ , @@v71@@ ) ; tcg_temp_free_i64 ( @@v71@@ ) ; gen_store_fpr32 ( @@v70@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v70@@ ) ; break ; case Number : gen_movcf_d ( @@a1@@ , @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v68@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v68@@ ) ; } @@v69@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v69@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v69@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v69@@ ) ; gen_set_label ( @@v68@@ ) ; break ; case Number : @@v66@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v66@@ ) ; @@v67@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v67@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v67@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v67@@ ) ; gen_set_label ( @@v66@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v65@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v65@@ , @@a4@@ ) ; gen_helper_float_recip_d ( @@v65@@ , @@v65@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v65@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v65@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v64@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v64@@ , @@a4@@ ) ; gen_helper_float_rsqrt_d ( @@v64@@ , @@v64@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v64@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v64@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v62@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v63@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v62@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v63@@ , @@a3@@ ) ; gen_helper_float_recip2_d ( @@v62@@ , @@v62@@ , @@v63@@ ) ; tcg_temp_free_i64 ( @@v63@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v62@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v62@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v61@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v61@@ , @@a4@@ ) ; gen_helper_float_recip1_d ( @@v61@@ , @@v61@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v61@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v61@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v60@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v60@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_d ( @@v60@@ , @@v60@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v60@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v60@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v58@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v59@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v58@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v59@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_d ( @@v58@@ , @@v58@@ , @@v59@@ ) ; tcg_temp_free_i64 ( @@v59@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v58@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v58@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v56@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v57@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v57@@ , @@a4@@ ) ; gen_helper_float_cvts_d ( @@v56@@ , @@v57@@ ) ; tcg_temp_free_i64 ( @@v57@@ ) ; gen_store_fpr32 ( @@v56@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v56@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v54@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v55@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v55@@ , @@a4@@ ) ; gen_helper_float_cvtw_d ( @@v54@@ , @@v55@@ ) ; tcg_temp_free_i64 ( @@v55@@ ) ; gen_store_fpr32 ( @@v54@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v54@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v53@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v53@@ , @@a4@@ ) ; gen_helper_float_cvtl_d ( @@v53@@ , @@v53@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v53@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v53@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : @@v136@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v137@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v136@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v137@@ , @@a3@@ ) ; gen_helper_float_add_s ( @@v136@@ , @@v136@@ , @@v137@@ ) ; tcg_temp_free_i32 ( @@v137@@ ) ; gen_store_fpr32 ( @@v136@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v136@@ ) ; break ; case Number : @@v134@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v135@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v134@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v135@@ , @@a3@@ ) ; gen_helper_float_sub_s ( @@v134@@ , @@v134@@ , @@v135@@ ) ; tcg_temp_free_i32 ( @@v135@@ ) ; gen_store_fpr32 ( @@v134@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v134@@ ) ; break ; case Number : @@v132@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v133@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v132@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v133@@ , @@a3@@ ) ; gen_helper_float_mul_s ( @@v132@@ , @@v132@@ , @@v133@@ ) ; tcg_temp_free_i32 ( @@v133@@ ) ; gen_store_fpr32 ( @@v132@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v132@@ ) ; break ; case Number : @@v130@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v131@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v130@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v131@@ , @@a3@@ ) ; gen_helper_float_div_s ( @@v130@@ , @@v130@@ , @@v131@@ ) ; tcg_temp_free_i32 ( @@v131@@ ) ; gen_store_fpr32 ( @@v130@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v130@@ ) ; break ; case Number : @@v129@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v129@@ , @@a4@@ ) ; gen_helper_float_sqrt_s ( @@v129@@ , @@v129@@ ) ; gen_store_fpr32 ( @@v129@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v129@@ ) ; break ; case Number : @@v128@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v128@@ , @@a4@@ ) ; gen_helper_float_abs_s ( @@v128@@ , @@v128@@ ) ; gen_store_fpr32 ( @@v128@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v128@@ ) ; break ; case Number : @@v127@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v127@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v127@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v127@@ ) ; break ; case Number : @@v126@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v126@@ , @@a4@@ ) ; gen_helper_float_chs_s ( @@v126@@ , @@v126@@ ) ; gen_store_fpr32 ( @@v126@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v126@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v124@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v125@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v124@@ , @@a4@@ ) ; gen_helper_float_roundl_s ( @@v125@@ , @@v124@@ ) ; tcg_temp_free_i32 ( @@v124@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v125@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v125@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v122@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v123@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v122@@ , @@a4@@ ) ; gen_helper_float_truncl_s ( @@v123@@ , @@v122@@ ) ; tcg_temp_free_i32 ( @@v122@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v123@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v123@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v120@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v121@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v120@@ , @@a4@@ ) ; gen_helper_float_ceill_s ( @@v121@@ , @@v120@@ ) ; tcg_temp_free_i32 ( @@v120@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v121@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v121@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v118@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v119@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v118@@ , @@a4@@ ) ; gen_helper_float_floorl_s ( @@v119@@ , @@v118@@ ) ; tcg_temp_free_i32 ( @@v118@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v119@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v119@@ ) ; break ; case Number : @@v117@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v117@@ , @@a4@@ ) ; gen_helper_float_roundw_s ( @@v117@@ , @@v117@@ ) ; gen_store_fpr32 ( @@v117@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v117@@ ) ; break ; case Number : @@v116@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v116@@ , @@a4@@ ) ; gen_helper_float_truncw_s ( @@v116@@ , @@v116@@ ) ; gen_store_fpr32 ( @@v116@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v116@@ ) ; break ; case Number : @@v115@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v115@@ , @@a4@@ ) ; gen_helper_float_ceilw_s ( @@v115@@ , @@v115@@ ) ; gen_store_fpr32 ( @@v115@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v115@@ ) ; break ; case Number : @@v114@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v114@@ , @@a4@@ ) ; gen_helper_float_floorw_s ( @@v114@@ , @@v114@@ ) ; gen_store_fpr32 ( @@v114@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v114@@ ) ; break ; case Number : gen_movcf_s ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v112@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v112@@ ) ; } @@v113@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v113@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v113@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v113@@ ) ; gen_set_label ( @@v112@@ ) ; break ; case Number : @@v110@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v110@@ ) ; @@v111@@ = tcg_temp_new_i32 ( Number L ) ; gen_load_fpr32 ( @@v111@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v111@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v111@@ ) ; gen_set_label ( @@v110@@ ) ; } break ; case Number : check_cop1x ( @@a1@@ ) ; @@v109@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v109@@ , @@a4@@ ) ; gen_helper_float_recip_s ( @@v109@@ , @@v109@@ ) ; gen_store_fpr32 ( @@v109@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v109@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v108@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v108@@ , @@a4@@ ) ; gen_helper_float_rsqrt_s ( @@v108@@ , @@v108@@ ) ; gen_store_fpr32 ( @@v108@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v108@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v106@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v107@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v106@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v107@@ , @@a5@@ ) ; gen_helper_float_recip2_s ( @@v106@@ , @@v106@@ , @@v107@@ ) ; tcg_temp_free_i32 ( @@v107@@ ) ; gen_store_fpr32 ( @@v106@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v106@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v105@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v105@@ , @@a4@@ ) ; gen_helper_float_recip1_s ( @@v105@@ , @@v105@@ ) ; gen_store_fpr32 ( @@v105@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v105@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v104@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v104@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_s ( @@v104@@ , @@v104@@ ) ; gen_store_fpr32 ( @@v104@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v104@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v102@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v103@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v102@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v103@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_s ( @@v102@@ , @@v102@@ , @@v103@@ ) ; tcg_temp_free_i32 ( @@v103@@ ) ; gen_store_fpr32 ( @@v102@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v102@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v100@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v101@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v100@@ , @@a4@@ ) ; gen_helper_float_cvtd_s ( @@v101@@ , @@v100@@ ) ; tcg_temp_free_i32 ( @@v100@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v101@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v101@@ ) ; break ; case Number : @@v99@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v99@@ , @@a4@@ ) ; gen_helper_float_cvtw_s ( @@v99@@ , @@v99@@ ) ; gen_store_fpr32 ( @@v99@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v99@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v97@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v98@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v97@@ , @@a4@@ ) ; gen_helper_float_cvtl_s ( @@v98@@ , @@v97@@ ) ; tcg_temp_free_i32 ( @@v97@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v98@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v98@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v94@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v95@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v96@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v95@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v96@@ , @@a3@@ ) ; tcg_gen_concat_i32_i64 ( @@v94@@ , @@v95@@ , @@v96@@ ) ; tcg_temp_free_i32 ( @@v96@@ ) ; tcg_temp_free_i32 ( @@v95@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v94@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v94@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } } return __readfsqword ( Number ) ^ @@v138@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": 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\"location\": \"s688\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s692\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s696\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s700\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s704\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s708\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s712\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s716\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s720\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s724\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s728\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s732\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s736\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s740\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s744\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s748\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s752\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s756\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s760\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s764\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s768\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s772\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s776\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s780\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s784\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s788\"}, {\"n\": \"v138\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s808\"}]}"
]
|
{"name": "decode_micromips32_opc", "code": "unsigned __int64 __fastcall decode_micromips32_opc ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , _DWORD * @@a4@@ ) { int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; int v10 ; int v11 ; int v12 ; unsigned int v13 ; unsigned int v14 ; __int16 @@v18@@ ; unsigned int @@v19@@ ; int @@v20@@ ; unsigned int @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; unsigned int v25 ; unsigned int v26 ; unsigned int v27 ; int v28 ; int v29 ; int v30 ; int v31 ; int v32 ; int v33 ; int v34 ; int v35 ; int v36 ; int v37 ; int v38 ; int v39 ; int v40 ; unsigned __int64 @@v41@@ ; @@v41@@ = __readfsqword ( Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = ( unsigned __int16 ) lduw_code ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) | ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) ; @@v20@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v21@@ = HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v22@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; @@v23@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v18@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; switch ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) { case Number : v25 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v25 > Number ) { if ( v25 != Number ) goto LABEL_257 ; gen_pool32axf ( @@a1@@ , @@a2@@ , @@v20@@ , @@v21@@ , @@a4@@ ) ; } else { switch ( v25 ) { case Number : v26 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v26 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } else { if ( v26 > Number ) goto LABEL_257 ; if ( v26 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } else if ( v26 ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } else { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_bitops ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v23@@ , @@v22@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_slt ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_slt ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; default : goto LABEL_257 ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v27 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v27 == Number ) { gen_ldxs ( @@a2@@ , @@v21@@ , @@v20@@ , @@v22@@ ) ; } else { if ( v27 > Number ) goto LABEL_257 ; if ( v27 ) { if ( v27 != Number ) goto LABEL_257 ; gen_cond_move ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; } else { gen_cond_move ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; } } break ; case Number : gen_bitops ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v23@@ , @@v22@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; default : goto LABEL_257 ; } } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : v28 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : case Number : goto LABEL_48 ; case Number : case Number : case Number : case Number : gen_ldst_pair ( @@a2@@ , v28 , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : case Number : case Number : case Number : gen_ldst_multiple ( @@a2@@ , v28 , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : return __readfsqword ( Number ) ^ @@v41@@ ; default : goto LABEL_257 ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : v30 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; switch ( v30 ) { case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : case Number : if ( v30 == Number ) v13 = Number ; else v13 = Number ; gen_compute_branch ( @@a2@@ , v13 , Number , @@v21@@ , Number , Number * @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; LABEL_183 : * @@a4@@ = Number ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : case Number : LABEL_48 : generate_exception_err ( @@a2@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) v14 = Number ; else v14 = Number ; goto LABEL_199 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) v14 = Number ; else v14 = Number ; LABEL_199 : gen_compute_branch1 ( @@a1@@ , @@a2@@ , v14 , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number * @@v18@@ ) ; goto LABEL_206 ; case Number : @@v19@@ = Number ; goto LABEL_205 ; case Number : @@v19@@ = Number ; LABEL_205 : check_cop1x ( @@a2@@ ) ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_compute_branch1 ( @@a1@@ , @@a2@@ , @@v19@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number * @@v18@@ ) ; LABEL_206 : * @@a4@@ = Number ; break ; default : goto LABEL_257 ; } break ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { v29 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; check_cp1_enabled ( @@a2@@ ) ; switch ( v29 ) { case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; default : goto LABEL_257 ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; default : goto LABEL_257 ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v38 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v4 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v4 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else if ( v4 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else if ( v4 ) { if ( v4 != Number ) goto LABEL_257 ; if ( v38 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v38 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else if ( v38 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v38 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v31 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v33 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; v36 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v36 == Number ) { gen_cmpabs_ps ( @@a2@@ , v31 , @@v20@@ , @@v21@@ , v33 ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v36 ) gen_cmpabs_d ( @@a2@@ , v31 , @@v20@@ , @@v21@@ , v33 ) ; else gen_cmpabs_s ( @@a2@@ , v31 , @@v20@@ , @@v21@@ , v33 ) ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v35 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; v39 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v5 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v5 == Number ) return __readfsqword ( Number ) ^ @@v41@@ ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v5 ) { if ( v5 != Number ) goto LABEL_257 ; if ( v39 == Number ) { gen_movcf_ps ( @@v21@@ , @@v20@@ , v35 , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v39 ) gen_movcf_d ( @@a2@@ , @@v21@@ , @@v20@@ , v35 , Number ) ; else gen_movcf_s ( @@v21@@ , @@v20@@ , v35 , Number ) ; } } else if ( v39 == Number ) { gen_movcf_ps ( @@v21@@ , @@v20@@ , v35 , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v39 ) gen_movcf_d ( @@a2@@ , @@v21@@ , @@v20@@ , v35 , Number ) ; else gen_movcf_s ( @@v21@@ , @@v20@@ , v35 , Number ) ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v6 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v6 != Number ) { if ( v6 == Number ) { v9 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v9 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v9 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else if ( v6 ) { v8 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v8 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v8 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else { v7 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v7 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v7 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } return __readfsqword ( Number ) ^ @@v41@@ ; } v40 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v40 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; } if ( ! v40 ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; } goto LABEL_257 ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v10 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v10 ) { if ( v10 != Number ) goto LABEL_257 ; v12 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v12 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v12 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else { v11 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v11 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v11 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_pool32fxf ( @@a1@@ , @@a2@@ , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v32 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v34 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; v37 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v37 == Number ) { gen_cmp_ps ( @@a2@@ , v32 , @@v20@@ , @@v21@@ , v34 ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v37 ) gen_cmp_d ( @@a2@@ , v32 , @@v20@@ , @@v21@@ , v34 ) ; else gen_cmp_s ( @@a2@@ , v32 , @@v20@@ , @@v21@@ , v34 ) ; } break ; default : goto LABEL_257 ; } } else { generate_exception_err ( @@a2@@ , Number , Number ) ; } break ; case Number : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; default : goto LABEL_257 ; } break ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : @@v24@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_addiupc ( @@a2@@ , @@v24@@ , Number * ( ( int ) ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) , Number , Number ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , Number * @@v18@@ ) ; * @@a4@@ = Number ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , Number * @@v18@@ ) ; * @@a4@@ = Number ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; default : LABEL_257 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v41@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 3, "t": "_DWORD"}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v24", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v23", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v22", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v18", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "s62"}, {"n": "v41", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "insn_hw1", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "r16"}, {"n": "is_branch", "t": {"T": 3, "t": "int"}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "rr", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s44"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "rs", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s52"}, {"n": "rt", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s56"}, {"n": "", "t": {"T": 10}, "location": "s60"}, {"n": "imm", "t": {"T": 1, "n": "int16_t", "s": 2}, "location": "s62"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 565 | [
"{\"name\": \"lduw_code\", \"code\": \"__int64 __fastcall lduw_code ( unsigned __int64 @@a1@@ ) { unsigned int @@v2@@ ; unsigned int @@v3@@ ; @@v3@@ = cpu_mmu_index ( cpu_single_env ) ; if ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env ) == ( @@a1@@ & Number ) ) @@v2@@ = lduw_le_p ( ( unsigned __int16 * ) ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env + Number ) + @@a1@@ ) ) ; else @@v2@@ = ( unsigned __int16 ) _ldw_cmmu ( @@a1@@ , @@v3@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}]}",
"{\"name\": \"generate_exception_err\", \"code\": \"unsigned __int64 __fastcall generate_exception_err ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_const_i32 ( @@a2@@ ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; save_cpu_state ( @@a1@@ , Number ) ; gen_helper_raise_exception_err ( @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_enabled\", \"code\": \"unsigned __int64 __fastcall check_cp1_enabled ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception_err ( @@a1@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cop1x\", \"code\": \"unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cmp_d\", \"code\": \"unsigned __int64 __fastcall gen_cmp_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_registers ( @@a1@@ , @@a3@@ | @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_d_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmpabs_d\", \"code\": \"unsigned __int64 __fastcall gen_cmpabs_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a3@@ | @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_d_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmp_s\", \"code\": \"unsigned __int64 __fastcall gen_cmp_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; gen_load_fpr32 ( @@v9@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_s_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmpabs_s\", \"code\": \"unsigned __int64 __fastcall gen_cmpabs_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; check_cop1x ( @@a1@@ ) ; gen_load_fpr32 ( @@v9@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_s_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmp_ps\", \"code\": \"unsigned __int64 __fastcall gen_cmp_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_64bitmode ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmp_ps_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cmpabs_ps\", \"code\": \"unsigned __int64 __fastcall gen_cmpabs_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; check_cp1_64bitmode ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v9@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v10@@ , @@a3@@ ) ; switch ( @@a2@@ ) { case Number : @@v26@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_f ( @@v9@@ , @@v10@@ , @@v26@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; break ; case Number : @@v25@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_un ( @@v9@@ , @@v10@@ , @@v25@@ ) ; tcg_temp_free_i32 ( @@v25@@ ) ; break ; case Number : @@v24@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_eq ( @@v9@@ , @@v10@@ , @@v24@@ ) ; tcg_temp_free_i32 ( @@v24@@ ) ; break ; case Number : @@v23@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ueq ( @@v9@@ , @@v10@@ , @@v23@@ ) ; tcg_temp_free_i32 ( @@v23@@ ) ; break ; case Number : @@v22@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_olt ( @@v9@@ , @@v10@@ , @@v22@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : @@v21@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ult ( @@v9@@ , @@v10@@ , @@v21@@ ) ; tcg_temp_free_i32 ( @@v21@@ ) ; break ; case Number : @@v20@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ole ( @@v9@@ , @@v10@@ , @@v20@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : @@v19@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ule ( @@v9@@ , @@v10@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : @@v18@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_sf ( @@v9@@ , @@v10@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : @@v17@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngle ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : @@v16@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_seq ( @@v9@@ , @@v10@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; break ; case Number : @@v15@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngl ( @@v9@@ , @@v10@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : @@v14@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_lt ( @@v9@@ , @@v10@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; break ; case Number : @@v13@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_nge ( @@v9@@ , @@v10@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : @@v12@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_le ( @@v9@@ , @@v10@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; break ; case Number : @@v11@@ = tcg_const_i32 ( @@a5@@ ) ; gen_helper_cmpabs_ps_ngt ( @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; break ; default : abort ( ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st_cond\", \"code\": \"unsigned __int64 __fastcall gen_st_cond ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_local_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; @@v10@@ = tcg_temp_local_new_i64 ( ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sc ( @@v10@@ , @@v9@@ , @@a3@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_scd ( @@v10@@ , @@v9@@ , @@a3@@ , @@a1@@ ) ; } tcg_temp_free_i64 ( @@v10@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cop1_ldst\", \"code\": \"unsigned __int64 __fastcall gen_cop1_ldst ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { check_cp1_enabled ( @@a2@@ ) ; gen_flt_ldst ( @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; } else { generate_exception_err ( @@a2@@ , Number , Number ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_logic_imm\", \"code\": \"unsigned __int64 __fastcall gen_logic_imm ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned __int16 @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , ( __int16 ) @@a5@@ << Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ ) { tcg_gen_xori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } goto LABEL_14 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ ) { tcg_gen_ori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_14 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ ) tcg_gen_andi_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; } } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt_imm\", \"code\": \"unsigned __int64 __fastcall gen_slt_imm ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v8@@ ; __int64 @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ = @@a5@@ ; if ( @@a3@@ ) { @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } tcg_temp_free_i64 ( @@v8@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift_imm\", \"code\": \"unsigned __int64 __fastcall gen_shift_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , char @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; __int64 @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v12@@ = @@a6@@ & Number ; if ( @@a4@@ ) { @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; else tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) { @@v11@@ = tcg_temp_new_i32 ( @@v10@@ ) ; tcg_gen_trunc_i64_i32 ( @@v11@@ , @@v10@@ ) ; tcg_gen_rotri_i32 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else { LABEL_14 : tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } } } else { switch ( @@a3@@ ) { case Number : tcg_gen_shli_i64 ( @@v10@@ , @@v10@@ , @@v12@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; break ; case Number : if ( ! @@v12@@ ) goto LABEL_14 ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; default : break ; } } } } tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cond_move\", \"code\": \"unsigned __int64 __fastcall gen_cond_move ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = gen_new_label ( @@a1@@ ) ; if ( @@a2@@ == Number ) { if ( @@a5@@ ) tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a5@@ ] , Number L , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { if ( @@a5@@ ) tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a5@@ ] , Number L , @@v9@@ ) ; else tcg_gen_br ( @@v9@@ ) ; } if ( @@a4@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; gen_set_label ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_logic\", \"code\": \"unsigned __int64 __fastcall gen_logic ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_nor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else if ( @@a4@@ || ! @@a5@@ ) { if ( ! @@a4@@ || @@a5@@ ) tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number ) ; else tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_xor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) goto LABEL_27 ; if ( @@a4@@ && ! @@a5@@ ) goto LABEL_30 ; goto LABEL_39 ; } if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ && @@a5@@ ) { tcg_gen_or_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) { LABEL_27 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ && ! @@a5@@ ) { LABEL_30 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_39 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ || ! @@a5@@ ) goto LABEL_39 ; tcg_gen_and_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt\", \"code\": \"unsigned __int64 __fastcall gen_slt ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift\", \"code\": \"unsigned __int64 __fastcall gen_shift ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_rotr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@v12@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@v12@@ ) ; tcg_gen_trunc_i64_i32 ( @@v13@@ , @@v11@@ ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v12@@ ) ; tcg_gen_andi_i32 ( @@v13@@ , @@v13@@ , Number ) ; tcg_gen_rotr_i32 ( @@v13@@ , @@v14@@ , @@v13@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_ext32u_i64 ( @@v12@@ , @@v12@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; default : break ; } } } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_trap\", \"code\": \"unsigned __int64 __fastcall gen_trap ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { __int64 @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned __int64 @@v14@@ ; @@v9@@ = @@a1@@ ; @@v14@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = Number ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) { LABEL_20 : if ( @@a3@@ || @@a5@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; tcg_gen_movi_i64 ( @@v12@@ , @@a5@@ ) ; @@v10@@ = Number ; } } else { if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_22 ; } else if ( @@a2@@ < Number ) { goto LABEL_22 ; } if ( @@a3@@ != @@a4@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; gen_load_gpr ( @@v12@@ , @@a4@@ ) ; @@v10@@ = Number ; } } LABEL_22 : if ( @@v10@@ ) { @@v13@@ = gen_new_label ( @@a1@@ ) ; if ( @@a2@@ == Number ) { LABEL_64 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_59 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_63 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_62 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_61 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) LABEL_60 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case String : goto LABEL_60 ; case String : goto LABEL_61 ; case String : goto LABEL_62 ; case String : goto LABEL_63 ; case String : goto LABEL_59 ; case String : goto LABEL_64 ; default : break ; } } } } } } } generate_exception ( @@v9@@ , Number ) ; gen_set_label ( @@v13@@ ) ; } else if ( @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ <= Number && @@a2@@ >= Number ) ) ) ) ) { generate_exception ( @@v9@@ , Number ) ; } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; return __readfsqword ( Number ) ^ @@v14@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_bitops\", \"code\": \"unsigned __int64 __fastcall gen_bitops ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { int v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; __int64 v15 ; __int64 v16 ; __int64 v17 ; __int64 v18 ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; switch ( @@a2@@ ) { case Number : if ( @@a5@@ + @@a6@@ > Number ) goto LABEL_24 ; tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; if ( @@a6@@ == Number ) tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; else tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number << ( @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; if ( @@a6@@ != Number ) tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ + Number ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; if ( @@a6@@ - @@a5@@ > Number ) v6 = Number ; else v6 = ( Number << ( @@a6@@ - @@a5@@ + Number ) ) - Number ; v15 = v6 << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v15 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v15 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; if ( @@a6@@ - @@a5@@ > Number ) v7 = Number ; else v7 = ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ; v16 = v7 << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v16 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v16 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; v17 = ( ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ) << ( ( unsigned __int8 ) @@a5@@ + Number ) ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v17 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ + Number ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v17 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; v18 = ( ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ) << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v18 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v18 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; LABEL_25 : gen_store_gpr ( @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; default : LABEL_24 : generate_exception ( @@a1@@ , Number ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch1\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch1 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; unsigned int v16 ; unsigned int v17 ; unsigned int v18 ; unsigned int v19 ; unsigned int v20 ; unsigned int v21 ; int v22 ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; __int64 @@v32@@ ; unsigned __int64 @@v33@@ ; @@v33@@ = __readfsqword ( Number ) ; @@v27@@ = tcg_temp_new_i32 ( @@a1@@ ) ; if ( @@a4@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v32@@ = * ( _QWORD * ) ( @@a2@@ + Number ) + @@a5@@ + Number L ; if ( @@a3@@ == Number ) { @@v28@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v18 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v18 ) ; v19 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v19 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; v20 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v20 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; v21 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v21 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v29@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v14 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v14 ) ; v15 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v15 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; v16 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v16 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; v17 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v17 ) ; tcg_gen_nor_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; tcg_temp_free_i32 ( @@v29@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v30@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v12 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v12 ) ; v13 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v30@@ , fpu_fcr31 , v13 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v30@@ ) ; tcg_temp_free_i32 ( @@v30@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v31@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v10 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v10 ) ; v11 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v31@@ , fpu_fcr31 , v11 ) ; tcg_gen_nor_i32 ( @@v27@@ , @@v27@@ , @@v31@@ ) ; tcg_temp_free_i32 ( @@v31@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; LABEL_27 : v22 = * ( _DWORD * ) ( @@a2@@ + Number ) ; BYTE1 ( v22 ) |= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = v22 ; goto LABEL_29 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { v8 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v8 ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_22 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { v6 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v6 ) ; tcg_gen_not_i32 ( @@v27@@ , @@v27@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; LABEL_22 : v9 = * ( _DWORD * ) ( @@a2@@ + Number ) ; BYTE1 ( v9 ) |= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = v9 ; LABEL_29 : * ( _QWORD * ) ( @@a2@@ + Number ) = @@v32@@ ; goto LABEL_30 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { v5 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v5 ) ; tcg_gen_not_i32 ( @@v27@@ , @@v27@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; } else { if ( @@a3@@ != Number ) goto LABEL_28 ; v7 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v7 ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; } goto LABEL_27 ; } LABEL_28 : generate_exception ( @@a2@@ , Number ) ; LABEL_30 : tcg_temp_free_i32 ( @@v27@@ ) ; return __readfsqword ( Number ) ^ @@v33@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movcf_s\", \"code\": \"unsigned __int64 __fastcall gen_movcf_s ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { char @@v4@@ ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v8@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v9@@ = gen_new_label ( @@a1@@ ) ; @@v4@@ = get_fp_bit ( @@a3@@ ) ; tcg_gen_andi_i32 ( @@v8@@ , fpu_fcr31 , Number << @@v4@@ ) ; tcg_gen_brcondi_i32 ( @@a4@@ == Number , @@v8@@ , Number , @@v9@@ ) ; gen_load_fpr32 ( @@v8@@ , @@a1@@ ) ; gen_store_fpr32 ( @@v8@@ , @@a2@@ ) ; gen_set_label ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movcf_d\", \"code\": \"unsigned __int64 __fastcall gen_movcf_d ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { char @@v5@@ ; unsigned int @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v10@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v11@@ = gen_new_label ( @@a1@@ ) ; @@v5@@ = get_fp_bit ( @@a4@@ ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << @@v5@@ ) ; tcg_gen_brcondi_i32 ( @@a5@@ == Number , @@v10@@ , Number , @@v11@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@v10@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a2@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v12@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; gen_set_label ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r8\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movcf_ps\", \"code\": \"unsigned __int64 __fastcall gen_movcf_ps ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { char v4 ; char v5 ; _BOOL4 @@v9@@ ; unsigned int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v10@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v11@@ = gen_new_label ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; @@v9@@ = @@a4@@ == Number ; v4 = get_fp_bit ( @@a3@@ ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << v4 ) ; tcg_gen_brcondi_i32 ( @@v9@@ , @@v10@@ , Number , @@v11@@ ) ; gen_load_fpr32 ( @@v10@@ , @@a1@@ ) ; gen_store_fpr32 ( @@v10@@ , @@a2@@ ) ; gen_set_label ( @@v11@@ ) ; v5 = get_fp_bit ( @@a3@@ + Number ) ; tcg_gen_andi_i32 ( @@v10@@ , fpu_fcr31 , Number << v5 ) ; tcg_gen_brcondi_i32 ( @@v9@@ , @@v10@@ , Number , @@v12@@ ) ; gen_load_fpr32h ( @@v10@@ , @@a1@@ ) ; gen_store_fpr32h ( @@v10@@ , @@a2@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; gen_set_label ( @@v12@@ ) ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"_BOOL4\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_farith\", \"code\": \"unsigned __int64 __fastcall gen_farith ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , unsigned int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { __int64 @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; unsigned int @@v32@@ ; int @@v33@@ ; unsigned int @@v34@@ ; int @@v35@@ ; unsigned int @@v36@@ ; unsigned int @@v37@@ ; unsigned int @@v38@@ ; unsigned int @@v39@@ ; unsigned int @@v40@@ ; unsigned int @@v41@@ ; unsigned int @@v42@@ ; unsigned int @@v43@@ ; unsigned int @@v44@@ ; unsigned int @@v45@@ ; unsigned int @@v46@@ ; unsigned int @@v47@@ ; unsigned int @@v48@@ ; unsigned int @@v49@@ ; unsigned int @@v50@@ ; unsigned int @@v51@@ ; unsigned int @@v52@@ ; unsigned int @@v53@@ ; unsigned int @@v54@@ ; unsigned int @@v55@@ ; unsigned int @@v56@@ ; unsigned int @@v57@@ ; unsigned int @@v58@@ ; unsigned int @@v59@@ ; unsigned int @@v60@@ ; unsigned int @@v61@@ ; unsigned int @@v62@@ ; unsigned int @@v63@@ ; unsigned int @@v64@@ ; unsigned int @@v65@@ ; int @@v66@@ ; unsigned int @@v67@@ ; int @@v68@@ ; unsigned int @@v69@@ ; unsigned int @@v70@@ ; unsigned int @@v71@@ ; unsigned int @@v72@@ ; unsigned int @@v73@@ ; unsigned int @@v74@@ ; unsigned int @@v75@@ ; unsigned int @@v76@@ ; unsigned int @@v77@@ ; unsigned int @@v78@@ ; unsigned int @@v79@@ ; unsigned int @@v80@@ ; unsigned int @@v81@@ ; unsigned int @@v82@@ ; unsigned int @@v83@@ ; unsigned int @@v84@@ ; unsigned int @@v85@@ ; unsigned int @@v86@@ ; unsigned int @@v87@@ ; unsigned int @@v88@@ ; unsigned int @@v89@@ ; unsigned int @@v90@@ ; unsigned int @@v91@@ ; unsigned int @@v92@@ ; unsigned int @@v93@@ ; unsigned int @@v94@@ ; unsigned int @@v95@@ ; unsigned int @@v96@@ ; unsigned int @@v97@@ ; unsigned int @@v98@@ ; unsigned int @@v99@@ ; unsigned int @@v100@@ ; unsigned int @@v101@@ ; unsigned int @@v102@@ ; unsigned int @@v103@@ ; unsigned int @@v104@@ ; unsigned int @@v105@@ ; unsigned int @@v106@@ ; unsigned int @@v107@@ ; unsigned int @@v108@@ ; unsigned int @@v109@@ ; int @@v110@@ ; unsigned int @@v111@@ ; int @@v112@@ ; unsigned int @@v113@@ ; unsigned int @@v114@@ ; unsigned int @@v115@@ ; unsigned int @@v116@@ ; unsigned int @@v117@@ ; unsigned int @@v118@@ ; unsigned int @@v119@@ ; unsigned int @@v120@@ ; unsigned int @@v121@@ ; unsigned int @@v122@@ ; unsigned int @@v123@@ ; unsigned int @@v124@@ ; unsigned int @@v125@@ ; unsigned int @@v126@@ ; unsigned int @@v127@@ ; unsigned int @@v128@@ ; unsigned int @@v129@@ ; unsigned int @@v130@@ ; unsigned int @@v131@@ ; unsigned int @@v132@@ ; unsigned int @@v133@@ ; unsigned int @@v134@@ ; unsigned int @@v135@@ ; unsigned int @@v136@@ ; unsigned int @@v137@@ ; unsigned __int64 @@v138@@ ; @@v10@@ = @@a1@@ ; @@v138@@ = __readfsqword ( Number ) ; @@v11@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v44@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v45@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v44@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v45@@ , @@a3@@ ) ; gen_helper_float_add_ps ( @@v44@@ , @@v44@@ , @@v45@@ ) ; tcg_temp_free_i64 ( @@v45@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v44@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v44@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v42@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v43@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v42@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v43@@ , @@a3@@ ) ; gen_helper_float_sub_ps ( @@v42@@ , @@v42@@ , @@v43@@ ) ; tcg_temp_free_i64 ( @@v43@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v42@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v42@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v40@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v41@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v40@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v41@@ , @@a3@@ ) ; gen_helper_float_mul_ps ( @@v40@@ , @@v40@@ , @@v41@@ ) ; tcg_temp_free_i64 ( @@v41@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v40@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v40@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v39@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v39@@ , @@a4@@ ) ; gen_helper_float_abs_ps ( @@v39@@ , @@v39@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v39@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v39@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v38@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v38@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v38@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v38@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v37@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v37@@ , @@a4@@ ) ; gen_helper_float_chs_ps ( @@v37@@ , @@v37@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v37@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v37@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; gen_movcf_ps ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v35@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v35@@ ) ; } @@v36@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v36@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v36@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v36@@ ) ; gen_set_label ( @@v35@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v33@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v33@@ ) ; @@v34@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v34@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v34@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v34@@ ) ; gen_set_label ( @@v33@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v31@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v31@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v32@@ , @@a4@@ ) ; gen_helper_float_addr_ps ( @@v31@@ , @@v31@@ , @@v32@@ ) ; tcg_temp_free_i64 ( @@v32@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v31@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v31@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v29@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v30@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v29@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v30@@ , @@a4@@ ) ; gen_helper_float_mulr_ps ( @@v29@@ , @@v29@@ , @@v30@@ ) ; tcg_temp_free_i64 ( @@v30@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v29@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v29@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v27@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v28@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v27@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v28@@ , @@a5@@ ) ; gen_helper_float_recip2_ps ( @@v27@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i64 ( @@v28@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v27@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v27@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v26@@ , @@a4@@ ) ; gen_helper_float_recip1_ps ( @@v26@@ , @@v26@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v26@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v25@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_ps ( @@v25@@ , @@v25@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v25@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v23@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v24@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_ps ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v23@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v22@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v22@@ , @@a4@@ ) ; gen_helper_float_cvts_pu ( @@v22@@ , @@v22@@ ) ; gen_store_fpr32 ( @@v22@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v21@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v21@@ , @@a4@@ ) ; gen_helper_float_cvtpw_ps ( @@v21@@ , @@v21@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v21@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v20@@ , @@a4@@ ) ; gen_helper_float_cvts_pl ( @@v20@@ , @@v20@@ ) ; gen_store_fpr32 ( @@v20@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v18@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v19@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v18@@ , @@a5@@ ) ; gen_store_fpr32 ( @@v19@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v17@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v16@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v17@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v17@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v16@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v14@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v15@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v15@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v14@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v13@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v12@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v13@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v13@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v12@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v46@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v46@@ , @@a4@@ ) ; gen_helper_float_cvtd_l ( @@v46@@ , @@v46@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v46@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v46@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v47@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v48@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v48@@ , @@a4@@ ) ; gen_helper_float_cvts_l ( @@v47@@ , @@v48@@ ) ; tcg_temp_free_i64 ( @@v48@@ ) ; gen_store_fpr32 ( @@v47@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v47@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v49@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v49@@ , @@a4@@ ) ; gen_helper_float_cvtps_pw ( @@v49@@ , @@v49@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v49@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v49@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v50@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v51@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v50@@ , @@a4@@ ) ; gen_helper_float_cvtd_w ( @@v51@@ , @@v50@@ ) ; tcg_temp_free_i32 ( @@v50@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v51@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v51@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) { LABEL_125 : generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { @@v52@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v52@@ , @@a4@@ ) ; gen_helper_float_cvts_w ( @@v52@@ , @@v52@@ ) ; gen_store_fpr32 ( @@v52@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v52@@ ) ; } else if ( @@a2@@ > Number ) { if ( @@a2@@ > Number || @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v92@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v93@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v92@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v93@@ , @@a3@@ ) ; gen_helper_float_add_d ( @@v92@@ , @@v92@@ , @@v93@@ ) ; tcg_temp_free_i64 ( @@v93@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v92@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v92@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v90@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v91@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v90@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v91@@ , @@a3@@ ) ; gen_helper_float_sub_d ( @@v90@@ , @@v90@@ , @@v91@@ ) ; tcg_temp_free_i64 ( @@v91@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v90@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v90@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v88@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v89@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v88@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v89@@ , @@a3@@ ) ; gen_helper_float_mul_d ( @@v88@@ , @@v88@@ , @@v89@@ ) ; tcg_temp_free_i64 ( @@v89@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v88@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v88@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v86@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v87@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v86@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v87@@ , @@a3@@ ) ; gen_helper_float_div_d ( @@v86@@ , @@v86@@ , @@v87@@ ) ; tcg_temp_free_i64 ( @@v87@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v86@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v86@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v85@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v85@@ , @@a4@@ ) ; gen_helper_float_sqrt_d ( @@v85@@ , @@v85@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v85@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v85@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v84@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v84@@ , @@a4@@ ) ; gen_helper_float_abs_d ( @@v84@@ , @@v84@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v84@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v84@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v83@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v83@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v83@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v83@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v82@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v82@@ , @@a4@@ ) ; gen_helper_float_chs_d ( @@v82@@ , @@v82@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v82@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v82@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v81@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v81@@ , @@a4@@ ) ; gen_helper_float_roundl_d ( @@v81@@ , @@v81@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v81@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v81@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v80@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v80@@ , @@a4@@ ) ; gen_helper_float_truncl_d ( @@v80@@ , @@v80@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v80@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v80@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v79@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v79@@ , @@a4@@ ) ; gen_helper_float_ceill_d ( @@v79@@ , @@v79@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v79@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v79@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v78@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v78@@ , @@a4@@ ) ; gen_helper_float_floorl_d ( @@v78@@ , @@v78@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v78@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v78@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v76@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v77@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v77@@ , @@a4@@ ) ; gen_helper_float_roundw_d ( @@v76@@ , @@v77@@ ) ; tcg_temp_free_i64 ( @@v77@@ ) ; gen_store_fpr32 ( @@v76@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v76@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v74@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v75@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v75@@ , @@a4@@ ) ; gen_helper_float_truncw_d ( @@v74@@ , @@v75@@ ) ; tcg_temp_free_i64 ( @@v75@@ ) ; gen_store_fpr32 ( @@v74@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v74@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v72@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v73@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v73@@ , @@a4@@ ) ; gen_helper_float_ceilw_d ( @@v72@@ , @@v73@@ ) ; tcg_temp_free_i64 ( @@v73@@ ) ; gen_store_fpr32 ( @@v72@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v72@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v70@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v71@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v71@@ , @@a4@@ ) ; gen_helper_float_floorw_d ( @@v70@@ , @@v71@@ ) ; tcg_temp_free_i64 ( @@v71@@ ) ; gen_store_fpr32 ( @@v70@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v70@@ ) ; break ; case Number : gen_movcf_d ( @@a1@@ , @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v68@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v68@@ ) ; } @@v69@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v69@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v69@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v69@@ ) ; gen_set_label ( @@v68@@ ) ; break ; case Number : @@v66@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v66@@ ) ; @@v67@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v67@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v67@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v67@@ ) ; gen_set_label ( @@v66@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v65@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v65@@ , @@a4@@ ) ; gen_helper_float_recip_d ( @@v65@@ , @@v65@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v65@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v65@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v64@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v64@@ , @@a4@@ ) ; gen_helper_float_rsqrt_d ( @@v64@@ , @@v64@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v64@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v64@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v62@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v63@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v62@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v63@@ , @@a3@@ ) ; gen_helper_float_recip2_d ( @@v62@@ , @@v62@@ , @@v63@@ ) ; tcg_temp_free_i64 ( @@v63@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v62@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v62@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v61@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v61@@ , @@a4@@ ) ; gen_helper_float_recip1_d ( @@v61@@ , @@v61@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v61@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v61@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v60@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v60@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_d ( @@v60@@ , @@v60@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v60@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v60@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v58@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v59@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v58@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v59@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_d ( @@v58@@ , @@v58@@ , @@v59@@ ) ; tcg_temp_free_i64 ( @@v59@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v58@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v58@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v56@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v57@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v57@@ , @@a4@@ ) ; gen_helper_float_cvts_d ( @@v56@@ , @@v57@@ ) ; tcg_temp_free_i64 ( @@v57@@ ) ; gen_store_fpr32 ( @@v56@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v56@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v54@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v55@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v55@@ , @@a4@@ ) ; gen_helper_float_cvtw_d ( @@v54@@ , @@v55@@ ) ; tcg_temp_free_i64 ( @@v55@@ ) ; gen_store_fpr32 ( @@v54@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v54@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v53@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v53@@ , @@a4@@ ) ; gen_helper_float_cvtl_d ( @@v53@@ , @@v53@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v53@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v53@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : @@v136@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v137@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v136@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v137@@ , @@a3@@ ) ; gen_helper_float_add_s ( @@v136@@ , @@v136@@ , @@v137@@ ) ; tcg_temp_free_i32 ( @@v137@@ ) ; gen_store_fpr32 ( @@v136@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v136@@ ) ; break ; case Number : @@v134@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v135@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v134@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v135@@ , @@a3@@ ) ; gen_helper_float_sub_s ( @@v134@@ , @@v134@@ , @@v135@@ ) ; tcg_temp_free_i32 ( @@v135@@ ) ; gen_store_fpr32 ( @@v134@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v134@@ ) ; break ; case Number : @@v132@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v133@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v132@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v133@@ , @@a3@@ ) ; gen_helper_float_mul_s ( @@v132@@ , @@v132@@ , @@v133@@ ) ; tcg_temp_free_i32 ( @@v133@@ ) ; gen_store_fpr32 ( @@v132@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v132@@ ) ; break ; case Number : @@v130@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v131@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v130@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v131@@ , @@a3@@ ) ; gen_helper_float_div_s ( @@v130@@ , @@v130@@ , @@v131@@ ) ; tcg_temp_free_i32 ( @@v131@@ ) ; gen_store_fpr32 ( @@v130@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v130@@ ) ; break ; case Number : @@v129@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v129@@ , @@a4@@ ) ; gen_helper_float_sqrt_s ( @@v129@@ , @@v129@@ ) ; gen_store_fpr32 ( @@v129@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v129@@ ) ; break ; case Number : @@v128@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v128@@ , @@a4@@ ) ; gen_helper_float_abs_s ( @@v128@@ , @@v128@@ ) ; gen_store_fpr32 ( @@v128@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v128@@ ) ; break ; case Number : @@v127@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v127@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v127@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v127@@ ) ; break ; case Number : @@v126@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v126@@ , @@a4@@ ) ; gen_helper_float_chs_s ( @@v126@@ , @@v126@@ ) ; gen_store_fpr32 ( @@v126@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v126@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v124@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v125@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v124@@ , @@a4@@ ) ; gen_helper_float_roundl_s ( @@v125@@ , @@v124@@ ) ; tcg_temp_free_i32 ( @@v124@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v125@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v125@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v122@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v123@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v122@@ , @@a4@@ ) ; gen_helper_float_truncl_s ( @@v123@@ , @@v122@@ ) ; tcg_temp_free_i32 ( @@v122@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v123@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v123@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v120@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v121@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v120@@ , @@a4@@ ) ; gen_helper_float_ceill_s ( @@v121@@ , @@v120@@ ) ; tcg_temp_free_i32 ( @@v120@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v121@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v121@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v118@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v119@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v118@@ , @@a4@@ ) ; gen_helper_float_floorl_s ( @@v119@@ , @@v118@@ ) ; tcg_temp_free_i32 ( @@v118@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v119@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v119@@ ) ; break ; case Number : @@v117@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v117@@ , @@a4@@ ) ; gen_helper_float_roundw_s ( @@v117@@ , @@v117@@ ) ; gen_store_fpr32 ( @@v117@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v117@@ ) ; break ; case Number : @@v116@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v116@@ , @@a4@@ ) ; gen_helper_float_truncw_s ( @@v116@@ , @@v116@@ ) ; gen_store_fpr32 ( @@v116@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v116@@ ) ; break ; case Number : @@v115@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v115@@ , @@a4@@ ) ; gen_helper_float_ceilw_s ( @@v115@@ , @@v115@@ ) ; gen_store_fpr32 ( @@v115@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v115@@ ) ; break ; case Number : @@v114@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v114@@ , @@a4@@ ) ; gen_helper_float_floorw_s ( @@v114@@ , @@v114@@ ) ; gen_store_fpr32 ( @@v114@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v114@@ ) ; break ; case Number : gen_movcf_s ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v112@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v112@@ ) ; } @@v113@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v113@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v113@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v113@@ ) ; gen_set_label ( @@v112@@ ) ; break ; case Number : @@v110@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v110@@ ) ; @@v111@@ = tcg_temp_new_i32 ( Number L ) ; gen_load_fpr32 ( @@v111@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v111@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v111@@ ) ; gen_set_label ( @@v110@@ ) ; } break ; case Number : check_cop1x ( @@a1@@ ) ; @@v109@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v109@@ , @@a4@@ ) ; gen_helper_float_recip_s ( @@v109@@ , @@v109@@ ) ; gen_store_fpr32 ( @@v109@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v109@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v108@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v108@@ , @@a4@@ ) ; gen_helper_float_rsqrt_s ( @@v108@@ , @@v108@@ ) ; gen_store_fpr32 ( @@v108@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v108@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v106@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v107@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v106@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v107@@ , @@a5@@ ) ; gen_helper_float_recip2_s ( @@v106@@ , @@v106@@ , @@v107@@ ) ; tcg_temp_free_i32 ( @@v107@@ ) ; gen_store_fpr32 ( @@v106@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v106@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v105@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v105@@ , @@a4@@ ) ; gen_helper_float_recip1_s ( @@v105@@ , @@v105@@ ) ; gen_store_fpr32 ( @@v105@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v105@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v104@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v104@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_s ( @@v104@@ , @@v104@@ ) ; gen_store_fpr32 ( @@v104@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v104@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v102@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v103@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v102@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v103@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_s ( @@v102@@ , @@v102@@ , @@v103@@ ) ; tcg_temp_free_i32 ( @@v103@@ ) ; gen_store_fpr32 ( @@v102@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v102@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v100@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v101@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v100@@ , @@a4@@ ) ; gen_helper_float_cvtd_s ( @@v101@@ , @@v100@@ ) ; tcg_temp_free_i32 ( @@v100@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v101@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v101@@ ) ; break ; case Number : @@v99@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v99@@ , @@a4@@ ) ; gen_helper_float_cvtw_s ( @@v99@@ , @@v99@@ ) ; gen_store_fpr32 ( @@v99@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v99@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v97@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v98@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v97@@ , @@a4@@ ) ; gen_helper_float_cvtl_s ( @@v98@@ , @@v97@@ ) ; tcg_temp_free_i32 ( @@v97@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v98@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v98@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v94@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v95@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v96@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v95@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v96@@ , @@a3@@ ) ; tcg_gen_concat_i32_i64 ( @@v94@@ , @@v95@@ , @@v96@@ ) ; tcg_temp_free_i32 ( @@v96@@ ) ; tcg_temp_free_i32 ( @@v95@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v94@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v94@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } } return __readfsqword ( Number ) ^ @@v138@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": 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1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s732\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s736\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s740\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s744\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s748\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s752\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s756\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s760\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s764\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s768\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s772\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s776\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s780\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s784\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s788\"}, {\"n\": \"v138\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s808\"}]}",
"{\"name\": \"gen_flt3_ldst\", \"code\": \"unsigned __int64 __fastcall gen_flt3_ldst ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a5@@ ) { if ( @@a6@@ ) { gen_load_gpr ( @@v11@@ , @@a6@@ ) ; gen_op_addr_add ( @@a1@@ , @@v11@@ , cpu_gpr [ @@a5@@ ] , @@v11@@ ) ; } else { gen_load_gpr ( @@v11@@ , @@a5@@ ) ; } } else { gen_load_gpr ( @@v11@@ , @@a6@@ ) ; } save_cpu_state ( @@a1@@ , Number ) ; switch ( @@a2@@ ) { case Number : check_cop1x ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_qemu_ld32s ( @@v11@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_gen_trunc_i64_i32 ( @@v18@@ , @@v11@@ ) ; gen_store_fpr32 ( @@v18@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a3@@ ) ; @@v17@@ = tcg_temp_new_i64 ( @@a1@@ ) ; tcg_gen_qemu_ld64 ( @@v17@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v17@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v17@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number ) ; @@v16@@ = tcg_temp_new_i64 ( @@v11@@ ) ; tcg_gen_qemu_ld64 ( @@v16@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v16@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v14@@ , @@a4@@ ) ; tcg_gen_extu_i32_i64 ( @@v15@@ , @@v14@@ ) ; tcg_gen_qemu_st32 ( @@v15@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v13@@ , @@a4@@ ) ; tcg_gen_qemu_st64 ( @@v13@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v13@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number ) ; @@v12@@ = tcg_temp_new_i64 ( @@v11@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a4@@ ) ; tcg_gen_qemu_st64 ( @@v12@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v12@@ ) ; break ; default : break ; } tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_flt3_arith\", \"code\": \"unsigned __int64 __fastcall gen_flt3_arith ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned int @@v34@@ ; unsigned int @@v35@@ ; unsigned int @@v36@@ ; unsigned int @@v37@@ ; unsigned int @@v38@@ ; unsigned int @@v39@@ ; unsigned int @@v40@@ ; unsigned int @@v41@@ ; unsigned int @@v42@@ ; unsigned int @@v43@@ ; unsigned int @@v44@@ ; unsigned int @@v45@@ ; unsigned int @@v46@@ ; unsigned int @@v47@@ ; unsigned int @@v48@@ ; unsigned int @@v49@@ ; int @@v50@@ ; int @@v51@@ ; unsigned __int64 @@v52@@ ; @@v52@@ = __readfsqword ( Number ) ; switch ( @@a2@@ ) { case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v47@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v48@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v49@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v50@@ = gen_new_label ( @@a1@@ ) ; @@v51@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v47@@ , @@a4@@ ) ; tcg_gen_andi_i64 ( @@v47@@ , @@v47@@ , Number L ) ; tcg_gen_brcondi_i64 ( Number , @@v47@@ , Number L , @@v50@@ ) ; gen_load_fpr32 ( @@v48@@ , @@a5@@ ) ; gen_load_fpr32h ( @@v49@@ , @@a5@@ ) ; gen_store_fpr32 ( @@v48@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v49@@ , @@a3@@ ) ; tcg_gen_br ( @@v51@@ ) ; gen_set_label ( @@v50@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v47@@ , Number L , @@v51@@ ) ; tcg_temp_free_i64 ( @@v47@@ ) ; gen_load_fpr32h ( @@v49@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v48@@ , @@a6@@ ) ; gen_store_fpr32 ( @@v49@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v48@@ , @@a3@@ ) ; gen_set_label ( @@v51@@ ) ; tcg_temp_free_i32 ( @@v48@@ ) ; tcg_temp_free_i32 ( @@v49@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v44@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v45@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v46@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v44@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v45@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v46@@ , @@a4@@ ) ; gen_helper_float_muladd_s ( @@v46@@ , @@v44@@ , @@v45@@ , @@v46@@ ) ; tcg_temp_free_i32 ( @@v44@@ ) ; tcg_temp_free_i32 ( @@v45@@ ) ; gen_store_fpr32 ( @@v46@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v46@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v41@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v42@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v43@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v41@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v42@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v43@@ , @@a4@@ ) ; gen_helper_float_muladd_d ( @@v43@@ , @@v41@@ , @@v42@@ , @@v43@@ ) ; tcg_temp_free_i64 ( @@v41@@ ) ; tcg_temp_free_i64 ( @@v42@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v43@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v43@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v38@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v39@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v40@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v38@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v39@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v40@@ , @@a4@@ ) ; gen_helper_float_muladd_ps ( @@v40@@ , @@v38@@ , @@v39@@ , @@v40@@ ) ; tcg_temp_free_i64 ( @@v38@@ ) ; tcg_temp_free_i64 ( @@v39@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v40@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v40@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v35@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v36@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v37@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v35@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v36@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v37@@ , @@a4@@ ) ; gen_helper_float_mulsub_s ( @@v37@@ , @@v35@@ , @@v36@@ , @@v37@@ ) ; tcg_temp_free_i32 ( @@v35@@ ) ; tcg_temp_free_i32 ( @@v36@@ ) ; gen_store_fpr32 ( @@v37@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v37@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v34@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v32@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v33@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v34@@ , @@a4@@ ) ; gen_helper_float_mulsub_d ( @@v34@@ , @@v32@@ , @@v33@@ , @@v34@@ ) ; tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v34@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v34@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v29@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v30@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v31@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v29@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v30@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v31@@ , @@a4@@ ) ; gen_helper_float_mulsub_ps ( @@v31@@ , @@v29@@ , @@v30@@ , @@v31@@ ) ; tcg_temp_free_i64 ( @@v29@@ ) ; tcg_temp_free_i64 ( @@v30@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v31@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v31@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v27@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v28@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v26@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v27@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v28@@ , @@a4@@ ) ; gen_helper_float_nmuladd_s ( @@v28@@ , @@v26@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; tcg_temp_free_i32 ( @@v27@@ ) ; gen_store_fpr32 ( @@v28@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v23@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v24@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v25@@ , @@a4@@ ) ; gen_helper_float_nmuladd_d ( @@v25@@ , @@v23@@ , @@v24@@ , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v25@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v22@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v20@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v21@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v22@@ , @@a4@@ ) ; gen_helper_float_nmuladd_ps ( @@v22@@ , @@v20@@ , @@v21@@ , @@v22@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v22@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v17@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v17@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v18@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v19@@ , @@a4@@ ) ; gen_helper_float_nmulsub_s ( @@v19@@ , @@v17@@ , @@v18@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_fpr32 ( @@v19@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v14@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v15@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v16@@ , @@a4@@ ) ; gen_helper_float_nmulsub_d ( @@v16@@ , @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v16@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v11@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v13@@ , @@a4@@ ) ; gen_helper_float_nmulsub_ps ( @@v13@@ , @@v11@@ , @@v12@@ , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; break ; default : generate_exception ( @@a1@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v52@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s104\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s108\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s112\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s116\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s120\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s124\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s128\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s132\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s136\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s140\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s144\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s148\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s152\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s156\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s160\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s164\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s168\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s172\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s176\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s180\"}, {\"n\": \"v51\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v50\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v49\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v48\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v47\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v46\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v45\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v44\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v43\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v42\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v41\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v40\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v39\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v38\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v37\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v52\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v36\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s88\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"gen_addiupc\", \"code\": \"unsigned __int64 __fastcall gen_addiupc ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { __int64 @@v5@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a5@@ && ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v5@@ = pc_relative_pc ( @@a1@@ ) ; tcg_gen_movi_i64 ( @@v9@@ , @@v5@@ ) ; tcg_gen_addi_i64 ( cpu_gpr [ @@a2@@ ] , @@v9@@ , @@a3@@ ) ; if ( ! @@a4@@ ) tcg_gen_ext32s_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a2@@ ] ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"mmreg\", \"code\": \"__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_ldst_multiple\", \"code\": \"unsigned __int64 __fastcall gen_ldst_multiple ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; @@v10@@ = tcg_const_i64 ( @@a3@@ ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; save_cpu_state ( @@a1@@ , Number ) ; if ( @@a2@@ == Number ) { gen_helper_sdm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_swm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_lwm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } else if ( @@a2@@ == Number ) { gen_helper_ldm ( @@v9@@ , @@v10@@ , @@v11@@ ) ; } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ldxs\", \"code\": \"unsigned __int64 __fastcall gen_ldxs ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a2@@ ) ; if ( @@a3@@ ) { gen_load_gpr ( @@v8@@ , @@a3@@ ) ; tcg_gen_shli_i64 ( @@v8@@ , @@v8@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v7@@ , @@v8@@ , @@v7@@ ) ; } save_cpu_state ( @@a1@@ , Number ) ; op_ld_lw ( @@v8@@ , @@v7@@ , @@a1@@ ) ; gen_store_gpr ( @@v8@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ldst_pair\", \"code\": \"unsigned __int64 __fastcall gen_ldst_pair ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number || @@a3@@ == Number || @@a3@@ == @@a4@@ ) { generate_exception ( @@a1@@ , Number ) ; } else { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ + Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ + Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_ld_lw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; op_ld_lw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ + Number ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_ld_ld ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ ) ; tcg_gen_movi_i64 ( @@v10@@ , Number L ) ; gen_op_addr_add ( @@a1@@ , @@v9@@ , @@v9@@ , @@v10@@ ) ; op_ld_ld ( @@v10@@ , @@v9@@ , @@a1@@ ) ; gen_store_gpr ( @@v10@@ , @@a3@@ + Number ) ; } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_pool32axf\", \"code\": \"unsigned __int64 __fastcall gen_pool32axf ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ , _DWORD * @@a5@@ ) { unsigned int v9 ; unsigned int v10 ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v11@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : if ( @@a3@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a3@@ ] , @@a4@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; break ; case Number : if ( @@v11@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_load_srsgpr ( @@a3@@ , @@a4@@ ) ; } else { if ( @@v11@@ != Number ) goto LABEL_70 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_store_srsgpr ( @@a3@@ , @@a4@@ ) ; } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a3@@ ) ; gen_mtc0 ( @@a1@@ , @@a2@@ , @@v14@@ , @@a4@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case Number : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_cp0 ( @@a1@@ , @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; default : goto LABEL_70 ; } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : if ( @@v11@@ == Number ) { @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_di ( @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; tcg_temp_free_i64 ( @@v13@@ ) ; } else { if ( @@v11@@ != Number ) goto LABEL_70 ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_ei ( @@v12@@ ) ; gen_store_gpr ( @@v12@@ , @@a4@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; tcg_temp_free_i64 ( @@v12@@ ) ; } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : gen_bshfl ( @@a2@@ , Number , @@a4@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : gen_bshfl ( @@a2@@ , Number , @@a4@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : v9 = Number ; goto LABEL_17 ; case Number : v9 = Number ; LABEL_17 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cl ( @@a2@@ , v9 , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : gen_rdhwr ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : gen_bshfl ( @@a2@@ , Number , @@a4@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; goto LABEL_28 ; case Number : v10 = Number ; LABEL_28 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_muldiv ( @@a2@@ , v10 , @@a4@@ , @@a3@@ ) ; break ; default : goto LABEL_70 ; } break ; case Number : if ( @@v11@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; } else { if ( ( unsigned __int8 ) ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) > Number ) goto LABEL_70 ; if ( @@v11@@ != Number ) { if ( @@v11@@ != Number ) goto LABEL_70 ; generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; } } break ; case Number : gen_trap ( @@a2@@ , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : if ( @@v11@@ > Number || ( ( Number L << @@v11@@ ) & Number ) == Number ) goto LABEL_70 ; generate_exception_err ( @@a2@@ , Number , Number ) ; break ; case Number : if ( @@v11@@ == Number ) { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } else { if ( ( unsigned __int8 ) ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) > Number ) goto LABEL_70 ; if ( @@v11@@ == Number ) { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } else if ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } else { gen_HILO ( @@a2@@ , Number , @@a4@@ ) ; } } break ; case Number : if ( ( unsigned __int8 ) ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) > Number ) { if ( @@v11@@ - Number > Number ) goto LABEL_70 ; gen_compute_branch ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; * @@a5@@ = Number ; } else { gen_compute_branch ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; * @@a5@@ = Number ; } break ; default : LABEL_70 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_pool32fxf\", \"code\": \"unsigned __int64 __fastcall gen_pool32fxf ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , unsigned int @@a4@@ ) { int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( @@v5@@ == Number ) goto LABEL_76 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_77 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_76 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) { LABEL_78 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@v5@@ == Number ) { LABEL_77 : gen_movci ( @@a2@@ , @@a3@@ , @@a4@@ , ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number , Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_76 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( @@v5@@ == Number ) goto LABEL_77 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) goto LABEL_78 ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) { if ( @@v5@@ != Number ) goto LABEL_78 ; LABEL_76 : gen_movci ( @@a2@@ , @@a3@@ , @@a4@@ , ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number , Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_78 ; switch ( @@v5@@ ) { case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : case Number : case Number : case Number : goto LABEL_77 ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : case Number : case Number : goto LABEL_76 ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_cp1 ( @@a2@@ , Number , @@a3@@ , @@a4@@ ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , Number , @@a4@@ , @@a3@@ , Number ) ; break ; default : goto LABEL_78 ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "decode_micromips_opc", "code": "__int64 __fastcall decode_micromips_opc ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { __int64 result ; int v4 ; int v5 ; __int16 v6 ; unsigned int @@v7@@ ; int v8 ; unsigned int v9 ; int v10 ; int @@v13@@ ; int @@v14@@ ; int @@v15@@ ; int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; int @@v28@@ ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; int @@v32@@ ; int @@v33@@ ; int @@v34@@ ; if ( ( * ( _QWORD * ) ( @@a2@@ + Number ) & Number L ) != Number ) { * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a2@@ + Number ) ; generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; result = Number L ; } else { @@v13@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) == Number ) goto LABEL_8 ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) goto LABEL_8 ; break ; default : goto LABEL_8 ; } generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; result = Number L ; } else { LABEL_8 : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : @@v32@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v33@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v34@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_arith ( @@a1@@ , @@a2@@ , Number , @@v32@@ , @@v33@@ , @@v34@@ ) ; else gen_arith ( @@a1@@ , @@a2@@ , Number , @@v32@@ , @@v33@@ , @@v34@@ ) ; goto LABEL_52 ; case Number : @@v30@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v31@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) == Number ) v6 = Number ; else v6 = * ( _WORD * ) ( @@a2@@ + Number ) & Number ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v30@@ , @@v31@@ , v6 ) ; goto LABEL_52 ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number ) ; goto LABEL_52 ; case Number : @@v28@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v29@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) v4 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; else LOBYTE ( v4 ) = Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v28@@ , @@v29@@ , Number ) ; else gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v28@@ , @@v29@@ , v4 ) ; goto LABEL_52 ; case Number : @@v26@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v27@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v26@@ , @@v27@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : gen_andi16 ( @@a1@@ , @@a2@@ ) ; goto LABEL_52 ; case Number : gen_pool16c_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; goto LABEL_52 ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_addiusp ( @@a1@@ , @@a2@@ ) ; else gen_addius5 ( @@a1@@ , @@a2@@ ) ; goto LABEL_52 ; case Number : v5 = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , v5 , Number , Number * ( ( __int16 ) ( * ( _WORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) ) ; goto LABEL_52 ; case Number : @@v24@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v25@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v25@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_addiur1sp ( @@a1@@ , @@a2@@ ) ; else gen_addiur2 ( @@a1@@ , @@a2@@ ) ; goto LABEL_52 ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_21 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { LABEL_21 : generate_exception ( @@a2@@ , Number ) ; } else { @@v21@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v22@@ = re_enc_16229 [ @@v21@@ ] ; @@v23@@ = rs_rt_enc_16230 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , rd_enc_16228 [ @@v21@@ ] , rs_rt_enc_16230 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] , Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v23@@ , Number ) ; } goto LABEL_52 ; case Number : @@v19@@ = mmreg2 ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v20@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_st ( @@a2@@ , Number , @@v19@@ , @@v20@@ , * ( _WORD * ) ( @@a2@@ + Number ) & Number ) ; goto LABEL_52 ; case Number : case Number : @@v7@@ = Number * ( ( int ) ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) ; v8 = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( @@v13@@ == Number ) v9 = Number ; else v9 = Number ; gen_compute_branch ( @@a2@@ , v9 , Number , v8 , Number , @@v7@@ ) ; * @@a3@@ = Number ; goto LABEL_52 ; case Number : @@v17@@ = mmreg2 ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v18@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_st ( @@a2@@ , Number , @@v17@@ , @@v18@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : gen_st ( @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * ( ( int ) ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) ) ; * @@a3@@ = Number ; goto LABEL_52 ; case Number : @@v15@@ = mmreg2 ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v16@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_st ( @@a2@@ , Number , @@v15@@ , @@v16@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : @@v14@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) v10 = Number ; else v10 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; tcg_gen_movi_i64 ( cpu_gpr [ @@v14@@ ] , v10 ) ; LABEL_52 : result = Number L ; break ; default : decode_micromips32_opc ( @@a1@@ , @@a2@@ , ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number , @@a3@@ ) ; result = Number L ; break ; } } } return result ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_DWORD"}, "location": "r16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v23", "t": {"T": 1, "n": "int", "s": 4}, "location": "s100"}, {"n": "v22", "t": {"T": 1, "n": "int", "s": 4}, "location": "s108"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s124"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s128"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s132"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s136"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s140"}, {"n": "v16", "t": {"T": 1, "n": "int", "s": 4}, "location": "s152"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s156"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s164"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s172"}, {"n": "v34", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v33", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v32", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v31", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v30", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v29", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "v28", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "v27", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "v26", "t": {"T": 1, "n": "int", "s": 4}, "location": "s72"}, {"n": "v25", "t": {"T": 1, "n": "int", "s": 4}, "location": "s92"}, {"n": "v24", "t": {"T": 1, "n": "int", "s": 4}, "location": "s96"}]} | [{"n": "is_branch", "t": {"T": 3, "t": "int"}, "location": "r16"}, {"n": "v6", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r32"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "rt", "t": {"T": 1, "n": "int", "s": 4}, "location": "s100"}, {"n": "re", "t": {"T": 1, "n": "int", "s": 4}, "location": "s108"}, {"n": "enc_dest", "t": {"T": 1, "n": "int", "s": 4}, "location": "s124"}, {"n": "rb_4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s128"}, {"n": "rd_7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s132"}, {"n": "rb_5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s136"}, {"n": "rd_8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s140"}, {"n": "rb_7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s152"}, {"n": "rd_10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s156"}, {"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "s164"}, {"n": "op", "t": {"T": 1, "n": "int", "s": 4}, "location": "s172"}, {"n": "rs2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "rs1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "rb_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "rd_3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "rs", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "rd_0", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "rb_1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "rd_4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s72"}, {"n": "rb_3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s92"}, {"n": "rd_6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s96"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 566 | [
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift_imm\", \"code\": \"unsigned __int64 __fastcall gen_shift_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , char @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; __int64 @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v12@@ = @@a6@@ & Number ; if ( @@a4@@ ) { @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; else tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) { @@v11@@ = tcg_temp_new_i32 ( @@v10@@ ) ; tcg_gen_trunc_i64_i32 ( @@v11@@ , @@v10@@ ) ; tcg_gen_rotri_i32 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else { LABEL_14 : tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } } } else { switch ( @@a3@@ ) { case Number : tcg_gen_shli_i64 ( @@v10@@ , @@v10@@ , @@v12@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; break ; case Number : if ( ! @@v12@@ ) goto LABEL_14 ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; default : break ; } } } } tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_shift\", \"code\": \"unsigned __int64 __fastcall gen_shift ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_rotr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@v12@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@v12@@ ) ; tcg_gen_trunc_i64_i32 ( @@v13@@ , @@v11@@ ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v12@@ ) ; tcg_gen_andi_i32 ( @@v13@@ , @@v13@@ , Number ) ; tcg_gen_rotr_i32 ( @@v13@@ , @@v14@@ , @@v13@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_ext32u_i64 ( @@v12@@ , @@v12@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; default : break ; } } } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"mmreg\", \"code\": \"__int64 __fastcall mmreg ( int @@a1@@ ) { return ( unsigned int ) map_15524 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"mmreg2\", \"code\": \"__int64 __fastcall mmreg2 ( int @@a1@@ ) { return ( unsigned int ) map_15528 [ @@a1@@ ] ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_addiur1sp\", \"code\": \"unsigned __int64 __fastcall gen_addiur1sp ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v2@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v2@@ , Number , ( unsigned __int8 ) ( Number * ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) ) ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_addiur2\", \"code\": \"unsigned __int64 __fastcall gen_addiur2 ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v3@@ ; int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v3@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v4@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v3@@ , @@v4@@ , decoded_imm_15538 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_addiusp\", \"code\": \"unsigned __int64 __fastcall gen_addiusp ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int16 @@v3@@ ; unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( @@v4@@ > Number ) { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) > Number ) @@v3@@ = @@v4@@ - Number ; else @@v3@@ = @@v4@@ - Number ; } else { @@v3@@ = @@v4@@ ; } } else { @@v3@@ = @@v4@@ + Number ; } gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , Number * @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_addius5\", \"code\": \"unsigned __int64 __fastcall gen_addius5 ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , ( __int16 ) ( ( unsigned __int16 ) ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) << Number ) >> Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_andi16\", \"code\": \"unsigned __int64 __fastcall gen_andi16 ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v3@@ ; int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v3@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v4@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_logic_imm ( @@a1@@ , Number , @@v3@@ , @@v4@@ , decoded_imm_15557 [ * ( _DWORD * ) ( @@a2@@ + Number ) & Number ] ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_pool16c_insn\", \"code\": \"unsigned __int64 __fastcall gen_pool16c_insn ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v6@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v7@@ = mmreg ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v7@@ , Number ) ; break ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v6@@ , @@v7@@ ) ; break ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v6@@ , @@v7@@ ) ; break ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , Number , @@v6@@ , @@v6@@ , @@v7@@ ) ; break ; case Number : case Number : case Number : case Number : gen_ldst_multiple ( @@a2@@ , Number , lwm_convert_15605 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] , Number , Number * ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) ) ; break ; case Number : case Number : case Number : case Number : gen_ldst_multiple ( @@a2@@ , Number , swm_convert_15611 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] , Number , Number * ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) ) ; break ; case Number : case Number : gen_compute_branch ( @@a2@@ , Number , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number , Number ) ; * @@a3@@ = Number ; break ; case Number : case Number : gen_compute_branch ( @@a2@@ , Number , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number , Number ) ; break ; case Number : case Number : @@v5@@ = Number ; goto LABEL_12 ; case Number : case Number : @@v5@@ = Number ; LABEL_12 : gen_compute_branch ( @@a2@@ , @@v5@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number , Number ) ; * @@a3@@ = Number ; break ; case Number : case Number : gen_HILO ( @@a2@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; break ; case Number : case Number : gen_HILO ( @@a2@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; break ; case Number : generate_exception ( @@a2@@ , Number ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; break ; case Number : case Number : @@v8@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , Number * @@v8@@ ) ; break ; default : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"decode_micromips32_opc\", \"code\": \"unsigned __int64 __fastcall decode_micromips32_opc ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , _DWORD * @@a4@@ ) { int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; int v10 ; int v11 ; int v12 ; unsigned int v13 ; unsigned int v14 ; __int16 @@v18@@ ; unsigned int @@v19@@ ; int @@v20@@ ; unsigned int @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; unsigned int v25 ; unsigned int v26 ; unsigned int v27 ; int v28 ; int v29 ; int v30 ; int v31 ; int v32 ; int v33 ; int v34 ; int v35 ; int v36 ; int v37 ; int v38 ; int v39 ; int v40 ; unsigned __int64 @@v41@@ ; @@v41@@ = __readfsqword ( Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = ( unsigned __int16 ) lduw_code ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) | ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) ; @@v20@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v21@@ = HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v22@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; @@v23@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v18@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; switch ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) { case Number : v25 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v25 > Number ) { if ( v25 != Number ) goto LABEL_257 ; gen_pool32axf ( @@a1@@ , @@a2@@ , @@v20@@ , @@v21@@ , @@a4@@ ) ; } else { switch ( v25 ) { case Number : v26 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v26 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } else { if ( v26 > Number ) goto LABEL_257 ; if ( v26 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } else if ( v26 ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } else { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ ) ; } } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_bitops ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v23@@ , @@v22@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_slt ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; case Number : gen_slt ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; break ; default : goto LABEL_257 ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v27 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v27 == Number ) { gen_ldxs ( @@a2@@ , @@v21@@ , @@v20@@ , @@v22@@ ) ; } else { if ( v27 > Number ) goto LABEL_257 ; if ( v27 ) { if ( v27 != Number ) goto LABEL_257 ; gen_cond_move ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; } else { gen_cond_move ( @@a1@@ , Number , @@v22@@ , @@v21@@ , @@v20@@ ) ; } } break ; case Number : gen_bitops ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v23@@ , @@v22@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; default : goto LABEL_257 ; } } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : v28 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : case Number : goto LABEL_48 ; case Number : case Number : case Number : case Number : gen_ldst_pair ( @@a2@@ , v28 , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : case Number : case Number : case Number : gen_ldst_multiple ( @@a2@@ , v28 , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : return __readfsqword ( Number ) ^ @@v41@@ ; default : goto LABEL_257 ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : v30 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; switch ( v30 ) { case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : case Number : if ( v30 == Number ) v13 = Number ; else v13 = Number ; gen_compute_branch ( @@a2@@ , v13 , Number , @@v21@@ , Number , Number * @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_trap ( @@a2@@ , Number , @@v21@@ , Number , @@v18@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; goto LABEL_183 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v21@@ , Number , Number * @@v18@@ ) ; LABEL_183 : * @@a4@@ = Number ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : case Number : LABEL_48 : generate_exception_err ( @@a2@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) v14 = Number ; else v14 = Number ; goto LABEL_199 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) v14 = Number ; else v14 = Number ; LABEL_199 : gen_compute_branch1 ( @@a1@@ , @@a2@@ , v14 , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number * @@v18@@ ) ; goto LABEL_206 ; case Number : @@v19@@ = Number ; goto LABEL_205 ; case Number : @@v19@@ = Number ; LABEL_205 : check_cop1x ( @@a2@@ ) ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_compute_branch1 ( @@a1@@ , @@a2@@ , @@v19@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number * @@v18@@ ) ; LABEL_206 : * @@a4@@ = Number ; break ; default : goto LABEL_257 ; } break ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { v29 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; check_cp1_enabled ( @@a2@@ ) ; switch ( v29 ) { case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; case Number : gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; break ; default : goto LABEL_257 ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_flt3_ldst ( @@a2@@ , Number , @@v22@@ , @@v22@@ , @@v20@@ , @@v21@@ ) ; break ; default : goto LABEL_257 ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v38 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v4 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v4 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else if ( v4 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else if ( v4 ) { if ( v4 != Number ) goto LABEL_257 ; if ( v38 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v38 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else if ( v38 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v38 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v31 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v33 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; v36 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v36 == Number ) { gen_cmpabs_ps ( @@a2@@ , v31 , @@v20@@ , @@v21@@ , v33 ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v36 ) gen_cmpabs_d ( @@a2@@ , v31 , @@v20@@ , @@v21@@ , v33 ) ; else gen_cmpabs_s ( @@a2@@ , v31 , @@v20@@ , @@v21@@ , v33 ) ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v35 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; v39 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v5 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v5 == Number ) return __readfsqword ( Number ) ^ @@v41@@ ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v5 ) { if ( v5 != Number ) goto LABEL_257 ; if ( v39 == Number ) { gen_movcf_ps ( @@v21@@ , @@v20@@ , v35 , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v39 ) gen_movcf_d ( @@a2@@ , @@v21@@ , @@v20@@ , v35 , Number ) ; else gen_movcf_s ( @@v21@@ , @@v20@@ , v35 , Number ) ; } } else if ( v39 == Number ) { gen_movcf_ps ( @@v21@@ , @@v20@@ , v35 , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v39 ) gen_movcf_d ( @@a2@@ , @@v21@@ , @@v20@@ , v35 , Number ) ; else gen_movcf_s ( @@v21@@ , @@v20@@ , v35 , Number ) ; } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v6 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v6 != Number ) { if ( v6 == Number ) { v9 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v9 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v9 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else if ( v6 ) { v8 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v8 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v8 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else { v7 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v7 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v7 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } return __readfsqword ( Number ) ^ @@v41@@ ; } v40 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v40 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; } if ( ! v40 ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; return __readfsqword ( Number ) ^ @@v41@@ ; } goto LABEL_257 ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_flt3_arith ( @@a2@@ , Number , @@v22@@ , @@v23@@ , @@v21@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v10 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v10 ) { if ( v10 != Number ) goto LABEL_257 ; v12 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v12 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v12 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } else { v11 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v11 == Number ) { gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v11 ) gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; else gen_farith ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v22@@ , Number ) ; } } return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_pool32fxf ( @@a1@@ , @@a2@@ , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v41@@ ; case Number : v32 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; v34 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; v37 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( v37 == Number ) { gen_cmp_ps ( @@a2@@ , v32 , @@v20@@ , @@v21@@ , v34 ) ; } else { if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) == Number ) goto LABEL_257 ; if ( v37 ) gen_cmp_d ( @@a2@@ , v32 , @@v20@@ , @@v21@@ , v34 ) ; else gen_cmp_s ( @@a2@@ , v32 , @@v20@@ , @@v21@@ , v34 ) ; } break ; default : goto LABEL_257 ; } } else { generate_exception_err ( @@a2@@ , Number , Number ) ; } break ; case Number : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : return __readfsqword ( Number ) ^ @@v41@@ ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; case Number : gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v21@@ , ( __int16 ) ( Number * * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) ; break ; default : goto LABEL_257 ; } break ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : @@v24@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_addiupc ( @@a2@@ , @@v24@@ , Number * ( ( int ) ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) , Number , Number ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , Number * @@v18@@ ) ; * @@a4@@ = Number ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , Number * @@v18@@ ) ; * @@a4@@ = Number ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_cop1_ldst ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_logic_imm ( @@a1@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v20@@ , @@v21@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a4@@ = Number ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v21@@ , @@v18@@ ) ; break ; default : LABEL_257 : generate_exception ( @@a2@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v41@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"s62\"}, {\"n\": \"v41\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "decode_opc", "code": "unsigned __int64 __fastcall decode_opc ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; __int16 @@v10@@ ; int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; int v16 ; int @@v17@@ ; unsigned int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned __int64 @@v29@@ ; @@v29@@ = __readfsqword ( Number ) ; if ( ( * ( _QWORD * ) ( @@a2@@ + Number ) & Number L ) != Number ) { * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a2@@ + Number ) ; generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) { @@v17@@ = gen_new_label ( @@a1@@ ) ; tcg_gen_brcondi_i64 ( Number , bcond , Number L , @@v17@@ ) ; tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; gen_goto_tb ( @@a2@@ , Number , * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; gen_set_label ( @@v17@@ ) ; } if ( ( loglevel & Number ) != Number ) tcg_gen_debug_insn_start ( * ( _QWORD * ) ( @@a2@@ + Number ) ) ; @@v18@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v19@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v20@@ = HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v21@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; @@v22@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v10@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; if ( @@v18@@ == Number ) goto LABEL_276 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_228 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_228 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_275 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_228 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_275 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_228 : gen_cop1_ldst ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_223 : gen_ld ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_224 : gen_st ( @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { LABEL_276 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_st ( @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) goto LABEL_224 ; if ( @@v18@@ == Number ) goto LABEL_275 ; if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) goto LABEL_223 ; if ( @@v18@@ == Number ) { v12 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v12 ) { case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_bitops ( @@a2@@ , v12 , @@v20@@ , @@v19@@ , @@v22@@ , @@v21@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_bitops ( @@a2@@ , v12 , @@v20@@ , @@v19@@ , @@v22@@ , @@v21@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v25@@ , @@v20@@ ) ; gen_load_gpr ( @@v26@@ , @@v19@@ ) ; gen_helper_fork ( @@v25@@ , @@v26@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v24@@ , @@v19@@ ) ; gen_helper_yield ( @@v24@@ , @@v24@@ ) ; gen_store_gpr ( @@v24@@ , @@v21@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_loongson_integer ( @@a2@@ , v12 , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_bshfl ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_bshfl ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_rdhwr ( @@a1@@ , @@a2@@ , @@v20@@ , @@v21@@ ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; goto LABEL_281 ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_compute_branch ( @@a2@@ , Number , Number , @@v19@@ , @@v20@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) { LABEL_281 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ == Number ) { v11 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v11 ) { case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_muldiv ( @@a2@@ , v11 , @@v19@@ , @@v20@@ ) ; break ; case Number : LABEL_104 : gen_arith ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_loongson_integer ( @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cl ( @@a2@@ , v11 , @@v21@@ , @@v19@@ ) ; break ; case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_cl ( @@a2@@ , v11 , @@v21@@ , @@v19@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { LABEL_275 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ == Number ) goto LABEL_278 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_278 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { LABEL_222 : gen_compute_branch ( @@a2@@ , @@v18@@ , Number , @@v19@@ , @@v20@@ , Number * @@v10@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ == Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { check_cp1_enabled ( @@a2@@ ) ; v16 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v16 ) { case Number : case Number : case Number : case Number : case Number : case Number : gen_flt3_ldst ( @@a2@@ , v16 , @@v22@@ , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : gen_flt3_arith ( @@a2@@ , v16 , @@v22@@ , @@v19@@ , @@v21@@ , @@v20@@ ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; } goto LABEL_125 ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_269 : generate_exception_err ( @@a2@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { check_cp1_enabled ( @@a2@@ ) ; v15 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) { LABEL_266 : gen_farith ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ , @@v22@@ , ( @@v10@@ >> Number ) & Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_264 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) { LABEL_264 : check_cop1x ( @@a2@@ ) ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_262 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_263 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) { LABEL_262 : gen_cp1 ( @@a2@@ , v15 , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 != Number ) goto LABEL_281 ; LABEL_263 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cp1 ( @@a2@@ , v15 , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } } goto LABEL_262 ; } } check_insn ( @@a1@@ , @@a2@@ , Number ) ; goto LABEL_262 ; } } gen_compute_branch1 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( @@v20@@ >> Number ) & Number , Number * @@v10@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } LABEL_125 : generate_exception_err ( @@a2@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_cp0_enabled ( @@a2@@ ) ; v14 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v14 > Number ) goto LABEL_281 ; if ( v14 >= Number ) { gen_cp0 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_store_srsgpr ( @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 > Number ) goto LABEL_281 ; if ( v14 == Number ) { LABEL_194 : gen_cp0 ( @@a1@@ , @@a2@@ , v14 , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 > Number ) goto LABEL_281 ; if ( v14 != Number ) { if ( v14 > Number ) goto LABEL_281 ; if ( v14 == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_load_srsgpr ( @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 > Number || v14 != Number && ( v14 > Number || v14 != Number && ( v14 > Number || v14 != Number && ( v14 > Number || v14 != Number && v14 != Number ) ) ) ) { goto LABEL_281 ; } goto LABEL_194 ; } @@v27@@ = tcg_temp_new_i64 ( @@a2@@ ) ; @@v23@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_ei ( @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_di ( @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_emt ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmt ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dvpe ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; } else { if ( @@v23@@ != Number ) goto LABEL_213 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_evpe ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; } LABEL_214 : tcg_temp_free_i64 ( @@v27@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } } } } LABEL_213 : generate_exception ( @@a2@@ , Number ) ; goto LABEL_214 ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_220 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_220 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_220 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_220 : gen_logic_imm ( @@a1@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_219 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_219 : gen_slt_imm ( @@a1@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_218 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_218 : gen_arith_imm ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) goto LABEL_222 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { gen_compute_branch ( @@a2@@ , @@v18@@ , Number , @@v19@@ , @@v20@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ ) { if ( @@v18@@ == Number ) { v13 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v13 == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v13 <= Number && v13 <= Number ) { if ( v13 >= Number ) goto LABEL_172 ; if ( v13 != Number ) { if ( v13 > Number ) goto LABEL_281 ; if ( v13 <= Number ) { if ( v13 < Number ) goto LABEL_281 ; LABEL_172 : gen_compute_branch ( @@a2@@ , v13 , Number , @@v19@@ , Number , Number * @@v10@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v13 - Number > Number ) goto LABEL_281 ; } gen_trap ( @@a2@@ , v13 , @@v19@@ , Number , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } } goto LABEL_281 ; } v11 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v11 ) { case Number : case Number : goto LABEL_96 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) goto LABEL_125 ; check_cp1_enabled ( @@a2@@ ) ; gen_movci ( @@a2@@ , @@v21@@ , @@v19@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : v3 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v3 ) goto LABEL_96 ; if ( v3 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_96 : gen_shift_imm ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v20@@ , @@v22@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : goto LABEL_109 ; case Number : @@v28@@ = tcg_const_i32 ( @@v22@@ ) ; gen_helper_pmon ( @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : v4 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v4 ) goto LABEL_109 ; if ( v4 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_109 : gen_shift ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_compute_branch ( @@a2@@ , v11 , Number , @@v19@@ , @@v21@@ , @@v22@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cond_move ( @@a1@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_HILO ( @@a2@@ , v11 , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_HILO ( @@a2@@ , v11 , @@v19@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : goto LABEL_143 ; case Number : v7 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v7 ) goto LABEL_143 ; if ( v7 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_143 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : if ( @@v22@@ ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mul_vr54xx ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v21@@ , @@v19@@ , @@v20@@ ) ; } else { gen_muldiv ( @@a2@@ , v11 , @@v19@@ , @@v20@@ ) ; } return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , v11 , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : goto LABEL_104 ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_slt ( @@a1@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_arith ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : case Number : case Number : gen_trap ( @@a2@@ , v11 , @@v19@@ , @@v20@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : goto LABEL_136 ; case Number : v5 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v5 ) goto LABEL_136 ; if ( v5 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; goto LABEL_136 ; case Number : v6 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v6 ) goto LABEL_136 ; if ( v6 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_136 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v20@@ , @@v22@@ ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_DWORD"}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v28", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v27", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s56"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "v10", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "s66"}, {"n": "v29", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "is_branch", "t": {"T": 3, "t": "int"}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r64"}, {"n": "helper_tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "t0_1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "t1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "t0_0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "op2", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s36"}, {"n": "sa", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s40"}, {"n": "rd", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "rt", "t": {"T": 1, "n": "signed int", "s": 4}, "location": "s48"}, {"n": "rs", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s52"}, {"n": "op", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s56"}, {"n": "l1", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "imm", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "s66"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 567 | [
"{\"name\": \"gen_set_label\", \"code\": \"unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcondi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_debug_insn_start\", \"code\": \"unsigned __int64 __fastcall tcg_gen_debug_insn_start ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dmt\", \"code\": \"unsigned __int64 __fastcall gen_helper_dmt ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_dmt , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_emt\", \"code\": \"unsigned __int64 __fastcall gen_helper_emt ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_emt , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_dvpe\", \"code\": \"unsigned __int64 __fastcall gen_helper_dvpe ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_dvpe , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_evpe\", \"code\": \"unsigned __int64 __fastcall gen_helper_evpe ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_evpe , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_fork\", \"code\": \"unsigned __int64 __fastcall gen_helper_fork ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = @@a1@@ ; @@v3@@ [ Number ] = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_fork , Number , Number , Number , Number , ( __int64 ) @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_yield\", \"code\": \"unsigned __int64 __fastcall gen_helper_yield ( int @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a2@@ ; tcg_gen_helperN ( ( __int64 ) & helper_yield , Number , Number , @@a1@@ , Number , ( __int64 ) & @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_di\", \"code\": \"unsigned __int64 __fastcall gen_helper_di ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_di , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_ei\", \"code\": \"unsigned __int64 __fastcall gen_helper_ei ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_ei , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_pmon\", \"code\": \"unsigned __int64 __fastcall gen_helper_pmon ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_pmon , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_gpr\", \"code\": \"unsigned __int64 __fastcall gen_load_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( @@a1@@ , cpu_gpr [ @@a2@@ ] ) ; else tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_gpr\", \"code\": \"unsigned __int64 __fastcall gen_store_gpr ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_load_srsgpr\", \"code\": \"unsigned __int64 __fastcall gen_load_srsgpr ( int @@a1@@ , int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v3@@ = tcg_temp_new_i64 ( ) ; if ( @@a1@@ ) { @@v4@@ = tcg_temp_new_i32 ( ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , Number L ) ; tcg_gen_shri_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_andi_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_muli_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_ext_i32_i64 ( @@v5@@ , @@v4@@ ) ; tcg_gen_add_i64 ( @@v5@@ , cpu_env , @@v5@@ ) ; tcg_gen_ld_i64 ( @@v3@@ , @@v5@@ , Number L * @@a1@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_movi_i64 ( @@v3@@ , Number L ) ; } gen_store_gpr ( @@v3@@ , @@a2@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_store_srsgpr\", \"code\": \"unsigned __int64 __fastcall gen_store_srsgpr ( int @@a1@@ , int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) { @@v3@@ = tcg_temp_new_i64 ( ) ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; gen_load_gpr ( @@v3@@ , @@a1@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , Number L ) ; tcg_gen_shri_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_andi_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_muli_i32 ( @@v4@@ , @@v4@@ , Number ) ; tcg_gen_ext_i32_i64 ( @@v5@@ , @@v4@@ ) ; tcg_gen_add_i64 ( @@v5@@ , cpu_env , @@v5@@ ) ; tcg_gen_st_i64 ( @@v3@@ , @@v5@@ , Number L * @@a2@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception_err\", \"code\": \"unsigned __int64 __fastcall generate_exception_err ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_const_i32 ( @@a2@@ ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; save_cpu_state ( @@a1@@ , Number ) ; gen_helper_raise_exception_err ( @@v5@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp0_enabled\", \"code\": \"unsigned __int64 __fastcall check_cp0_enabled ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception_err ( @@a1@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cp1_enabled\", \"code\": \"unsigned __int64 __fastcall check_cp1_enabled ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception_err ( @@a1@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_cop1x\", \"code\": \"unsigned __int64 __fastcall check_cop1x ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_insn\", \"code\": \"unsigned __int64 __fastcall check_insn ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( @@a3@@ & * ( _DWORD * ) ( @@a1@@ + Number ) ) == Number ) generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"check_mips_64\", \"code\": \"unsigned __int64 __fastcall check_mips_64 ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st_cond\", \"code\": \"unsigned __int64 __fastcall gen_st_cond ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_local_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; @@v10@@ = tcg_temp_local_new_i64 ( ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sc ( @@v10@@ , @@v9@@ , @@a3@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_scd ( @@v10@@ , @@v9@@ , @@a3@@ , @@a1@@ ) ; } tcg_temp_free_i64 ( @@v10@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cop1_ldst\", \"code\": \"unsigned __int64 __fastcall gen_cop1_ldst ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { check_cp1_enabled ( @@a2@@ ) ; gen_flt_ldst ( @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; } else { generate_exception_err ( @@a2@@ , Number , Number ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith_imm\", \"code\": \"unsigned __int64 __fastcall gen_arith_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; @@v18@@ = __readfsqword ( Number ) ; @@v17@@ = @@a6@@ ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } goto LABEL_18 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v9@@ , @@v10@@ , @@v17@@ ) ; tcg_gen_xori_i64 ( @@v10@@ , @@v10@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v11@@ , @@v9@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v10@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v12@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v12@@ ) ; gen_store_gpr ( @@v9@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ != Number ) { if ( @@a3@@ != Number ) return __readfsqword ( Number ) ^ @@v18@@ ; if ( @@a5@@ ) { tcg_gen_addi_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , @@a6@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } LABEL_18 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , @@a6@@ ) ; return __readfsqword ( Number ) ^ @@v18@@ ; } @@v13@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a5@@ ) ; tcg_gen_addi_i64 ( @@v13@@ , @@v14@@ , @@v17@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; tcg_gen_xori_i64 ( @@v14@@ , @@v14@@ , ~ @@v17@@ ) ; tcg_gen_xori_i64 ( @@v15@@ , @@v13@@ , @@v17@@ ) ; tcg_gen_and_i64 ( @@v14@@ , @@v14@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v14@@ , Number L , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } } } return __readfsqword ( Number ) ^ @@v18@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_logic_imm\", \"code\": \"unsigned __int64 __fastcall gen_logic_imm ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , unsigned __int16 @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , ( __int16 ) @@a5@@ << Number ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ ) { tcg_gen_xori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } goto LABEL_14 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ ) { tcg_gen_ori_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_14 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , @@a5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ ) tcg_gen_andi_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , @@a5@@ ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; } } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt_imm\", \"code\": \"unsigned __int64 __fastcall gen_slt_imm ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v8@@ ; __int64 @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ = @@a5@@ ; if ( @@a3@@ ) { @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v8@@ , @@v9@@ ) ; } tcg_temp_free_i64 ( @@v8@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift_imm\", \"code\": \"unsigned __int64 __fastcall gen_shift_imm ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , char @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; __int64 @@v12@@ ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; @@v12@@ = @@a6@@ & Number ; if ( @@a4@@ ) { @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) tcg_gen_rotri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; else tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@v12@@ ) { @@v11@@ = tcg_temp_new_i32 ( @@v10@@ ) ; tcg_gen_trunc_i64_i32 ( @@v11@@ , @@v10@@ ) ; tcg_gen_rotri_i32 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else { LABEL_14 : tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; } } } else { switch ( @@a3@@ ) { case Number : tcg_gen_shli_i64 ( @@v10@@ , @@v10@@ , @@v12@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ ) ; break ; case Number : if ( ! @@v12@@ ) goto LABEL_14 ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ ) ; break ; case Number : tcg_gen_shli_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_shri_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; case Number : tcg_gen_sari_i64 ( cpu_gpr [ @@a4@@ ] , @@v10@@ , @@v12@@ + Number ) ; break ; default : break ; } } } } tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_arith\", \"code\": \"unsigned __int64 __fastcall gen_arith ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; unsigned __int64 @@v26@@ ; @@v26@@ = __readfsqword ( Number ) ; if ( @@a4@@ || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number || @@a3@@ == Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { if ( @@a5@@ && @@a6@@ ) { tcg_gen_mul_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { LABEL_55 : tcg_gen_movi_i64 ( cpu_gpr [ @@a4@@ ] , Number L ) ; } } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case String : @@v22@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v23@@ , @@a5@@ ) ; gen_load_gpr ( @@v24@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v22@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_ext32s_i64 ( @@v22@@ , @@v22@@ ) ; tcg_gen_xor_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_gen_xor_i64 ( @@v24@@ , @@v22@@ , @@v24@@ ) ; tcg_gen_andc_i64 ( @@v23@@ , @@v24@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v23@@ , Number L , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v25@@ ) ; gen_store_gpr ( @@v22@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case String : if ( ! @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ && @@a6@@ ) goto LABEL_17 ; if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; goto LABEL_50 ; } tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; break ; case String : @@v18@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v19@@ , @@a5@@ ) ; gen_load_gpr ( @@v20@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v18@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_ext32s_i64 ( @@v18@@ , @@v18@@ ) ; tcg_gen_xor_i64 ( @@v20@@ , @@v19@@ , @@v20@@ ) ; tcg_gen_xor_i64 ( @@v19@@ , @@v18@@ , @@v19@@ ) ; tcg_gen_and_i64 ( @@v19@@ , @@v19@@ , @@v20@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v19@@ , Number L , @@v21@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v21@@ ) ; gen_store_gpr ( @@v18@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a4@@ ] ) ; } break ; case String : @@v14@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v17@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v15@@ , @@a5@@ ) ; gen_load_gpr ( @@v16@@ , @@a6@@ ) ; tcg_gen_add_i64 ( @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_xor_i64 ( @@v16@@ , @@v14@@ , @@v16@@ ) ; tcg_gen_andc_i64 ( @@v15@@ , @@v16@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v15@@ , Number L , @@v17@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_add_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else { if ( @@a5@@ || ! @@a6@@ ) { if ( @@a5@@ && ! @@a6@@ ) goto LABEL_50 ; goto LABEL_55 ; } LABEL_17 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; case String : @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; tcg_gen_sub_i64 ( @@v10@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v12@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_xor_i64 ( @@v11@@ , @@v10@@ , @@v11@@ ) ; tcg_gen_and_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v11@@ , Number L , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; generate_exception ( @@a2@@ , Number ) ; gen_set_label ( @@v13@@ ) ; gen_store_gpr ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; break ; case String : if ( @@a5@@ && @@a6@@ ) { tcg_gen_sub_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] , cpu_gpr [ @@a6@@ ] ) ; } else if ( @@a5@@ || ! @@a6@@ ) { if ( ! @@a5@@ || @@a6@@ ) goto LABEL_55 ; LABEL_50 : tcg_gen_mov_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else { tcg_gen_neg_i64 ( cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a6@@ ] ) ; } break ; default : return __readfsqword ( Number ) ^ @@v26@@ ; } } } return __readfsqword ( Number ) ^ @@v26@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}]}",
"{\"name\": \"gen_cond_move\", \"code\": \"unsigned __int64 __fastcall gen_cond_move ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = gen_new_label ( @@a1@@ ) ; if ( @@a2@@ == Number ) { if ( @@a5@@ ) tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a5@@ ] , Number L , @@v9@@ ) ; } else if ( @@a2@@ == Number ) { if ( @@a5@@ ) tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a5@@ ] , Number L , @@v9@@ ) ; else tcg_gen_br ( @@v9@@ ) ; } if ( @@a4@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; gen_set_label ( @@v9@@ ) ; } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_logic\", \"code\": \"unsigned __int64 __fastcall gen_logic ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_nor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } else if ( @@a4@@ || ! @@a5@@ ) { if ( ! @@a4@@ || @@a5@@ ) tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number ) ; else tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; } else { tcg_gen_not_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { if ( @@a4@@ && @@a5@@ ) { tcg_gen_xor_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) goto LABEL_27 ; if ( @@a4@@ && ! @@a5@@ ) goto LABEL_30 ; goto LABEL_39 ; } if ( @@a2@@ != Number ) { if ( @@a2@@ != Number ) return __readfsqword ( Number ) ^ @@v6@@ ; if ( @@a4@@ && @@a5@@ ) { tcg_gen_or_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ && @@a5@@ ) { LABEL_27 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a5@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( @@a4@@ && ! @@a5@@ ) { LABEL_30 : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } LABEL_39 : tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; return __readfsqword ( Number ) ^ @@v6@@ ; } if ( ! @@a4@@ || ! @@a5@@ ) goto LABEL_39 ; tcg_gen_and_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a4@@ ] , cpu_gpr [ @@a5@@ ] ) ; } } return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_slt\", \"code\": \"unsigned __int64 __fastcall gen_slt ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } else if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_shift\", \"code\": \"unsigned __int64 __fastcall gen_shift ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v11@@ , @@a5@@ ) ; gen_load_gpr ( @@v12@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_rotr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ > Number ) { if ( @@a3@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@v12@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@v12@@ ) ; tcg_gen_trunc_i64_i32 ( @@v13@@ , @@v11@@ ) ; tcg_gen_trunc_i64_i32 ( @@v14@@ , @@v12@@ ) ; tcg_gen_andi_i32 ( @@v13@@ , @@v13@@ , Number ) ; tcg_gen_rotr_i32 ( @@v13@@ , @@v14@@ , @@v13@@ ) ; tcg_gen_ext_i32_i64 ( cpu_gpr [ @@a4@@ ] , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } } else if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_ext32u_i64 ( @@v12@@ , @@v12@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shl_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_shr_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; case Number : tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_sar_i64 ( cpu_gpr [ @@a4@@ ] , @@v12@@ , @@v11@@ ) ; break ; default : break ; } } } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; } return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_HILO\", \"code\": \"unsigned __int64 __fastcall gen_HILO ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ || @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_LO , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_LO , Number L ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_LO ) ; break ; case Number : tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , cpu_HI ) ; break ; case Number : if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_HI , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_HI , Number L ) ; break ; } } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_muldiv\", \"code\": \"unsigned __int64 __fastcall gen_muldiv ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; if ( @@a2@@ > Number ) { if ( @@a2@@ - Number > Number ) { LABEL_6 : @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; goto LABEL_7 ; } } else if ( @@a2@@ < Number ) { goto LABEL_6 ; } @@v7@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v8@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; LABEL_7 : gen_load_gpr ( @@v7@@ , @@a3@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { @@v9@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v9@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v10@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v9@@ , @@v9@@ , @@v10@@ ) ; tcg_gen_concat32_i64 ( @@v10@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v9@@ , @@v10@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v9@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v9@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v11@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v12@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v11@@ , @@v11@@ , @@v12@@ ) ; tcg_gen_concat32_i64 ( @@v12@@ , cpu_LO , cpu_HI ) ; tcg_gen_sub_i64 ( @@v11@@ , @@v12@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v11@@ ) ; tcg_gen_shri_i64 ( @@v11@@ , @@v11@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v11@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ == Number ) { @@v13@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v13@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v14@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_gen_concat32_i64 ( @@v14@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v13@@ ) ; tcg_gen_shri_i64 ( @@v13@@ , @@v13@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v13@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } if ( @@a2@@ > Number ) goto LABEL_29 ; if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) { @@v15@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v15@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v16@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_gen_concat32_i64 ( @@v16@@ , cpu_LO , cpu_HI ) ; tcg_gen_add_i64 ( @@v15@@ , @@v15@@ , @@v16@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v15@@ ) ; tcg_gen_shri_i64 ( @@v15@@ , @@v15@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v15@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; goto LABEL_30 ; } LABEL_29 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_30 ; } if ( @@a2@@ < Number ) goto LABEL_29 ; switch ( @@a2@@ ) { case Number : @@v25@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_mov_i64 ( @@v25@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v26@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v25@@ , @@v25@@ , @@v26@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v25@@ ) ; tcg_gen_shri_i64 ( @@v25@@ , @@v25@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v25@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v23@@ = tcg_temp_new_i64 ( @@v8@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_mov_i64 ( @@v23@@ , @@v7@@ ) ; tcg_gen_mov_i64 ( @@v24@@ , @@v8@@ ) ; tcg_gen_mul_i64 ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; tcg_gen_mov_i64 ( @@v7@@ , @@v23@@ ) ; tcg_gen_shri_i64 ( @@v23@@ , @@v23@@ , Number L ) ; tcg_gen_mov_i64 ( @@v8@@ , @@v23@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_ext32s_i64 ( cpu_HI , @@v8@@ ) ; break ; case Number : @@v21@@ = gen_new_label ( @@v8@@ ) ; @@v22@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32s_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32s_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v21@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v22@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v22@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v21@@ ) ; gen_set_label ( @@v22@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v21@@ ) ; break ; case Number : @@v20@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_ext32u_i64 ( @@v7@@ , @@v7@@ ) ; tcg_gen_ext32u_i64 ( @@v8@@ , @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v20@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; tcg_gen_ext32s_i64 ( cpu_LO , cpu_LO ) ; tcg_gen_ext32s_i64 ( cpu_HI , cpu_HI ) ; gen_set_label ( @@v20@@ ) ; break ; case Number : gen_helper_dmult ( @@v7@@ , @@v8@@ ) ; break ; case Number : gen_helper_dmultu ( @@v7@@ , @@v8@@ ) ; break ; case Number : @@v18@@ = gen_new_label ( @@v8@@ ) ; @@v19@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v18@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v7@@ , Number , @@v19@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number , @@v19@@ ) ; tcg_gen_mov_i64 ( cpu_LO , @@v7@@ ) ; tcg_gen_movi_i64 ( cpu_HI , Number L ) ; tcg_gen_br ( @@v18@@ ) ; gen_set_label ( @@v19@@ ) ; tcg_gen_div_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_rem_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v18@@ ) ; break ; case Number : @@v17@@ = gen_new_label ( @@v8@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v8@@ , Number L , @@v17@@ ) ; tcg_gen_divu_i64 ( cpu_LO , @@v7@@ , @@v8@@ ) ; tcg_gen_remu_i64 ( cpu_HI , @@v7@@ , @@v8@@ ) ; gen_set_label ( @@v17@@ ) ; break ; default : goto LABEL_29 ; } LABEL_30 : tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s88\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"gen_mul_vr54xx\", \"code\": \"unsigned __int64 __fastcall gen_mul_vr54xx ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ == Number ) { gen_helper_msachiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_msachi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_macchiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_macchi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_mulshiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_mulshi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_mulhiu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_mulhi ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_msacu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { gen_helper_msac ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ == Number ) { gen_helper_maccu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; goto LABEL_37 ; } if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : gen_helper_macc ( @@v9@@ , @@v9@@ , @@v10@@ ) ; break ; case Number : gen_helper_muls ( @@v9@@ , @@v9@@ , @@v10@@ ) ; break ; case Number : gen_helper_mulsu ( @@v9@@ , @@v9@@ , @@v10@@ ) ; break ; default : goto LABEL_36 ; } LABEL_37 : gen_store_gpr ( @@v9@@ , @@a3@@ ) ; goto LABEL_38 ; } } } } } } LABEL_36 : generate_exception ( @@a1@@ , Number ) ; LABEL_38 : tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cl\", \"code\": \"unsigned __int64 __fastcall gen_cl ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a4@@ ) ; if ( @@a2@@ == Number ) { gen_helper_dclo ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; } else if ( @@a2@@ <= Number ) { switch ( @@a2@@ ) { case Number : gen_helper_dclz ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; case Number : gen_helper_clz ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; case Number : gen_helper_clo ( cpu_gpr [ @@a3@@ ] , @@v7@@ ) ; break ; } } tcg_temp_free_i64 ( @@v7@@ ) ; } return __readfsqword ( Number ) ^ @@v8@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_loongson_integer\", \"code\": \"unsigned __int64 __fastcall gen_loongson_integer ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; int @@v14@@ ; int @@v15@@ ; int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; int @@v28@@ ; int @@v29@@ ; int @@v30@@ ; unsigned __int64 @@v31@@ ; @@v31@@ = __readfsqword ( Number ) ; if ( ! @@a3@@ ) return __readfsqword ( Number ) ^ @@v31@@ ; if ( @@a2@@ > Number ) goto LABEL_9 ; if ( @@a2@@ < Number ) { if ( @@a2@@ > Number ) { if ( @@a2@@ - Number > Number ) { LABEL_9 : @@v9@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; goto LABEL_10 ; } } else if ( @@a2@@ < Number ) { goto LABEL_9 ; } } @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = tcg_temp_new_i64 ( @@a1@@ ) ; LABEL_10 : gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_load_gpr ( @@v10@@ , @@a5@@ ) ; if ( @@a2@@ > Number ) { if ( @@a2@@ <= Number && @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : LABEL_18 : tcg_gen_mul_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; break ; case Number : LABEL_19 : tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_mul_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; break ; case Number : LABEL_20 : @@v28@@ = gen_new_label ( @@v10@@ ) ; @@v29@@ = gen_new_label ( @@v10@@ ) ; @@v30@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32s_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32s_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v28@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v30@@ ) ; gen_set_label ( @@v28@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v29@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v29@@ ) ; tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ ) ; tcg_gen_br ( @@v30@@ ) ; gen_set_label ( @@v29@@ ) ; tcg_gen_div_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v30@@ ) ; break ; case Number : LABEL_21 : @@v23@@ = gen_new_label ( @@v10@@ ) ; @@v24@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v23@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v24@@ ) ; gen_set_label ( @@v23@@ ) ; tcg_gen_divu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v24@@ ) ; break ; case Number : case Number : LABEL_24 : tcg_gen_mul_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; break ; case Number : LABEL_25 : @@v25@@ = gen_new_label ( @@v10@@ ) ; @@v26@@ = gen_new_label ( @@v10@@ ) ; @@v27@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v25@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v27@@ ) ; gen_set_label ( @@v25@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v26@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v26@@ ) ; tcg_gen_mov_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ ) ; tcg_gen_br ( @@v27@@ ) ; gen_set_label ( @@v26@@ ) ; tcg_gen_div_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v27@@ ) ; break ; case Number : LABEL_26 : @@v21@@ = gen_new_label ( @@v10@@ ) ; @@v22@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v21@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v22@@ ) ; gen_set_label ( @@v21@@ ) ; tcg_gen_divu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v22@@ ) ; break ; case Number : LABEL_22 : @@v18@@ = gen_new_label ( @@v10@@ ) ; @@v19@@ = gen_new_label ( @@v10@@ ) ; @@v20@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v18@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v19@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v19@@ ) ; gen_set_label ( @@v18@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v20@@ ) ; gen_set_label ( @@v19@@ ) ; tcg_gen_rem_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v20@@ ) ; break ; case Number : LABEL_23 : @@v13@@ = gen_new_label ( @@v10@@ ) ; @@v14@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_ext32u_i64 ( @@v9@@ , @@v9@@ ) ; tcg_gen_ext32u_i64 ( @@v10@@ , @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v13@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v14@@ ) ; gen_set_label ( @@v13@@ ) ; tcg_gen_remu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a3@@ ] , cpu_gpr [ @@a3@@ ] ) ; gen_set_label ( @@v14@@ ) ; break ; case Number : LABEL_27 : @@v15@@ = gen_new_label ( @@v10@@ ) ; @@v16@@ = gen_new_label ( @@v10@@ ) ; @@v17@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v15@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v9@@ , Number , @@v16@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number , @@v16@@ ) ; gen_set_label ( @@v15@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v17@@ ) ; gen_set_label ( @@v16@@ ) ; tcg_gen_rem_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v17@@ ) ; break ; case Number : LABEL_28 : @@v11@@ = gen_new_label ( @@v10@@ ) ; @@v12@@ = gen_new_label ( @@v10@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v10@@ , Number L , @@v11@@ ) ; tcg_gen_movi_i64 ( cpu_gpr [ @@a3@@ ] , Number L ) ; tcg_gen_br ( @@v12@@ ) ; gen_set_label ( @@v11@@ ) ; tcg_gen_remu_i64 ( cpu_gpr [ @@a3@@ ] , @@v9@@ , @@v10@@ ) ; gen_set_label ( @@v12@@ ) ; break ; default : break ; } } } else if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : goto LABEL_18 ; case Number : case Number : goto LABEL_24 ; case Number : goto LABEL_19 ; case Number : goto LABEL_20 ; case Number : goto LABEL_25 ; case Number : goto LABEL_21 ; case Number : goto LABEL_26 ; case Number : goto LABEL_22 ; case Number : goto LABEL_27 ; case Number : goto LABEL_23 ; case Number : goto LABEL_28 ; default : break ; } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v31@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s104\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s88\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"gen_trap\", \"code\": \"unsigned __int64 __fastcall gen_trap ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { __int64 @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned __int64 @@v14@@ ; @@v9@@ = @@a1@@ ; @@v14@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v10@@ = Number ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) goto LABEL_20 ; if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ == Number ) { LABEL_20 : if ( @@a3@@ || @@a5@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; tcg_gen_movi_i64 ( @@v12@@ , @@a5@@ ) ; @@v10@@ = Number ; } } else { if ( @@a2@@ > Number ) goto LABEL_22 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_22 ; } else if ( @@a2@@ < Number ) { goto LABEL_22 ; } if ( @@a3@@ != @@a4@@ ) { gen_load_gpr ( @@v11@@ , @@a3@@ ) ; @@a1@@ = @@v12@@ ; gen_load_gpr ( @@v12@@ , @@a4@@ ) ; @@v10@@ = Number ; } } LABEL_22 : if ( @@v10@@ ) { @@v13@@ = gen_new_label ( @@a1@@ ) ; if ( @@a2@@ == Number ) { LABEL_64 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_59 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_63 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_62 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { LABEL_61 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ > Number ) { if ( @@a2@@ == Number ) LABEL_60 : tcg_gen_brcond_i64 ( Number , @@v11@@ , @@v12@@ , @@v13@@ ) ; } else if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case String : goto LABEL_60 ; case String : goto LABEL_61 ; case String : goto LABEL_62 ; case String : goto LABEL_63 ; case String : goto LABEL_59 ; case String : goto LABEL_64 ; default : break ; } } } } } } } generate_exception ( @@v9@@ , Number ) ; gen_set_label ( @@v13@@ ) ; } else if ( @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ != Number && @@a2@@ <= Number && ( @@a2@@ == Number || @@a2@@ <= Number && @@a2@@ <= Number && @@a2@@ >= Number ) ) ) ) ) { generate_exception ( @@v9@@ , Number ) ; } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; return __readfsqword ( Number ) ^ @@v14@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_goto_tb\", \"code\": \"unsigned __int64 __fastcall gen_goto_tb ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v5@@ ; _QWORD * @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = * ( _QWORD * * ) @@a1@@ ; if ( ( ( @@a3@@ ^ * * ( _QWORD * * ) @@a1@@ ) & Number ) != Number || * ( _DWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( @@a3@@ ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { save_cpu_state ( @@a1@@ , Number ) ; @@v5@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; } tcg_gen_exit_tb ( Number L ) ; } else { tcg_gen_goto_tb ( @@a2@@ ) ; gen_save_pc ( @@a3@@ ) ; tcg_gen_exit_tb ( ( __int64 ) @@v6@@ + @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 3, \"t\": \"_QWORD\"}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { int v6 ; int v7 ; int v8 ; int v9 ; __int64 v10 ; int v11 ; int v12 ; int v13 ; int v14 ; int v15 ; int v16 ; int v17 ; int v18 ; int v19 ; int v20 ; int v21 ; int v22 ; int v23 ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned __int64 @@v34@@ ; unsigned __int64 @@v35@@ ; @@v35@@ = __readfsqword ( Number ) ; @@v34@@ = Number ; @@v29@@ = Number ; @@v30@@ = Number ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_56 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_56 : if ( @@a4@@ != @@a5@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; gen_load_gpr ( @@v33@@ , @@a5@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_62 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_62 : @@v34@@ = @@a6@@ | ( * ( _QWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) & Number ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) goto LABEL_59 ; if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { LABEL_59 : if ( @@a4@@ ) { gen_load_gpr ( @@v32@@ , @@a4@@ ) ; @@v30@@ = Number ; } @@v34@@ = @@a3@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( int ) @@a6@@ ; goto LABEL_67 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ != Number ) { if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ > Number ) { if ( @@a2@@ != Number ) goto LABEL_2 ; } else if ( @@a2@@ < Number ) { LABEL_2 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_175 ; } } if ( @@a6@@ && @@a6@@ != Number ) goto LABEL_2 ; gen_load_gpr ( btarget , @@a4@@ ) ; LABEL_67 : if ( @@v30@@ ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; goto LABEL_166 ; } if ( @@a2@@ == Number ) { tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } if ( @@a2@@ != Number ) { switch ( @@a2@@ ) { case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; break ; case Number : tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; default : if ( @@a2@@ > Number ) goto LABEL_2 ; if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; goto LABEL_166 ; } if ( @@a2@@ == Number || @@a2@@ == Number ) { if ( @@a2@@ == Number ) v18 = Number ; else v18 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v18 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } else { if ( @@a2@@ != Number && @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) { if ( @@a2@@ == Number ) { tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } else { if ( @@a2@@ != Number ) goto LABEL_2 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } break ; } tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; } LABEL_166 : v21 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v21 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v21 ; goto LABEL_168 ; } if ( @@a2@@ == Number ) v19 = Number ; else v19 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v19 ; tcg_gen_setcondi_i64 ( Number , bcond , @@v32@@ , Number L ) ; @@v29@@ = Number ; } break ; } v20 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v20 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v20 ; goto LABEL_168 ; } tcg_gen_setcond_i64 ( Number , bcond , @@v32@@ , @@v33@@ ) ; goto LABEL_166 ; } switch ( @@a2@@ ) { case Number : case Number : * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; LABEL_111 : @@v29@@ = Number ; v13 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v13 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v13 ; if ( @@a2@@ == Number || @@a2@@ == Number ) v14 = Number ; else v14 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v14 ; break ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_108 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; case Number : LABEL_95 : v6 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v6 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v6 ; break ; case Number : case Number : goto LABEL_111 ; case Number : v12 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v12 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v12 ; break ; case Number : goto LABEL_96 ; case Number : tcg_gen_movi_i64 ( dword_29DDC , * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : case Number : LABEL_96 : if ( @@a2@@ == Number ) v7 = Number ; else v7 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v7 ; @@v29@@ = Number ; v8 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v8 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v8 ; break ; case Number : case Number : if ( @@a2@@ == Number ) v9 = Number ; else v9 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v9 ; @@v29@@ = Number ; if ( @@a2@@ == Number ) v10 = Number L ; else v10 = Number L ; @@v34@@ = v10 + * ( _QWORD * ) ( @@a1@@ + Number ) ; v11 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v11 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v11 ; break ; case Number : goto LABEL_95 ; case Number : LABEL_108 : * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; goto LABEL_175 ; case Number : goto LABEL_95 ; case Number : goto LABEL_175 ; default : if ( @@a2@@ == Number || @@a2@@ == Number || @@a2@@ != Number ) { @@v29@@ = @@a5@@ ; v16 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v16 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v16 ; if ( @@a2@@ == Number ) v17 = Number ; else v17 = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= v17 ; } else { v15 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v15 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v15 ; if ( @@a3@@ == Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; } break ; } LABEL_168 : * ( _QWORD * ) ( @@a1@@ + Number ) = @@v34@@ ; if ( @@v29@@ > Number ) { @@v31@@ = @@a3@@ ; if ( @@a2@@ != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v22 = Number ; else v22 = Number ; @@v31@@ = v22 + @@a3@@ ; } tcg_gen_movi_i64 ( cpu_gpr [ @@v29@@ ] , @@v31@@ + * ( _QWORD * ) ( @@a1@@ + Number ) + ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) ) ; } LABEL_175 : if ( @@a3@@ == Number ) { v23 = * ( _DWORD * ) ( @@a1@@ + Number ) ; BYTE1 ( v23 ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = v23 ; } tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; return __readfsqword ( Number ) ^ @@v35@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_bitops\", \"code\": \"unsigned __int64 __fastcall gen_bitops ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { int v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; __int64 v15 ; __int64 v16 ; __int64 v17 ; __int64 v18 ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; switch ( @@a2@@ ) { case Number : if ( @@a5@@ + @@a6@@ > Number ) goto LABEL_24 ; tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; if ( @@a6@@ == Number ) tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; else tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number << ( @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; if ( @@a6@@ != Number ) tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ + Number ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : tcg_gen_shri_i64 ( @@v13@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ( Number L << ( ( unsigned __int8 ) @@a6@@ + Number ) ) - Number ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; if ( @@a6@@ - @@a5@@ > Number ) v6 = Number ; else v6 = ( Number << ( @@a6@@ - @@a5@@ + Number ) ) - Number ; v15 = v6 << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v15 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v15 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; tcg_gen_ext32s_i64 ( @@v13@@ , @@v13@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; if ( @@a6@@ - @@a5@@ > Number ) v7 = Number ; else v7 = ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ; v16 = v7 << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v16 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v16 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; v17 = ( ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ) << ( ( unsigned __int8 ) @@a5@@ + Number ) ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v17 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ + Number ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v17 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; goto LABEL_25 ; case Number : if ( @@a5@@ > @@a6@@ ) goto LABEL_24 ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; v18 = ( ( Number L << ( ( unsigned __int8 ) @@a6@@ - ( unsigned __int8 ) @@a5@@ + Number ) ) - Number ) << @@a5@@ ; gen_load_gpr ( @@v13@@ , @@a3@@ ) ; tcg_gen_andi_i64 ( @@v13@@ , @@v13@@ , ~ v18 ) ; tcg_gen_shli_i64 ( @@v14@@ , @@v14@@ , @@a5@@ ) ; tcg_gen_andi_i64 ( @@v14@@ , @@v14@@ , v18 ) ; tcg_gen_or_i64 ( @@v13@@ , @@v13@@ , @@v14@@ ) ; LABEL_25 : gen_store_gpr ( @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; default : LABEL_24 : generate_exception ( @@a1@@ , Number ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; break ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_bshfl\", \"code\": \"unsigned __int64 __fastcall gen_bshfl ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( @@a4@@ ) { @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v7@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { tcg_gen_ext16s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { tcg_gen_ext8s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { @@v8@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v8@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v8@@ , @@v8@@ , Number ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( @@v7@@ , @@v7@@ , @@v8@@ ) ; tcg_gen_shri_i64 ( @@v8@@ , @@v7@@ , Number L ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_or_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ , @@v8@@ ) ; tcg_temp_free_i64 ( @@v8@@ ) ; goto LABEL_17 ; } if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { @@v10@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v10@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v10@@ , @@v10@@ , Number L ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( @@v7@@ , @@v7@@ , @@v10@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_16 ; @@v9@@ = tcg_temp_new_i64 ( @@v7@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v9@@ , @@v9@@ , Number ) ; tcg_gen_shli_i64 ( @@v7@@ , @@v7@@ , Number L ) ; tcg_gen_andi_i64 ( @@v7@@ , @@v7@@ , Number ) ; tcg_gen_or_i64 ( cpu_gpr [ @@a4@@ ] , @@v7@@ , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } LABEL_17 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } } } LABEL_16 : generate_exception ( @@a1@@ , Number ) ; tcg_temp_free_i64 ( @@v7@@ ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cp0\", \"code\": \"unsigned __int64 __fastcall gen_cp0 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ >= Number ) { switch ( @@a3@@ ) { case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbr ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbwi ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbwr ( ) ; break ; case Number : if ( ! * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) ) goto LABEL_34 ; gen_helper_tlbp ( ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_eret ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) goto LABEL_34 ; gen_helper_deret ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; * ( _QWORD * ) ( @@a2@@ + Number ) += Number L ; save_cpu_state ( @@a2@@ , Number ) ; * ( _QWORD * ) ( @@a2@@ + Number ) -= Number L ; gen_helper_wait ( ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; break ; default : goto LABEL_34 ; } } else if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mttr ( @@a1@@ , @@a2@@ , @@a5@@ , @@a4@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( @@a5@@ ) gen_mftr ( @@a1@@ , @@a2@@ , @@a4@@ , @@a5@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v8@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v8@@ , @@a4@@ ) ; gen_dmtc0 ( @@a1@@ , @@a2@@ , @@v8@@ , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; tcg_temp_free_i64 ( @@v8@@ ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { @@v9@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v9@@ , @@a4@@ ) ; gen_mtc0 ( @@a1@@ , @@a2@@ , @@v9@@ , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; tcg_temp_free_i64 ( @@v9@@ ) ; } else { if ( @@a3@@ > Number ) goto LABEL_34 ; if ( @@a3@@ == Number ) { if ( @@a4@@ ) gen_mfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a4@@ ] , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; } else { if ( @@a3@@ != Number ) { LABEL_34 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v10@@ ; } check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( @@a4@@ ) gen_dmfc0 ( @@a1@@ , @@a2@@ , cpu_gpr [ @@a4@@ ] , @@a5@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; } } } } } return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_compute_branch1\", \"code\": \"unsigned __int64 __fastcall gen_compute_branch1 ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; unsigned int v16 ; unsigned int v17 ; unsigned int v18 ; unsigned int v19 ; unsigned int v20 ; unsigned int v21 ; int v22 ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; __int64 @@v32@@ ; unsigned __int64 @@v33@@ ; @@v33@@ = __readfsqword ( Number ) ; @@v27@@ = tcg_temp_new_i32 ( @@a1@@ ) ; if ( @@a4@@ ) check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v32@@ = * ( _QWORD * ) ( @@a2@@ + Number ) + @@a5@@ + Number L ; if ( @@a3@@ == Number ) { @@v28@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v18 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v18 ) ; v19 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v19 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; v20 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v20 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; v21 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v28@@ , fpu_fcr31 , v21 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v29@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v14 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v14 ) ; v15 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v15 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; v16 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v16 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; v17 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v29@@ , fpu_fcr31 , v17 ) ; tcg_gen_nor_i32 ( @@v27@@ , @@v27@@ , @@v29@@ ) ; tcg_temp_free_i32 ( @@v29@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v30@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v12 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v12 ) ; v13 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v30@@ , fpu_fcr31 , v13 ) ; tcg_gen_or_i32 ( @@v27@@ , @@v27@@ , @@v30@@ ) ; tcg_temp_free_i32 ( @@v30@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_27 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { @@v31@@ = tcg_temp_new_i32 ( @@a1@@ ) ; v10 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v10 ) ; v11 = get_fp_bit ( @@a4@@ + Number ) ; tcg_gen_shri_i32 ( @@v31@@ , fpu_fcr31 , v11 ) ; tcg_gen_nor_i32 ( @@v27@@ , @@v27@@ , @@v31@@ ) ; tcg_temp_free_i32 ( @@v31@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; LABEL_27 : v22 = * ( _DWORD * ) ( @@a2@@ + Number ) ; BYTE1 ( v22 ) |= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = v22 ; goto LABEL_29 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { v8 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v8 ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; goto LABEL_22 ; } if ( @@a3@@ > Number ) goto LABEL_28 ; if ( @@a3@@ == Number ) { v6 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v6 ) ; tcg_gen_not_i32 ( @@v27@@ , @@v27@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; LABEL_22 : v9 = * ( _DWORD * ) ( @@a2@@ + Number ) ; BYTE1 ( v9 ) |= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = v9 ; LABEL_29 : * ( _QWORD * ) ( @@a2@@ + Number ) = @@v32@@ ; goto LABEL_30 ; } if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { v5 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v5 ) ; tcg_gen_not_i32 ( @@v27@@ , @@v27@@ ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; } else { if ( @@a3@@ != Number ) goto LABEL_28 ; v7 = get_fp_bit ( @@a4@@ ) ; tcg_gen_shri_i32 ( @@v27@@ , fpu_fcr31 , v7 ) ; tcg_gen_andi_i32 ( @@v27@@ , @@v27@@ , Number ) ; tcg_gen_extu_i32_i64 ( bcond , @@v27@@ ) ; } goto LABEL_27 ; } LABEL_28 : generate_exception ( @@a2@@ , Number ) ; LABEL_30 : tcg_temp_free_i32 ( @@v27@@ ) ; return __readfsqword ( Number ) ^ @@v33@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_cp1\", \"code\": \"unsigned __int64 __fastcall gen_cp1 ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , unsigned int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned __int64 @@v14@@ ; @@v14@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v8@@ = tcg_temp_new_i32 ( @@v7@@ ) ; tcg_gen_trunc_i64_i32 ( @@v8@@ , @@v7@@ ) ; gen_store_fpr32h ( @@v8@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v9@@ = tcg_const_i32 ( @@a4@@ ) ; gen_helper_ctc1 ( @@v7@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v7@@ , @@a4@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { gen_load_gpr ( @@v7@@ , @@a3@@ ) ; @@v10@@ = tcg_temp_new_i32 ( @@v7@@ ) ; tcg_gen_trunc_i64_i32 ( @@v10@@ , @@v7@@ ) ; gen_store_fpr32 ( @@v10@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { @@v11@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v11@@ , @@a4@@ ) ; tcg_gen_ext_i32_i64 ( @@v7@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) goto LABEL_24 ; if ( @@a2@@ == Number ) { @@v12@@ = tcg_const_i32 ( @@a4@@ ) ; gen_helper_cfc1 ( @@v7@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; goto LABEL_25 ; } if ( @@a2@@ > Number ) { LABEL_24 : generate_exception ( @@a1@@ , Number ) ; goto LABEL_25 ; } if ( @@a2@@ == Number ) { @@v13@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v13@@ , @@a4@@ ) ; tcg_gen_ext_i32_i64 ( @@v7@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { if ( @@a2@@ != Number ) goto LABEL_24 ; gen_load_fpr64 ( @@a1@@ , @@v7@@ , @@a4@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } LABEL_25 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v14@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_movci\", \"code\": \"unsigned __int64 __fastcall gen_movci ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { char @@v5@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; if ( @@a2@@ ) { @@v10@@ = gen_new_label ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v5@@ = get_fp_bit ( @@a4@@ ) ; tcg_gen_andi_i32 ( @@v11@@ , fpu_fcr31 , Number << @@v5@@ ) ; tcg_gen_brcondi_i32 ( @@a5@@ == Number , @@v11@@ , Number , @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; if ( @@a3@@ ) tcg_gen_mov_i64 ( cpu_gpr [ @@a2@@ ] , cpu_gpr [ @@a3@@ ] ) ; else tcg_gen_movi_i64 ( cpu_gpr [ @@a2@@ ] , Number L ) ; gen_set_label ( @@v10@@ ) ; } return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r8\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_farith\", \"code\": \"unsigned __int64 __fastcall gen_farith ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , unsigned int @@a4@@ , int @@a5@@ , unsigned int @@a6@@ ) { __int64 @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; unsigned int @@v32@@ ; int @@v33@@ ; unsigned int @@v34@@ ; int @@v35@@ ; unsigned int @@v36@@ ; unsigned int @@v37@@ ; unsigned int @@v38@@ ; unsigned int @@v39@@ ; unsigned int @@v40@@ ; unsigned int @@v41@@ ; unsigned int @@v42@@ ; unsigned int @@v43@@ ; unsigned int @@v44@@ ; unsigned int @@v45@@ ; unsigned int @@v46@@ ; unsigned int @@v47@@ ; unsigned int @@v48@@ ; unsigned int @@v49@@ ; unsigned int @@v50@@ ; unsigned int @@v51@@ ; unsigned int @@v52@@ ; unsigned int @@v53@@ ; unsigned int @@v54@@ ; unsigned int @@v55@@ ; unsigned int @@v56@@ ; unsigned int @@v57@@ ; unsigned int @@v58@@ ; unsigned int @@v59@@ ; unsigned int @@v60@@ ; unsigned int @@v61@@ ; unsigned int @@v62@@ ; unsigned int @@v63@@ ; unsigned int @@v64@@ ; unsigned int @@v65@@ ; int @@v66@@ ; unsigned int @@v67@@ ; int @@v68@@ ; unsigned int @@v69@@ ; unsigned int @@v70@@ ; unsigned int @@v71@@ ; unsigned int @@v72@@ ; unsigned int @@v73@@ ; unsigned int @@v74@@ ; unsigned int @@v75@@ ; unsigned int @@v76@@ ; unsigned int @@v77@@ ; unsigned int @@v78@@ ; unsigned int @@v79@@ ; unsigned int @@v80@@ ; unsigned int @@v81@@ ; unsigned int @@v82@@ ; unsigned int @@v83@@ ; unsigned int @@v84@@ ; unsigned int @@v85@@ ; unsigned int @@v86@@ ; unsigned int @@v87@@ ; unsigned int @@v88@@ ; unsigned int @@v89@@ ; unsigned int @@v90@@ ; unsigned int @@v91@@ ; unsigned int @@v92@@ ; unsigned int @@v93@@ ; unsigned int @@v94@@ ; unsigned int @@v95@@ ; unsigned int @@v96@@ ; unsigned int @@v97@@ ; unsigned int @@v98@@ ; unsigned int @@v99@@ ; unsigned int @@v100@@ ; unsigned int @@v101@@ ; unsigned int @@v102@@ ; unsigned int @@v103@@ ; unsigned int @@v104@@ ; unsigned int @@v105@@ ; unsigned int @@v106@@ ; unsigned int @@v107@@ ; unsigned int @@v108@@ ; unsigned int @@v109@@ ; int @@v110@@ ; unsigned int @@v111@@ ; int @@v112@@ ; unsigned int @@v113@@ ; unsigned int @@v114@@ ; unsigned int @@v115@@ ; unsigned int @@v116@@ ; unsigned int @@v117@@ ; unsigned int @@v118@@ ; unsigned int @@v119@@ ; unsigned int @@v120@@ ; unsigned int @@v121@@ ; unsigned int @@v122@@ ; unsigned int @@v123@@ ; unsigned int @@v124@@ ; unsigned int @@v125@@ ; unsigned int @@v126@@ ; unsigned int @@v127@@ ; unsigned int @@v128@@ ; unsigned int @@v129@@ ; unsigned int @@v130@@ ; unsigned int @@v131@@ ; unsigned int @@v132@@ ; unsigned int @@v133@@ ; unsigned int @@v134@@ ; unsigned int @@v135@@ ; unsigned int @@v136@@ ; unsigned int @@v137@@ ; unsigned __int64 @@v138@@ ; @@v10@@ = @@a1@@ ; @@v138@@ = __readfsqword ( Number ) ; @@v11@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ >= Number ) { switch ( @@a2@@ ) { case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v44@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v45@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v44@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v45@@ , @@a3@@ ) ; gen_helper_float_add_ps ( @@v44@@ , @@v44@@ , @@v45@@ ) ; tcg_temp_free_i64 ( @@v45@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v44@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v44@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v42@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v43@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v42@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v43@@ , @@a3@@ ) ; gen_helper_float_sub_ps ( @@v42@@ , @@v42@@ , @@v43@@ ) ; tcg_temp_free_i64 ( @@v43@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v42@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v42@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v40@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v41@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v40@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v41@@ , @@a3@@ ) ; gen_helper_float_mul_ps ( @@v40@@ , @@v40@@ , @@v41@@ ) ; tcg_temp_free_i64 ( @@v41@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v40@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v40@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v39@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v39@@ , @@a4@@ ) ; gen_helper_float_abs_ps ( @@v39@@ , @@v39@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v39@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v39@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v38@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v38@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v38@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v38@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v37@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v37@@ , @@a4@@ ) ; gen_helper_float_chs_ps ( @@v37@@ , @@v37@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v37@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v37@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; gen_movcf_ps ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v35@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v35@@ ) ; } @@v36@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v36@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v36@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v36@@ ) ; gen_set_label ( @@v35@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v33@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v33@@ ) ; @@v34@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v34@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v34@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v34@@ ) ; gen_set_label ( @@v33@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v31@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v31@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v32@@ , @@a4@@ ) ; gen_helper_float_addr_ps ( @@v31@@ , @@v31@@ , @@v32@@ ) ; tcg_temp_free_i64 ( @@v32@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v31@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v31@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v29@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v30@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v29@@ , @@a3@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v30@@ , @@a4@@ ) ; gen_helper_float_mulr_ps ( @@v29@@ , @@v29@@ , @@v30@@ ) ; tcg_temp_free_i64 ( @@v30@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v29@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v29@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v27@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v28@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v27@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v28@@ , @@a5@@ ) ; gen_helper_float_recip2_ps ( @@v27@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i64 ( @@v28@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v27@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v27@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v26@@ , @@a4@@ ) ; gen_helper_float_recip1_ps ( @@v26@@ , @@v26@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v26@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v25@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_ps ( @@v25@@ , @@v25@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v25@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v23@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v24@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_ps ( @@v23@@ , @@v23@@ , @@v24@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v23@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v22@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v22@@ , @@a4@@ ) ; gen_helper_float_cvts_pu ( @@v22@@ , @@v22@@ ) ; gen_store_fpr32 ( @@v22@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v22@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v21@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v21@@ , @@a4@@ ) ; gen_helper_float_cvtpw_ps ( @@v21@@ , @@v21@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v21@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v20@@ , @@a4@@ ) ; gen_helper_float_cvts_pl ( @@v20@@ , @@v20@@ ) ; gen_store_fpr32 ( @@v20@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v20@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v18@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v19@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v18@@ , @@a5@@ ) ; gen_store_fpr32 ( @@v19@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v17@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v16@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v17@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v17@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v16@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v14@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v15@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v15@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v14@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v13@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32h ( @@v12@@ , @@a4@@ ) ; gen_load_fpr32h ( @@v13@@ , @@a3@@ ) ; gen_store_fpr32 ( @@v13@@ , @@a5@@ ) ; gen_store_fpr32h ( @@v12@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_ps ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v46@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v46@@ , @@a4@@ ) ; gen_helper_float_cvtd_l ( @@v46@@ , @@v46@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v46@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v46@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v47@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v48@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v48@@ , @@a4@@ ) ; gen_helper_float_cvts_l ( @@v47@@ , @@v48@@ ) ; tcg_temp_free_i64 ( @@v48@@ ) ; gen_store_fpr32 ( @@v47@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v47@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { check_cp1_64bitmode ( @@a1@@ ) ; @@v49@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v49@@ , @@a4@@ ) ; gen_helper_float_cvtps_pw ( @@v49@@ , @@v49@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v49@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v49@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) goto LABEL_125 ; if ( @@a2@@ == Number ) { check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v50@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v51@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v50@@ , @@a4@@ ) ; gen_helper_float_cvtd_w ( @@v51@@ , @@v50@@ ) ; tcg_temp_free_i32 ( @@v50@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v51@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v51@@ ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ > Number ) { LABEL_125 : generate_exception ( @@a1@@ , Number ) ; return __readfsqword ( Number ) ^ @@v138@@ ; } if ( @@a2@@ == Number ) { @@v52@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v52@@ , @@a4@@ ) ; gen_helper_float_cvts_w ( @@v52@@ , @@v52@@ ) ; gen_store_fpr32 ( @@v52@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v52@@ ) ; } else if ( @@a2@@ > Number ) { if ( @@a2@@ > Number || @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v92@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v93@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v92@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v93@@ , @@a3@@ ) ; gen_helper_float_add_d ( @@v92@@ , @@v92@@ , @@v93@@ ) ; tcg_temp_free_i64 ( @@v93@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v92@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v92@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v90@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v91@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v90@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v91@@ , @@a3@@ ) ; gen_helper_float_sub_d ( @@v90@@ , @@v90@@ , @@v91@@ ) ; tcg_temp_free_i64 ( @@v91@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v90@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v90@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v88@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v89@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v88@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v89@@ , @@a3@@ ) ; gen_helper_float_mul_d ( @@v88@@ , @@v88@@ , @@v89@@ ) ; tcg_temp_free_i64 ( @@v89@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v88@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v88@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a3@@ | @@a4@@ ) ; @@v86@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v87@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v86@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v87@@ , @@a3@@ ) ; gen_helper_float_div_d ( @@v86@@ , @@v86@@ , @@v87@@ ) ; tcg_temp_free_i64 ( @@v87@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v86@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v86@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v85@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v85@@ , @@a4@@ ) ; gen_helper_float_sqrt_d ( @@v85@@ , @@v85@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v85@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v85@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v84@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v84@@ , @@a4@@ ) ; gen_helper_float_abs_d ( @@v84@@ , @@v84@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v84@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v84@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v83@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v83@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v83@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v83@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ | @@a4@@ ) ; @@v82@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v82@@ , @@a4@@ ) ; gen_helper_float_chs_d ( @@v82@@ , @@v82@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v82@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v82@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v81@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v81@@ , @@a4@@ ) ; gen_helper_float_roundl_d ( @@v81@@ , @@v81@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v81@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v81@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v80@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v80@@ , @@a4@@ ) ; gen_helper_float_truncl_d ( @@v80@@ , @@v80@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v80@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v80@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v79@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v79@@ , @@a4@@ ) ; gen_helper_float_ceill_d ( @@v79@@ , @@v79@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v79@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v79@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v78@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v78@@ , @@a4@@ ) ; gen_helper_float_floorl_d ( @@v78@@ , @@v78@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v78@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v78@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v76@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v77@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v77@@ , @@a4@@ ) ; gen_helper_float_roundw_d ( @@v76@@ , @@v77@@ ) ; tcg_temp_free_i64 ( @@v77@@ ) ; gen_store_fpr32 ( @@v76@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v76@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v74@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v75@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v75@@ , @@a4@@ ) ; gen_helper_float_truncw_d ( @@v74@@ , @@v75@@ ) ; tcg_temp_free_i64 ( @@v75@@ ) ; gen_store_fpr32 ( @@v74@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v74@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v72@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v73@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v73@@ , @@a4@@ ) ; gen_helper_float_ceilw_d ( @@v72@@ , @@v73@@ ) ; tcg_temp_free_i64 ( @@v73@@ ) ; gen_store_fpr32 ( @@v72@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v72@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v70@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v71@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v71@@ , @@a4@@ ) ; gen_helper_float_floorw_d ( @@v70@@ , @@v71@@ ) ; tcg_temp_free_i64 ( @@v71@@ ) ; gen_store_fpr32 ( @@v70@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v70@@ ) ; break ; case Number : gen_movcf_d ( @@a1@@ , @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v68@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v68@@ ) ; } @@v69@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@v10@@ , @@v69@@ , @@a4@@ ) ; gen_store_fpr64 ( @@v10@@ , @@v69@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v69@@ ) ; gen_set_label ( @@v68@@ ) ; break ; case Number : @@v66@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v66@@ ) ; @@v67@@ = tcg_temp_new_i64 ( Number L ) ; gen_load_fpr64 ( @@a1@@ , @@v67@@ , @@a4@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v67@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v67@@ ) ; gen_set_label ( @@v66@@ ) ; } break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v65@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v65@@ , @@a4@@ ) ; gen_helper_float_recip_d ( @@v65@@ , @@v65@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v65@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v65@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v64@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v64@@ , @@a4@@ ) ; gen_helper_float_rsqrt_d ( @@v64@@ , @@v64@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v64@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v64@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v62@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v63@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v62@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v63@@ , @@a3@@ ) ; gen_helper_float_recip2_d ( @@v62@@ , @@v62@@ , @@v63@@ ) ; tcg_temp_free_i64 ( @@v63@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v62@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v62@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v61@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v61@@ , @@a4@@ ) ; gen_helper_float_recip1_d ( @@v61@@ , @@v61@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v61@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v61@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v60@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v60@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_d ( @@v60@@ , @@v60@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v60@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v60@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v58@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v59@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v58@@ , @@a4@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v59@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_d ( @@v58@@ , @@v58@@ , @@v59@@ ) ; tcg_temp_free_i64 ( @@v59@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v58@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v58@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v56@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v57@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v57@@ , @@a4@@ ) ; gen_helper_float_cvts_d ( @@v56@@ , @@v57@@ ) ; tcg_temp_free_i64 ( @@v57@@ ) ; gen_store_fpr32 ( @@v56@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v56@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v54@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v55@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v55@@ , @@a4@@ ) ; gen_helper_float_cvtw_d ( @@v54@@ , @@v55@@ ) ; tcg_temp_free_i64 ( @@v55@@ ) ; gen_store_fpr32 ( @@v54@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v54@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v53@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v53@@ , @@a4@@ ) ; gen_helper_float_cvtl_d ( @@v53@@ , @@v53@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v53@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v53@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_d ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } else { if ( @@a2@@ < Number ) goto LABEL_125 ; switch ( @@a2@@ ) { case Number : @@v136@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v137@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v136@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v137@@ , @@a3@@ ) ; gen_helper_float_add_s ( @@v136@@ , @@v136@@ , @@v137@@ ) ; tcg_temp_free_i32 ( @@v137@@ ) ; gen_store_fpr32 ( @@v136@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v136@@ ) ; break ; case Number : @@v134@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v135@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v134@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v135@@ , @@a3@@ ) ; gen_helper_float_sub_s ( @@v134@@ , @@v134@@ , @@v135@@ ) ; tcg_temp_free_i32 ( @@v135@@ ) ; gen_store_fpr32 ( @@v134@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v134@@ ) ; break ; case Number : @@v132@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v133@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v132@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v133@@ , @@a3@@ ) ; gen_helper_float_mul_s ( @@v132@@ , @@v132@@ , @@v133@@ ) ; tcg_temp_free_i32 ( @@v133@@ ) ; gen_store_fpr32 ( @@v132@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v132@@ ) ; break ; case Number : @@v130@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v131@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v130@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v131@@ , @@a3@@ ) ; gen_helper_float_div_s ( @@v130@@ , @@v130@@ , @@v131@@ ) ; tcg_temp_free_i32 ( @@v131@@ ) ; gen_store_fpr32 ( @@v130@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v130@@ ) ; break ; case Number : @@v129@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v129@@ , @@a4@@ ) ; gen_helper_float_sqrt_s ( @@v129@@ , @@v129@@ ) ; gen_store_fpr32 ( @@v129@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v129@@ ) ; break ; case Number : @@v128@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v128@@ , @@a4@@ ) ; gen_helper_float_abs_s ( @@v128@@ , @@v128@@ ) ; gen_store_fpr32 ( @@v128@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v128@@ ) ; break ; case Number : @@v127@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v127@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v127@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v127@@ ) ; break ; case Number : @@v126@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v126@@ , @@a4@@ ) ; gen_helper_float_chs_s ( @@v126@@ , @@v126@@ ) ; gen_store_fpr32 ( @@v126@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v126@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v124@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v125@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v124@@ , @@a4@@ ) ; gen_helper_float_roundl_s ( @@v125@@ , @@v124@@ ) ; tcg_temp_free_i32 ( @@v124@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v125@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v125@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v122@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v123@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v122@@ , @@a4@@ ) ; gen_helper_float_truncl_s ( @@v123@@ , @@v122@@ ) ; tcg_temp_free_i32 ( @@v122@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v123@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v123@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v120@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v121@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v120@@ , @@a4@@ ) ; gen_helper_float_ceill_s ( @@v121@@ , @@v120@@ ) ; tcg_temp_free_i32 ( @@v120@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v121@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v121@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v118@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v119@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v118@@ , @@a4@@ ) ; gen_helper_float_floorl_s ( @@v119@@ , @@v118@@ ) ; tcg_temp_free_i32 ( @@v118@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v119@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v119@@ ) ; break ; case Number : @@v117@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v117@@ , @@a4@@ ) ; gen_helper_float_roundw_s ( @@v117@@ , @@v117@@ ) ; gen_store_fpr32 ( @@v117@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v117@@ ) ; break ; case Number : @@v116@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v116@@ , @@a4@@ ) ; gen_helper_float_truncw_s ( @@v116@@ , @@v116@@ ) ; gen_store_fpr32 ( @@v116@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v116@@ ) ; break ; case Number : @@v115@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v115@@ , @@a4@@ ) ; gen_helper_float_ceilw_s ( @@v115@@ , @@v115@@ ) ; gen_store_fpr32 ( @@v115@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v115@@ ) ; break ; case Number : @@v114@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v114@@ , @@a4@@ ) ; gen_helper_float_floorw_s ( @@v114@@ , @@v114@@ ) ; gen_store_fpr32 ( @@v114@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v114@@ ) ; break ; case Number : gen_movcf_s ( @@a4@@ , @@a5@@ , ( @@a3@@ >> Number ) & Number , @@a3@@ & Number ) ; break ; case Number : @@v112@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { @@a1@@ = Number L ; tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v112@@ ) ; } @@v113@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v113@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v113@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v113@@ ) ; gen_set_label ( @@v112@@ ) ; break ; case Number : @@v110@@ = gen_new_label ( @@a1@@ ) ; if ( @@a3@@ ) { tcg_gen_brcondi_i64 ( Number , cpu_gpr [ @@a3@@ ] , Number L , @@v110@@ ) ; @@v111@@ = tcg_temp_new_i32 ( Number L ) ; gen_load_fpr32 ( @@v111@@ , @@a4@@ ) ; gen_store_fpr32 ( @@v111@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v111@@ ) ; gen_set_label ( @@v110@@ ) ; } break ; case Number : check_cop1x ( @@a1@@ ) ; @@v109@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v109@@ , @@a4@@ ) ; gen_helper_float_recip_s ( @@v109@@ , @@v109@@ ) ; gen_store_fpr32 ( @@v109@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v109@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v108@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v108@@ , @@a4@@ ) ; gen_helper_float_rsqrt_s ( @@v108@@ , @@v108@@ ) ; gen_store_fpr32 ( @@v108@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v108@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v106@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v107@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v106@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v107@@ , @@a5@@ ) ; gen_helper_float_recip2_s ( @@v106@@ , @@v106@@ , @@v107@@ ) ; tcg_temp_free_i32 ( @@v107@@ ) ; gen_store_fpr32 ( @@v106@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v106@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v105@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v105@@ , @@a4@@ ) ; gen_helper_float_recip1_s ( @@v105@@ , @@v105@@ ) ; gen_store_fpr32 ( @@v105@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v105@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v104@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v104@@ , @@a4@@ ) ; gen_helper_float_rsqrt1_s ( @@v104@@ , @@v104@@ ) ; gen_store_fpr32 ( @@v104@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v104@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v102@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v103@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v102@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v103@@ , @@a3@@ ) ; gen_helper_float_rsqrt2_s ( @@v102@@ , @@v102@@ , @@v103@@ ) ; tcg_temp_free_i32 ( @@v103@@ ) ; gen_store_fpr32 ( @@v102@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v102@@ ) ; break ; case Number : check_cp1_registers ( @@a1@@ , @@a5@@ ) ; @@v100@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v101@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v100@@ , @@a4@@ ) ; gen_helper_float_cvtd_s ( @@v101@@ , @@v100@@ ) ; tcg_temp_free_i32 ( @@v100@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v101@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v101@@ ) ; break ; case Number : @@v99@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v99@@ , @@a4@@ ) ; gen_helper_float_cvtw_s ( @@v99@@ , @@v99@@ ) ; gen_store_fpr32 ( @@v99@@ , @@a5@@ ) ; tcg_temp_free_i32 ( @@v99@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v97@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v98@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v97@@ , @@a4@@ ) ; gen_helper_float_cvtl_s ( @@v98@@ , @@v97@@ ) ; tcg_temp_free_i32 ( @@v97@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v98@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v98@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v94@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v95@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v96@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v95@@ , @@a4@@ ) ; gen_load_fpr32 ( @@v96@@ , @@a3@@ ) ; tcg_gen_concat_i32_i64 ( @@v94@@ , @@v95@@ , @@v96@@ ) ; tcg_temp_free_i32 ( @@v96@@ ) ; tcg_temp_free_i32 ( @@v95@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v94@@ , @@a5@@ ) ; tcg_temp_free_i64 ( @@v94@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) gen_cmpabs_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; else gen_cmp_s ( @@a1@@ , @@v11@@ - Number , @@a3@@ , @@a4@@ , @@a6@@ ) ; break ; default : goto LABEL_125 ; } } } return __readfsqword ( Number ) ^ @@v138@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": 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{\"n\": \"v56\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s608\"}, {\"n\": \"v55\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s612\"}, {\"n\": \"v54\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s616\"}, {\"n\": \"v53\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s620\"}, {\"n\": \"v52\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s624\"}, {\"n\": \"v51\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s628\"}, {\"n\": \"v50\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s632\"}, {\"n\": \"v49\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s636\"}, {\"n\": \"v48\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s640\"}, {\"n\": \"v47\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s644\"}, {\"n\": \"v46\", \"t\": {\"T\": 1, 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\"location\": \"s688\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s692\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s696\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s700\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s704\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s708\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s712\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s716\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s720\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s724\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s728\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s732\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s736\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s740\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s744\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s748\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s752\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s756\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s760\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s764\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s768\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s772\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s776\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s780\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s784\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s788\"}, {\"n\": \"v138\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s808\"}]}",
"{\"name\": \"gen_flt3_ldst\", \"code\": \"unsigned __int64 __fastcall gen_flt3_ldst ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a5@@ ) { if ( @@a6@@ ) { gen_load_gpr ( @@v11@@ , @@a6@@ ) ; gen_op_addr_add ( @@a1@@ , @@v11@@ , cpu_gpr [ @@a5@@ ] , @@v11@@ ) ; } else { gen_load_gpr ( @@v11@@ , @@a5@@ ) ; } } else { gen_load_gpr ( @@v11@@ , @@a6@@ ) ; } save_cpu_state ( @@a1@@ , Number ) ; switch ( @@a2@@ ) { case Number : check_cop1x ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; tcg_gen_qemu_ld32s ( @@v11@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_gen_trunc_i64_i32 ( @@v18@@ , @@v11@@ ) ; gen_store_fpr32 ( @@v18@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a3@@ ) ; @@v17@@ = tcg_temp_new_i64 ( @@a1@@ ) ; tcg_gen_qemu_ld64 ( @@v17@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v17@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v17@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number ) ; @@v16@@ = tcg_temp_new_i64 ( @@v11@@ ) ; tcg_gen_qemu_ld64 ( @@v16@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_store_fpr64 ( @@a1@@ , @@v16@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v14@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr32 ( @@v14@@ , @@a4@@ ) ; tcg_gen_extu_i32_i64 ( @@v15@@ , @@v14@@ ) ; tcg_gen_qemu_st32 ( @@v15@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v13@@ , @@a4@@ ) ; tcg_gen_qemu_st64 ( @@v13@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v13@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; tcg_gen_andi_i64 ( @@v11@@ , @@v11@@ , Number ) ; @@v12@@ = tcg_temp_new_i64 ( @@v11@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a4@@ ) ; tcg_gen_qemu_st64 ( @@v12@@ , @@v11@@ , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; tcg_temp_free_i64 ( @@v12@@ ) ; break ; default : break ; } tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_flt3_arith\", \"code\": \"unsigned __int64 __fastcall gen_flt3_arith ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned int @@v29@@ ; unsigned int @@v30@@ ; unsigned int @@v31@@ ; unsigned int @@v32@@ ; unsigned int @@v33@@ ; unsigned int @@v34@@ ; unsigned int @@v35@@ ; unsigned int @@v36@@ ; unsigned int @@v37@@ ; unsigned int @@v38@@ ; unsigned int @@v39@@ ; unsigned int @@v40@@ ; unsigned int @@v41@@ ; unsigned int @@v42@@ ; unsigned int @@v43@@ ; unsigned int @@v44@@ ; unsigned int @@v45@@ ; unsigned int @@v46@@ ; unsigned int @@v47@@ ; unsigned int @@v48@@ ; unsigned int @@v49@@ ; int @@v50@@ ; int @@v51@@ ; unsigned __int64 @@v52@@ ; @@v52@@ = __readfsqword ( Number ) ; switch ( @@a2@@ ) { case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v47@@ = tcg_temp_local_new_i64 ( @@a1@@ ) ; @@v48@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v49@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v50@@ = gen_new_label ( @@a1@@ ) ; @@v51@@ = gen_new_label ( @@a1@@ ) ; gen_load_gpr ( @@v47@@ , @@a4@@ ) ; tcg_gen_andi_i64 ( @@v47@@ , @@v47@@ , Number L ) ; tcg_gen_brcondi_i64 ( Number , @@v47@@ , Number L , @@v50@@ ) ; gen_load_fpr32 ( @@v48@@ , @@a5@@ ) ; gen_load_fpr32h ( @@v49@@ , @@a5@@ ) ; gen_store_fpr32 ( @@v48@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v49@@ , @@a3@@ ) ; tcg_gen_br ( @@v51@@ ) ; gen_set_label ( @@v50@@ ) ; tcg_gen_brcondi_i64 ( Number , @@v47@@ , Number L , @@v51@@ ) ; tcg_temp_free_i64 ( @@v47@@ ) ; gen_load_fpr32h ( @@v49@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v48@@ , @@a6@@ ) ; gen_store_fpr32 ( @@v49@@ , @@a3@@ ) ; gen_store_fpr32h ( @@v48@@ , @@a3@@ ) ; gen_set_label ( @@v51@@ ) ; tcg_temp_free_i32 ( @@v48@@ ) ; tcg_temp_free_i32 ( @@v49@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v44@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v45@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v46@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v44@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v45@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v46@@ , @@a4@@ ) ; gen_helper_float_muladd_s ( @@v46@@ , @@v44@@ , @@v45@@ , @@v46@@ ) ; tcg_temp_free_i32 ( @@v44@@ ) ; tcg_temp_free_i32 ( @@v45@@ ) ; gen_store_fpr32 ( @@v46@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v46@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v41@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v42@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v43@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v41@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v42@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v43@@ , @@a4@@ ) ; gen_helper_float_muladd_d ( @@v43@@ , @@v41@@ , @@v42@@ , @@v43@@ ) ; tcg_temp_free_i64 ( @@v41@@ ) ; tcg_temp_free_i64 ( @@v42@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v43@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v43@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v38@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v39@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v40@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v38@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v39@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v40@@ , @@a4@@ ) ; gen_helper_float_muladd_ps ( @@v40@@ , @@v38@@ , @@v39@@ , @@v40@@ ) ; tcg_temp_free_i64 ( @@v38@@ ) ; tcg_temp_free_i64 ( @@v39@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v40@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v40@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v35@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v36@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v37@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v35@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v36@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v37@@ , @@a4@@ ) ; gen_helper_float_mulsub_s ( @@v37@@ , @@v35@@ , @@v36@@ , @@v37@@ ) ; tcg_temp_free_i32 ( @@v35@@ ) ; tcg_temp_free_i32 ( @@v36@@ ) ; gen_store_fpr32 ( @@v37@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v37@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v32@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v33@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v34@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v32@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v33@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v34@@ , @@a4@@ ) ; gen_helper_float_mulsub_d ( @@v34@@ , @@v32@@ , @@v33@@ , @@v34@@ ) ; tcg_temp_free_i64 ( @@v32@@ ) ; tcg_temp_free_i64 ( @@v33@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v34@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v34@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v29@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v30@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v31@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v29@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v30@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v31@@ , @@a4@@ ) ; gen_helper_float_mulsub_ps ( @@v31@@ , @@v29@@ , @@v30@@ , @@v31@@ ) ; tcg_temp_free_i64 ( @@v29@@ ) ; tcg_temp_free_i64 ( @@v30@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v31@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v31@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v27@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v28@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v26@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v27@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v28@@ , @@a4@@ ) ; gen_helper_float_nmuladd_s ( @@v28@@ , @@v26@@ , @@v27@@ , @@v28@@ ) ; tcg_temp_free_i32 ( @@v26@@ ) ; tcg_temp_free_i32 ( @@v27@@ ) ; gen_store_fpr32 ( @@v28@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v23@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v23@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v24@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v25@@ , @@a4@@ ) ; gen_helper_float_nmuladd_d ( @@v25@@ , @@v23@@ , @@v24@@ , @@v25@@ ) ; tcg_temp_free_i64 ( @@v23@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v25@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v20@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v21@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v22@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v20@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v21@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v22@@ , @@a4@@ ) ; gen_helper_float_nmuladd_ps ( @@v22@@ , @@v20@@ , @@v21@@ , @@v22@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v22@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v22@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; @@v17@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v18@@ = tcg_temp_new_i32 ( @@a1@@ ) ; @@v19@@ = tcg_temp_new_i32 ( @@a1@@ ) ; gen_load_fpr32 ( @@v17@@ , @@a5@@ ) ; gen_load_fpr32 ( @@v18@@ , @@a6@@ ) ; gen_load_fpr32 ( @@v19@@ , @@a4@@ ) ; gen_helper_float_nmulsub_s ( @@v19@@ , @@v17@@ , @@v18@@ , @@v19@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_fpr32 ( @@v19@@ , @@a3@@ ) ; tcg_temp_free_i32 ( @@v19@@ ) ; break ; case Number : check_cop1x ( @@a1@@ ) ; check_cp1_registers ( @@a1@@ , @@a4@@ | @@a6@@ | @@a5@@ | @@a3@@ ) ; @@v14@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v15@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v16@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v14@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v15@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v16@@ , @@a4@@ ) ; gen_helper_float_nmulsub_d ( @@v16@@ , @@v14@@ , @@v15@@ , @@v16@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v16@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; break ; case Number : check_cp1_64bitmode ( @@a1@@ ) ; @@v11@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v12@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v13@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v11@@ , @@a5@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v12@@ , @@a6@@ ) ; gen_load_fpr64 ( @@a1@@ , @@v13@@ , @@a4@@ ) ; gen_helper_float_nmulsub_ps ( @@v13@@ , @@v11@@ , @@v12@@ , @@v13@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; gen_store_fpr64 ( @@a1@@ , @@v13@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; break ; default : generate_exception ( @@a1@@ , Number ) ; break ; } return __readfsqword ( Number ) ^ @@v52@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s104\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s108\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s112\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s116\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s120\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s124\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s128\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s132\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s136\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s140\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s144\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s148\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s152\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s156\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s160\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s164\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s168\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s172\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s176\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s180\"}, {\"n\": \"v51\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v50\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v49\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v48\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v47\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v46\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v45\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v44\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v43\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v42\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v41\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v40\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v39\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v38\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v37\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v52\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v36\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v35\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s88\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"gen_rdhwr\", \"code\": \"unsigned __int64 __fastcall gen_rdhwr ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v7@@ = tcg_temp_new_i64 ( @@a1@@ ) ; if ( @@a4@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_ccres ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { if ( @@a4@@ > Number ) { LABEL_11 : generate_exception ( @@a2@@ , Number ) ; goto LABEL_12 ; } if ( @@a4@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_cc ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else if ( @@a4@@ ) { if ( @@a4@@ != Number ) goto LABEL_11 ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_synci_step ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } else { save_cpu_state ( @@a2@@ , Number ) ; gen_helper_rdhwr_cpunum ( @@v7@@ ) ; gen_store_gpr ( @@v7@@ , @@a3@@ ) ; } } LABEL_12 : tcg_temp_free_i64 ( @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_intermediate_code_internal", "code": "unsigned __int64 __fastcall gen_intermediate_code_internal ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; const char * v5 ; int @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; int @@v14@@ ; unsigned int @@v15@@ ; _QWORD * @@i@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; __int64 @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = Number ; if ( @@a3@@ && logfile ) fprintf ( logfile , String , @@a3@@ ) ; @@v17@@ = * ( _QWORD * ) @@a2@@ ; @@v18@@ = ( unsigned __int64 ) & gen_opc_buf + Number ; @@v20@@ = @@v17@@ ; @@v21@@ = Number ; @@v23@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v19@@ = @@a2@@ ; @@v26@@ = Number ; @@v25@@ = * ( _QWORD * ) ( @@a2@@ + Number ) ; restore_cpu_state ( @@a1@@ , ( __int64 ) & @@v19@@ ) ; @@v24@@ = @@v25@@ & Number ; @@v10@@ = Number ; @@v11@@ = * ( _WORD * ) ( @@a2@@ + Number ) & Number ; if ( ! @@v11@@ ) @@v11@@ = Number ; gen_icount_start ( ) ; while ( ! @@v26@@ ) { if ( * ( _QWORD * ) ( @@a1@@ + Number ) ) { for ( @@i@@ = * ( _QWORD * * ) ( @@a1@@ + Number ) ; @@i@@ ; @@i@@ = ( _QWORD * ) @@i@@ [ Number ] ) { if ( * @@i@@ == @@v20@@ ) { save_cpu_state ( ( __int64 ) & @@v19@@ , Number ) ; @@v26@@ = Number ; @@v13@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; @@v20@@ += Number L ; goto LABEL_50 ; } } } if ( @@a3@@ ) { @@v14@@ = ( __int64 ) ( gen_opc_ptr - ( _QWORD ) & gen_opc_buf ) >> Number ; if ( @@v9@@ < @@v14@@ ) { ++ @@v9@@ ; while ( @@v9@@ < @@v14@@ ) { v3 = @@v9@@ ++ ; * ( ( _BYTE * ) & gen_opc_instr_start + v3 ) = Number ; } } * ( ( _QWORD * ) & gen_opc_pc + @@v9@@ ) = @@v20@@ ; gen_opc_hflags [ @@v9@@ ] = @@v25@@ & Number ; * ( ( _BYTE * ) & gen_opc_instr_start + @@v9@@ ) = Number ; * ( ( _WORD * ) & gen_opc_icount + @@v9@@ ) = @@v10@@ ; } if ( @@v11@@ == @@v10@@ + Number && * ( __int16 * ) ( @@a2@@ + Number ) < Number ) gen_io_start ( ) ; @@v8@@ = Number ; if ( ( @@v25@@ & Number ) != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { @@v22@@ = lduw_code ( @@v20@@ ) ; @@v12@@ = decode_micromips_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } else { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { generate_exception ( ( __int64 ) & @@v19@@ , Number ) ; @@v26@@ = Number ; break ; } @@v22@@ = lduw_code ( @@v20@@ ) ; @@v12@@ = decode_mips16_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } } else { @@v22@@ = ldl_code ( @@v20@@ ) ; @@v12@@ = Number ; decode_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } if ( ! @@v8@@ ) handle_delay_slot ( @@a1@@ , ( __int64 ) & @@v19@@ , @@v12@@ ) ; @@v20@@ += @@v12@@ ; ++ @@v10@@ ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) && ( @@v25@@ & Number ) == Number || ( @@v20@@ & Number ) == Number || @@v18@@ <= gen_opc_ptr || @@v10@@ >= @@v11@@ || singlestep ) { break ; } } if ( * ( __int16 * ) ( @@a2@@ + Number ) < Number ) gen_io_end ( ) ; if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) || @@v26@@ == Number ) { if ( @@v26@@ == Number ) { gen_helper_interrupt_restart ( ) ; tcg_gen_exit_tb ( Number L ) ; } else if ( @@v26@@ <= Number ) { if ( @@v26@@ ) { if ( @@v26@@ == Number ) { gen_helper_interrupt_restart ( ) ; gen_goto_tb ( ( __int64 ) & @@v19@@ , Number , @@v20@@ ) ; } } else { save_cpu_state ( ( __int64 ) & @@v19@@ , Number ) ; gen_goto_tb ( ( __int64 ) & @@v19@@ , Number , @@v20@@ ) ; } } } else { save_cpu_state ( ( __int64 ) & @@v19@@ , @@v26@@ == Number ) ; @@v15@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; } LABEL_50 : gen_icount_end ( @@a2@@ , @@v10@@ ) ; * gen_opc_ptr = Number ; if ( @@a3@@ ) { @@v14@@ = ( __int64 ) ( gen_opc_ptr - ( _QWORD ) & gen_opc_buf ) >> Number ; ++ @@v9@@ ; while ( @@v9@@ <= @@v14@@ ) { v4 = @@v9@@ ++ ; * ( ( _BYTE * ) & gen_opc_instr_start + v4 ) = Number ; } } else { * ( _WORD * ) ( @@a2@@ + Number ) = @@v20@@ - @@v17@@ ; * ( _DWORD * ) ( @@a2@@ + Number ) = @@v10@@ ; } if ( ( loglevel & Number ) != Number ) { if ( logfile ) { v5 = ( const char * ) lookup_symbol ( @@v17@@ ) ; fprintf ( logfile , String , v5 ) ; } target_disas ( logfile , @@v17@@ , @@v20@@ - @@v17@@ , Number L ) ; if ( logfile ) fputc ( Number , logfile ) ; } return __readfsqword ( Number ) ^ @@v27@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s100"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s104"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s108"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s112"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s116"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s120"}, {"n": "v26", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v25", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v24", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v23", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v22", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v21", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "v20", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s56"}, {"n": "v19", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s64"}, {"n": "v18", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s72"}, {"n": "v27", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "v17", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s80"}, {"n": "i", "t": {"T": 3, "t": "_QWORD"}, "location": "s88"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s92"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s96"}]} | [{"n": "search_pc", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "tb", "t": {"T": 3, "t": "TranslationBlock_0"}, "location": "r64"}, {"n": "helper_tmp", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "s100"}, {"n": "insn_bytes", "t": {"T": 1, "n": "int", "s": 4}, "location": "s104"}, {"n": "max_insns", "t": {"T": 1, "n": "int", "s": 4}, "location": "s108"}, {"n": "num_insns", "t": {"T": 1, "n": "int", "s": 4}, "location": "s112"}, {"n": "lj", "t": {"T": 1, "n": "int", "s": 4}, "location": "s116"}, {"n": "is_branch", "t": {"T": 1, "n": "int", "s": 4}, "location": "s120"}, {"n": "", "t": {"T": 10}, "location": "s20"}, {"n": "", "t": {"T": 10}, "location": "s28"}, {"n": "", "t": {"T": 10}, "location": "s32"}, {"n": "", "t": {"T": 10}, "location": "s36"}, {"n": "", "t": {"T": 10}, "location": "s40"}, {"n": "", "t": {"T": 10}, "location": "s48"}, {"n": "", "t": {"T": 10}, "location": "s56"}, {"n": "ctx", "t": {"T": 6, "n": "DisasContext_0", "l": [{"T": 4, "n": "tb", "t": "TranslationBlock *", "s": 8}, {"T": 4, "n": "pc", "t": "target_ulong", "s": 8}, {"T": 4, "n": "saved_pc", "t": "target_ulong", "s": 8}, {"T": 4, "n": "opcode", "t": "uint32_t", "s": 4}, {"T": 4, "n": "singlestep_enabled", "t": "int", "s": 4}, {"T": 4, "n": "mem_idx", "t": "int", "s": 4}, {"T": 4, "n": "hflags", "t": "uint32_t", "s": 4}, {"T": 4, "n": "saved_hflags", "t": "uint32_t", "s": 4}, {"T": 4, "n": "bstate", "t": "int", "s": 4}, {"T": 4, "n": "btarget", "t": "target_ulong", "s": 8}]}, "location": "s64"}, {"n": "gen_opc_end", "t": {"T": 3, "t": "uint16_t"}, "location": "s72"}, {"n": "v19", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}, {"n": "pc_start", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "s80"}, {"n": "bp_0", "t": {"T": 3, "t": "CPUBreakpoint_0"}, "location": "s88"}, {"n": "helper_tmp_0", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "s92"}, {"n": "j", "t": {"T": 1, "n": "int", "s": 4}, "location": "s96"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 568 | [
"{\"name\": \"lduw_code\", \"code\": \"__int64 __fastcall lduw_code ( unsigned __int64 @@a1@@ ) { unsigned int @@v2@@ ; unsigned int @@v3@@ ; @@v3@@ = cpu_mmu_index ( cpu_single_env ) ; if ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env ) == ( @@a1@@ & Number ) ) @@v2@@ = lduw_le_p ( ( unsigned __int16 * ) ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env + Number ) + @@a1@@ ) ) ; else @@v2@@ = ( unsigned __int16 ) _ldw_cmmu ( @@a1@@ , @@v3@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}]}",
"{\"name\": \"ldl_code\", \"code\": \"__int64 __fastcall ldl_code ( unsigned __int64 @@a1@@ ) { unsigned int @@v2@@ ; unsigned int @@v3@@ ; @@v3@@ = cpu_mmu_index ( cpu_single_env ) ; if ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env ) == ( @@a1@@ & Number ) ) @@v2@@ = ldl_le_p ( ( unsigned int * ) ( * ( _QWORD * ) ( Number * ( ( ( __int64 ) ( int ) @@v3@@ << Number ) + ( unsigned __int8 ) ( @@a1@@ >> Number ) + Number ) + cpu_single_env + Number ) + @@a1@@ ) ) ; else @@v2@@ = _ldl_cmmu ( @@a1@@ , @@v3@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}]}",
"{\"name\": \"tcg_gen_exit_tb\", \"code\": \"unsigned __int64 __fastcall tcg_gen_exit_tb ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_raise_exception\", \"code\": \"unsigned __int64 __fastcall gen_helper_raise_exception ( int @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = @@a1@@ ; tcg_gen_helperN ( ( __int64 ) & helper_raise_exception , Number , Number , Number , Number , ( __int64 ) & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_interrupt_restart\", \"code\": \"unsigned __int64 gen_helper_interrupt_restart ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_interrupt_restart , Number , Number , Number , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_icount_start\", \"code\": \"unsigned __int64 gen_icount_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( use_icount ) { icount_label = gen_new_label ( ) ; @@v1@@ = tcg_temp_local_new_i32 ( ) ; tcg_gen_ld_i32 ( @@v1@@ , cpu_env , Number L ) ; icount_arg = gen_opparam_ptr + Number L ; tcg_gen_subi_i32 ( @@v1@@ , @@v1@@ , Number ) ; tcg_gen_brcondi_i32 ( Number , @@v1@@ , Number , icount_label ) ; tcg_gen_st16_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_icount_end\", \"code\": \"unsigned __int64 __fastcall gen_icount_end ( __int64 @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( use_icount ) { * ( _QWORD * ) icount_arg = @@a2@@ ; gen_set_label ( icount_label ) ; tcg_gen_exit_tb ( @@a1@@ + Number ) ; } return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_start\", \"code\": \"unsigned __int64 gen_io_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_end\", \"code\": \"unsigned __int64 gen_io_end ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"save_cpu_state\", \"code\": \"unsigned __int64 __fastcall save_cpu_state ( __int64 @@a1@@ , int @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ && * ( _QWORD * ) ( @@a1@@ + Number ) != * ( _QWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) != * ( _DWORD * ) ( @@a1@@ + Number ) ) { tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a1@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) tcg_gen_movi_i64 ( btarget , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"restore_cpu_state\", \"code\": \"unsigned __int64 __fastcall restore_cpu_state ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = * ( _DWORD * ) ( @@a2@@ + Number ) ; @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( @@v2@@ != Number && @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ <= Number && ( @@v2@@ == Number || @@v2@@ == Number ) ) ) * ( _QWORD * ) ( @@a2@@ + Number ) = * ( _QWORD * ) ( @@a1@@ + Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"generate_exception\", \"code\": \"unsigned __int64 __fastcall generate_exception ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; save_cpu_state ( @@a1@@ , Number ) ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_raise_exception ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_goto_tb\", \"code\": \"unsigned __int64 __fastcall gen_goto_tb ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v5@@ ; _QWORD * @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = * ( _QWORD * * ) @@a1@@ ; if ( ( ( @@a3@@ ^ * * ( _QWORD * * ) @@a1@@ ) & Number ) != Number || * ( _DWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( @@a3@@ ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { save_cpu_state ( @@a1@@ , Number ) ; @@v5@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; } tcg_gen_exit_tb ( Number L ) ; } else { tcg_gen_goto_tb ( @@a2@@ ) ; gen_save_pc ( @@a3@@ ) ; tcg_gen_exit_tb ( ( __int64 ) @@v6@@ + @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 3, \"t\": \"_QWORD\"}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"handle_delay_slot\", \"code\": \"unsigned __int64 __fastcall handle_delay_slot ( __int64 @@a1@@ , __int64 @@a2@@ , int @@a3@@ ) { int @@v3@@ ; int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) return __readfsqword ( Number ) ^ @@v11@@ ; @@v6@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; * ( _DWORD * ) ( @@a2@@ + Number ) &= Number ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; save_cpu_state ( @@a2@@ , Number ) ; @@v3@@ = @@v6@@ & Number ; if ( @@v3@@ != Number ) { if ( ( @@v6@@ & Number ) > Number ) return __readfsqword ( Number ) ^ @@v11@@ ; if ( @@v3@@ != Number ) { if ( ( @@v6@@ & Number ) > Number ) return __readfsqword ( Number ) ^ @@v11@@ ; if ( @@v3@@ != Number ) { if ( @@v3@@ == Number ) { @@v10@@ = gen_new_label ( @@a2@@ ) ; tcg_gen_brcondi_i64 ( Number , bcond , Number L , @@v10@@ ) ; gen_goto_tb ( @@a2@@ , Number , @@a3@@ + * ( _QWORD * ) ( @@a2@@ + Number ) ) ; gen_set_label ( @@v10@@ ) ; gen_goto_tb ( @@a2@@ , Number , * ( _QWORD * ) ( @@a2@@ + Number ) ) ; } return __readfsqword ( Number ) ^ @@v11@@ ; } if ( ( @@v6@@ & Number ) != Number ) tcg_gen_xori_i32 ( hflags , hflags , Number ) ; } gen_goto_tb ( @@a2@@ , Number , * ( _QWORD * ) ( @@a2@@ + Number ) ) ; return __readfsqword ( Number ) ^ @@v11@@ ; } if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { @@v7@@ = tcg_temp_new_i64 ( @@a2@@ ) ; @@v8@@ = tcg_temp_new_i32 ( @@a2@@ ) ; tcg_gen_andi_i64 ( @@v7@@ , btarget , Number L ) ; tcg_gen_trunc_i64_i32 ( @@v8@@ , @@v7@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; tcg_gen_andi_i32 ( hflags , hflags , Number ) ; tcg_gen_shli_i32 ( @@v8@@ , @@v8@@ , Number ) ; tcg_gen_or_i32 ( hflags , hflags , @@v8@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; tcg_gen_andi_i64 ( cpu_PC , btarget , Number ) ; } else { tcg_gen_mov_i64 ( cpu_PC , btarget ) ; } if ( * ( _DWORD * ) ( @@a2@@ + Number ) ) { save_cpu_state ( @@a2@@ , Number ) ; @@v9@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; } tcg_gen_exit_tb ( Number L ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"decode_mips16_opc\", \"code\": \"__int64 __fastcall decode_mips16_opc ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { int v3 ; unsigned int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; __int16 @@v11@@ ; int v12 ; unsigned int v13 ; unsigned int @@v14@@ ; int v15 ; int v16 ; char @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int v21 ; unsigned int v22 ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; int @@v28@@ ; v12 = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) v3 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; else LOBYTE ( v3 ) = Number ; @@v17@@ = v3 ; @@v18@@ = xlat ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v19@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v20@@ = xlat ( @@v19@@ ) ; v21 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v14@@ = Number ; switch ( v12 ) { case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_addiupc ( @@a2@@ , @@v18@@ , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) , Number , Number ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , ( __int16 ) ( Number * ( ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ) >> Number ) ; break ; case Number : v22 = Number * ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number << Number ) & Number | ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) & Number | lduw_code ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) v4 = Number ; else v4 = Number ; gen_compute_branch ( @@a2@@ , v4 , Number , @@v18@@ , @@v20@@ , v22 ) ; @@v14@@ = Number ; * @@a3@@ = Number ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v18@@ , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , @@v18@@ , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : v5 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v5 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } else if ( v5 == Number ) { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } else if ( v5 ) { check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } else { gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v20@@ , @@v17@@ ) ; } break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : @@v11@@ = ( char ) ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) >> Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { check_mips_64 ( @@a2@@ ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v11@@ ) ; } else { gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v11@@ ) ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , @@v18@@ , ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v18@@ , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_slt_imm ( @@a1@@ , Number , Number , @@v18@@ , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : switch ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) { case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_st ( @@a2@@ , Number , Number , Number , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , Number , Number , Number * ( char ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : @@v26@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v27@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v28@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; v15 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v15 ) v16 = Number * v15 ; else v16 = Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_mips16_save ( @@a2@@ , Number , Number , @@v26@@ , @@v27@@ , @@v28@@ , v16 ) ; else gen_mips16_restore ( @@a2@@ , Number , Number , @@v26@@ , @@v27@@ , @@v28@@ , v16 ) ; break ; case Number : @@v25@@ = xlat ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; gen_arith ( @@a1@@ , @@a2@@ , Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number | ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , @@v25@@ , Number ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v20@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number ) ; break ; default : goto LABEL_113 ; } break ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_logic_imm ( @@a1@@ , Number , Number , @@v18@@ , ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , v21 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v18@@ , Number , Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) ; break ; case Number : gen_st ( @@a2@@ , Number , @@v20@@ , @@v18@@ , Number * v21 ) ; break ; case Number : @@v24@@ = xlat ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; v6 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v6 == Number ) { gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } else if ( v6 == Number ) { check_mips_64 ( @@a2@@ ) ; gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } else if ( v6 ) { gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } else { check_mips_64 ( @@a2@@ ) ; gen_arith ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v18@@ , @@v20@@ ) ; } break ; case Number : switch ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) { case Number : @@v23@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) { if ( @@v23@@ ) v7 = Number ; else v7 = Number ; v13 = v7 ; } else { v13 = Number ; } if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) v8 = Number ; else v8 = @@v18@@ ; gen_compute_branch ( @@a2@@ , v13 , Number , v8 , Number , Number ) ; if ( ! @@v23@@ ) * @@a3@@ = Number ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; break ; case Number : gen_slt ( @@a1@@ , Number , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_slt ( @@a1@@ , Number , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : generate_exception ( @@a2@@ , Number ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v20@@ , @@v17@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_arith ( @@a1@@ , @@a2@@ , Number , @@v18@@ , Number , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_logic ( @@a1@@ , Number , @@v18@@ , @@v20@@ , Number ) ; break ; case Number : gen_HILO ( @@a2@@ , Number , @@v18@@ ) ; break ; case Number : switch ( @@v19@@ ) { case Number : tcg_gen_ext8u_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : tcg_gen_ext16u_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; tcg_gen_ext32u_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : tcg_gen_ext8s_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : tcg_gen_ext16s_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; tcg_gen_ext32s_i64 ( cpu_gpr [ @@v18@@ ] , cpu_gpr [ @@v18@@ ] ) ; break ; default : goto LABEL_113 ; } break ; case Number : gen_HILO ( @@a2@@ , Number , @@v18@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v20@@ , @@v17@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , Number , @@v20@@ , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; case Number : check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , Number , @@v18@@ , @@v20@@ ) ; break ; default : goto LABEL_113 ; } break ; case Number : decode_extended_mips16_opc ( @@a1@@ , @@a2@@ ) ; @@v14@@ = Number ; break ; case Number : decode_i64_mips16 ( @@a1@@ , @@a2@@ , @@v20@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , v21 , Number ) ; break ; default : LABEL_113 : generate_exception ( @@a2@@ , Number ) ; break ; } return @@v14@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"s72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"s92\"}]}",
"{\"name\": \"decode_micromips_opc\", \"code\": \"__int64 __fastcall decode_micromips_opc ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { __int64 result ; int v4 ; int v5 ; __int16 v6 ; unsigned int @@v7@@ ; int v8 ; unsigned int v9 ; int v10 ; int @@v13@@ ; int @@v14@@ ; int @@v15@@ ; int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; int @@v28@@ ; int @@v29@@ ; int @@v30@@ ; int @@v31@@ ; int @@v32@@ ; int @@v33@@ ; int @@v34@@ ; if ( ( * ( _QWORD * ) ( @@a2@@ + Number ) & Number L ) != Number ) { * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a2@@ + Number ) ; generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; result = Number L ; } else { @@v13@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) == Number ) goto LABEL_8 ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) goto LABEL_8 ; break ; default : goto LABEL_8 ; } generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; result = Number L ; } else { LABEL_8 : switch ( ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ) { case Number : @@v32@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v33@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v34@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_arith ( @@a1@@ , @@a2@@ , Number , @@v32@@ , @@v33@@ , @@v34@@ ) ; else gen_arith ( @@a1@@ , @@a2@@ , Number , @@v32@@ , @@v33@@ , @@v34@@ ) ; goto LABEL_52 ; case Number : @@v30@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v31@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( * ( _WORD * ) ( @@a2@@ + Number ) & Number ) == Number ) v6 = Number ; else v6 = * ( _WORD * ) ( @@a2@@ + Number ) & Number ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v30@@ , @@v31@@ , v6 ) ; goto LABEL_52 ; case Number : gen_arith_imm ( @@a1@@ , @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , Number ) ; goto LABEL_52 ; case Number : @@v28@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v29@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) != Number ) v4 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; else LOBYTE ( v4 ) = Number ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v28@@ , @@v29@@ , Number ) ; else gen_shift_imm ( @@a1@@ , @@a2@@ , Number , @@v28@@ , @@v29@@ , v4 ) ; goto LABEL_52 ; case Number : @@v26@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v27@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v26@@ , @@v27@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : gen_andi16 ( @@a1@@ , @@a2@@ ) ; goto LABEL_52 ; case Number : gen_pool16c_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; goto LABEL_52 ; case Number : gen_ld ( @@a1@@ , @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_addiusp ( @@a1@@ , @@a2@@ ) ; else gen_addius5 ( @@a1@@ , @@a2@@ ) ; goto LABEL_52 ; case Number : v5 = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , v5 , Number , Number * ( ( __int16 ) ( * ( _WORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) ) ; goto LABEL_52 ; case Number : @@v24@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v25@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_ld ( @@a1@@ , @@a2@@ , Number , @@v24@@ , @@v25@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) gen_addiur1sp ( @@a1@@ , @@a2@@ ) ; else gen_addiur2 ( @@a1@@ , @@a2@@ ) ; goto LABEL_52 ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_21 ; case Number : if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) != Number ) { LABEL_21 : generate_exception ( @@a2@@ , Number ) ; } else { @@v21@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v22@@ = re_enc_16229 [ @@v21@@ ] ; @@v23@@ = rs_rt_enc_16230 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , rd_enc_16228 [ @@v21@@ ] , rs_rt_enc_16230 [ ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ] , Number ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , Number , @@v22@@ , @@v23@@ , Number ) ; } goto LABEL_52 ; case Number : @@v19@@ = mmreg2 ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v20@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_st ( @@a2@@ , Number , @@v19@@ , @@v20@@ , * ( _WORD * ) ( @@a2@@ + Number ) & Number ) ; goto LABEL_52 ; case Number : case Number : @@v7@@ = Number * ( ( int ) ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) ; v8 = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( @@v13@@ == Number ) v9 = Number ; else v9 = Number ; gen_compute_branch ( @@a2@@ , v9 , Number , v8 , Number , @@v7@@ ) ; * @@a3@@ = Number ; goto LABEL_52 ; case Number : @@v17@@ = mmreg2 ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v18@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_st ( @@a2@@ , Number , @@v17@@ , @@v18@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : gen_st ( @@a2@@ , Number , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , Number , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : gen_compute_branch ( @@a2@@ , Number , Number , Number , Number , Number * ( ( int ) ( * ( _DWORD * ) ( @@a2@@ + Number ) << Number ) >> Number ) ) ; * @@a3@@ = Number ; goto LABEL_52 ; case Number : @@v15@@ = mmreg2 ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; @@v16@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; gen_st ( @@a2@@ , Number , @@v15@@ , @@v16@@ , ( Number * ( unsigned __int8 ) * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; goto LABEL_52 ; case Number : @@v14@@ = mmreg ( ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ) ; if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) v10 = Number ; else v10 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; tcg_gen_movi_i64 ( cpu_gpr [ @@v14@@ ] , v10 ) ; LABEL_52 : result = Number L ; break ; default : decode_micromips32_opc ( @@a1@@ , @@a2@@ , ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number , @@a3@@ ) ; result = Number L ; break ; } } } return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s108\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s124\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s128\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s132\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s136\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s140\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s152\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s156\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s164\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s172\"}, {\"n\": \"v34\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v33\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v32\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v31\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v30\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s72\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"decode_opc\", \"code\": \"unsigned __int64 __fastcall decode_opc ( __int64 @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; __int16 @@v10@@ ; int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; int v16 ; int @@v17@@ ; unsigned int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned int @@v27@@ ; unsigned int @@v28@@ ; unsigned __int64 @@v29@@ ; @@v29@@ = __readfsqword ( Number ) ; if ( ( * ( _QWORD * ) ( @@a2@@ + Number ) & Number L ) != Number ) { * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( @@a2@@ + Number ) ; generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( ( * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) == Number ) { @@v17@@ = gen_new_label ( @@a1@@ ) ; tcg_gen_brcondi_i64 ( Number , bcond , Number L , @@v17@@ ) ; tcg_gen_movi_i32 ( hflags , * ( _DWORD * ) ( @@a2@@ + Number ) & Number ) ; gen_goto_tb ( @@a2@@ , Number , * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ; gen_set_label ( @@v17@@ ) ; } if ( ( loglevel & Number ) != Number ) tcg_gen_debug_insn_start ( * ( _QWORD * ) ( @@a2@@ + Number ) ) ; @@v18@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; @@v19@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v20@@ = HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ; @@v21@@ = ( unsigned __int8 ) HIBYTE ( * ( _WORD * ) ( @@a2@@ + Number ) ) >> Number ; @@v22@@ = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; @@v10@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; if ( @@v18@@ == Number ) goto LABEL_276 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_228 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_228 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { gen_st_cond ( @@a2@@ , Number , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_275 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_228 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_275 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_269 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_228 : gen_cop1_ldst ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_223 : gen_ld ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_224 : gen_st ( @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { LABEL_276 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_st ( @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) goto LABEL_224 ; if ( @@v18@@ == Number ) goto LABEL_275 ; if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) goto LABEL_223 ; if ( @@v18@@ == Number ) { v12 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v12 ) { case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_bitops ( @@a2@@ , v12 , @@v20@@ , @@v19@@ , @@v22@@ , @@v21@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_bitops ( @@a2@@ , v12 , @@v20@@ , @@v19@@ , @@v22@@ , @@v21@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v25@@ = tcg_temp_new_i64 ( @@a1@@ ) ; @@v26@@ = tcg_temp_new_i64 ( @@a1@@ ) ; gen_load_gpr ( @@v25@@ , @@v20@@ ) ; gen_load_gpr ( @@v26@@ , @@v19@@ ) ; gen_helper_fork ( @@v25@@ , @@v26@@ ) ; tcg_temp_free_i64 ( @@v25@@ ) ; tcg_temp_free_i64 ( @@v26@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; @@v24@@ = tcg_temp_new_i64 ( @@a1@@ ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v24@@ , @@v19@@ ) ; gen_helper_yield ( @@v24@@ , @@v24@@ ) ; gen_store_gpr ( @@v24@@ , @@v21@@ ) ; tcg_temp_free_i64 ( @@v24@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_loongson_integer ( @@a2@@ , v12 , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_bshfl ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_bshfl ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ ) ; break ; case Number : gen_rdhwr ( @@a1@@ , @@a2@@ , @@v20@@ , @@v21@@ ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; goto LABEL_281 ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_compute_branch ( @@a2@@ , Number , Number , @@v19@@ , @@v20@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) { LABEL_281 : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ == Number ) { v11 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v11 ) { case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_muldiv ( @@a2@@ , v11 , @@v19@@ , @@v20@@ ) ; break ; case Number : LABEL_104 : gen_arith ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_loongson_integer ( @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cl ( @@a2@@ , v11 , @@v21@@ , @@v19@@ ) ; break ; case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_cl ( @@a2@@ , v11 , @@v21@@ , @@v19@@ ) ; break ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; generate_exception ( @@a2@@ , Number ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { LABEL_275 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_ld ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ == Number ) goto LABEL_278 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_278 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_arith_imm ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { LABEL_222 : gen_compute_branch ( @@a2@@ , @@v18@@ , Number , @@v19@@ , @@v20@@ , Number * @@v10@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ == Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { check_cp1_enabled ( @@a2@@ ) ; v16 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v16 ) { case Number : case Number : case Number : case Number : case Number : case Number : gen_flt3_ldst ( @@a2@@ , v16 , @@v22@@ , @@v21@@ , @@v19@@ , @@v20@@ ) ; break ; case Number : return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : gen_flt3_arith ( @@a2@@ , v16 , @@v22@@ , @@v19@@ , @@v21@@ , @@v20@@ ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; } goto LABEL_125 ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_269 : generate_exception_err ( @@a2@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { check_cp1_enabled ( @@a2@@ ) ; v15 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_266 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) { LABEL_266 : gen_farith ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ , @@v22@@ , ( @@v10@@ >> Number ) & Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_264 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) { LABEL_264 : check_cop1x ( @@a2@@ ) ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; } else { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_262 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) goto LABEL_263 ; if ( v15 > Number ) goto LABEL_281 ; if ( v15 == Number ) { LABEL_262 : gen_cp1 ( @@a2@@ , v15 , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 > Number ) goto LABEL_281 ; if ( v15 != Number ) { if ( v15 != Number ) goto LABEL_281 ; LABEL_263 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cp1 ( @@a2@@ , v15 , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } } goto LABEL_262 ; } } check_insn ( @@a1@@ , @@a2@@ , Number ) ; goto LABEL_262 ; } } gen_compute_branch1 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , ( @@v20@@ >> Number ) & Number , Number * @@v10@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } LABEL_125 : generate_exception_err ( @@a2@@ , Number , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { check_cp0_enabled ( @@a2@@ ) ; v14 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v14 > Number ) goto LABEL_281 ; if ( v14 >= Number ) { gen_cp0 ( @@a1@@ , @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_store_srsgpr ( @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 > Number ) goto LABEL_281 ; if ( v14 == Number ) { LABEL_194 : gen_cp0 ( @@a1@@ , @@a2@@ , v14 , @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 > Number ) goto LABEL_281 ; if ( v14 != Number ) { if ( v14 > Number ) goto LABEL_281 ; if ( v14 == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_load_srsgpr ( @@v20@@ , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v14 > Number || v14 != Number && ( v14 > Number || v14 != Number && ( v14 > Number || v14 != Number && ( v14 > Number || v14 != Number && v14 != Number ) ) ) ) { goto LABEL_281 ; } goto LABEL_194 ; } @@v27@@ = tcg_temp_new_i64 ( @@a2@@ ) ; @@v23@@ = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_ei ( @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; save_cpu_state ( @@a2@@ , Number ) ; gen_helper_di ( @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_emt ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dmt ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; goto LABEL_214 ; } if ( @@v23@@ <= Number ) { if ( @@v23@@ == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_dvpe ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; } else { if ( @@v23@@ != Number ) goto LABEL_213 ; check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_helper_evpe ( @@v27@@ , @@v27@@ ) ; gen_store_gpr ( @@v27@@ , @@v20@@ ) ; } LABEL_214 : tcg_temp_free_i64 ( @@v27@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } } } } LABEL_213 : generate_exception ( @@a2@@ , Number ) ; goto LABEL_214 ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_220 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_220 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_220 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_220 : gen_logic_imm ( @@a1@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_219 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_219 : gen_slt_imm ( @@a1@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) goto LABEL_218 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ == Number ) { LABEL_218 : gen_arith_imm ( @@a1@@ , @@a2@@ , @@v18@@ , @@v20@@ , @@v19@@ , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ > Number || @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) goto LABEL_222 ; if ( @@v18@@ > Number ) goto LABEL_281 ; if ( @@v18@@ >= Number ) { gen_compute_branch ( @@a2@@ , @@v18@@ , Number , @@v19@@ , @@v20@@ , ( Number * * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( @@v18@@ ) { if ( @@v18@@ == Number ) { v13 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; if ( v13 == Number ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v13 <= Number && v13 <= Number ) { if ( v13 >= Number ) goto LABEL_172 ; if ( v13 != Number ) { if ( v13 > Number ) goto LABEL_281 ; if ( v13 <= Number ) { if ( v13 < Number ) goto LABEL_281 ; LABEL_172 : gen_compute_branch ( @@a2@@ , v13 , Number , @@v19@@ , Number , Number * @@v10@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; } if ( v13 - Number > Number ) goto LABEL_281 ; } gen_trap ( @@a2@@ , v13 , @@v19@@ , Number , @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; } } goto LABEL_281 ; } v11 = * ( _DWORD * ) ( @@a2@@ + Number ) & Number ; switch ( v11 ) { case Number : case Number : goto LABEL_96 ; case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) goto LABEL_125 ; check_cp1_enabled ( @@a2@@ ) ; gen_movci ( @@a2@@ , @@v21@@ , @@v19@@ , ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number , HIWORD ( * ( _DWORD * ) ( @@a2@@ + Number ) ) & Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : v3 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v3 ) goto LABEL_96 ; if ( v3 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_96 : gen_shift_imm ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v20@@ , @@v22@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : goto LABEL_109 ; case Number : @@v28@@ = tcg_const_i32 ( @@v22@@ ) ; gen_helper_pmon ( @@v28@@ ) ; tcg_temp_free_i32 ( @@v28@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : v4 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v4 ) goto LABEL_109 ; if ( v4 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_109 : gen_shift ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_compute_branch ( @@a2@@ , v11 , Number , @@v19@@ , @@v21@@ , @@v22@@ ) ; * @@a3@@ = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_cond_move ( @@a1@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : generate_exception ( @@a2@@ , Number ) ; * ( _DWORD * ) ( @@a2@@ + Number ) = Number ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : generate_exception ( @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_HILO ( @@a2@@ , v11 , @@v21@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_HILO ( @@a2@@ , v11 , @@v19@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : goto LABEL_143 ; case Number : v7 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v7 ) goto LABEL_143 ; if ( v7 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_143 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_shift ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : if ( @@v22@@ ) { check_insn ( @@a1@@ , @@a2@@ , Number ) ; gen_mul_vr54xx ( @@a2@@ , * ( _DWORD * ) ( @@a2@@ + Number ) & Number , @@v21@@ , @@v19@@ , @@v20@@ ) ; } else { gen_muldiv ( @@a2@@ , v11 , @@v19@@ , @@v20@@ ) ; } return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_muldiv ( @@a2@@ , v11 , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : goto LABEL_104 ; case Number : case Number : case Number : case Number : gen_logic ( @@a1@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : gen_slt ( @@a1@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_arith ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v19@@ , @@v20@@ ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : case Number : case Number : gen_trap ( @@a2@@ , v11 , @@v19@@ , @@v20@@ , Number ) ; return __readfsqword ( Number ) ^ @@v29@@ ; case Number : case Number : case Number : case Number : goto LABEL_136 ; case Number : v5 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v5 ) goto LABEL_136 ; if ( v5 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; goto LABEL_136 ; case Number : v6 = ( * ( _DWORD * ) ( @@a2@@ + Number ) >> Number ) & Number ; if ( ! v6 ) goto LABEL_136 ; if ( v6 != Number ) goto LABEL_281 ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) v11 = Number ; LABEL_136 : check_insn ( @@a1@@ , @@a2@@ , Number ) ; check_mips_64 ( @@a2@@ ) ; gen_shift_imm ( @@a1@@ , @@a2@@ , v11 , @@v21@@ , @@v20@@ , @@v22@@ ) ; break ; default : goto LABEL_281 ; } return __readfsqword ( Number ) ^ @@v29@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v28\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s56\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"s66\"}, {\"n\": \"v29\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_intermediate_code\", \"code\": \"unsigned __int64 __fastcall gen_intermediate_code ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_intermediate_code_internal ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_intermediate_code", "code": "unsigned __int64 __fastcall gen_intermediate_code ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_intermediate_code_internal ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "tb", "t": {"T": 3, "t": "TranslationBlock"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 569 | [
"{\"name\": \"gen_intermediate_code_internal\", \"code\": \"unsigned __int64 __fastcall gen_intermediate_code_internal ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; const char * v5 ; int @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; int @@v14@@ ; unsigned int @@v15@@ ; _QWORD * @@i@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; __int64 @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = Number ; if ( @@a3@@ && logfile ) fprintf ( logfile , String , @@a3@@ ) ; @@v17@@ = * ( _QWORD * ) @@a2@@ ; @@v18@@ = ( unsigned __int64 ) & gen_opc_buf + Number ; @@v20@@ = @@v17@@ ; @@v21@@ = Number ; @@v23@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v19@@ = @@a2@@ ; @@v26@@ = Number ; @@v25@@ = * ( _QWORD * ) ( @@a2@@ + Number ) ; restore_cpu_state ( @@a1@@ , ( __int64 ) & @@v19@@ ) ; @@v24@@ = @@v25@@ & Number ; @@v10@@ = Number ; @@v11@@ = * ( _WORD * ) ( @@a2@@ + Number ) & Number ; if ( ! @@v11@@ ) @@v11@@ = Number ; gen_icount_start ( ) ; while ( ! @@v26@@ ) { if ( * ( _QWORD * ) ( @@a1@@ + Number ) ) { for ( @@i@@ = * ( _QWORD * * ) ( @@a1@@ + Number ) ; @@i@@ ; @@i@@ = ( _QWORD * ) @@i@@ [ Number ] ) { if ( * @@i@@ == @@v20@@ ) { save_cpu_state ( ( __int64 ) & @@v19@@ , Number ) ; @@v26@@ = Number ; @@v13@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; @@v20@@ += Number L ; goto LABEL_50 ; } } } if ( @@a3@@ ) { @@v14@@ = ( __int64 ) ( gen_opc_ptr - ( _QWORD ) & gen_opc_buf ) >> Number ; if ( @@v9@@ < @@v14@@ ) { ++ @@v9@@ ; while ( @@v9@@ < @@v14@@ ) { v3 = @@v9@@ ++ ; * ( ( _BYTE * ) & gen_opc_instr_start + v3 ) = Number ; } } * ( ( _QWORD * ) & gen_opc_pc + @@v9@@ ) = @@v20@@ ; gen_opc_hflags [ @@v9@@ ] = @@v25@@ & Number ; * ( ( _BYTE * ) & gen_opc_instr_start + @@v9@@ ) = Number ; * ( ( _WORD * ) & gen_opc_icount + @@v9@@ ) = @@v10@@ ; } if ( @@v11@@ == @@v10@@ + Number && * ( __int16 * ) ( @@a2@@ + Number ) < Number ) gen_io_start ( ) ; @@v8@@ = Number ; if ( ( @@v25@@ & Number ) != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { @@v22@@ = lduw_code ( @@v20@@ ) ; @@v12@@ = decode_micromips_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } else { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { generate_exception ( ( __int64 ) & @@v19@@ , Number ) ; @@v26@@ = Number ; break ; } @@v22@@ = lduw_code ( @@v20@@ ) ; @@v12@@ = decode_mips16_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } } else { @@v22@@ = ldl_code ( @@v20@@ ) ; @@v12@@ = Number ; decode_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } if ( ! @@v8@@ ) handle_delay_slot ( @@a1@@ , ( __int64 ) & @@v19@@ , @@v12@@ ) ; @@v20@@ += @@v12@@ ; ++ @@v10@@ ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) && ( @@v25@@ & Number ) == Number || ( @@v20@@ & Number ) == Number || @@v18@@ <= gen_opc_ptr || @@v10@@ >= @@v11@@ || singlestep ) { break ; } } if ( * ( __int16 * ) ( @@a2@@ + Number ) < Number ) gen_io_end ( ) ; if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) || @@v26@@ == Number ) { if ( @@v26@@ == Number ) { gen_helper_interrupt_restart ( ) ; tcg_gen_exit_tb ( Number L ) ; } else if ( @@v26@@ <= Number ) { if ( @@v26@@ ) { if ( @@v26@@ == Number ) { gen_helper_interrupt_restart ( ) ; gen_goto_tb ( ( __int64 ) & @@v19@@ , Number , @@v20@@ ) ; } } else { save_cpu_state ( ( __int64 ) & @@v19@@ , Number ) ; gen_goto_tb ( ( __int64 ) & @@v19@@ , Number , @@v20@@ ) ; } } } else { save_cpu_state ( ( __int64 ) & @@v19@@ , @@v26@@ == Number ) ; @@v15@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; } LABEL_50 : gen_icount_end ( @@a2@@ , @@v10@@ ) ; * gen_opc_ptr = Number ; if ( @@a3@@ ) { @@v14@@ = ( __int64 ) ( gen_opc_ptr - ( _QWORD ) & gen_opc_buf ) >> Number ; ++ @@v9@@ ; while ( @@v9@@ <= @@v14@@ ) { v4 = @@v9@@ ++ ; * ( ( _BYTE * ) & gen_opc_instr_start + v4 ) = Number ; } } else { * ( _WORD * ) ( @@a2@@ + Number ) = @@v20@@ - @@v17@@ ; * ( _DWORD * ) ( @@a2@@ + Number ) = @@v10@@ ; } if ( ( loglevel & Number ) != Number ) { if ( logfile ) { v5 = ( const char * ) lookup_symbol ( @@v17@@ ) ; fprintf ( logfile , String , v5 ) ; } target_disas ( logfile , @@v17@@ , @@v20@@ - @@v17@@ , Number L ) ; if ( logfile ) fputc ( Number , logfile ) ; } return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s104\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s108\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s112\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s116\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s120\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s56\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s64\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s72\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s80\"}, {\"n\": \"i\", \"t\": {\"T\": 3, \"t\": \"_QWORD\"}, \"location\": \"s88\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s96\"}]}"
]
|
{"name": "gen_intermediate_code_pc", "code": "unsigned __int64 __fastcall gen_intermediate_code_pc ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_intermediate_code_internal ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "tb", "t": {"T": 3, "t": "TranslationBlock"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 570 | [
"{\"name\": \"gen_intermediate_code_internal\", \"code\": \"unsigned __int64 __fastcall gen_intermediate_code_internal ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; const char * v5 ; int @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; int @@v14@@ ; unsigned int @@v15@@ ; _QWORD * @@i@@ ; __int64 @@v17@@ ; unsigned __int64 @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; __int64 @@v21@@ ; int @@v22@@ ; int @@v23@@ ; int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; unsigned __int64 @@v27@@ ; @@v27@@ = __readfsqword ( Number ) ; @@v9@@ = Number ; if ( @@a3@@ && logfile ) fprintf ( logfile , String , @@a3@@ ) ; @@v17@@ = * ( _QWORD * ) @@a2@@ ; @@v18@@ = ( unsigned __int64 ) & gen_opc_buf + Number ; @@v20@@ = @@v17@@ ; @@v21@@ = Number ; @@v23@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v19@@ = @@a2@@ ; @@v26@@ = Number ; @@v25@@ = * ( _QWORD * ) ( @@a2@@ + Number ) ; restore_cpu_state ( @@a1@@ , ( __int64 ) & @@v19@@ ) ; @@v24@@ = @@v25@@ & Number ; @@v10@@ = Number ; @@v11@@ = * ( _WORD * ) ( @@a2@@ + Number ) & Number ; if ( ! @@v11@@ ) @@v11@@ = Number ; gen_icount_start ( ) ; while ( ! @@v26@@ ) { if ( * ( _QWORD * ) ( @@a1@@ + Number ) ) { for ( @@i@@ = * ( _QWORD * * ) ( @@a1@@ + Number ) ; @@i@@ ; @@i@@ = ( _QWORD * ) @@i@@ [ Number ] ) { if ( * @@i@@ == @@v20@@ ) { save_cpu_state ( ( __int64 ) & @@v19@@ , Number ) ; @@v26@@ = Number ; @@v13@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; @@v20@@ += Number L ; goto LABEL_50 ; } } } if ( @@a3@@ ) { @@v14@@ = ( __int64 ) ( gen_opc_ptr - ( _QWORD ) & gen_opc_buf ) >> Number ; if ( @@v9@@ < @@v14@@ ) { ++ @@v9@@ ; while ( @@v9@@ < @@v14@@ ) { v3 = @@v9@@ ++ ; * ( ( _BYTE * ) & gen_opc_instr_start + v3 ) = Number ; } } * ( ( _QWORD * ) & gen_opc_pc + @@v9@@ ) = @@v20@@ ; gen_opc_hflags [ @@v9@@ ] = @@v25@@ & Number ; * ( ( _BYTE * ) & gen_opc_instr_start + @@v9@@ ) = Number ; * ( ( _WORD * ) & gen_opc_icount + @@v9@@ ) = @@v10@@ ; } if ( @@v11@@ == @@v10@@ + Number && * ( __int16 * ) ( @@a2@@ + Number ) < Number ) gen_io_start ( ) ; @@v8@@ = Number ; if ( ( @@v25@@ & Number ) != Number ) { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) { @@v22@@ = lduw_code ( @@v20@@ ) ; @@v12@@ = decode_micromips_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } else { if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { generate_exception ( ( __int64 ) & @@v19@@ , Number ) ; @@v26@@ = Number ; break ; } @@v22@@ = lduw_code ( @@v20@@ ) ; @@v12@@ = decode_mips16_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } } else { @@v22@@ = ldl_code ( @@v20@@ ) ; @@v12@@ = Number ; decode_opc ( @@a1@@ , ( __int64 ) & @@v19@@ , & @@v8@@ ) ; } if ( ! @@v8@@ ) handle_delay_slot ( @@a1@@ , ( __int64 ) & @@v19@@ , @@v12@@ ) ; @@v20@@ += @@v12@@ ; ++ @@v10@@ ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) && ( @@v25@@ & Number ) == Number || ( @@v20@@ & Number ) == Number || @@v18@@ <= gen_opc_ptr || @@v10@@ >= @@v11@@ || singlestep ) { break ; } } if ( * ( __int16 * ) ( @@a2@@ + Number ) < Number ) gen_io_end ( ) ; if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) || @@v26@@ == Number ) { if ( @@v26@@ == Number ) { gen_helper_interrupt_restart ( ) ; tcg_gen_exit_tb ( Number L ) ; } else if ( @@v26@@ <= Number ) { if ( @@v26@@ ) { if ( @@v26@@ == Number ) { gen_helper_interrupt_restart ( ) ; gen_goto_tb ( ( __int64 ) & @@v19@@ , Number , @@v20@@ ) ; } } else { save_cpu_state ( ( __int64 ) & @@v19@@ , Number ) ; gen_goto_tb ( ( __int64 ) & @@v19@@ , Number , @@v20@@ ) ; } } } else { save_cpu_state ( ( __int64 ) & @@v19@@ , @@v26@@ == Number ) ; @@v15@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; } LABEL_50 : gen_icount_end ( @@a2@@ , @@v10@@ ) ; * gen_opc_ptr = Number ; if ( @@a3@@ ) { @@v14@@ = ( __int64 ) ( gen_opc_ptr - ( _QWORD ) & gen_opc_buf ) >> Number ; ++ @@v9@@ ; while ( @@v9@@ <= @@v14@@ ) { v4 = @@v9@@ ++ ; * ( ( _BYTE * ) & gen_opc_instr_start + v4 ) = Number ; } } else { * ( _WORD * ) ( @@a2@@ + Number ) = @@v20@@ - @@v17@@ ; * ( _DWORD * ) ( @@a2@@ + Number ) = @@v10@@ ; } if ( ( loglevel & Number ) != Number ) { if ( logfile ) { v5 = ( const char * ) lookup_symbol ( @@v17@@ ) ; fprintf ( logfile , String , v5 ) ; } target_disas ( logfile , @@v17@@ , @@v20@@ - @@v17@@ , Number L ) ; if ( logfile ) fputc ( Number , logfile ) ; } return __readfsqword ( Number ) ^ @@v27@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s104\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s108\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s112\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s116\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s120\"}, {\"n\": \"v26\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v25\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v24\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v23\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v22\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s56\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s64\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s72\"}, {\"n\": \"v27\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s80\"}, {\"n\": \"i\", \"t\": {\"T\": 3, \"t\": \"_QWORD\"}, \"location\": \"s88\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"gen_intermediate_code\", \"code\": \"unsigned __int64 __fastcall gen_intermediate_code ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_intermediate_code_internal ( @@a1@@ , @@a2@@ , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "fpu_dump_state", "code": "unsigned __int64 __fastcall fpu_dump_state ( __int64 @@a1@@ , __int64 @@a2@@ , void ( * @@a3@@ ) ( __int64 , const char * , ... ) ) { unsigned int v3 ; __int64 v4 ; double v5 ; double v6 ; int @@v9@@ ; _BOOL4 @@v10@@ ; __int64 @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v10@@ = ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ; v3 = get_float_exception_flags ( @@a1@@ + Number ) ; @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , @@v10@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , v3 ) ; @@v9@@ = Number ; while ( @@v9@@ <= Number ) { @@a3@@ ( @@a2@@ , String , fregnames [ @@v9@@ ] ) ; if ( @@v10@@ ) { v4 = * ( _QWORD * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) ; if ( v4 < Number ) v5 = ( double ) ( int ) ( v4 & Number | ( ( unsigned __int64 ) v4 >> Number ) ) + ( double ) ( int ) ( v4 & Number | ( ( unsigned __int64 ) v4 >> Number ) ) ; else v5 = ( double ) ( int ) v4 ; @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , * ( _QWORD * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , v5 , ( double ) * ( int * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , ( double ) * ( int * ) ( @@a1@@ + Number L * @@v9@@ + Number ) ) ; } else { LODWORD ( @@v11@@ ) = * ( _DWORD * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) ; HIDWORD ( @@v11@@ ) = * ( _DWORD * ) ( Number * ( @@v9@@ + Number L ) + @@a1@@ + Number ) ; if ( @@v11@@ < Number ) v6 = ( double ) ( int ) ( @@v11@@ & Number | ( ( unsigned __int64 ) @@v11@@ >> Number ) ) + ( double ) ( int ) ( @@v11@@ & Number | ( ( unsigned __int64 ) @@v11@@ >> Number ) ) ; else v6 = ( double ) ( int ) @@v11@@ ; @@a3@@ ( @@a2@@ , String , ( unsigned int ) @@v11@@ , @@v11@@ , v6 , ( double ) * ( int * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , ( double ) * ( int * ) ( Number * ( @@v9@@ + Number L ) + @@a1@@ + Number ) ) ; } if ( @@v10@@ ) ++ @@v9@@ ; else @@v9@@ += Number ; } return __readfsqword ( Number ) ^ @@v12@@ ; }", "source": [{"n": "a3", "t": {"T": 9, "n": "void (*)(__int64, const char *, ...)"}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "_BOOL4", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "fpu_fprintf", "t": {"T": 9, "n": "int (*)(FILE *, const char *, ...)"}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "f", "t": {"T": 3, "t": "FILE"}, "location": "r64"}, {"n": "tmp", "t": {"T": 8}, "location": "s16"}, {"n": "is_fpu64", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 571 | [
"{\"name\": \"get_float_exception_flags\", \"code\": \"__int64 __fastcall get_float_exception_flags ( __int64 @@a1@@ ) { return ( unsigned int ) * ( char * ) ( @@a1@@ + Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
]
|
{"name": "cpu_dump_state", "code": "unsigned __int64 __fastcall cpu_dump_state ( __int64 @@a1@@ , __int64 @@a2@@ , void ( * @@a3@@ ) ( __int64 , const char * , ... ) ) { int @@i@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@a3@@ ( @@a2@@ , String , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { if ( ( @@i@@ & Number ) == Number ) @@a3@@ ( @@a2@@ , String , ( unsigned int ) @@i@@ ) ; @@a3@@ ( @@a2@@ , String , ( const char * ) * ( & regnames + @@i@@ ) , * ( _QWORD * ) ( @@a1@@ + Number L * @@i@@ ) ) ; if ( ( @@i@@ & Number ) == Number ) @@a3@@ ( @@a2@@ , String ) ; } @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) fpu_dump_state ( @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 9, "n": "void (*)(__int64, const char *, ...)"}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "cpu_fprintf", "t": {"T": 9, "n": "int (*)(FILE *, const char *, ...)"}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "f", "t": {"T": 3, "t": "FILE"}, "location": "r64"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 572 | [
"{\"name\": \"fpu_dump_state\", \"code\": \"unsigned __int64 __fastcall fpu_dump_state ( __int64 @@a1@@ , __int64 @@a2@@ , void ( * @@a3@@ ) ( __int64 , const char * , ... ) ) { unsigned int v3 ; __int64 v4 ; double v5 ; double v6 ; int @@v9@@ ; _BOOL4 @@v10@@ ; __int64 @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v10@@ = ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ; v3 = get_float_exception_flags ( @@a1@@ + Number ) ; @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , @@v10@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , v3 ) ; @@v9@@ = Number ; while ( @@v9@@ <= Number ) { @@a3@@ ( @@a2@@ , String , fregnames [ @@v9@@ ] ) ; if ( @@v10@@ ) { v4 = * ( _QWORD * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) ; if ( v4 < Number ) v5 = ( double ) ( int ) ( v4 & Number | ( ( unsigned __int64 ) v4 >> Number ) ) + ( double ) ( int ) ( v4 & Number | ( ( unsigned __int64 ) v4 >> Number ) ) ; else v5 = ( double ) ( int ) v4 ; @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , * ( _QWORD * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , v5 , ( double ) * ( int * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , ( double ) * ( int * ) ( @@a1@@ + Number L * @@v9@@ + Number ) ) ; } else { LODWORD ( @@v11@@ ) = * ( _DWORD * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) ; HIDWORD ( @@v11@@ ) = * ( _DWORD * ) ( Number * ( @@v9@@ + Number L ) + @@a1@@ + Number ) ; if ( @@v11@@ < Number ) v6 = ( double ) ( int ) ( @@v11@@ & Number | ( ( unsigned __int64 ) @@v11@@ >> Number ) ) + ( double ) ( int ) ( @@v11@@ & Number | ( ( unsigned __int64 ) @@v11@@ >> Number ) ) ; else v6 = ( double ) ( int ) @@v11@@ ; @@a3@@ ( @@a2@@ , String , ( unsigned int ) @@v11@@ , @@v11@@ , v6 , ( double ) * ( int * ) ( @@a1@@ + Number * ( @@v9@@ + Number L ) ) , ( double ) * ( int * ) ( Number * ( @@v9@@ + Number L ) + @@a1@@ + Number ) ) ; } if ( @@v10@@ ) ++ @@v9@@ ; else @@v9@@ += Number ; } return __readfsqword ( Number ) ^ @@v12@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 9, \"n\": \"void (*)(__int64, const char *, ...)\"}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"_BOOL4\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "mips_tcg_init", "code": "unsigned __int64 mips_tcg_init ( ) { int i ; int j ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ! inited_16598 ) { cpu_env = tcg_global_reg_new_i64 ( Number L , String ) ; cpu_gpr [ Number ] = Number ; for ( i = Number ; i <= Number ; ++ i ) cpu_gpr [ i ] = tcg_global_mem_new_i64 ( Number L , Number L * i , * ( & regnames + i ) ) ; cpu_PC = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; for ( j = Number ; j <= Number ; ++ j ) { cpu_HI [ j ] = tcg_global_mem_new_i64 ( Number L , Number * ( j + Number L ) , * ( & regnames_HI + j ) ) ; cpu_LO [ j ] = tcg_global_mem_new_i64 ( Number L , Number * ( j + Number L ) , * ( & regnames_LO + j ) ) ; cpu_ACX [ j ] = tcg_global_mem_new_i64 ( Number L , Number * ( j + Number L ) , regnames_ACX [ j ] ) ; } cpu_dspctrl = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; bcond = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; btarget = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; hflags = tcg_global_mem_new_i32 ( Number L , Number L , String ) ; fpu_fcr0 = tcg_global_mem_new_i32 ( Number L , Number L , String ) ; fpu_fcr31 = tcg_global_mem_new_i32 ( Number L , Number L , String ) ; tcg_register_helper ( & helper_raise_exception_err , String ) ; tcg_register_helper ( & helper_raise_exception , String ) ; tcg_register_helper ( & helper_interrupt_restart , String ) ; tcg_register_helper ( & helper_ldl , & unk_2AC7B ) ; tcg_register_helper ( & helper_ldr , & unk_2AC7F ) ; tcg_register_helper ( & helper_sdl , String ) ; tcg_register_helper ( & helper_sdr , String ) ; tcg_register_helper ( & helper_lwl , String ) ; tcg_register_helper ( & helper_lwr , String ) ; tcg_register_helper ( & helper_swl , String ) ; tcg_register_helper ( & helper_swr , String ) ; tcg_register_helper ( & helper_ll , String ) ; tcg_register_helper ( & helper_sc , String ) ; tcg_register_helper ( & helper_lld , & unk_2AC77 ) ; tcg_register_helper ( & helper_scd , String ) ; tcg_register_helper ( & helper_clo , String ) ; tcg_register_helper ( & helper_clz , String ) ; tcg_register_helper ( & helper_dclo , String ) ; tcg_register_helper ( & helper_dclz , String ) ; tcg_register_helper ( & helper_dmult , String ) ; tcg_register_helper ( & helper_dmultu , String ) ; tcg_register_helper ( & helper_muls , String ) ; tcg_register_helper ( & helper_mulsu , String ) ; tcg_register_helper ( & helper_macc , String ) ; tcg_register_helper ( & helper_maccu , String ) ; tcg_register_helper ( & helper_msac , String ) ; tcg_register_helper ( & helper_msacu , String ) ; tcg_register_helper ( & helper_mulhi , String ) ; tcg_register_helper ( & helper_mulhiu , String ) ; tcg_register_helper ( & helper_mulshi , String ) ; tcg_register_helper ( & helper_mulshiu , String ) ; tcg_register_helper ( & helper_macchi , String ) ; tcg_register_helper ( & helper_macchiu , String ) ; tcg_register_helper ( & helper_msachi , String ) ; tcg_register_helper ( & helper_msachiu , String ) ; tcg_register_helper ( & helper_mfc0_mvpcontrol , String ) ; tcg_register_helper ( & helper_mfc0_mvpconf0 , String ) ; tcg_register_helper ( & helper_mfc0_mvpconf1 , String ) ; tcg_register_helper ( & helper_mfc0_random , String ) ; tcg_register_helper ( & helper_mfc0_tcstatus , String ) ; tcg_register_helper ( & helper_mftc0_tcstatus , String ) ; tcg_register_helper ( & helper_mfc0_tcbind , String ) ; tcg_register_helper ( & helper_mftc0_tcbind , String ) ; tcg_register_helper ( & helper_mfc0_tcrestart , String ) ; tcg_register_helper ( & helper_mftc0_tcrestart , String ) ; tcg_register_helper ( & helper_mfc0_tchalt , String ) ; tcg_register_helper ( & helper_mftc0_tchalt , String ) ; tcg_register_helper ( & helper_mfc0_tccontext , String ) ; tcg_register_helper ( & helper_mftc0_tccontext , String ) ; tcg_register_helper ( & helper_mfc0_tcschedule , String ) ; tcg_register_helper ( & helper_mftc0_tcschedule , String ) ; tcg_register_helper ( & helper_mfc0_tcschefback , String ) ; tcg_register_helper ( & helper_mftc0_tcschefback , String ) ; tcg_register_helper ( & helper_mfc0_count , String ) ; tcg_register_helper ( & helper_mftc0_entryhi , String ) ; tcg_register_helper ( & helper_mftc0_status , String ) ; tcg_register_helper ( & helper_mfc0_lladdr , String ) ; tcg_register_helper ( & helper_mfc0_watchlo , String ) ; tcg_register_helper ( & helper_mfc0_watchhi , String ) ; tcg_register_helper ( & helper_mfc0_debug , String ) ; tcg_register_helper ( & helper_mftc0_debug , String ) ; tcg_register_helper ( & helper_dmfc0_tcrestart , String ) ; tcg_register_helper ( & helper_dmfc0_tchalt , String ) ; tcg_register_helper ( & helper_dmfc0_tccontext , String ) ; tcg_register_helper ( & helper_dmfc0_tcschedule , String ) ; tcg_register_helper ( & helper_dmfc0_tcschefback , String ) ; tcg_register_helper ( & helper_dmfc0_lladdr , String ) ; tcg_register_helper ( & helper_dmfc0_watchlo , String ) ; tcg_register_helper ( & helper_mtc0_index , String ) ; tcg_register_helper ( & helper_mtc0_mvpcontrol , String ) ; tcg_register_helper ( & helper_mtc0_vpecontrol , String ) ; tcg_register_helper ( & helper_mtc0_vpeconf0 , String ) ; tcg_register_helper ( & helper_mtc0_vpeconf1 , String ) ; tcg_register_helper ( & helper_mtc0_yqmask , String ) ; tcg_register_helper ( & helper_mtc0_vpeopt , String ) ; tcg_register_helper ( & helper_mtc0_entrylo0 , String ) ; tcg_register_helper ( & helper_mtc0_tcstatus , String ) ; tcg_register_helper ( & helper_mttc0_tcstatus , String ) ; tcg_register_helper ( & helper_mtc0_tcbind , String ) ; tcg_register_helper ( & helper_mttc0_tcbind , String ) ; tcg_register_helper ( & helper_mtc0_tcrestart , String ) ; tcg_register_helper ( & helper_mttc0_tcrestart , String ) ; tcg_register_helper ( & helper_mtc0_tchalt , String ) ; tcg_register_helper ( & helper_mttc0_tchalt , String ) ; tcg_register_helper ( & helper_mtc0_tccontext , String ) ; tcg_register_helper ( & helper_mttc0_tccontext , String ) ; tcg_register_helper ( & helper_mtc0_tcschedule , String ) ; tcg_register_helper ( & helper_mttc0_tcschedule , String ) ; tcg_register_helper ( & helper_mtc0_tcschefback , String ) ; tcg_register_helper ( & helper_mttc0_tcschefback , String ) ; tcg_register_helper ( & helper_mtc0_entrylo1 , String ) ; tcg_register_helper ( & helper_mtc0_context , String ) ; tcg_register_helper ( & helper_mtc0_pagemask , String ) ; tcg_register_helper ( & helper_mtc0_pagegrain , String ) ; tcg_register_helper ( & helper_mtc0_wired , String ) ; tcg_register_helper ( & helper_mtc0_srsconf0 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf1 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf2 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf3 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf4 , String ) ; tcg_register_helper ( & helper_mtc0_hwrena , String ) ; tcg_register_helper ( & helper_mtc0_count , String ) ; tcg_register_helper ( & helper_mtc0_entryhi , String ) ; tcg_register_helper ( & helper_mttc0_entryhi , String ) ; tcg_register_helper ( & helper_mtc0_compare , String ) ; tcg_register_helper ( & helper_mtc0_status , String ) ; tcg_register_helper ( & helper_mttc0_status , String ) ; tcg_register_helper ( & helper_mtc0_intctl , String ) ; tcg_register_helper ( & helper_mtc0_srsctl , String ) ; tcg_register_helper ( & helper_mtc0_cause , String ) ; tcg_register_helper ( & helper_mtc0_ebase , String ) ; tcg_register_helper ( & helper_mtc0_config0 , String ) ; tcg_register_helper ( & helper_mtc0_config2 , String ) ; tcg_register_helper ( & helper_mtc0_lladdr , String ) ; tcg_register_helper ( & helper_mtc0_watchlo , String ) ; tcg_register_helper ( & helper_mtc0_watchhi , String ) ; tcg_register_helper ( & helper_mtc0_xcontext , String ) ; tcg_register_helper ( & helper_mtc0_framemask , String ) ; tcg_register_helper ( & helper_mtc0_debug , String ) ; tcg_register_helper ( & helper_mttc0_debug , String ) ; tcg_register_helper ( & helper_mtc0_performance0 , String ) ; tcg_register_helper ( & helper_mtc0_taglo , String ) ; tcg_register_helper ( & helper_mtc0_datalo , String ) ; tcg_register_helper ( & helper_mtc0_taghi , String ) ; tcg_register_helper ( & helper_mtc0_datahi , String ) ; tcg_register_helper ( & helper_mftgpr , String ) ; tcg_register_helper ( & helper_mftlo , String ) ; tcg_register_helper ( & helper_mfthi , String ) ; tcg_register_helper ( & helper_mftacx , String ) ; tcg_register_helper ( & helper_mftdsp , String ) ; tcg_register_helper ( & helper_mttgpr , String ) ; tcg_register_helper ( & helper_mttlo , String ) ; tcg_register_helper ( & helper_mtthi , String ) ; tcg_register_helper ( & helper_mttacx , String ) ; tcg_register_helper ( & helper_mttdsp , String ) ; tcg_register_helper ( & helper_dmt , String ) ; tcg_register_helper ( & helper_emt , String ) ; tcg_register_helper ( & helper_dvpe , String ) ; tcg_register_helper ( & helper_evpe , String ) ; tcg_register_helper ( & helper_lwm , String ) ; tcg_register_helper ( & helper_swm , String ) ; tcg_register_helper ( & helper_ldm , String ) ; tcg_register_helper ( & helper_sdm , String ) ; tcg_register_helper ( & helper_fork , String ) ; tcg_register_helper ( & helper_yield , String ) ; tcg_register_helper ( & helper_cfc1 , String ) ; tcg_register_helper ( & helper_ctc1 , String ) ; tcg_register_helper ( & helper_float_cvtd_s , String ) ; tcg_register_helper ( & helper_float_cvtd_w , String ) ; tcg_register_helper ( & helper_float_cvtd_l , String ) ; tcg_register_helper ( & helper_float_cvtl_d , String ) ; tcg_register_helper ( & helper_float_cvtl_s , String ) ; tcg_register_helper ( & helper_float_cvtps_pw , String ) ; tcg_register_helper ( & helper_float_cvtpw_ps , String ) ; tcg_register_helper ( & helper_float_cvts_d , String ) ; tcg_register_helper ( & helper_float_cvts_w , String ) ; tcg_register_helper ( & helper_float_cvts_l , String ) ; tcg_register_helper ( & helper_float_cvts_pl , String ) ; tcg_register_helper ( & helper_float_cvts_pu , String ) ; tcg_register_helper ( & helper_float_cvtw_s , String ) ; tcg_register_helper ( & helper_float_cvtw_d , String ) ; tcg_register_helper ( & helper_float_addr_ps , String ) ; tcg_register_helper ( & helper_float_mulr_ps , String ) ; tcg_register_helper ( & helper_float_roundl_s , String ) ; tcg_register_helper ( & helper_float_roundl_d , String ) ; tcg_register_helper ( & helper_float_roundw_s , String ) ; tcg_register_helper ( & helper_float_roundw_d , String ) ; tcg_register_helper ( & helper_float_truncl_s , String ) ; tcg_register_helper ( & helper_float_truncl_d , String ) ; tcg_register_helper ( & helper_float_truncw_s , String ) ; tcg_register_helper ( & helper_float_truncw_d , String ) ; tcg_register_helper ( & helper_float_ceill_s , String ) ; tcg_register_helper ( & helper_float_ceill_d , String ) ; tcg_register_helper ( & helper_float_ceilw_s , String ) ; tcg_register_helper ( & helper_float_ceilw_d , String ) ; tcg_register_helper ( & helper_float_floorl_s , String ) ; tcg_register_helper ( & helper_float_floorl_d , String ) ; tcg_register_helper ( & helper_float_floorw_s , String ) ; tcg_register_helper ( & helper_float_floorw_d , String ) ; tcg_register_helper ( & helper_float_sqrt_s , String ) ; tcg_register_helper ( & helper_float_sqrt_d , String ) ; tcg_register_helper ( & helper_float_rsqrt_s , String ) ; tcg_register_helper ( & helper_float_rsqrt_d , String ) ; tcg_register_helper ( & helper_float_recip_s , String ) ; tcg_register_helper ( & helper_float_recip_d , String ) ; tcg_register_helper ( & helper_float_abs_s , String ) ; tcg_register_helper ( & helper_float_abs_d , String ) ; tcg_register_helper ( & helper_float_abs_ps , String ) ; tcg_register_helper ( & helper_float_chs_s , String ) ; tcg_register_helper ( & helper_float_chs_d , String ) ; tcg_register_helper ( & helper_float_chs_ps , String ) ; tcg_register_helper ( & helper_float_recip1_s , String ) ; tcg_register_helper ( & helper_float_recip1_d , String ) ; tcg_register_helper ( & helper_float_recip1_ps , String ) ; tcg_register_helper ( & helper_float_rsqrt1_s , String ) ; tcg_register_helper ( & helper_float_rsqrt1_d , String ) ; tcg_register_helper ( & helper_float_rsqrt1_ps , String ) ; tcg_register_helper ( & helper_float_add_s , String ) ; tcg_register_helper ( & helper_float_add_d , String ) ; tcg_register_helper ( & helper_float_add_ps , String ) ; tcg_register_helper ( & helper_float_sub_s , String ) ; tcg_register_helper ( & helper_float_sub_d , String ) ; tcg_register_helper ( & helper_float_sub_ps , String ) ; tcg_register_helper ( & helper_float_mul_s , String ) ; tcg_register_helper ( & helper_float_mul_d , String ) ; tcg_register_helper ( & helper_float_mul_ps , String ) ; tcg_register_helper ( & helper_float_div_s , String ) ; tcg_register_helper ( & helper_float_div_d , String ) ; tcg_register_helper ( & helper_float_div_ps , String ) ; tcg_register_helper ( & helper_float_recip2_s , String ) ; tcg_register_helper ( & helper_float_recip2_d , String ) ; tcg_register_helper ( & helper_float_recip2_ps , String ) ; tcg_register_helper ( & helper_float_rsqrt2_s , String ) ; tcg_register_helper ( & helper_float_rsqrt2_d , String ) ; tcg_register_helper ( & helper_float_rsqrt2_ps , String ) ; tcg_register_helper ( & helper_float_muladd_s , String ) ; tcg_register_helper ( & helper_float_muladd_d , String ) ; tcg_register_helper ( & helper_float_muladd_ps , String ) ; tcg_register_helper ( & helper_float_mulsub_s , String ) ; tcg_register_helper ( & helper_float_mulsub_d , String ) ; tcg_register_helper ( & helper_float_mulsub_ps , String ) ; tcg_register_helper ( & helper_float_nmuladd_s , String ) ; tcg_register_helper ( & helper_float_nmuladd_d , String ) ; tcg_register_helper ( & helper_float_nmuladd_ps , String ) ; tcg_register_helper ( & helper_float_nmulsub_s , String ) ; tcg_register_helper ( & helper_float_nmulsub_d , String ) ; tcg_register_helper ( & helper_float_nmulsub_ps , String ) ; tcg_register_helper ( & helper_cmp_d_f , String ) ; tcg_register_helper ( & helper_cmpabs_d_f , String ) ; tcg_register_helper ( & helper_cmp_s_f , String ) ; tcg_register_helper ( & helper_cmpabs_s_f , String ) ; tcg_register_helper ( & helper_cmp_ps_f , String ) ; tcg_register_helper ( & helper_cmpabs_ps_f , String ) ; tcg_register_helper ( & helper_cmp_d_un , String ) ; tcg_register_helper ( & helper_cmpabs_d_un , String ) ; tcg_register_helper ( & helper_cmp_s_un , String ) ; tcg_register_helper ( & helper_cmpabs_s_un , String ) ; tcg_register_helper ( & helper_cmp_ps_un , String ) ; tcg_register_helper ( & helper_cmpabs_ps_un , String ) ; tcg_register_helper ( & helper_cmp_d_eq , String ) ; tcg_register_helper ( & helper_cmpabs_d_eq , String ) ; tcg_register_helper ( & helper_cmp_s_eq , String ) ; tcg_register_helper ( & helper_cmpabs_s_eq , String ) ; tcg_register_helper ( & helper_cmp_ps_eq , String ) ; tcg_register_helper ( & helper_cmpabs_ps_eq , String ) ; tcg_register_helper ( & helper_cmp_d_ueq , String ) ; tcg_register_helper ( & helper_cmpabs_d_ueq , String ) ; tcg_register_helper ( & helper_cmp_s_ueq , String ) ; tcg_register_helper ( & helper_cmpabs_s_ueq , String ) ; tcg_register_helper ( & helper_cmp_ps_ueq , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ueq , String ) ; tcg_register_helper ( & helper_cmp_d_olt , String ) ; tcg_register_helper ( & helper_cmpabs_d_olt , String ) ; tcg_register_helper ( & helper_cmp_s_olt , String ) ; tcg_register_helper ( & helper_cmpabs_s_olt , String ) ; tcg_register_helper ( & helper_cmp_ps_olt , String ) ; tcg_register_helper ( & helper_cmpabs_ps_olt , String ) ; tcg_register_helper ( & helper_cmp_d_ult , String ) ; tcg_register_helper ( & helper_cmpabs_d_ult , String ) ; tcg_register_helper ( & helper_cmp_s_ult , String ) ; tcg_register_helper ( & helper_cmpabs_s_ult , String ) ; tcg_register_helper ( & helper_cmp_ps_ult , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ult , String ) ; tcg_register_helper ( & helper_cmp_d_ole , String ) ; tcg_register_helper ( & helper_cmpabs_d_ole , String ) ; tcg_register_helper ( & helper_cmp_s_ole , String ) ; tcg_register_helper ( & helper_cmpabs_s_ole , String ) ; tcg_register_helper ( & helper_cmp_ps_ole , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ole , String ) ; tcg_register_helper ( & helper_cmp_d_ule , String ) ; tcg_register_helper ( & helper_cmpabs_d_ule , String ) ; tcg_register_helper ( & helper_cmp_s_ule , String ) ; tcg_register_helper ( & helper_cmpabs_s_ule , String ) ; tcg_register_helper ( & helper_cmp_ps_ule , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ule , String ) ; tcg_register_helper ( & helper_cmp_d_sf , String ) ; tcg_register_helper ( & helper_cmpabs_d_sf , String ) ; tcg_register_helper ( & helper_cmp_s_sf , String ) ; tcg_register_helper ( & helper_cmpabs_s_sf , String ) ; tcg_register_helper ( & helper_cmp_ps_sf , String ) ; tcg_register_helper ( & helper_cmpabs_ps_sf , String ) ; tcg_register_helper ( & helper_cmp_d_ngle , String ) ; tcg_register_helper ( & helper_cmpabs_d_ngle , String ) ; tcg_register_helper ( & helper_cmp_s_ngle , String ) ; tcg_register_helper ( & helper_cmpabs_s_ngle , String ) ; tcg_register_helper ( & helper_cmp_ps_ngle , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ngle , String ) ; tcg_register_helper ( & helper_cmp_d_seq , String ) ; tcg_register_helper ( & helper_cmpabs_d_seq , String ) ; tcg_register_helper ( & helper_cmp_s_seq , String ) ; tcg_register_helper ( & helper_cmpabs_s_seq , String ) ; tcg_register_helper ( & helper_cmp_ps_seq , String ) ; tcg_register_helper ( & helper_cmpabs_ps_seq , String ) ; tcg_register_helper ( & helper_cmp_d_ngl , String ) ; tcg_register_helper ( & helper_cmpabs_d_ngl , String ) ; tcg_register_helper ( & helper_cmp_s_ngl , String ) ; tcg_register_helper ( & helper_cmpabs_s_ngl , String ) ; tcg_register_helper ( & helper_cmp_ps_ngl , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ngl , String ) ; tcg_register_helper ( & helper_cmp_d_lt , String ) ; tcg_register_helper ( & helper_cmpabs_d_lt , String ) ; tcg_register_helper ( & helper_cmp_s_lt , String ) ; tcg_register_helper ( & helper_cmpabs_s_lt , String ) ; tcg_register_helper ( & helper_cmp_ps_lt , String ) ; tcg_register_helper ( & helper_cmpabs_ps_lt , String ) ; tcg_register_helper ( & helper_cmp_d_nge , String ) ; tcg_register_helper ( & helper_cmpabs_d_nge , String ) ; tcg_register_helper ( & helper_cmp_s_nge , String ) ; tcg_register_helper ( & helper_cmpabs_s_nge , String ) ; tcg_register_helper ( & helper_cmp_ps_nge , String ) ; tcg_register_helper ( & helper_cmpabs_ps_nge , String ) ; tcg_register_helper ( & helper_cmp_d_le , String ) ; tcg_register_helper ( & helper_cmpabs_d_le , String ) ; tcg_register_helper ( & helper_cmp_s_le , String ) ; tcg_register_helper ( & helper_cmpabs_s_le , String ) ; tcg_register_helper ( & helper_cmp_ps_le , String ) ; tcg_register_helper ( & helper_cmpabs_ps_le , String ) ; tcg_register_helper ( & helper_cmp_d_ngt , String ) ; tcg_register_helper ( & helper_cmpabs_d_ngt , String ) ; tcg_register_helper ( & helper_cmp_s_ngt , String ) ; tcg_register_helper ( & helper_cmpabs_s_ngt , String ) ; tcg_register_helper ( & helper_cmp_ps_ngt , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ngt , String ) ; tcg_register_helper ( & helper_tlbwi , String ) ; tcg_register_helper ( & helper_tlbwr , String ) ; tcg_register_helper ( & helper_tlbp , String ) ; tcg_register_helper ( & helper_tlbr , String ) ; tcg_register_helper ( & helper_di , String ) ; tcg_register_helper ( & helper_ei , String ) ; tcg_register_helper ( & helper_eret , String ) ; tcg_register_helper ( & helper_deret , String ) ; tcg_register_helper ( & helper_rdhwr_cpunum , String ) ; tcg_register_helper ( & helper_rdhwr_synci_step , String ) ; tcg_register_helper ( & helper_rdhwr_cc , String ) ; tcg_register_helper ( & helper_rdhwr_ccres , String ) ; tcg_register_helper ( & helper_pmon , String ) ; tcg_register_helper ( & helper_wait , String ) ; inited_16598 = Number ; } return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 573 | []
|
{"name": "cpu_mips_find_by_name", "code": "char * * __fastcall cpu_mips_find_by_name ( const char * @@a1@@ ) { unsigned int @@i@@ ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { if ( ! strcasecmp ( @@a1@@ , ( & mips_defs ) [ Number * ( int ) @@i@@ ] ) ) return & ( & mips_defs ) [ Number * ( int ) @@i@@ ] ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "const char"}, "location": "r56"}, {"n": "i", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}]} | [{"n": "name", "t": {"T": 3, "t": "const char"}, "location": "r56"}, {"n": "i", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 574 | []
|
{"name": "mips_cpu_list", "code": "unsigned __int64 __fastcall mips_cpu_list ( __int64 @@a1@@ , void ( * @@a2@@ ) ( __int64 , const char * , ... ) ) { unsigned int @@i@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) @@a2@@ ( @@a1@@ , String , ( & mips_defs ) [ Number * ( int ) @@i@@ ] ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 9, "n": "void (*)(__int64, const char *, ...)"}, "location": "r64"}, {"n": "i", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "f", "t": {"T": 3, "t": "FILE"}, "location": "r56"}, {"n": "cpu_fprintf", "t": {"T": 9, "n": "int (*)(FILE *, const char *, ...)"}, "location": "r64"}, {"n": "i", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 575 | []
|
{"name": "no_mmu_init", "code": "unsigned __int64 __fastcall no_mmu_init ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = Number ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & no_mmu_map_address ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 576 | [
"{\"name\": \"mmu_init\", \"code\": \"unsigned __int64 __fastcall mmu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = qemu_mallocz ( Number L ) ; @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; if ( @@v2@@ == Number ) { fixed_mmu_init ( @@a1@@ ) ; } else { if ( @@v2@@ > Number ) { LABEL_9 : cpu_abort ( @@a1@@ , String ) ; return __readfsqword ( Number ) ^ @@v4@@ ; } if ( @@v2@@ ) { if ( @@v2@@ != Number ) goto LABEL_9 ; r4k_mmu_init ( @@a1@@ , @@a2@@ ) ; } else { no_mmu_init ( @@a1@@ ) ; } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "fixed_mmu_init", "code": "unsigned __int64 __fastcall fixed_mmu_init ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = Number ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & fixed_mmu_map_address ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 577 | [
"{\"name\": \"mmu_init\", \"code\": \"unsigned __int64 __fastcall mmu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = qemu_mallocz ( Number L ) ; @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; if ( @@v2@@ == Number ) { fixed_mmu_init ( @@a1@@ ) ; } else { if ( @@v2@@ > Number ) { LABEL_9 : cpu_abort ( @@a1@@ , String ) ; return __readfsqword ( Number ) ^ @@v4@@ ; } if ( @@v2@@ ) { if ( @@v2@@ != Number ) goto LABEL_9 ; r4k_mmu_init ( @@a1@@ , @@a2@@ ) ; } else { no_mmu_init ( @@a1@@ ) ; } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "r4k_mmu_init", "code": "unsigned __int64 __fastcall r4k_mmu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = ( ( * ( int * ) ( @@a2@@ + Number ) >> Number ) & Number ) + Number ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_map_address ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbwi ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbwr ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbp ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbr ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "r56"}, {"n": "def", "t": {"T": 3, "t": "const mips_def_t_0"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 578 | [
"{\"name\": \"mmu_init\", \"code\": \"unsigned __int64 __fastcall mmu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = qemu_mallocz ( Number L ) ; @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; if ( @@v2@@ == Number ) { fixed_mmu_init ( @@a1@@ ) ; } else { if ( @@v2@@ > Number ) { LABEL_9 : cpu_abort ( @@a1@@ , String ) ; return __readfsqword ( Number ) ^ @@v4@@ ; } if ( @@v2@@ ) { if ( @@v2@@ != Number ) goto LABEL_9 ; r4k_mmu_init ( @@a1@@ , @@a2@@ ) ; } else { no_mmu_init ( @@a1@@ ) ; } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "mmu_init", "code": "unsigned __int64 __fastcall mmu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = qemu_mallocz ( Number L ) ; @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; if ( @@v2@@ == Number ) { fixed_mmu_init ( @@a1@@ ) ; } else { if ( @@v2@@ > Number ) { LABEL_9 : cpu_abort ( @@a1@@ , String ) ; return __readfsqword ( Number ) ^ @@v4@@ ; } if ( @@v2@@ ) { if ( @@v2@@ != Number ) goto LABEL_9 ; r4k_mmu_init ( @@a1@@ , @@a2@@ ) ; } else { no_mmu_init ( @@a1@@ ) ; } } return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "r56"}, {"n": "def", "t": {"T": 3, "t": "const mips_def_t_0"}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "mips_mmu_types", "s": 4}, "location": "r8"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 579 | [
"{\"name\": \"no_mmu_init\", \"code\": \"unsigned __int64 __fastcall no_mmu_init ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = Number ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & no_mmu_map_address ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"fixed_mmu_init\", \"code\": \"unsigned __int64 __fastcall fixed_mmu_init ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = Number ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & fixed_mmu_map_address ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"r4k_mmu_init\", \"code\": \"unsigned __int64 __fastcall r4k_mmu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = ( ( * ( int * ) ( @@a2@@ + Number ) >> Number ) & Number ) + Number ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_map_address ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbwi ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbwr ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbp ; * ( _QWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = & r4k_helper_tlbr ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "fpu_init", "code": "unsigned __int64 __fastcall fpu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@i@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) * ( _DWORD * ) ( @@a1@@ + Number L * @@i@@ + Number ) = * ( _DWORD * ) ( @@a2@@ + Number ) ; memcpy ( ( void * ) ( @@a1@@ + Number ) , ( const void * ) ( @@a1@@ + Number ) , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "r56"}, {"n": "def", "t": {"T": 3, "t": "const mips_def_t_0"}, "location": "r64"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 580 | []
|
{"name": "mvp_init", "code": "unsigned __int64 __fastcall mvp_init ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = qemu_mallocz ( Number L ) ; * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) = Number ; * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) |= * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) << Number ; * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) = Number ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 581 | []
|
{"name": "cpu_mips_init", "code": "__int64 __fastcall cpu_mips_init ( const char * @@a1@@ ) { char * * @@v2@@ ; __int64 @@v3@@ ; @@v2@@ = cpu_mips_find_by_name ( @@a1@@ ) ; if ( ! @@v2@@ ) return Number L ; @@v3@@ = qemu_mallocz ( Number L ) ; * ( _QWORD * ) ( @@v3@@ + Number ) = @@v2@@ ; * ( _QWORD * ) ( @@v3@@ + Number ) = @@a1@@ ; cpu_exec_init ( @@v3@@ ) ; mmu_init ( @@v3@@ , ( __int64 ) @@v2@@ ) ; fpu_init ( @@v3@@ , ( __int64 ) @@v2@@ ) ; mvp_init ( @@v3@@ ) ; mips_tcg_init ( ) ; cpu_reset ( @@v3@@ , @@v2@@ ) ; qemu_init_vcpu ( @@v3@@ ) ; return @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "const char"}, "location": "r56"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v2", "t": {"T": 3, "t": "char *"}, "location": "s24"}]} | [{"n": "cpu_model", "t": {"T": 3, "t": "const char"}, "location": "r56"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "s16"}, {"n": "def", "t": {"T": 3, "t": "const mips_def_t_0"}, "location": "s24"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 582 | [
"{\"name\": \"mips_tcg_init\", \"code\": \"unsigned __int64 mips_tcg_init ( ) { int i ; int j ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( ! inited_16598 ) { cpu_env = tcg_global_reg_new_i64 ( Number L , String ) ; cpu_gpr [ Number ] = Number ; for ( i = Number ; i <= Number ; ++ i ) cpu_gpr [ i ] = tcg_global_mem_new_i64 ( Number L , Number L * i , * ( & regnames + i ) ) ; cpu_PC = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; for ( j = Number ; j <= Number ; ++ j ) { cpu_HI [ j ] = tcg_global_mem_new_i64 ( Number L , Number * ( j + Number L ) , * ( & regnames_HI + j ) ) ; cpu_LO [ j ] = tcg_global_mem_new_i64 ( Number L , Number * ( j + Number L ) , * ( & regnames_LO + j ) ) ; cpu_ACX [ j ] = tcg_global_mem_new_i64 ( Number L , Number * ( j + Number L ) , regnames_ACX [ j ] ) ; } cpu_dspctrl = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; bcond = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; btarget = tcg_global_mem_new_i64 ( Number L , Number L , String ) ; hflags = tcg_global_mem_new_i32 ( Number L , Number L , String ) ; fpu_fcr0 = tcg_global_mem_new_i32 ( Number L , Number L , String ) ; fpu_fcr31 = tcg_global_mem_new_i32 ( Number L , Number L , String ) ; tcg_register_helper ( & helper_raise_exception_err , String ) ; tcg_register_helper ( & helper_raise_exception , String ) ; tcg_register_helper ( & helper_interrupt_restart , String ) ; tcg_register_helper ( & helper_ldl , & unk_2AC7B ) ; tcg_register_helper ( & helper_ldr , & unk_2AC7F ) ; tcg_register_helper ( & helper_sdl , String ) ; tcg_register_helper ( & helper_sdr , String ) ; tcg_register_helper ( & helper_lwl , String ) ; tcg_register_helper ( & helper_lwr , String ) ; tcg_register_helper ( & helper_swl , String ) ; tcg_register_helper ( & helper_swr , String ) ; tcg_register_helper ( & helper_ll , String ) ; tcg_register_helper ( & helper_sc , String ) ; tcg_register_helper ( & helper_lld , & unk_2AC77 ) ; tcg_register_helper ( & helper_scd , String ) ; tcg_register_helper ( & helper_clo , String ) ; tcg_register_helper ( & helper_clz , String ) ; tcg_register_helper ( & helper_dclo , String ) ; tcg_register_helper ( & helper_dclz , String ) ; tcg_register_helper ( & helper_dmult , String ) ; tcg_register_helper ( & helper_dmultu , String ) ; tcg_register_helper ( & helper_muls , String ) ; tcg_register_helper ( & helper_mulsu , String ) ; tcg_register_helper ( & helper_macc , String ) ; tcg_register_helper ( & helper_maccu , String ) ; tcg_register_helper ( & helper_msac , String ) ; tcg_register_helper ( & helper_msacu , String ) ; tcg_register_helper ( & helper_mulhi , String ) ; tcg_register_helper ( & helper_mulhiu , String ) ; tcg_register_helper ( & helper_mulshi , String ) ; tcg_register_helper ( & helper_mulshiu , String ) ; tcg_register_helper ( & helper_macchi , String ) ; tcg_register_helper ( & helper_macchiu , String ) ; tcg_register_helper ( & helper_msachi , String ) ; tcg_register_helper ( & helper_msachiu , String ) ; tcg_register_helper ( & helper_mfc0_mvpcontrol , String ) ; tcg_register_helper ( & helper_mfc0_mvpconf0 , String ) ; tcg_register_helper ( & helper_mfc0_mvpconf1 , String ) ; tcg_register_helper ( & helper_mfc0_random , String ) ; tcg_register_helper ( & helper_mfc0_tcstatus , String ) ; tcg_register_helper ( & helper_mftc0_tcstatus , String ) ; tcg_register_helper ( & helper_mfc0_tcbind , String ) ; tcg_register_helper ( & helper_mftc0_tcbind , String ) ; tcg_register_helper ( & helper_mfc0_tcrestart , String ) ; tcg_register_helper ( & helper_mftc0_tcrestart , String ) ; tcg_register_helper ( & helper_mfc0_tchalt , String ) ; tcg_register_helper ( & helper_mftc0_tchalt , String ) ; tcg_register_helper ( & helper_mfc0_tccontext , String ) ; tcg_register_helper ( & helper_mftc0_tccontext , String ) ; tcg_register_helper ( & helper_mfc0_tcschedule , String ) ; tcg_register_helper ( & helper_mftc0_tcschedule , String ) ; tcg_register_helper ( & helper_mfc0_tcschefback , String ) ; tcg_register_helper ( & helper_mftc0_tcschefback , String ) ; tcg_register_helper ( & helper_mfc0_count , String ) ; tcg_register_helper ( & helper_mftc0_entryhi , String ) ; tcg_register_helper ( & helper_mftc0_status , String ) ; tcg_register_helper ( & helper_mfc0_lladdr , String ) ; tcg_register_helper ( & helper_mfc0_watchlo , String ) ; tcg_register_helper ( & helper_mfc0_watchhi , String ) ; tcg_register_helper ( & helper_mfc0_debug , String ) ; tcg_register_helper ( & helper_mftc0_debug , String ) ; tcg_register_helper ( & helper_dmfc0_tcrestart , String ) ; tcg_register_helper ( & helper_dmfc0_tchalt , String ) ; tcg_register_helper ( & helper_dmfc0_tccontext , String ) ; tcg_register_helper ( & helper_dmfc0_tcschedule , String ) ; tcg_register_helper ( & helper_dmfc0_tcschefback , String ) ; tcg_register_helper ( & helper_dmfc0_lladdr , String ) ; tcg_register_helper ( & helper_dmfc0_watchlo , String ) ; tcg_register_helper ( & helper_mtc0_index , String ) ; tcg_register_helper ( & helper_mtc0_mvpcontrol , String ) ; tcg_register_helper ( & helper_mtc0_vpecontrol , String ) ; tcg_register_helper ( & helper_mtc0_vpeconf0 , String ) ; tcg_register_helper ( & helper_mtc0_vpeconf1 , String ) ; tcg_register_helper ( & helper_mtc0_yqmask , String ) ; tcg_register_helper ( & helper_mtc0_vpeopt , String ) ; tcg_register_helper ( & helper_mtc0_entrylo0 , String ) ; tcg_register_helper ( & helper_mtc0_tcstatus , String ) ; tcg_register_helper ( & helper_mttc0_tcstatus , String ) ; tcg_register_helper ( & helper_mtc0_tcbind , String ) ; tcg_register_helper ( & helper_mttc0_tcbind , String ) ; tcg_register_helper ( & helper_mtc0_tcrestart , String ) ; tcg_register_helper ( & helper_mttc0_tcrestart , String ) ; tcg_register_helper ( & helper_mtc0_tchalt , String ) ; tcg_register_helper ( & helper_mttc0_tchalt , String ) ; tcg_register_helper ( & helper_mtc0_tccontext , String ) ; tcg_register_helper ( & helper_mttc0_tccontext , String ) ; tcg_register_helper ( & helper_mtc0_tcschedule , String ) ; tcg_register_helper ( & helper_mttc0_tcschedule , String ) ; tcg_register_helper ( & helper_mtc0_tcschefback , String ) ; tcg_register_helper ( & helper_mttc0_tcschefback , String ) ; tcg_register_helper ( & helper_mtc0_entrylo1 , String ) ; tcg_register_helper ( & helper_mtc0_context , String ) ; tcg_register_helper ( & helper_mtc0_pagemask , String ) ; tcg_register_helper ( & helper_mtc0_pagegrain , String ) ; tcg_register_helper ( & helper_mtc0_wired , String ) ; tcg_register_helper ( & helper_mtc0_srsconf0 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf1 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf2 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf3 , String ) ; tcg_register_helper ( & helper_mtc0_srsconf4 , String ) ; tcg_register_helper ( & helper_mtc0_hwrena , String ) ; tcg_register_helper ( & helper_mtc0_count , String ) ; tcg_register_helper ( & helper_mtc0_entryhi , String ) ; tcg_register_helper ( & helper_mttc0_entryhi , String ) ; tcg_register_helper ( & helper_mtc0_compare , String ) ; tcg_register_helper ( & helper_mtc0_status , String ) ; tcg_register_helper ( & helper_mttc0_status , String ) ; tcg_register_helper ( & helper_mtc0_intctl , String ) ; tcg_register_helper ( & helper_mtc0_srsctl , String ) ; tcg_register_helper ( & helper_mtc0_cause , String ) ; tcg_register_helper ( & helper_mtc0_ebase , String ) ; tcg_register_helper ( & helper_mtc0_config0 , String ) ; tcg_register_helper ( & helper_mtc0_config2 , String ) ; tcg_register_helper ( & helper_mtc0_lladdr , String ) ; tcg_register_helper ( & helper_mtc0_watchlo , String ) ; tcg_register_helper ( & helper_mtc0_watchhi , String ) ; tcg_register_helper ( & helper_mtc0_xcontext , String ) ; tcg_register_helper ( & helper_mtc0_framemask , String ) ; tcg_register_helper ( & helper_mtc0_debug , String ) ; tcg_register_helper ( & helper_mttc0_debug , String ) ; tcg_register_helper ( & helper_mtc0_performance0 , String ) ; tcg_register_helper ( & helper_mtc0_taglo , String ) ; tcg_register_helper ( & helper_mtc0_datalo , String ) ; tcg_register_helper ( & helper_mtc0_taghi , String ) ; tcg_register_helper ( & helper_mtc0_datahi , String ) ; tcg_register_helper ( & helper_mftgpr , String ) ; tcg_register_helper ( & helper_mftlo , String ) ; tcg_register_helper ( & helper_mfthi , String ) ; tcg_register_helper ( & helper_mftacx , String ) ; tcg_register_helper ( & helper_mftdsp , String ) ; tcg_register_helper ( & helper_mttgpr , String ) ; tcg_register_helper ( & helper_mttlo , String ) ; tcg_register_helper ( & helper_mtthi , String ) ; tcg_register_helper ( & helper_mttacx , String ) ; tcg_register_helper ( & helper_mttdsp , String ) ; tcg_register_helper ( & helper_dmt , String ) ; tcg_register_helper ( & helper_emt , String ) ; tcg_register_helper ( & helper_dvpe , String ) ; tcg_register_helper ( & helper_evpe , String ) ; tcg_register_helper ( & helper_lwm , String ) ; tcg_register_helper ( & helper_swm , String ) ; tcg_register_helper ( & helper_ldm , String ) ; tcg_register_helper ( & helper_sdm , String ) ; tcg_register_helper ( & helper_fork , String ) ; tcg_register_helper ( & helper_yield , String ) ; tcg_register_helper ( & helper_cfc1 , String ) ; tcg_register_helper ( & helper_ctc1 , String ) ; tcg_register_helper ( & helper_float_cvtd_s , String ) ; tcg_register_helper ( & helper_float_cvtd_w , String ) ; tcg_register_helper ( & helper_float_cvtd_l , String ) ; tcg_register_helper ( & helper_float_cvtl_d , String ) ; tcg_register_helper ( & helper_float_cvtl_s , String ) ; tcg_register_helper ( & helper_float_cvtps_pw , String ) ; tcg_register_helper ( & helper_float_cvtpw_ps , String ) ; tcg_register_helper ( & helper_float_cvts_d , String ) ; tcg_register_helper ( & helper_float_cvts_w , String ) ; tcg_register_helper ( & helper_float_cvts_l , String ) ; tcg_register_helper ( & helper_float_cvts_pl , String ) ; tcg_register_helper ( & helper_float_cvts_pu , String ) ; tcg_register_helper ( & helper_float_cvtw_s , String ) ; tcg_register_helper ( & helper_float_cvtw_d , String ) ; tcg_register_helper ( & helper_float_addr_ps , String ) ; tcg_register_helper ( & helper_float_mulr_ps , String ) ; tcg_register_helper ( & helper_float_roundl_s , String ) ; tcg_register_helper ( & helper_float_roundl_d , String ) ; tcg_register_helper ( & helper_float_roundw_s , String ) ; tcg_register_helper ( & helper_float_roundw_d , String ) ; tcg_register_helper ( & helper_float_truncl_s , String ) ; tcg_register_helper ( & helper_float_truncl_d , String ) ; tcg_register_helper ( & helper_float_truncw_s , String ) ; tcg_register_helper ( & helper_float_truncw_d , String ) ; tcg_register_helper ( & helper_float_ceill_s , String ) ; tcg_register_helper ( & helper_float_ceill_d , String ) ; tcg_register_helper ( & helper_float_ceilw_s , String ) ; tcg_register_helper ( & helper_float_ceilw_d , String ) ; tcg_register_helper ( & helper_float_floorl_s , String ) ; tcg_register_helper ( & helper_float_floorl_d , String ) ; tcg_register_helper ( & helper_float_floorw_s , String ) ; tcg_register_helper ( & helper_float_floorw_d , String ) ; tcg_register_helper ( & helper_float_sqrt_s , String ) ; tcg_register_helper ( & helper_float_sqrt_d , String ) ; tcg_register_helper ( & helper_float_rsqrt_s , String ) ; tcg_register_helper ( & helper_float_rsqrt_d , String ) ; tcg_register_helper ( & helper_float_recip_s , String ) ; tcg_register_helper ( & helper_float_recip_d , String ) ; tcg_register_helper ( & helper_float_abs_s , String ) ; tcg_register_helper ( & helper_float_abs_d , String ) ; tcg_register_helper ( & helper_float_abs_ps , String ) ; tcg_register_helper ( & helper_float_chs_s , String ) ; tcg_register_helper ( & helper_float_chs_d , String ) ; tcg_register_helper ( & helper_float_chs_ps , String ) ; tcg_register_helper ( & helper_float_recip1_s , String ) ; tcg_register_helper ( & helper_float_recip1_d , String ) ; tcg_register_helper ( & helper_float_recip1_ps , String ) ; tcg_register_helper ( & helper_float_rsqrt1_s , String ) ; tcg_register_helper ( & helper_float_rsqrt1_d , String ) ; tcg_register_helper ( & helper_float_rsqrt1_ps , String ) ; tcg_register_helper ( & helper_float_add_s , String ) ; tcg_register_helper ( & helper_float_add_d , String ) ; tcg_register_helper ( & helper_float_add_ps , String ) ; tcg_register_helper ( & helper_float_sub_s , String ) ; tcg_register_helper ( & helper_float_sub_d , String ) ; tcg_register_helper ( & helper_float_sub_ps , String ) ; tcg_register_helper ( & helper_float_mul_s , String ) ; tcg_register_helper ( & helper_float_mul_d , String ) ; tcg_register_helper ( & helper_float_mul_ps , String ) ; tcg_register_helper ( & helper_float_div_s , String ) ; tcg_register_helper ( & helper_float_div_d , String ) ; tcg_register_helper ( & helper_float_div_ps , String ) ; tcg_register_helper ( & helper_float_recip2_s , String ) ; tcg_register_helper ( & helper_float_recip2_d , String ) ; tcg_register_helper ( & helper_float_recip2_ps , String ) ; tcg_register_helper ( & helper_float_rsqrt2_s , String ) ; tcg_register_helper ( & helper_float_rsqrt2_d , String ) ; tcg_register_helper ( & helper_float_rsqrt2_ps , String ) ; tcg_register_helper ( & helper_float_muladd_s , String ) ; tcg_register_helper ( & helper_float_muladd_d , String ) ; tcg_register_helper ( & helper_float_muladd_ps , String ) ; tcg_register_helper ( & helper_float_mulsub_s , String ) ; tcg_register_helper ( & helper_float_mulsub_d , String ) ; tcg_register_helper ( & helper_float_mulsub_ps , String ) ; tcg_register_helper ( & helper_float_nmuladd_s , String ) ; tcg_register_helper ( & helper_float_nmuladd_d , String ) ; tcg_register_helper ( & helper_float_nmuladd_ps , String ) ; tcg_register_helper ( & helper_float_nmulsub_s , String ) ; tcg_register_helper ( & helper_float_nmulsub_d , String ) ; tcg_register_helper ( & helper_float_nmulsub_ps , String ) ; tcg_register_helper ( & helper_cmp_d_f , String ) ; tcg_register_helper ( & helper_cmpabs_d_f , String ) ; tcg_register_helper ( & helper_cmp_s_f , String ) ; tcg_register_helper ( & helper_cmpabs_s_f , String ) ; tcg_register_helper ( & helper_cmp_ps_f , String ) ; tcg_register_helper ( & helper_cmpabs_ps_f , String ) ; tcg_register_helper ( & helper_cmp_d_un , String ) ; tcg_register_helper ( & helper_cmpabs_d_un , String ) ; tcg_register_helper ( & helper_cmp_s_un , String ) ; tcg_register_helper ( & helper_cmpabs_s_un , String ) ; tcg_register_helper ( & helper_cmp_ps_un , String ) ; tcg_register_helper ( & helper_cmpabs_ps_un , String ) ; tcg_register_helper ( & helper_cmp_d_eq , String ) ; tcg_register_helper ( & helper_cmpabs_d_eq , String ) ; tcg_register_helper ( & helper_cmp_s_eq , String ) ; tcg_register_helper ( & helper_cmpabs_s_eq , String ) ; tcg_register_helper ( & helper_cmp_ps_eq , String ) ; tcg_register_helper ( & helper_cmpabs_ps_eq , String ) ; tcg_register_helper ( & helper_cmp_d_ueq , String ) ; tcg_register_helper ( & helper_cmpabs_d_ueq , String ) ; tcg_register_helper ( & helper_cmp_s_ueq , String ) ; tcg_register_helper ( & helper_cmpabs_s_ueq , String ) ; tcg_register_helper ( & helper_cmp_ps_ueq , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ueq , String ) ; tcg_register_helper ( & helper_cmp_d_olt , String ) ; tcg_register_helper ( & helper_cmpabs_d_olt , String ) ; tcg_register_helper ( & helper_cmp_s_olt , String ) ; tcg_register_helper ( & helper_cmpabs_s_olt , String ) ; tcg_register_helper ( & helper_cmp_ps_olt , String ) ; tcg_register_helper ( & helper_cmpabs_ps_olt , String ) ; tcg_register_helper ( & helper_cmp_d_ult , String ) ; tcg_register_helper ( & helper_cmpabs_d_ult , String ) ; tcg_register_helper ( & helper_cmp_s_ult , String ) ; tcg_register_helper ( & helper_cmpabs_s_ult , String ) ; tcg_register_helper ( & helper_cmp_ps_ult , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ult , String ) ; tcg_register_helper ( & helper_cmp_d_ole , String ) ; tcg_register_helper ( & helper_cmpabs_d_ole , String ) ; tcg_register_helper ( & helper_cmp_s_ole , String ) ; tcg_register_helper ( & helper_cmpabs_s_ole , String ) ; tcg_register_helper ( & helper_cmp_ps_ole , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ole , String ) ; tcg_register_helper ( & helper_cmp_d_ule , String ) ; tcg_register_helper ( & helper_cmpabs_d_ule , String ) ; tcg_register_helper ( & helper_cmp_s_ule , String ) ; tcg_register_helper ( & helper_cmpabs_s_ule , String ) ; tcg_register_helper ( & helper_cmp_ps_ule , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ule , String ) ; tcg_register_helper ( & helper_cmp_d_sf , String ) ; tcg_register_helper ( & helper_cmpabs_d_sf , String ) ; tcg_register_helper ( & helper_cmp_s_sf , String ) ; tcg_register_helper ( & helper_cmpabs_s_sf , String ) ; tcg_register_helper ( & helper_cmp_ps_sf , String ) ; tcg_register_helper ( & helper_cmpabs_ps_sf , String ) ; tcg_register_helper ( & helper_cmp_d_ngle , String ) ; tcg_register_helper ( & helper_cmpabs_d_ngle , String ) ; tcg_register_helper ( & helper_cmp_s_ngle , String ) ; tcg_register_helper ( & helper_cmpabs_s_ngle , String ) ; tcg_register_helper ( & helper_cmp_ps_ngle , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ngle , String ) ; tcg_register_helper ( & helper_cmp_d_seq , String ) ; tcg_register_helper ( & helper_cmpabs_d_seq , String ) ; tcg_register_helper ( & helper_cmp_s_seq , String ) ; tcg_register_helper ( & helper_cmpabs_s_seq , String ) ; tcg_register_helper ( & helper_cmp_ps_seq , String ) ; tcg_register_helper ( & helper_cmpabs_ps_seq , String ) ; tcg_register_helper ( & helper_cmp_d_ngl , String ) ; tcg_register_helper ( & helper_cmpabs_d_ngl , String ) ; tcg_register_helper ( & helper_cmp_s_ngl , String ) ; tcg_register_helper ( & helper_cmpabs_s_ngl , String ) ; tcg_register_helper ( & helper_cmp_ps_ngl , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ngl , String ) ; tcg_register_helper ( & helper_cmp_d_lt , String ) ; tcg_register_helper ( & helper_cmpabs_d_lt , String ) ; tcg_register_helper ( & helper_cmp_s_lt , String ) ; tcg_register_helper ( & helper_cmpabs_s_lt , String ) ; tcg_register_helper ( & helper_cmp_ps_lt , String ) ; tcg_register_helper ( & helper_cmpabs_ps_lt , String ) ; tcg_register_helper ( & helper_cmp_d_nge , String ) ; tcg_register_helper ( & helper_cmpabs_d_nge , String ) ; tcg_register_helper ( & helper_cmp_s_nge , String ) ; tcg_register_helper ( & helper_cmpabs_s_nge , String ) ; tcg_register_helper ( & helper_cmp_ps_nge , String ) ; tcg_register_helper ( & helper_cmpabs_ps_nge , String ) ; tcg_register_helper ( & helper_cmp_d_le , String ) ; tcg_register_helper ( & helper_cmpabs_d_le , String ) ; tcg_register_helper ( & helper_cmp_s_le , String ) ; tcg_register_helper ( & helper_cmpabs_s_le , String ) ; tcg_register_helper ( & helper_cmp_ps_le , String ) ; tcg_register_helper ( & helper_cmpabs_ps_le , String ) ; tcg_register_helper ( & helper_cmp_d_ngt , String ) ; tcg_register_helper ( & helper_cmpabs_d_ngt , String ) ; tcg_register_helper ( & helper_cmp_s_ngt , String ) ; tcg_register_helper ( & helper_cmpabs_s_ngt , String ) ; tcg_register_helper ( & helper_cmp_ps_ngt , String ) ; tcg_register_helper ( & helper_cmpabs_ps_ngt , String ) ; tcg_register_helper ( & helper_tlbwi , String ) ; tcg_register_helper ( & helper_tlbwr , String ) ; tcg_register_helper ( & helper_tlbp , String ) ; tcg_register_helper ( & helper_tlbr , String ) ; tcg_register_helper ( & helper_di , String ) ; tcg_register_helper ( & helper_ei , String ) ; tcg_register_helper ( & helper_eret , String ) ; tcg_register_helper ( & helper_deret , String ) ; tcg_register_helper ( & helper_rdhwr_cpunum , String ) ; tcg_register_helper ( & helper_rdhwr_synci_step , String ) ; tcg_register_helper ( & helper_rdhwr_cc , String ) ; tcg_register_helper ( & helper_rdhwr_ccres , String ) ; tcg_register_helper ( & helper_pmon , String ) ; tcg_register_helper ( & helper_wait , String ) ; inited_16598 = Number ; } return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"cpu_mips_find_by_name\", \"code\": \"char * * __fastcall cpu_mips_find_by_name ( const char * @@a1@@ ) { unsigned int @@i@@ ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { if ( ! strcasecmp ( @@a1@@ , ( & mips_defs ) [ Number * ( int ) @@i@@ ] ) ) return & ( & mips_defs ) [ Number * ( int ) @@i@@ ] ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 3, \"t\": \"const char\"}, \"location\": \"r56\"}, {\"n\": \"i\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}]}",
"{\"name\": \"mmu_init\", \"code\": \"unsigned __int64 __fastcall mmu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { unsigned int @@v2@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) = qemu_mallocz ( Number L ) ; @@v2@@ = * ( _DWORD * ) ( @@a2@@ + Number ) ; if ( @@v2@@ == Number ) { fixed_mmu_init ( @@a1@@ ) ; } else { if ( @@v2@@ > Number ) { LABEL_9 : cpu_abort ( @@a1@@ , String ) ; return __readfsqword ( Number ) ^ @@v4@@ ; } if ( @@v2@@ ) { if ( @@v2@@ != Number ) goto LABEL_9 ; r4k_mmu_init ( @@a1@@ , @@a2@@ ) ; } else { no_mmu_init ( @@a1@@ ) ; } } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"fpu_init\", \"code\": \"unsigned __int64 __fastcall fpu_init ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@i@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) * ( _DWORD * ) ( @@a1@@ + Number L * @@i@@ + Number ) = * ( _DWORD * ) ( @@a2@@ + Number ) ; memcpy ( ( void * ) ( @@a1@@ + Number ) , ( const void * ) ( @@a1@@ + Number ) , Number ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"i\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"mvp_init\", \"code\": \"unsigned __int64 __fastcall mvp_init ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = qemu_mallocz ( Number L ) ; * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) = Number ; * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) |= * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) << Number ; * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) = Number ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"cpu_reset\", \"code\": \"unsigned __int64 __fastcall cpu_reset ( __int64 @@a1@@ ) { __int64 @@v1@@ ; int @@i@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( loglevel & Number ) != Number ) { if ( logfile ) fprintf ( logfile , String , * ( unsigned int * ) ( @@a1@@ + Number ) ) ; cpu_dump_state ( @@a1@@ , ( __int64 ) logfile , ( void ( * ) ( __int64 , const char * , ... ) ) & fprintf ) ; } memset ( ( void * ) @@a1@@ , Number , Number ) ; tlb_flush ( @@a1@@ , Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) << * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = ( Number L << * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) - Number ; if ( ( * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) & Number ) != Number ) * ( _QWORD * ) ( @@a1@@ + Number ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = ( Number L << * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) - Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) @@v1@@ = * ( _QWORD * ) ( @@a1@@ + Number ) - Number L ; else @@v1@@ = * ( _QWORD * ) ( @@a1@@ + Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = @@v1@@ ; * ( _QWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) - Number ; * ( _DWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { * ( _QWORD * ) ( @@a1@@ + Number * ( @@i@@ + Number L ) ) = Number L ; * ( _DWORD * ) ( @@a1@@ + Number * ( @@i@@ + Number L ) ) = Number ; } * ( _QWORD * ) ( @@a1@@ + Number ) = Number L ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; if ( ( * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) & Number ) != Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; * ( _DWORD * ) ( ( char * ) & loc_11D10 + @@a1@@ ) = Number ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"i\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "cpu_reset", "code": "unsigned __int64 __fastcall cpu_reset ( __int64 @@a1@@ ) { __int64 @@v1@@ ; int @@i@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ( loglevel & Number ) != Number ) { if ( logfile ) fprintf ( logfile , String , * ( unsigned int * ) ( @@a1@@ + Number ) ) ; cpu_dump_state ( @@a1@@ , ( __int64 ) logfile , ( void ( * ) ( __int64 , const char * , ... ) ) & fprintf ) ; } memset ( ( void * ) @@a1@@ , Number , Number ) ; tlb_flush ( @@a1@@ , Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( _QWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) << * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = ( Number L << * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) - Number ; if ( ( * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) & Number ) != Number ) * ( _QWORD * ) ( @@a1@@ + Number ) |= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = ( Number L << * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) - Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) @@v1@@ = * ( _QWORD * ) ( @@a1@@ + Number ) - Number L ; else @@v1@@ = * ( _QWORD * ) ( @@a1@@ + Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = @@v1@@ ; * ( _QWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) - Number ; * ( _DWORD * ) ( * ( _QWORD * ) ( ( char * ) & loc_11D98 + @@a1@@ ) + Number L ) = * * ( _DWORD * * ) ( ( char * ) & loc_11D98 + @@a1@@ ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { * ( _QWORD * ) ( @@a1@@ + Number * ( @@i@@ + Number L ) ) = Number L ; * ( _DWORD * ) ( @@a1@@ + Number * ( @@i@@ + Number L ) ) = Number ; } * ( _QWORD * ) ( @@a1@@ + Number ) = Number L ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; if ( ( * ( _DWORD * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) & Number ) != Number ) * ( _DWORD * ) ( @@a1@@ + Number ) |= Number ; * ( _DWORD * ) ( ( char * ) & loc_11D10 + @@a1@@ ) = Number ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "v1", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState_0"}, "location": "r56"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 583 | [
"{\"name\": \"cpu_dump_state\", \"code\": \"unsigned __int64 __fastcall cpu_dump_state ( __int64 @@a1@@ , __int64 @@a2@@ , void ( * @@a3@@ ) ( __int64 , const char * , ... ) ) { int @@i@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@a3@@ ( @@a2@@ , String , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { if ( ( @@i@@ & Number ) == Number ) @@a3@@ ( @@a2@@ , String , ( unsigned int ) @@i@@ ) ; @@a3@@ ( @@a2@@ , String , ( const char * ) * ( & regnames + @@i@@ ) , * ( _QWORD * ) ( @@a1@@ + Number L * @@i@@ ) ) ; if ( ( @@i@@ & Number ) == Number ) @@a3@@ ( @@a2@@ , String ) ; } @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; @@a3@@ ( @@a2@@ , String , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( unsigned int * ) ( @@a1@@ + Number ) , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; if ( ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ) fpu_dump_state ( @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 9, \"n\": \"void (*)(__int64, const char *, ...)\"}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"i\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "gen_pc_load", "code": "unsigned __int64 __fastcall gen_pc_load ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = * ( ( _QWORD * ) & gen_opc_pc + @@a4@@ ) ; * ( _DWORD * ) ( @@a1@@ + Number ) &= Number ; * ( _DWORD * ) ( @@a1@@ + Number ) |= gen_opc_hflags [ @@a4@@ ] ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "searched_pc", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "r16"}, {"n": "pc_pos", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "env", "t": {"T": 3, "t": "CPUMIPSState"}, "location": "r56"}, {"n": "tb", "t": {"T": 3, "t": "TranslationBlock_0"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 584 | []
|
{"name": "ocfs2_extent_recs_per_gd", "code": "unsigned __int64 __fastcall ocfs2_extent_recs_per_gd ( int @@a1@@ ) { return ( unsigned __int64 ) ( @@a1@@ - Number ) >> Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}]} | [{"n": "blocksize", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}] | data1/train-shard-10.tar | cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88_cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88.jsonl | 0 | []
|
{"name": "ocfs2_clusters_to_blocks", "code": "unsigned __int64 __fastcall ocfs2_clusters_to_blocks ( __int64 @@a1@@ , unsigned int @@a2@@ ) { return ( unsigned __int64 ) @@a2@@ << ( * ( _BYTE * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) - * ( _BYTE * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} | [{"n": "fs_0", "t": {"T": 3, "t": "ocfs2_filesys"}, "location": "r56"}, {"n": "clusters", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}] | data1/train-shard-10.tar | cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88_cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88.jsonl | 1 | []
|
{"name": "ocfs2_supports_discontig_bg", "code": "_BOOL8 __fastcall ocfs2_supports_discontig_bg ( __int64 @@a1@@ ) { return ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}]} | [{"n": "osb", "t": {"T": 3, "t": "ocfs2_super_block"}, "location": "r56"}] | data1/train-shard-10.tar | cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88_cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88.jsonl | 2 | []
|
{"name": "create_discontig_bg_list", "code": "_WORD * __fastcall create_discontig_bg_list ( __int64 @@a1@@ , _WORD * @@a2@@ , __int64 @@a3@@ , unsigned int @@a4@@ ) { _WORD * @@result@@ ; _WORD * v7 ; _WORD * v8 ; int @@v9@@ ; int @@v10@@ ; int @@i@@ ; unsigned __int16 @@v12@@ ; @@v12@@ = ( int ) ocfs2_extent_recs_per_gd ( * ( _DWORD * ) ( @@a1@@ + Number ) ) / Number ; @@v9@@ = Number ; if ( @@a4@@ <= @@v12@@ ) { @@v12@@ = @@a4@@ ; @@v10@@ = Number ; } else { @@v10@@ = @@a4@@ / @@v12@@ ; } for ( @@i@@ = Number ; @@i@@ < @@v12@@ - Number ; ++ @@i@@ ) { v7 = & @@a2@@ [ Number * @@i@@ + Number ] ; * ( ( _QWORD * ) v7 + Number ) = @@a3@@ ; * ( _DWORD * ) v7 = @@v9@@ ; v7 [ Number ] = @@v10@@ ; @@a3@@ += ocfs2_clusters_to_blocks ( @@a1@@ , @@v10@@ ) ; @@v9@@ += @@v10@@ ; } v8 = & @@a2@@ [ Number * @@v12@@ + Number ] ; * ( ( _QWORD * ) v8 + Number ) = @@a3@@ ; * ( _DWORD * ) v8 = @@v9@@ ; v8 [ Number ] = @@a4@@ - ( @@v12@@ - Number ) * @@v10@@ ; @@a2@@ [ Number ] = ocfs2_extent_recs_per_gd ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; @@a2@@ [ Number ] = Number ; @@result@@ = @@a2@@ ; @@a2@@ [ Number ] = @@v12@@ ; return @@result@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_WORD"}, "location": "r64"}, {"n": "result", "t": {"T": 3, "t": "_WORD"}, "location": "r8"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "s2"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} | [{"n": "blkno", "t": {"T": 1, "n": "uint64_t", "s": 8}, "location": "r16"}, {"n": "clusters", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r24"}, {"n": "fs_0", "t": {"T": 3, "t": "ocfs2_filesys"}, "location": "r56"}, {"n": "gd", "t": {"T": 3, "t": "ocfs2_group_desc"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}, {"n": "clusters_per_rec", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "cpos", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "recs", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "s2"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}] | data1/train-shard-10.tar | cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88_cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88.jsonl | 3 | [
"{\"name\": \"ocfs2_extent_recs_per_gd\", \"code\": \"unsigned __int64 __fastcall ocfs2_extent_recs_per_gd ( int @@a1@@ ) { return ( unsigned __int64 ) ( @@a1@@ - Number ) >> Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"ocfs2_clusters_to_blocks\", \"code\": \"unsigned __int64 __fastcall ocfs2_clusters_to_blocks ( __int64 @@a1@@ , unsigned int @@a2@@ ) { return ( unsigned __int64 ) @@a2@@ << ( * ( _BYTE * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) - * ( _BYTE * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"create_discontig_bg\", \"code\": \"__int64 __fastcall create_discontig_bg ( __int64 @@a1@@ , unsigned __int16 @@a2@@ , _WORD * @@a3@@ , _WORD * @@a4@@ ) { unsigned int @@v4@@ ; unsigned __int16 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; unsigned int @@v11@@ ; char @@s@@ [ Number ] ; _WORD * @@v13@@ ; __int64 @@v14@@ ; _WORD * @@v15@@ ; _WORD * @@v16@@ ; _WORD * @@v17@@ ; _WORD * @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; unsigned __int16 @@v21@@ ; @@v8@@ = @@a2@@ ; @@v13@@ = Number L ; @@v20@@ = * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ; @@v19@@ = ocfs2_malloc_block ( * ( _QWORD * ) ( @@a1@@ + Number ) , & @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } if ( @@a2@@ == Number ) @@v8@@ = Number ; snprintf ( @@s@@ , Number , format , @@v8@@ ) ; @@v4@@ = strlen ( @@s@@ ) ; @@v19@@ = ocfs2_lookup ( @@a1@@ , * ( _QWORD * ) ( @@v20@@ + Number ) , @@s@@ , @@v4@@ , Number L , & @@v9@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v19@@ = ocfs2_read_inode ( @@a1@@ , @@v9@@ , @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v18@@ = @@v13@@ ; @@v17@@ = @@v13@@ + Number ; @@v21@@ = @@v13@@ [ Number ] ; if ( @@v21@@ == @@v13@@ [ Number ] ) @@v21@@ = Number ; @@v19@@ = ocfs2_new_clusters ( @@a1@@ , ( unsigned __int16 ) * @@v17@@ , ( unsigned __int16 ) * @@v17@@ , & @@v10@@ , & @@v11@@ ) ; if ( @@v19@@ || ( unsigned __int16 ) * @@v17@@ != @@v11@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v16@@ = @@a3@@ ; ocfs2_init_group_desc ( @@a1@@ , @@a3@@ , @@v10@@ , * ( unsigned int * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) , * ( ( _QWORD * ) @@v18@@ + Number ) , ( unsigned __int16 ) ( @@v18@@ [ Number ] * @@v18@@ [ Number ] ) , @@v21@@ , Number L ) ; create_discontig_bg_list ( @@a1@@ , @@v16@@ , @@v10@@ , @@v11@@ ) ; @@v15@@ = & @@v18@@ [ Number * @@v21@@ + Number ] ; @@v14@@ = * ( ( _QWORD * ) @@v15@@ + Number ) ; * ( ( _QWORD * ) @@v16@@ + Number ) = @@v14@@ ; @@v19@@ = ocfs2_write_group_desc ( @@a1@@ , @@v10@@ , @@a3@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } * ( _DWORD * ) @@v15@@ += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _DWORD * ) @@v15@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _QWORD * ) @@v15@@ + Number ) = @@v10@@ ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v18@@ [ Number ] ; * ( ( _QWORD * ) @@v18@@ + Number ) = * ( unsigned int * ) ( @@a1@@ + Number ) * ( unsigned __int64 ) * ( ( unsigned int * ) @@v18@@ + Number ) ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] - ( unsigned __int16 ) @@v16@@ [ Number ] ; if ( @@v21@@ == @@v18@@ [ Number ] ) @@v18@@ [ Number ] = @@v21@@ + Number ; * @@a4@@ = * @@v17@@ ; @@v19@@ = ocfs2_write_inode ( @@a1@@ , @@v9@@ , @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } return ocfs2_free ( & @@v13@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"s2\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v18\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s32\"}, {\"n\": \"s\", \"t\": {\"T\": 2, \"n\": 264, \"s\": 1, \"t\": \"char\"}, \"location\": \"s336\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s340\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s352\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s360\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"s380\"}, {\"n\": \"v17\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s40\"}, {\"n\": \"v16\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s48\"}, {\"n\": \"v15\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s72\"}]}"
]
|
{"name": "create_discontig_bg", "code": "__int64 __fastcall create_discontig_bg ( __int64 @@a1@@ , unsigned __int16 @@a2@@ , _WORD * @@a3@@ , _WORD * @@a4@@ ) { unsigned int @@v4@@ ; unsigned __int16 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; unsigned int @@v11@@ ; char @@s@@ [ Number ] ; _WORD * @@v13@@ ; __int64 @@v14@@ ; _WORD * @@v15@@ ; _WORD * @@v16@@ ; _WORD * @@v17@@ ; _WORD * @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; unsigned __int16 @@v21@@ ; @@v8@@ = @@a2@@ ; @@v13@@ = Number L ; @@v20@@ = * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ; @@v19@@ = ocfs2_malloc_block ( * ( _QWORD * ) ( @@a1@@ + Number ) , & @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } if ( @@a2@@ == Number ) @@v8@@ = Number ; snprintf ( @@s@@ , Number , format , @@v8@@ ) ; @@v4@@ = strlen ( @@s@@ ) ; @@v19@@ = ocfs2_lookup ( @@a1@@ , * ( _QWORD * ) ( @@v20@@ + Number ) , @@s@@ , @@v4@@ , Number L , & @@v9@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v19@@ = ocfs2_read_inode ( @@a1@@ , @@v9@@ , @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v18@@ = @@v13@@ ; @@v17@@ = @@v13@@ + Number ; @@v21@@ = @@v13@@ [ Number ] ; if ( @@v21@@ == @@v13@@ [ Number ] ) @@v21@@ = Number ; @@v19@@ = ocfs2_new_clusters ( @@a1@@ , ( unsigned __int16 ) * @@v17@@ , ( unsigned __int16 ) * @@v17@@ , & @@v10@@ , & @@v11@@ ) ; if ( @@v19@@ || ( unsigned __int16 ) * @@v17@@ != @@v11@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v16@@ = @@a3@@ ; ocfs2_init_group_desc ( @@a1@@ , @@a3@@ , @@v10@@ , * ( unsigned int * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) , * ( ( _QWORD * ) @@v18@@ + Number ) , ( unsigned __int16 ) ( @@v18@@ [ Number ] * @@v18@@ [ Number ] ) , @@v21@@ , Number L ) ; create_discontig_bg_list ( @@a1@@ , @@v16@@ , @@v10@@ , @@v11@@ ) ; @@v15@@ = & @@v18@@ [ Number * @@v21@@ + Number ] ; @@v14@@ = * ( ( _QWORD * ) @@v15@@ + Number ) ; * ( ( _QWORD * ) @@v16@@ + Number ) = @@v14@@ ; @@v19@@ = ocfs2_write_group_desc ( @@a1@@ , @@v10@@ , @@a3@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } * ( _DWORD * ) @@v15@@ += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _DWORD * ) @@v15@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _QWORD * ) @@v15@@ + Number ) = @@v10@@ ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v18@@ [ Number ] ; * ( ( _QWORD * ) @@v18@@ + Number ) = * ( unsigned int * ) ( @@a1@@ + Number ) * ( unsigned __int64 ) * ( ( unsigned int * ) @@v18@@ + Number ) ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] - ( unsigned __int16 ) @@v16@@ [ Number ] ; if ( @@v21@@ == @@v18@@ [ Number ] ) @@v18@@ [ Number ] = @@v21@@ + Number ; * @@a4@@ = * @@v17@@ ; @@v19@@ = ocfs2_write_inode ( @@a1@@ , @@v9@@ , @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } return ocfs2_free ( & @@v13@@ ) ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_WORD"}, "location": "r16"}, {"n": "a4", "t": {"T": 3, "t": "_WORD"}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v20", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v21", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "s2"}, {"n": "v19", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v18", "t": {"T": 3, "t": "_WORD"}, "location": "s32"}, {"n": "s", "t": {"T": 2, "n": 264, "s": 1, "t": "char"}, "location": "s336"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s340"}, {"n": "v10", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s352"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s360"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "s380"}, {"n": "v17", "t": {"T": 3, "t": "_WORD"}, "location": "s40"}, {"n": "v16", "t": {"T": 3, "t": "_WORD"}, "location": "s48"}, {"n": "v15", "t": {"T": 3, "t": "_WORD"}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s64"}, {"n": "v13", "t": {"T": 3, "t": "_WORD"}, "location": "s72"}]} | [{"n": "gd_buf", "t": {"T": 3, "t": "char"}, "location": "r16"}, {"n": "cpg", "t": {"T": 3, "t": "uint16_t"}, "location": "r24"}, {"n": "fs_0", "t": {"T": 3, "t": "ocfs2_filesys"}, "location": "r56"}, {"n": "slotnum", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}, {"n": "sb", "t": {"T": 3, "t": "ocfs2_super_block"}, "location": "s16"}, {"n": "chain", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "s2"}, {"n": "ret", "t": {"T": 1, "n": "errcode_t", "s": 8}, "location": "s24"}, {"n": "di_0", "t": {"T": 3, "t": "ocfs2_dinode"}, "location": "s32"}, {"n": "sysfile", "t": {"T": 2, "n": 255, "s": 1, "t": "char"}, "location": "s336"}, {"n": "clusters", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s340"}, {"n": "gd_blkno", "t": {"T": 1, "n": "uint64_t", "s": 8}, "location": "s352"}, {"n": "di_blkno", "t": {"T": 1, "n": "uint64_t", "s": 8}, "location": "s360"}, {"n": "slotnuma", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "s380"}, {"n": "cl_0", "t": {"T": 3, "t": "ocfs2_chain_list"}, "location": "s40"}, {"n": "gd", "t": {"T": 3, "t": "ocfs2_group_desc"}, "location": "s48"}, {"n": "rec", "t": {"T": 3, "t": "ocfs2_chain_rec"}, "location": "s56"}, {"n": "old_blkno", "t": {"T": 1, "n": "uint64_t", "s": 8}, "location": "s64"}, {"n": "buf", "t": {"T": 3, "t": "char"}, "location": "s72"}] | data1/train-shard-10.tar | cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88_cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88.jsonl | 4 | [
"{\"name\": \"create_discontig_bg_list\", \"code\": \"_WORD * __fastcall create_discontig_bg_list ( __int64 @@a1@@ , _WORD * @@a2@@ , __int64 @@a3@@ , unsigned int @@a4@@ ) { _WORD * @@result@@ ; _WORD * v7 ; _WORD * v8 ; int @@v9@@ ; int @@v10@@ ; int @@i@@ ; unsigned __int16 @@v12@@ ; @@v12@@ = ( int ) ocfs2_extent_recs_per_gd ( * ( _DWORD * ) ( @@a1@@ + Number ) ) / Number ; @@v9@@ = Number ; if ( @@a4@@ <= @@v12@@ ) { @@v12@@ = @@a4@@ ; @@v10@@ = Number ; } else { @@v10@@ = @@a4@@ / @@v12@@ ; } for ( @@i@@ = Number ; @@i@@ < @@v12@@ - Number ; ++ @@i@@ ) { v7 = & @@a2@@ [ Number * @@i@@ + Number ] ; * ( ( _QWORD * ) v7 + Number ) = @@a3@@ ; * ( _DWORD * ) v7 = @@v9@@ ; v7 [ Number ] = @@v10@@ ; @@a3@@ += ocfs2_clusters_to_blocks ( @@a1@@ , @@v10@@ ) ; @@v9@@ += @@v10@@ ; } v8 = & @@a2@@ [ Number * @@v12@@ + Number ] ; * ( ( _QWORD * ) v8 + Number ) = @@a3@@ ; * ( _DWORD * ) v8 = @@v9@@ ; v8 [ Number ] = @@a4@@ - ( @@v12@@ - Number ) * @@v10@@ ; @@a2@@ [ Number ] = ocfs2_extent_recs_per_gd ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; @@a2@@ [ Number ] = Number ; @@result@@ = @@a2@@ ; @@a2@@ [ Number ] = @@v12@@ ; return @@result@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"r64\"}, {\"n\": \"result\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"r8\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"s2\"}, {\"n\": \"i\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s8\"}]}"
]
|
{"name": "mess_up_discontig_bg", "code": "__int64 __fastcall mess_up_discontig_bg ( _QWORD * @@a1@@ , unsigned int @@a2@@ , unsigned __int16 @@a3@@ ) { __int16 @@v5@@ ; _WORD * @@v6@@ ; __int64 @@v7@@ ; unsigned __int16 @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; _WORD * @@v11@@ ; __int64 @@v12@@ ; @@v6@@ = Number L ; if ( ! ocfs2_supports_discontig_bg ( @@a1@@ [ Number ] + Number L ) ) { fprintf ( stderr , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v12@@ = ocfs2_malloc_block ( @@a1@@ [ Number ] , & @@v6@@ ) ; if ( @@v12@@ ) { com_err ( progname , @@v12@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } create_discontig_bg ( ( __int64 ) @@a1@@ , @@a3@@ , @@v6@@ , & @@v5@@ ) ; @@v11@@ = @@v6@@ ; switch ( @@a2@@ ) { case String : @@v8@@ = @@v11@@ [ Number ] ++ ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v8@@ , ( unsigned __int16 ) @@v11@@ [ Number ] ) ; break ; case String : @@v8@@ = @@v11@@ [ Number ] ; @@v11@@ [ Number ] += Number ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v8@@ , ( unsigned __int16 ) @@v11@@ [ Number ] ) ; break ; case String : @@v7@@ = * ( ( _QWORD * ) @@v11@@ + Number ) ; * ( ( _QWORD * ) @@v11@@ + Number ) = @@a1@@ [ Number ] + Number L ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v7@@ , * ( ( _QWORD * ) @@v11@@ + Number ) ) ; break ; case String : @@v10@@ = ( unsigned __int16 ) @@v11@@ [ Number ] ; @@v9@@ = ( unsigned __int16 ) @@v11@@ [ Number ] ; @@v11@@ [ Number ] = @@v5@@ + Number ; @@v11@@ [ Number ] = @@v5@@ + Number ; fprintf ( stdout , String String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v10@@ , ( unsigned __int16 ) @@v11@@ [ Number ] , @@v9@@ , ( unsigned __int16 ) @@v11@@ [ Number ] ) ; break ; case String : @@v8@@ = @@v11@@ [ Number ] - Number ; @@v10@@ = ( unsigned __int16 ) @@v11@@ [ Number * @@v8@@ + Number ] ++ ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v8@@ , @@v10@@ , ( unsigned __int16 ) @@v11@@ [ Number * @@v8@@ + Number ] ) ; break ; case String : @@v8@@ = @@v11@@ [ Number ] -- ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v8@@ , ( unsigned __int16 ) @@v11@@ [ Number ] ) ; break ; case String : @@v8@@ = @@v11@@ [ Number ] ++ ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v8@@ , ( unsigned __int16 ) @@v11@@ [ Number ] ) ; break ; case String : @@v8@@ = @@v11@@ [ Number ] ; @@v10@@ = ( unsigned __int16 ) @@v11@@ [ Number ] ; @@v11@@ [ Number ] = @@v5@@ + Number ; @@v9@@ = ( unsigned __int16 ) @@v11@@ [ Number * @@v8@@ + Number ] ; @@v11@@ [ Number * @@v8@@ + Number ] += Number ; fprintf ( stdout , String String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v10@@ , ( unsigned __int16 ) @@v11@@ [ Number ] , ( unsigned int ) @@v8@@ - Number , @@v9@@ , ( unsigned __int16 ) @@v11@@ [ Number * @@v8@@ + Number ] ) ; break ; case String : @@v10@@ = ( unsigned __int16 ) @@v11@@ [ Number ] ; @@v9@@ = ( unsigned __int16 ) @@v11@@ [ Number ] ; @@v11@@ [ Number ] = @@v5@@ + Number ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v10@@ , ( unsigned __int16 ) @@v11@@ [ Number ] , @@v9@@ , ( unsigned __int16 ) ++ @@v11@@ [ Number ] ) ; break ; case String : @@v10@@ = ( unsigned __int16 ) @@v11@@ [ Number ] ; @@v11@@ [ Number ] = @@v5@@ + Number ; fprintf ( stdout , String , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v10@@ , ( unsigned __int16 ) @@v11@@ [ Number ] ) ; break ; default : fprintf ( stderr , String , String , Number L , @@a2@@ ) ; raise ( Number ) ; exit ( Number ) ; } @@v12@@ = ocfs2_write_group_desc ( @@a1@@ , * ( ( _QWORD * ) @@v11@@ + Number ) , @@v6@@ ) ; if ( @@v12@@ ) { com_err ( progname , @@v12@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } return ocfs2_free ( & @@v6@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "r16"}, {"n": "a1", "t": {"T": 3, "t": "_QWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 3, "t": "_WORD"}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "s26"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s40"}, {"n": "v6", "t": {"T": 3, "t": "_WORD"}, "location": "s48"}, {"n": "v5", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "s50"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]} | [{"n": "slotnum", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "r16"}, {"n": "fs_0", "t": {"T": 3, "t": "ocfs2_filesys"}, "location": "r56"}, {"n": "type", "t": {"T": 1, "n": "fsck_type", "s": 4}, "location": "r64"}, {"n": "gd", "t": {"T": 3, "t": "ocfs2_group_desc"}, "location": "s16"}, {"n": "old_clusters", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s20"}, {"n": "old_clusters1", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s24"}, {"n": "old", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "s26"}, {"n": "old_blkno", "t": {"T": 1, "n": "uint64_t", "s": 8}, "location": "s40"}, {"n": "buf", "t": {"T": 3, "t": "char"}, "location": "s48"}, {"n": "cpg", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "s50"}, {"n": "ret", "t": {"T": 1, "n": "errcode_t", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88_cb962c7d54ab2d51c94c901d20c5ba7f2e2b133f9e5fd368b811b9c153bd6b88.jsonl | 5 | [
"{\"name\": \"ocfs2_supports_discontig_bg\", \"code\": \"_BOOL8 __fastcall ocfs2_supports_discontig_bg ( __int64 @@a1@@ ) { return ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"create_discontig_bg\", \"code\": \"__int64 __fastcall create_discontig_bg ( __int64 @@a1@@ , unsigned __int16 @@a2@@ , _WORD * @@a3@@ , _WORD * @@a4@@ ) { unsigned int @@v4@@ ; unsigned __int16 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; unsigned int @@v11@@ ; char @@s@@ [ Number ] ; _WORD * @@v13@@ ; __int64 @@v14@@ ; _WORD * @@v15@@ ; _WORD * @@v16@@ ; _WORD * @@v17@@ ; _WORD * @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; unsigned __int16 @@v21@@ ; @@v8@@ = @@a2@@ ; @@v13@@ = Number L ; @@v20@@ = * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ; @@v19@@ = ocfs2_malloc_block ( * ( _QWORD * ) ( @@a1@@ + Number ) , & @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } if ( @@a2@@ == Number ) @@v8@@ = Number ; snprintf ( @@s@@ , Number , format , @@v8@@ ) ; @@v4@@ = strlen ( @@s@@ ) ; @@v19@@ = ocfs2_lookup ( @@a1@@ , * ( _QWORD * ) ( @@v20@@ + Number ) , @@s@@ , @@v4@@ , Number L , & @@v9@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v19@@ = ocfs2_read_inode ( @@a1@@ , @@v9@@ , @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v18@@ = @@v13@@ ; @@v17@@ = @@v13@@ + Number ; @@v21@@ = @@v13@@ [ Number ] ; if ( @@v21@@ == @@v13@@ [ Number ] ) @@v21@@ = Number ; @@v19@@ = ocfs2_new_clusters ( @@a1@@ , ( unsigned __int16 ) * @@v17@@ , ( unsigned __int16 ) * @@v17@@ , & @@v10@@ , & @@v11@@ ) ; if ( @@v19@@ || ( unsigned __int16 ) * @@v17@@ != @@v11@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } @@v16@@ = @@a3@@ ; ocfs2_init_group_desc ( @@a1@@ , @@a3@@ , @@v10@@ , * ( unsigned int * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + Number L ) , * ( ( _QWORD * ) @@v18@@ + Number ) , ( unsigned __int16 ) ( @@v18@@ [ Number ] * @@v18@@ [ Number ] ) , @@v21@@ , Number L ) ; create_discontig_bg_list ( @@a1@@ , @@v16@@ , @@v10@@ , @@v11@@ ) ; @@v15@@ = & @@v18@@ [ Number * @@v21@@ + Number ] ; @@v14@@ = * ( ( _QWORD * ) @@v15@@ + Number ) ; * ( ( _QWORD * ) @@v16@@ + Number ) = @@v14@@ ; @@v19@@ = ocfs2_write_group_desc ( @@a1@@ , @@v10@@ , @@a3@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } * ( _DWORD * ) @@v15@@ += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _DWORD * ) @@v15@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _QWORD * ) @@v15@@ + Number ) = @@v10@@ ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v18@@ [ Number ] ; * ( ( _QWORD * ) @@v18@@ + Number ) = * ( unsigned int * ) ( @@a1@@ + Number ) * ( unsigned __int64 ) * ( ( unsigned int * ) @@v18@@ + Number ) ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] ; * ( ( _DWORD * ) @@v18@@ + Number ) += ( unsigned __int16 ) @@v16@@ [ Number ] - ( unsigned __int16 ) @@v16@@ [ Number ] ; if ( @@v21@@ == @@v18@@ [ Number ] ) @@v18@@ [ Number ] = @@v21@@ + Number ; * @@a4@@ = * @@v17@@ ; @@v19@@ = ocfs2_write_inode ( @@a1@@ , @@v9@@ , @@v13@@ ) ; if ( @@v19@@ ) { com_err ( progname , @@v19@@ , String , String , Number L ) ; raise ( Number ) ; exit ( Number ) ; } return ocfs2_free ( & @@v13@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"s2\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v18\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s32\"}, {\"n\": \"s\", \"t\": {\"T\": 2, \"n\": 264, \"s\": 1, \"t\": \"char\"}, \"location\": \"s336\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s340\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s352\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s360\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"s380\"}, {\"n\": \"v17\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s40\"}, {\"n\": \"v16\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s48\"}, {\"n\": \"v15\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s64\"}, {\"n\": \"v13\", \"t\": {\"T\": 3, \"t\": \"_WORD\"}, \"location\": \"s72\"}]}"
]
|
{"name": "is_absolute_path", "code": "_BOOL8 __fastcall is_absolute_path ( _BYTE * @@a1@@ ) { return * @@a1@@ == Number ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_BYTE"}, "location": "r56"}]} | [{"n": "path", "t": {"T": 3, "t": "const char"}, "location": "r56"}] | data1/train-shard-10.tar | 654a5fbde50b1c7e4451d0a911d84e65ab0638139bfd0be6ca58c67a19245d5d_654a5fbde50b1c7e4451d0a911d84e65ab0638139bfd0be6ca58c67a19245d5d.jsonl | 0 | []
|
{"name": "get_pwd_cwd", "code": "char * get_pwd_cwd ( ) { const char * @@s1@@ ; struct stat64 @@v2@@ ; struct stat64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ! getcwd ( cwd_6542 , Number ) ) return Number L ; @@s1@@ = getenv ( String ) ; if ( @@s1@@ ) { if ( strcmp ( @@s1@@ , cwd_6542 ) ) { stat64 ( cwd_6542 , & @@v2@@ ) ; if ( ! stat64 ( @@s1@@ , & @@v3@@ ) && @@v3@@ . st_dev == @@v2@@ . st_dev && @@v3@@ . st_ino == @@v2@@ . st_ino ) strlcpy ( cwd_6542 , @@s1@@ , Number L ) ; } } return cwd_6542 ; }", "source": [{"n": "v3", "t": {"T": 6, "n": "struct stat64", "l": [{"T": 4, "n": "st_dev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_ino", "t": "__ino64_t", "s": 8}, {"T": 4, "n": "st_nlink", "t": "__nlink_t", "s": 8}, {"T": 4, "n": "st_mode", "t": "__mode_t", "s": 4}, {"T": 4, "n": "st_uid", "t": "__uid_t", "s": 4}, {"T": 4, "n": "st_gid", "t": "__gid_t", "s": 4}, {"T": 4, "n": "__pad0", "t": "int", "s": 4}, {"T": 4, "n": "st_rdev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_size", "t": "__off_t", "s": 8}, {"T": 4, "n": "st_blksize", "t": "__blksize_t", "s": 8}, {"T": 4, "n": "st_blocks", "t": "__blkcnt64_t", "s": 8}, {"T": 4, "n": "st_atim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_mtim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_ctim", "t": "timespec", "s": 16}, {"T": 4, "n": "__unused", "t": "__syscall_slong_t[3]", "s": 24}]}, "location": "s160"}, {"n": "v2", "t": {"T": 6, "n": "struct stat64", "l": [{"T": 4, "n": "st_dev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_ino", "t": "__ino64_t", "s": 8}, {"T": 4, "n": "st_nlink", "t": "__nlink_t", "s": 8}, {"T": 4, "n": "st_mode", "t": "__mode_t", "s": 4}, {"T": 4, "n": "st_uid", "t": "__uid_t", "s": 4}, {"T": 4, "n": "st_gid", "t": "__gid_t", "s": 4}, {"T": 4, "n": "__pad0", "t": "int", "s": 4}, {"T": 4, "n": "st_rdev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_size", "t": "__off_t", "s": 8}, {"T": 4, "n": "st_blksize", "t": "__blksize_t", "s": 8}, {"T": 4, "n": "st_blocks", "t": "__blkcnt64_t", "s": 8}, {"T": 4, "n": "st_atim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_mtim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_ctim", "t": "timespec", "s": 16}, {"T": 4, "n": "__unused", "t": "__syscall_slong_t[3]", "s": 24}]}, "location": "s304"}, {"n": "s1", "t": {"T": 3, "t": "const char"}, "location": "s312"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "pwd_stat", "t": {"T": 6, "n": "stat", "l": [{"T": 4, "n": "st_dev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_ino", "t": "__ino_t", "s": 8}, {"T": 4, "n": "st_nlink", "t": "__nlink_t", "s": 8}, {"T": 4, "n": "st_mode", "t": "__mode_t", "s": 4}, {"T": 4, "n": "st_uid", "t": "__uid_t", "s": 4}, {"T": 4, "n": "st_gid", "t": "__gid_t", "s": 4}, {"T": 4, "n": "__pad0", "t": "int", "s": 4}, {"T": 4, "n": "st_rdev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_size", "t": "__off_t", "s": 8}, {"T": 4, "n": "st_blksize", "t": "__blksize_t", "s": 8}, {"T": 4, "n": "st_blocks", "t": "__blkcnt_t", "s": 8}, {"T": 4, "n": "st_atim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_mtim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_ctim", "t": "timespec", "s": 16}, {"T": 4, "n": "__glibc_reserved", "t": "__syscall_slong_t[3]", "s": 24}]}, "location": "s160"}, {"n": "cwd_stat", "t": {"T": 6, "n": "stat", "l": [{"T": 4, "n": "st_dev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_ino", "t": "__ino_t", "s": 8}, {"T": 4, "n": "st_nlink", "t": "__nlink_t", "s": 8}, {"T": 4, "n": "st_mode", "t": "__mode_t", "s": 4}, {"T": 4, "n": "st_uid", "t": "__uid_t", "s": 4}, {"T": 4, "n": "st_gid", "t": "__gid_t", "s": 4}, {"T": 4, "n": "__pad0", "t": "int", "s": 4}, {"T": 4, "n": "st_rdev", "t": "__dev_t", "s": 8}, {"T": 4, "n": "st_size", "t": "__off_t", "s": 8}, {"T": 4, "n": "st_blksize", "t": "__blksize_t", "s": 8}, {"T": 4, "n": "st_blocks", "t": "__blkcnt_t", "s": 8}, {"T": 4, "n": "st_atim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_mtim", "t": "timespec", "s": 16}, {"T": 4, "n": "st_ctim", "t": "timespec", "s": 16}, {"T": 4, "n": "__glibc_reserved", "t": "__syscall_slong_t[3]", "s": 24}]}, "location": "s304"}, {"n": "pwd", "t": {"T": 3, "t": "const char"}, "location": "s312"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}] | data1/train-shard-10.tar | 654a5fbde50b1c7e4451d0a911d84e65ab0638139bfd0be6ca58c67a19245d5d_654a5fbde50b1c7e4451d0a911d84e65ab0638139bfd0be6ca58c67a19245d5d.jsonl | 1 | []
|
{"name": "make_nonrelative_path", "code": "char * __fastcall make_nonrelative_path ( _BYTE * @@a1@@ ) { char * @@v2@@ ; if ( is_absolute_path ( @@a1@@ ) ) { if ( ( unsigned __int64 ) strlcpy ( buf_6549 , @@a1@@ , Number L ) <= Number ) return buf_6549 ; die ( String , Number L , @@a1@@ ) ; } @@v2@@ = get_pwd_cwd ( ) ; if ( ! @@v2@@ ) die ( String ) ; if ( snprintf ( buf_6549 , Number , String , @@v2@@ , @@a1@@ ) > Number ) die ( String , Number L , @@a1@@ ) ; return buf_6549 ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_BYTE"}, "location": "r56"}, {"n": "v2", "t": {"T": 3, "t": "char"}, "location": "s16"}]} | [{"n": "path", "t": {"T": 3, "t": "const char"}, "location": "r56"}, {"n": "cwd", "t": {"T": 3, "t": "const char"}, "location": "s16"}] | data1/train-shard-10.tar | 654a5fbde50b1c7e4451d0a911d84e65ab0638139bfd0be6ca58c67a19245d5d_654a5fbde50b1c7e4451d0a911d84e65ab0638139bfd0be6ca58c67a19245d5d.jsonl | 2 | [
"{\"name\": \"is_absolute_path\", \"code\": \"_BOOL8 __fastcall is_absolute_path ( _BYTE * @@a1@@ ) { return * @@a1@@ == Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 3, \"t\": \"_BYTE\"}, \"location\": \"r56\"}]}",
"{\"name\": \"get_pwd_cwd\", \"code\": \"char * get_pwd_cwd ( ) { const char * @@s1@@ ; struct stat64 @@v2@@ ; struct stat64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( ! getcwd ( cwd_6542 , Number ) ) return Number L ; @@s1@@ = getenv ( String ) ; if ( @@s1@@ ) { if ( strcmp ( @@s1@@ , cwd_6542 ) ) { stat64 ( cwd_6542 , & @@v2@@ ) ; if ( ! stat64 ( @@s1@@ , & @@v3@@ ) && @@v3@@ . st_dev == @@v2@@ . st_dev && @@v3@@ . st_ino == @@v2@@ . st_ino ) strlcpy ( cwd_6542 , @@s1@@ , Number L ) ; } } return cwd_6542 ; }\", \"source\": [{\"n\": \"v3\", \"t\": {\"T\": 6, \"n\": \"struct stat64\", \"l\": [{\"T\": 4, \"n\": \"st_dev\", \"t\": \"__dev_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_ino\", \"t\": \"__ino64_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_nlink\", \"t\": \"__nlink_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_mode\", \"t\": \"__mode_t\", \"s\": 4}, {\"T\": 4, \"n\": \"st_uid\", \"t\": \"__uid_t\", \"s\": 4}, {\"T\": 4, \"n\": \"st_gid\", \"t\": \"__gid_t\", \"s\": 4}, {\"T\": 4, \"n\": \"__pad0\", \"t\": \"int\", \"s\": 4}, {\"T\": 4, \"n\": \"st_rdev\", \"t\": \"__dev_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_size\", \"t\": \"__off_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_blksize\", \"t\": \"__blksize_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_blocks\", \"t\": \"__blkcnt64_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_atim\", \"t\": \"timespec\", \"s\": 16}, {\"T\": 4, \"n\": \"st_mtim\", \"t\": \"timespec\", \"s\": 16}, {\"T\": 4, \"n\": \"st_ctim\", \"t\": \"timespec\", \"s\": 16}, {\"T\": 4, \"n\": \"__unused\", \"t\": \"__syscall_slong_t[3]\", \"s\": 24}]}, \"location\": \"s160\"}, {\"n\": \"v2\", \"t\": {\"T\": 6, \"n\": \"struct stat64\", \"l\": [{\"T\": 4, \"n\": \"st_dev\", \"t\": \"__dev_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_ino\", \"t\": \"__ino64_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_nlink\", \"t\": \"__nlink_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_mode\", \"t\": \"__mode_t\", \"s\": 4}, {\"T\": 4, \"n\": \"st_uid\", \"t\": \"__uid_t\", \"s\": 4}, {\"T\": 4, \"n\": \"st_gid\", \"t\": \"__gid_t\", \"s\": 4}, {\"T\": 4, \"n\": \"__pad0\", \"t\": \"int\", \"s\": 4}, {\"T\": 4, \"n\": \"st_rdev\", \"t\": \"__dev_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_size\", \"t\": \"__off_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_blksize\", \"t\": \"__blksize_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_blocks\", \"t\": \"__blkcnt64_t\", \"s\": 8}, {\"T\": 4, \"n\": \"st_atim\", \"t\": \"timespec\", \"s\": 16}, {\"T\": 4, \"n\": \"st_mtim\", \"t\": \"timespec\", \"s\": 16}, {\"T\": 4, \"n\": \"st_ctim\", \"t\": \"timespec\", \"s\": 16}, {\"T\": 4, \"n\": \"__unused\", \"t\": \"__syscall_slong_t[3]\", \"s\": 24}]}, \"location\": \"s304\"}, {\"n\": \"s1\", \"t\": {\"T\": 3, \"t\": \"const char\"}, \"location\": \"s312\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "NativeEnumerated_decode_uper", "code": "__int64 __fastcall NativeEnumerated_decode_uper ( __int64 @@a1@@ , __int64 * @@a2@@ , _DWORD * @@a3@@ , _QWORD * * @@a4@@ , __int64 @@a5@@ ) { __int64 v5 ; __int64 result ; __int64 v7 ; int @@v10@@ ; __int64 @@v11@@ ; __int64 v12 ; __int64 v13 ; _DWORD * @@v14@@ ; _QWORD * @@v15@@ ; @@v11@@ = @@a2@@ [ Number ] ; @@v15@@ = * @@a4@@ ; if ( @@a3@@ ) { @@v14@@ = @@a3@@ ; } else { if ( ! @@a2@@ [ Number ] ) goto LABEL_28 ; @@v14@@ = ( _DWORD * ) @@a2@@ [ Number ] ; } if ( ! @@v11@@ ) goto LABEL_28 ; if ( ! @@v15@@ ) { * @@a4@@ = ( _QWORD * ) Memory_calloc ( Number L , Number L ) ; @@v15@@ = * @@a4@@ ; if ( ! * @@a4@@ ) goto LABEL_28 ; } v5 = * @@a2@@ ; ASN_DEBUG ( ) ; if ( ( * @@v14@@ & Number ) == Number ) { LABEL_14 : if ( @@v14@@ && ( int ) @@v14@@ [ Number ] >= Number ) { v12 = ( int ) per_get_few_bits ( @@a5@@ , ( unsigned int ) @@v14@@ [ Number ] ) ; if ( v12 < Number ) { LODWORD ( result ) = Number ; return ( unsigned int ) result ; } if ( * ( _DWORD * ) ( @@v11@@ + Number ) ) v7 = * ( _DWORD * ) ( @@v11@@ + Number ) - Number ; else v7 = * ( int * ) ( @@v11@@ + Number ) ; if ( v7 <= v12 ) { LABEL_28 : ASN_DEBUG ( ) ; LODWORD ( result ) = Number ; return ( unsigned int ) result ; } } else { if ( ! * ( _DWORD * ) ( @@v11@@ + Number ) ) goto LABEL_28 ; v13 = uper_get_nsnnwn ( @@a5@@ , v5 ) ; if ( v13 < Number ) { LODWORD ( result ) = Number ; return ( unsigned int ) result ; } v12 = * ( _DWORD * ) ( @@v11@@ + Number ) - Number + v13 ; if ( v12 >= * ( int * ) ( @@v11@@ + Number ) ) goto LABEL_28 ; } * @@v15@@ = * ( _QWORD * ) ( * ( _QWORD * ) @@v11@@ + Number * v12 ) ; ASN_DEBUG ( ) ; LODWORD ( result ) = Number ; return ( unsigned int ) result ; } v5 = Number L ; @@v10@@ = per_get_few_bits ( @@a5@@ , Number L ) ; if ( @@v10@@ >= Number ) { if ( @@v10@@ ) @@v14@@ = Number L ; goto LABEL_14 ; } LODWORD ( result ) = Number ; return ( unsigned int ) result ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_DWORD"}, "location": "r16"}, {"n": "a4", "t": {"T": 3, "t": "_QWORD *"}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "__int64"}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v15", "t": {"T": 3, "t": "_QWORD"}, "location": "s24"}, {"n": "v14", "t": {"T": 3, "t": "_DWORD"}, "location": "s32"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}]} | [{"n": "constraints", "t": {"T": 3, "t": "asn_per_constraints_t"}, "location": "r16"}, {"n": "sptr", "t": {"T": 3, "t": "void *"}, "location": "r24"}, {"n": "opt_codec_ctx", "t": {"T": 3, "t": "asn_codec_ctx_t"}, "location": "r56"}, {"n": "td", "t": {"T": 3, "t": "asn_TYPE_descriptor_t"}, "location": "r64"}, {"n": "pd", "t": {"T": 3, "t": "asn_per_data_t"}, "location": "r72"}, {"n": "", "t": {"T": 10}, "location": "s24"}, {"n": "ct", "t": {"T": 3, "t": "asn_per_constraints_t"}, "location": "s32"}, {"n": "specs", "t": {"T": 3, "t": "asn_INTEGER_specifics_t"}, "location": "s48"}, {"n": "inext", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}] | data1/train-shard-10.tar | 11336da7872bbd9b48d812f1b79ef3dd01e6cef77f590b31ab1b174d8c23f5f9_11336da7872bbd9b48d812f1b79ef3dd01e6cef77f590b31ab1b174d8c23f5f9.jsonl | 0 | []
|
{"name": "NativeEnumerated__compar_value2enum", "code": "__int64 __fastcall NativeEnumerated__compar_value2enum ( const void * @@a1@@ , const void * @@a2@@ ) { if ( * ( _QWORD * ) @@a1@@ == * ( _QWORD * ) @@a2@@ ) return Number L ; if ( * ( _QWORD * ) @@a1@@ >= * ( _QWORD * ) @@a2@@ ) return Number L ; return Number ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "const void"}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "const void"}, "location": "r64"}]} | [{"n": "ap", "t": {"T": 3, "t": "const void"}, "location": "r56"}, {"n": "bp_0", "t": {"T": 3, "t": "const void"}, "location": "r64"}] | data1/train-shard-10.tar | 11336da7872bbd9b48d812f1b79ef3dd01e6cef77f590b31ab1b174d8c23f5f9_11336da7872bbd9b48d812f1b79ef3dd01e6cef77f590b31ab1b174d8c23f5f9.jsonl | 1 | []
|
{"name": "NativeEnumerated_encode_uper", "code": "_QWORD * __fastcall NativeEnumerated_encode_uper ( _QWORD * @@a1@@ , __int64 @@a2@@ , _DWORD * @@a3@@ , __int64 * @@a4@@ , __int64 @@a5@@ ) { int @@v5@@ ; __int64 @@key@@ [ Number ] ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; void * @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; unsigned int @@v18@@ ; _DWORD * @@v19@@ ; @@v17@@ = * ( _QWORD * ) ( @@a2@@ + Number ) ; @@v18@@ = Number ; if ( @@a4@@ ) { if ( ! @@v17@@ ) goto LABEL_10 ; if ( @@a3@@ ) { @@v19@@ = @@a3@@ ; } else { if ( ! * ( _QWORD * ) ( @@a2@@ + Number ) ) goto LABEL_10 ; @@v19@@ = * ( _DWORD * * ) ( @@a2@@ + Number ) ; } ASN_DEBUG ( ) ; @@v10@@ = Number L ; @@v16@@ = * @@a4@@ ; if ( @@v16@@ < Number ) { LABEL_10 : ASN_DEBUG ( ) ; * @@a1@@ = Number ; @@a1@@ [ Number ] = @@a2@@ ; @@a1@@ [ Number ] = @@a4@@ ; return @@a1@@ ; } @@key@@ [ Number ] = @@v16@@ ; @@v15@@ = bsearch ( @@key@@ , * ( const void * * ) @@v17@@ , * ( int * ) ( @@v17@@ + Number ) , Number , ( __compar_fn_t ) NativeEnumerated__compar_value2enum ) ; if ( ! @@v15@@ ) { ASN_DEBUG ( ) ; ASN_DEBUG ( ) ; * @@a1@@ = Number ; @@a1@@ [ Number ] = @@a2@@ ; @@a1@@ [ Number ] = @@a4@@ ; return @@a1@@ ; } @@v14@@ = Number * ( ( ( __int64 ) @@v15@@ - * ( _QWORD * ) @@v17@@ ) >> Number ) ; if ( ( int ) @@v19@@ [ Number ] >= Number ) { if ( * ( _DWORD * ) ( @@v17@@ + Number ) ) @@v5@@ = * ( _DWORD * ) ( @@v17@@ + Number ) - Number ; else @@v5@@ = * ( _DWORD * ) ( @@v17@@ + Number ) ; @@v13@@ = @@v5@@ ; if ( @@v14@@ >= @@v5@@ ) @@v18@@ = Number ; } if ( ( * @@v19@@ & Number ) != Number ) { if ( ( unsigned int ) per_put_few_bits ( @@a5@@ , @@v18@@ , Number L ) ) goto LABEL_31 ; @@v19@@ = Number L ; } else if ( @@v18@@ ) { goto LABEL_31 ; } if ( @@v19@@ && ( int ) @@v19@@ [ Number ] >= Number ) { if ( ! ( unsigned int ) per_put_few_bits ( @@a5@@ , ( unsigned int ) @@v14@@ , ( unsigned int ) @@v19@@ [ Number ] ) ) { @@v12@@ = Number L ; @@v11@@ = Number L ; * @@a1@@ = @@v10@@ ; @@a1@@ [ Number ] = Number L ; @@a1@@ [ Number ] = @@v12@@ ; return @@a1@@ ; } } else if ( * ( _DWORD * ) ( @@v17@@ + Number ) && ! ( unsigned int ) uper_put_nsnnwn ( @@a5@@ , ( unsigned int ) ( @@v14@@ - * ( _DWORD * ) ( @@v17@@ + Number ) + Number ) ) ) { @@v12@@ = Number L ; @@v11@@ = Number L ; * @@a1@@ = @@v10@@ ; @@a1@@ [ Number ] = Number L ; @@a1@@ [ Number ] = @@v12@@ ; return @@a1@@ ; } LABEL_31 : ASN_DEBUG ( ) ; * @@a1@@ = Number ; @@a1@@ [ Number ] = @@a2@@ ; @@a1@@ [ Number ] = @@a4@@ ; return @@a1@@ ; } ASN_DEBUG ( ) ; * @@a1@@ = Number ; @@a1@@ [ Number ] = @@a2@@ ; @@a1@@ [ Number ] = Number L ; return @@a1@@ ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_DWORD"}, "location": "r16"}, {"n": "a4", "t": {"T": 3, "t": "__int64"}, "location": "r24"}, {"n": "a1", "t": {"T": 3, "t": "_QWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "key", "t": {"T": 2, "n": 4, "s": 8, "t": "__int64"}, "location": "s112"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v17", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v16", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v15", "t": {"T": 3, "t": "void"}, "location": "s40"}, {"n": "v14", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s64"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s72"}, {"n": "v19", "t": {"T": 3, "t": "_DWORD"}, "location": "s8"}, {"n": "v10", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s80"}]} | [{"n": "constraints", "t": {"T": 3, "t": "asn_per_constraints_t"}, "location": "r16"}, {"n": "sptr", "t": {"T": 3, "t": "void"}, "location": "r24"}, {"n": "retstr", "t": {"T": 3, "t": "asn_enc_rval_t"}, "location": "r56"}, {"n": "td", "t": {"T": 3, "t": "asn_TYPE_descriptor_t"}, "location": "r64"}, {"n": "po", "t": {"T": 3, "t": "asn_per_outp_t"}, "location": "r72"}, {"n": "v5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "key", "t": {"T": 6, "n": "asn_INTEGER_enum_map_t", "l": [{"T": 4, "n": "nat_value", "t": "__int64", "s": 8}, {"T": 4, "n": "enum_len", "t": "size_t", "s": 8}, {"T": 4, "n": "enum_name", "t": "const char *", "s": 8}]}, "location": "s112"}, {"n": "inext", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "specs", "t": {"T": 3, "t": "asn_INTEGER_specifics_t"}, "location": "s24"}, {"n": "native", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "kf", "t": {"T": 3, "t": "asn_INTEGER_enum_map_t"}, "location": "s40"}, {"n": "value", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "cmpWith", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "", "t": {"T": 10}, "location": "s64"}, {"n": "", "t": {"T": 10}, "location": "s72"}, {"n": "ct", "t": {"T": 3, "t": "asn_per_constraint_t"}, "location": "s8"}, {"n": "er", "t": {"T": 6, "n": "asn_enc_rval_t", "l": [{"T": 4, "n": "encoded", "t": "ssize_t", "s": 8}, {"T": 4, "n": "failed_type", "t": "asn_TYPE_descriptor_s *", "s": 8}, {"T": 4, "n": "structure_ptr", "t": "void *", "s": 8}]}, "location": "s80"}] | data1/train-shard-10.tar | 11336da7872bbd9b48d812f1b79ef3dd01e6cef77f590b31ab1b174d8c23f5f9_11336da7872bbd9b48d812f1b79ef3dd01e6cef77f590b31ab1b174d8c23f5f9.jsonl | 2 | [
"{\"name\": \"NativeEnumerated__compar_value2enum\", \"code\": \"__int64 __fastcall NativeEnumerated__compar_value2enum ( const void * @@a1@@ , const void * @@a2@@ ) { if ( * ( _QWORD * ) @@a1@@ == * ( _QWORD * ) @@a2@@ ) return Number L ; if ( * ( _QWORD * ) @@a1@@ >= * ( _QWORD * ) @@a2@@ ) return Number L ; return Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 3, \"t\": \"const void\"}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"const void\"}, \"location\": \"r64\"}]}"
]
|
{"name": "LAPACKE_slantr", "code": "float __fastcall LAPACKE_slantr ( unsigned int @@a1@@ , char @@a2@@ , char @@a3@@ , char @@a4@@ , int @@a5@@ , int @@a6@@ , __int64 @@a7@@ , unsigned int @@a8@@ ) { __m128i v8 ; float result ; unsigned int v10 ; int v11 ; int v12 ; size_t v13 ; void * @@ptr@@ ; float @@v19@@ ; int @@v20@@ ; @@v20@@ = Number ; v8 = Number L ; @@v19@@ = Number ; @@ptr@@ = Number L ; if ( @@a1@@ == Number || @@a1@@ == Number ) { if ( ! ( unsigned int ) LAPACKE_get_nancheck ( ) ) goto LABEL_26 ; v10 = @@a5@@ ; if ( @@a6@@ <= @@a5@@ ) v10 = @@a6@@ ; if ( ( unsigned int ) LAPACKE_str_nancheck ( @@a1@@ , ( unsigned int ) @@a3@@ , ( unsigned int ) @@a4@@ , v10 , @@a7@@ , @@a8@@ ) ) { result = Number ; } else { LABEL_26 : if ( ! ( unsigned int ) LAPACKE_lsame ( ( unsigned int ) @@a2@@ , Number L ) ) goto LABEL_19 ; v11 = @@a5@@ ; if ( @@a6@@ >= @@a5@@ ) v11 = @@a6@@ ; if ( v11 <= Number ) { v13 = Number L ; } else { v12 = @@a5@@ ; if ( @@a6@@ >= @@a5@@ ) v12 = @@a6@@ ; v13 = Number L * v12 ; } @@ptr@@ = malloc ( v13 ) ; if ( @@ptr@@ ) { LABEL_19 : * ( double * ) v8 . m128i_i64 = LAPACKE_slantr_work ( @@a1@@ , ( unsigned int ) @@a2@@ , ( unsigned int ) @@a3@@ , ( unsigned int ) @@a4@@ , ( unsigned int ) @@a5@@ , ( unsigned int ) @@a6@@ , @@a7@@ , @@a8@@ , @@ptr@@ ) ; @@v19@@ = COERCE_FLOAT ( _mm_cvtsi128_si32 ( v8 ) ) ; if ( ( unsigned int ) LAPACKE_lsame ( ( unsigned int ) @@a2@@ , Number L ) ) free ( @@ptr@@ ) ; } else { @@v20@@ = Number ; } if ( @@v20@@ == Number ) LAPACKE_xerbla ( String , Number L ) ; result = @@v19@@ ; } } else { LAPACKE_xerbla ( String , Number ) ; result = Number ; } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "char", "s": 1}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "char", "s": 1}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "a7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s-16"}, {"n": "a8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s-24"}, {"n": "ptr", "t": {"T": 3, "t": "void"}, "location": "s16"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v19", "t": {"T": 1, "n": "float", "s": 4}, "location": "s8"}]} | [{"n": "uplo", "t": {"T": 1, "n": "char", "s": 1}, "location": "r16"}, {"n": "diag", "t": {"T": 1, "n": "char", "s": 1}, "location": "r24"}, {"n": "matrix_layout", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "norm", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}, {"n": "m", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "a", "t": {"T": 3, "t": "const float"}, "location": "s-16"}, {"n": "lda", "t": {"T": 1, "n": "int", "s": 4}, "location": "s-24"}, {"n": "work", "t": {"T": 3, "t": "float"}, "location": "s16"}, {"n": "info", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "res", "t": {"T": 1, "n": "float", "s": 4}, "location": "s8"}] | data1/train-shard-10.tar | cd6cd3a1d62428df57808d82a226408c29a7d9dbdc9662443d2041fa7b46b3c1_cd6cd3a1d62428df57808d82a226408c29a7d9dbdc9662443d2041fa7b46b3c1.jsonl | 0 | []
|
{"name": "qemu_coroutine_create", "code": "_QWORD * __fastcall qemu_coroutine_create ( __int64 @@a1@@ ) { _QWORD * @@v2@@ ; qemu_mutex_lock ( & pool_lock ) ; @@v2@@ = ( _QWORD * ) pool ; if ( pool ) { pool = * ( _QWORD * ) ( pool + Number ) ; -- pool_size ; } qemu_mutex_unlock ( & pool_lock ) ; if ( ! @@v2@@ ) @@v2@@ = ( _QWORD * ) qemu_coroutine_new ( ) ; * @@v2@@ = @@a1@@ ; @@v2@@ [ Number ] = Number L ; @@v2@@ [ Number ] = @@v2@@ + Number ; return @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 3, "t": "_QWORD"}, "location": "s16"}]} | [{"n": "entry", "t": {"T": 9, "n": "CoroutineEntry *"}, "location": "r56"}, {"n": "co", "t": {"T": 3, "t": "Coroutine_0"}, "location": "s16"}] | data1/train-shard-10.tar | 685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667_685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667.jsonl | 0 | []
|
{"name": "coroutine_delete", "code": "unsigned __int64 __fastcall coroutine_delete ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; qemu_mutex_lock ( & pool_lock ) ; if ( ( unsigned int ) pool_size > Number ) { qemu_mutex_unlock ( & pool_lock ) ; qemu_coroutine_delete ( @@a1@@ ) ; } else { * ( _QWORD * ) ( @@a1@@ + Number ) = pool ; pool = @@a1@@ ; * ( _QWORD * ) ( @@a1@@ + Number ) = Number L ; ++ pool_size ; qemu_mutex_unlock ( & pool_lock ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "co", "t": {"T": 3, "t": "Coroutine_0"}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667_685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667.jsonl | 1 | []
|
{"name": "coroutine_pool_init", "code": "unsigned __int64 coroutine_pool_init ( ) { unsigned __int64 @@v1@@ ; @@v1@@ = __readfsqword ( Number ) ; qemu_mutex_init ( & pool_lock ) ; return __readfsqword ( Number ) ^ @@v1@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667_685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667.jsonl | 2 | []
|
{"name": "coroutine_pool_cleanup", "code": "unsigned __int64 coroutine_pool_cleanup ( ) { __int64 @@i@@ ; __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; for ( @@i@@ = pool ; @@i@@ ; @@i@@ = @@v2@@ ) { @@v2@@ = * ( _QWORD * ) ( @@i@@ + Number ) ; pool = * ( _QWORD * ) ( pool + Number ) ; qemu_coroutine_delete ( @@i@@ ) ; } qemu_mutex_destroy ( & pool_lock ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "v2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "i", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "tmp", "t": {"T": 3, "t": "Coroutine_0"}, "location": "s16"}, {"n": "co", "t": {"T": 3, "t": "Coroutine_0"}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667_685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667.jsonl | 3 | [
"{\"name\": \"coroutine_delete\", \"code\": \"unsigned __int64 __fastcall coroutine_delete ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; qemu_mutex_lock ( & pool_lock ) ; if ( ( unsigned int ) pool_size > Number ) { qemu_mutex_unlock ( & pool_lock ) ; qemu_coroutine_delete ( @@a1@@ ) ; } else { * ( _QWORD * ) ( @@a1@@ + Number ) = pool ; pool = @@a1@@ ; * ( _QWORD * ) ( @@a1@@ + Number ) = Number L ; ++ pool_size ; qemu_mutex_unlock ( & pool_lock ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "coroutine_swap", "code": "unsigned __int64 __fastcall coroutine_swap ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = qemu_coroutine_switch ( @@a1@@ , @@a2@@ , Number L ) ; qemu_co_queue_run_restart ( @@a2@@ ) ; if ( @@v3@@ != Number ) { if ( @@v3@@ != Number ) abort ( ) ; trace_qemu_coroutine_terminate ( @@a2@@ ) ; coroutine_delete ( @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "from", "t": {"T": 3, "t": "Coroutine_0"}, "location": "r56"}, {"n": "to", "t": {"T": 3, "t": "Coroutine_0"}, "location": "r64"}, {"n": "ret", "t": {"T": 1, "n": "CoroutineAction", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667_685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667.jsonl | 4 | [
"{\"name\": \"coroutine_delete\", \"code\": \"unsigned __int64 __fastcall coroutine_delete ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; qemu_mutex_lock ( & pool_lock ) ; if ( ( unsigned int ) pool_size > Number ) { qemu_mutex_unlock ( & pool_lock ) ; qemu_coroutine_delete ( @@a1@@ ) ; } else { * ( _QWORD * ) ( @@a1@@ + Number ) = pool ; pool = @@a1@@ ; * ( _QWORD * ) ( @@a1@@ + Number ) = Number L ; ++ pool_size ; qemu_mutex_unlock ( & pool_lock ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "qemu_coroutine_enter", "code": "unsigned __int64 __fastcall qemu_coroutine_enter ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = qemu_coroutine_self ( ) ; trace_qemu_coroutine_enter ( @@v3@@ , @@a1@@ , @@a2@@ ) ; if ( * ( _QWORD * ) ( @@a1@@ + Number ) ) { fwrite ( String , Number , Number , stderr ) ; abort ( ) ; } * ( _QWORD * ) ( @@a1@@ + Number ) = @@v3@@ ; * ( _QWORD * ) ( @@a1@@ + Number ) = @@a2@@ ; coroutine_swap ( @@v3@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "co", "t": {"T": 3, "t": "Coroutine_0"}, "location": "r56"}, {"n": "opaque", "t": {"T": 3, "t": "void"}, "location": "r64"}, {"n": "self", "t": {"T": 3, "t": "Coroutine_0"}, "location": "s16"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667_685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667.jsonl | 5 | [
"{\"name\": \"coroutine_swap\", \"code\": \"unsigned __int64 __fastcall coroutine_swap ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = qemu_coroutine_switch ( @@a1@@ , @@a2@@ , Number L ) ; qemu_co_queue_run_restart ( @@a2@@ ) ; if ( @@v3@@ != Number ) { if ( @@v3@@ != Number ) abort ( ) ; trace_qemu_coroutine_terminate ( @@a2@@ ) ; coroutine_delete ( @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "qemu_coroutine_yield", "code": "unsigned __int64 qemu_coroutine_yield ( ) { __int64 @@v1@@ ; __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v1@@ = qemu_coroutine_self ( ) ; @@v2@@ = * ( _QWORD * ) ( @@v1@@ + Number ) ; trace_qemu_coroutine_yield ( @@v1@@ , @@v2@@ ) ; if ( ! @@v2@@ ) { fwrite ( String , Number , Number , stderr ) ; abort ( ) ; } * ( _QWORD * ) ( @@v1@@ + Number ) = Number L ; coroutine_swap ( @@v1@@ , @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "v2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "to", "t": {"T": 3, "t": "Coroutine_0"}, "location": "s16"}, {"n": "self", "t": {"T": 3, "t": "Coroutine_0"}, "location": "s24"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667_685a80ab10d0a590454465d687d0c222247d6ff945d53664f73a336e6392a667.jsonl | 6 | [
"{\"name\": \"coroutine_swap\", \"code\": \"unsigned __int64 __fastcall coroutine_swap ( __int64 @@a1@@ , __int64 @@a2@@ ) { int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = qemu_coroutine_switch ( @@a1@@ , @@a2@@ , Number L ) ; qemu_co_queue_run_restart ( @@a2@@ ) ; if ( @@v3@@ != Number ) { if ( @@v3@@ != Number ) abort ( ) ; trace_qemu_coroutine_terminate ( @@a2@@ ) ; coroutine_delete ( @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "is_power_of_2", "code": "_BOOL8 __fastcall is_power_of_2 ( __int64 @@a1@@ ) { return @@a1@@ && ( @@a1@@ & ( @@a1@@ - Number ) ) == Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}]} | [{"n": "n", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "r56"}] | data1/train-shard-10.tar | c3f72b74d0ac92a930b404b1b3b17a6ff3f0f205a343910ba57eded01676f019_c3f72b74d0ac92a930b404b1b3b17a6ff3f0f205a343910ba57eded01676f019.jsonl | 0 | []
|
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