rtl-llm

rtl-llm 's models 159

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rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16-batch16

Text Generation • Updated 22 days ago • 19

rtl-llm/qwen2.5coder-7b-origen-vhdl-vhdl-verilog-chisel-gs16

Text Generation • Updated 23 days ago • 18

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-chisel-batch8

Text Generation • Updated 23 days ago • 13

rtl-llm/qwen2.5coder-7b-origen-vhdl-vhdl-verilog-gs16

Text Generation • Updated 23 days ago • 10

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel

Text Generation • Updated 23 days ago • 28

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs32

Text Generation • Updated 23 days ago • 19

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-gs16

Text Generation • Updated 23 days ago • 11

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-len768

Text Generation • Updated 23 days ago • 14

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16-fixed4o

Updated 23 days ago

rtl-llm/qwen2.5coder-7b-origen-vhdl-vhdl-chisel-gs16

Text Generation • Updated 23 days ago • 14

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-interleaved-gs16

Text Generation • Updated 23 days ago • 22

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-truncate-gs8-2epochs

Text Generation • Updated 23 days ago • 15

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16-len768

Text Generation • Updated 23 days ago • 12

rtl-llm/test

Updated 23 days ago

rtl-llm/qwen2.5coder-32b-origen-verilog-vhdl-chisel-truncate-len1024

Text Generation • Updated 23 days ago • 20

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-gs8

Text Generation • Updated 23 days ago • 26

rtl-llm/qwen2.5coder-32b-origen-vhdl-4.1-2epochs-gs16-len1024

Text Generation • Updated 23 days ago • 14

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16

Text Generation • Updated 24 days ago • 14

rtl-llm/qwen2.5coder-32b-origen-vhdl-vhdl-chisel-truncate

Text Generation • Updated 24 days ago • 20

rtl-llm/qwen2.5coder-32b-origen-vhdl-chisel-truncate-len1024-gs16

Text Generation • Updated 24 days ago • 20

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-truncate-interleave-lr2e-5

Text Generation • Updated 24 days ago • 12

rtl-llm/qwen2.5coder-32b-origen-verilog-truncate

Text Generation • Updated 24 days ago • 12

rtl-llm/qwen2.5coder-32b-origen-verilog-vhdl-chisel-truncate

Text Generation • Updated 24 days ago • 17

rtl-llm/qwen2.5coder-32b-origen-vhdl-4o-truncate

Text Generation • Updated 24 days ago • 12

rtl-llm/qwen2.5coder-32b-origen-vhdl-4.1-truncate

Text Generation • Updated 24 days ago • 15

rtl-llm/qwen2.5coder-7b-origen-verilog-truncate

Text Generation • Updated 25 days ago • 11

rtl-llm/qwen2.5coder-7b-origen-chisel-vhdl-verilog-truncate-interleave-len1024

Text Generation • Updated 25 days ago • 11

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-truncate-interleave

Text Generation • Updated 25 days ago • 10

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-truncate-interleave-len1024

Text Generation • Updated 25 days ago • 10

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-truncate

Text Generation • Updated 25 days ago • 14